Voltage monitoring circuit and voltage monitoring method

Abstract

The present invention makes it possible to determine the normality or abnormality of voltage being monitored and a voltage monitoring circuit using output of the voltage monitoring circuit, without the need to provide a circuit for detecting the abnormality of the voltage monitoring circuit separately from the voltage monitoring circuit.　This voltage monitoring circuit comprises: a reference voltage generation unit that generates a fluctuating reference voltage that periodically changes between a first reference voltage and a second reference voltage smaller than the first reference voltage; and a comparison unit that compares the fluctuating reference voltage and voltage being monitored, and switches the output level on the basis of the relative magnitudes of the fluctuating reference voltage and the voltage being monitored. The reference voltage generation unit may generate the first reference voltage and the second reference voltage by varying the resistor divider ratio of a constant voltage. The comparison unit may include a plurality of comparators to which a plurality of voltages being monitored are respectively inputted.

Description

Technical Field

[0001] The present invention relates to a voltage monitoring circuit and a voltage monitoring method that compare a reference voltage and a monitored voltage and switch an output level based on the magnitude relationship between the reference voltage and the monitored voltage.

Background Art

[0002] Voltage monitoring circuits are described, for example, in Patent Document 1 and Patent Document 2. Patent Document 1 discloses an abnormality detection device that is provided for each battery block of a battery pack having a plurality of battery blocks, and includes a comparison unit that compares a threshold value with the block voltage of the battery block, and a control unit that controls the threshold value, and detects an abnormality in a plurality of voltage monitoring devices that monitor the block voltage based on the comparison result of the comparison unit. The abnormality detection device includes an acquisition unit, a determination unit, an output unit, and a detection unit. The acquisition unit acquires the block voltage. The determination unit determines the threshold value based on the block voltage. The output unit outputs an instruction signal instructing the signal level of the duty signal to the control unit so that a duty signal corresponding to the threshold value is output from the output terminal of the control unit. The detection unit detects an abnormality in the voltage monitoring device according to the comparison result by the comparison unit based on the threshold value.

[0003] Patent Document 2 describes a power supply voltage monitoring circuit including an abnormality detection unit and a voltage change unit. The abnormality detection unit detects a voltage corresponding to the power supply voltage and detects an abnormality in the power supply voltage based on the comparison result between the detected voltage and a reference voltage. The voltage change unit changes the detected voltage or the reference voltage to a voltage capable of detecting an abnormality within the abnormality detection range of the abnormality detection unit.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Patent Document 2

Summary of the Invention

[0005] A voltage monitoring circuit that compares a reference voltage with the monitored voltage and switches the output level ("H" level and "L" level) based on the magnitude of the two voltages will, for example, determine that there is an abnormality in the monitored voltage when the monitored voltage falls below the reference voltage and the output level switches from "H" level to "L" level. However, since the switching of the output level of the voltage monitoring circuit can also be caused by a malfunction in the voltage monitoring circuit, it is impossible to determine whether the switching of the output level of the voltage monitoring circuit was caused by a malfunction in the monitored voltage or by a malfunction in the voltage monitoring circuit. Adding a separate circuit to detect abnormalities in the voltage monitoring circuit would increase costs. Therefore, there is a need for a voltage monitoring circuit and a voltage monitoring method that can determine the normality or abnormality of the monitored voltage and the voltage monitoring circuit based on the output of the voltage monitoring circuit, without requiring a separate circuit to detect abnormalities in the voltage monitoring circuit. [Means for solving the problem]

[0006] (1) A first aspect of the present disclosure includes a reference voltage generation unit that generates a fluctuating reference voltage which periodically changes between a first reference voltage and a second reference voltage which is smaller than the first reference voltage, A comparison unit compares the fluctuating reference voltage with the monitored voltage and switches the output level based on the magnitude of the fluctuating reference voltage and the monitored voltage. This is a voltage monitoring circuit equipped with [a specific feature / feature]. (2) A second aspect of the present disclosure is that a switching element switches between a first reference voltage and a second reference voltage which is smaller than the first reference voltage, thereby inputting a periodically changing fluctuating reference voltage to the comparison unit. The comparison unit compares the fluctuating reference voltage with the monitored voltage and switches the output level based on the magnitude of the fluctuating reference voltage and the monitored voltage. This describes a method for monitoring voltage in a voltage monitoring circuit. [Effects of the Invention]

[0007] According to each aspect of this disclosure, it becomes possible to determine whether the monitored voltage and the voltage monitoring circuit are normal or abnormal based on the output of the voltage monitoring circuit, without having to provide a separate circuit for detecting abnormalities in the voltage monitoring circuit. [Brief explanation of the drawing]

[0008] [Figure 1] This is a block diagram showing a voltage monitoring circuit according to a first embodiment of the present disclosure. [Figure 2] This is a waveform diagram showing the operation of the voltage monitoring circuit of the first embodiment of this disclosure. [Figure 3] A comparative example of a voltage monitoring circuit. [Figure 4] This waveform diagram shows the operation of the voltage monitoring circuit in the comparative example. [Figure 5] This is a block diagram illustrating the failures that occur in the voltage monitoring circuit of the comparative example. [Figure 6] This waveform diagram shows the operation of the voltage monitoring circuit in the comparative example when a failure occurs in the voltage monitoring circuit of the comparative example. [Figure 7] This waveform diagram shows the operation of the voltage monitoring circuit in the comparative example when a failure occurs in the voltage monitoring circuit of the comparative example. [Figure 8] This is a block diagram illustrating a failure occurring in the voltage monitoring circuit of the first embodiment of the present disclosure. [Figure 9] This waveform diagram shows the operation of the voltage monitoring circuit of the first embodiment of this disclosure when a failure occurs in the voltage monitoring circuit of the first embodiment. [Figure 10] This waveform diagram shows the operation of the voltage monitoring circuit of the first embodiment of this disclosure when a failure occurs in the voltage monitoring circuit of the first embodiment. [Figure 11] A block diagram showing a voltage monitoring circuit according to a second embodiment of the present disclosure. [Figure 12] This is a waveform diagram showing the operation of the voltage monitoring circuit of the second embodiment of the present disclosure. [Figure 13] This is a block diagram showing a modified example of a voltage monitoring circuit according to a second embodiment of the present disclosure. [Figure 14]A block diagram showing the voltage monitoring circuit according to the third embodiment of the present disclosure. [Figure 15] A waveform diagram showing the operation of the voltage monitoring circuit according to the third embodiment of the present disclosure. [Figure 16] A waveform diagram showing the operation of the voltage monitoring circuit according to the first embodiment of the present disclosure when the reference voltage Vref1 is set to a value exceeding the upper limit of the fluctuation range of the monitored voltage Vx. [Figure 17] A waveform diagram showing the operation of the voltage monitoring circuit according to the first embodiment of the present disclosure when the reference voltage Vref2 is set to a value lower than the lower limit of the fluctuation range of the monitored voltage Vx.

Embodiments for Carrying Out the Invention

[0009] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. (First Embodiment) FIG. 1 is a block diagram showing the voltage monitoring circuit according to the first embodiment of the present disclosure. FIG. 2 is a waveform diagram showing the operation of the voltage monitoring circuit according to the first embodiment of the present disclosure. The voltage monitoring circuit 10 includes a reference voltage generation unit 10A and a comparison unit 10B. The reference voltage generation unit 10A includes a shunt regulator SR, resistors R1, R2, R3, and R4, and a MOS transistor Tr serving as a switch element. The comparison unit 20B includes a comparator (comparator) CP and a resistor R5. The comparison unit 20B switches the output level based on the magnitude relationship between the variable reference voltage and the monitored voltage, as will be described later.

[0010] The shunt regulator SR applies a voltage between the terminals at both ends of the resistors R1 and R2 connected in series such that the terminal of the resistor R2 is GND and the terminal of the resistor R1 is a constant voltage Vr. The terminal of the resistor R1 to which the constant voltage Vr is applied is connected to one terminal of the resistor R4. A voltage V1 is applied to the other terminal of the resistor R4. The connection point between the resistor R1 and the resistor R2 is connected to one terminal of the resistor R3 and the inverting input terminal (-) of the comparator CP. The other terminal of the resistor R3 is connected to the drain of the MOS transistor Tr. The source of the MOS transistor Tr is connected to GND. The MOS transistor Tr is turned on and off controlled by an oscillation signal input to the gate.

[0011] The variable reference voltage Vref input to the inverting input terminal (−) of the comparator CP periodically switches between the reference voltage Vref1 that becomes the first reference voltage and the reference voltage Vref2 that becomes the second reference voltage according to the on / off state of the MOS transistor Tr, and changes periodically. Specifically, when the MOS transistor Tr is in the off state, the reference voltage Vref1 is input to the inverting input terminal (−) of the comparator CP. The reference voltage Vref1 is a voltage generated by resistively dividing a constant voltage Vr with resistors R1 and R2. When the MOS transistor Tr is in the on state, the reference voltage Vref2 (Vref2 < Vref1) is input to the inverting input terminal (−) of the comparator CP. The reference voltage Vref2 is a voltage generated by resistively dividing a constant voltage Vr with resistor R1 and the combined resistance of resistors R2 and R3 connected in parallel. The reference voltage Vref1 and the reference voltage Vref2 are shown by Equation 1 (Equation 1 below). The reference voltage Vref1 and the reference voltage Vref2 are generated by changing the resistive division ratio of a constant voltage Vr.

Equation

[0012] The comparator CP compares the variable reference voltage Vref input to the inverting input terminal (−) with the monitored voltage Vx input to the non-inverting input terminal (+). One terminal of a resistor R5 is connected to the output side of the comparator CP, and a voltage V2 is applied to the other terminal of the resistor R5. An output voltage Vout is output from the comparator CP. As shown in FIG. 2, when the monitored voltage Vx is between the reference voltage Vref1 and the reference voltage Vref2 (Vref1 > Vx > Vref2), the output voltage Vout becomes a pulse waveform. When the monitored voltage Vx is greater than or equal to the reference voltage Vref1 (Vx ≧ Vref1), the output voltage Vout becomes a fixed voltage of the “H” level. When the monitored voltage Vx is less than or equal to the reference voltage Vref2 (Vx ≤ Vref2), the output voltage Vout becomes a fixed voltage at the "L" level (GND).

[0013] In this embodiment, the voltage monitoring circuit 10 operates such that when both the monitored voltage Vx and the voltage monitoring circuit are normal, the output voltage Vout becomes a pulse waveform, and when an abnormality occurs in the monitored voltage Vx or the voltage monitoring circuit itself, the output voltage Vout becomes a fixed voltage at the "H" level or "L" level.

[0014] The operation of the voltage monitoring circuit of this embodiment will be further explained below in comparison with a voltage monitoring circuit that does not include resistor R3 and MOS transistor Tr.

[0015] First, we will explain the operation of a voltage monitoring circuit without resistor R3 and MOS transistor Tr, which serves as a comparative example. Figure 3 is a block diagram showing a voltage monitoring circuit as an example. Figure 4 is a waveform diagram showing the operation of the voltage monitoring circuit as an example. The voltage monitoring circuit 20 shown in Figure 3 differs from the voltage monitoring circuit 10 shown in Figure 1 in that the reference voltage generation unit 10A shown in Figure 1 is replaced by a reference voltage generation unit 20A from which the resistor R3 and MOS transistor Tr have been removed, resulting in a fixed reference voltage VrefA. In the voltage monitoring circuit 20, the comparator CP compares the reference voltage VrefA with the voltage under monitoring Vx. If the voltage under monitoring Vx is greater than or equal to the reference voltage VrefA, the comparison unit 10B outputs an output voltage Vout at the "H" level. If the voltage under monitoring Vx is less than the reference voltage VrefA, the comparison unit 10B outputs an output voltage Vout at the "L" level (GND). If the output voltage Vout is at the "H" level, the voltage under monitoring Vx is determined to be normal; if it is at the "L" level (GND), the voltage under monitoring Vx is determined to be abnormal.

[0016] However, as explained below, if a fault occurs in the voltage monitoring circuit 20, even if the monitored voltage Vx falls below the reference voltage VrefA, the output voltage Vout may become "H" level, and the monitored voltage Vx may be judged as normal. As shown in Figure 5, a fault indicated by "×" in the figure may occur in the reference voltage generation unit 20A of the voltage monitoring circuit 20, causing the reference voltage VrefA to become reference voltage VrefB (VredB=0V). Figure 5 shows the case when an open circuit failure indicated by "×" occurs in the reference voltage generation unit 20A due to a mounting error or open circuit failure in resistors R1 and R4, or when a short circuit failure indicated by "×" occurs in resistor R2 due to a solder bridge. When the reference voltage VrefB is input to the inverting input terminal (-) of comparator CP, as shown in Figure 6, even if the monitored voltage Vx falls below the reference voltage VrefA that should be set, it remains above the reference voltage VrefB, so the output voltage Vout becomes "H" level, and the monitored voltage Vx is determined to be normal.

[0017] Furthermore, as shown in Figure 5, a fault indicated by "×" in the figure may occur in the comparison section 10B of the voltage monitoring circuit 20, causing the output voltage Vout to reach the "H" level. Figure 5 shows the case where a soldering defect occurs on the output side of the comparator CP of the comparison section 10B, resulting in an open circuit defect indicated by "×" in the figure. If an open-circuit failure occurs on the output side of comparator CP, as shown in Figure 7, the output voltage Vout will be at the "H" level regardless of the comparison result between the monitored voltage Vx and the reference voltage VrefA, and the monitored voltage Vx will be judged as normal.

[0018] Next, the operation of the voltage monitoring circuit in this embodiment will be described. In this embodiment, the voltage monitoring circuit 10 uses a fluctuating reference voltage Vref that periodically switches between reference voltage Vref1 and reference voltage Vref2 as the reference voltage. When the monitored voltage Vx is within the normal range and the voltage monitoring circuit is functioning correctly, the output voltage Vout is a pulse waveform. When the monitored voltage Vx is outside the normal range or there is a malfunction in the voltage monitoring circuit, the output voltage Vout becomes a fixed waveform, allowing detection of an abnormality in the monitored voltage Vx or the voltage monitoring circuit. This ensures the safe operation of the equipment.

[0019] Similar to the comparative example voltage monitoring circuit 20 shown in Figure 5, as shown in Figure 8, a fault indicated by "×" in the reference voltage generation unit 10A of the voltage monitoring circuit 10 may occur, causing the fluctuating reference voltage Vref to become 0V. Figure 8 shows the case when an open circuit failure indicated by "×" occurs in the reference voltage generation unit 10A due to a mounting error or open circuit failure in resistors R1 and R4, or when a short circuit failure indicated by "×" occurs in resistor R2 due to a solder bridge. If a fault occurs in the reference voltage generation unit 10A of the voltage monitoring circuit 10, as indicated by "×" in the figure, and the connection point between resistors R1 and R2 becomes 0V, then even if the MOS transistor Tr is switched on or off, 0V (GND) is applied to the inverting input terminal (-) of the comparator CP. As shown in Figure 9, the monitored voltage Vx exceeds 0V, so the output voltage Vout becomes a fixed voltage at the "H" level, and it is determined that the monitored voltage Vx is outside the normal range or that there is a malfunction in the voltage monitoring circuit.

[0020] Also, similar to the comparative example, as shown in Figure 8, a fault indicated by "×" in the comparison section 10B of the voltage monitoring circuit 10 may occur, causing the output voltage Vout to reach the "H" level. Figure 8 shows the case where a soldering defect occurs on the output side of the comparator CP of the comparison section 10B, resulting in an open circuit defect indicated by "×" in the figure. If an open-circuit failure occurs on the output side of comparator CP, as shown in Figure 10, the output voltage Vout becomes a fixed voltage at the "H" level regardless of the comparison result between the monitored voltage Vx and the fluctuating reference voltage Vref, and it is determined that the monitored voltage Vx is outside the normal range or that there is a problem with the voltage monitoring circuit.

[0021] If the voltage monitoring circuit 10 does not malfunction as indicated by the "×" in Figure 8, and the monitored voltage Vx falls below the reference voltage Vref2, the output voltage Vout becomes a fixed voltage at the "L" level, and it is determined that there is an abnormality in the monitored voltage Vx.

[0022] According to the voltage monitoring circuit of this embodiment described above, abnormalities in the monitored voltage Vx or the voltage monitoring circuit can be detected, and the safe operation of the equipment can be guaranteed. In the voltage monitoring circuit of this embodiment, by adding resistors and switching elements and utilizing a square wave from a switching power supply or the like as the oscillation waveform, periodic changes in two reference voltages Vref1 and Vref2 can be realized. Therefore, the comparison between the monitored voltage Vx and the two reference voltages Vref1 and Vref2 can be achieved with a single comparator. The voltage monitoring circuit of this embodiment has the advantage of reducing the number of comparators used, which can be a source of failure, compared to the case where the comparison between the monitored voltage Vx and the two reference voltages Vref1 and Vref2 is performed using two comparators. Furthermore, the normal operation of the voltage monitoring circuit can be confirmed without adding any additional circuits to verify the normal operation of the voltage monitoring circuit.

[0023] (Second Embodiment) In the first embodiment, the voltage monitoring circuit 10 operates such that the output voltage Vout becomes a pulse waveform when both the monitored voltage Vx and the voltage monitoring circuit are normal, and the output voltage Vout becomes a fixed voltage of "H" level or "L" level when an abnormality occurs in the monitored voltage Vx or the voltage monitoring circuit. The voltage monitoring circuit of this embodiment includes a determination circuit that determines whether the output voltage Vout is a pulse waveform or a fixed voltage.

[0024] Figure 11 is a block diagram showing a voltage monitoring circuit according to a second embodiment of the present disclosure. The voltage monitoring circuit 11 of this embodiment includes a determination circuit 10C after the comparison section 10B of the voltage monitoring circuit 10 shown in Figure 1. The determination circuit 10C determines whether the output voltage Vout is a pulse waveform or a fixed voltage. The determination circuit 10C includes an AC coupling capacitor C1, a diode D, a resistor R6, and a smoothing capacitor C2. One terminal of the AC coupling capacitor C1 is connected to the output terminal of the comparator CP and one terminal of the resistor R5, while the other terminal is connected to the anode terminal of the diode D. The cathode terminal of diode D is connected to one terminal of resistor R6 and one terminal of smoothing capacitor C2. The other terminal of resistor R6 and the other terminal of smoothing capacitor C2 are connected to GND.

[0025] The AC coupling capacitor C1 allows current to flow when there is a change in the output voltage Vout, and the diode D allows current to flow when the potential at the anode terminal reaches the "H" level. When the output voltage Vout becomes a pulse waveform and changes from GND to a "H" level, current flows through the AC coupling capacitor C1 and diode D, causing the voltage at one terminal of the smoothing capacitor C2 to rise to a "H" level. When the output voltage Vout is a fixed voltage, no current flows through the AC coupling capacitor C1, so one terminal of the smoothing capacitor C2 becomes GND via resistor R6.

[0026] As shown in Figure 12, when both the monitored voltage Vx and the voltage monitoring circuit are normal, the output voltage Vout will be a pulse waveform. If an abnormality occurs in the monitored voltage Vx or the voltage monitoring circuit itself, the output voltage Vout will be a fixed voltage at either the "H" or "L" level. Therefore, the judgment signal Vsig output from one terminal of the smoothing capacitor C2 will be at the "H" level when both the monitored voltage Vx and the voltage monitoring circuit are normal, and will be GND when an abnormality occurs in the monitored voltage Vx or the voltage monitoring circuit itself.

[0027] (Variation of the judgment circuit) The determination circuit is not limited to the configuration of the determination circuit 10C shown in Figure 11, and may have other configurations. Figure 13 is a block diagram showing a modified example of the voltage monitoring circuit of the second embodiment of this disclosure. The voltage monitoring circuit 12 of this embodiment includes a determination circuit 10D in place of the determination circuit 10C of the voltage monitoring circuit 11 shown in Figure 11. The judgment circuit 10D is equipped with a counter IC 100. The counter IC 100 counts the pulses of the input output voltage Vout and resets when no more pulses are input. The judgment signal Vsig output from the counter IC 100 has the same waveform as the judgment signal Vsig shown in Figure 12.

[0028] (Third embodiment) In the first embodiment, the voltage monitoring circuit 10 was described in an example in which the voltage to be monitored Vx and the fluctuating reference voltage Vref are input to the comparator CP. In this embodiment, the voltage monitoring circuit 13 inputs two different voltages to be monitored to the non-inverting input terminals (+) of the two comparators, and inputs a common fluctuating reference voltage Vref to the inverting input terminals (-) of the two comparators.

[0029] Figure 14 is a block diagram showing a voltage monitoring circuit according to a third embodiment of the present disclosure. Figure 15 is a waveform diagram showing the operation of the voltage monitoring circuit according to a third embodiment of the present disclosure. In the voltage monitoring circuit 13 of Figure 14, components identical to those in the voltage monitoring circuit 10 of Figure 1 are denoted by the same reference numerals and their descriptions are omitted. The voltage monitoring circuit 13 of this embodiment includes a reference voltage generation unit 10A, a comparison unit 13B, and a voltage to be monitored generation unit 13C.

[0030] The comparison unit 13B comprises a first comparison unit equipped with a comparator CP1 and a resistor R11, and a second comparison unit equipped with a comparator CP2 and a resistor R12. The monitored voltage generation unit 13C includes resistors R7 and R8 for generating the monitored voltage Vx1, and resistors R9 and R10 for generating the monitored voltage Vx2. The monitored voltage Vx1 is the voltage generated by dividing the monitored voltage Vx3 between resistors R7 and R8. The monitored voltage Vx2 is the voltage generated by dividing the monitored voltage Vx4 between resistors R9 and R10. The voltage monitoring circuit 13 inputs the monitored voltage Vx1 and the monitored voltage Vx2 to the non-inverting input terminal (+) of comparator CP1 and the non-inverting input terminal (+) of comparator CP2, respectively, and inputs a common fluctuating reference voltage Vref to the inverting input terminal (-) of comparator CP1 and the inverting input terminal (-) of comparator CP2. Comparator CP1 compares the fluctuating reference voltage Vref input to the inverting input terminal (-) with the monitored voltage Vx1 input to the non-inverting input terminal (+). Comparator CP2 compares the fluctuating reference voltage Vref input to the inverting input terminal (-) with the monitored voltage Vx2 input to the non-inverting input terminal (+). One terminal of resistor R11 is connected to the output side of comparator CP1, and voltage V2 is applied to the other terminal of resistor R11. One terminal of resistor R12 is connected to the output side of comparator CP2, and voltage V2 is applied to the other terminal of resistor R12. The comparators CP1 and CP2 output the output voltages Vout1 and Vout2, respectively.

[0031] As shown in Figure 15, when the monitored voltage Vx1 is between the reference voltage Vref1 and the reference voltage Vref2 (Vref1 > Vx1 > Vref2), the output voltage Vout1 will have a pulse waveform. When the monitored voltage Vx1 is greater than or equal to the reference voltage Vref1 (Vx1 ≥ Vref1), the output voltage Vout1 becomes a fixed voltage at the "H" level. When the monitored voltage Vx1 is less than or equal to the reference voltage Vref2 (Vx1 ≤ Vref2), the output voltage Vout1 becomes a fixed voltage at the "L" level (GND).

[0032] Furthermore, as shown in Figure 15, when the monitored voltage Vx2 is between the reference voltage Vref1 and the reference voltage Vref2 (Vref1 > Vx2 > Vref2), the output voltage Vout2 will have a pulse waveform. When the monitored voltage Vx2 is greater than or equal to the reference voltage Vref1 (Vx2 ≥ Vref1), the output voltage Vout2 becomes a fixed voltage at the "H" level. When the monitored voltage Vx2 is less than or equal to the reference voltage Vref2 (Vx2 ≤ Vref2), the output voltage Vout2 becomes a fixed voltage at the "L" level (GND).

[0033] In this embodiment, for the voltage monitoring circuit 13 to input a common variable reference voltage Vref to the inverting input terminal (-) of the comparator CP1 and the inverting input terminal (-) of the comparator CP2, only one reference voltage generation unit needs to be provided. Compared with the case where two reference voltage generation units are provided to input the reference voltage to the comparator CP1 and the comparator CP2, the number of components can be reduced.

[0034] The above-described embodiment is a preferred embodiment of the present invention. However, the scope of the present invention is not limited to only the above embodiment, and it can be implemented in various modified forms without departing from the gist of the present invention.

[0035] For example, in the above-described embodiment, two thresholds, i.e., the reference voltage Vref1 and the reference voltage Vref2, are provided as the thresholds of the variable reference voltage Vref and compared with the monitored voltage Vx. However, either the reference voltage Vref1 or the reference voltage Vref2 may be used as the threshold. When the reference voltage Vref1 is set to a value exceeding the upper limit of the fluctuation range of the monitored voltage Vx, the reference voltage Vref2 becomes the threshold. FIG. 16 is a waveform diagram showing the operation of the voltage monitoring circuit of the first embodiment of the present disclosure when the reference voltage Vref1 is set to a value exceeding the upper limit of the fluctuation range of the monitored voltage Vx. As shown in FIG. 16, in the region where Vx > Vref2, the output voltage Vout becomes a pulse waveform, and when the monitored voltage Vx is less than or equal to the reference voltage Vref2, it becomes GND.

[0036] Also, when the reference voltage Vref2 is set to a value lower than the lower limit of the fluctuation range of the monitored voltage Vx, the reference voltage Vref1 becomes the threshold. It is a waveform diagram showing the operation of the voltage monitoring circuit of the first embodiment of the present disclosure when the threshold of the reference voltage is set to the reference voltage Vref1. As shown in FIG. 17, in the region where Vx < Vref1, the output voltage Vout becomes a pulse waveform, and when the monitored voltage Vx is less than or equal to the reference voltage Vref1, it becomes the "H" level.

[0037] The voltage monitoring circuit and voltage monitoring method according to this disclosure can take various forms, including the embodiments described above, having the following configurations. (1) A reference voltage generation unit (for example, a reference voltage generation unit 10A) that generates a fluctuating reference voltage that periodically changes between a first reference voltage and a second reference voltage that is smaller than the first reference voltage, A comparison unit (for example, comparison unit 10B) compares the fluctuating reference voltage with the monitored voltage and switches the output level based on the magnitude of the fluctuating reference voltage and the monitored voltage, A voltage monitoring circuit equipped with (for example, voltage monitoring circuits 10, 11, 12, or 13). This power supply monitoring circuit eliminates the need to provide a separate circuit for detecting abnormalities in the voltage monitoring circuit. Instead, the output of the voltage monitoring circuit allows for the determination of whether the monitored voltage and the voltage monitoring circuit are normal or abnormal.

[0038] (2) The voltage monitoring circuit described in (1) above, wherein the reference voltage generation unit generates the first reference voltage and the second reference voltage by changing the resistance division ratio of a constant voltage.

[0039] (3) The reference voltage generation unit is: The first resistor (for example, resistor R1) and A second resistor (e.g., resistor R2) is connected in series with the first resistor, The device comprises a third resistor (e.g., resistor R3) to which the connection point between the first resistor and the second resistor is connected, and a switch element (e.g., MOS transistor Tr) to which the other terminal of the third resistor is connected. By turning off the aforementioned switch element and dividing the constant voltage between the first resistor and the second resistor, the first reference voltage is generated. The voltage monitoring circuit according to (2) above, wherein the switch element is turned on and the constant voltage is divided by the first resistor and the combined resistor obtained by connecting the second resistor and the third resistor in parallel to generate the second reference voltage.

[0040] (4) The voltage monitoring circuit according to any of (1) to (3) above, wherein the comparison unit comprises a plurality of comparators (for example, comparators CP1 and CP2) to which a plurality of voltages to be monitored are input, and a common fluctuating reference voltage is input to the plurality of comparators.

[0041] (5) The comparison unit is connected to the determination circuit, The determination circuit (for example, determination circuit 10C or 10D) determines that the monitored voltage is normal when a pulse waveform voltage is output from the comparison unit, and determines that there is an abnormality in at least one of the monitored voltage and the voltage monitoring circuit when a fixed voltage is output, as described in any of (1) to (3) above.

[0042] (6) A switching element (for example, a MOS transistor Tr) switches between a first reference voltage and a second reference voltage that is smaller than the first reference voltage, thereby inputting a periodically changing fluctuating reference voltage to the comparison unit (for example, comparison unit 10B). The comparison unit compares the fluctuating reference voltage with the monitored voltage and switches the output level based on the magnitude of the fluctuating reference voltage and the monitored voltage. A method for monitoring the voltage of a voltage monitoring circuit (for example, voltage monitoring circuits 10, 11, 12, or 13). According to this power supply monitoring method, it is possible to determine whether the monitored voltage and the voltage monitoring circuit are normal or abnormal based on the output of the voltage monitoring circuit, without having to provide a separate circuit to detect abnormalities in the voltage monitoring circuit. [Explanation of Symbols]

[0043] 10, 11, 12, 13 Voltage monitoring circuit 10A Reference Voltage Generation Unit SR Shunt Regulator R1, R2, R3, R4 resistance Tr MOS transistor 10B, 13B comparison section CP, CP1, CP2 comparators R5 resistance 10C, 10D judgment circuit 13C Monitored Voltage Generation Unit

Claims

1. A reference voltage generation unit that generates a fluctuating reference voltage that periodically changes between a first reference voltage and a second reference voltage that is smaller than the first reference voltage, A comparison unit compares the periodically changing fluctuating reference voltage with the monitored voltage and switches the output level based on the magnitude of the periodic changing fluctuating reference voltage and the monitored voltage. A voltage monitoring circuit equipped with, The comparison unit is connected to the determination circuit. The determination circuit determines that the monitored voltage is normal when a pulse waveform voltage is output from the comparison unit, and determines that there is an abnormality in at least one of the monitored voltage and the voltage monitoring circuit when a fixed voltage is output.

2. The voltage monitoring circuit according to claim 1, wherein the reference voltage generation unit generates the first reference voltage and the second reference voltage by changing the resistance division ratio of a constant voltage.

3. The aforementioned reference voltage generation unit is The first resistance and, A second resistor connected in series with the first resistor, The device comprises a third resistor to which the connection point between the first resistor and the second resistor is connected to one terminal, and a switch element to which the other terminal of the third resistor is connected. By turning off the aforementioned switch element and dividing the constant voltage between the first resistor and the second resistor, the first reference voltage is generated. The voltage monitoring circuit according to claim 2, wherein the switch element is turned on, and the constant voltage is divided by the first resistor and the combined resistance obtained by connecting the second resistor and the third resistor in parallel to generate the second reference voltage.

4. The voltage monitoring circuit according to any one of claims 1 to 3, wherein the comparison unit comprises a plurality of comparators, each receiving a plurality of voltages to be monitored, and a commonly occurring fluctuating reference voltage is input to the plurality of comparators.

5. The switching element switches between a first reference voltage and a second reference voltage that is smaller than the first reference voltage, thereby inputting a fluctuating reference voltage that periodically changes between the first reference voltage and the second reference voltage to the comparison unit. The comparison unit compares the periodically changing fluctuating reference voltage with the monitored voltage and switches the output level based on the magnitude of the periodic changing fluctuating reference voltage and the monitored voltage. A method for monitoring the voltage of a voltage monitoring circuit, A voltage monitoring method for a voltage monitoring circuit, wherein when a pulse waveform voltage is output from the comparison unit, the monitored voltage is determined to be normal, and when a fixed voltage is output, the monitored voltage and the voltage monitoring circuit are determined to be abnormal.

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