Power control of multiple power converters

Abstract

The present disclosure relates to a method for power control of a plurality of power converters constituting a common power converter, the method including: determining a number of power converters to shut down among the plurality of power converters based on at least one load condition of the common power converter; and shutting down the determined number of power converters among the plurality of power converters. The present disclosure also relates to a corresponding apparatus for power control.

Description

[Technical Field]

[0001] background This disclosure relates to a power control method and a power control device for multiple power converters. [Background technology]

[0002] Solid-state transformers (SSTs) are controllable power converters widely used in applications with various load conditions. In some applications, such as data centers and EV charging stations, SSTs require a wide power and voltage range. For example, an SST designed to transmit full power may be required by the load to transmit only a fraction of its designed power, i.e., 30% of its designed power.

[0003] A power converter that transmits less power than the designed total power may not achieve the highest power efficiency. Power efficiency varies as a function of the power-to-voltage ratio transmitted between the power converter's output and input. When a converter transmits less power than the designed total power, power efficiency drops significantly. For example, an exemplary converter transmitting the designed total power achieves 98% efficiency, while an exemplary converter transmitting one-quarter of the designed total power achieves 82% efficiency.

[0004] Therefore, there is a need to improve the power transmission efficiency when power converters transmit a lower power level than the total power for which they are designed. [Overview of the project] [Means for solving the problem]

[0005] This disclosure relates to a method for controlling the power of multiple power converters. The various exemplary embodiments of the Disclosure disclosed herein are intended to provide features that will be readily apparent by referring to the following description in conjunction with the accompanying drawings. Exemplary systems, methods, and devices are disclosed herein according to various embodiments. However, it should be understood that these embodiments are presented as examples and not as limitations, and it will be apparent to those skilled in the art who have read this disclosure that various modifications to the disclosed embodiments can be made while remaining within the scope of this disclosure.

[0006] Therefore, this disclosure is not limited to the exemplary embodiments and uses described and illustrated herein. Furthermore, the particular order and / or hierarchy of things in the methods disclosed herein is merely illustrative. Based on design preferences, the particular order or hierarchy of things in the disclosed methods or processes can be rearranged while remaining within the scope of this disclosure. Accordingly, those skilled in the art will understand that the methods and techniques disclosed herein present a variety of things or operations in a sample order, and that this disclosure is not limited to the specific order or hierarchy presented unless otherwise specified.

[0007] The above and other aspects and embodiments thereof will be described in more detail in the drawings, description and claims.

[0008] Description of the drawing [Brief explanation of the drawing]

[0009] [Figure 1a] A flowchart according to an embodiment of this disclosure is shown. [Figure 1b] A flowchart according to an embodiment of this disclosure is shown. [Figure 2] This disclosure shows an exemplary set of power converters according to one embodiment, in particular, in which the set of power converters are interconnected in a series-input parallel-output topology to form a common converter. [Figure 3a] This disclosure illustrates various exemplary power converter topological configurations according to embodiments of this disclosure. [Figure 3b] This disclosure illustrates various exemplary power converter topological configurations according to embodiments of this disclosure. [Figure 3c] This disclosure illustrates various exemplary power converter topological configurations according to embodiments of this disclosure. [Figure 4] This disclosure shows an exemplary power converter architecture of multiple power converters, particularly a dual active bridge (DAB) power converter, according to one embodiment of this disclosure. [Figure 5] In particular, Figures 1b and 2 show exemplary operating states of multiple power converters according to one embodiment of the present disclosure. [Figure 6] This shows exemplary simulation results of the power transmission efficiency of multiple power converters with respect to the transmission power and voltage ratio of multiple power converters. [Figure 7] An exemplary controller and a plurality of power converters interconnected in a series-input, parallel-output topology are shown, with each of the power converters comprising a converter controller. [Modes for carrying out the invention]

[0010] The following describes exemplary embodiments of this disclosure. Note that some aspects of any one of the embodiments described may also be found in several other embodiments unless otherwise specified or evident. However, for the sake of clarity, each aspect is described in detail only when first mentioned, and repeated descriptions of the same aspect are omitted.

[0011] This disclosure provides a power control method for a plurality of power converters constituting a common power converter, the method comprising: determining the number of power converters to be shut down from the plurality of power converters based on at least one load state of the common power converter; and shutting down the determined number of power converters from the plurality of power converters.

[0012] According to one embodiment, at least one load state at the input or output of a common power converter is at least one of the transmitted power of the common power converter or the voltage ratio of at least one common power converter. In particular, determining the number of power converters is based on the transmitted power of the common power converter and the voltage ratio of at least one common power converter.

[0013] According to one embodiment, the method further includes, after a set period, particularly after at least one duty cycle of a common power converter, and more specifically after one duty cycle of a common power converter, replacing at least one of the power converters that are stopped with at least one other power converter among a plurality of power converters that are not stopped. According to one embodiment, the replacement may be performed later. According to one embodiment, the replacement is performed simultaneously.

[0014] According to one embodiment, the method further includes, after a set period, particularly after at least one duty cycle of a common power transformer, and more specifically after one duty cycle of a common power converter, restarting at least one of the replaced power converters. According to one embodiment, the replacement and restart may be performed later. According to one embodiment, the replacement and restart may be performed simultaneously.

[0015] According to one embodiment, the set period is an external reference clock. According to one embodiment, the set period is an asynchronous or event-driven clock.

[0016] According to one embodiment, the method further includes monitoring at least one load state, repeatedly determining the number of power converters to be stopped among a plurality of power converters based on the monitored at least one load state of the common power converter, and repeatedly stopping the determined number of power converters among the plurality of power converters.

[0017] According to one embodiment, the plurality of converters consist of solid-state converters or comprises solid-state converters.

[0018] According to one embodiment, the plurality of converters comprises at least one of the following: a half-bridge converter, a full-bridge converter, a matrix converter, a neutral point clamp type converter, a flying capacitor converter, a cascaded H-bridge converter, or a modular multilevel converter.

[0019] According to one embodiment, the plurality of converters is an isolated DC / DC converter comprising a DC / DC converter, in particular an AC / DC rectifier, a medium-frequency transformer, and a DC / AC inverter.

[0020] According to one embodiment, the plurality of converters are arranged such that the common converter has at least one of the following: a series input and a parallel output, a series input and a series output, or a parallel input and a parallel output.

[0021] According to one embodiment, the shutdown of a determined number of power converters is performed by generating a zero AC or DC voltage within half a cycle of the resonant cycle of the power converters to be shut down.

[0022] According to one embodiment, the shutdown of a determined number of power converters is performed by generating a zero AC voltage or DC voltage within half a cycle of the AC cycle of the power converters to be shut down.

[0023] The disclosure also relates to a controller for power control of a plurality of power converters, wherein the system controller includes a processor configured to determine the number of power converters to be shut down from the plurality of power converters based on the load state of at least one common power converter, and to shut down the determined number of power converters from the plurality of power converters.

[0024] According to one embodiment, at least one load state at the input or output of a common power converter is at least one of the transmission power of the common power converter or the voltage ratio of at least one common power converter, in particular determining the number of power converters is based on the transmission power of the common power converter and the voltage ratio of at least one common power converter.

[0025] According to one embodiment, the processor is configured to replace at least one of the stopped power converters with at least one other power converter from a plurality of power converters that are not stopped, after a set period, particularly after at least one duty cycle of a common power converter, more specifically after one duty cycle of a common power converter. According to one embodiment, the replacement may be performed later. According to one embodiment, the replacement is performed simultaneously.

[0026] According to one embodiment, the processor is configured to restart at least one replaced power converter after a set period, particularly after at least one duty cycle of a common power transformer, and more specifically after one duty cycle of a common power converter. According to one embodiment, the replacement and restart may be performed later. According to one embodiment, the replacement and restart may be performed simultaneously.

[0027] According to one embodiment, the setting period is an external reference clock. According to one embodiment, the setting period is an asynchronous or event-driven clock.

[0028] According to one embodiment, the controller is configured to monitor at least one load state, and the processor is configured to repeatedly determine the number of power converters to shut down from a plurality of power converters based on the monitored at least one load state of a common power converter, and to repeatedly shut down the determined number of power converters from the plurality of power converters. It will be understood by those skilled in the art that monitoring can be performed by each input signal input to the controller.

[0029] According to one embodiment, the plurality of converters consist of solid-state converters or comprises solid-state converters.

[0030] According to one embodiment, the plurality of converters comprises at least one of the following: a half-bridge converter, a full-bridge converter, a matrix converter, a neutral point clamp type converter, a flying capacitor converter, a cascaded H-bridge converter, or a modular multilevel converter.

[0031] According to one embodiment, the plurality of converters is an isolated DC / DC converter comprising a DC / DC converter, in particular an AC / DC rectifier, a medium-frequency transformer, and a DC / AC inverter.

[0032] According to one embodiment, the plurality of converters are arranged such that the common converter has at least one of the following: a series input and a parallel output, a series input and a series output, or a parallel input and a parallel output.

[0033] According to one embodiment, the processor is configured to shut down a determined number of power converters by generating a zero AC voltage or DC voltage within half a cycle of the resonant cycle of the power converters to be shut down.

[0034] According to one embodiment, the processor is configured to shut down a determined number of power converters by generating a zero AC voltage or DC voltage within half a cycle of the AC cycle of the power converters to be shut down.

[0035] The disclosure also relates to a system comprising a controller according to any one of the embodiments described above, and a plurality of power converters for performing a power control method for a plurality of power converters according to any one of the embodiments described above.

[0036] Figures 1a and 1b show flowcharts according to embodiments of the present disclosure. In particular, in the embodiment shown in Figure 1a, the number of power converters to be shut down from among a plurality of power converters is determined based on at least one load state of a common power converter (101). Next, the determined number of power converters from among the plurality of power converters are shut down (102).

[0037] In the embodiment shown in Figure 1b, the number of power converters to be shut down from among multiple power converters is determined based on the load state of at least one common power converter (151). At least one of the shut-down power converters is replaced with at least one other power converter from among multiple power converters that are not shut down after the set period (152). The determined number of power converters from among the multiple power converters are shut down (153). At least one replaced power converter is restarted after the set period (154). Note that replacement, shutdown, and restart may be performed later or simultaneously.

[0038] In the embodiment shown in Figure 1b, the term "exchange" is not limited to a one-to-one correspondence between power converters. That is, the number of at least one power converters that are shut down may be the same as or different from the number of at least one power converters being replaced.

[0039] In the embodiment shown in Figure 1b, the term "exchange" specifically refers to determining which combination of power converters from among several power converters should be started and which should be stopped.

[0040] According to one embodiment, the number of power converters to be stopped is an integer, greater than or equal to 0, especially greater than 1, and less than the number of power converters.

[0041] According to one embodiment, the setting period is after at least one duty cycle of the common power, more specifically, after one duty cycle of the common power converter. According to one embodiment, the setting period is an external reference clock.

[0042] According to one embodiment, the setting period is an asynchronous or event-driven clock. According to one embodiment, at least one load state of a common power converter is at least one of the transmitted power at the input or output of the common power converter or the voltage ratio of at least one common power converter, in particular determining the number of power converters is based on the transmitted power of the common power converter and the voltage ratio of at least one common power converter.

[0043] According to one embodiment, the method further includes, after a set period, particularly after at least one duty cycle of a common power converter, more specifically after one duty cycle of a common power converter, replacing at least one of the stopped power converters with at least one other power converter from a plurality of power converters that are not stopped, and restarting at least one replaced power converter.

[0044] According to one embodiment, the method further includes monitoring at least one load condition, repeatedly determining the number of power converters to be shut down from a plurality of power converters based on the monitored at least one load condition of a common power converter, and repeatedly shutting down the determined number of power converters from the plurality of power converters.

[0045] In the embodiment shown in Figure 2, four power converters 211-214 are interconnected in a series input and parallel output topology, and the four interconnected power converters 211-214 form a common power converter 200. The input voltage 201 of the common converter is converted to the output voltage 202 of the common converter via the common converter 200.

[0046] Those skilled in the art will understand that the common converter 200 can be used in reverse mode; that is, it can convert the voltage at the output to the voltage at the input.

[0047] According to one embodiment, the plurality of converters consist of solid-state converters or comprises solid-state converters.

[0048] According to one embodiment, the plurality of converters comprises at least one of the following: a half-bridge converter, a full-bridge converter, a matrix converter, a neutral point clamp type converter, a flying capacitor converter, a cascaded H-bridge converter, or a modular multilevel converter.

[0049] According to one embodiment, the plurality of converters is an isolated DC / DC converter comprising a DC / DC converter, in particular an AC / DC rectifier, a medium-frequency transformer, and a DC / AC inverter.

[0050] According to one embodiment, the plurality of converters are arranged such that the common converter has at least one of the following: a series input and a parallel output, a series input and a series output, or a parallel input and a parallel output.

[0051] Figures 3a, 3b, and 3c illustrate exemplary power converters in various topological configurations according to embodiments of the present disclosure. The n power converters 311 to 31n shown in Figure 3a are interconnected in a series-input parallel-output topology, and the interconnected power converters form a DC / DC common converter. Each of the n power converters 311 to 31n comprises a DC / AC inverter 351, a transformer 352, and an AC / DC rectifier 353.

[0052] The n power converters 321 to 32n shown in Figure 3b are interconnected in a series input / series output topology, and the interconnected power converters form a DC / DC common converter. Each of the n power converters 321 to 32n is equipped with a DC / AC inverter 361, a transformer 362, and an AC / DC rectifier 363. The n power converters 331 to 33n shown in Figure 3c are interconnected in a parallel input / parallel output topology, and the interconnected power converters form a DC / DC common converter. Each of the n power converters 331 to 33n is equipped with a DC / AC inverter 371, a transformer 372, and an AC / DC rectifier 373.

[0053] Figure 4 shows an exemplary power converter architecture of a dual active bridge (DAB) power converter, more specifically, a converter transformer 410, a primary full bridge 420 at the input, and a secondary full bridge 430 at the output, among a plurality of power converters. The transformer 410 is connected to both the primary full bridge 420 and the secondary bridge 430. The primary full bridge 420 includes four diodes D1 - D4 connected in parallel to four insulated gate bipolar transistors (IGBTs) Q1 - Q4 respectively to form the full bridge. The primary full bridge 420 is connected to the input capacitor 440. The secondary full bridge 430 includes four diodes D5 - D8 connected in parallel to four IGBTs Q5 - Q8 respectively to form the full bridge. The secondary full bridge 430 is connected to the output capacitor 450. In the embodiment shown in FIG. 5, the four operating states 511 - 514 represent the operating states of the respective power converters 211 - 214 of the embodiment shown in FIG. 2 and follow the method of the embodiment shown in FIG. 1b. t o During the time instance up to t, the number of power converters to be stopped among the plurality of power converters is determined based on at least one load state at the input or output of the common power converter 200. In the exemplary embodiment shown in FIG. 5, the number of power converters to be stopped is 2 for the time range t o _ < t < t1. At t o , the third power converter 213 and the fourth power converter 214 are stopped, and the first power converter 211 and the second power converter 212 are started. Similarly, during the time range t o _ < t < t1, based on at least one load state at the input or output of the common power converter 200, the number of power converters to be stopped for the subsequent time range t1_ < t < t2 is determined to be 2 in this exemplary embodiment. The time range t oThe third power converter 213 that is stopped between t < t1 is replaced with the first power converter 211. At t1, the second power converter 212 and the third power converter 213 are stopped, and the replaced third power converter 213 is restarted. Here too, based on at least one load state at the input or output of the common power converter 200 during the time range t1 < t < t2, the number of power converters to be stopped during the next time range t2 < t < t3 is determined to be 3 in this exemplary embodiment. The first power converter 211 and the fourth power converter 214 that are stopped during the time range t1 < t < t2 are replaced with the second power converter 212. At t2, the second power converter 212 is stopped, and the replaced first power converter 211 and the third power converter 214 are restarted.

[0054] It will be understood by those skilled in the art that at least one activated power converter contributes to the power transmission of the common power converter, and the stopped power converter does not contribute to the power transmission of the common power converter. That is, as a result of the activation and stop of the power converter, the power transmission of the common power converter changes.

[0055] According to one embodiment, replacing at least one stopped power converter among a plurality of power converters with at least one activated power converter among the plurality of power converters after a set period can activate and stop any possible combination of the plurality of power converters.

[0056] According to one embodiment, the method further includes restarting at least one replaced power converter after a set period, particularly after at least one duty cycle of the common power converter, and more specifically after one duty cycle of the common power converter.

[0057] According to one embodiment, the stopping of the determined number of power converters is performed by generating a zero AC voltage or DC voltage within a half cycle of the resonance cycle of the power converter to be stopped.

[0058] According to one embodiment, the shutdown of a determined number of power converters is performed by generating a zero AC voltage or a DC voltage within a half cycle of the AC cycle of the power converter to be shut down.

[0059] According to one embodiment of the present disclosure, the number of power converters to be shut down can be calculated as follows.

[0060]

Equation

[0061] Here, n deact and n pc respectively represent the number of cells / power converters to be shut down and the total number of power converters, and P com 、P op , and Pη opt respectively represent the total transmissible power of a common power converter, the operating power of a common power converter, and the optimal power of a common power converter when the power transmission efficiency of the common power converter is the highest.

[0062] According to one embodiment of the present disclosure, the power transmission efficiency of a power converter is a function of the voltage ratio and the transmitted power of the power converter.

[0063] According to one embodiment of the present disclosure, the voltage ratio of a power converter, particularly an insulated power converter equipped with a transformer, can be calculated as follows. <​​​​​​​​​​​​​​​​​​​​​opt This is calculated based on the power transmission efficiency of the power converter.

[0067] Figure 6 shows exemplary simulation results of the power transmission efficiency of multiple power converters with respect to the transmitted power and voltage ratio of multiple power converters according to one embodiment of the present disclosure. The power transmission of the multiple power converters shown in Figure 6 is equivalent to the power transmission of a common power converter formed by the multiple power converters. The multiple power converters used in the simulation are silicon insulated gate bipolar transistor (Si-IGBT) based dual active bridge (DAB) power converters, each comprising a transformer having the same turns ratio. Voltage ratios d=0.8, d=1.0, and d=1.1 are calculated by equation (2) and correspond to power transmission efficiency curves 611 to 613, respectively. Power transmission efficiency curves 611 to 613 show that the power transmission efficiency of the multiple power converters decreases as the transmitted power decreases. The optimal power at which the power transmission efficiency is highest can be calculated based on the power transmission efficiency curves 611 to 613 for each voltage ratio.

[0068] It will be understood by those skilled in the art that the types or combinations of power converters are not limited to SI-IGBT-based DAB power converters.

[0069] Figure 7 shows an exemplary converter and a plurality of power converters interconnected in a series-input parallel-output topology, each of which power converters includes a converter controller. The n power converters 711 to 71n shown in Figure 7 are interconnected in a series-input parallel-output topology, and the interconnected plurality of power converters form a DC / DC common converter. Each of the n power converters 711 to 71n includes a DC / AC inverter, a transformer, an AC / DC rectifier, and its respective converter controller 721 to 72n. Controller 730 controls each of the converter controllers 721 to 72n, and the converter controllers control their respective power converters to start, stop, and restart them.

[0070] Those skilled in the art will understand that the converter controllers 721-72n may be implemented as part of the controller 730.

[0071] While various embodiments of this disclosure have been described above, it should be understood that they are presented only as examples and not as limitations. Similarly, various figures may illustrate exemplary architectures or configurations provided to enable those skilled in the art to understand the exemplary features and functions of this disclosure. However, such those skilled in the art will understand that this disclosure is not limited to the illustrated exemplary architectures or configurations and can be implemented using various alternative architectures and configurations. Furthermore, as will be understood by those skilled in the art, one or more features of one embodiment can be combined with one or more features of another embodiment described herein. Therefore, the breadth and scope of this disclosure should not be limited by any of the exemplary embodiments described above.

[0072] Furthermore, it should be understood that any reference to elements in this specification using designations such as “first,” “second,” etc., does not generally limit the quantity or order of those elements. Rather, these names can be used in this specification as a convenient means of distinguishing two or more elements or examples of elements. Thus, references to first and second elements do not mean that only two elements can be used, or that the first element must in some way precede the second element.

[0073] Furthermore, those skilled in the art will understand that information and signals can be represented using any of the various different techniques and methods. For example, data, instructions, commands, information, signals, bits, and symbols that can be mentioned throughout the above description can be represented by voltage, electric current, electromagnetic waves, magnetic fields or particles, optical fields or particles, or any combination thereof.

[0074] Those skilled in the art will further understand that any of the various exemplary logic blocks, units, processors, means, circuits, methods, and functions described in relation to the embodiments disclosed herein can be implemented by electronic hardware (e.g., digital implementations, analog implementations, or a combination of both), firmware, various forms of programs or design code incorporating instructions (which may be referred to herein as “software” or “software units” for convenience), or any combination of these technologies.

[0075] To clearly demonstrate this compatibility with hardware, firmware, and software, various exemplary components, blocks, units, circuits, and processes are generally described above with respect to their functions. Whether such functions are implemented as hardware, firmware, software, or a combination of these technologies depends on the specific application and the design constraints imposed on the overall system. A person skilled in the art may implement the described functions in various ways for each specific application, but such implementation decisions should not be construed as departing from the scope of this disclosure. According to various embodiments, processors, devices, components, circuits, structures, machines, units, etc., can be configured to perform one or more of the functions described herein. The terms “configured for” or “configured to” as used herein with respect to a specified operation or function refer to processors, devices, components, circuits, structures, machines, units, etc., that are physically constructed, programmed and / or positioned to perform the specified operation or function.

[0076] Furthermore, those skilled in the art will understand that the various exemplary methods, logic blocks, units, devices, components, and circuits described herein can be implemented in, or performed by, an integrated circuit (IC) which may include a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic device, or any combination thereof. The logic blocks, units, and circuits may further include antennas and / or transceivers for communicating with various components within a network or device. While a general-purpose processor may be a microprocessor, in alternative examples, the processor may be any conventional processor, controller, or state machine. The processor may also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, multiple microprocessors, one or more microprocessors working with a DSP core, or any other suitable configuration for performing the functions described herein. When implemented in software, the functions may be stored as one or more instructions or codes on a computer-readable medium. Thus, the steps of the methods or algorithms disclosed herein may be performed as software stored on a computer-readable medium.

[0077] Computer-readable media include both computer storage media and communication media, which include any media that can enable the transfer of computer programs or code from one location to another. Storage media can be any available media that can be accessed by a computer. Such computer-readable media, but not limited to, include RAM, ROM, EEPROM, CD-ROM or other optical disk storage devices, magnetic disk storage devices or other magnetic storage devices, or any other media that can be used to store desired program code in the form of instructions or data structures and can be accessed by a computer.

[0078] Furthermore, embodiments of this disclosure may utilize memory or other storage devices, as well as communication components. For clarity, it will be understood that the above description has illustrated embodiments of this disclosure with reference to different functional units and processors. However, it will be apparent that any suitable distribution of functionality between different functional units, processing logic elements, or domains can be used without prejudice to this disclosure. For example, a function shown to be performed by a separate processing logic element or controller may be performed by the same processing logic element or controller. Thus, references to specific functional units are not intended to indicate a strict logical or physical structure or organization, but merely to refer to suitable means for providing the described functionality.

[0079] Various modifications to the embodiments described herein will be readily apparent to those skilled in the art, and the general principles defined herein can be applied to other embodiments without departing from the scope of this disclosure. Therefore, this disclosure is not intended to be limited to the embodiments shown herein, but should be given the broadest scope consistent with the novel features and principles disclosed herein, as set forth in the following claims.

Claims

1. A method for controlling the power of multiple power converters that constitute a common power converter, wherein the method is: The method includes determining the number of power converters to be shut down from among the plurality of power converters based on the load state of the common power converter, wherein the load state is the power transmission efficiency with respect to the transmitted power of the common power converter and the voltage ratio of the common power converter, and the method further includes, To stop the determined number of power converters among the plurality of power converters. Methods that include...

2. The method according to claim 1, comprising, after a set period, replacing at least one of the power converters that has been stopped with at least one other power converter from the plurality of power converters that has not been stopped.

3. The method according to claim 2, comprising restarting the at least one replaced power converter after the setting period.

4. The method according to claim 1, further comprising monitoring the load state, repeatedly determining the number of power converters to be stopped from the plurality of power converters based on the monitored load state of the common power converter, and repeatedly stopping the determined number of power converters from the plurality of power converters.

5. The method according to claim 1, wherein the plurality of power converters consist of solid-state converters or comprises solid-state converters.

6. The method according to claim 1, wherein the plurality of power converters comprises at least one of a half-bridge converter, a full-bridge converter, a matrix converter, a neutral point clamp type converter, a flying capacitor converter, a cascaded H-bridge converter, or a modular multilevel converter.

7. The method according to claim 1, wherein the plurality of power converters are arranged such that the common converter has at least one of the following: series input and parallel output, series input and series output, or parallel input and parallel output.

8. The method according to claim 1, wherein stopping the determined number of power converters is performed by generating a zero AC voltage or DC voltage within half a period of the resonant cycle of the power converters to be stopped.

9. The method according to claim 1, wherein stopping the determined number of power converters is performed by generating a zero AC voltage within half a cycle of the AC cycle of the power converters to be stopped.

10. A controller for power control of multiple power converters, wherein the controller of the system comprises a processor, and the processor is The processor is configured to perform a determination of the number of power converters to be shut down among the plurality of power converters based on the load state of a common power converter, wherein the load state is the power transmission efficiency of the common power converter with respect to the power transmitted by the common power converter and the voltage ratio of the common power converter, and the processor further, To stop the determined number of power converters among the plurality of power converters. A controller configured to execute [something].

11. The controller according to claim 10, wherein the processor is further configured to, after a set period, replace at least one of the power converters that is stopped with at least one other power converter among the plurality of power converters that is not stopped.

12. The controller according to claim 11, wherein the processor is further configured to restart the at least one replaced power converter after the setting period.

13. The controller according to any one of claims 10 to 12, wherein the controller is further configured to monitor the load state, and the processor is configured to repeatedly determine the number of power converters to shut down from the plurality of power converters based on the monitored load state of the common power converters, and to repeatedly shut down the determined number of power converters from the plurality of power converters.

14. The method according to claim 2, wherein the setting period is at least one duty cycle of the common power converter.

15. The controller according to claim 11, wherein the setting period is at least one duty cycle of the common power converter.

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