Transmission circuit

Abstract

This transmission circuit comprises: an impedance rotation circuit which has a prescribed reflection coefficient set therein and which comprises an impedance circuit that is configured to be connected to an antenna; and a control circuit which controls the reflection coefficient of the impedance rotation circuit and controls the reflection coefficient so as to cause rotation in a complex plane. The control circuit controls the signal level of a reflected signal in accordance with the reflection coefficient of the impedance rotation circuit.

Description

Technical Field

[0001] The present disclosure relates to a transmission circuit.

Background Art

[0002] As a data communication method for a wireless communication device, a backscatter method is known. For example, Patent Document 1 discloses a technique for realizing a single side band by suppressing either a USB (Upper Side Band) signal or an LSB (Lower Side Band) signal using a wavelength division / combiner.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

[0004] The transmission circuit of the present disclosure includes an impedance rotation circuit including an impedance circuit configured to be connected to an antenna with a predetermined reflection coefficient set, and a control circuit configured to control the reflection coefficient of the impedance rotation circuit to rotate the reflection coefficient in a complex plane, and the control circuit controls the signal level of a reflected signal according to the reflection coefficient of the impedance rotation circuit.

Brief Description of the Drawings

[0005] [Figure 1] FIG. 1 is a diagram showing a configuration example of a communication system according to the first embodiment. [Figure 2] FIG. 2 is a diagram showing signal levels of a transmission signal and a reflected signal in an ideal environment according to the first embodiment. [Figure 3] FIG. 3 is a diagram showing signal levels of a transmission signal and a reflected signal in a real environment according to the first embodiment. [Figure 4]Figure 4 is a block diagram showing an example configuration of a slave unit according to the first embodiment. [Figure 5] Figure 5 shows an example of the configuration of an impedance rotation circuit according to the first embodiment. [Figure 6] Figure 6 shows an example of the configuration of an impedance circuit according to the first embodiment. [Figure 7] Figure 7 shows an example of the configuration of a matching circuit according to the first embodiment. [Figure 8] Figure 8 shows the signal level of the reflected signal according to the first embodiment. [Figure 9] Figure 9 shows the signal level of the reflected signal according to the first embodiment. [Figure 10] Figure 10 shows an example of the configuration of an impedance rotation circuit according to the second embodiment. [Figure 11] Figure 11 shows a first configuration example of a resistive attenuator according to the second embodiment. [Figure 12] Figure 12 shows a second example configuration of the resistive attenuator according to the second embodiment. [Figure 13] Figure 13 shows an example of the configuration of an impedance rotation circuit according to the third embodiment. [Figure 14] Figure 14 is a diagram illustrating the parasitic capacitance of a switch. [Figure 15] Figure 15 shows an example of the configuration of a parasitic cancellation circuit according to the third embodiment. [Figure 16] Figure 16 shows an example of the configuration of an impedance rotation circuit according to the fourth embodiment. [Figure 17] Figure 17 shows an example of the configuration of an impedance conversion circuit according to the fourth embodiment. [Figure 18] Figure 18 is a Smith chart showing the impedance of an impedance rotation circuit according to the first example of the fourth embodiment. [Figure 19] Figure 19 shows the signal level of the reflected signal of an impedance rotation circuit according to the first example of the fourth embodiment. [Figure 20]FIG. 20 is a Smith chart showing the impedance of the impedance rotation circuit according to the second example of the fourth embodiment. [Figure 21] FIG. 21 is a diagram showing the signal level of the reflection signal of the impedance rotation circuit according to the second example of the fourth embodiment. [Figure 22] FIG. 22 is a Smith chart showing the impedance of the impedance rotation circuit according to the third example of the fourth embodiment. [Figure 23] FIG. 23 is a diagram showing the signal level of the reflection signal of the impedance rotation circuit according to the third example of the fourth embodiment. [Figure 24] FIG. 24 is a Smith chart showing the impedance of the impedance rotation circuit according to the fourth example of the fourth embodiment. [Figure 25] FIG. 25 is a diagram showing the signal level of the reflection signal of the impedance rotation circuit according to the fourth example of the fourth embodiment. [Figure 26] FIG. 26 is a Smith chart showing the impedance of the impedance rotation circuit according to the fifth example of the fourth embodiment. [Figure 27] FIG. 27 is a diagram showing the signal level of the reflection signal of the impedance rotation circuit according to the fifth example of the fourth embodiment. [Figure 28] FIG. 28 is a Smith chart showing the impedance of the impedance rotation circuit according to the sixth example of the fourth embodiment. [Figure 29] FIG. 29 is a diagram showing the signal level of the reflection signal of the impedance rotation circuit according to the sixth example of the fourth embodiment. [Figure 30] FIG. 30 is a diagram showing the relationship between the impedance and the signal level of the impedance rotation circuit according to the fourth embodiment. [Figure 31] FIG. 31 is a diagram showing a configuration example of the impedance rotation circuit according to the fifth embodiment. [Figure 32] FIG. 32 is a diagram showing a configuration example of the adjustment circuit according to the fifth embodiment. [Figure 33] FIG. 33 is a diagram showing the signal level of the reflection signal according to the comparative example of the fifth embodiment. [Figure 34] Figure 34 is a Smith chart showing the impedance of the impedance rotation circuit according to the fifth embodiment. [Figure 35] Figure 35 is a diagram showing the signal level of the reflected signal of the impedance rotation circuit according to the fifth embodiment. [Figure 36] Figure 36 is a diagram showing a configuration example of the impedance rotation circuit according to the sixth embodiment.

Embodiments for Carrying Out the Invention

[0006] Hereinafter, embodiments according to the present invention will be described in detail with reference to the accompanying drawings. Note that the present disclosure is not limited by this embodiment, and in the following embodiments, the same parts are denoted by the same reference numerals to omit redundant descriptions.

[0007] [First Embodiment] [Communication System] Using FIG. 1, a configuration example of the communication system according to the first embodiment will be described. FIG. 1 is a diagram showing a configuration example of the communication system according to the first embodiment.

[0008] As shown in FIG. 1, the communication system 1 includes a master unit 10, slave units 12A, 12B, 12C, 12D, 12E, 12F, 12G, 12H, 12I, and 12J. When it is not necessary to distinguish between slave units 12A to 12J, they are collectively referred to as slave unit 12. The communication system 1 is a system that performs data communication in a backscatter method. The master unit 10 and the slave unit 12 are wireless communication devices that perform backscatter communication. In the communication system 1, the slave unit 12 is configured to transmit a reflected signal 22 obtained by reflecting a transmission signal 21 transmitted by the master unit to the master unit 10.

[0009] (Signal Level) Figure 2 shows the signal levels of the transmitted signal and reflected signal under ideal conditions according to the first embodiment. Waveform 31 shows the signal level of the transmitted signal 21 transmitted by the master unit. Waveforms 32A to 32J show the signal levels of the reflected signals 22 reflected by slave units 12A and 12J, respectively. As shown in Figure 2, the signal levels of the reflected signals 22 reflected by slave units 12A and 12J are ideally the same. Under ideal conditions, slave units 12A to 12J can communicate properly with the master unit 10 without interference from reflected signals 22 reflected by other slave units 12.

[0010] Figure 3 shows the signal levels of the transmitted signal and reflected signal under real-world conditions according to the first embodiment. As shown in Figure 3, under real-world conditions, the signal levels of the reflected signals 22 reflected by slave unit 12A and slave unit 12J may differ. For example, consider the case where slave unit 12J is assigned to a communication channel that has been suppressed by slave unit 12E using single-sidebanding. In this case, as shown in Figure 3, if the signal level of the reflected signal 22 of slave unit 12E is higher than the signal level of the reflected signal of slave unit 12J, the reflected signal 22 of slave unit 12E may become an interference signal that makes it difficult for slave unit 12J to communicate with the master unit 10. In such cases, it is necessary to appropriately suppress the signal level of the reflected signal 22 of slave unit 12E.

[0011] (Handset) An example of the configuration of a slave unit according to the first embodiment will be explained using Figure 4. Figure 4 is a block diagram showing an example of the configuration of a slave unit according to the first embodiment.

[0012] As shown in Figure 4, the slave unit 12 includes an antenna 40, a switch (SW) 41, a receiving circuit 42, a transmitting circuit 43, a control unit 44, and a sensor 45.

[0013] Antenna 40 is configured to receive the transmission signal transmitted by the master unit 10. Antenna 40 is configured to transmit the reflected signal, which is the transmission signal reflected back to the master unit 10.

[0014] Switch 41 is configured to switch the path between the antenna 40 and the receiving circuit 42 and the transmitting circuit 43. When the antenna 40 receives a transmission signal from the master unit 10, switch 41 electrically connects the antenna 40 to the receiving circuit 42. When the antenna 40 transmits a reflected signal to the master unit 10, switch 41 electrically connects the antenna 40 to the transmitting circuit 43.

[0015] The receiving circuit 42 receives the transmission signal from the master unit 10 that the antenna 40 has received. The receiving circuit 42 is configured to perform various receiving processes on the transmission signal.

[0016] The transmitting circuit 43 is a circuit that generates the reflected signal (also called the backscatter signal) transmitted by the antenna 40. The transmitting circuit 43 includes a CPU interface (I / F) 60, a control circuit 61, an impedance rotation circuit 62, and a PLL (Phase Looked Loop) circuit 63.

[0017] The CPU interface 60 is configured to receive various control signals and data from the control unit 44.

[0018] The control circuit 61 is configured to control the impedance rotation circuit 62. The control circuit 61 controls the impedance rotation circuit 62 based on control signals input from the control unit 44 via the CPU interface 60, oscillation signals input from the PLL circuit 63, etc. The control circuit 61 is configured to change the impedance of the impedance rotation circuit 62. As the impedance of the impedance rotation circuit 62 changes, the reflection coefficient of the output terminal on the antenna 40 side rotates in the complex plane. That is, the control circuit 61 changes the impedance of the impedance rotation circuit 62 to control the reflection coefficient of the output terminal on the antenna 40 side to rotate in the complex plane. For example, the control circuit 61 reduces the USB (Upper Side Band) signal or LSB (Lower Side Band) signal relative to the carrier signal of the backscatter signal to achieve single sideband.

[0019] The impedance rotation circuit 62 is located at the front end of the slave unit 12. The impedance rotation circuit 62 is configured to perform backscatter communication by reflecting the transmission signal sent by the slave unit 12 as a backscatter signal. Specifically, as will be described later, the impedance rotation circuit 62 includes multiple impedance circuits, each with a different impedance.

[0020] The control circuit 61 and the impedance rotation circuit 62 are types of transmission circuits according to this disclosure.

[0021] The PLL circuit 63 is configured to generate an oscillation signal of a predetermined frequency. The PLL circuit 63 generates the oscillation signal according to the control signal from the control unit 44. The PLL circuit 63 is configured to output the generated oscillation signal to the control circuit 61.

[0022] The control unit 44 is configured to control each part of the slave unit 12. The control unit 44 may be implemented, for example, by an information processing device such as a CPU (Central Processing Unit) or an MPU (Micro Processing Unit) and a storage device such as RAM (Random Access Memory) or ROM (Read Only Memory). The control unit 44 may be implemented, for example, by an integrated circuit such as an ASIC (Application Specific Integrated Circuit) or an FPGA (Field Programmable Gate Array). The control unit 44 may be implemented by a combination of hardware and software.

[0023] Sensor 45 includes various types of sensors. Sensor 45 may include, for example, speed sensors, vibration sensors, acceleration sensors, gyro sensors, rotation angle sensors, angular velocity sensors, geomagnetic sensors, magnet sensors, temperature sensors, humidity sensors, pressure sensors, light sensors, illuminance sensors, UV sensors, gas sensors, gas concentration sensors, atmosphere sensors, level sensors, odor sensors, pressure sensors, air pressure sensors, contact sensors, wind sensors, infrared sensors, motion sensors, displacement sensors, image sensors, weight sensors, smoke sensors, leak sensors, vital sensors, battery level sensors, and ultrasonic sensors. Sensor 45 may also include a GNSS (Global Navigation Satellite System) sensor to acquire the current location information of the slave unit 12.

[0024] (Impedance rotation circuit) An example of the configuration of the impedance rotation circuit according to the first embodiment will be explained using Figure 5. Figure 5 is a diagram showing an example of the configuration of the impedance rotation circuit according to the first embodiment.

[0025] As shown in Figure 5, the impedance rotation circuit 62 comprises impedance circuit 70-1, ..., impedance circuit 70-n (where n is an integer greater than or equal to 2), switch 72-1, switch 72-2, switch 72-3, matching circuit 73, wiring 74, and phase shifter 75. Impedance circuits 70-1 through 70-n each have different reflection coefficients. When it is not necessary to distinguish between impedance circuits 70-1 through 70-n, they are collectively referred to as impedance circuit 70. In other words, the impedance rotation circuit 62 comprises multiple impedance circuits 70 with different reflection coefficients.

[0026] The impedance circuits 70-1 through 70-n are electrically connected to the matching circuit 73 by a switch 72-1. The switch 72-1 is, for example, a transistor, but is not limited to this. The switch 72-1 is controlled by a control circuit 61. The switch 72-1 is configured to selectively connect any one of the impedance circuits 70-1 through 70-n to the matching circuit 73. That is, the control circuit 61 can control the reflection coefficient by controlling the switch 72-1 to switch which impedance circuit 70 is connected. The impedance circuit 70 adds impedance to the impedance rotation circuit 62. An example of the configuration of the impedance circuit according to the first embodiment will be explained using Figure 6. Figure 6 is a diagram showing an example of the configuration of the impedance circuit according to the first embodiment.

[0027] As shown in Figure 6, the impedance circuit 70 comprises a first circuit 80-1, a second circuit 80-2, a third circuit 80-3, a fourth circuit 80-4, a fifth circuit 80-5, a sixth circuit 80-6, a seventh circuit 80-7, and an eighth circuit 80-8. The first to eighth circuits 80-8 are electrically connected by a signal line 85.

[0028] The first circuit 80-1 comprises a signal source 81-1, a switch element 82-1, a resistor element 83-1, and a capacitor 84-1. The signal source 81-1 indicates a signal source for control signals from the control circuit 61 for controlling the switch element 82-1. One end of the signal source 81-1 is electrically connected to a reference potential. The reference potential is, for example, ground, but is not limited to this. The signal source 81-1 outputs a control signal to the switch element 82-1 for controlling the on and off states of the switch element 82-1. One end of the switch element 82-1 is electrically connected to a signal line 85. One end of the switch element 82-1 is electrically connected to one end of the resistor element 83-1. The other end of the resistor element 83-1 is electrically connected to one end of the capacitor 84-1. The other end of the capacitor 84-1 is electrically connected to a reference potential. When the switch element 82-1 is turned ON, the resistor element 83-1 and the capacitor 84-1 are electrically connected to the signal line 85. As a result, the impedance of the impedance circuit 70 changes according to the resistance value of the resistor element 83-1 and the capacitance value of the capacitor 84-1.

[0029] The second circuit 80-2 comprises a signal source 81-2, a switch element 82-2, a resistor element 83-2, and a capacitor 84-2. The signal source 81-2 is the signal source for the control signal from the control circuit 61 for controlling the switch element 82-2. One end of the signal source 81-2 is electrically connected to a reference potential. The signal source 81-2 outputs a control signal to the switch element 82-2 for controlling the on and off states of the switch element 82-2. One end of the switch element 82-2 is electrically connected to a signal line 85. One end of the switch element 82-2 is electrically connected to one end of the resistor element 83-2. The other end of the resistor element 83-2 is electrically connected to one end of the capacitor 84-2. The other end of the capacitor 84-2 is electrically connected to a reference potential. When the switch element 82-2 is turned on, the resistor element 83-2 and the capacitor 84-2 are electrically connected to the signal line 85. From this point onward, the impedance of the impedance circuit 70 changes according to the resistance value of the resistor element 83-2 and the capacitance value of the capacitor 84-2.

[0030] The third circuit 80-3 comprises a signal source 81-3, a switch element 82-3, a resistor element 83-3, and a capacitor 84-3. The signal source 81-3 indicates a signal source for control signals from the control circuit 61 for controlling the switch element 82-3. One end of the signal source 81-3 is electrically connected to a reference potential. The signal source 81-3 outputs a control signal to the switch element 82-3 for controlling the on and off states of the switch element 82-3. One end of the switch element 82-3 is electrically connected to a signal line 85. One end of the switch element 82-3 is electrically connected to one end of the resistor element 83-3. The other end of the resistor element 83-3 is electrically connected to one end of the capacitor 84-3. The other end of the capacitor 84-3 is electrically connected to a reference potential. When the switch element 82-3 is turned on, the resistor element 83-3 and the capacitor 84-3 are electrically connected to the signal line 85. From this point onward, the impedance of the impedance circuit 70 changes according to the resistance value of the resistor element 83-3 and the capacitance value of the capacitor 84-3.

[0031] The circuit comprises a fourth circuit 80-4, a signal source 81-4, a switch element 82-4, a resistor element 83-4, and a capacitor 84-4. The signal source 81-4 indicates a signal source for control signals from the control circuit 61 for controlling the switch element 82-4. One end of the signal source 81-4 is electrically connected to a reference potential. The signal source 81-4 outputs control signals to the switch element 82-4 for controlling the on and off states of the switch element 82-4. One end of the switch element 82-4 is electrically connected to a signal line 85. One end of the switch element 82-4 is electrically connected to one end of the resistor element 83-4. The other end of the resistor element 83-4 is electrically connected to one end of the capacitor 84-4. The other end of the capacitor 84-4 is electrically connected to a reference potential. When the switch element 82-4 is turned on, the resistor element 83-4 and the capacitor 84-4 are electrically connected to the signal line 85. From this point onward, the impedance of the impedance circuit 70 changes according to the resistance value of the resistor element 83-4 and the capacitance value of the capacitor 84-4.

[0032] The fifth circuit 80-5 comprises a signal source 81-5, a switch element 82-5, a resistor element 83-5, and a capacitor 84-5. The signal source 81-5 indicates a signal source for control signals from the control circuit 61 for controlling the switch element 82-5. One end of the signal source 81-5 is electrically connected to a reference potential. The signal source 81-5 outputs a control signal to the switch element 82-5 for controlling the on and off states of the switch element 82-5. One end of the switch element 82-5 is electrically connected to a signal line 85. One end of the switch element 82-5 is electrically connected to one end of the resistor element 83-5. The other end of the resistor element 83-5 is electrically connected to one end of the capacitor 84-5. The other end of the capacitor 84-5 is electrically connected to a reference potential. When the switch element 82-5 is turned on, the resistor element 83-5 and the capacitor 84-5 are electrically connected to the signal line 85. From this point onward, the impedance of the impedance circuit 70 changes according to the resistance value of the resistor element 83-5 and the capacitance value of the capacitor 84-5.

[0033] The sixth circuit 80-6 comprises a signal source 81-6, a switch element 82-6, a resistor element 83-6, and a capacitor 84-6. The signal source 81-6 indicates the signal source of the control signal from the control circuit 61 for controlling the switch element 82-6. One end of the signal source 81-6 is electrically connected to a reference potential. The signal source 81-6 outputs a control signal to the switch element 82-6 for controlling the on and off states of the switch element 82-6. One end of the switch element 82-6 is electrically connected to the signal line 85. One end of the switch element 82-6 is electrically connected to one end of the resistor element 83-6. The other end of the resistor element 83-6 is electrically connected to one end of the capacitor 84-6. The other end of the capacitor 84-6 is electrically connected to the reference potential. When the switch element 82-6 is turned on, the resistor element 83-6 and the capacitor 84-6 are electrically connected to the signal line 85. From this point onward, the impedance of the impedance circuit 70 changes according to the resistance value of the resistor element 83-6 and the capacitance value of the capacitor 84-6.

[0034] The seventh circuit 80-7 comprises a signal source 81-7, a switch element 82-7, a resistor element 83-7, and a capacitor 84-7. The signal source 81-7 indicates the signal source of the control signal from the control circuit 61 for controlling the switch element 82-7. One end of the signal source 81-7 is electrically connected to a reference potential. The signal source 81-7 outputs a control signal to the switch element 82-7 for controlling the on and off states of the switch element 82-7. One end of the switch element 82-7 is electrically connected to the signal line 85. One end of the switch element 82-7 is electrically connected to one end of the resistor element 83-7. The other end of the resistor element 83-7 is electrically connected to one end of the capacitor 84-7. The other end of the capacitor 84-7 is electrically connected to the reference potential. When the switch element 82-7 is turned on, the resistor element 83-7 and the capacitor 84-7 are electrically connected to the signal line 85. From this point onward, the impedance of the impedance circuit 70 changes according to the resistance value of the resistor element 83-7 and the capacitance value of the capacitor 84-7.

[0035] Circuit 80-8 comprises a signal source 81-8, a switch element 82-8, a resistor element 83-8, and a capacitor 84-8. The signal source 81-8 is the signal source for the control signal from the control circuit 61 for controlling the switch element 82-8. One end of the signal source 81-8 is electrically connected to a reference potential. The signal source 81-8 outputs a control signal to the switch element 82-8 for controlling the on and off states of the switch element 82-8. One end of the switch element 82-8 is electrically connected to the signal line 85. One end of the switch element 82-8 is electrically connected to one end of the resistor element 83-8. The other end of the resistor element 83-8 is electrically connected to one end of the capacitor 84-8. The other end of the capacitor 84-8 is electrically connected to the reference potential. When the switch element 82-8 is turned on, the resistor element 83-8 and the capacitor 84-8 are electrically connected to the signal line 85. From this point onward, the impedance of the impedance circuit 70 changes according to the resistance value of the resistor element 83-8 and the capacitance value of the capacitor 84-8.

[0036] The control circuit 61 is configured to selectively change the impedance rotation circuit and rotate the reflection coefficient on the polar chart by selectively controlling the on and off states of each of the switch elements 82-1 to 82-8.

[0037] The control circuit 61 can control the attenuation of the reflected signal by selectively switching the connection between impedance circuit 70-1, impedance circuit 70-n, and matching circuit 73 to control the reflection coefficient Γ. For example, when the reflection coefficient Γ is 1, the attenuation of the reflected signal is 0 [dB (decibels)]. For example, when the reflection coefficient Γ is 0.9, the attenuation of the reflected signal is 0.91 [dB]. For example, when the reflection coefficient Γ is 0.8, the attenuation of the reflected signal is 1.93 [dB]. For example, when the reflection coefficient Γ is 0.7, the attenuation of the reflected signal is 3.10 [dB]. For example, when the reflection coefficient Γ is 0.6, the attenuation of the reflected signal is 4.44 [dB]. For example, when the reflection coefficient Γ is 0.5, the attenuation of the reflected signal is 6.02 [dB]. For example, when the reflection coefficient Γ is 0.4, the attenuation of the reflected signal is 7.96 [dB]. For example, when the reflection coefficient Γ is 0.3, the attenuation of the reflected signal is 10.46 [dB]. For example, when the reflection coefficient Γ is 0.2, the attenuation of the reflected signal is 13.98 [dB]. For example, when the reflection coefficient Γ is 0.1, the attenuation of the reflected signal is 20 [dB].

[0038] The matching circuit 73 is a circuit that matches the output impedance of the impedance circuit 70 with the input impedance of the antenna 40. Figure 7 is a diagram showing an example of the configuration of the matching circuit according to the first embodiment. As shown in Figure 7, the matching circuit 73 includes a capacitor 91, an inductor 92, and a capacitor 93. One end of the capacitor 91 is electrically connected to switch 72-1 and one end of inductor 92. The other end of the capacitor 91 is electrically connected to a reference potential. One end of the capacitor 93 is electrically connected to switch 72-2 and the other end of inductor 92. The other end of the capacitor 93 is electrically connected to a reference potential.

[0039] The matching circuit 73 is selectively connected to the wiring 74 or the phase shifter 75 by a switch 72-2. The switch 72-2 is, for example, a transistor, but is not limited thereto. The switch 72-2 is controlled by the control circuit 61.

[0040] The wiring 74 or phase shifter 75 is selectively connected to the input terminal of the antenna 40 by switch 72-3. Switch 72-3 is controlled by control circuit 61. The phase shifter 75 has the same configuration as the matching circuit 73 shown in Figure 7, so its description is omitted. The phase shifter 75 outputs the input signal with its phase shifted by 90°.

[0041] When the matching circuit 73 and the wiring 74 are connected, the signal output from the matching circuit 73 is input to the input terminal of the antenna 40 without any change in phase.

[0042] Figure 8 shows the signal levels of the reflected signal according to the first embodiment. In Figure 8, the horizontal axis represents frequency [MHz (megahertz)] and the vertical axis represents signal level [dB]. Figure 8 shows the signal levels of the carrier signal 201, the USB signal 202, and the LSB signal 203. As shown in Figure 8, the USB signal 202 is suppressed compared to the LSB signal 203. In other words, the impedance rotation circuit 62 realizes single-sideband LSB signaling.

[0043] Figure 9 shows the signal level of the reflected signal according to the first embodiment. In Figure 9, the horizontal axis represents the reflection coefficient, the left vertical axis represents the signal level difference [dB], and the right vertical axis represents the signal level [dB]. In Figure 9, a reflection coefficient Γ of 0.8 is used as the reference. Graph 211 shows the signal level of the reflected signal, and graph 210 shows the difference between the signal level when the reflection coefficient Γ is 0.8 and the signal level when the reflection coefficient Γ is 0.8. In Figure 9, the difference between the signal level when the reflection coefficient Γ is 0.8, 0.5, 0.2, and when the reflection coefficient Γ is 0.2 and a 10 [dB] resistive attenuator described later is used is shown. As shown in Figure 9, the signal level of the reflected signal can be controlled by controlling the reflection coefficient.

[0044] As described above, in the first embodiment, the amount of attenuation of the reflected signal can be controlled by controlling the reflection coefficient of the impedance rotation circuit 62. As a result, the first embodiment can appropriately realize single-sideband.

[0045] [Second Embodiment] (Impedance rotation circuit) An example of the configuration of the impedance rotation circuit according to the second embodiment will be explained using Figure 10. Figure 10 is a diagram showing an example of the configuration of the impedance rotation circuit according to the second embodiment.

[0046] As shown in Figure 10, the impedance rotation circuit 62A comprises impedance circuits 70-1 to 70-n, switches 72-1, 72-2, 72-3, and 72-4, a matching circuit 73, wiring 74, a phase shifter 75, wiring 76, and resistance attenuators 77-1 to 77-n. When it is not necessary to distinguish between resistance attenuators 77-1 to 77-n, they are collectively referred to as resistance attenuators 77. The impedance rotation circuit 62A differs from the impedance rotation circuit 62 shown in Figure 5 in that it includes a switch 72-3 and resistance attenuators 77.

[0047] Wiring 74 or phase shifter 75 is selectively connected by switch 72-3 to either wiring 76 or resistor attenuators 77-1 to resistor attenuators 77-n. Switch 72-3 is, for example, a transistor, but is not limited thereto. Switch 72-3 is controlled by control circuit 61.

[0048] The resistive attenuators 77 are configured to reduce the signal level of the reflected signal. Resistive attenuators 77-1 to 77-n are each configured to reduce the amount of attenuation of a different reflected signal. They are configured not to reduce the reflected signal of wiring 76. That is, the control circuit 61 can control the amount of attenuation by controlling switch 72-4 to switch the connected resistive attenuators 77. In the second embodiment, the reflected signal can be attenuated more appropriately by providing the resistive attenuators 77.

[0049] Figure 11 shows a first configuration example of a resistive attenuator according to the second embodiment. The resistive attenuator 77 according to the first configuration example comprises a resistive element 101, a resistive element 102, and a resistive element 103. One end of the resistive element 101 is electrically connected to a switch 72-3 and one end of the resistive element 103. The other end of the resistive element 101 is electrically connected to a reference potential. One end of the resistive element 102 is electrically connected to a switch 72-4 and the other end of the resistive element 103. The amount of attenuation [dB] of the reflected signal of the resistive attenuator 77 changes depending on the resistance values ​​of the resistive elements 101, 102, and 103. For example, by setting the resistance values ​​of resistive elements 101 and 102 to 436.21 [Ω] and the resistance value of resistive element 103 to 11.61 [Ω], the attenuation amount becomes 2 [dB]. For example, by setting the resistance values ​​of resistors 101 and 102 to 220.97 [Ω] and the resistance value of resistor 103 to 23.85 [Ω], the attenuation will be 4 [dB]. For example, by setting the resistance values ​​of resistors 101 and 102 to 150.48 [Ω] and the resistance value of resistor 103 to 37.35 [Ω], the attenuation will be 6 [dB]. For example, by setting the resistance values ​​of resistors 101 and 102 to 116.14 [Ω] and the resistance value of resistor 103 to 52.84 [Ω], the attenuation will be 8 [dB]. For example, by setting the resistance values ​​of resistors 101 and 102 to 96.25 [Ω] and the resistance value of resistor 103 to 71.15 [Ω], the attenuation will be 10 [dB]. For example, by setting the resistance values ​​of resistors 101 and 102 to 83.54 [Ω] and the resistance value of resistor 103 to 93.25 [Ω], the attenuation will be 12 [dB]. For example, by setting the resistance values ​​of resistors 101 and 102 to 74.93 [Ω] and the resistance value of resistor 103 to 120.31 [Ω], the attenuation will be 14 [dB]. For example, by setting the resistance values ​​of resistors 101 and 102 to 68.83 [Ω] and the resistance value of resistor 103 to 150.78 [Ω], the attenuation will be 16 [dB]. For example, by setting the resistance values ​​of resistors 101 and 102 to 64.40 [Ω] and the resistance value of resistor 103 to 195.43 [Ω], the attenuation will be 18 [dB].For example, by setting the resistance values ​​of resistors 101 and 102 to 61.11 [Ω] and the resistance value of resistor 103 to 247.50 [Ω], the attenuation becomes 20 [dB].

[0050] Figure 12 shows a second configuration example of a resistive attenuator according to the second embodiment. The resistive attenuator 77 according to the second configuration example comprises a resistive element 111, a resistive element 112, and a resistive element 113. One end of the resistive element 111 is electrically connected to a switch 72-3. The other end of the resistive element 111 is electrically connected to one end of the resistive element 112 and one end of the resistive element 113. The other end of the resistive element 112 is electrically connected to a switch 72-4. The other end of the resistive element 113 is electrically connected to a reference potential. The amount of attenuation [dB] of the reflected signal of the resistive attenuator 77 changes depending on the resistance values ​​of the resistive elements 111, 112, and 113. For example, by setting the resistance values ​​of resistive elements 111 and 112 to 5.73 [Ω] and the resistance value of resistive element 113 to 215.24 [Ω], the attenuation amount becomes 2 [dB]. For example, by setting the resistance values ​​of resistors 111 and 112 to 11.31 [Ω] and the resistance value of resistor 113 to 104.83 [Ω], the attenuation will be 4 [dB]. For example, by setting the resistance values ​​of resistors 111 and 112 to 16.61 [Ω] and the resistance value of resistor 113 to 66.93 [Ω], the attenuation will be 6 [dB]. For example, by setting the resistance values ​​of resistors 111 and 112 to 21.53 [Ω] and the resistance value of resistor 113 to 47.31 [Ω], the attenuation will be 8 [dB]. For example, by setting the resistance values ​​of resistors 111 and 112 to 25.97 [Ω] and the resistance value of resistor 113 to 35.14 [Ω], the attenuation will be 10 [dB]. For example, by setting the resistance values ​​of resistors 111 and 112 to 29.92 [Ω] and the resistance value of resistor 113 to 26.81 [Ω], the attenuation will be 12 [dB]. For example, by setting the resistance values ​​of resistors 111 and 112 to 33.37 [Ω] and the resistance value of resistor 113 to 20.78 [Ω], the attenuation will be 14 [dB]. For example, by setting the resistance values ​​of resistors 111 and 112 to 36.32 [Ω] and the resistance value of resistor 113 to 16.26 [Ω], the attenuation will be 16 [dB]. For example, by setting the resistance values ​​of resistors 111 and 112 to 38.82 [Ω] and the resistance value of resistor 113 to 12.79 [Ω], the attenuation will be 18 [dB].For example, by setting the resistance values ​​of resistors 111 and 112 to 40.91 [Ω] and the resistance value of resistor 113 to 10.10 [Ω], the attenuation becomes 20 [dB].

[0051] Graph 210 in Figure 9 shows the signal levels when the reflection coefficient Γ of the impedance circuit 70 is 0.2 and the attenuation of the resistive attenuator 77 is 10 [dB]. As Graph 210 shows, the attenuation of the reflected signal from the impedance circuit 70 with a reflection coefficient Γ of 0.2 and the resistive attenuator 77 with an attenuation of 10 [dB] is greater than the attenuation of the reflected signal from the impedance circuit 70 with a reflection coefficient Γ of 0.2.

[0052] It is preferable that the resistive attenuators 77-1 to 77-n are connected in parallel. This is because if the resistive attenuators 77-1 to 77-n are connected in series, they become more susceptible to the parasitic capacitance of switches 72-3 and 72-4, which may cause the amount of attenuation of the reflected signal to change. Therefore, in the second embodiment, it is desirable to connect the resistive attenuators 77-1 to 77-n in parallel in order to make it easier to consider the effect of the parasitic capacitance of switches 72-3 and 72-4.

[0053] Furthermore, it is preferable that the channel width (W) of each transistor constituting switches 72-1 to 72-4 is the same. Also, it is preferable that the channel length (L) of each transistor constituting switches 72-1 to 72-4 is the same. If the channel width and channel length of each transistor constituting switches 72-1 to 72-4 are different, the impedance rotation circuit 62A may not be able to obtain the desired characteristics due to variations in parasitic capacitance. Therefore, in the second embodiment, the variations in parasitic capacitance are reduced by making the channel width and channel length of each transistor constituting switches 72-1 to 72-4 the same. This makes it easier to consider the influence of parasitic capacitance of switches 72-1 to 72-4.

[0054] As described above, the second embodiment can more effectively attenuate reflected signals by having the impedance rotation circuit 62A comprise an impedance circuit 70 and a resistance attenuator 77. As a result, the second embodiment can more effectively achieve single-sideband operation.

[0055] [Third Embodiment] (Impedance rotation circuit) An example of the configuration of the impedance rotation circuit according to the third embodiment will be explained using Figure 13. Figure 13 is a diagram showing an example of the configuration of the impedance rotation circuit according to the third embodiment.

[0056] As shown in Figure 13, the impedance rotation circuit 62B comprises impedance circuits 70-1 to 70-n, switches 72-1, 72-2, 72-3, 72-4, and 72-5, a matching circuit 73, wiring 74, a phase shifter 75, wiring 76, resistive attenuators 77-1 to 77-n, and parasitic cancellation circuits 78-1, 78-2, and 78-3. The impedance rotation circuit 62B differs from the impedance rotation circuit 62A shown in Figure 10 in that it includes switch 72-5 and parasitic cancellation circuits 78-1 to 78-3. When it is not necessary to distinguish between parasitic cancellation circuits 78-1 to 78-3, they may be collectively referred to as parasitic cancellation circuit 78.

[0057] Switches 72-1 through 72-5 are configured such that the channel width and channel length of each transistor are the same. The control circuit 61 controls the on and off states of switches 72-1 through 72-5.

[0058] Even if the channel width and channel length of each transistor constituting each switch 72 are the same, parasitic capacitance still exists. In this case, the parasitic capacitance may affect the attenuation of the reflected signal, making it impossible to achieve the desired single-sideband performance. Therefore, in the third embodiment, a parasitic cancellation circuit is provided to cancel out the parasitic capacitance of each switch 72, thereby reducing the influence of the parasitic capacitance of each switch 72.

[0059] One end of the parasitic cancellation circuit 78-1 is electrically connected to switch 72-1. The other end of the parasitic cancellation circuit 78-1 is electrically connected to one end of the matching circuit 73. Switch 72-1 selectively connects impedance circuit 70-n and parasitic cancellation circuit 78-1 from impedance circuit 70-1.

[0060] One end of the parasitic cancellation circuit 78-2 is electrically connected to switch 72-3. The other end of the parasitic cancellation circuit 78-2 is electrically connected to switch 72-4. Switch 72-3 selectively connects the parasitic cancellation circuit 78-2 to wiring 74 or phase shifter 75. Switch 72-4 selectively connects the parasitic cancellation circuit 78-2 to wiring 76 or resistor attenuator 77-1 to resistor attenuator 77-n.

[0061] One end of the parasitic cancellation circuit 78-3 is electrically connected to switch 72-5. The other end of the parasitic cancellation circuit 78-3 is electrically connected to the input terminal of antenna 40. Switch 72-5 selectively connects the resistive attenuator 77-n and the parasitic cancellation circuit 78-3 via wiring 76 or resistive attenuator 77-1.

[0062] Parasitic cancellation circuits 78-1 to 78-3 each have the same configuration. The configuration of parasitic cancellation circuit 78 will be described later.

[0063] Figure 14 is a diagram illustrating the parasitic capacitance of a switch. As shown in Figure 14, the switch 72 is, for example, a transistor. As shown in Figure 14, the switch 72 has a parasitic capacitance 120 between its gate terminal and its source terminal. The switch 72 has a parasitic capacitance 121 between its gate terminal and its drain terminal. The switch 72 has a parasitic capacitance 122 between its source terminal and its drain terminal.

[0064] Figure 15 shows an example of the configuration of a parasitic cancellation circuit according to the third embodiment. As shown in Figure 15, the parasitic cancellation circuit 78 includes a capacitor 131, a capacitor 132, and an inductor 133. One end of the capacitor 131 is electrically connected to an external device. The other end of the capacitor 131 is electrically connected to one end of the capacitor 132 and one end of the inductor 133. The other end of the capacitor 132 is electrically connected to an external device. The other end of the inductor 133 is electrically connected to a reference potential.

[0065] Specifically, in parasitic cancellation circuit 78-1, one end of capacitor 131 is electrically connected to the drain terminal of switch 72-1, and the other end of capacitor 132 is electrically connected to the input terminal of matching circuit 73. In parasitic cancellation circuit 78-2, one end of capacitor 131 is electrically connected to the drain terminal of switch 72-3, and the other end of capacitor 132 is electrically connected to the source terminal of switch 72-4. In parasitic cancellation circuit 78-3, capacitor 131 is electrically connected to the drain terminal of switch 72-5, and the other end of capacitor 132 is electrically connected to the input terminal of antenna 40.

[0066] As described above, in the third embodiment, the effects of parasitic capacitances 120, 121, and 122 can be canceled out by connecting the parasitic cancellation circuit 78 to the switch 72. As a result, the third embodiment can achieve single-sideband operation more effectively.

[0067] [Fourth Embodiment] (Impedance rotation circuit) An example of the configuration of the impedance rotation circuit according to the fourth embodiment will be explained using Figure 16. Figure 16 is a diagram showing an example of the configuration of the impedance rotation circuit according to the fourth embodiment.

[0068] As shown in Figure 16, the impedance rotation circuit 62C comprises an impedance circuit 70, switches 72-1, 72-2, and 72-3, wiring 74, a phase shifter 75, wiring 140, and impedance conversion circuits 141-1 through 141-n. When it is not necessary to distinguish between impedance conversion circuits 141-1 through 141-n, they are collectively referred to as impedance conversion circuit 141. The impedance rotation circuit 62C differs from the impedance rotation circuit 62 shown in Figure 5 in that it does not have a matching circuit 73, has only one impedance circuit 70, and has multiple impedance conversion circuits 141.

[0069] Either wiring 140 or impedance conversion circuit 141-1 to impedance conversion circuit 141-n is selectively connected to wiring 74 or phase shifter 75 by switch 72-2. Either wiring 140 or impedance conversion circuit 141-1 to impedance conversion circuit 141-n is selectively connected to antenna 40 by switch 72-3.

[0070] The impedance conversion circuit 141 is a circuit that converts impedance. The impedance conversion circuits 141-1 through 141-n each convert impedance by a different amount. In this embodiment, the impedance of impedance circuit 70 is assumed to be 50[Ω]. The impedance conversion circuit 141 converts 50[Ω] to, for example, 10[Ω], 25[Ω], 200[Ω], 500[Ω], 1000[Ω], etc. Wiring 140 is configured not to convert impedance. In this embodiment, the amount of impedance conversion can be controlled by controlling switches 72-2 and 72-3 to selectively connect either wiring 140 or impedance conversion circuits 141-1 through 141-n.

[0071] Figure 17 shows an example configuration of an impedance conversion circuit according to the fourth embodiment. As shown in Figure 17, the impedance conversion circuit 141 includes a capacitor 151, an inductor 152, and a capacitor 153. One end of the capacitor 151 is electrically connected to the switch 72-2 and one end of the inductor 152. One end of the capacitor 153 is electrically connected to the switch 72-3 and the inductor 152.

[0072] The amount of impedance conversion by the impedance conversion circuit 141 varies depending on the capacitance values ​​of capacitors 151 and 153 and the inductance of inductor 152. For example, by setting the capacitance value of capacitor 151 to 8.67 [pF (picofarads)], the capacitance value of capacitor 153 to 11.63 [pF], and the inductance of inductor 152 to 3.79 [nH (nanohenry)], the impedance conversion circuit 141 can convert the impedance from 50 [Ω] to 10 [Ω]. For example, by setting the capacitance value of capacitor 151 to 8.67 [pF], the capacitance value of capacitor 153 to 11.24 [pF], and the inductance of inductor 152 to 4.93 [nH], the impedance conversion circuit 141 can convert the impedance from 50 [Ω] to 25 [Ω]. By setting the capacitance of capacitor 151 to 8.67 [pF], the capacitance of capacitor 153 to 4.59 [pF], and the inductance of inductor 152 to 9.32 [nH], the impedance conversion circuit 141 can convert the impedance from 50 [Ω] to 200 [Ω]. By setting the capacitance of capacitor 151 to 8.67 [pF], the capacitance of capacitor 153 to 2.93 [pF], and the inductance of inductor 152 to 13.1 [nH], the impedance conversion circuit 141 can convert the impedance from 50 [Ω] to 500 [Ω]. By setting the capacitance of capacitor 151 to 8.67 [pF], the capacitance of capacitor 153 to 2.08 [pF], and the inductance of inductor 152 to 17.34 [nH], the impedance conversion circuit 141 can convert the impedance from 50 [Ω] to 1000 [Ω].

[0073] Next, the impedance of the impedance rotation circuit 62C according to the fourth embodiment and the signal level of the reflected signal will be described.

[0074] (Example of the fourth embodiment) Figure 18 is a Smith chart showing the impedance of an impedance-rotating circuit according to the first example of the fourth embodiment. Figure 19 is a diagram showing the signal level of the reflected signal of the impedance-rotating circuit according to the first example of the fourth embodiment. In Figure 19, the horizontal axis represents frequency [MHz] and the vertical axis represents signal level [dB].

[0075] In the first example of the fourth embodiment, the impedance of the impedance rotation circuit 62C is assumed to be 50 [Ω]. That is, in the first example of the fourth embodiment, the impedance is not converted. As shown in Figure 18, the impedance of the impedance rotation circuit 62C rotates along the circle 221. Point 221a indicates the impedance values ​​that the impedance rotation circuit 62C can take. On the circle 221, there are 16 points 221a at approximately equal intervals. As shown in Figure 19, the signal level of the carrier signal 222 is approximately -79.87 [dB], the signal level of the LSB signal 223 is approximately -43.58 [dB], and the signal level of the USB signal 224 is -89.93 [dB]. The difference between the signal level of the LSB signal 223 and the signal level of the USB signal 224 is 43.35 [dB].

[0076] (Second example of the fourth embodiment) Figure 20 is a Smith chart showing the impedance of an impedance-rotating circuit according to the second example of the fourth embodiment. Figure 21 is a diagram showing the signal level of the reflected signal of the impedance-rotating circuit according to the second example of the fourth embodiment. In Figure 21, the horizontal axis represents frequency [MHz] and the vertical axis represents signal level [dB].

[0077] In the second example of the fourth embodiment, the impedance of the impedance rotation circuit 62C is assumed to be 10[Ω]. That is, in the second example of the fourth embodiment, the impedance conversion circuit 141 is used to convert the impedance from 50[Ω] to 10[Ω]. As shown in Figure 20, the impedance of the impedance rotation circuit 62C rotates along the circle 231. Point 231a indicates the impedance values ​​that the impedance rotation circuit 62C can take. On the circle 231, there are 16 points 221a that are not evenly spaced. As shown in Figure 21, the signal level of the carrier signal 232 is approximately -45.09[dB], the signal level of the LSB signal 233 is approximately -48.71[dB], and the signal level of the USB signal 234 is -85.03[dB]. The difference between the signal level of the LSB signal 233 and the signal level of the USB signal 234 is 36.32[dB].

[0078] (Third example of the fourth embodiment) Figure 22 is a Smith chart showing the impedance of an impedance-rotating circuit according to the third example of the fourth embodiment. Figure 23 is a diagram showing the signal level of the reflected signal of the impedance-rotating circuit according to the third example of the fourth embodiment. In Figure 23, the horizontal axis represents frequency [MHz] and the vertical axis represents signal level [dB].

[0079] In the third example of the fourth embodiment, the impedance of the impedance rotation circuit 62C is assumed to be 25 [Ω]. That is, in the third example of the fourth embodiment, the impedance conversion circuit 141 is used to convert the impedance from 50 [Ω] to 25 [Ω]. As shown in Figure 22, the impedance of the impedance rotation circuit 62C rotates along the circle 241. Point 241a indicates the impedance values ​​that the impedance rotation circuit 62C can take. On the circle 241, there are 16 points 241a that are not evenly spaced. As shown in Figure 23, the signal level of the carrier signal 242 is approximately -51.61 [dB], the signal level of the LSB signal 243 is approximately -44.74 [dB], and the signal level of the USB signal 244 is -83.94 [dB]. The difference between the signal level of the LSB signal 243 and the signal level of the USB signal 244 is 39.20 [dB].

[0080] (Fourth example of the fourth embodiment) Figure 24 is a Smith chart showing the impedance of an impedance rotation circuit according to the fourth example of the fourth embodiment. Figure 25 is a diagram showing the signal level of the reflected signal of the impedance rotation circuit according to the fourth example of the fourth embodiment. In Figure 25, the horizontal axis represents frequency [MHz] and the vertical axis represents signal level [dB].

[0081] In the fourth example of the fourth embodiment, the impedance of the impedance rotation circuit 62C is assumed to be 200 [Ω]. That is, in the fourth example of the fourth embodiment, the impedance conversion circuit 141 is used to convert the impedance from 50 [Ω] to 200 [Ω]. As shown in Figure 24, the impedance of the impedance rotation circuit 62C rotates along the circle 251. Point 251a indicates the impedance value that the impedance rotation circuit 62C can take. On the circle 251, there are 16 points 251a that are not evenly spaced. As shown in Figure 25, the signal level of the carrier signal 252 is approximately -45.81 [dB], the signal level of the LSB signal 253 is approximately -47.91 [dB], and the signal level of the USB signal 254 is -90.59 [dB]. The difference between the signal level of the LSB signal 253 and the signal level of the USB signal 254 is 42.68 [dB].

[0082] (Fifth example of the fourth embodiment) Figure 26 is a Smith chart showing the impedance of an impedance-rotating circuit according to a fifth example of the fourth embodiment. Figure 27 is a diagram showing the signal level of the reflected signal of the impedance-rotating circuit according to a fifth example of the fourth embodiment. In Figure 27, the horizontal axis represents frequency [MHz] and the vertical axis represents signal level [dB].

[0083] In the fifth example of the fourth embodiment, the impedance of the impedance rotation circuit 62C is assumed to be 500 [Ω]. That is, in the fifth example of the fourth embodiment, the impedance conversion circuit 141 is used to convert the impedance from 50 [Ω] to 500 [Ω]. As shown in Figure 26, the impedance of the impedance rotation circuit 62C rotates along the circle 261. Point 261a indicates the impedance values ​​that the impedance rotation circuit 62C can take. On the circle 261, there are 16 points 261a that are not evenly spaced. As shown in Figure 27, the signal level of the carrier signal 262 is approximately -43.04 [dB], the signal level of the LSB signal 263 is approximately -53.72 [dB], and the signal level of the USB signal 264 is -96.66 [dB]. The difference between the signal level of the LSB signal 263 and the signal level of the USB signal 264 is 42.94 [dB].

[0084] (Sixth example of the fourth embodiment) Figure 28 is a Smith chart showing the impedance of an impedance-rotating circuit according to the sixth example of the fourth embodiment. Figure 29 is a diagram showing the signal level of the reflected signal of the impedance-rotating circuit according to the sixth example of the fourth embodiment. In Figure 29, the horizontal axis represents frequency [MHz] and the vertical axis represents signal level [dB].

[0085] In the sixth example of the fourth embodiment, the impedance of the impedance rotation circuit 62C is assumed to be 1000 [Ω]. That is, in the sixth example of the fourth embodiment, the impedance conversion circuit 141 is used to convert the impedance from 50 [Ω] to 1000 [Ω]. As shown in Figure 28, the impedance of the impedance rotation circuit 62C rotates along the circle 271. Point 271a indicates the impedance values ​​that the impedance rotation circuit 62C can take. On the circle 271, there are 16 points 271a that are not evenly spaced. As shown in Figure 29, the signal level of the carrier signal 272 is approximately -43.32 [dB], the signal level of the LSB signal 273 is approximately -58.95 [dB], and the signal level of the USB signal 254 is -98.97 [dB]. The difference between the signal level of the LSB signal 273 and the signal level of the USB signal 274 is 40.02 [dB].

[0086] As shown in Figures 18 to 29, the amount of attenuation of the reflected signal can be controlled by changing the impedance of the impedance rotation circuit 62C.

[0087] Figure 30 shows the relationship between impedance and signal level in the impedance rotation circuit according to the fourth embodiment. In Figure 30, the horizontal axis represents the impedance conversion value of the impedance rotation circuit 62C, the left vertical axis represents the signal level difference [dB], and the right vertical axis represents the signal level [dB]. In Figure 30, the impedance of the impedance rotation circuit 62C is set to 50 [Ω] as the reference. Graph 281 shows the signal level of the reflected signal, and graph 280 shows the difference between the signal level when the impedance is the corresponding impedance and the signal level when the impedance is 50 [Ω]. As shown in graphs 280 and 281, the signal level of the reflected signal can be controlled by converting the impedance of the impedance rotation circuit 62C.

[0088] As described above, the fourth embodiment can control the signal level of the reflected signal by using multiple impedance conversion circuits 141. This allows the fourth embodiment to appropriately achieve single-sideband operation.

[0089] [Fifth Embodiment] (Impedance rotation circuit) An example of the configuration of the impedance rotation circuit according to the fifth embodiment will be described using Figure 31. Figure 31 is a diagram showing an example of the configuration of the impedance rotation circuit according to the fifth embodiment.

[0090] As shown in Figure 31, the impedance rotation circuit 62D comprises an impedance circuit 70, switches 72-1, 72-2, and 72-3, wiring 74, a phase shifter 75, wiring 140, impedance conversion circuits 141-1 through 141-n, and an adjustment circuit 160. The impedance rotation circuit 62D differs from the impedance rotation circuit 62C shown in Figure 16 in that it includes an adjustment circuit 160.

[0091] For example, if the signal level of the reflected signal is adjusted using multiple impedance conversion circuits 141, the signal level of the harmonic signal increases. In this case, if the number of slave units 12 is increased in the communication system 1, the harmonic signal and the reflected signal may interfere with each other, potentially preventing proper communication. This is because, as shown in Figure 20, the spacing between the points 231a indicating impedance is no longer constant due to the impedance conversion. In this case, as shown in Figure 21, the signal level of the harmonic signal in the 916MHz band increases. Therefore, in the fifth embodiment, the signal level of the harmonic signal is reduced using an adjustment circuit 160.

[0092] One end of the adjustment circuit 160 is connected by switch 72-3 to either wiring 140 or impedance conversion circuit 141-n from impedance conversion circuit 141-1. The other end of the adjustment circuit 160 is connected to the input terminal of antenna 40.

[0093] Figure 32 shows an example of the configuration of an adjustment circuit according to the fifth embodiment. As shown in Figure 32, the adjustment circuit 160 includes a capacitor 170, an inductor 171, a capacitor 172, an inductor 173, a capacitor 174, an inductor 175, and a capacitor 176.

[0094] One end of capacitor 170 is electrically connected to switch 72-3. The other end of capacitor 170 is electrically connected to one end of inductor 171.

[0095] One end of inductor 171 is electrically connected to the other end of capacitor 170 and one end of capacitor 172. The other end of inductor 171 is electrically connected to a reference potential.

[0096] One end of capacitor 172 is electrically connected to one end of inductor 171 and one end of inductor 173. The other end of capacitor 172 is electrically connected to a reference potential.

[0097] One end of inductor 173 is electrically connected to one end of capacitor 172. The other end of inductor 173 is electrically connected to one end of capacitor 174.

[0098] One end of capacitor 174 is electrically connected to the other end of inductor 173 and one end of inductor 175. The other end of capacitor 174 is electrically connected to a reference potential.

[0099] One end of inductor 175 is electrically connected to one end of capacitor 174 and one end of capacitor 176. The other end of inductor 175 is electrically connected to a reference potential.

[0100] One end of capacitor 176 is electrically connected to one end of inductor 175. The other end of capacitor 176 is electrically connected to the input terminal of antenna 40.

[0101] (Signal level relating to the comparative example of the fifth embodiment) Here, a comparative example of the fifth embodiment will be described. Figure 33 is a diagram showing the signal level of the reflected signal in the comparative example of the fifth embodiment. In Figure 33, the horizontal axis represents frequency [MHz] and the vertical axis represents signal level [dB]. In the comparative example of the fifth embodiment, it is assumed that the impedance is converted from 50 [Ω] to 25 [Ω] using the impedance conversion circuit 141. That is, point 241a shown in Figure 22 represents the impedance of the impedance rotation circuit in the comparative example of the fifth embodiment. Figure 33 shows the signal levels of the carrier signal 291, the LSB signal 292, the USB signal 293, the harmonic signal 294, the harmonic signal 295, and the harmonic signal 296. In the example shown in Figure 33, single-sideband LSB signal 292 is realized with the signal level of USB signal 293 suppressed. As shown in Figure 33, in the comparative example of the fifth embodiment, the signal levels of harmonic signals 294, 295, and 296 are higher than the signal level of the USB signal 293. Therefore, there is a risk that the reflected signals of other slave devices 12 may interfere with harmonic signals 294, 295, or 296.

[0102] (Signal level according to the fifth embodiment) Figure 34 is a Smith chart showing the impedance of the impedance rotation circuit according to the fifth embodiment. Figure 35 is a diagram showing the signal level of the reflected signal of the impedance rotation circuit according to the fifth embodiment. In Figure 35, the horizontal axis represents frequency [MHz] and the vertical axis represents signal level [dB].

[0103] In the example shown in Figure 34, the impedance of the impedance rotation circuit 62D is assumed to be 25 [Ω]. That is, in the fifth embodiment, the impedance is converted from 50 [Ω] to 25 [Ω] using the impedance conversion circuit 141. As shown in Figure 34, the impedance of the impedance rotation circuit 62D rotates along the circle 301. Point 301a indicates the impedance value that the impedance rotation circuit 62D can take. As shown in Figure 34, unlike point 241a shown in Figure 22, point 301a on the circle 301 contains 16 points at equal intervals. That is, in the fifth embodiment, by using the adjustment circuit 160, the spacing of points 301a can be kept constant even when the impedance of the impedance rotation circuit 62D is converted using the impedance conversion circuit 141.

[0104] Figure 35 shows the signal levels of the carrier signal 311, the LSB signal 312, the USB signal 313, and the harmonic signal 314. In the example shown in Figure 35, single-sideband LSB signal 312 is realized with the signal level of the USB signal 313 suppressed. As shown in Figure 35, the signal level of the harmonic signal 314 is lower than the signal level of the USB signal 313. In other words, in the fifth embodiment, the impedance rotation circuit 62D can suppress the signal level of the harmonic signal by using the adjustment circuit 160. Therefore, it is possible to prevent interference between the reflected signal of other slave devices 12 and the harmonic signal 314.

[0105] As described above, the fifth embodiment can control the signal level of the harmonic signal by using the adjustment circuit 160. This allows the fifth embodiment to appropriately achieve single-sideband operation.

[0106] [Sixth Embodiment] (Impedance rotation circuit) An example of the configuration of the impedance rotation circuit according to the sixth embodiment will be described using Figure 36. Figure 36 is a diagram showing an example of the configuration of the impedance rotation circuit according to the sixth embodiment.

[0107] As shown in Figure 36, the impedance rotation circuit 62E comprises an impedance circuit 70, switches 72-1, 72-2, 72-3, 72-4, wiring 74, a phase shifter 75, parasitic cancellation circuits 78-1, 78-2, and 78-3, wiring 140, impedance conversion circuits 141-1 to 141-n, and an adjustment circuit 160. The impedance rotation circuit 62E differs from the impedance rotation circuit 62D shown in Figure 31 in that it includes switches 72-4, 78-1, 78-2, and 78-3.

[0108] One end of the parasitic cancellation circuit 78-1 is electrically connected to the output terminal of the impedance circuit 70. The other end of the parasitic cancellation circuit 78-1 is electrically connected to one end of the switch 72-1. The switch 72-1 selectively connects the wiring 74 or the phase shifter 75 to the parasitic cancellation circuit 78-1. The parasitic cancellation circuit 78-1 can cancel the effect of the parasitic capacitance of the switch 72-1.

[0109] One end of the parasitic cancellation circuit 78-2 is electrically connected to switch 72-2. The other end of the parasitic cancellation circuit 78-2 is electrically connected to switch 72-4. Switch 72-2 selectively connects the parasitic cancellation circuit 78-2 to wiring 74 or phase shifter 75. Switch 72-4 selectively connects the parasitic cancellation circuit 78-2 to wiring 140 or impedance conversion circuit 141-1 to impedance conversion circuit 141-n. The parasitic cancellation circuit 78-2 can cancel the effects of parasitic capacitance in switches 72-2 and 72-4.

[0110] One end of the parasitic cancellation circuit 78-3 is electrically connected to switch 72-3. The other end of the parasitic cancellation circuit 78-3 is electrically connected to the input terminal of the adjustment circuit 160. Switch 72-3 selectively connects the impedance conversion circuit 141-n and the parasitic cancellation circuit 78-3 from wiring 140 or impedance conversion circuit 141-1. The parasitic cancellation circuit 78-3 can cancel the effect of the parasitic capacitance of switch 72-3.

[0111] As described above, the sixth embodiment can cancel out the effects of parasitic capacitance in each switch by connecting a parasitic cancellation circuit to each switch. As a result, the sixth embodiment can more effectively achieve single-sideband operation.

[0112] While embodiments of the present disclosure have been described above, the present disclosure is not limited by the content of these embodiments. Furthermore, the aforementioned components include those that are readily conceivable to those skilled in the art, those that are substantially identical, and those that fall within the so-called equivalent range. Moreover, the aforementioned components can be combined as appropriate. Furthermore, various omissions, substitutions, or modifications of the components can be made without departing from the spirit of the embodiments described above. [Explanation of Symbols]

[0113] 1. Communication System 10 Master unit 12 Handset 40 Antennas 41 switches 42 Receiving Circuit 43 Transmitter Circuit 44 Control Unit 45 sensors 60 CPU Interfaces 61 Control circuits 62, 62A, 62B, 62C, 62D, 62E Impedance Rotation Circuit 70 Impedance Circuit 72-1, 72-2, 72-3, 72-4, 72-5 switches 73 Matching circuit 74, 76, 140 wiring 75 Phase shifter 77 Resistive Attenuator 78-1,78-2,78-3 Parasitic cancellation circuit 141 Impedance conversion circuit

Claims

1. An impedance rotation circuit comprising an impedance circuit configured to be connected to an antenna and having a predetermined reflection coefficient set, The circuit includes a control circuit that controls the reflection coefficient of the impedance rotation circuit so that the reflection coefficient rotates in the complex plane, The control circuit controls the signal level of the reflected signal according to the reflection coefficient of the impedance rotation circuit. Transmission circuit.

2. The aforementioned impedance rotation circuit comprises a plurality of impedance circuits with different reflection coefficients, The antenna and the plurality of impedance circuits are connected by a first switch. The control circuit controls the first switch and switches the connection between the antenna and the plurality of impedance circuits, thereby controlling the rotation of the reflection coefficient in the complex plane. The transmission circuit according to claim 1.

3. The impedance rotation circuit comprises a plurality of impedance circuits and a resistive attenuator between them and the antenna. The transmission circuit according to claim 2.

4. The aforementioned resistance attenuator is configured by connecting multiple resistance attenuators with different attenuation values ​​in parallel. The multiple resistor attenuators, the antenna, and the multiple impedance circuits are connected by a second switch. The control circuit controls the connection between the multiple resistor attenuators, the antenna, and the multiple impedance circuits by controlling the second switch. The transmission circuit according to claim 3.

5. The first switch and the second switch are of the same size. The transmission circuit according to claim 4.

6. The aforementioned impedance rotation circuit is A first parasitic cancellation circuit connected to the first switch, The system comprises a second parasitic cancellation circuit connected to the second switch, The transmission circuit according to claim 4.

7. The impedance rotation circuit comprises a plurality of impedance conversion circuits with different conversion amounts between the impedance circuit and the antenna. Multiple impedance conversion circuits, the impedance circuit, and the antenna are connected by a first switch. The control circuit controls the first switch and switches the connections between the plurality of impedance conversion circuits and the impedance circuit and the antenna, thereby controlling the rotation of the reflection coefficient in the complex plane. The transmission circuit according to claim 1.

8. Multiple impedance conversion circuits are configured such that the impedance interval remains constant when switching connections with the impedance circuit. The transmission circuit according to claim 7.

9. The aforementioned impedance rotation circuit is The system includes a plurality of impedance conversion circuits and an adjustment circuit configured to maintain a constant impedance gap when the connection with the impedance circuit is switched between the two circuits and the antenna. Multiple impedance conversion circuits and the antenna are connected by a second switch. The transmission circuit according to claim 7.

10. The first switch and the second switch are of the same size. The transmission circuit according to claim 9.

11. The aforementioned impedance rotation circuit is A first parasitic cancellation circuit connected to the first switch, The second switch is connected to a parasitic cancellation circuit, The transmission circuit according to claim 10.

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