Phase-change memory cells with voids that allow for expansion and contraction of PCM materials.

Abstract

A phase change memory (PCM) cell is provided that includes a substrate and a first electrode located on the substrate, the PCM cell including a phase change material layer located adjacent the first electrode, where a first side of the phase change material layer is in direct contact with the first electrode, a second electrode located adjacent the phase change material layer, where the second electrode is in direct contact with a second side of the phase change material layer, the first side and the second side being different sides of the phase change material layer, and a void located directly above the phase change material layer that provides space for the phase change material to expand or restrict.

Description

Technical Field

[0001] The present invention generally relates to the field of phase change memory cells, and more particularly, to phase change memory cells having a one-sided airgap for accommodating volume changes during operation.

Background Art

[0002] Phase change memory (PCM) is being pursued as a major candidate for memory used in artificial intelligence (AI) deep learning applications. The PCM cells are confined by rigid walls / boundaries, so there is no available space for the PCM material to expand or contract. This can prevent / damage the volume change of the PCM during normal operating cycles, which causes durability or reliability issues.

Summary of the Invention

[0003] Additional aspects or advantages or both are described in part below, are in part apparent from the description below, or can be learned by the practice of the present invention.

[0004] A phase change memory (PCM) cell is provided that includes a substrate and a first electrode positioned on the substrate. The PCM cell includes a phase change material layer positioned adjacent to the first electrode, where a first side of the phase change material layer is in direct contact with the first electrode; a second electrode positioned adjacent to the phase change material layer, where the second electrode is in direct contact with a second side of the phase change material layer and the first side and the second side are different sides of the phase change material layer; and an airgap positioned directly above the phase change material layer and providing a space for the phase change material to expand or contract.

[0005] The above aspects, features, and advantages of certain exemplary embodiments of the present invention, as well as other aspects, features, and advantages, will become more apparent by considering the following description in conjunction with the accompanying drawings.

Brief Description of the Drawings

[0006] [Figure 1] This is a top view of a phase-change memory device according to one embodiment of the present invention. [Figure 2] (A) and (B) are diagrams showing cross-sections A and B of a PCM device after material stack formation according to one embodiment of the present invention. [Figure 3] (A) and (B) are diagrams showing cross-sections A and B of a PCM device after column formation according to one embodiment of the present invention. [Figure 4] (A) and (B) are diagrams showing cross-sections A and B of a PCM device after the formation of a sacrificial layer, according to one embodiment of the present invention. [Figure 5] (A) and (B) are diagrams showing cross-sections A and B of a PCM device after the column has been filled, according to one embodiment of the present invention. [Figure 6] (A) and (B) are diagrams showing cross-sections A and B of a PCM device after the formation of a second column, according to one embodiment of the present invention. [Figure 7] (A) and (B) are diagrams showing cross-sections A and B of a PCM device after the formation of the first electrode, according to one embodiment of the present invention. [Figure 8] (A) and (B) are diagrams showing cross-sections A and B of a PCM device after the formation of a third column according to one embodiment of the present invention. [Figure 9] (A) and (B) are diagrams showing cross-sections A and B of a PCM device after the sacrificial layer has been removed, according to one embodiment of the present invention. [Figure 10] (A) and (B) are diagrams showing cross-sections A and B of a PCM device after the formation of a phase change material layer according to one embodiment of the present invention. [Figure 11] (A) and (B) are figures showing cross-sections A and B of a PCM device after the PCM layer has been removed from the third column, according to one embodiment of the present invention. [Figure 12](A) and (B) are diagrams showing cross-sections A and B of a PCM device after the formation of a second electrode, according to one embodiment of the present invention. [Figure 13] (A) and (B) are diagrams showing cross-sections A and B of a PCM device after the formation of the top metal wire, according to one embodiment of the present invention. [Figure 14] (A) and (B) are diagrams showing cross-sections A and B of a PCM device after void formation according to one embodiment of the present invention. [Figure 15] (A) and (B) are diagrams showing cross-sections A and B of a PCM device after material stack formation according to one embodiment of the present invention. [Figure 16] (A) and (B) are diagrams showing cross-sections A and B of a PCM device after the formation of an amorphous layer according to one embodiment of the present invention. [Figure 17] (A) and (B) are diagrams showing cross-sections A and B of a PCM device after column formation according to one embodiment of the present invention. [Figure 18] (A) and (B) are diagrams showing cross-sections A and B of a PCM device after dielectric isolation of different PCM columns, respectively, according to one embodiment of the present invention. [Figure 19] (A) and (B) are diagrams showing cross-sections A and B of a PCM device after the formation of an electrode cutout, according to one embodiment of the present invention. [Figure 20] (A) and (B) are diagrams showing cross-sections A and B of a PCM device after the formation of the first and second electrodes according to one embodiment of the present invention. [Figure 21] (A) and (B) are diagrams showing cross-sections A and B of a PCM device after the formation of a second spacer, according to one embodiment of the present invention. [Figure 22] (A) and (B) are diagrams showing cross-sections A and B of a PCM device after the formation of a third spacer, according to one embodiment of the present invention. [Figure 23](A) and (B) are diagrams showing cross-sections A and B of a PCM device after the formation of a removal channel according to one embodiment of the present invention. [Figure 24] (A) and (B) are diagrams showing cross-sections A and B of a PCM device after removal of the first sacrificial layer, respectively, according to one embodiment of the present invention. [Figure 25] (A) and (B) are figures showing cross-sections A and B of a PCM device after the removal channel has been sealed, according to one embodiment of the present invention. [Figure 26] (A) and (B) are diagrams showing cross-sections A and B of a PCM device after the formation of the upper metal wire, according to one embodiment of the present invention. [Figure 27] (A) and (B) are diagrams showing cross-sections A and B of a PCM device, respectively, that includes a resistive liner located below the PCM layer, according to one embodiment of the present invention. [Modes for carrying out the invention]

[0007] The following description relating to the accompanying drawings is provided to assist in a comprehensive understanding of the exemplary embodiments of the invention as defined by the claims and their equivalents. While this description includes various specific details to aid in that understanding, these specific details should be considered merely examples. Those skilled in the art will understand that various changes and modifications of the embodiments described herein can be implemented without departing from the scope of the invention. Furthermore, for clarity and brevity, descriptions of well-known functions and structures may be omitted.

[0008] The terms and words used in the following description and claims are not limited to their bibliographic meanings, but are used simply to enable a clear and consistent understanding of the invention. It should therefore be obvious to those skilled in the art that the following description of exemplary embodiments of the invention is provided for illustrative purposes only and not to limit the invention as defined by the appended claims and their equivalents.

[0009] Unless the context clearly indicates otherwise, the singular forms "a", "an", and "the" are understood to include plural referents. Thus, for example, unless the context clearly indicates otherwise, a reference to a "component surface" includes a reference to one or more of such surfaces.

[0010] This specification discloses detailed embodiments of the claimed structures and methods. However, it is to be understood that the disclosed embodiments are merely examples of the claimed structures and methods that may be implemented in various forms. However, the present invention can be implemented in many different forms and should not be construed as limited to the exemplary embodiments described herein. Rather, these exemplary embodiments are provided so that this disclosure will be thorough and complete and will fully convey the scope of the invention to those skilled in the art. In this description, well-known features and techniques may be omitted to avoid unnecessarily obscuring the embodiments of the invention.

[0011] When the terms "an embodiment", "embodiment", "exemplary embodiment", etc. are referred to herein, it means that the described embodiment may include a particular feature, structure, or characteristic, but not every embodiment may include that particular feature, structure, or characteristic, and it may or may not. Further, such phrases do not necessarily refer to the same embodiment. Further, when a particular feature, structure, or characteristic is described with respect to one embodiment, it is considered within the knowledge of those skilled in the art to affect such feature, structure, or characteristic with respect to other embodiments, whether or not explicitly described.

[0012] For the purposes of the following description, the terms “top,” “bottom,” “right,” “left,” “vertical,” “horizontal,” “top,” “bottom,” and their derivatives refer to the structures and methods disclosed in the orientation shown in the drawings. The terms “on top of,” “on the top,” “placed on top of,” or “placed on top of” mean that a first element, such as a first structure, is located on a second element, such as a second structure, and that an intervening element, such as an interface structure, may be present between the first and second elements. The term “in direct contact” means that a first element, such as a first structure, and a second element, such as a second structure, are connected at the interface of these two elements without an intervening conductive, insulating, or semiconductor layer.

[0013] To avoid obscuring the presentation of embodiments of the present invention, some processing steps or operations known in the art may be combined for presentation and illustrative purposes in the following detailed description, and some examples may not be described in detail. In other examples, some processing steps or operations known in the art may not be described at all. Rather, it should be understood that the following description focuses on the distinctive features or elements of various embodiments of the present invention.

[0014] In this specification, various embodiments of the present invention are described with reference to the relevant drawings. Alternative embodiments can be devised without departing from the scope of the present invention. Note that the following description and drawings describe various connections and positional relationships between elements (e.g., above, below, adjacent, etc.). Unless otherwise specified, these connections or positional relationships, or both, can be direct or indirect, and the present invention is not intended to limit it in this respect. Thus, the joining of entities can refer to direct or indirect joining, and the positional relationship between entities can be a direct or indirect positional relationship. As an example of an indirect positional relationship, the reference in this description to forming layer "A" on layer "B" includes a situation in which there is one or more intermediate layers (e.g., layer "C") between layer "A" and layer "B", provided that the related properties and functions of layer "A" and layer "B" are not significantly altered by the intermediate layer.

[0015] For the purposes of the claims and the interpretation of this specification, the following definitions and abbreviations are used. When used herein, the terms “comprises,” “comprising,” “includes,” “including,” “has,” “having,” “contains,” or “containing,” or other variations thereof, are intended to cover non-exclusive inclusion. For example, a composition, mixture, process, method, article, or apparatus containing a list of elements is not necessarily limited to those elements alone, but may include other elements not expressly listed, or other elements specific to such composition, mixture, process, method, article, or apparatus.

[0016] Furthermore, in this specification, the term “exemplary” is used to mean “serving as an example, case, or illustration.” Embodiments or designs described herein as “exemplary” are not necessarily construed as being preferable or advantageous to other embodiments or designs. The terms “at least one” and “one or more” may be understood to include one or more arbitrary integers, i.e., 1, 2, 3, 4, etc. The term “plural” may be understood to include two or more arbitrary integers, i.e., 2, 3, 4, 5, etc. The term “connection” may include both indirect “connection” and direct “connection.”

[0017] When used herein, the term “about” modifies the amount of raw materials, components, or reactants of the present invention used, relating to variations in quantity, for example, variations in quantity that may occur during normal measurement and liquid handling procedures used to prepare concentrates or solutions. Furthermore, variations may also arise from careless errors in measurement procedures, differences in the manufacture, source, or purity of the raw materials used to prepare compositions or perform methods, etc. The terms “about” or “substantially” are intended to include the degree of error based on the equipment available at the time of filing this application, relating to the magnitude of a particular quantity. For example, “about” may include a range of ±8%, 5%, or 2% of a given value. In another embodiment, the term “about” means within 5% of the reported number. In another embodiment, the term “about” means within 10%, 9%, 8%, 7%, 6%, 5%, 4%, 3%, 2%, or 1% of the reported number.

[0018] The various processes used to form microchips that are packaged into integrated circuits (ICs) are classified into four common categories: film deposition, removal / etching, semiconductor doping, and patterning / lithography. Deposition is any process of growing material on a wafer, coating a wafer with material, or transferring material onto a wafer by other means. Available technologies include, in particular, physical vapor deposition (PVD), chemical vapor deposition (CVD), electrochemical deposition (ECD), molecular beam epitaxy (MBE), and the more recently emerged atomic layer deposition (ALD). Removal / etching is any process of removing material from a wafer. Examples include etching processes (wet or dry), reactive ion etching (RIE), and chemical mechanical planarization (CMP). Semiconductor doping is the modification of electrical properties by doping, for example, the source and drain of a transistor, and is generally performed by diffusion, ion implantation, or both. After these doping processes, furnace annealing or fast thermal annealing (RTA) is performed. Annealing serves to activate the injected dopant. Both conductive (e.g., aluminum, copper, etc.) and insulating (e.g., various forms of silicon dioxide, silicon nitride, etc.) films are used to connect and separate electrical components. Selective doping of different regions of a semiconductor substrate allows the conductivity of the substrate to be altered by the application of voltage.

[0019] Next, embodiments of the present invention will be referred to in detail. Examples of embodiments are shown in the accompanying drawings, where the same reference numerals throughout the drawings refer to the same elements. A phase-change memory (PCM) consists of a material that changes its volume when an electric current / electric pulse is applied to / not applied to the PCM material during normal operation. When the PCM material changes from a crystalline state to an amorphous state during a RESET operation, its volume expands by approximately 6-7%. When the PCM material changes from an amorphous state to a crystalline state during a SET operation, its volume contracts by approximately 6-7%. The present invention aims to form voids to accommodate the volume changes of the PCM material.

[0020] Figure 1 shows top views of phase-change memory (PCM) devices 100, 200, and 300 according to one embodiment of the present invention. Figure 1 shows a top view of a memory array including PCM memory cells, electrodes, Mx wires (metal wires), and Mx-1 wires (metal wires). Sections A and B are identified, and the following figures reflect the manufacturing stages in these sections.

[0021] Figure 2(A) shows a cross-section A of the PCM device 100 after material stack formation according to one embodiment of the present invention. Figure 2(B) shows a cross-section B of the PCM device 100 after material stack formation according to one embodiment of the present invention. The PCM device 100 includes a substrate 102, a bottom metal wire 104, a first dielectric layer 106, an optional resistive liner 108, a first sacrificial layer 110, a hard mask 112, and an interlayer insulator (ILD) layer 114. The substrate 102 can be, for example, but is not limited to, a material containing silicon (Si), silicon germanium (SiGe), silicon carbide (SiC), Si:C (carbon-doped silicon), silicon germanium carbide (SiGeC), carbon-doped silicon germanium (SiGe:C), III-V group, II-V group compound semiconductors, or other similar semiconductors. Furthermore, multiple layers of these semiconductor materials can also be used as the semiconductor material of the substrate 102. In some embodiments, the substrate 102 includes both semiconductor and dielectric materials. The semiconductor substrate 102 may further include organic semiconductors or layered semiconductors such as Si / SiGe, silicon-on-insulators, or SiGe-on-insulators. Part or all of the semiconductor substrate 102 may be amorphous, polycrystalline, or single-crystal. The semiconductor substrate 102 may be a doped semiconductor substrate or an undoped semiconductor substrate, or a semiconductor substrate that includes doped and undoped regions. In some embodiments, the substrate 102 includes any suitable layer that can function as a base for transistors, isolation structures (such as shallow trench isolation), contacts, other device structures such as wires (not shown), or PCM devices 100. The first sacrificial layer 110 may be made of germanium, for example. The resistant liner 108 can be made of, for example, amorphous carbon, tantalum nitride (TaN), tungsten nitride (WN), cobalt tungsten (CoW), nickel tungsten (NiW), yttrium oxide (YO), or other suitable material.The resistance of the resistive liner 108 is considerably higher than that of the PCM material in a low-resistance state (e.g., 10 to 40 times or about 20 times) and considerably lower than that of the PCM material in a high-resistance state (e.g., 1 / 5 to 1 / 50 or about 1 / 10). The first dielectric layer 106 can be made of, for example, SiN or other suitable dielectric material.

[0022] Figure 3(A) shows a cross-section A of the PCM device 100 after the formation of column 118 according to one embodiment of the present invention. Figure 3(B) shows a cross-section B of the PCM device 100 after the formation of column 118 according to one embodiment of the present invention. In one embodiment, an optical patterning layer (OPL) 116 is formed on a hard mask 112 and an ILD layer 114. The OPL 116 is patterned to form column 118. The OPL 116 acts as a masking layer. Column 118 is a space formed by removing a portion of the material from each of the hard mask 112, the first sacrificial layer 110, the resistive liner 108, and the first dielectric layer 106. The bottom of column 118 is located within the first dielectric layer 106, but column 118 does not extend downward to the bottom metal wire 104.

[0023] Figure 4(A) shows a cross-section A of the PCM device 100 after the formation of a sacrificial layer, according to one embodiment of the present invention. Figure 4(B) shows a cross-section B of the PCM device 100 after the formation of a sacrificial layer, according to one embodiment of the present invention. Any excess material of the OPL 116 and the second sacrificial layer 120 formed on the OPL 116 has been removed. The second sacrificial layer 120 is formed at the bottom of the column 118. The second sacrificial layer 120 has a vertical height that overlaps with a portion of the first sacrificial layer 110. The second sacrificial layer 120 can be made of, for example, Ge, SiGe, or another suitable sacrificial material. The vertical height of the second sacrificial layer 120 allows for the formation of a bottleneck during downstream processing of the PCM device 100.

[0024] Figure 5(A) shows a cross-section A of the PCM device 100 after the column 118 has been filled, according to one embodiment of the present invention. Figure 5(B) shows a cross-section B of the PCM device 100 after the column 118 has been filled, according to one embodiment of the present invention. Additional hard mask 112 material is formed on the exposed surface of the PCM device 100. This additional hard mask 112 material fills the space located within the column 118. The hard mask 112 material is planarized to expose a uniform surface of the hard mask 112 and the ILD layer 114. The hard mask 112 extends downward so that a portion of the hard mask 112 contacts the top of the second sacrificial layer 120. The downward-extending hard mask 112 allows a bottleneck to form between the hard mask 112 and the resistant liner 108 during downstream processing of the PCM device 100.

[0025] Figure 6(A) shows a cross-section A of the PCM device 100 after the formation of the second column, according to one embodiment of the present invention. Figure 6(B) shows a cross-section B of the PCM device 100 after the formation of the second column, according to one embodiment of the present invention. An OPL 116 is formed on the hard mask 112 and on the ILD layer 114. The OPL 116 is patterned to form the second column 122, which determines the position for forming the first electrode 124, described later. The second column 122 is located on a different side of this stack from the side where the first column 118 was located. The space containing the second column 122 is formed by removing portions from each of the hard mask 112, the first sacrificial layer 110, the resistive liner 108, and the first dielectric layer 106. The second column 122 extends downward, exposing the top surface of the bottom metal wire 104.

[0026] Figure 7(A) shows a cross-section A of the PCM device 100 after the formation of the first electrode 124 according to one embodiment of the present invention. Figure 7(B) shows a cross-section B of the PCM device 100 after the formation of the first electrode 124 according to one embodiment of the present invention. The first electrode 124 is formed in the second column 122, and the bottom of the first electrode 124 is in direct contact with the bottom metal wire 104. The first electrode 124 is formed by depositing a conductive metal on an exposed surface for forming the first electrode 124 in the second column 122. The first electrode 124 extends upward from the bottom metal wire 104 in such a manner that the top surface of the first electrode 124 is higher than the top surface of the first sacrificial layer 110. The first electrode 124 can be made of, for example, tungsten (W), copper (Cu), cobalt (Co), tantalum nitride (TaN), titanium nitride (TiN), ruthenium (Ru), or other suitable conductive metal. The first electrode 124 may include a single conductive material or a suitable combination of any conductive materials. An additional ILD layer 114 material is deposited to fill the rest of the column 122, as indicated by the dashed frame 126. To form a planar surface, the OPL 116, the excess material for forming the first electrode 124, and the excess ILD layer 114 are planarized by the CMP process. This planarization forms a flat surface across the top of the ILD layer 114 and the top of the hard mask 112.

[0027] Figure 8(A) shows a cross-section A of the PCM device 100 after the formation of a third column, according to one embodiment of the present invention. Figure 8(B) shows a cross-section B of the PCM device 100 after the formation of a third column, according to one embodiment of the present invention. An OPL 116 or any other suitable masking layer is formed on top of the hard mask 112 and the ILD layer 114. The OPL 116 is patterned to form a third column 128, which is located next to the position of the first column 118. The space containing the third column 128 is formed by removing a portion of the ILD layer 114 material adjacent to the hard mask 112 and the second sacrificial layer 120. When this portion of the ILD layer 114 is removed to form the third column 128, the sides of the hard mask 112 and the sides of the second sacrificial layer 120 are exposed. The third column 128 extends downward to below the bottom surface of the second sacrificial layer 120.

[0028] Figure 9(A) shows a cross-section A of the PCM device 100 after the sacrificial layer has been removed, according to one embodiment of the present invention. Figure 9(B) shows a cross-section B of the PCM device 100 after the sacrificial layer has been removed, according to one embodiment of the present invention. The OPL 116 has been removed to expose the top surface of the ILD layer 114 and the top of the hard mask 112. The first sacrificial layer 110 and the second sacrificial layer 120 have been removed. The removal of the first sacrificial layer 110 and the second sacrificial layer 120 forms a cavity 129 in the location where these layers were located. The cavity 129 is defined by the bottom wall of an optional resistive liner 108 (or the first dielectric layer 106 when the resistive liner 108 is not present). The first electrode 124 serves as the first side wall of the cavity 129. The hard mask 112 acts as the top wall of the cavity 129, and the hard mask 112 acts as the second side wall of the cavity 129. The bottleneck 130 is exposed by the removal of the first and second sacrificial layers 110 and 120. The bottleneck 130 is formed by a portion of the hard mask 112 extending downward and the end of the resistant liner 108. In some embodiments, the first sacrificial layer 110 and the second sacrificial layer 120 contain SiGe or Ge, which can be removed, for example, by an aqueous solution containing ammonia and hydrogen peroxide or by gas-phase hydrogen chloride (HCl).

[0029] Figure 10(A) shows a cross-section A of the PCM device 100 after the formation of the phase-change material layer according to one embodiment of the present invention. Figure 10(B) shows a cross-section B of the PCM device 100 after the formation of the phase-change material layer according to one embodiment of the present invention. The phase-change material (PCM) layer 132 is formed by atomic layer deposition (ALD) or a similar deposition technique. The PCM layer 132 can essentially be composed of a phase-change material such as germanium-antimony-tellurium (GST), gallium-antimony-tellurium (GaST), or silver-iridium-antimony-telluride (AIST) material, but other materials may be used as appropriate. While not limited to these, other PCM materials may also be used, including germanium-tellurium composite materials (GeTe), Si-Sb-Te (silicon-antimony-tellurium) alloys, Ga-Sb-Te (gallium-antimony-tellurium) alloys, Ge-Bi-Te (germanium-bismuth-tellurium) alloys, In-Se (indium-tellurium) alloys, As-Sb-Te (arsenic-antimony-tellurium) alloys, Ag-In-Sb-Te (silver-indium-antimony-tellurium) alloys, Ge-In-Sb-Te alloys, Ge-Sb alloys, Sb-Te alloys, Si-Sb alloys, Ge-Te alloys, and combinations thereof. PCM materials can be undoped PCM materials or doped PCM materials (e.g., doped with one or more of the following materials: oxygen (O), nitrogen (N), silicon (Si), or titanium (Ti)). The terms "composed essentially" and "consist essentially" as used herein in relation to materials in different layers indicate that, if other materials are present, those materials do not significantly alter the fundamental properties of the material being described. For example, a PCM material consisting essentially of GST material does not contain other materials that significantly alter the fundamental properties of the GST material.

[0030] The PCM layer 132 is formed by using an ALD or CVD process, thus allowing the PCM layer 132 to form along the walls within the cavity 129. The PCM layer 132 is also formed within the cavity formed by the removal of the second sacrificial layer 120 and within the third column 128. The PCM layer 132 is initially formed along the entire wall of the cavity 129 formed by the removal of the first sacrificial layer 110, but the PCM layer 132 does not completely fill this cavity. The bottleneck 130 is closed off by the PCM layer 132, thus preventing the PCM layer 132 from filling the cavity. Figures 10(A) and 10(B) show that the PCM layer 132 is formed along the wall of the cavity 129, while the center of the cavity 129 remains empty.

[0031] Figure 11(A) shows a cross-section A of the PCM device 100 after the PCM layer 132 has been removed from the third column 128, according to one embodiment of the present invention. Figure 11(B) shows a cross-section B of the PCM device 100 after the PCM layer 132 has been removed from the third column 128, according to one embodiment of the present invention. The portions of the PCM layer 132 located on the ILD layer 114, the PCM layer 132 located on the hard mask 112, and the PCM layer 132 located within the third column 128 have been removed. This removal of the PCM layer can be achieved, for example, by a reactive ion etching (RIE) process.

[0032] Figure 12(A) shows a cross-section A of the PCM device 100 after the formation of the second electrode 134 according to one embodiment of the present invention. Figure 12(B) shows a cross-section B of the PCM device 100 after the formation of the second electrode 134 according to one embodiment of the present invention. The second electrode 134 is formed in the third column 128 and the second electrode 134 is in contact with the sidewall of the hard mask 112 and the sidewall of the PCM layer 132. Any excess material used to form the second electrode 134 (e.g., material on the hard mask 112 or material on the ILD layer 114 or both) has been planarized, so that the top surface of the second electrode 134 is planar with the top of the hard mask 112 and the top surface of the ILD layer 114. The second electrode 134 can be made of, for example, Cu, W or other suitable conductive metal.

[0033] Figure 13(A) shows a cross-section A of the PCM device 100 after the formation of the top metal wire 136 according to one embodiment of the present invention. Figure 13(B) shows a cross-section B of the PCM device 100 after the formation of the top metal wire 136 according to one embodiment of the present invention. Additional ILD material is deposited to extend the ILD layer 114 in such a manner that additional ILD material is formed on top of the hard mask 112, the second electrode 134, and the previously formed ILD layer 114. The ILD layer 114 is patterned to form a cavity located above the second electrode 134. The top metal wire 136 is formed within the cavity located above the second electrode 134. Thus, the first electrode 124 is in contact with the bottom metal wire 104, while the second electrode 134 is in contact with the second metal wire 136.

[0034] Figure 14(A) shows a cross-section A of the PCM device 100 after the formation of the void 138, according to one embodiment of the present invention. Figure 14(B) shows a cross-section B of the PCM device 100 after the formation of the void 138, according to one embodiment of the present invention. Electrical pulses are passed through the bottom electrode 124, the PCM layer 132, and the top electrode 134. These electrical pulses heat the PCM layer 132 formed along the entire wall of the cavity 129, thereby causing the PCM layer 132 to change phase and collect at the bottom of the cavity 129. The PCM layer 132 located on an optional resistive liner 108 has a thickness that varies along the horizontal axis of the cavity 129. The PCM layer 132 has a thicker region 132W located closer to the side wall of the cavity 129. The PCM layer 132 has a narrower region 132N in the central region of the cavity 129. The void 138 is formed above the PCM layer 132 in the cavity 129. The void 138 consists of space or a void of material. The void 138 is initially formed by the melting of the PCM layer 132 located on the sides and top of the cavity 129. The section of the PCM layer 132 located below the void 138 has a variable thickness such that the PCM layer 132 becomes thicker towards the sides of the void 138 (side walls of the cavity 129) and thinner towards the center of the void 138. The void 138 allows the volume of the PCM layer 132 to expand and limit during the operation / programming of the PCM device 100.

[0035] Figure 15(A) shows a cross-section A of the PCM device 200 after material stack formation according to one embodiment of the present invention. Figure 15(B) shows a cross-section B of the PCM device 200 after material stack formation according to one embodiment of the present invention. The PCM device 200 includes a substrate 202, a bottom metal wire 204, a first dielectric layer 206, a phase-change memory (PCM) layer 208, a barrier layer 210, a sacrificial layer 212, and a hard mask 214. The substrate 202 can be, for example, a material containing, for example, silicon (Si), silicon germanium (SiGe), silicon carbide (SiC), Si:C (carbon-doped silicon), silicon germanium carbide (SiGeC), carbon-doped silicon germanium (SiGe:C), III-V group, II-V group compound semiconductors, or other similar semiconductors, for example. Furthermore, multiple layers of these semiconductor materials can also be used as the semiconductor material of the substrate 202. In some embodiments, the substrate 202 includes semiconductor material and dielectric material. The semiconductor substrate 202 may further include organic semiconductors or layered semiconductors such as Si / SiGe, silicon-on-insulators, or SiGe-on-insulators. Part or all of the semiconductor substrate 202 may be amorphous, polycrystalline, or single-crystal. The semiconductor substrate 202 may be a doped semiconductor substrate or an undoped semiconductor substrate, or a semiconductor substrate that contains both doped and undoped regions. In some embodiments, the substrate 202 may include any suitable layer that can function as a base for transistors, isolation structures (such as shallow trench isolation), contacts, other device structures such as wires (not shown), or PCM devices 200. The first dielectric layer 206 may consist of, for example, SiN or other suitable dielectric material.

[0036] The PCM layer 208 can essentially be composed of phase-change materials such as germanium-antimony-tellurium (GST), gallium-antimony-tellurium (GaST), or silver-iridium-antimony-telluride (AIST) materials, but other materials may be used as appropriate. While not limited to these, other PCM materials may also be used, including germanium-tellurium composite materials (GeTe), Si-Sb-Te (silicon-antimony-tellurium) alloys, Ga-Sb-Te (gallium-antimony-tellurium) alloys, Ge-Bi-Te (germanium-bismuth-tellurium) alloys, In-Se (indium-tellurium) alloys, As-Sb-Te (arsenic-antimony-tellurium) alloys, Ag-In-Sb-Te (silver-indium-antimony-tellurium) alloys, Ge-In-Sb-Te alloys, Ge-Sb alloys, Sb-Te alloys, Si-Sb alloys, Ge-Te alloys, and combinations thereof. PCM material 112 can be an undoped PCM material or a doped PCM material (e.g., doped with one or more of the following materials: oxygen (O), nitrogen (N), silicon (Si), or titanium (Ti)). The terms “essentially composed” and “essentially” as used herein with respect to materials of different layers indicate that, if other materials are present, those materials do not significantly alter the fundamental properties of the material mentioned. For example, the PCM material 112, which is essentially a GST material, does not contain any other materials that significantly alter the fundamental properties of the GST material. The barrier layer 210 acts as a diffusion barrier to prevent mixing of the PCM layer 208 and the first sacrificial layer 212. The barrier layer 210 may be made of, for example, SiO2 or other suitable barrier material.

[0037] Figure 16(A) shows a cross-section A of the PCM device 200 after the formation of the masking layer 216, according to one embodiment of the present invention. Figure 16(B) shows a cross-section B of the PCM device 200 after the formation of the masking layer 216, according to one embodiment of the present invention. The masking layer 216 is formed on the hard mask 214. The masking layer 216 is patterned (e.g. by lithography and subsequent reactive ion etching (RIE)) to form columns constituting the PCM device 200. The masking layer 216 can be made of amorphous silicon, for example.

[0038] Figure 17(A) shows a cross-section A of the PCM device 200 after column formation according to one embodiment of the present invention. Figure 17(B) shows a cross-section B of the PCM device 200 after column formation according to one embodiment of the present invention. The PCM column 222 is formed by removing material from these different layers to form a cutout 218. The cutout 218 extends downward from the top of the masking layer 216 to the top surface of the bottom metal wire 204. The masking layer 216 is recessed to allow the formation of a first spacer 220. The first spacer 220 is formed on the hard mask 214 on each side of the cutout 218, and the first spacer 220 is adjacent to the masking layer 216. The first spacer 220 is located where electrodes will be manufactured in a downstream process. The first spacer 220 may be made of, for example, SiN.

[0039] Figure 18(A) shows a cross-section A of the PCM device 200 after dielectric isolation of different PCM columns 222 according to one embodiment of the present invention. Figure 18(B) shows a cross-section B of the PCM device 200 after dielectric isolation of different PCM columns 222 according to one embodiment of the present invention. The cutout 218 is filled with an isolation layer 224. The isolation layer 224 electrically isolates adjacent PCM columns 222 from each other. The isolation layer 224 can be made of a dielectric material such as SiO2 or other suitable dielectric material.

[0040] Figure 19(A) shows a cross-section A of the PCM device 200 after the formation of electrode cutouts according to one embodiment of the present invention. Figure 19(B) shows a cross-section B of the PCM device 200 after the formation of electrode cutouts according to one embodiment of the present invention. The first spacer 220 has been removed and electrode trenches 226 and 228 have been formed on both sides of the isolation layer 224. The first electrode trench 226 extends downward from the top of the masking layer 216 to the top of the dielectric layer 206. The first electrode trench 226 is located next to the first side surface of the isolation layer 224. The second electrode trench 228 extends downward from the top of the masking layer 216 to the top of the bottom metal wire 204. The second electrode trench 228 is located next to the second side surface of the isolation layer 224, with the first side surface being on the opposite side of the second side surface.

[0041] Figure 20(A) shows a cross-section A of the PCM device 200 after the formation of the first and second electrodes according to one embodiment of the present invention. Figure 20(B) shows a cross-section B of the PCM device 200 after the formation of the first and second electrodes according to one embodiment of the present invention. The first electrodes 230A and 230B are formed in the first electrode trench 226. The second electrodes 232A and 232B are formed in the second electrode trench 228. The first electrode 230A is separated from the second electrode 232A by a separation layer 224. The first electrode 230A and the second electrode 232A are connected to different PCM columns 222. For example, the first electrode 230B and the second electrode 232A are connected to the first PCM column 222A, while the second electrode 232B is connected to the second PCM column 222B. A second PCM column 222B is connected to another first electrode (not shown). The second electrode 232A and the first electrode 230B are located on opposite sides of the first PCM column 222A. The first electrodes 230A and 230B and the second electrodes 232A and 232B can be made of, for example, tungsten (W), copper (Cu), cobalt (Co), tantalum nitride (TaN), titanium nitride (TiN), ruthenium (Ru), or other suitable conductive metals. The first electrodes 230A and 230B and the second electrodes 232A and 232B can include a single conductive material or any suitable combination of conductive materials.

[0042] Figure 21(A) shows a cross-section A of the PCM device 200 after the formation of the second spacer 234 according to one embodiment of the present invention. Figure 21(B) shows a cross-section B of the PCM device 200 after the formation of the second spacer 234 according to one embodiment of the present invention. The second spacer 234 is formed on each of the first electrodes 230A and 230B and on each of the second electrodes 232A and 232B. The second spacer 234 can be made of a dielectric material such as SiN.

[0043] Figure 22(A) shows a cross-section A of the PCM device 200 after the formation of the third spacer according to one embodiment of the present invention. Figure 22(B) shows a cross-section B of the PCM device 200 after the formation of the third spacer according to one embodiment of the present invention. The masking layer 216 has been removed and the third spacer 236 has been formed on the hard mask 214 and the dielectric layer 206. The third spacer 236 may be made of a dielectric material such as SiO2. The third spacer 236 is patterned to indicate the location where removal channels are formed in each of the PCM columns 222.

[0044] Figure 23(A) shows a cross-section A of the PCM device 200 after the formation of the removal channel 238 according to one embodiment of the present invention. Figure 23(B) shows a cross-section B of the PCM device 200 after the formation of the removal channel 238 according to one embodiment of the present invention. The removal channel 238 is etched into each of the PCM columns 222. The removal channel 238 extends downward into the first sacrificial layer 212. The bottom of the removal channel 238 is located within the first sacrificial layer 212. The removal channel 238 allows the etching solution to be applied to the first sacrificial layer 212.

[0045] Figure 24(A) shows a cross-section A of the PCM device 200 after the removal of the first sacrificial layer 212 according to one embodiment of the present invention. Figure 24(B) shows a cross-section B of the PCM device 200 after the removal of the first sacrificial layer 212 according to one embodiment of the present invention. An etching solution is introduced into each of the removal channels 238, where the etching solution interacts with the first sacrificial layer 212. This etching solution and washing process removes the first sacrificial layer 212 from each of the PCM columns 222. In some embodiments, the first sacrificial layer 212 contains SiGe or Ge, which can be removed by an aqueous solution containing, for example, ammonia and hydrogen peroxide, or by gas-phase hydrogen chloride (HCl). The removal of the first sacrificial layer 212 in each of the PCM columns 222 forms a cavity 240. The cavity 240 or void allows the PCM layer 208 to expand and limit during operation / programming of the PCM device 200.

[0046] Figure 25(A) shows a cross-section A of the PCM device 200 after the removal channels have been sealed, according to one embodiment of the present invention. Figure 25(B) shows a cross-section B of the PCM device 200 after the removal channels have been sealed, according to one embodiment of the present invention. To seal each of the removal channels 238, additional third spacer material 236 is deposited on top of the previously formed third spacer 236. The new third spacer 236A extends downward into the removal channel but not into the cavity 240.

[0047] Figure 26(A) shows a cross-section A of the PCM device 200 after the formation of the upper metal wire 244, according to one embodiment of the present invention. Figure 26(B) shows a cross-section B of the PCM device 200 after the formation of the upper metal wire 244, according to one embodiment of the present invention. A second dielectric layer 242 is formed on the third spacer 236. The second dielectric layer 242 is patterned to expose the second spacer 234 located on the first electrodes 230A and 230B. The exposed second spacer 234 is removed to expose the tops of the first electrodes 230A and 230B. The upper metal wire 244 is formed on the first electrodes 230A and 230B. The cavity 240 / void can accommodate volume changes of the PCM layer 208 when current / electrical pulses are applied to the first electrode 230B or the second electrode 232A via the upper metal wire 244 or the bottom metal wire 204.

[0048] Figure 27(A) shows a cross-section A of a PCM device 300, including a resistive liner 350 located below the PCM layer, according to one embodiment of the present invention. Figure 27(B) shows a cross-section B of a PCM device 300, including a resistive liner 350 located below the PCM layer, according to one embodiment of the present invention. The PCM device 300 is the same as the PCM device 200 described above. The step of forming the cavity 240 in the PCM device 300 is the same as the step of forming the cavity 240 in the PCM device 200. The layers and reference numerals used in Figures 27(A) and 27(B) correspond to the same layers and reference numerals used above. The difference is that when forming the initial PCM device 300, an additional resistive liner 350 is formed on top of the first dielectric layer 206, and the PCM layer 208 is formed on top of the resistive liner 350. The resistive liner 350 can be made of, for example, amorphous carbon, tantalum nitride (TaN), tungsten nitride (WN), cobalt tungsten (CoW), nickel tungsten (NiW), yttrium oxide (YO), or other suitable material. The resistance of the resistive liner 350 is considerably higher than the resistance of the PCM material in a low-resistance state (e.g., 10 to 40 times or about 20 times) and considerably lower than the resistance of the PCM material in a high-resistance state (e.g., 1 / 5 to 1 / 50 or about 1 / 10). The resistive liner 350 shifts the resistive drift of the PCM layer 208 during the operation of the PCM device 300.

[0049] While the present invention has been shown and described with respect to some exemplary embodiments, those skilled in the art will understand that various modifications of form and detail can be made to those embodiments without departing from the scope of the invention as defined by the appended claims and their equivalents.

[0050] The descriptions of various embodiments of the present invention are presented for illustrative purposes only and are not intended to be exhaustive or limitful to the disclosed embodiments. Many modifications and variations that do not depart from the scope of the described embodiments will become apparent to those skilled in the art. The terminology used herein has been selected to best describe the principles, practical applications, or technical improvements not found in commercially available art of one or more embodiments, or to enable those skilled in the art to understand the embodiments disclosed herein.

Claims

1. A phase-change memory (PCM) cell, A first electrode located on the substrate, A phase change material layer located next to the first electrode, wherein the first side surface of the phase change material layer is in direct contact with the first electrode, A second electrode located adjacent to the phase change material layer, wherein the second electrode is in direct contact with a second side surface of the phase change material layer, and the first side surface and the second side surface are different sides of the phase change material layer. A void located directly above the upper surface of the phase change material layer, which provides space for the phase change material to expand or restrict, and A PCM cell equipped with the following features.

2. A hard mask layer located above the void to form the top wall of the cavity in which the phase-change material layer is located. The PCM cell according to claim 1, further comprising:

3. The PCM cell according to claim 2, wherein the hard mask layer further forms the side walls of the cavity.

4. A bottom metal wire formed on the substrate, to which the first electrode is connected, A dielectric layer located on the bottom metal wire, wherein the phase change material layer is located on the dielectric layer and The PCM cell according to claim 1, further comprising:

5. A resistive liner located directly on the dielectric layer, wherein a first portion of the phase change material layer is located directly on the resistive liner. The PCM cell according to claim 4, further comprising the features described above.

6. The PCM cell according to claim 5, wherein a second portion of the phase change material layer is directly formed on the dielectric layer, and the second portion of the phase change material layer includes a second side surface of the phase change material layer that is in direct contact with the second electrode.

7. The PCM cell according to claim 6, wherein the void is located above the first portion of the phase change material layer.

8. The PCM cell according to claim 5, wherein the thickness of the first portion of the phase change material layer varies along the length direction of the resistive liner.

9. The PCM cell according to claim 8, wherein the first portion of the phase change material layer is thicker on the first side surface of the phase change material layer that is in direct contact with the first electrode.

10. The hard mask layer is located above the void to form the top wall of the cavity in which the phase change material layer is located, and the hard mask layer further forms the side wall of the cavity. Furthermore, The first portion of the phase change material layer is thicker in the section that is in direct contact with the hard mask layer forming the side wall of the cavity in which the phase change material layer is formed. The PCM cell according to claim 9.

11. The PCM cell according to claim 10, wherein the first portion of the phase change material layer becomes narrower toward the central region of the cavity.

12. The PCM cell according to claim 1, wherein the phase change material layer includes a first section in contact with the first electrode, the phase change material layer includes a second section in contact with the second electrode, and the void is located above the first section of the phase change material layer.

13. A hard mask layer, wherein a first portion of the hard mask layer is located above the void to form the top wall of the cavity in which the first section of the phase change material layer is located, and a second portion of the hard mask layer forms the side wall of the cavity, and the second portion of the hard mask layer is located above the second section of the phase change material layer. The PCM cell according to claim 12, further comprising:

14. The PCM cell according to claim 13, wherein the second section of the phase change material layer is in direct contact with the bottom surface of the second portion of the hard mask layer.

15. A bottom metal wire formed on the substrate, to which the first electrode is connected, A dielectric layer located on the bottom metal wire, A resistive liner is directly positioned on the dielectric layer, the first section of the phase change material layer is directly positioned on the resistive liner, and a bottleneck is formed between the second portion of the hard mask layer and the resistive liner. The PCM cell according to claim 13, further comprising:

16. The PCM cell according to claim 1, wherein the phase change material is selected from the group consisting of germanium-tellurium composite material (GeTe), Si-Sb-Te (silicon-antimony-tellurium) alloy, Ga-Sb-Te (gallium-antimony-tellurium) alloy, Ge-Bi-Te (germanium-bismuth-tellurium) alloy, In-Se (indium-tellurium) alloy, As-Sb-Te (arsenic-antimony-tellurium) alloy, Ag-In-Sb-Te (silver-indium-antimony-tellurium) alloy, Ge-In-Sb-Te alloy, Ge-Sb alloy, Sb-Te alloy, Si-Sb alloy, Ge-Te alloy, and combinations thereof.

17. A phase-change memory (PCM) cell, The bottom metal wire located on the circuit board, A dielectric layer located above the bottom metal layer, A phase change material layer located above the dielectric layer, A barrier layer located on the aforementioned phase change material layer, The void is located directly above the barrier layer and provides space for the phase change material to expand or be restricted, The first layer forming the top wall of the aforementioned void, A first electrode extending upward from the bottom metal wire, wherein the first electrode is in direct contact with the first side wall of the dielectric layer, the first side wall of the phase change material layer, the first side wall of the barrier layer, and the first side wall of the first layer, and the first electrode forms the first side wall of the void, A second electrode extending downward from the top metal wire, wherein the second electrode is in direct contact with the second sidewall of the phase change material layer, the second sidewall of the barrier layer, and the second sidewall of the first layer, the second electrode is in direct contact with the top surface of the dielectric layer, and the second electrode forms the second sidewall of the void, and A PCM cell equipped with the following features.

18. A resistive liner located directly on the dielectric layer, wherein the phase change material layer is located directly on the resistive liner. The PCM cell according to claim 17, further comprising:

19. Forming a first electrode and a second electrode on a substrate, A phase change material layer is formed on the first electrode and the second electrode, respectively, with different first and second sides in physical and electrical contact. A void is formed directly above the upper surface of the phase change material layer. A method that includes this.

20. The method according to claim 19, wherein the phase change material is selected from the group consisting of germanium-tellurium composite material (GeTe), Si-Sb-Te (silicon-antimony-tellurium) alloy, Ga-Sb-Te (gallium-antimony-tellurium) alloy, Ge-Bi-Te (germanium-bismuth-tellurium) alloy, In-Se (indium-tellurium) alloy, As-Sb-Te (arsenic-antimony-tellurium) alloy, Ag-In-Sb-Te (silver-indium-antimony-tellurium) alloy, Ge-In-Sb-Te alloy, Ge-Sb alloy, Sb-Te alloy, Si-Sb alloy, Ge-Te alloy, and combinations thereof.

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