Indication device

Abstract

To provide a semiconductor device having a capacitor element having a high opening ratio and capable of increasing a charge capacity, and provide a semiconductor device capable of reducing consumption power.SOLUTION: A display device has: a transistor including a semiconductor film with a light-transmitting property; a capacitor element having a dielectric film provided between a pair of electrodes; an insulating film provided on the semiconductor film with a light-transmitting property; and a first light-transmitting conductive film provided on the insulating film. The capacitor element has: the first light-transmitting conductive film functioning as one electrode; the insulating film functioning as a dielectric; and a second light-transmitting conductive film facing the first light-transmitting conductive film through the insulating film and functioning as the other electrode. The second light-transmitting conductive film is a metal oxide film including a dopant that is formed on the same surface as the semiconductor film with a light-transmitting property of the transistor.SELECTED DRAWING: Figure 15

Description

[Technical Field]

[0001] The inventions disclosed herein relate to semiconductor devices. [Background technology]

[0002] In recent years, flat panel displays such as liquid crystal displays (LCDs) have become widely popular. It is coming. In display devices such as flat panel displays, the row and column directions are Within the installed pixel, there is a transistor which is a switching element, and the transistor and electricity A liquid crystal element is provided, and a capacitive element is provided, connected in parallel with the liquid crystal element. ru.

[0003] The semiconductor material constituting the semiconductor film of the transistor is amorphous (non-crystalline). Silicon semiconductors, such as silicon or polycrystalline silicon, are commonly used.

[0004] Furthermore, metal oxides that exhibit semiconductor properties (hereinafter referred to as oxide semiconductors) are used in transistors. It is a semiconductor material that can be applied to semiconductor films. For example, zinc oxide or In-Ga-Zn based acids. A technique for fabricating transistors using synthetic semiconductors has been disclosed (Patent Document 1 and Patent Document 2). (See Document 2.)

[0005] Furthermore, in order to increase the aperture ratio, it is provided on the same surface as the oxide semiconductor film of the transistor. The oxide semiconductor film and the pixel electrodes connected to the transistor are provided at a predetermined distance apart. A display device having a capacitive element has been disclosed (see Patent Document 3). [Prior art documents] [Patent Documents]

[0006] [Patent Document 1] Japanese Patent Publication No. 2007-123861 [Patent Document 2] Japanese Patent Publication No. 2007-96055 [Patent Document 3] U.S. Patent No. 8102476 [Overview of the project] [Problems that the invention aims to solve]

[0007] A capacitive element has a dielectric film between a pair of electrodes, and of the pair of electrodes, at least The other electrode is a gate electrode, source electrode, or drain electrode that constitutes a transistor. They are often formed with a conductive film that has light-shielding properties.

[0008] Furthermore, the larger the capacitance value of the capacitive element, the more the liquid crystal element's liquid crystals react when an electric field is applied. The period during which the orientation of crystal molecules can be kept constant can be extended. (Displaying a still image) In a display device, extending the period reduces the number of times the image data is rewritten. This can be done, and a reduction in power consumption can be expected.

[0009] However, if one electrode of a capacitive element is formed of a semiconductor film, then markings on the semiconductor film Depending on the applied potential, the capacitance value charged to the capacitive element may be lower than a predetermined value. Furthermore, the period during which the orientation of the liquid crystal molecules in the liquid crystal element is kept constant becomes shorter, and the number of image data rewrites decreases. As the number increases, power consumption also increases.

[0010] Furthermore, in order to increase the charge capacitance of a capacitive element, the occupied area of ​​the capacitive element must be increased. Specifically, one method is to increase the area over which the pair of electrodes overlap. However, In the above-mentioned display device, in order to increase the area in which the pair of electrodes overlap, light-shielding properties are provided. Increasing the area of ​​the conductive film reduces the aperture ratio of the pixels, which degrades the display quality of the image.

[0011] Therefore, in view of the above problems, one aspect of the present invention provides a high aperture ratio and increased charge capacity. One of the objectives is to provide a semiconductor device having a capacitive element that can be used for this purpose. One of the objectives is to provide a semiconductor device capable of reducing power consumption. [Means for solving the problem]

[0012] One aspect of the present invention relates to a transistor comprising a translucent semiconductor film and between a pair of electrodes. A capacitive element provided with a dielectric film, an insulating film provided on a light-transmitting semiconductor film, and an insulating film A capacitive element has a first light-transmitting conductive film provided on the edge film, and one of the electric A first light-transmitting conductive film that functions as an electrode, and the insulating film that functions as a dielectric, This insulating film faces the first light-transmitting conductive film through the insulating film and functions as the other electrode. It has a second light-transmitting conductive film. Furthermore, the second light-transmitting conductive film is made of a translucent material. A translucent semiconductor film of zista is formed on the same surface as a metal acid containing a dopant. It is a methyl film.

[0013] The translucent semiconductor film contained in the transistor is formed using an oxide semiconductor. This is possible. Oxide semiconductors have a large energy gap of 3.0 eV or more, and are visible to light. This is because the transmittance to the other is high. In this specification, the transmittance contained in the transistor is Metal oxides that exhibit semiconductor properties, such as photosensitive semiconductor films, are described as oxide semiconductors. Furthermore, the second light-transmitting conductive film included in the capacitive element exhibits conductive properties, The film in question will be described as a metal oxide.

[0014] As a second light-transmitting conductive film that functions as the other electrode of the capacitive element, Using the semiconductor film formed in the process of forming the semiconductor film contained in the TA, doping is applied to the semiconductor film. By adding a component, the conductivity can be increased, resulting in a metal oxide film with conductive properties. It can do that. For example, hydrogen, boron, nitrogen, fluorine, aluminum, phosphorus, arsenic, indium, One or more dopants selected from tin, antimony, and noble gas elements are implanted by ion implantation or It can be added to a semiconductor film by ion doping or other methods, or the semiconductor film can be The above dopant can also be added by exposing the material to a plasma containing the above elements. The conductivity of the second light-transmitting conductive film, which is the other electrode of the capacitive element, is 10 S / cm or less. The temperature should be 1000 S / cm or less, preferably 100 S / cm or more and 1000 S / cm or less.

[0015] Furthermore, in a capacitive element, the dielectric film is a translucent semiconductor film included in the transistor. Since an insulating film is provided on top, the same layered structure as the insulating film can be achieved. For example, an insulating film provided on a semiconductor film contained in a transistor is an oxide insulating film and a nitride insulating film. When an insulating film layered structure is used, the dielectric film of the capacitive element is a layered structure of an oxide insulating film and a nitride insulating film. It can be made into a structure.

[0016] Furthermore, in capacitive elements, the insulating film provided on the semiconductor film contained in the transistor is acid When an oxide insulating film and a nitride insulating film are used, the capacitive element is formed after the oxide insulating film is formed. By removing the oxide insulating film only in the region, the dielectric film of the capacitive element is made a single layer of nitride insulating film. It can be structured as follows: In other words, the nitride insulating film can be used as the other electrode of a capacitive element. It is in contact with a functional second light-transmitting conductive film. The second light-transmitting conductive film is a transistor Formed using a semiconductor film that is formed simultaneously with a translucent semiconductor film contained in the zista. Furthermore, the semiconductor film comes into contact with the nitride insulating film, and the nitride insulating film and the semiconductor film Defect levels (interface levels) are formed at the interface. Or / and the nitride insulating film is subjected to plasma CVD. When a film is deposited using either a laser or sputtering method, the semiconductor film is exposed to plasma, causing oxygen vacancies. Furthermore, nitrogen and / or hydrogen contained in the nitride insulating film migrate to the semiconductor film. This occurs when hydrogen contained in the nitride insulating film enters a defect level or oxygen vacancy, which is a carrier. Electrons are generated. As a result, the conductivity of the semiconductor film increases, becoming n-type, and its conductivity increases. It becomes a film that possesses conductive properties. In other words, it is possible to form a metal oxide film that has conductive properties. Furthermore, since the thickness of the dielectric film can be reduced, the charge capacitance of the capacitive element can be increased. It can be done.

[0017] Based on the above, in a capacitive element, by having a structure in which the nitride insulating film is in contact with the semiconductor film, Ion implantation or ion doping is used to add a dopant that increases conductivity to the above semiconductor. This eliminates the need for the additive process in the film, improving the yield of semiconductor devices and reducing manufacturing costs. This can be reduced.

[0018] Furthermore, the semiconductor film contained in the transistor is an oxide semiconductor film, and the oxide insulating film and nitride insulating film are used. When the layered structure of the edge film is an insulating film provided on the semiconductor film, the oxide insulating film is nitrogen It is preferable that it is impermeable to nitrogen, i.e., has a barrier property against nitrogen.

[0019] In this way, nitrogen is deposited into the oxide semiconductor film, which is the semiconductor film contained in the transistor. This suppresses the diffusion of one or both hydrogen atoms, thereby suppressing fluctuations in the transistor's electrical characteristics. It is possible.

[0020] Furthermore, when the first light-transmitting conductive film is connected to a transistor, the first light-transmitting conductive film The conductive film functions as a pixel electrode.

[0021] When the first light-transmitting conductive film functions as a pixel electrode, the capacitance lines are parallel to the scan lines. It extends in the direction and is located on the same surface as the scanning line. The other electrode of the capacitive element (second A conductive film having light-transmitting properties is used when forming the source or drain electrode of a transistor. It is electrically connected to the capacitance line by a conductive film that is formed simultaneously.

[0022] Furthermore, the capacitance lines are not limited to extending in a direction parallel to the scanning lines and being provided on the same surface as the scanning lines. Furthermore, it extends in a direction parallel to the signal line including the source electrode or drain electrode of the transistor, and It is provided on the same surface as the signal line, and the other electrode of the capacitive element (a second translucent conductor) It may be electrically connected to the film.

[0023] Furthermore, the capacitance lines are formed using a second light-transmitting conductive film contained within the capacitance element. That's good too.

[0024] Furthermore, the capacitance lines may be connected to each of the capacitive elements contained in multiple adjacent pixels. In this case, capacitance lines may be provided between adjacent pixels.

[0025] Furthermore, a second light-transmitting conductive film may be connected to the transistor. In this case, the second A transparent conductive film functions as a pixel electrode, and the first transparent conductive film is a common electrode It functions as polarity and capacitance wiring.

[0026] With the above configuration, the capacitive element is light-transmitting, thus forming a transistor within the pixel. It can be formed in areas other than the area being treated, on a large scale (over a large area). Therefore, the opening ratio can be increased. While doing so, a semiconductor device with increased charge capacity can be obtained. As a result, superior display quality can be achieved. A semiconductor device can be obtained.

[0027] Capacitive elements with light-transmitting properties can be fabricated using the same process as transistors. One electrode of the element forms a translucent conductive film that functions as a pixel electrode or common electrode. The process can be utilized. The other electrode of the capacitive element is included in the transistor. The process of forming a semiconductor film can be utilized. Therefore, the semiconductor film contained in the transistor, The other electrode of the capacitive element is composed of the same metallic element. The dielectric film of the capacitive element is made of transistors. The process of forming an insulating film on the semiconductor film contained in the zista can be utilized.

[0028] Furthermore, the method for manufacturing a semiconductor device according to one aspect of the present invention is also described in relation to one aspect of the present invention. It is included in. [Effects of the Invention]

[0029] According to one aspect of the present invention, a semiconductor having a capacitive element that increases the charge capacitance while increasing the aperture ratio. We can provide a device. We can also provide a semiconductor device with low power consumption. ru. [Brief explanation of the drawing]

[0030] [Figure 1]A diagram illustrating a semiconductor device according to one aspect of the present invention, and a circuit diagram illustrating a pixel. [Figure 2] A top view illustrating a semiconductor device according to one aspect of the present invention. [Figure 3] A cross-sectional view illustrating a semiconductor device according to one aspect of the present invention. [Figure 4] A top view illustrating a semiconductor device according to one aspect of the present invention. [Figure 5] A cross-sectional view illustrating a semiconductor device according to one aspect of the present invention. [Figure 6] A cross-sectional view illustrating a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 7] A cross-sectional view illustrating a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 8] A cross-sectional view illustrating a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 9] A cross-sectional view illustrating a semiconductor device according to one aspect of the present invention. [Figure 10] A cross-sectional view illustrating a semiconductor device according to one aspect of the present invention. [Figure 11] A top view illustrating a semiconductor device according to one aspect of the present invention. [Figure 12] A top view illustrating a semiconductor device according to one aspect of the present invention. [Figure 13] A top view illustrating a semiconductor device according to one aspect of the present invention. [Figure 14] A top view illustrating a semiconductor device according to one aspect of the present invention. [Figure 15] A cross-sectional view illustrating a semiconductor device according to one aspect of the present invention. [Figure 16] A cross-sectional view illustrating a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 17] A cross-sectional view illustrating a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 18] A top view illustrating a semiconductor device according to one aspect of the present invention. [Figure 19] A cross-sectional view illustrating a semiconductor device according to one aspect of the present invention. [Figure 20]A cross-sectional view illustrating a semiconductor device according to one aspect of the present invention. [Figure 21] A top view illustrating a semiconductor device according to one aspect of the present invention. [Figure 22] A cross-sectional view illustrating a semiconductor device according to one aspect of the present invention. [Figure 23] A cross-sectional view and a top view illustrating a semiconductor device according to one aspect of the present invention. [Figure 24] A diagram illustrating an electronic device using a semiconductor device according to one aspect of the present invention. [Figure 25] A diagram illustrating an electronic device using a semiconductor device according to one aspect of the present invention. [Figure 26] This is a diagram illustrating the structure of the sample. [Figure 27] This is a diagram illustrating sheet resistance. [Figure 28] This is a diagram illustrating the measurement results of SIMS. [Figure 29] This diagram illustrates the measurement results of ESR. [Figure 30] This diagram illustrates the measurement results of ESR. [Figure 31] This is a diagram illustrating sheet resistance. [Figure 32] This is a diagram illustrating sheet resistance. [Figure 33] A diagram illustrating the bulk model of InGaZnO4 crystals. [Figure 34] A diagram illustrating the formation energy and thermodynamic transition level of VoH. [Figure 35] This diagram illustrates the sample preparation process and the sheet resistance of the sample. [Figure 36] This is a diagram illustrating the sample preparation process and its structure. [Figure 37] This is a diagram illustrating the transmittance of a sample. [Modes for carrying out the invention]

[0031] The embodiments of the present invention will be described in detail below with reference to the drawings. However, the present invention This is not limited to the description below, and its form and details can be changed in various ways, as is the case for those skilled in the art. This will be easily understood. Furthermore, the present invention shall be interpreted as being limited to the contents of the embodiments described below. It is not something that should be done.

[0032] In the configuration of the present invention described below, the same part or part having a similar function The same symbols are used consistently across different drawings, and explanations of their repetition are omitted. When referring to a part that has a function, the hatch pattern is the same, and no special symbol is assigned. be.

[0033] In each figure described herein, the size of each component, the thickness of the film, or the area are for clarity. Therefore, it may be exaggerated. Thus, it is not necessarily limited to that scale.

[0034] In this specification and elsewhere, the ordinal numbers used as "1st," "2nd," etc., are for convenience only. This does not indicate the order of processes or the order of lamination. Furthermore, in order to specify the invention in this specification, etc. This does not indicate a specific name as a matter of fact.

[0035] Furthermore, the functions of "source" and "drain" in this invention are related to the operation of the circuit. The order may change if the direction changes, etc. Therefore, in this specification, The terms "source" and "drain" may be used interchangeably.

[0036] Furthermore, voltage refers to the potential difference between two points, while electric potential refers to the electrostatic field at a given point. This refers to the electrostatic energy (electrical potential energy) possessed by a unit charge within a given object. Furthermore, generally speaking, the potential difference between the potential at a certain point and a reference potential (for example, the ground potential) This is simply called electric potential or voltage, and the terms electric potential and voltage are often used as synonyms. Therefore, unless otherwise specified in this specification, potential may be read as voltage. You may substitute "voltage" with "potential."

[0037] In this specification, when etching is performed after photolithography: The mask formed by photolithography shall be removed.

[0038] (Embodiment 1) In this embodiment, a semiconductor device, which is one aspect of the present invention, will be described with reference to the drawings. In this embodiment, a semiconductor device that is one aspect of the present invention is described using a liquid crystal display device as an example. explain.

[0039] <Configuration of semiconductor device> Figure 1(A) shows an example of a semiconductor device. The semiconductor device shown in Figure 1(A) has a pixel section 10 0, the scan line drive circuit 104, and the signal line drive circuit 106 are each arranged in parallel or approximately parallel. Furthermore, m scan lines 107 whose potential is controlled by the scan line drive circuit 104, and each n lines are arranged in parallel or nearly parallel, and their potential is controlled by the signal line drive circuit 106. It has a signal line 109 and a pixel section 100 arranged in a matrix. It has pixels 201. Also, along the scan line 107, each is arranged parallel or substantially parallel to the others. It has capacitance lines 115. The capacitance lines 115 are parallel to each other along the signal lines 109 or They may be arranged approximately parallel to each other.

[0040] Each scan line 107 is one of the pixels 201 arranged in m rows and n columns in the pixel section 100. It is electrically connected to n pixels 201 arranged in any row. Also, each signal line 109 This refers to m pixels 201 arranged in m rows and n columns, where m pixels 20 are located in any of the columns. It is electrically connected to 1. m and n are both integers greater than or equal to 1. Also, each capacitance line 115 This refers to n pixels 201 located in any row among the m rows and n columns of pixels 201. It is electrically connected to 1. Note that the capacitance line 115 is parallel to the signal line 109, and each is parallel to the other. If they are arranged approximately parallel to each other, then any of the pixels 201 arranged in m rows and n columns The m pixels 201 arranged in a row are electrically connected.

[0041] Figure 1(B) is an example of a circuit diagram of pixel 201 in the semiconductor device shown in Figure 1(A). The pixel 201 shown in Figure 1(B) is electrically connected to the scan line 107 and the signal line 109. Transistor 103 and one electrode is electrically connected to the drain electrode of transistor 103. The other electrode is electrically connected to a capacitance line 115 that supplies a constant potential, and a capacitance element 2 05 and the pixel electrode are the drain electrode of transistor 103 and one electrode of capacitive element 205 An electrode (counter electrode) that is electrically connected to and positioned opposite the pixel electrode supplies the counter potential. It has a liquid crystal element 108 that is electrically connected to the wiring.

[0042] The liquid crystal element 108 has a substrate on which transistors 103 and pixel electrodes are formed, and a counter electrode The optical modulation effect of the liquid crystal sandwiched between the formed substrate controls the transmission or non-transmission of light. It is a controllable element. Furthermore, the optical modulation effect of liquid crystals is due to the electric field applied to the liquid crystal (the electric field in the vertical direction or It includes an electric field in an oblique direction.) It is controlled by ). Note that on the substrate on which the pixel electrodes are formed When a counter electrode (also called a common electrode) is formed, the electric field applied to the liquid crystal is a lateral electric field. It becomes a boundary.

[0043] Next, a specific example of pixel 201 of a liquid crystal display device will be described. Top surface of pixel 201 The diagram is shown in Figure 2. Note that the counter electrode and liquid crystal element are omitted in Figure 2.

[0044] In Figure 2, scan line 107 extends in a direction approximately perpendicular to signal line 109 (left-right direction in the figure). It is provided in an extended manner. The signal line 109 is in a direction approximately perpendicular to the scan line 107 (up and down in the figure). The capacity line 115 is provided extending in the direction parallel to the scan line 107. The scan line 107 and capacitance line 115 are connected to the scan line drive circuit 104 (Figure 1 (A See ). ) is electrically connected to ), and signal line 109 is connected to signal line drive circuit 106 (Figure 1 See (A). It is electrically connected to ).

[0045] Transistor 103 is located in the region where scan line 107 and signal line 109 intersect. The transistor 103 comprises at least a semiconductor film 111 having a channel formation region, A gate electrode, a gate insulating film (not shown in Figure 2), a source electrode, and a drain electrode. This includes the region that overlaps with the semiconductor film 111 in scan line 107 is the transistor. It functions as the gate electrode of 103. It is superimposed on the semiconductor film 111 on the signal line 109. The region functions as the source electrode of transistor 103. In the conductive film 113, semiconductor The region superimposed on film 111 functions as the drain electrode of transistor 103. The gate electrode, source electrode, and drain electrode are connected to scan line 107 and signal line 109, respectively. , and sometimes referred to as conductive film 113. Also, in Figure 2, scan line 107 represents the top surface shape. In this case, the edge is located outside the edge of the semiconductor film. Therefore, scan line 107 is backlash It functions as a light-shielding film that blocks light from light sources such as LEDs. As a result, it is included in transistors. Since the semiconductor film 111 is not irradiated with light, fluctuations in the electrical characteristics of the transistor can be suppressed. Cut.

[0046] Furthermore, by processing oxide semiconductors under appropriate conditions, the off-current of transistors can be extremely low. Because it can be reduced, in one aspect of the present invention, the semiconductor film 111 is an oxide semiconductor. This makes it possible to reduce the power consumption of semiconductor devices.

[0047] Furthermore, the conductive film 113 is formed of a conductive film that is light-transmitting through the opening 117. It is electrically connected to electrode 221. Note that in Figure 2, pixel electrode 221 is hatched. The diagram omits some details.

[0048] The capacitive element 205 is located in the region enclosed by the capacitance line 115 and the signal line 109 within the pixel 201. Capacitive element 205 is connected via a conductive film 125 provided in the opening 123. It is electrically connected to 115. The capacitive element 205 has a light-transmitting conductive film 119, A light-transmitting pixel electrode 221 and a dielectric film formed on the transistor 103 It is composed of a light-transmitting insulating film (not shown in Figure 2). That is, capacitive element 205 It is translucent.

[0049] As the capacitive element 205 is light-transmitting, the large number of capacitive elements 205 within the pixel 201 It can be formed over a large area. Therefore, while increasing the opening ratio, typically it is 55%. In addition, it is possible to preferably achieve a charge capacity of 60% or more, and the semiconductor has increased charge capacity. A device can be obtained. For example, a high-resolution semiconductor device, such as a liquid crystal display device. As a result, the pixel area becomes smaller, and the area of ​​the capacitive element also becomes smaller. Therefore, high resolution In semiconductor devices, the charge capacitance stored in capacitive elements becomes smaller. However, Since the capacitive element 205 shown in the embodiment is light-transmitting, the capacitive element can be provided in a pixel. This allows for obtaining sufficient charge capacitance in each pixel while increasing the aperture ratio. This refers to high-resolution semiconductor devices with a pixel density of 200 ppi or more, and even 300 ppi or more. It can be suitably used in the present invention. Furthermore, because the aperture ratio can be increased, light from light sources such as backlights can be used more efficiently. This allows for a reduction in the power consumption of the display device.

[0050] Here, we will describe the characteristics of transistors using oxide semiconductors. The transistor used is an n-channel transistor. Furthermore, it is contained in oxide semiconductors. Oxygen deficiency can lead to the generation of carriers, affecting the electrical characteristics and reliability of transistors. This could potentially degrade performance. For example, changing the threshold voltage of a transistor in the negative direction. Furthermore, drain current can flow when the gate voltage is 0V. A transistor that has a normally-on characteristic is one in which drain current flows when the drain voltage is 0V. Transistors with these characteristics are called depletion transistors. Furthermore, when the gate voltage is 0V, it can be assumed that no drain current is flowing. A transistor's characteristics are called normally-off characteristics, and transistors with such characteristics are called enhanced transistors. This is called a sment-type transistor.

[0051] When using an oxide semiconductor for the semiconductor film 111, the oxide semiconductor film which is the semiconductor film 111 contains It is preferable that defects, such as oxygen deficiencies, be minimized as much as possible. For example, A spin resonance (SPR) with a g-value of 1.93 obtained by electron spin resonance (SPR) with the magnetic field applied parallel to the film surface. The defect density (corresponding to the defect density contained in the oxide semiconductor film) is below the detection limit of the measuring instrument. It is preferable that defects contained in oxide semiconductor films, typically oxygen vacancies, are reduced. By minimizing this as much as possible, we can prevent transistor 103 from exhibiting normally-on characteristics. This allows for control and improvement of the electrical characteristics and reliability of semiconductor devices. Furthermore, it enables control over electrical processes, improving the reliability of semiconductor devices. This can reduce the power consumption of semiconductor devices.

[0052] The negative fluctuation in the transistor threshold voltage is not only due to oxygen deficiency, but also to oxides. This can also be caused by hydrogen (including hydrogen compounds such as water) contained in semiconductors. Yes. The hydrogen contained in oxide semiconductors reacts with the oxygen that bonds with the metal atoms to form water. This creates a defect (which can also be called an oxygen deficiency) in the lattice where oxygen has been removed (or the part where oxygen has been removed). It accomplishes this. Furthermore, some of the hydrogen reacts with oxygen to generate electrons, which act as carriers. Therefore, transistors using oxide semiconductors containing hydrogen are normally-on. It is prone to becoming sexual.

[0053] Therefore, when using an oxide semiconductor for the semiconductor film 111, the oxide semiconductor is the semiconductor film 111. It is preferable that the body membrane has as little hydrogen as possible. Specifically, the semiconductor film 111 In this context, secondary ion mass spectrometry (SIMS) is used. The hydrogen concentration obtained by atoms / cm 3 is less than 5 × 10 18 atoms / cm 3 preferably 1 × 10 17 a toms / cm 3 or less, more preferably 5 × 10 16 atoms / cm 3 or less.

[0054] In addition, the semiconductor film 111 has a concentration of an alkali metal or an alkaline earth metal obtained by secondary ion mass spectrometry of 1 × 10 atoms / cm 18 or less, preferably 2 × 10 3 atoms / cm 16 or less. Alkali metals and alkaline earth metals may generate carriers when combined with an oxide semiconductor, which may increase the off-current of the transistor 103. 3

[0055]

[0056] Also, if nitrogen is contained in the oxide semiconductor film which is the semiconductor film 111, carriers

[0057]

[0058] <00,s / cm

[0059]

[0060]

[0061]

[0062]

[0063]

[0064]

[0065]

[0066]

[0067]

[0068]

[0069] [[ID=I56]]

[0070]

[0071]

[0072]

[0073]

[0074]

[0075] This results in a sment type, which suppresses the normally-on characteristics of transistor 103. The off-current of the transistor 103 can be significantly reduced. Therefore, good electrical characteristics can be achieved. It is possible to manufacture semiconductor devices that possess the necessary components. Furthermore, it is possible to manufacture semiconductor devices with improved reliability. can.

[0057] Furthermore, the low off-current of transistors using highly purified oxide semiconductor films indicates that This can be proven through various experiments. For example, if the channel width is 1 × 10⁻⁶ 6 Channel length L in μm Even if the element is 10 μm, the voltage between the source electrode and the drain electrode (drain voltage) is 1 In the range from V to 10V, the off-current is below the measurement limit of the semiconductor parameter analyzer. That is, 1 × 10 -13 The characteristic of being less than or equal to A can be obtained. In this case, the transient The off-current, which corresponds to the value obtained by dividing by the channel width, must be 100 Hz A / μm or less. I understand. Also, by connecting a capacitive element and a transistor, current flows into or out of the capacitive element. The off-current is measured using a circuit that controls the outflowing charge with the transistor. In the measurement, a highly purified oxide semiconductor film was used in the channel formation region of the above transistor. The off-current of the transistor is measured from the change in the amount of charge per unit time of the capacitive element. As a result, when the voltage between the source and drain electrodes of the transistor is 3V, several tens of y An even lower off-current of A / μm can be obtained. Therefore, a highly purified oxide semiconductor can be obtained. Transistors using film have remarkably low off-current.

[0058] Next, Figure 3 shows cross-sectional views between the dashed lines A1-A2 and B1-B2 in Figure 2. This will be shown.

[0059] The cross-sectional structure of pixel 201 of the liquid crystal display device is as follows. The liquid crystal display device is mounted on substrate 10 An element portion formed on 2, an element portion formed on the substrate 150, and sandwiched between the two element portions It has a liquid crystal layer.

[0060] First, the structure of the element portion provided on the substrate 102 will be described. , scan line 107 including the gate electrode 107a of transistor 103, and scan line 107 is identical A capacitance line 115 is provided on the surface. Scan line 107 and capacitance line 11 A gate insulating film 127 is provided on 5. The scan line 107 of the gate insulating film 127 is superimposed. A semiconductor film 111 is provided on the region, and a translucent gate insulating film 127 is provided. A conductive film 119 is provided. Transients are provided on the semiconductor film 111 and on the gate insulating film 127. The signal line 109 includes the source electrode 109a of transistor 103, and the drain of transistor 103. A conductive film 113 including an electrode 113a is provided. A capacitance line 1 is provided in the gate insulating film 127. An opening 123 reaching 15 is provided, and the opening 123, on the gate insulating film 127, and transparent A conductive film 125 is provided on a photosensitive conductive film 119. On the gate insulating film 127, On signal line 109, on semiconductor film 111, on conductive film 113, and on conductive film 125, a transistor 1 Insulating films 229, 231, and 232 are provided to function as protective insulating films for 03. Furthermore, in the region that becomes the capacitive element 205, a transparent conductive material is provided. An insulating film 232 is provided in contact with the film 119. Insulating film 229, insulating film 231, and The edge film 232 is provided with an opening 117 that reaches the conductive film 113, and the opening 117 and insulation A pixel electrode 221 is provided on the film 232. Also, the pixel electrode 221 and the insulating film 232 An insulating film 158, which functions as an alignment film, is provided on top. Note that the substrate 102 and the scan line A base insulating film is provided between 107 and the capacitance line 115 and the gate insulating film 127. That's fine.

[0061] In this embodiment, the capacitive element 205 has one of its pair of electrodes that is the pixel electrode 221 The other electrode of the pair of electrodes is a semiconductor film formed in the same process as the semiconductor film 111. The conductive film 119 is a translucent metal oxide film having conductive properties, and a pair of electrodes By making the dielectric film provided between them an insulating film 232, the thickness of the dielectric film can be reduced. This is possible. Therefore, the charge capacitance of the capacitive element 205 can be increased.

[0062] Furthermore, the insulating film 232 is preferably a nitride insulating film.

[0063] Note that in Figure 2, insulating film 229 (not shown) and insulating film 231 (not shown) are shown. The edges of the region where there is no provision (inside the dotted line) are on the outside of the light-transmitting conductive film 119. Although provided as shown in Figure 4, insulating film 279 (not shown) and insulating film 281 (not shown) are provided. The edges of the area where the ) is not provided (inside the two-dot dashed line) are covered with a translucent conductive film 11 It may be placed on 9.

[0064] Figure 5 shows cross-sectional views between the dashed lines A1-A2 and B1-B2 in Figure 4.

[0065] In Figure 5, the gate insulating film 127, the signal line 109, the semiconductor film 111, and the conductive film The transistor 103 is protected on 113, on the conductive film 125, and on the translucent conductive film 119. Insulating films 279, 281, and 282, which function as insulating films, are provided. Furthermore, the edges of the insulating film 279 and insulating film 281 are located on the light-transmitting conductive film 119. Furthermore, an insulating film 282 is provided on the light-transmitting conductive film 119. The pixel element 255 is composed of a light-transmitting conductive film 119, an insulating film 282, and a pixel electrode 271. This is done. Note that insulating film 279, insulating film 281, and insulating film 282 are each insulating film 2 29, It can be formed using the same material as insulating film 231 and insulating film 232. Furthermore, the pixel electrode 271 can be formed using the same material as the pixel electrode 221. (Figure) As shown in 5, the edges of the insulating film 279 and insulating film 281 are on the transparent conductive film 119 Because it is located in the etching of insulating film 279 and insulating film 281, the gate insulating film 12 This prevents excessive etching of part 7.

[0066] The components of the above structure are described in detail below.

[0067] There are no major restrictions on the material of the substrate 102, but at least in the semiconductor device manufacturing process... It must have sufficient heat resistance to withstand the heat treatment performed on it. For example, a glass substrate, Examples include ceramic substrates and plastic substrates, and as for glass substrates, barium rhodium is used. Alkali-free glass such as acid glass, aluminoborosilicate glass, or aluminosilicate glass. It is preferable to use a substrate made of stainless steel. Alternatively, use a substrate that does not transmit light, such as a stainless steel alloy. It is also possible to do so. In that case, it is preferable to provide an insulating film on the surface of the substrate. 2. Quartz substrate, sapphire substrate, single crystal semiconductor substrate, polycrystalline semiconductor substrate, compound semiconductor Body substrates, SOI (Silicon On Insulator) substrates, etc., can also be used. can.

[0068] Since the scanning line 107 and capacitance line 115 carry large currents, it is preferable to form them with a metal film. Typical examples include molybdenum (Mo), titanium (Ti), tungsten (W), and tantalum (T). a) Aluminum (Al), copper (Cu), chromium (Cr), neodymium (Nd), scan A single-layer structure or It is provided in a layered structure.

[0069] An example of a scanning line 107 and a capacitance line 115 is one using silicon-containing aluminum. Single-layer structure, double-layer structure with titanium laminated on aluminum, titanium laminated on titanium nitride A two-layer structure, a two-layer structure in which tungsten is laminated on titanium nitride, tantalum nitride with Two-layer structure with stacked stainless steel, two-layer structure with stacked copper on a copper-magnesium-aluminum alloy. Structure, such as a three-layer structure in which copper is layered on titanium nitride and then tungsten is formed on top of that. There is.

[0070] Furthermore, as the material for the scanning line 107 and capacitance line 115, a light-transmitting material applicable to the pixel electrode 221 is also used. A conductive material having certain properties can be used.

[0071] Furthermore, as the material for the scanning line 107 and the capacitance line 115, a nitrogen-containing metal oxide, specifically This includes nitrogen-containing In-Ga-Zn oxides, nitrogen-containing In-Sn oxides, and nitrogen In-Ga oxides containing nitrogen, In-Zn oxides containing nitrogen, and Sn oxides containing nitrogen Materials such as nitrogen-containing in oxides and metal nitride films (InN, SnN, etc.) can be used. These materials have a work function of 5 eV (electron volts) or more. Transistor 10 When an oxide semiconductor is used for the semiconductor film 111 in step 3, scan line 107 (transistor 103) By using a nitrogen-containing metal oxide as the gate electrode, the threshold of transistor 103 The value voltage can be varied in the positive direction, and the transient has so-called normally-off characteristics. This can be achieved. For example, when using an In-Ga-Zn oxide containing nitrogen, Both semiconductor films have a higher nitrogen concentration than the oxide semiconductor film, specifically a nitrogen concentration of 7 atomic percent. The above-mentioned In-Ga-Zn oxides can be used.

[0072] In the scanning line 107 and capacitance line 115, low-resistance materials such as aluminum and copper are used. This is preferable. Using aluminum or copper reduces signal delay and improves display quality. It is possible. However, aluminum has low heat resistance, and hillocks, whiskers, or Defects due to migration are likely to occur. To prevent aluminum migration... Therefore, aluminum can be combined with molybdenum, titanium, tungsten, etc., which are more soluble than aluminum. It is preferable to laminate metal materials with high point density. Also, when using copper, migration To prevent defects caused by copper and the diffusion of copper elements, molybdenum, titanium, tungsten, etc. are used. It is preferable to laminate metal materials with higher melting points.

[0073] The gate insulating film 127 is, for example, silicon oxide, silicon oxide nitride, silicon oxide nitride, Silicon nitride, aluminum oxide, hafnium oxide, gallium oxide, or Ga-Zn metals It is provided in a single-layer or multi-layer structure using insulating materials such as oxides. In order to improve the interfacial properties with the oxide semiconductor film, the gate insulating film 127 is made small However, it is preferable that the region in contact with the semiconductor film 111 be formed of an oxide insulating film.

[0074] Furthermore, the gate insulating film 127 is an insulating film that has barrier properties against oxygen, hydrogen, water, etc. By providing this, the diffusion of oxygen from the oxide semiconductor film, which is the semiconductor film 111, to the outside, and the outside This prevents the intrusion of hydrogen, water, etc. into the oxide semiconductor film. Examples of insulating films that have barrier properties against the like include aluminum oxide and aluminum oxide / nitride. Gallium oxide, gallium oxide nitride, yttrium oxide, yttrium oxide nitride, gallium oxide Examples include hafnium oxide, hafnium nitride, and silicon nitride.

[0075] Furthermore, as the gate insulating film 127, hafnium silicate (HfSiO x ), contains nitrogen Hafnium silicate (HfSi x O y N z ), hafnium aluminium containing nitrogen (HfAl) x O y N z ), high-k materials such as hafnium oxide and yttrium oxide By using this method, the gate leakage of transistor 103 can be reduced.

[0076] Furthermore, the gate insulating film 127 is preferably made of the following layered structure: First silica nitride As a protective film, a silicon nitride film with a low defect rate is provided, and a second film is placed on the first silicon nitride film. As the silicon nitride film, a silicon nitride film with low hydrogen desorption and ammonia desorption is provided. , any of the oxide insulating films arranged in the gate insulating film 127 above, on the second silicon nitride film It is preferable to provide this.

[0077] As for the second silicon nitride film, in the temperature-controlled desorption gas analysis method, the amount of hydrogen molecules desorbed was 5 ×10 21 molecules / cm 3 Less than 3 × 10 21 molecules / cm 3 The following are even more preferable ku is 1 x 10 21 molecules / cm 3 The following is true, and the amount of ammonia molecules released is 1 × 10⁻⁶. 22 molecule / cm 3 Less than 5 × 10 21 molecules / cm 3 More preferably 1 × 10 2 1 molecules / cm 3 It is preferable to use the following nitride insulating film: the first silicon nitride described above. By using the film and the second silicon nitride film as part of the gate insulating film 127, the gate insulating film is achieved. The border film 127 is a gate insulating film with a low defect rate and low desorption of hydrogen and ammonia. A border film can be formed. As a result, hydrogen and nitrogen contained in the gate insulating film 127 This makes it possible to reduce the amount of material transferred to the semiconductor film 111.

[0078] In a transistor using an oxide semiconductor, the interface between the oxide semiconductor film and the gate insulating film. Alternatively, if trapping levels (also called interface levels) exist in the gate insulating film, the transistor's structure Voltage fluctuations, typically in the negative direction of the threshold voltage, and transistor Subthread showing the gate voltage required for the drain current to change by an order of magnitude when the device is turned on. This causes an increase in the Sskold coefficient (S value). As a result, the electrical characteristics of each transistor change. There is a problem of variability. For this reason, silicon nitride, which has a low defect rate, is used as the gate insulating film. By using a film, and by providing an oxide insulating film in the region in contact with the semiconductor film 111, This reduces the negative shift in the threshold voltage and suppresses the increase in the S value.

[0079] The thickness of the gate insulating film 127 is 5 nm or more and 400 nm or less, more preferably 10 nm or less. The wavelength should be 300 nm or less, more preferably 50 nm to 250 nm.

[0080] The semiconductor film 111 is an oxide semiconductor film, and this oxide semiconductor film has an amorphous structure and is a single crystal. It can have a crystalline or polycrystalline structure. Furthermore, the thickness of the semiconductor film 111 is 1 nm or more. 100nm or less, preferably 1nm to 50nm, more preferably 1nm to 30nm The wavelength should be less than or equal to m, and more preferably between 3 nm and 20 nm.

[0081] As an oxide semiconductor applicable to the semiconductor film 111, the energy gap is 2 eV or more. Preferably, it is 2.5 eV or more, more preferably 3 eV or more. In this way, energy By using an oxide semiconductor with a wide gap, the off-current of transistor 103 is reduced. It is possible.

[0082] The oxide semiconductor applicable to the semiconductor film 111 is at least indium (In) or It is preferable that it contains zinc (Zn). Alternatively, it is preferable that it contains both In and Zn. Furthermore, in order to reduce variations in the electrical characteristics of transistors using the said oxide semiconductor, It is preferable to have one or more stabilizers in addition to the above.

[0083] Stabilizers include gallium (Ga), tin (Sn), hafnium (Hf), and These include aluminum (Al) or zirconium (Zr). Also, other stabilizers... These are lanthanides: lanthanum (La), cerium (Ce), and praseodymium (P). r), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium ( Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium Examples include rhodium (Er), thulium (Tm), ytterbium (Yb), lutetium (Lu), etc. ru.

[0084] Examples of oxide semiconductors applicable to the semiconductor film 111 include, as an oxide semiconductor, acid Indium oxide, tin oxide, zinc oxide, and In-Zn oxide are oxides containing two types of metals. Substances, Sn-Zn oxides, Al-Zn oxides, Zn-Mg oxides, Sn-Mg oxides In-Mg oxides, In-Ga oxides, and oxides containing three types of metals are all types of oxides. Ga-Zn oxides (also written as IGZO), In-Al-Zn oxides, In-Sn -Zn oxides, Sn-Ga-Zn oxides, Al-Ga-Zn oxides, Sn-Al- Zn oxides, In-Hf-Zn oxides, In-Zr-Zn oxides, In-Ti-Z n-based oxides, In-Sc-Zn-based oxides, In-Y-Zn-based oxides, In-La-Zn-based oxides Oxides, In-Ce-Zn oxides, In-Pr-Zn oxides, In-Nd-Zn acids In-Sm-Zn oxides, In-Eu-Zn oxides, In-Gd-Zn oxides Materials, In-Tb-Zn oxides, In-Dy-Zn oxides, In-Ho-Zn oxides In-Er-Zn oxides, In-Tm-Zn oxides, In-Yb-Zn oxides, In-Lu-Zn ​​oxides, and In-Sn-Ga-Zn oxides, which contain four types of metals. Oxides, In-Hf-Ga-Zn oxides, In-Al-Ga-Zn oxides, In-S n-Al-Zn oxides, In-Sn-Hf-Zn oxides, In-Hf-Al-Zn Oxides can be used.

[0085] Here, an In-Ga-Zn oxide is an oxide having In, Ga, and Zn as its main components. It refers to the material itself, and the ratio of In, Ga, and Zn is irrelevant. Also, other than In, Ga, and Zn... It may contain metallic elements.

[0086] In addition, as an oxide semiconductor, InMO3(ZnO) m Materials represented by (m>0) are used. It may be present. Note that M is one or more metallic elements selected from Ga, Fe, Mn, and Co. This indicates a metallic element, or an element used as a stabilizer as described above.

[0087] For example, In:Ga:Zn=1:1:1 (=1 / 3:1 / 3:1 / 3), In:Ga: Zn=2:2:1 (=2 / 5:2 / 5:1 / 5), or In:Ga:Zn=3:1: By using an In-Ga-Zn metal oxide with an atomic ratio of 2 (=1 / 2:1 / 6:1 / 3) This is possible. Alternatively, In:Sn:Zn=1:1:1 (=1 / 3:1 / 3:1 / 3), In:Sn:Zn = 2:1:3 (= 1 / 3:1 / 6:1 / 2) or In:Sn:Zn In-Sn-Zn metal oxides with an atomic ratio of 2:1:5 (=1 / 4:1 / 8:5 / 8). It is advisable to use the above. Note that the atomic ratio of metal elements contained in the metal oxide is considered an error. Includes a variation of plus or minus 20% in the atomic ratio.

[0088] However, this is not limited to these, and may include any other semiconductor characteristics and electrical characteristics (field effect mobility, etc.) required. Depending on the key voltage, etc., an appropriate atomic ratio should be used. To obtain the desired properties, the carrier density, impurity concentration, defect density, and atomic ratio of metal elements to oxygen are measured. It is preferable to make the interatomic distance, density, etc. appropriate. For example, In-Sn-Zn acid High field-effect mobility can be obtained relatively easily with chromium compounds. However, in-Ga-Zn Even in oxides, the field-effect mobility can be increased by lowering the bulk defect density. can.

[0089] The light-transmitting conductive film 119 is mainly composed of the same material as the semiconductor film 111, and also contains nitrogen By including an element and / or hydrogen, the conductivity is enhanced, giving it the properties of a conductor. It is formed from metal oxides.

[0090] The semiconductor film 111 and the light-transmitting conductive film 119 are both formed on the gate insulating film. They are formed from metal oxide films composed of the same metal element, but with different impurity concentrations. In this case, the impurity concentration of the light-transmitting conductive film 119 is higher compared to the semiconductor film 111. For example, the hydrogen concentration contained in the semiconductor film 111 is 5 × 10⁻⁶ 19 atoms / cm 3 Less than, good Mashikuha 5 x 10 18 atoms / cm 3 Less than 1 × 10 18 atoms / cm 3 The following is more preferable: 5 x 10 17 atoms / cm 3 More preferably, 1 x 10 16 atoms / cm 3 The following is the water contained in the light-transmitting conductive film 119. The elementary concentration is 8 × 10 19 atoms / cm 3Above, preferably 1×10 20 atoms / cm 3 Above, more preferably 5×10 20 atoms / cm 3 Above. Also, the hydrogen concentration contained in the conductive film 119 having translucency is 2 times, preferably 10 times or more compared with the semiconductor film 111.

[0091] Also, the conductive film 119 having translucency has a lower resistivity than the semiconductor film 111. The resistivity of the conductive film 119 having translucency is preferably 1×10 -8 times or more and 1×10 -1 times or less that of the semiconductor film 111, typically 1×10 -3 Ωcm or more and less than 1×10 4 Ωcm More preferably, the resistivity is 1×10 -3 Ωcm or more and less than 1×10 -1 Ωcm is good.

[0092] The signal line 109 including the source electrode 109a of the transistor 103, the conductive film 113 including the drain electrode of the transistor 103, and the conductive film 125 that electrically connects the conductive film 119 having translucency of the capacitor element 205 and the capacitor line 115 can be a single-layer structure or a laminated structure using a material applicable to the scanning line 107 and the capacitor line 115. <00​​​​​​​​​​​This allows impurities such as hydrogen and water to enter transistor 103 (especially semiconductor film 111) from the outside. This can suppress the occurrence of [unclear]. Furthermore, the insulating film 229 may be omitted.

[0094] Furthermore, one or both of the insulating film 229 and insulating film 231 contain oxygen that satisfies the stoichiometric composition. It is preferable that the oxide insulating film contains more oxygen than the above. It prevents the detachment of oxygen from oxide semiconductor films and also contains excess oxygen in oxide insulating films. This makes it possible to transfer the oxygen present in the film to the oxide semiconductor film, thereby reducing oxygen deficiency. For example, the emission of oxygen molecules measured by thermal desorption gas analysis (hereinafter referred to as TDS analysis) The output is 1.0 × 10 18 molecules / cm 3 By using the above-mentioned oxide insulating film, the oxide This can reduce oxygen vacancies in the semiconductor film. In one or both of 31, there is an excess of oxygen compared to the stoichiometric composition (oxygen-rich region). It may also be an oxide insulating film in which a portion exists, and is superimposed on at least the semiconductor film 111. The presence of an oxygen-rich region in that area prevents the desorption of oxygen from the oxide semiconductor film. At the same time, the excess oxygen is transferred to the oxide semiconductor film, reducing oxygen deficiency. It becomes possible to do so.

[0095] The insulating film 231 is an oxide insulating film containing more oxygen than satisfactorily satisfying the stoichiometric composition. In this case, the insulating film 229 is preferably an oxide insulating film that permeates oxygen. In 229, all oxygen that enters the insulating film 229 from the outside passes through the insulating film 229 and moves Some oxygen remains stationary and stays in the insulating film 229. In addition, some oxygen is already contained in the insulating film 229. Furthermore, some oxygen moves from the insulating film 229 to the outside. Therefore, the insulating film 229 is for the diffusion of oxygen. It is preferable that the oxide insulating film has a large coefficient.

[0096] Furthermore, since the insulating film 229 is in contact with the oxide semiconductor film 111, oxygen It is an oxide insulating film that not only allows light to pass through, but also lowers the interface state with the semiconductor film 111. Preferably, the insulating film 229 is an oxide insulating film with a lower defect density in the film than the insulating film 231. A film is preferred. Specifically, the g value obtained by electron spin resonance measurement is 2.001 (E The spin density of the '-center' is 3.0 × 10⁻¹⁰ 17 spins / cm 3 The following are preferable is 5.0×10 16 spins / cm 3 The following are oxide insulating films. Note that electron spin resonance The measured spin density of g = 2.001 is due to the dangling bone contained in the insulating film 229. This corresponds to the quantity of "do" present.

[0097] The thickness of the insulating film 229 is 5 nm or more and 150 nm or less, preferably 5 nm or more and 50 nm or less. The thickness of the insulating film 231 can preferably be 10 nm or more and 30 nm or less. The wavelength can be 30 nm to 500 nm, preferably 150 nm to 400 nm. Cut.

[0098] When insulating film 232 is a nitride insulating film, one or both of insulating film 229 and insulating film 231 It is preferable that the insulating film has barrier properties against nitrogen. For example, a dense oxide insulating film. By forming a membrane, it can have a barrier property against nitrogen, specifically at 25°C An oxide insulating material whose etching rate with 0.5 wt% hydrofluoric acid is 10 nm / min or less. It is preferable to use a film.

[0099] When one or both of the insulating films 229 and 231 are made of a silicon oxynitride or silicon nitride oxide insulating film containing nitrogen, the nitrogen concentration obtained from SIMS is not less than the SIMS detection lower limit and less than 3×10 SIMS detection lower limit and less than 3×10 20 atoms / cm 3 and preferably less than 1×10 18 a toms / cm 3 and not less than 1×10 20 atoms / cm 3 and preferably not more than 1×10 atoms / cm atoms / cm This can reduce the amount of nitrogen moving into the semiconductor film 111 included in the transistor 103. Also, this can reduce the amount of defects in the insulating film containing nitrogen itself.

[0100] As the insulating film 232, an insulating nitride film with a low hydrogen content may be provided. As the insulating nitride film, for example, the amount of hydrogen molecule release measured by TDS analysis is less than 5.0×10 2 1 3 / cm 3 and preferably less than 3.0×10 21 / cm 3 and more preferably less than 1.0×10 21 21 / cm 3 3

[0101] The insulating film 232 should have a thickness that can function to suppress the intrusion of impurities such as hydrogen and water from the outside. For example, it can be 50 nm or more and 200 nm or less, preferably 50 nm or more and 150 nm or less, and more preferably 50 nm or more and 100 nm or less.

[0102] Furthermore, an organic silane gas is introduced between the insulating film 231 and the insulating film 232, or onto the insulating film 232. A silicon oxide film formed by the CVD method used may be provided. The silicon oxide film is stepped Due to its excellent differential coverage, it is useful as a protective insulating film for transistor 103. The silicon oxide film can be formed with a wavelength of 300 nm to 600 nm. Organic silane gas Examples include ethyl silicate (TEOS: chemical formula Si(OC2H5)4) and tetramethylsilane. (TMS: Chemical formula Si(CH3)4), Tetramethylcyclotetrasiloxane (TMCT) S), Octamethylcyclotetrasiloxane (OMCTS), Hexamethyldisilazane ( HMDS), triethoxysilane (SiH(OC2H5)3), trisdimethylaminos Silicon-containing compounds such as ran(SiH(N(CH3)2)3) can be used.

[0103] The silicon oxide film is provided between insulating film 231 and insulating film 232, or on insulating film 232. This improves the flatness of the surface of the element portion where the transistor and capacitive elements are provided. Yes, it is possible. Furthermore, the silicon oxide film is provided between the insulating film 231 and the insulating film 232 for insulation. By using the above nitride insulating film for film 232, impurities such as hydrogen and water from the outside can be absorbed into the semiconductor film 1 This further suppresses penetration into 11 and the light-transmitting conductive film 119.

[0104] Furthermore, if a silicon oxide film is provided on the insulating film 232, the insulating film 232 and the silicon oxide film It functions as a dielectric film for the capacitive element 205. The insulating film 232 is formed of a nitride insulating film. However, nitride insulating films have a higher dielectric constant than oxide insulating films such as silicon oxide, and internally... It tends to have a large force. Therefore, a silicon oxide film is used as the dielectric film for the capacitive element 205. If only the insulating film 232 is used without the other element, the thickness of the insulating film 232 is small, and the capacitive element 205 The capacity value becomes too large, and the speed of writing image signals to pixels is reduced to low power consumption. This makes it difficult to increase. Conversely, if the thickness of the insulating film 232 is large, the internal stress will increase. If this is done too much, it can lead to a deterioration of electrical characteristics, such as fluctuations in the transistor's threshold voltage. If the internal stress of the insulating film 232 becomes too large, the insulating film 232 will peel off from the substrate 102. It becomes cheaper and the yield decreases. However, silica oxide, which has a lower dielectric constant than insulating film 232 By using the film together with the insulating film 232 as the dielectric film of the pixel's capacitive element, the insulating film 2 Without increasing the film thickness of 32, the dielectric constant of the dielectric film can be adjusted to a desired value. .

[0105] The pixel electrode 221 is formed using a light-transmitting conductive film. indium tin oxide, indium oxide including tungsten oxide, tungsten oxide Indium zinc oxide containing titanium oxide, indium oxide containing titanium oxide, indium oxide containing titanium oxide Dium-tin oxide, indium zinc oxide, indium-tin oxide with added silicon oxide, etc. It is formed from a conductive material that has light-transmitting properties.

[0106] Next, the structure of the element portion provided on the substrate 150 will be described. A light-shielding film 152 and an electrode (pair) that is in contact with the light-shielding film 152 and is provided opposite to the pixel electrode 221. A directional electrode 154 is provided. It also functions as an alignment film in contact with the counter electrode 154. An insulating film 156 is provided.

[0107] The light-shielding film 152 is protected from light from a backlight or other light source or from the outside when light shines on the transistor 103. It suppresses the action. The light-shielding film 152 is made of materials such as metal or organic resin containing pigments. It can be formed. In addition, the light-shielding film 152 is on the transistor 103 of the pixel 201. Other than the pixel section 100, such as the scan line drive circuit 104 and the signal line drive circuit 106 (see Figure 1). It may be placed in the area.

[0108] Furthermore, a colored film having the function of transmitting light of a predetermined wavelength is placed between adjacent light-shielding films 152. A reflective layer may be provided. Furthermore, an overlap may be provided between the light-shielding film 152 and the colored film and the counter electrode 154. A coating film may be provided.

[0109] The counter electrode 154 is provided using a transparent conductive material as shown in the pixel electrode 221. ru.

[0110] The liquid crystal element 108 includes a pixel electrode 221, a counter electrode 154, and a liquid crystal layer 160. , an insulating film 158 that functions as an alignment film provided on the element portion of the substrate 102, and substrate 150 The liquid crystal layer 160 is sandwiched by an insulating film 156 that functions as an alignment film provided on the element portion. Furthermore, the pixel electrode 221 and the counter electrode 154 overlap via the liquid crystal layer 160.

[0111] The insulating films 156 and 158, which function as alignment films, are made of commonly used materials such as polyamide. It can be constructed using the available materials.

[0112] Furthermore, the insulating film 229 provided on the semiconductor film 111 is permeable to oxygen, and also semiconducting The insulating film 231 is an oxide insulating film with a low interface level with the body film 111, and includes an oxygen-rich region. The oxide insulating film is either an oxide insulating film containing more oxygen than satisfies the stoichiometric composition requirement. This makes it easier to supply oxygen to the oxide semiconductor film, which is the semiconductor film 111. This prevents the desorption of oxygen from the oxide semiconductor film and also removes the oxygen contained in the insulating film 231. It is possible to transfer oxygen to an oxide semiconductor film and reduce the oxygen vacancies contained in the oxide semiconductor film. As a result, transistor 103 becomes an enhancement type, and the normally-on characteristics are lost. This suppresses the occurrence of the problem, thereby improving the electrical characteristics and reliability of semiconductor devices. This makes it possible to reduce the power consumption of semiconductor devices.

[0113] Furthermore, by using a nitride insulating film as the insulating film 232 provided on the insulating film 231, When impurities such as hydrogen or water enter from the outside, they can invade the semiconductor film 111 and the light-transmitting conductive film 119. It can suppress the ingress of hydrogen. Furthermore, the insulating film 232 is a nitride insulating film with a low hydrogen content. By applying a film, fluctuations in the electrical characteristics of the transistor can be suppressed.

[0114] Furthermore, the capacitive element 205 can be formed larger (over a larger area) within the pixel 201. This allows us to obtain a semiconductor device that increases both the aperture ratio and the charge capacitance. As a result, semiconductor devices with excellent display quality can be obtained.

[0115] Furthermore, since both electrodes of the capacitive element 205 are conductive, the plane of the capacitive element 205 Sufficient charge capacity can be obtained even when the area is reduced. Note that oxide semiconductor films transmit light. Since the ratio is 80-90%, the area of ​​the light-transmitting conductive film 119 is reduced, and the pixel 201 By providing a region in which the light-transmitting conductive film 119 is not formed, the backlight This can increase the transmittance of light emitted from light sources such as backlights. It is possible to reduce the brightness of the light source, thereby reducing the power consumption of the semiconductor device. .

[0116] <Method for fabricating semiconductor devices> Next, regarding the method for manufacturing the element portion provided on the substrate 102 shown in the semiconductor device described above, This will be explained using Figures 6, 7, and 8.

[0117] First, scan lines 107 and capacitance lines 115 are formed on the substrate 102, scan lines 107 and capacitance lines An insulating film 126 is formed so as to cover 115, which will later be processed into a gate insulating film 127. A semiconductor film 111 is formed in the region overlapping with the 126 scan lines 107, and later the pixel electrode 221 The semiconductor film 118 is formed so as to overlap with the region being formed (see Figure 6(A)).

[0118] Scanning line 107 and capacitance line 115 have a conductive film formed using the materials listed above, and the conductive It can be formed by forming a mask on an electrical film and then processing using the mask. The film is deposited using various methods such as vapor deposition, CVD, sputtering, and spin coating. The thickness of the conductive film is not particularly limited, and the formation time and desired resistance can be adjusted. The rate and other factors can be taken into consideration when determining the mask. For example, the first photolithography A resist mask can be formed by the process. Furthermore, the processing of the conductive film is This can be done by dry etching, wet etching, or both.

[0119] The insulating film 126 is made using a material applicable to the gate insulating film 127 by CVD or sprucing. It can be formed using various film deposition methods such as taring.

[0120] Furthermore, when applying gallium oxide to the gate insulating film 127, MOCVD (Metal Using the Organic Chemical Vapor Deposition method An insulating film 126 can be formed.

[0121] The semiconductor films 111 and 118 use the oxide semiconductors listed above. A body film is formed, a mask is formed on the oxide semiconductor film, and processing is performed using the mask. It can be formed by the same metal element. For this reason, semiconductor film 111 and semiconductor film 118 are composed of the same metal element. Oxide semiconductor films are produced by sputtering, coating, pulsed laser deposition, and laser deposition. It can be formed using methods such as the abrasion method. By using a printing method, the element The separated semiconductor films 111 and 118 can be directly formed on the insulating film 126. To form the oxide semiconductor film using the sputtering method, a plasma is generated. The power supply unit can be an RF power supply unit, an AC power supply unit, or a DC power supply unit, as appropriate. Yes, it is possible. Sputtering gases include noble gases (typically argon), oxygen, and a combination of noble gases and oxygen. A mixed gas is used as appropriate. In the case of a mixed gas of a noble gas and oxygen, oxygen is used relative to the noble gas. It is preferable to increase the gas ratio. Also, the target is the composition of the oxide semiconductor film to be formed. You can select it as appropriate. Note that the mask in question is, for example, a second photolithograph. The resist mask formed by the process can be used. The processing can be carried out by dry etching, wet etching, or both. To etch the desired shape, the etching conditions (etching) are adjusted according to the material. Set the gas, etching solution, etching time, temperature, etc. as appropriate.

[0122] After forming semiconductor films 111 and 118, a heat treatment is performed, and semiconductor films 111 and It is preferable to dehydrogenate or dehydrate the oxide semiconductor film, which is the semiconductor film 118. The heat treatment temperature is typically 150°C or higher and below the substrate strain point, preferably 200°C or higher. The temperature should be 450°C or lower, more preferably 300°C to 450°C. This may also be performed on the oxide semiconductor film before it is processed into semiconductor film 111 and semiconductor film 118.

[0123] In this heat treatment, the heat treatment apparatus is not limited to an electric furnace, but also includes a heated gas or other medium. It may also be a device that heats the object to be processed by heat conduction or thermal radiation. For example, GRTA (Gas Rapid Thermal Anneal) equipment, LRTA (La mp Rapid Thermal Annealing (RTA) devices, etc. A stermal Anneal (LRTA) device can be used. The LRTA device uses halogen lamps. P, metal halide lamp, xenon arc lamp, carbon arc lamp, high-pressure sodium The light (electromagnetic waves) emitted from lamps such as um lamps and high-pressure mercury lamps is used to treat the object being processed. It is a device for heating objects. A GRTA device is a device that performs heat treatment using high-temperature gas. ru.

[0124] The heat treatment involves nitrogen, oxygen, and ultra-dry air (with a water content of 20 ppm or less, preferably). Air (1 ppm or less, preferably 10 ppb or less), or noble gas (argon, helium, etc.) The procedure should be carried out under the following conditions: nitrogen, oxygen, ultra-dry air, or noble gases with hydrogen and water. It is preferable that the following are not included. After heating in an inert gas atmosphere, heat in an oxygen atmosphere. This is acceptable. The processing time should be between 3 minutes and 24 hours.

[0125] Furthermore, between the substrate 102 and the scan lines 107 and capacitance lines 115 and the gate insulating film 127 If an undercoat insulating film is provided, the undercoat insulating film may be silicon oxide, silicon oxide nitride, or nitride. Silicon oxide, silicon nitride, gallium oxide, hafnium oxide, yttrium oxide, acid It can be formed from aluminum oxide, aluminum oxide nitride, etc. Examples include silicon nitride, gallium oxide, hafnium oxide, yttrium oxide, and aluminum oxide. By forming it with nium, impurities, typically alkali metals, water, and water are removed from the substrate 102. This suppresses the diffusion of elements into the semiconductor film 111. The underlying insulating film is made by sputtering. Alternatively, it can be formed using the CVD method.

[0126] Next, an opening 123 reaching the capacitance line 115 is formed in the insulating film 126 to create the gate insulating film 127 After forming, the signal line 109, which includes the source electrode of transistor 103, and transistor 10 The conductive film 113, semiconductor film 118, and capacitance line 115, which include the drain electrode 3, are electrically connected. A conductive film 125 is formed (see Figure 6(B)).

[0127] The opening 123 is such that a portion of the region overlapping with the capacitance line 115 of the insulating film 126 is exposed. A mask is formed by a third photolithography process, and the mask is used for processing. It can be formed by the same process as the scan line 107 and capacitance line 115. It can be done in the same way.

[0128] The signal line 109, conductive film 113 and conductive film 125 are connected to the signal line 109, conductive film 113 and conductive film 125. A conductive film is formed using a material applicable to the conductive film 125, and a fourth photolithography is applied to the conductive film. The mask is formed by a photography process, and then processed using that mask. The mask and the processing shall be carried out in the same manner as the scan line 107 and the capacitance line 115. It is possible.

[0129] Next, semiconductor film 111, semiconductor film 118, signal line 109, conductive film 113, conductive film 125 and an insulating film 128 is formed on the gate insulating film 127, and an insulating film 130 is formed on the insulating film 128. Formed (see Figure 7(A)). Note that insulating film 128 and insulating film 130 are formed continuously. It is preferable to do so. In this way, each of the insulating film 128 and the insulating film 130 This can suppress the incorporation of impurities into the interface.

[0130] The insulating film 128 is made using a material applicable to the insulating film 229 by CVD or sputtering. It can be formed using various film deposition methods such as the galvanizing method. The insulating film 130 is formed using the insulating film 231 It can be formed using applicable materials.

[0131] When applying an oxide insulating film to the insulating film 229, which has a low interface state with the semiconductor film 111, The border film 128 can be formed using the following formation conditions. Here, the oxide insulating film is The following describes the case in which a silicon oxide film or silicon oxidnitride film is formed. The case involves a substrate placed in a vacuum-evacuated processing chamber of a plasma CVD apparatus and subjected to temperatures above 180°C for 4 hours. Maintain the temperature below 0°C, more preferably between 200°C and 370°C, and introduce the raw material gas into the processing chamber. By introducing a silicon-containing depositing gas and an oxidizing gas, the pressure inside the treatment chamber is raised to 20 Pa or less. The pressure should be 250 Pa or less, more preferably 40 Pa to 200 Pa, and installed in the processing chamber. This is the condition for supplying high-frequency power to the electrodes.

[0132] Typical examples of silicon-containing sedimentary gases include silanes, disilanes, trisilanes, and fluorides. Examples include silanes. Oxidizing gases include oxygen, ozone, nitrous oxide, and nitrogen dioxide. There is.

[0133] Furthermore, by increasing the amount of oxidizing gas relative to the silicon-containing sedimentary gas to more than 100 times, It is possible to reduce the hydrogen content contained in the insulating film 128 (insulating film 229), and This can reduce dangling bonds contained in the insulating film 128 (insulating film 229). Oxygen moving from insulating film 130 (insulating film 231) goes to insulating film 128 (insulating film 229). Because it may be trapped by the dangling bond contained, insulating film 128 (insulating film) If the dangling bond contained in 229) is reduced, the insulating film 130 (insulating film 23 1) The oxygen contained in the semiconductor film 111 is efficiently transferred to the semiconductor film 111, which is an oxide. It is possible to reduce the oxygen vacancies contained in the semiconductor film. As a result, the oxide semiconductor This reduces the amount of hydrogen mixed into the film and also reduces oxygen vacancies in oxide semiconductor films. It is possible.

[0134] The insulating film 231 is an oxide insulating film containing the above-mentioned oxygen-rich region or oxygen satisfying the stoichiometric composition. When an oxide insulating film containing more oxygen is to be formed, the insulating film 130 is formed using the following conditions It can be formed. Here, the oxide insulating film is a silicon oxide film or silicon oxide nitride film. This section describes the process for forming a film. The formation conditions are as follows: Vacuum evacuation of the plasma CVD apparatus. The substrate placed in the processing chamber is heated to a temperature of 180°C to 260°C, more preferably 180°C. Maintain a temperature between 230°C and 330°C, introduce the raw material gas into the processing chamber, and maintain a pressure of 10°C inside the processing chamber. The pressure should be between 0 Pa and 250 Pa, more preferably between 100 Pa and 200 Pa, and the processing should be performed accordingly. 0.17 W / cm² applied to electrodes installed in the room 2 More than 0.5W / cm 2 More preferably, It is 0.25 W / cm² 2 More than 0.35W / cm 2 The following is to maintain the following high-frequency power. .

[0135] The raw material gas for the insulating film 130 can be any raw material gas applicable to the insulating film 128.

[0136] As a condition for forming the insulating film 130, the above pressure is applied in a processing chamber with the above power density of high-frequency electricity. By supplying power, the decomposition efficiency of the raw material gas in the plasma increases, and the amount of oxygen radicals increases. As the oxidation of the raw material gas progresses, the oxygen content in the insulating film 130 becomes greater than the stoichiometric composition. The number also increases. On the other hand, in films formed at the above temperature, the bonding force between silicon and oxygen Because the bond is weak, some of the oxygen in the film is removed by the subsequent heat treatment. As a result, stoichiometric An oxidative atom contains more oxygen than satisfies the theoretical composition, and some of the oxygen is removed upon heating. A border film can be formed. In addition, an insulating film 128 is provided on the semiconductor film 111. Therefore, in the process of forming the insulating film 130, the insulating film 128 is a protective film of the semiconductor film 111. As a result, even if the insulating film 130 is formed using high-frequency power with high power density, half Damage to the conductive film 111 can be suppressed.

[0137] Furthermore, increasing the thickness of the insulating film 130 increases the amount of oxygen that is released by heating. Therefore, it is preferable that the insulating film 130 be thicker than the insulating film 128. By providing the edge film 128, good coverage can be achieved even when the insulating film 130 is made thick. can.

[0138] At least the insulating film 130 is formed, followed by a heat treatment to create the insulating film 128 or insulating film 13 The excess oxygen contained in 0 is moved to the semiconductor film 111, which is an oxide semiconductor film 111. It is preferable to reduce oxygen deficiency in the film. This heat treatment is performed on the semiconductor film 111 and the permeable film. Refer to the details of the heat treatment for dehydrogenating or dehydrating the photosensitive conductive film 119 and carry it out as appropriate. It is possible.

[0139] Next, on the region of the insulating film 130 superimposed on the conductive film 119 which has at least light transmission, A hole is formed, and the mask is used to process the insulating film 228 and insulating film 23 having an opening. Forms 0. Note that the mask has a light-transmitting conductive film 119 exposed at the opening. This allows the use of a resist mask formed by the fifth photolithography step. The process is carried out by either dry etching or wet etching, or both. This can be done. Note that when forming an opening using dry etching, the oxide semiconductor film is Exposure to rhazma damages the oxide semiconductor film, resulting in defects, typically... This creates an oxygen deficiency. As a result, a conductive film 119 with low resistance and light transmission is formed. Next, insulating film 228, insulating film 230, conductive film 125, and light-transmitting conductive film 11 An insulating film 233 is formed on 9 (see Figure 7(B)).

[0140] The insulating film 233 can be formed using a material applicable to the insulating film 232. It can be formed using sputtering, CVD, or other methods.

[0141] When the insulating film 233 is provided with a nitride insulating film with a low hydrogen content, the insulating film 233 has the following form It can be formed using the following conditions. Here, a silicon nitride film is used as the nitride insulating film. The following describes the conditions under which this occurs. The formation conditions are as follows: The substrate placed in the laboratory is heated to a temperature of 80°C to 400°C, more preferably 200°C to 37°C. Maintain a temperature below 0°C, introduce the raw material gas into the processing chamber, and maintain a pressure of 100 Pa or higher within the processing chamber. The pressure shall be 250 Pa or less, preferably 100 Pa or more and 200 Pa or less, and installed in the processing chamber. The process involves supplying high-frequency power to electrodes.

[0142] The raw material gases for the insulating film 233 are silicon-containing depositing gas, nitrogen, and ammonia. It is preferable to use [a specific type of gas]. Typical examples of silicon-containing sedimentary gases include silane and disila. Examples include nitrates, trisilanes, and silane fluorides. Furthermore, the nitrogen flow rate is relative to the ammonia flow rate. It is preferable that the ratio be between 5 and 50 times, and more preferably between 10 and 50 times. By using ammonia as a raw material gas, the sedimentary gas containing silicon and nitrogen are decomposed. This can be promoted by ammonia being stimulated by plasma energy and thermal energy. Dissociate, and the energy released by dissociation binds the silicon-containing sedimentary gas molecules and This is because it contributes to the breakdown of nitrogen molecule bonds. In this way, the hydrogen content is low. Furthermore, it forms a silicon nitride film that can suppress the intrusion of impurities such as hydrogen and water from the outside. It is possible.

[0143] The insulating film 233, formed from nitride insulating film, is deposited by plasma CVD or sputtering. As a result, the semiconductor film 118 is exposed to the plasma, and oxygen vacancies are created in the semiconductor film 118. Furthermore, when the semiconductor film 118 and the insulating film 233 formed of nitride insulating film come into contact, the insulating film 2 From 33, nitrogen and / or hydrogen move to the semiconductor film 118. In the oxygen vacancy, insulating film 233 The presence of hydrogen generates electrons, which act as carriers. As a result, the semiconductor film 118 has high conductivity and is a translucent conductor composed of a metal oxide film with conductive properties. The film becomes 119.

[0144] Furthermore, after forming the insulating film 233, the insulating film 233 becomes a transparent conductive film 119. Heat treatment may be performed while in contact. As a result, the conductivity of the light-transmitting conductive film 119 It can be further enhanced.

[0145] Furthermore, depending on the distance of nitrogen and / or hydrogen transport from the insulating film 233, the semiconductor film 118 may be affected. In some cases, a portion of the region superimposed with the conductive film 125 may remain as an oxide semiconductor.

[0146] Furthermore, between insulating film 130 and insulating film 233, by CVD using organic silane gas A silicon oxide film may be formed.

[0147] Furthermore, between insulating film 130 and insulating film 233, by CVD using organic silane gas When forming a silicon oxide film, the insulating film 130 is an acid that satisfies the stoichiometric composition. It contains more oxygen than the element, and when heated, some of the oxygen is removed, forming an oxide insulating film that provides insulation. After forming the film 130, a heat treatment at 350°C is performed to remove excess oxygen contained in the insulating film 130. The semiconductor film 111 is then moved. Next, the substrate temperature is raised by using the organic silane gas listed above. After forming a silicon oxide film by CVD at 50°C, the insulating film 233 is used as the substrate temperature A nitride insulating film with a low hydrogen content is formed at a temperature of 350°C.

[0148] Next, in the region where insulating film 228, insulating film 230, and insulating film 233 overlap with the conductive film 113 After forming the mask by the sixth photolithography step, insulating film 228, insulating film 23 Etching the insulating film 233 and the insulating film 233 results in an insulating film having an opening 117 that reaches the conductive film 113. 229, Insulating film 231 and insulating film 232 are formed (see Figure 8(A)). Aperture 117 This can be formed in the same manner as the opening 123.

[0149] Finally, the element portion to be provided on the substrate 102 is fabricated by forming the pixel electrode 221. This is possible (see Figure 8(B)). The pixel electrode 221 is made using the materials listed above, and open A conductive film is formed in contact with the conductive film 113 through the opening 117. Next, the seventh After forming a mask by the photolithography process, processing is carried out using the said mask. The pixel electrode 221 can be formed by this. Note that the mask and the processing are performed on scan lines 107 and This can be done in the same way as with capacitance line 115.

[0150] <Example 1> In a semiconductor device according to one aspect of the present invention, the structure of the capacitive element can be appropriately changed. A specific example of this structure will be explained using Figure 9. Note that Figures 2 and 3 will be used here. Only the capacitance element 245, which is different from the capacitance element 205 described above, will be explained.

[0151] The gate insulating film 227 is made of an insulating film 225 which is a nitride insulating film and an insulating film 2 which is an oxide insulating film. In a laminated structure with 26, in the region where at least a light-transmitting conductive film 119 is provided Only the insulating film 225 is provided. With this structure, the insulating film 225 is nitride insulating film. Since the edge film is in contact with the lower surface of the transparent conductive film 119, the semiconductor film 11 The semiconductor film formed simultaneously with 1 is formed from a metal oxide film having conductive properties. A transparent conductive film 119 can be used (see Figure 9). In this case, a capacitive element The dielectric films of 245 are insulating film 229, insulating film 231, and insulating film 232. The film 225 and the insulating film 226 shall be made of insulating films suitable for use with the gate insulating film 127. The insulating film 225 may be an insulating film similar to the insulating film 232. The structure is as shown in Figure 9. By doing so, the conductive film 11 having light transmission is produced when the insulating film 129 and insulating film 131 are etched. Because it is possible to prevent a decrease in film thickness 9, the yield is higher compared to the semiconductor device shown in Figure 3. The quality improves.

[0152] In the configuration shown in Figure 9, the upper surface of the light-transmitting conductive film 119 is the insulating film 132 A contact configuration is also acceptable. That is, in the insulating film 129 and insulating film 131 shown in Figure 9 The region in contact with the light-transmitting conductive film 119 may be removed. In this case, the capacitive element 2 The dielectric film 45 is an insulating film 132. The upper and lower surfaces of the light-transmitting conductive film 119 are nitrogen-filled. By configuring it to be in contact with the nitride insulating film, it is more efficient than when only one side is in contact with the nitride insulating film. The conductivity of the light-transmitting conductive film 119 can be increased.

[0153] <Modification 2> In one aspect of the present invention, a semiconductor device has a light-transmitting electrode that constitutes a capacitive element. The connection between the conductive film and the capacitance line can be changed as appropriate. For example, by further increasing the aperture ratio To achieve this, the structure is designed so that a light-transmitting conductive film is in direct contact with the capacitance line, without an intervening conductive film. This is possible. A specific example of this structure will be explained using Figure 10. Note that Figures 2 and Only the capacitance element 145, which is different from the capacitance element 205 explained in Figure 3, will be described. Figure 10 This is a cross-sectional view of a semiconductor device.

[0154] In the pixel, a light-transmitting conductive film 11 functions as the other electrode of the capacitive element 145. 9 is in direct contact with the capacitance line 115 and the aperture 143. Capacitive element 205 shown in Figure 3 and Unlike the conductive film 125, the transparent conductive film 119 and the capacitance line 115 are in direct contact without an intermediary. As a result, a conductive film 125 that acts as a light-shielding film is not formed, and the aperture ratio of the pixel 141 is further reduced. It can be improved.

[0155] <Variation 3> Furthermore, in a semiconductor device according to one aspect of the present invention, the capacitive element contains light-transmitting The configuration of the conductive film and capacitance lines can be changed as appropriate. A specific example of this structure is shown in Figure 11. This will be explained using the translucent conductive film 11 described in Figures 2 and 3. Regarding the transparent conductive film 178 and capacitance line 176, which are different from 9 and capacitance line 115 I will explain.

[0156] Figure 11 is a top view of pixel 172, where the capacitance line 176 extends parallel to the signal line 109. It is provided as follows. Note that the signal line 109 and the capacitance line 176 are connected to the signal line drive circuit 106. See Figure 1(A). It is electrically connected to the signal. As shown in pixel 172 in Figure 11, The shape is such that the side parallel to scan line 107 is longer than the side parallel to line 109, and capacity Line 176 may be provided extending in a direction parallel to the signal line 109.

[0157] The capacitive element 174 is connected to a capacitive line 176 that extends parallel to the signal line 109. The capacitive element 174 has a light-transmitting conductive film 178 and a light-transmitting pixel element. The electrode 221 and the dielectric film formed on the transistor 103, which is a light-transmitting insulating film. (Not shown in Figure 11.) It is composed of the following: That is, the capacitive element 174 is light-transmitting.

[0158] The capacitance line 176 can be formed simultaneously with the signal line 109 and the conductive film 113. By providing the wire 176 in contact with the light-transmitting conductive film 178, the light-transmitting conductive film 1 It is possible to increase the contact area of ​​78 and capacitance line 176. Furthermore, pixel 172 In this case, the side parallel to the signal line 109 is shorter than the side parallel to the scan line 107. Therefore, it is possible to reduce the area where the pixel electrode 121 and the capacitance line 176 overlap, and This can increase the percentage of votes.

[0159] Furthermore, in Figure 3, since the capacitance line 115 is formed simultaneously with the scan line 107, To connect the light-transmitting conductive film 119, an opening is made in the gate insulating film 127. A photolithography process was necessary to create the opening. However, Figure 11 As shown, by forming the signal line 109 and the capacitance line 176 simultaneously, a light-transmitting conductor is formed. It is possible to directly connect the film 119 and the capacitance line 176. As a result, photolithography It is possible to reduce the number of photolithography steps. In other words, the number of photolithography steps is reduced to six. Therefore, it is possible to fabricate transistors, pixel electrodes connected to transistors, and capacitive elements. It is possible.

[0160] <Modification 4> In a semiconductor device according to one aspect of the present invention, the electrodes and capacitance lines constituting the capacitive element are transmitted light A conductive film with certain properties can be obtained. A specific example will be explained using Figure 12. Unlike the light-transmitting conductive film 119 and capacitance line 115 described in Figure 2, this has light-transmitting properties. Only the conductive film 198 will be described. Figure 12 is a top view of pixel 196, and pixel 1 In 96, the transparent conductive film 198, which serves as both the electrode and capacitance line of the capacitive element 197, It is provided. In the light-transmitting conductive film 198, it extends in a direction parallel to the signal line 109. It has a region that functions as a capacitance line. The transparent conductive film 198 The region that overlaps with the pixel electrode 221 functions as an electrode for the capacitive element 197. The conductive film 198 having light-transmitting properties is formed by the same process as the conductive film 119 having light-transmitting properties shown in Figure 2. It is possible.

[0161] Furthermore, the light-transmitting conductive film 198 is continuously arranged without separation across all pixels 196 in one row. When provided as a base, the light-transmitting conductive film 198 overlaps with the scanning line 107, so scanning Due to the influence of the potential change of line 107, the capacitance line and the capacitance element 197 do not function as electrodes. There is a match. Therefore, as shown in Figure 12, a transparent conductive film 1 in each pixel 196 98 are provided at intervals, and the light-transmitting conductive film 198 provided at intervals is connected to the signal line 109 and The conductive film 199, which can be formed using the conductive film 113 formation process, is used for electrical connection. It is preferable that the conductive film 198, which has light-transmitting properties, is connected to the conductive film 199. The area that is not illuminated overlaps with the pixel electrode 221, resulting in a light-transmitting electrode in that area. Since the resistance of the conductive film 198 can be reduced, the light-transmitting conductive film 198 is used in capacitance lines and capacitance elements. It functions as one of the electrodes of 197.

[0162] Although not shown in the diagram, in the translucent conductive film 198, the scan line 107 is superimposed. If the potential change of scan line 107 does not affect the region, the light-transmitting conductive film 198 is the pixel Each of the 196 lines is configured to have a single translucent conductive film that overlaps with the scan line 107. It can be provided in this way. In other words, a light-transmitting conductive film 198 can be provided on all pixels 19 in one row. At point 6, they can be provided as a continuous unit without any separation.

[0163] In Figure 12, the region of the translucent conductive film 198 that functions as a capacitance line is parallel to the signal line 109. Although the configuration extends in the row direction, the region that functions as a capacitance line extends in a direction parallel to the scan line 107. A stretched configuration is also possible. Furthermore, the capacitance lines of the translucent conductive film 198 function as regions. When the region is configured to extend in a direction parallel to the scan line 107, the transistor 103 and the capacitor In element 197, a semiconductor film 111 and a light-transmitting conductive film 198 and a signal line 10 It is necessary to provide an insulating film between 9 and the conductive film 113 to electrically separate them.

[0164] As described above, the electrodes and capacitance lines of the capacitive element provided in the pixel, as in pixel 196, By providing a light-transmitting conductive film, the aperture ratio of the pixels can be increased.

[0165] <Modification 5> Furthermore, in a semiconductor device according to one aspect of the present invention, the configuration of the capacitance lines can be appropriately changed. Yes, it is possible. This structure will be explained using Figure 13. Note that the structure explained in Figure 2 will not be used here. Compared to capacitance line 115, the position of the capacitance line is different between two adjacent pixels. .

[0166] Figure 13 shows that capacitive lines are provided between adjacent pixels in the extension direction of signal line 409. The configuration is shown. Note that capacitive lines are provided between adjacent pixels in the expansion direction of scan line 437. It can also be configured as follows.

[0167] Figure 13 shows the area above adjacent pixels 401_1 and 401_2 in the direction of extension of signal line 409. This is a view drawing.

[0168] Scan lines 407_1 and 407_2 are parallel to each other and are connected to signal line 409. It is provided extending in a direction that is approximately perpendicular to the other. Between scan line 407_1 and scan line 407_2 Furthermore, a capacitance line 415 is provided parallel to each other with respect to scan lines 407_1 and 407_2. Furthermore, the capacitance line 415 is provided in the capacitance element 405_1 of the pixel 401_1, and the pixel It is connected to the capacitive element 405_2 provided in 401_2. Pixel 401_1 and Pixel 401 The top shape of _2 and the arrangement of its components are symmetrical with respect to the capacitance line 415.

[0169] Pixel 401_1 has a transistor 403_1, and is connected to the transistor 403_1. A pixel electrode 421_1 and a capacitive element 405_1 are provided.

[0170] Transistor 403_1 is provided in the region where scan line 407_1 and signal line 409 intersect. Transistor 403_1 is a semiconductor having at least a channel formation region. The film 411_1, the gate electrode, the gate insulating film (not shown in Figure 13), and the source electrode , and a drain electrode. Note that in scan line 407_1, the semiconductor film 411_1 and The superimposed region functions as the gate electrode of transistor 403_1. Furthermore, the region superimposed with the semiconductor film 411_1 serves as the source electrode of transistor 403_1. It functions. In the conductive film 413_1, the region that overlaps with the semiconductor film 411_1 is a transient. Functions as the drain electrode of 403_1. Conductive film 413_2 and pixel electrode 421_1 They are connected at opening 417_1.

[0171] Capacitive element 405_1 communicates with capacitance line 415 through conductive film 425 provided in aperture 423. They are electrically connected. Capacitive element 405_1 has a light-transmitting conductive film 419_1, A light-transmitting pixel electrode 421_1 and a dielectric film formed on the transistor 403_1 It is composed of a light-transmitting insulating film (not shown in Figure 13). That is, capacitance Element 405_1 is light-transmitting.

[0172] Pixel 401_2 has a transistor 403_2, and is connected to the transistor 403_2. A pixel electrode 421_2 and a capacitive element 405_2 are provided.

[0173] Transistor 403_2 is provided in the region where scan line 407_2 and signal line 409 intersect. Transistor 403_2 is a semiconductor having at least a channel formation region. The film 411_2, the gate electrode, the gate insulating film (not shown in Figure 13), and the source electrode , and a drain electrode. Note that in scan line 407_2, the semiconductor film 411_2 and The superimposed region functions as the gate electrode of transistor 403_2. Furthermore, the region superimposed with the semiconductor film 411_2 serves as the source electrode of transistor 403_2. It functions. In the conductive film 413_2, the region that overlaps with the semiconductor film 411_2 is a transient. Functions as the drain electrode of 403_2. Conductive film 413_2 and pixel electrode 421_2 They are connected at opening 417_2.

[0174] Capacitive element 405_2, like capacitive element 405_1, has a conductive film provided in the opening 423. It is electrically connected to the capacitance line 415 through 425. The capacitance element 405_2 is light-transmitting A conductive film 419_2 having light-transmitting pixel electrode 421_2 and a dielectric film, A translucent insulating film (not shown in Figure 13) formed on transistor 403_2 and It is composed of the following. That is, the capacitive element 405_2 is light-transmitting.

[0175] Note that transistors 403_1 and 403_2, and capacitive element 405_ The cross-sectional structures of transistor 103 and capacitance element 405_2 are shown in Figure 3, respectively. Since it is the same as element 205, it will be omitted here.

[0176] In the top surface shape, a capacitance line is provided between two adjacent pixels, and each pixel contains By connecting capacitive elements and their capacitance lines, it is possible to reduce the number of capacitance lines. As a result, it is possible to further increase the aperture ratio of pixels compared to a structure in which capacitance lines are provided for each pixel. That is the case.

[0177] <Variation 6> In a semiconductor device according to one aspect of the present invention, the shape of the transistor provided in the pixel is The transistor shapes are not limited to those shown in Figures 2, 4, 11, 12, and 13. It can be changed as appropriate. For example, in a transistor, the signal line 109 contains - The electrode is U-shaped (C-shaped, U-shaped, or horseshoe-shaped), and the conductive film including the drain electrode is It may also be a transistor with an enclosing shape. By having this shape, the transistor Even with a small area, it becomes possible to secure a sufficient channel width, and the transistor conducts It becomes possible to increase the amount of drain current (also called on-current) that flows at times.

[0178] <Example 7> Furthermore, in the transistor described above, the oxide semiconductor film is the gate insulating film and the source electrical Transis located between the signal line 109 including the electrode and the conductive film 113 including the drain electrode Although a t-type electrode was used, instead, a semiconductor film was used to form the signal line including the source electrode and the drain electrode. A transistor can be used that is positioned between the conductive film and the insulating film 229.

[0179] <Differentiation Example 8> Furthermore, although the transistor shown above is a channel-etch type transistor, Alternatively, a channel-protected transistor can be used. By providing this, the surface of the semiconductor film 111 is etched using the signal line and conductive film formation process. It is not exposed to ions or etching gases, and impurities between the semiconductor film 111 and the channel protection film are reduced. This can be reduced. As a result, leakage current flowing between the source and drain electrodes of the transistor can be reduced. It is possible to reduce the flow rate.

[0180] <Modification 9> Furthermore, the transistor shown above refers to a transistor having one gate electrode. However, a transistor having two opposing gate electrodes separated by a semiconductor film 111 is used. It is possible.

[0181] The transistor has a conductive film on the insulating film 232 of the transistor 103 described in this embodiment. It has an electrical film. The conductive film overlaps with at least the channel formation region of the semiconductor film 111. By placing the film in a position that overlaps with the channel formation region of the semiconductor film 111, the electrical conductivity of the conductive film The position is preferably set to the lowest potential of the video signal input to signal line 109. On the surface of the semiconductor film 111 facing the conductive film, a flow occurs between the source electrode and the drain electrode. It is possible to control the current being drawn, thereby reducing variations in the electrical characteristics of the transistor. This can be achieved. In addition, by providing a conductive film, changes in the surrounding electric field affect the semiconductor film 111. This can mitigate the impact and improve the reliability of the transistor.

[0182] The conductive film provided on the insulating film 232 is the scanning line 107, the signal line 109, and the pixel electrode 121. It can be formed using materials and manufacturing methods similar to those described above, as appropriate.

[0183] Based on the above, the semiconductor film formed by the same formation process as the semiconductor film contained in the transistor contains nitrogen A metal oxide having conductive properties, i.e., light-transmitting properties, obtained by providing a metal insulating film in contact with it. By using a conductive film having as an electrode for a capacitive element, the aperture ratio can be increased, and typically, It is possible to achieve a percentage of 50% or more, preferably 55% or more, and more preferably 60% or more. Furthermore, it is possible to fabricate semiconductor devices having capacitive elements with increased charge capacitance. As a result, semiconductor devices with excellent display quality can be obtained.

[0184] Furthermore, the oxide semiconductor film, which is a semiconductor film contained in the transistor, has reduced oxygen vacancies. Since impurities such as hydrogen are reduced, a semiconductor device according to one aspect of the present invention is good This results in a semiconductor device with desirable electrical characteristics and reduced power consumption.

[0185] The configurations shown in this embodiment may be combined with the configurations shown in other embodiments as appropriate. It can be used.

[0186] <Variation 10> Furthermore, in the above-mentioned method for fabricating a transistor, a method for forming a light-transmitting conductive film 119. As a result, after the process shown in Figure 6(B), the semiconductor film 111 is covered and the semiconductor film 118 is exposed. A mask is formed. Next, the semiconductor film 118 is heated with a rare gas, hydrogen and a mixture of rare gases, and Plastic generated in an atmosphere of gas and ammonia mixture, ammonia gas, nitrogen gas, etc. Exposure to Zuma allows for the formation of a nitride insulating film on the semiconductor film 118, as shown in Figure 7(B). A light-transmitting conductive film 119 can be formed without requiring any further processing time.

[0187] Alternatively, in the above method for fabricating a transistor, a method for forming a light-transmitting conductive film 119. As a method, after the process shown in Figure 7(A), the semiconductor film 111 is covered and the semiconductor film 118 is exposed. A mask is formed. Next, the semiconductor film 118 is subjected to a mixture of a rare gas, hydrogen, and another rare gas. A mixture of noble gases and ammonia, ammonia gas, nitrogen gas, etc., is used to generate a p By exposure to the rasma, hydrogen, nitrogen, etc., diffuse into the semiconductor film 118 via the insulating film 130. Even without the process of forming a nitride insulating film on the semiconductor film 118 as shown in Figure 7(B), light transmission is possible. A conductive film 119 having the properties of can be formed.

[0188] When the semiconductor film 118 is exposed to plasma, an oxide semiconductor is formed as the semiconductor film 118. The body membrane is damaged, and defects, typically oxygen vacancies, are generated in the oxide semiconductor film. As a result, a conductive film 119 with reduced resistivity and light transmission is formed.

[0189] (Embodiment 2) This embodiment is a semiconductor device according to one aspect of the present invention, and has a different structure from the above embodiment. The semiconductor device will be described using drawings. In this embodiment, a liquid crystal display device will be used as an example. Next, a semiconductor device according to one aspect of the present invention will be described. Furthermore, the semiconductor described in this embodiment... The device differs from the above embodiment in that it has a different light-transmitting conductive film included in the capacitive element. Furthermore, in the semiconductor device described in this embodiment, the semiconductor described in the above embodiment is A configuration similar to that of the device can be found by referring to the above embodiment.

[0190] <Configuration of semiconductor device> Specific configuration of the pixel 301 provided in the pixel portion of the liquid crystal display device described in this embodiment Let's explain an example. Figure 14 shows a top view of pixel 301. Pixel 301 shown in Figure 14 is It has a capacitive element 305, and the capacitive element 305 has a capacitance line 115 and a signal line 10 within the pixel 301. It is located in the region enclosed by 9. The capacitive element 305 is a conductive film provided in the opening 123. It is electrically connected to the capacitance line 115 through 125. The capacitance element 305 is light-transmitting. A conductive film 319, a light-transmitting pixel electrode 221, and a dielectric film, a transistor It consists of a translucent insulating film (not shown in Figure 14) formed on 103. In other words, the capacitive element 305 is light-transmitting.

[0191] A transparent conductive film 319 is used as the electrode for the capacitive element. In other words, within the pixel 301 The capacitive element 305 can be formed on a large scale (large area). Therefore, while increasing the aperture ratio, Typically, it should be 50% or more, preferably 55% or more, and even more preferably 60% or more. This makes it possible to obtain a semiconductor device with increased charge capacity.

[0192] Next, the cross-sectional view between the dashed lines A1-A2 and B1-B2 in Figure 14 is shown. As shown in 15.

[0193] The cross-sectional structure of pixel 301 is as follows: On the substrate 102, the gate of transistor 103 A scan line 107 including a gate electrode is provided. A gate insulating film 127 is located on the scan line 107. A semiconductor film 111 is provided on the region where the scan line 107 of the gate insulating film 127 overlaps. A gate insulating film 127 is provided, and a light-transmitting conductive film 319 is provided on the gate insulating film 127. The source electrode of transistor 103 is placed on the semiconductor film 111 and the gate insulating film 127. A signal line 109 is included, and a conductive film 113 including the drain electrode of the transistor 103 is provided. Furthermore, a transparent conductive film 319 and capacitance lines 115 are placed on the gate insulating film 127. A conductive film 125 is provided to connect the gate insulating film 127, the signal line 109, and the semi-semi On the conductive film 111, on the conductive film 113, on the conductive film 125, and on the light-transmitting conductive film 319 Insulator 129, insulating film 131, and insulating film that function as protective insulating films for transistor 103 are used. A border film 132 is provided. The insulating film 129, insulating film 131, and insulating film 132 are conductive An opening 117 reaching the film 113 is provided, and pixel electricity is placed on the opening 117 and the insulating film 132. A pole 221 is provided. The substrate 102, the scan line 107 and the gate insulating film 127 A base insulating film may be provided between them.

[0194] In this configuration, the capacitive element 305 has a pair of electrodes, one of which is the pixel electrode 121, and one pair The other electrode of the electrode is a light-transmitting conductive film 319, and is provided between the pair of electrodes. The dielectric films are insulating film 129, insulating film 131, and insulating film 132.

[0195] The light-transmitting conductive film 319 is a conductive film formed simultaneously with the semiconductor film 111. A metal oxide with conductive properties, to which elements (dopants) that increase the conductivity have been added. It is a film. That is, the light-transmitting conductive film 319 is an oxide semiconductor that constitutes the semiconductor film 111. The body contains metallic elements and also contains dopants. The dopants include hydrogen, boron, nitrogen, From fluorine, aluminum, phosphorus, arsenic, indium, tin, antimony and noble gas elements There is one or more selected types. The dopant concentration in the light-transmitting conductive film 319 is 1× 10 19 atoms / cm 3 The above 1 x 10 22 atoms / cm 3 The following is preferred This is how the conductivity of the light-transmitting conductive film 319 can be increased to 10 S / cm or more. The current should be 1000 S / cm or less, preferably 100 S / cm or more and 1000 S / cm or less. This allows the light-transmitting conductive film 319 to function sufficiently as an electrode for the capacitive element 305. It is possible.

[0196] <Method for fabricating semiconductor devices> Next, the method for manufacturing the semiconductor device in this embodiment will be described using Figures 16 and 17. I will explain.

[0197] First, scan lines 107 and capacitance lines 115 are formed on the substrate 102, and the substrate 102, scan lines 1 An insulating film 126 is formed on 07 and the capacitance line to be processed into a gate insulating film 127, and the insulating film Semiconductor films 111 and 118 are formed on 126 (see Figure 16(A)). Oh, the steps up to this point can be carried out by referring to Embodiment 1.

[0198] Next, a dopant is added to the semiconductor film 118 to form a light-transmitting conductive film 319. An opening 123 reaching the capacitance line 115 is formed in the insulating film 126 to form a gate insulating film 127. Afterwards, the signal line 109, which includes the source electrode of transistor 103, and the drain of transistor 103 The conductive film 113 including the in electrode, the light-transmitting conductive film 319, and the capacitance line 115 are electrically connected. A conductive film 125 to be connected is formed (see Figure 16(B)).

[0199] The method of adding a dopant to the semiconductor film 118 involves masking the region other than the semiconductor film 118. By providing and using the mask, hydrogen, boron, nitrogen, fluorine, aluminum, phosphorus, and arsenic , one or more dopants selected from indium, tin, antimony and noble gas elements It is added by methods such as on-injection or ion doping. Instead of the Ping method, the semiconductor film 118 is exposed to the plasma containing the dopant, A dopant may be added. Furthermore, even if heat treatment is performed after adding the dopant, Good. The heat treatment is for the dehydrogenation of the semiconductor film 111 and the light-transmitting conductive film 319 or The dehydration process can be carried out as appropriate by referring to the details of the heat treatment.

[0200] The process of adding the dopant is performed on the signal line 109, the conductive film 113, and the conductive film 125. This may be done after the formation of the transparent conductive film 319, No dopants are added to the regions in contact with conductive films 113 and 125.

[0201] Next, gate insulating film 127, signal line 109, semiconductor film 111, conductive film 113, conductive film 1 25, and an insulating film 128 is formed on the light-transmitting conductive film 319, and an insulating film 128 is formed on the insulating film 128. A border film 130 is formed, and an insulating film 133 is formed on the insulating film 130 (see Figure 17(A)). ). This step can be carried out by referring to Embodiment 1.

[0202] Next, openings reaching the conductive film 113 are made in insulating film 128, insulating film 130, and insulating film 133. A mouth 117 is formed, and insulating film 129, insulating film 131, and insulating film 132 are formed (Figure 17) (See (B).) A pixel electrode 221 is formed in contact with the conductive film 113 through the opening 117. (See Figure 15.) This process can also be carried out by referring to Embodiment 1. ru.

[0203] By following the above steps, the semiconductor device according to this embodiment can be manufactured.

[0204] Based on the above, the semiconductor film formed by the same formation process as the semiconductor film contained in the transistor is A metal oxide with conductive properties obtained by adding a pant, i.e., a translucent metal oxide. By using such a conductive film as the electrode of a capacitive element, the aperture ratio can be increased while increasing the charge capacitance. A semiconductor device having a capacitive element can be fabricated. As a result, excellent display quality can be achieved. A semiconductor device can be obtained.

[0205] Furthermore, since both electrodes of the capacitive element 305 are conductive, the plane of the capacitive element 305 Sufficient charge capacity can be obtained even when the area is reduced. Note that oxide semiconductor films transmit light. Since the ratio is 80-90%, the area of ​​the light-transmitting conductive film 319 is reduced, and the pixel 301 By providing a region in which the light-transmitting conductive film 319 is not formed, the backlight This can increase the transmittance of light emitted from light sources such as backlights. It is possible to reduce the brightness of the light source, thereby reducing the power consumption of the semiconductor device. .

[0206] Furthermore, the oxide semiconductor film, which is a semiconductor film contained in the transistor, has reduced oxygen vacancies. Impurities such as hydrogen are reduced. As a result, the transistor exhibits normally-on characteristics. This can suppress the process and improve the electrical characteristics and reliability of semiconductor devices. This also makes it possible to reduce the power consumption of semiconductor devices.

[0207] The configurations shown in this embodiment are compatible with the configurations shown in other embodiments and their modifications. They can be used in any combination.

[0208] (Embodiment 3) In this embodiment, the shape of the conductive film having different light transmittance than in Embodiments 1 and 2 is The method will be explained using Figure 6.

[0209] In this embodiment, by irradiating a semiconductor film with electromagnetic waves such as visible light, ultraviolet light, and X-rays, The characteristic is to enhance the conductivity of the semiconductor film and make it a conductive metal oxide. The method for fabricating the conductive film will be explained using Figure 6.

[0210] As shown in Figure 6(A), similar to Embodiment 1, a circuit including a gate electrode is laid on the substrate 102. The scan lines 107 and capacitance lines 115 are formed. Next, the substrate 102, the scan line 1 including the gate electrode. Next, an insulating film 126 is formed on 07 and capacitance line 115. Then, a semiconductor film is formed on the insulating film 126. Forms 111 and a semiconductor film 118.

[0211] Next, electromagnetic waves such as visible light, ultraviolet light, and X-rays are directed from the substrate 102 side to the semiconductor film 118. Irradiate with light. In this process, the semiconductor film 111 is shielded from light by the scanning line 107 including the gate electrode. Therefore, the electromagnetic waves mentioned above are not irradiated, and conductivity does not increase.

[0212] When electromagnetic waves are irradiated onto the semiconductor film 118, defects are generated within the semiconductor film 118. The defects become carrier paths, increasing conductivity and resulting in a metal oxide with conductive properties. Metal oxides can be used as transparent conductive films that serve as electrodes for capacitive devices.

[0213] In this embodiment, unlike Embodiment 1, the insulating film 128 and insulating film 13 It does not require the etching process of a portion of the zeros. Also, unlike Embodiment 2, the semiconductor film The process of forming a mask is not required to add the dopant to 118. Therefore, This allows for a reduction in the number of photomasks, simplifying the manufacturing process and lowering costs. That is the case.

[0214] (Embodiment 4) In this embodiment, a transverse electric field is used to orient liquid crystal molecules using FFS (Fringe Fi One aspect of the present invention is a liquid crystal display device in (eld Switching) mode, using as an example a semi-linear switching mode. A conductive device will be described. In the semiconductor device described in this embodiment, the above-described form A configuration similar to that of the semiconductor device described above can be found by referring to the above embodiment.

[0215] <Configuration of semiconductor device> Figure 18 shows a top view of the pixel 501 described in this embodiment. Figure 18(A) shows a common electric This is a top view of pixel 501 with pole 521 omitted, and Figure 18(B) is a common view of Figure 18(A) This is a top view of pixel 501 with pole 521.

[0216] The pixel 501 shown in Figure 18 is connected to transistor 103 and to transistor 103. It has a capacitive element 505. The capacitive element 505 has a light-transmitting conductive film 519 and a light-transmitting A common electrode 521 formed of a conductive film having the properties of a light-transmitting film formed on the transistor 103 It is composed of an insulating film having properties (not shown in Figure 18). That is, the capacitive element 505 is It is translucent. Furthermore, the translucent conductive film 519 is the conductive film 1 of transistor 103. It connects to 13 and functions as a pixel electrode. Additionally, the common electrode 521 has an opening (slit). It has that, by applying an electric field between the common electrode and the pixel electrode, a light-transmitting conductor is formed. In the superposition region of the film 519, the light-transmitting insulating film, and the common electrode 521, a capacitive element and In addition to functioning as such, it is possible to control the orientation of liquid crystal molecules in a direction parallel to the substrate. As a result, FFS The liquid crystal display in this mode offers superior viewing angles and higher image quality.

[0217] Next, Figure 19 shows a cross-sectional view of the substrate 102 between the dashed line A1-A2 in Figure 18(B). show.

[0218] The cross-sectional structure of the pixel 501 in this embodiment is as follows: On the substrate 102, A scan line 107 is provided, which includes the gate electrode of the transistor 103. A gate insulating film 127 is provided. The area of ​​the gate insulating film 127 that overlaps with the scan line 107 A semiconductor film 111 is provided on the region, and a transparent conductive material is provided on the gate insulating film 127. A film 519 is provided. Transis The signal line 109 includes the source electrode of transistor 103, and the drain electrode of transistor 103. A conductive film 113 is provided. The conductive film 113, including the drain electrode, is light-transmitting. It is connected to the conductive film 519 and functions as a pixel electrode. On the gate insulating film 127, signal line On 109, on the semiconductor film 111, and on the conductive film 113, as a protective insulating film for transistor 103 Functional insulating films 229, 231, and 232 are provided. An insulating film 232 is provided on the conductive film 519 which has properties, and a common electrical charge is provided on the insulating film 232. A pole 521 is provided. The common electrode 521 is not separated for each pixel in the pixel area. , are provided in a continuous manner. Note that the substrate 102, the scan line 107 and the gate insulating film 127 A base insulating film may be provided between them.

[0219] The light-transmitting conductive film 519 has the light-transmitting properties described in Embodiments 1 to 3. It can be formed in the same manner as the conductive film described in Embodiment 1. The common electrode 521 is described in Embodiment 1. It can be formed using the same material as the pixel electrode 221.

[0220] As in the capacitive element 505 of this embodiment, the transparent conductive film 519 is translucent By connecting to the conductive film 113 of the ZISTA, the conductive film 113 and light transmission are possible without providing an opening. It is possible to directly connect the conductive film 519 having the transistor 103 and capacitance It is possible to improve the flatness of element 505. In addition, it does not have capacitance lines and has light transmission. By making the common electrode 521 function as a capacitance line, the aperture ratio of the pixel 501 can be further increased. This is possible.

[0221] (Embodiment 5) In this embodiment, the transistors included in the semiconductor device described in the above embodiment are used. Furthermore, in the case of capacitive elements, one embodiment applicable to an oxide semiconductor film, which is a semiconductor film, will be described. do.

[0222] The above oxide semiconductor films include amorphous oxide semiconductors, single-crystal oxide semiconductors, and polycrystalline oxides. In addition to semiconductors, there are oxide semiconductors that have a crystalline portion (C Axis Aligned Crystal Composed of stalline oxide semiconductor (CAAC-OS). It is preferable that this is done.

[0223] CAAC-OS film is one of the oxide semiconductor films having multiple crystalline regions, and most The crystalline portion is small enough to fit within a cube with sides less than 100 nm. Therefore, CAAC- The crystalline portion contained in the OS film is within a cube with sides less than 10 nm, less than 5 nm, or less than 3 nm. This also includes cases where the size fits within the given space. CAAC-OS films have fewer defects than microcrystalline oxide semiconductor films. It is characterized by a low void density. A detailed explanation of the CAAC-OS membrane follows. .

[0224] CAAC-OS film is examined using a transmission electron microscope (TEM). When observed with a tron ​​microscope, a clear boundary between crystalline parts is observed, i.e. The grain boundaries (also called crystal grain boundaries) cannot be identified. Therefore, C AAC-OS films are less susceptible to the decrease in electron mobility caused by grain boundaries.

[0225] The CAAC-OS film was observed by TEM from a direction roughly parallel to the sample surface (cross-sectional TEM view). (Inference) It can be confirmed that in the crystalline part, metal atoms are arranged in layers. Each of these layers has irregularities on the surface (also called the surface to be formed) or the upper surface that forms the CAAC-OS film. The shape reflects this, and the elements are arranged parallel to the surface or top surface of the CAAC-OS film.

[0226] On the other hand, the CAAC-OS film was observed by TEM from a direction roughly perpendicular to the sample surface (plane T). EM observation revealed that in the crystalline region, metal atoms are arranged in a triangular or hexagonal shape. This can be confirmed. However, no regularity is observed in the arrangement of metal atoms between different crystalline regions. stomach.

[0227] Cross-sectional TEM observation and planar TEM observation revealed that the crystalline portion of the CAAC-OS film exhibits orientation. It can be seen that this is happening.

[0228] X-ray diffraction (XRD) of CAAC-OS film When structural analysis is performed using the instrument, for example, CAAC-OS having InGaZnO4 crystals is found. Out-of-plane analysis of the film showed a peak at a diffraction angle (2θ) of around 31°. This peak may appear. This peak is attributed to the (009) plane of the InGaZnO4 crystal. Therefore, the crystals of the CAAC-OS film have c-axis orientation, and the c-axis is generally aligned with the surface to be formed or the upper surface. It can be confirmed that it is facing in a nearly vertical direction.

[0229] On the other hand, in the CAAC-OS film, X-rays are incident from a direction approximately perpendicular to the c-axis in an in-p In analysis using the lane method, a peak may appear when 2θ is around 56°. This is attributed to the (110) plane of the InGaZnO4 crystal. For a crystalline semiconductor film, fix 2θ to approximately 56° and use the normal vector of the sample surface as the axis (φ axis). When the analysis (φ scan) is performed while rotating the sample, a crystal plane equivalent to the (110) plane is found. Six peaks attributable to this are observed. In contrast, in the case of the CAAC-OS film, 2θ Even when fixed at approximately 56° and scanned using the φ scan function, no clear peak appears.

[0230] From the above, it can be concluded that in CAAC-OS films, the orientation of the a-axis and b-axis between different crystalline regions is It is irregular, but has c-axis orientation, and the c-axis is parallel to the normal vector of the surface to be formed or the upper surface. It can be seen that it is facing in a certain direction. Therefore, it is arranged in layers as confirmed by the aforementioned cross-sectional TEM observation. Each layer of arranged metal atoms is a plane parallel to the ab-plane of the crystal.

[0231] The crystalline portion is formed when the CAAC-OS film is deposited, or when crystallization treatment such as heat treatment is performed. It is formed when this occurs. As mentioned above, the c-axis of the crystal is the surface on which the CAAC-OS film is formed or It is oriented in a direction parallel to the normal vector of the upper surface. Therefore, for example, the shape of the CAAC-OS film When altered by etching or other means, the c-axis of the crystal becomes the surface on which the CAAC-OS film is formed or The vector may not be parallel to the normal vector of the top surface.

[0232] Furthermore, the degree of crystallinity in the CAAC-OS film does not need to be uniform. For example, CAAC-OS When the crystalline portion of the film is formed by crystal growth from near the upper surface of the CAAC-OS film, The region near the surface may have a higher degree of crystallinity than the region near the surface being formed. Also, CA When impurities are added to an AC-OS film, the degree of crystallinity in the region where the impurities are added changes, and Regions with varying degrees of crystallinity may also be formed.

[0233] Furthermore, the out-of-plane CAAC-OS film having InGaZnO4 crystals Analysis using this method revealed that in addition to the peak near 2θ = 31°, there is also a peak near 2θ = 36°. In some cases, this may occur. Peaks near 2θ of 36° indicate c-axis orientation in a portion of the CAAC-OS film. This indicates the presence of crystals that do not possess properties. The CAAC-OS film has a 2θ of approximately 31°. It is preferable that a peak is shown and that no peak is shown near 36° for 2θ.

[0234] There are three possible methods for forming CAAC-OS.

[0235] The first method involves forming an oxide semiconductor film at a film formation temperature of 100°C to 450°C. As a result, the c-axis of the crystalline portion contained in the oxide semiconductor film is the normal vector of the formed surface or the surface This method forms crystal regions aligned in a direction parallel to the normal vector.

[0236] The second method involves depositing an oxide semiconductor film to a thin thickness, followed by heating at a temperature between 200°C and 700°C. By performing heat treatment, the c-axis of the crystalline portion contained in the oxide semiconductor film becomes the normal vector of the surface to be formed. This method forms crystal portions aligned in a direction parallel to the normal vector of the crystal or surface.

[0237] The third method involves depositing a thin first layer of oxide semiconductor film, followed by heating at 200°C or above 700°C. By performing heat treatment below °C and then depositing a second oxide semiconductor film, the oxide semiconductor The c-axis of the crystalline portion contained in the body membrane is parallel to the normal vector of the surface being formed or the normal vector of the surface. This is a method for forming crystal regions aligned in a specific direction.

[0238] Transistors with CAAC-OS applied to oxide semiconductor films are resistant to visible light and ultraviolet light irradiation. The variation in electrical properties is small. Therefore, applying CAAC-OS to oxide semiconductor films results in a small change in performance. The generator has good reliability.

[0239] Furthermore, CAAC-OS uses polycrystalline oxide semiconductor sputtering targets. It is preferable to deposit the film by sputtering. The sputtering target When ions collide with the sputtering target, the crystalline region contained within the sputtering target is on the ab plane. The sputtering particles are cleaved and have a flat or pellet-shaped surface parallel to the ab plane. This can cause peeling. In this case, the flat or pellet-shaped sputtering particles may By maintaining its crystalline state, CAAC-OS can be deposited on the film-forming surface. Cut.

[0240] Furthermore, it is preferable to apply the following conditions for forming the CAAC-OS film.

[0241] By reducing the inclusion of impurities during film formation, it is possible to suppress the disruption of the crystalline state due to impurities. For example, the concentration of impurities present in the deposition chamber (such as hydrogen, water, carbon dioxide, and nitrogen). It should be reduced. Also, the concentration of impurities in the film-forming gas should be reduced. Specifically, the dew point A film-forming gas with a temperature of -80°C or lower, preferably -100°C or lower, is used.

[0242] Also, by increasing the heating temperature of the film-forming surface during film formation (for example, the substrate heating temperature), migration of sputtering particles occurs after reaching the film-forming surface. Specifically, film formation is carried out with the temperature of the film-forming surface being 100°C or higher and 740°C or lower, preferably 150°C or higher and 500°C or lower. When the sputtering particles in the form of flat plates or pellets reach the film-forming surface, migration occurs on the film-forming surface, and the flat surface of the sputtering particles adheres to the film-forming surface. By increasing the temperature of the film-forming surface during film formation, when the sputtering particles in the form of flat plates or pellets reach the film-forming surface, migration occurs on the film-forming surface, and the flat surface of the sputtering particles adheres to the film-forming surface. By increasing the temperature of the film-forming surface during film formation, when the sputtering particles in the form of flat plates or pellets reach the film-forming surface, migration occurs on the film-forming surface, and the flat surface of the sputtering particles adheres to the film-forming surface. When the sputtering particles in the form of flat plates or pellets reach the film-forming surface, migration occurs on the film-forming surface, and the flat surface of the sputtering particles adheres to the film-forming surface. When the sputtering particles in the form of flat plates or pellets reach the film-forming surface, migration occurs on the film-forming surface, and the flat surface of the sputtering particles adheres to the film-forming surface.

[0243] Also, it is preferable to reduce the plasma damage during film formation by increasing the oxygen ratio in the film-forming gas and optimizing the power. The oxygen ratio in the film-forming gas is 30% by volume or higher, preferably 100% by volume. By increasing the oxygen ratio in the film-forming gas and optimizing the power, it is preferable to reduce the plasma damage during film formation. The oxygen ratio in the film-forming gas is 30% by volume or higher, preferably 100% by volume. By increasing the oxygen ratio in the film-forming gas and optimizing the power, it is preferable to reduce the plasma damage during film formation. The oxygen ratio in the film-forming gas is 30% by volume or higher, preferably 100% by volume.

[0244] <° As an example of the sputtering target, an In-Ga-Zn-O compound target is shown below. As an example of the sputtering target, an In-Ga-Zn-O compound target is shown below for the case of In-Ga-Zn-O compound target. [[ID=3*]]

[0245] InO X powder, GaO Y powder, and ZnO Z powder are mixed in a predetermined number of moles, and after pressure treatment and heat-treated at a temperature of 1000°C or higher and 1500°C or lower to obtain a polycrystalline In-Ga -Zn-O compound target. The pressure treatment may be carried out while cooling (or allowing to cool) or while heating. Here, X, Y, and Z are arbitrary positive numbers. and heat-treated at a temperature of 1000°C or higher and 1500°C or lower to obtain a polycrystalline In-Ga-Zn-O compound target. The pressure treatment may be carried out while cooling (or allowing to cool) or while heating. Here, X, Y, and Z are arbitrary positive numbers. Here, the predetermined mole ratio is, for example, InO X powder, GaO Y powder, and ZnO Z powder are The ratios are 2:2:1, 8:4:3, 3:1:1, 1:1:1, 4:2:3, or 3:1:2. The type of powder and the molar ratio in which they are mixed will be determined based on the sputtering target being prepared. You can adjust it as needed depending on the situation.

[0246] Furthermore, the oxide semiconductor film may have a structure in which multiple oxide semiconductor films are stacked. For example, The oxide semiconductor film is constructed as a stack of a first oxide semiconductor film and a second oxide semiconductor film, and the first Metal oxides with different atomic ratios may be used for the oxide semiconductor film and the second oxide semiconductor film. For example, the first oxide semiconductor film contains an oxide containing two types of metals, and an oxide containing three types of metals. Using one of four metal oxides, the first oxide is applied to the second oxide semiconductor film. A semiconductor film containing two different metals, an oxide containing three different metals, and four different metals. Oxides containing may also be used.

[0247] The oxide semiconductor film has a two-layer structure, consisting of a first oxide semiconductor film and a second oxide semiconductor film. The elements may be the same, but the atomic ratio of the two may be different. For example, the first oxide semiconductor film The atomic ratio is set to In:Ga:Zn = 3:1:2, and the atomic ratio of the second oxide semiconductor film is set to In The ratio of :Ga:Zn may be set to 1:1:1. Alternatively, the atomic ratio of the first oxide semiconductor film may be set to In Let :Ga:Zn=2:1:3, and set the atomic ratio of the second oxide semiconductor film to In:Ga:Zn= A ratio of 1:3:2 is also acceptable. Note that the atomic ratio of each oxide semiconductor film is set to the above-mentioned atomic ratio as an error. Includes a variation of plus or minus 20% in numerical ratios.

[0248] At this time, of the first oxide semiconductor film and the second oxide semiconductor film, the side closer to the terminal electrode ( It is preferable to set the atomic ratio of In to Ga in the oxide semiconductor film on the channel side to In ≥ Ga. The atomic ratio of In to Ga in the oxide semiconductor film on the side far from the gate electrode (back channel side) may be In < Ga. With these laminated structures, a transistor with a high field-effect mobility can be fabricated. On the other hand, the atomic ratio of In to Ga in the oxide semiconductor film on the side close to the gate electrode (channel side) is In < Ga, and by setting the atomic ratio of In to Ga in the oxide semiconductor film on the back channel side to In ≥ Ga, the variation amount of the threshold voltage due to the change over time of the transistor and the reliability test can be reduced.

[0249] The first oxide semiconductor film with an atomic ratio of In:Ga:Zn = 1:3:2 can be formed by sputtering using an oxide target with an atomic ratio of In:Ga:Zn = 1:3:2. It can be formed with the substrate temperature at room temperature using argon or a mixed gas of argon and oxygen as the sputtering gas. The second oxide semiconductor film with an atomic ratio of In:Ga:Zn = 3:1:2 can be formed in the same manner as the first oxide semiconductor film using an oxide target with an atomic ratio of In:Ga:Zn = 3:1:2.

[0250] Alternatively, the oxide semiconductor film may have a three-layer structure, with the constituent elements of the first to third oxide semiconductor films being the same and their respective atomic ratios being different. The configuration with the oxide semiconductor film having a three-layer structure will be described using FIG. 20. <​​​​​​​​​​​​The material is InM 1x Zn y O z (x≧1, y>1, z>0, M1 = Ga, Hf, etc.) and can be expressed as a material is used. However, when Ga is included in the material constituting the first oxide semiconductor film 199a and the third oxide semiconductor film 1 99c, if the proportion of Ga included is large, specifically, when it is I nM 1X Zn Y O Z and X exceeds 10 in the material that can be expressed as, there is a risk of powder generation during film formation, which is unsuitable.

[0252] Also, the material constituting the second oxide semiconductor film 199b is InM 2x Zn y O z (x≧ 1, y≧x, z>0, M2 = Ga, Sn, etc.) and a material that can be expressed as is used.

[0253] The materials of the first, second, and third oxide semiconductor films are appropriately selected so that the conduction band of the second oxide semiconductor film 199b is the deepest from the vacuum level compared to the conduction bands of the first oxide semiconductor film 199a and the third oxide semiconductor film 199c, forming a well - type structure.

[0254] In the oxide semiconductor film, silicon or carbon, which is one of the Group 14 elements, serves as a donor supply source. Therefore, when silicon or carbon is included in the oxide semiconductor film, the oxide semiconductor film will be n - type. For this reason, the concentration of each of silicon and carbon included in each oxide semiconductor film is 3×10 / cm 18 or less, preferably 3×10 3 / cm 17 or less. In particular 3 , so that the Group 14 elements do not mix much into the second oxide semiconductor film 199b, the first oxide ​​​In the semiconductor film 199a and the third oxide semiconductor film 199c, the second oxide serves as a carrier path. It is preferable to have a configuration in which the material semiconductor film 199b is sandwiched or surrounded. That is, the first oxide semiconductor film The conductive film 199a and the third oxide semiconductor film 199c are made of Group 14 elements such as silicon and carbon. It can also be called a barrier film that prevents the second oxide semiconductor film 199b from being mixed in.

[0255] For example, if the atomic ratio of the first oxide semiconductor film 199a is In:Ga:Zn=1:3:2 Furthermore, the atomic ratio of the second oxide semiconductor film 199b is set to In:Ga:Zn=3:1:2, The atomic ratio of the oxide semiconductor film 199c in step 3 may be set to In:Ga:Zn = 1:1:1. Furthermore, the third oxide semiconductor film 199c has an atomic ratio of In:Ga:Zn=1:1:1. It can be formed by a sputtering method using an oxide target.

[0256] Alternatively, the first oxide semiconductor film 199a is made with an atomic ratio of In:Ga:Zn=1:3:2 Let a certain oxide semiconductor film be considered, and a second oxide semiconductor film 199b be made with an atomic ratio of In:Ga:Z The oxide semiconductor film is defined as n=1:1:1 or In:Ga:Zn=1:3:2, and the third acid The oxide semiconductor film 199c is an oxide semiconductor with an atomic ratio of In:Ga:Zn = 1:3:2. It may also be a membrane, or a three-layer structure.

[0257] The constituent elements of the first oxide semiconductor film 199a to the third oxide semiconductor film 199c are the same. Therefore, the second oxide semiconductor film 199b has an interface with the first oxide semiconductor film 199a. There are few defect levels (trap levels) in this case. More specifically, the defect levels (trap levels) are , the defect level at the interface between the gate insulating film 127 and the first oxide semiconductor film 199a is greater than There are few. Therefore, as described above, the oxide semiconductor film is stacked, which is why transistors This can reduce the amount of fluctuation in threshold voltage due to changes over time and reliability tests.

[0258] Furthermore, the conduction band of the first oxide semiconductor film 199a and the conduction band of the third oxide semiconductor film 199c Compared to the conduction band, the conduction band of the second oxide semiconductor film 199b is the deepest from the vacuum level. The materials for the first, second, and third oxide semiconductor films are appropriately selected to form a well-shaped structure. This makes it possible to increase the field-effect mobility of the transistor, and also the transistor This can reduce the amount of fluctuation in threshold voltage due to changes in the stanium over time and reliability testing.

[0259] Furthermore, the first oxide semiconductor film 199a to the third oxide semiconductor film 199c have crystalline properties. Different oxide semiconductors may be used. That is, single-crystal oxide semiconductors, polycrystalline oxide semiconductors, etc. A configuration may be used in which a conductor, an amorphous oxide semiconductor, and CAAC-OS are appropriately combined. Furthermore, any one of the first oxide semiconductor film 199a to the third oxide semiconductor film 199c Applying amorphous oxide semiconductors relieves internal and external stresses in the oxide semiconductor film. This reduces variations in transistor characteristics and improves the aging and reliability testing of transistors. This can reduce the amount of fluctuation in the threshold voltage.

[0260] Furthermore, the second oxide semiconductor film 199b, which can at least become a channel formation region, is CAA It is preferable that it be C-OS. Also, the oxide semiconductor film on the back channel side, the form of this embodiment In this state, the third oxide semiconductor film 199c is amorphous or CAAC-OS. This is preferable. By adopting such a structure, the changes in transistors over time and reliability tests can be performed. The amount of fluctuation in the threshold voltage can be reduced.

[0261] The configurations shown in this embodiment may be combined with the configurations shown in other embodiments as appropriate. It can be used.

[0262] (Embodiment 6) A semiconductor with a display function using the transistor and capacitive elements shown as an example in the above embodiment. Conductive devices (also called display devices) can be manufactured. Furthermore, drivers including transistors can be manufactured. A part or all of the dynamic circuit is integrally formed on the same substrate as the pixel section to form a system-on-panel. This is possible. In this embodiment, the transistor shown as an example in the above embodiment is used. Examples of display devices will be explained using Figures 21 to 23. Note that Figure 22(A) Figure 22(B) shows the cross-sectional structure of the area indicated by the dashed line MN in Figure 21(B). This is a diagram. Note that only a portion of the pixel structure is shown in Figure 22.

[0263] In Figure 21(A), the pixel portion 902 provided on the first substrate 901 is surrounded by A sealing material 905 is provided and sealed by the second substrate 906. Figure 21(A In this case, the area is different from the area surrounded by the sealing material 905 on the first substrate 901. In the region, signal line chips formed of single-crystal or polycrystalline semiconductors on a separately prepared substrate are used. A drive circuit 903 and a scan line drive circuit 904 are implemented. Also, a signal line drive circuit 90 3. Various signals and potentials are supplied to the scan line drive circuit 904 or the pixel unit 902, FPC (Flexible printed circuit) 918a, FPC918b It is being supplied.

[0264] In Figures 21(B) and 21(C), the pixel portion 90 is provided on the first substrate 901. A sealing material 905 is provided so as to surround 2 and the scan line drive circuit 904. A second substrate 906 is provided on top of the pixel section 902 and the scan line driving circuit 904. The pixel section 902 and the scan line driving circuit 904 are connected to the first substrate 901 and the sealing material 905. The display element is sealed together with the second substrate 906. Figures 21(B) and 21 In (C), the region surrounded by the sealing material 905 on the first substrate 901 is Signals formed in different regions on a separately prepared substrate using single-crystal or polycrystalline semiconductors A line drive circuit 903 is implemented. In Figures 21(B) and 21(C), the signal line Various signals and electricity supplied to the drive circuit 903, the scan line drive circuit 904, or the pixel unit 902 The position is supplied by FPC918.

[0265] Furthermore, in Figures 21(B) and 21(C), the signal line drive circuit 903 is formed separately. The example shown is mounted on the first substrate 901, but the configuration is not limited to this. The drive circuit may be formed and implemented separately, or it may be part of the signal line drive circuit or the scan line drive circuit. It is also acceptable to separately form and implement only a portion of it.

[0266] Furthermore, the method of connecting the separately formed drive circuit is not particularly limited, and COG(C (hip-on-glass) method, wire bonding method, or TAB (Tape) Automated bonding methods can be used. Figure 21(A) This is an example of implementing the signal line drive circuit 903 and the scan line drive circuit 904 using the COG method. Figure 21(B) shows an example of implementing the signal line drive circuit 903 using the COG method. C) is an example of implementing the signal line drive circuit 903 using the TAB method.

[0267] Furthermore, the display device includes a panel in which the display elements are sealed, and a control on the panel This includes modules that have ICs, etc., mounted on them, including those containing R.

[0268] In this specification, "display device" refers to an image display device or a display device. Furthermore, it can function as a light source (including lighting devices) instead of a display device. A connector, such as an FPC or TCP attached to a module, and a TCP connector at the other end. A module equipped with a lint wiring board, or a display element, is equipped with an IC (integrated circuit) using the COG method. Modules that directly implement ) are also included in the display device.

[0269] Furthermore, the pixel section and scan line driving circuit provided on the first substrate have multiple transistors Therefore, the transistor shown in the above embodiment can be applied.

[0270] Display elements used in display devices include liquid crystal elements (also called liquid crystal display elements) and light-emitting elements. A light-emitting element (also called a light-emitting display element) can be used. The light-emitting element is controlled by current or voltage. This category includes elements whose brightness is controlled by [something], specifically inorganic EL (Electroluminescent) elements. This includes Luminescence elements, organic EL elements, etc. Also, electronic inks, etc. Display media in which the contrast changes due to electrical action can also be applied. (See Figure 22) This shows an example of a liquid crystal display device that uses liquid crystal elements as display elements.

[0271] The liquid crystal display device shown in Figure 22(A) is a vertical electric field type liquid crystal display device. It has a connecting terminal electrode 915 and a terminal electrode 916, and the connecting terminal electrode 915 and terminal The electrode 916 is electrically connected to the terminals of the FPC 918 via the anisotropic conductive material 919. It is being done.

[0272] The connecting terminal electrode 915 is formed from the same conductive film as the first electrode 930, and the terminal electrode 916 It is formed of the same conductive film as the source and drain electrodes of transistors 910 and 911. It is.

[0273] Furthermore, the pixel section 902 and the scanning line driving circuit 904 provided on the first substrate 901 are It has multiple transistors, and the transistor 910 included in the pixel section 902 and the scan line drive The transistor 911 included in circuit 904 is shown as an example. Transistors 910 and On the transistor 911, there is an insulating film corresponding to the insulating film 229 and insulating film 231 shown in Embodiment 1. A border film 924 and an insulating film 934 corresponding to the insulating film 232 are provided. 23 is an insulating film that functions as a base layer.

[0274] In this embodiment, transistor 910 is the transistor shown in the above embodiment. This can be applied. Also, a light-transmitting conductive film 927, an insulating film 924, and the first The electrode 930 is used to construct the capacitive element 926. Furthermore, the conductive film 927 has light-transmitting properties. It is connected to the capacitive wiring 929 via electrode 928. Electrode 928 is connected to transistor 91 0. Formed using the same material and process as the source and drain electrodes of transistor 911. Capacitive wiring 929 is the same as the gate electrodes of transistors 910 and 911. The material and the same process are used to form it. Note that, in this embodiment, the capacitive element 926 is as follows: Although the capacitive elements shown are illustrated, other capacitive elements shown in other embodiments can be used as appropriate. ru.

[0275] The transistor 910 provided in the pixel section 902 is electrically connected to the display element, and the display panel It constitutes the display. The display element is not particularly limited as long as it can display information, and various display elements can be used. It can be used.

[0276] The liquid crystal element 913, which is a display element, consists of a first electrode 930, a second electrode 931, and a liquid crystal layer. Includes 908. Furthermore, insulating film 932 functions as an alignment film, sandwiching the liquid crystal layer 908. An insulating film 933 is provided. The second electrode 931 is provided on the second substrate 906 side. The first electrode 930 and the second electrode 931 are configured to overlap via the liquid crystal layer 908. It is.

[0277] First electrode and second electrode (pixel electrode, common electrode, counter electrode) that apply voltage to the display element It is also called such as: In this case, the direction of the light extracted, the location where the electrodes are set, and the position of the electrodes You can choose between light transmission and reflectivity depending on the turn structure.

[0278] The first electrode 930 and the second electrode 931 are paired with the pixel electrode 221 shown in Embodiment 1. The same material as that used for the directional electrode 154 can be used as appropriate.

[0279] Furthermore, the spacer 935 is a columnar space obtained by selectively etching the insulating film. This is a control of the distance (cell gap) between the first electrode 930 and the second electrode 931. It is provided for this purpose. A spherical spacer may also be used.

[0280] When using liquid crystal elements as display elements, thermotropic liquid crystals, low molecular weight liquid crystals, and polymer liquid crystals are used. Liquid crystals, polymer-dispersed liquid crystals, ferroelectric liquid crystals, antiferroelectric liquid crystals, etc. can be used. These liquid crystal materials, depending on the conditions, can be classified into cholesteric phase, smectic phase, cubic phase, and It exhibits iralnematic phase, isotropic phase, etc.

[0281] Alternatively, a liquid crystal exhibiting a blue phase without an alignment layer may be used. The blue phase is one of the liquid crystal phases. Therefore, as the temperature of a cholesteric liquid crystal is increased, it transitions from the cholesteric phase to the isotropic phase. This is the phase that appears immediately before. The blue phase only appears within a narrow temperature range, so the temperature range needs to be modified. To improve performance, a liquid crystal composition mixed with a chiral agent is used in the liquid crystal layer. It is composed of an organic resin, and since the organic resin contains hydrogen or water, it is one aspect of the present invention. This may degrade the electrical characteristics of transistors in semiconductor devices. Therefore, liquid crystal By using the blue phase as layer 160, one aspect of the present invention can be achieved without using an organic resin. Conductor devices can be fabricated, and highly reliable semiconductor devices can be obtained.

[0282] The first substrate 901 and the second substrate 906 are fixed together by a sealing material 925. Material 925 can be made of organic resins such as thermosetting resins and photocuring resins. The sealing material 925 is in contact with the insulating film 924. The sealing material 925 is shown in Figure 21. It is equivalent to aluminum alloy 905.

[0283] Furthermore, in liquid crystal display devices, a black matrix (light-shielding film), a polarizing member, and a phase difference member are used. Optical components (optical substrates) such as anti-reflective members are provided as appropriate. For example, polarizing substrates and Circular polarization using a phase-difference substrate may also be used. Furthermore, backlights and sidelights may be used as light sources. You may use any of these.

[0284] Furthermore, transistors are susceptible to damage from static electricity, etc., so a protective circuit is needed to protect the drive circuit. It is preferable to provide a path. The protection circuit is preferably constructed using nonlinear elements.

[0285] Next, we will explain the transverse electric field type liquid crystal display device using Figure 22(B). Figure 22( B) is an example of a transverse electric field method, which is a liquid crystal display device in FFS mode. Embodiment 4 This section will explain the structure of the liquid crystal display device, which differs from the transverse electric field type shown.

[0286] In the liquid crystal display device shown in Figure 22(B), the connection terminal electrode 915 is the first electrode 940 Formed from the same materials and using the same process, terminal electrode 916 is the same as transistors 910 and 911. The source electrode and drain electrode are formed from the same material and using the same process.

[0287] Furthermore, the liquid crystal element 943 has a first electrode 940 and a second electrode formed on the insulating film 924. It includes 941 and the liquid crystal layer 908. Note that the liquid crystal element 943 is a capacitive element as shown in Embodiment 1. It can have a structure similar to that of sub-electrode 205. The first electrode 940 is as shown in Figure 22(A). The material shown for electrode 930 can be used as appropriate. Also, the first electrode 940 is planar The shape is comb-like, stepped, ladder-like, etc. The second electrode 941 functions as a common electrode. It can be formed in the same manner as the light-transmitting conductive films shown in Embodiments 1 to 3. An insulating film 924 is provided between the first electrode 940 and the second electrode 941.

[0288] The second electrode 941 is connected to the common wiring 946 via electrode 945. 45 is the same as the source and drain electrodes of transistors 910 and 911. It is formed from a conductive film. The common wiring 946 is connected to transistors 910 and 911. It is formed using the same material and process as the gate electrode. Here, it is referred to as the liquid crystal element 943. Although the explanation was given using the capacitive element shown in Embodiment 1, other capacitive elements shown in other embodiments may be used as appropriate. Elements can be used.

[0289] Figure 23 shows the liquid crystal display device shown in Figure 22(A), where a second is provided on the substrate 906. A common connection portion (pad portion) for electrically connecting to the electrode 931 is formed on the substrate 901. Here is an example.

[0290] The common connection section is positioned to overlap with the sealing material used to bond circuit boards 901 and 906. It is placed and electrically connected to the second electrode 931 via conductive particles contained in the sealing material. Alternatively, a common connection point may be provided in an area that does not overlap with the sealing material (excluding the pixel area), and a common connection point may be provided. A paste containing conductive particles is provided separately from the sealing material so as to overlap the connecting portion, and the second electrode 93 It may be electrically connected to 1.

[0291] Figure 23(A) is a cross-sectional view of the common connection section, and the IJ in the top view shown in Figure 23(B) is opposite to the It is correct.

[0292] The common potential line 975 is provided on the gate insulating film 922, and the transistor 9 shown in Figure 23 The 10 source electrodes 971 or drain electrodes 973 are manufactured using the same materials and processes.

[0293] Furthermore, the common potential line 975 is covered with insulating film 924 and insulating film 934, insulating film 924 and Furthermore, the insulating film 934 has multiple openings at positions that overlap with the common potential line 975. This involves the source electrode 971 or the drain electrode 973 of transistor 910 and the first electric It is manufactured using the same process as the contact holes that connect to pole 930.

[0294] Furthermore, the common potential line 975 and the common electrode 977 are connected at the opening. Common electrode 977 It is provided on the insulating film 934 and is the same as the connection terminal electrode 915 and the first electrode 930 of the pixel portion. It is made from the same materials and using the same process.

[0295] In this way, a common connection section is created by making it the same as the manufacturing process for the switching element of the pixel section 902. It can be manufactured.

[0296] The common electrode 977 is an electrode that comes into contact with conductive particles contained in the sealing material, and is located on the substrate 906. An electrical connection is made with the second electrode 931.

[0297] Also, as shown in Figure 23(C), the common potential line 985 is connected to the gate of transistor 910. They may be manufactured using the same materials and processes as the electrodes.

[0298] In the common connection shown in Figure 23(C), the common potential line 985 is connected to the gate insulating film 922, The insulating film 924 and the insulating film 934 are provided in the lower layer, and the gate insulating film 922 and insulating film 924 The insulating film 934 has multiple openings at positions that overlap with the common potential line 985. , one of the source electrode 971 or drain electrode 973 of transistor 910 and the first electrode 9 After etching the insulating film 924 in the same process as the contact holes connecting 30, It is formed by selectively etching the gate insulating film 922.

[0299] Furthermore, the common potential line 985 and the common electrode 987 are connected at the opening. Common electrode 987 It is provided on the insulating film 924 and is the same as the connection terminal electrode 915 and the first electrode 930 of the pixel part. It is made from the same materials and using the same process.

[0300] Therefore, by applying the transistor and capacitive element shown in the above embodiment, an aperture can be created. We can provide a semiconductor device having a capacitive element that increases charge capacity while increasing the efficiency. As a result, a semiconductor device with excellent display quality can be obtained.

[0301] Furthermore, the oxide semiconductor film, which is a semiconductor film contained in the transistor, has reduced oxygen vacancies. Since impurities such as hydrogen are reduced, a semiconductor device according to one aspect of the present invention is good This results in a semiconductor device with desirable electrical characteristics and reduced power consumption.

[0302] The configurations shown in this embodiment may be combined with the configurations shown in other embodiments as appropriate. It can be used.

[0303] (Embodiment 7) One aspect of the present invention is a semiconductor device that can be applied to various electronic devices (including amusement machines). It is possible. As for electronic devices, television equipment (television or television receiver) Also called a machine. ), computer monitors, digital cameras, digital video cameras Digital photo frames, mobile phones, portable game consoles, personal digital assistants, audio playback devices Examples include amusement machines (pachinko machines, slot machines, etc.) and game cabinets. These electronic machines An example of a vessel is shown in Figure 24.

[0304] Figure 24(A) shows table 9000 having a display unit. Table 9000 is The housing 9001 incorporates a display unit 9003, and the display unit 9003 displays video. It is possible to do so. Furthermore, the configuration in which the housing 9001 is supported by four legs 9002 is... It is shown. Furthermore, the casing 9001 has a power cord 9005 for power supply.

[0305] The semiconductor device shown in any of the above embodiments can be used in the display unit 9003. Yes. Therefore, the display quality of the display unit 9003 can be improved.

[0306] The display unit 9003 has a touch input function, and the display unit 9003 of the table 9000 By touching the displayed button 9004 with your finger, you can operate the screen or input information. This allows for communication with or control of other home appliances, It may also be used as a control device to control other home appliances by operating a surface. For example, Image By using a semiconductor device with sensor functionality, the display unit 9003 can be given a touch input function. It is possible.

[0307] Furthermore, a hinge provided on the housing 9001 allows the screen of the display unit 9003 to be positioned relative to the floor. It can be stood upright and used as a television set. In a small room, Installing a large-screen television set reduces the available space, but a table If the display unit is built into the unit, the space in the room can be used more effectively.

[0308] Figure 24(B) shows the television system 9100. The housing 9101 incorporates a display unit 9103, and the display unit 9103 displays images. It is possible to demonstrate this. Here, the stand 9105 supports the housing 9101. This shows the configuration.

[0309] The television unit 9100 is operated using the control switches on the housing 9101, or a separate unit. This can be done using the remote control unit 9110. The remote control unit 9110 has an operating key -9109 allows you to control the channel and volume, and the display unit 9103 displays the information. The video can be controlled. Furthermore, the remote control unit 9110 can control the remote control. A display unit 9107 may be provided to display information output from the unit 9110.

[0310] The television system 9100 shown in Figure 24(B) includes a receiver, a modem, and other components. The television system 9100 can receive general television broadcasts using its receiver. Furthermore, by connecting to a wired or wireless communication network via a modem, One-way (sender to receiver) or two-way (sender and receiver, or between receivers, etc.) It is also possible to communicate information.

[0311] The semiconductor device shown in any of the above embodiments is used in the display units 9103 and 9107. This is possible. Therefore, the display quality of television equipment can be improved.

[0312] Figure 24(C) shows the computer 9200, consisting of the main unit 9201, the casing 9202, and the display unit 9 203, Keyboard 9204, External connection port 9205, Pointing device 920 Includes 6, etc.

[0313] The semiconductor device shown in any of the above embodiments can be used in the display unit 9203. Yes. Therefore, it is possible to improve the display quality of the computer 9200.

[0314] Figures 25(A) and 25(B) show a foldable tablet device. ) is in an open state, and the tablet terminal consists of a housing 9630, a display unit 9631a, and a display Part 9631b, display mode switching switch 9034, power switch 9035, power saving mode It has a code change switch 9036, a fastener 9033, and an operating switch 9038.

[0315] The semiconductor device shown in any of the above embodiments includes a display unit 9631a and a display unit 9631b It can be used for this purpose. Therefore, it is possible to improve the display quality of tablet devices. Cut.

[0316] The display unit 9631a can be partially designated as a touch panel area 9632a, and the display will Data can be entered by touching the operation key 9638. Note that the display unit 96 In 31a, as an example, one half of the area has a display-only function, and the other half of the area The area indicates a configuration having touch panel functionality, but is not limited to this configuration. Display unit 96 The entire area of ​​31a may also be configured to have touch panel functionality. For example, the display unit 9 The entire surface of 631a is used as a touch panel with keyboard buttons, and the display unit 9631b is displayed It can be used as a display screen.

[0317] In addition, in the display unit 9631b, similar to the display unit 9631a, one of the display units 9631b The area can be designated as the touch panel area 9632b. Also, the touch panel keyboard Touch the location where the display toggle button 9639 is displayed using your finger or stylus. This allows keyboard buttons to be displayed on the display unit 9631b.

[0318] Furthermore, simultaneously with respect to the touch panel area 9632a and the touch panel area 9632b You can also use touch input.

[0319] Additionally, the display mode switch 9034 changes the display orientation, such as vertical or horizontal display. You can switch between modes, such as switching between black and white and color displays. Power saving mode switching... The Itch 9036 detects ambient light during use using a light sensor built into the tablet device. The display brightness can be optimized according to the amount of light. The tablet terminal uses optical sensors. In addition to the sensor, other detection devices such as gyroscopes, accelerometers, and other sensors that detect tilt are also used. It can be built-in.

[0320] Furthermore, Figure 25(A) shows an example where the display area of ​​display unit 9631b and display unit 9631a are the same. However, this is not particularly limited, and one size may be different from the other. The quality of the display may also differ. For example, one display panel can provide a higher resolution display than the other. You can also use "ru".

[0321] Figure 25(B) shows the closed state, and the tablet terminal consists of a housing 9630 and a solar cell 9 633, and a charge / discharge control circuit 9634 are included. Note that in Figure 25(B), the charge / discharge control circuit 96 As an example of 34, consider a configuration having a battery 9635 and a DC-DC converter 9636. This is what is being shown.

[0322] Note that the tablet device is foldable, so when not in use, the casing 9630 is closed. This can be done. Therefore, the display units 9631a and 9631b can be protected. We can provide tablet devices that are highly durable and reliable from a long-term use perspective.

[0323] In addition, the tablet devices shown in Figures 25(A) and 25(B) are also available in various forms. Functions to display information (still images, videos, text images, etc.), calendar, date or time, etc. A function that displays information on the display unit, and a touch input operation or editing of the information displayed on the display unit. It has input capabilities, and functions to control processing through various software (programs), etc. It is possible.

[0324] The touch panel is powered by a solar cell 9633 mounted on the surface of the tablet device. It can be supplied to the display unit or the video signal processing unit, etc. The solar cell 9633 is It can be provided on one or both sides of the housing 9630, and efficiently charges the battery 9635. This configuration can be implemented. Note that the battery 9635 is a lithium-ion battery. Using this method offers advantages such as enabling miniaturization.

[0325] Furthermore, the configuration and operation of the charge / discharge control circuit 9634 shown in Figure 25(B) are shown in Figure 25( A block diagram is shown and explained in C). Figure 25(C) shows solar cell 9633, battery 9 635, DC-DC converter 9636, converter 9637, switch SW1 to SW3 The display unit 9631 is shown, along with the battery 9635 and the DC-DC converter 963 6. Converter 9637 and switches SW1 to SW3 control the charge and discharge as shown in Figure 25(B). This corresponds to circuit 9634.

[0326] First, we will explain an example of operation when electricity is generated by the solar cell 9633 using ambient light. The electricity generated by the solar panel is set to a voltage suitable for charging the battery 9635. The CDC converter 9636 performs either a boost or a buck. Then, the display unit 9631 operates as follows: When power from solar cell 9633 is used, switch SW1 is turned ON, and the converter 9637 will boost or lower the voltage to the required level for the display unit 9631. If you do not want to display on 9631, turn SW1 off and turn SW2 on to enable battery The configuration should be designed to charge the 9635.

[0327] While the solar cell 9633 is shown as an example of a power generation method, it is not particularly limited to this method. , by other power generation methods such as piezoelectric elements (piezo elements) and thermoelectric elements (Peltier elements) The configuration may also include charging the battery 9635. For example, power may be supplied wirelessly (contactlessly). This can be done using a contactless power transmission module that transmits and receives power for charging, or by combining it with other charging methods. It can also be used as a composition.

[0328] The configurations shown in this embodiment may be combined with the configurations shown in other embodiments as appropriate. It can be used. [Examples]

[0329] In this example, the resistance of the oxide semiconductor film and the multilayer film is shown using Figures 26 and 27. I will explain.

[0330] First, the structure of the sample will be explained using Figure 26.

[0331] Figure 26(A) is a top view of sample 1 to sample 4, and a cross-sectional view of the dashed line A1-A2 is shown. This is shown in 26(B), (C), and (D). Note that the top view of sample 1 to sample 4 is the same, and cross-section The cross-sectional views differ due to the different layered structures of the surfaces. The cross-sectional view of sample 1 is shown in Figure 26(B), and the cross-sectional view of sample 2 is shown in Figure 26(B). The cross-sectional view of sample 3 is shown in Figure 26(C), and the cross-sectional views of sample 4 are shown in Figure 26(D), respectively. .

[0332] Sample 1 has an insulating film 1903 formed on a glass substrate 1901, and an insulating film 1903 is formed on the insulating film 1903. A border film 1904 is formed, and an oxide semiconductor film 1905 is formed on the insulating film 1904. Furthermore, conductive films 1907 and 1909, which function as electrodes, are attached to both ends of the oxide semiconductor film 1905. Covered by insulating films 1910 and 191, the oxide semiconductor film 1905 and conductive films 1907 and 1909 are covered by insulating films 1910 and 191 1 covers it. In addition, the insulating films 1910 and 1911 are provided with openings 1913 and 1915. In each of these openings, the conductive films 1907 and 1909 are exposed.

[0333] Sample 2 has an insulating film 1903 formed on a glass substrate 1901, and an insulating film 1903 is formed on the insulating film 1903. A border film 1904 is formed, and an oxide semiconductor film 1905 is formed on the insulating film 1904. Furthermore, conductive films 1907 and 1909, which function as electrodes, cover both ends of the oxide semiconductor film 1905. The oxide semiconductor film 1905 and the conductive films 1907 and 1909 are covered by the insulating film 1911. Oh, the insulating film 1911 is provided with openings 1917 and 1919, and each of these openings At the opening, conductive films 1907 and 1909 are exposed.

[0334] Samples 3 and 4 have an insulating film 1903 formed on a glass substrate 1901, and insulating film 19 An insulating film 1904 is formed on 03, and a multilayer film 1906 is formed on the insulating film 1904. Furthermore, conductive films 1907 and 1909, which function as electrodes, cover both ends of the multilayer film 1906. The insulating film 1911 covers the multilayer film 1906 and the conductive films 1907 and 1909. 911 is provided with openings 1917 and 1919, and in each of these openings The conductive films 1907 and 1909 are exposed.

[0335] Thus, samples 1 to 4 are placed on an oxide semiconductor film 1905 or a multilayer film 1906. The structures of the insulating films in contact are different. Sample 1 has an oxide semiconductor film 1905 and an insulating film 1910 in contact. Sample 2 has an oxide semiconductor film 1905 and an insulating film 1911 in contact with each other, and Sample 3 and In sample 4, the multilayer film 1906 and the insulating film 1911 are in contact.

[0336] Next, we will explain the method for preparing each sample.

[0337] First, we will explain how Sample 1 was prepared.

[0338] On the glass substrate 1901, an insulating film 1903 is applied to a thickness of 400 by plasma CVD. A silicon nitride film with a thickness of nm was deposited.

[0339] Next, on insulating film 1903, insulating film 1904 is applied to a thickness of 50 by plasma CVD. A silicon oxidoxide-nitride film with a thickness of nm was deposited.

[0340] Next, on the insulating film 1904, a metal oxide target is applied as an oxide semiconductor film 1905. Using In:Ga:Zn=1:1:1, a 35nm thick In- A Ga-Zn oxide film (hereinafter also referred to as IGZO film) was deposited. Subsequently, photolithography was performed. Etching is performed using a mask formed by the roughing process to create an oxide semiconductor film 190. Formed 5.

[0341] Next, the insulating film 1903 and the oxide semiconductor film 1905 are subjected to a sputtering method to increase the thickness A 50nm tungsten film, a 400nm thick aluminum film, and a 100nm thick tungsten film. After sequentially stacking the tongue films, etching is performed using a mask formed by a photolithography process. A coating process was performed to form conductive films 1907 and 1909.

[0342] Next, insulating film 1904, oxide semiconductor film 1905, conductive film 1907, and conductive film 190 On top of 9, a 450 nm thick silica oxide nitride film is applied as insulating film 1910 by plasma CVD. After forming the film, it was heat-treated in a mixed atmosphere of nitrogen and oxygen at 350°C for 1 hour. .

[0343] Next, on insulating film 1910, insulating film 1911 is applied to a thickness of 50 by plasma CVD. A silicon nitride film with a thickness of nm was deposited.

[0344] Next, a mask formed by a photolithography process is placed on the insulating film 1911. Then, etching is performed to create openings 1913 and 1911 in the insulating film 1910 and insulating film 1911. Formed 15.

[0345] Sample 1 was prepared using the above procedure.

[0346] Next, we will explain how to prepare sample 2.

[0347] Insulating film 1903, oxide semiconductor film 1905, conductive film 1907, and conductive film 19 On top of 09, an insulating film 1910 with a thickness of 450 nm was formed by plasma CVD. After forming the film, a heat treatment was performed in a mixed atmosphere of nitrogen and oxygen at 350°C for 1 hour. Then, the insulating film 1910 was removed.

[0348] Next, insulating film 1904, oxide semiconductor film 1905, conductive film 1907, and conductive film 190 On top of 9, a silicon nitride film with a thickness of 50 nm is formed as insulating film 1911 by plasma CVD. A thin film was formed.

[0349] Next, a mask formed by a photolithography process is placed on the insulating film 1911. Then, an etching process was performed to form openings 1917 and 1919 in the insulating film 1911.

[0350] Sample 2 was prepared using the above procedure.

[0351] Next, we will explain how to prepare sample 3.

[0352] Sample 3 used a multilayer film 1906 instead of the oxide semiconductor film 1905 used in Sample 2. As for the layer film 1906, a metal oxide target (In:Ga:Zn) is placed on the insulating film 1904. Using a ratio of 1:3:2, a 10nm thick IGZO film was deposited by sputtering, and then... Using a metal oxide target (In:Ga:Zn=1:1:1), the sputtering method is employed. A 10nm thick IGZO film is deposited using this method, followed by a metal oxide target (In:Ga: Using Zn=1:3:2, a 10nm thick IGZO film was deposited by sputtering. Then, etching was performed using the mask formed by the photolithography process. Next, a multilayer film 1906 was formed.

[0353] Sample 3 was prepared using the above procedure.

[0354] Next, we will explain how to prepare sample 4.

[0355] Sample 4 used a multilayer film 1906 instead of the oxide semiconductor film 1905 used in Sample 2. Furthermore, sample 4 differs from sample 3 in the thickness of the IGZO film constituting the multilayer film 1906. As for the multilayer film 1906, a metal oxide target (In:Ga:Z) is applied on the insulating film 1904. Using n=1:3:2, a 20nm thick IGZO film was deposited by sputtering. Next, sputtering is performed using a metal oxide target (In:Ga:Zn=1:1:1). A 15nm thick IGZO film is deposited using this method, followed by deposition on a metal oxide target (In:Ga Using Zn=1:3:2, a 10nm thick IGZO film was deposited by sputtering. Then, using the mask formed by the photolithography process, the etching process was carried out. This process was carried out to form a separated multilayer film 1906.

[0356] Sample 4 was prepared using the above procedure.

[0357] Next, the oxide semiconductor film 1905 and the multilayer film 1906 provided on sample 1 to sample 4 Sheet resistance was measured. In sample 1, a blower was applied to openings 1913 and 1915. The sheet resistance of the oxide semiconductor film 1905 was measured by bringing it into contact with the sample. In step 4, the probe is brought into contact with the openings 1917 and 1919, and the oxide semiconductor The sheet resistance of film 1905 and multilayer film 1906 was measured. The acidity of samples 1 to 4 was also measured. In the ion semiconductor film 1905 and the multilayer film 1906, conductive film 1907 and conductive film 190 The width between the opposing 9s was set to 1 mm, and the distance between them was set to 10 μm. In addition, in samples 1 to 4, The dielectric film 1907 was set to ground potential, and 1V was applied to the conductive film 1909.

[0358] The sheet resistances of samples 1 to 4 are shown in Figure 27.

[0359] The sheet resistance of sample 1 is approximately 1 × 10⁻⁶. 11 The resistance was Ω / sq. Also, the sheet resistance of sample 2. The resistance was 2620 Ω / sq. Also, the sheet resistance of sample 3 was 4410 Ω / sq. Furthermore, the sheet resistance of sample 4 was 2930 Ω / sq.

[0360] Thus, the difference between the oxide semiconductor film 1905 and the insulating film in contact with the multilayer film 1906 Furthermore, the sheet resistances of the oxide semiconductor film 1905 and the multilayer film 1906 show different values.

[0361] Furthermore, when the sheet resistances of samples 1 to 4 described above are converted to resistivity, sample 1 is 3 0.9×10 5 Ωcm, Sample 2 is 9.3 × 10 -3 Ωcm, sample 3 is 1.3 × 10 -2 Ωcm, sample 4 is 1.3 × 10 -2 It was Ωcm.

[0362] Sample 1 is an oxide-nitriding film used as an insulating film 1910 in contact with an oxide semiconductor film 1905. A silicon film is formed, and it is formed separately from the silicon nitride film used as the insulating film 1911. On the other hand, samples 2 to 4 have oxide semiconductor film 1905 and multilayer film 1906. A silicon nitride film, used as an insulating film 1911, is formed in contact with the acid. The silicon nitride semiconductor film 1905 and the multilayer film 1906 are used as insulating film 1911. When placed in contact with the film, defects occur in the oxide semiconductor film 1905 and the multilayer film 1906, typically As oxygen vacancies are formed, the hydrogen contained in the silicon nitride film becomes the oxide semiconductor film 1 905 and the multilayer film 1906 move or diffuse. As a result, the oxide semiconductor film 190 5. The conductivity of the multilayer film 1906 is improved.

[0363] For example, when an oxide semiconductor film is used in the channel formation region of a transistor, as shown in Sample 1. A configuration in which a silicon oxide nitride film is provided in contact with an oxide semiconductor film is preferred. As for the transparent conductive film used for the electrodes of the quantitative element, as shown in Samples 2 to 4, acid A configuration in which a silicon nitride film is provided in contact with a silicon nitride semiconductor film or a multilayer film is preferred. By using this, an oxide semiconductor film or A multilayer film and an oxide semiconductor film or multilayer film used as an electrode for a capacitive element are fabricated in the same process. This also allows for changing the resistivity of oxide semiconductor films and multilayer films.

[0364] Next, for sample 2 and sample 3, the sheet resistance values ​​of the samples stored in a high-temperature, high-humidity environment, and The sheet resistance values ​​of the samples were measured when the measurement temperature was varied. The conditions are explained below. Note that, in some conditions, Sample 2 and Test Different conditions were used compared to sample 3. Therefore, although the structure is the same as sample 2 and sample 3, the preparation was successful. Samples with different conditions will be designated as Sample 2a and Sample 3a, respectively.

[0365] First, we will explain the method for preparing sample 2a.

[0366] Insulating film 1903 and insulating film 1904 were deposited on the glass substrate 1901.

[0367] On the insulating film 1904, a metal oxide target (In: Using Ga:Zn=1:1:1, a 35nm thick IGZO film was produced by sputtering. The film was formed. Subsequently, etching was performed using a mask formed by a photolithography process. After the initial treatment, a heat treatment is performed at 350°C or 450°C to form an oxide semiconductor film 1905. did.

[0368] A 50n thick layer is formed on the insulating film 1903 and the oxide semiconductor film 1905 by sputtering. After sequentially layering a titanium film of m thickness and a copper film of 400 nm thickness, the photolithography process is performed. Using the mask formed from the mask, etching was performed to create conductive film 1907 and conductive film 1909. It formed.

[0369] Next, insulating film 1904, oxide semiconductor film 1905, conductive film 1907, and conductive film 190 On top of 9, a 450 nm thick silica oxide nitride film is applied as insulating film 1910 by plasma CVD. After forming the film, it was heat-treated in a mixed atmosphere of nitrogen and oxygen at 350°C for 1 hour. .

[0370] Next, insulating film 1904, oxide semiconductor film 1905, conductive film 1907, and conductive film 190 On top of 9, a silicon nitride film with a thickness of 50 nm is formed as insulating film 1911 by plasma CVD. A film was formed. The deposition temperature for the silicon nitride film was set to 220°C or 350°C.

[0371] Next, a mask formed by a photolithography process is placed on the insulating film 1911. Then, etching is performed to create openings 1913 and 1911 in the insulating film 1910 and insulating film 1911. Formed 15.

[0372] Sample 2a was prepared using the above procedure.

[0373] Next, we will explain how sample 3a was prepared.

[0374] Sample 3a uses a multilayer film 1906 instead of the oxide semiconductor film 1905 of sample 2a. As the multilayer film 1906, a metal oxide target (In:Ga: Using Zn=1:1:1, a 10 nm thick IGZO film was deposited by sputtering. Next, using a metal oxide target (In:Ga:Zn=1:3:2), sputtering A 10nm thick IGZO film was deposited using the IGZO method. Subsequently, a photolithography process was performed. After etching using the formed mask, heat treatment is performed at 350°C or 450°C. This process was carried out to form a multilayer film 1906.

[0375] Sample 3a was prepared using the above procedure.

[0376] Next, the oxide semiconductor film 1905 and the multilayer film 190 provided on sample 2a and sample 3a The sheet resistance of 6 was measured. In sample 2a and sample 3a, the opening 1917 and the opening The probe is brought into contact with part 1919, and the oxide semiconductor film 1905 and the multilayer film 1906 are separated. The resistance was measured. Note that the oxide semiconductor film 1905 and multilayer film of sample 2a and sample 3a were measured. In 1906, the width W of the opposing conductive film 1907 and conductive film 1909 in the upper surface shape. The diameter was set to 1.5 mm and the distance D to 10 μm. In addition, in sample 2a and sample 3a, the conductive film With 1907 as the ground potential, 1V was applied to the conductive film 1909. The temperature was 60°C and the humidity was 9 After storing samples 2a and 3a in a 5% atmosphere for 60 hours and 130 hours, The sheet resistance value of each sample was measured.

[0377] The sheet resistance values ​​of sample 2a and sample 3a are shown in Figure 31. In Figure 31, the solid line represents In each sample, the deposition temperature of the silicon nitride film formed as insulating film 1911 was 220°C. The dashed line indicates 350°C. The black markers indicate oxidation in each sample. After forming a single semiconductor film 1905 or a multilayer film 1906, heat treatment was performed at 350°C. The white marker indicates that after the oxide semiconductor film 1905 or multilayer film 1906 is formed, 4 This indicates that the sample was heat-treated at 50°C. The circular markers indicate that each sample has undergone heat treatment with oxide semiconductor film 1905. This indicates that it has, i.e., it is sample 2a. The triangular marker indicates that the sample has multilayer film 1906. This indicates that it is sample 3a. Note that in Figure 31, the multilayer film 1906 was formed on it. Next, the measurement results of sample 3a heated to 350°C, i.e., the black triangular markers, are plotted. not present.

[0378] As shown in Figure 31, samples 2a and 3a have low sheet resistance values ​​and are suitable as electrodes for capacitive elements. It can be seen that the sheet resistance value is less than 0.2 Ω / sq. It can be seen that sample 2a and sample 3a exhibit little variation in sheet resistance over time. The oxide semiconductor film or multilayer film in contact with the silicon nitride film is a sheet in a high-temperature, high-humidity environment. Because the variation in resistance is small, it is used as a light-transmitting conductive film for the electrodes of capacitive elements. It is possible.

[0379] Next, in samples 2a and 3a, the substrate temperatures were set to 25°C, 60°C, and 150°C. The results of measuring the resistance values ​​of each sheet are shown in Figure 32. Note that in this case, sample 2a And, as sample 3a, the deposition temperature of the silicon nitride film formed as insulating film 1911 was 220 After forming the oxide semiconductor film 1905 or multilayer film 1906 at ℃, it is heated at 350℃. The processed sample was used. The black circle marker indicates the measurement result for sample 2a, and the black triangle marker indicates the result for sample 2a. - The graph shows the measurement results for sample 3a.

[0380] As shown in Figure 32, even when the measurement temperature is increased, the characteristics of the oxide semiconductor film 1905 and the multilayer film 1906 remain unchanged. It can be seen that the resistance value does not change. That is, the oxide semiconductor film in contact with the silicon nitride film or Multilayer films can also be called degenerate semiconductors. Oxide semiconductor films or multilayer films in contact with silicon nitride films. Because the sheet resistance value does not change much even when the temperature changes, it is used as an electrode for a capacitive element. It can be used as a conductive film having the properties of [the specified characteristic].

[0381] The configuration shown in this embodiment can be used in appropriate combination with other embodiments or configurations shown in other examples. It is possible to be there. [Examples]

[0382] In this embodiment, the resistance of the oxide semiconductor film will be explained using Figures 35 and 36. In this embodiment, in the process of forming the transistor and the capacitive element, the oxide semiconductor We measured the resistance of the body membrane.

[0383] A method for fabricating a sample having transistors and capacitive elements, and its structure, is shown in Figure 35(A This will be explained using Figure 36. Figure 36 shows the cross-sectional structure of the capacitive elements contained in each sample. This indicates.

[0384] On the glass substrate 1901, a gate electrode is formed in the region where the transistor is formed. Here, a tungsten film with a thickness of 100 nm was formed as the gate electrode.

[0385] Next, on the glass substrate 1901 and the gate electrode, an insulating film 1903 is applied, which is plasma CV A silicon nitride film with a thickness of 400 nm was deposited using method D.

[0386] Next, on insulating film 1903, insulating film 1904 is applied to a thickness of 50 by plasma CVD. A silicon oxidoxide-nitride film with a thickness of nm was deposited.

[0387] Next, a metal oxide target (In:Ga:Zn=1:1:1) is placed on the insulating film 1904. Using this method, a 35nm thick IGZO film was deposited by sputtering. Subsequently, photo An etching process is performed using a mask formed by the lithography process to create an oxide semiconductor film. 1905 was formed (step S1 shown in Figure 35(A)).

[0388] Next, the insulating film 1903 and the oxide semiconductor film 1905 are subjected to a sputtering method to increase the thickness A 50nm tungsten film, a 400nm thick aluminum film, and a 100nm thick tungsten film. After sequentially stacking the tongue films, etching is performed using a mask formed by a photolithography process. A stamping process was performed to form conductive film 1907 and conductive film 1909 (steps shown in Figure 35(A)). (S3).

[0389] Sample 5 was prepared using the above process. A cross-sectional view of the capacitive element contained in Sample 5 is shown in Figure 36. As shown in A). Note that in sample 5, the oxide provided in the region where the transistor is formed Let C5 be the semiconductor film, and E5 be the oxide semiconductor film provided in the region where the capacitive element is formed. ru.

[0390] Furthermore, after forming the oxide semiconductor film 1905, a thermal treatment was performed at 450°C for 1 hour under a nitrogen atmosphere. The procedure was performed, followed by 45 minutes under a mixed gas atmosphere of nitrogen and oxygen (nitrogen = 80%, oxygen = 20%). A heat treatment was performed at 0°C for 1 hour (step S2 in Figure 35(A)). Furthermore, conductive film 1907 And a conductive film 1909 was formed (step S3 in Figure 35(A)).

[0391] Sample 6 was prepared using the above process. A cross-sectional view of the capacitive element contained in sample 6 is shown in Figure 36(A). As shown in ). Note that in sample 6, an oxide semiconductor is provided in the region where the transistor is formed. Let C6 be the conductive film, and let E6 be the oxide semiconductor film provided in the region where the capacitive element is formed. .

[0392] Furthermore, after undergoing the same process as sample 6, insulating film 1904, oxide semiconductor film 1905, conductive On film 1907 and conductive film 1909, as an insulating film that will later become insulating film 1910, plastic A silicon oxidizride film with a thickness of 450 nm was deposited by the Zuma CVD method (Figure 35(A)). Step S4).

[0393] Next, a mask formed by a photolithography process is placed on the insulating film, and then etching is performed. A coating process was performed to form an insulating film 1910 having openings 1913 and 1915 (Figure 3). Step 5(A) S8).

[0394] Sample 7 was prepared using the above process. A cross-sectional view of the capacitive element contained in Sample 7 is shown in Figure 36(B). As shown in ). Note that in sample 7, an oxide semiconductor is provided in the region where the transistor is formed. Let C7 be the conductive film, and let E7 be the oxide semiconductor film provided in the region where the capacitive element is formed. .

[0395] Furthermore, after undergoing the same process as sample 6, insulating film 1904, oxide semiconductor film 1905, conductive On film 1907 and conductive film 1909, an insulating film which will later become insulating film 1910, and plasma C A silicon oxidizride film with a thickness of 450 nm was deposited using the VD method (steps in Figure 35(A)). S4).

[0396] Next, the material was heat-treated for 1 hour in a mixed atmosphere of nitrogen and oxygen at 350°C (Figure 35(A) Step S5).

[0397] Next, an insulating film, which would later become insulating film 1911, was formed on insulating film 1910. A silicon nitride film with a thickness of 50 nm was deposited using plasma CVD (Figure 35(A)). Step S7).

[0398] Next, a mask formed by a photolithography process is placed on the insulating film, and then etching is performed. After processing, insulating film 1910 and insulating film 191 have openings 1913 and 1915. Formation 1 was created (step S8 in Figure 35(A)).

[0399] Sample 8 was prepared using the above procedure. A cross-sectional view of the capacitive element contained in Sample 8 is shown in Figure 36(C). As shown in ). Note that in sample 8, an oxide semiconductor is provided in the region where the transistor is formed. Let C8 be the conductive film, and let E8 be the oxide semiconductor film provided in the region where the capacitive element is formed. .

[0400] Furthermore, in sample 8, after performing the heat treatment shown in step S5 of Figure 35(A), The insulating film 1910 on the element was etched (step S6 in Figure 35(A)). In this process, the oxide semiconductor film formed on the capacitive element is exposed to plasma, and the oxide semiconductor film Defects, typically oxygen deficiencies, were formed inside.

[0401] Next, an insulating film, which would later become insulating film 1911, was formed (step S7 in Figure 35(A)). .

[0402] Next, a mask formed by a photolithography process is placed on the insulating film, and then etching is performed. An insulating process is performed, and an insulating film with openings 1913 and 1915 is formed in the region where the transistor is formed. A border film 1910 and an insulating film 1911 are formed, and an opening 1917 is formed in the region where the capacitive element is formed. An insulating film 1911 having 1919 was formed (step S8 in Figure 35(A)).

[0403] Sample 9 was prepared using the above process. A cross-sectional view of the capacitive element contained in sample 9 is shown in Figure 36(D As shown in ). Note that in sample 9, an oxide semiconductor is provided in the region where the transistor is formed. Let C9 be the conductive film, and let E9 be the oxide semiconductor film provided in the region where the capacitive element is formed. .

[0404] Furthermore, a 100 nm thick layer of indium oxide-acid oxide was applied to the glass substrate by sputtering. A conductive film of a tin compound (ITO-SiO2) was formed. The target used in the conductive film was... The composition of the compound was set to In2O3:SnO2:SiO2 = 85:10:5 [weight %]. Afterward, the material was heat-treated in a nitrogen atmosphere at 250°C for 1 hour.

[0405] Next, samples 5 to 5 are placed on a conductive film of indium oxide-tin oxide compound (ITO-SiO2). Conductive films 1907 and 1909 were formed in the same manner as in sample 9.

[0406] Sample 10 was prepared using the above procedure.

[0407] Furthermore, in samples 5 to 10, the conductive film 1907 and conductive film 19 The opposing width W of 09 was set to 1 mm, and the distance D was set to 10 μm.

[0408] Next, the oxide semiconductor film provided in the region where the transistors of sample 5 to sample 9 are formed. C5 to C9 and oxide semiconductors provided in the region where the capacitive elements of samples 5 to 9 are formed Body membranes E5 to E9 and indium oxide-tin oxide compounds (ITO-S) contained in sample 10 The sheet resistance of each conductive film (iO2) was measured.

[0409] The measurement results are shown in Figure 35(B). The oxide semiconductor film C7 and oxide contained in sample 7 The sheet resistance of semiconductor film E7 is the same as that of oxide semiconductors C5, E5, and C contained in sample 5 and sample 6. It can be seen that it is reduced compared to 6,E6. From this, it can be seen that it is formed on an oxide semiconductor film. When the film is etched, exposure to the plasma causes damage to the oxide semiconductor film. Upon inspection, it can be seen that the sheet resistance of the oxide semiconductor film has been reduced.

[0410] Furthermore, the sheet resistance of oxide semiconductor films C8 and E8 contained in sample 8 was tested. Compared with the oxide semiconductors C5, E5, C6, E6, C7, and E7 contained in samples 5 to 7 It can be seen that it is increasing. This is because on oxide semiconductor film C8 and oxide semiconductor film E8 The formed insulating film is made of silicon oxide film, and furthermore, oxygen is released by heating. This is because it contains the following. For this reason, on the oxide semiconductor film, as shown in step S4 of Figure 35(A) The process of forming an oxide insulating film and the heat treatment process shown in step S5 form an oxide semiconductor film It can be seen that the resistance increases. Such an oxide semiconductor film is used in the channel region of a transistor. By using this in the region, normally-off transistors can be fabricated.

[0411] Furthermore, the oxide semiconductor film E9 contained in sample 9 is different from the oxide semiconductor film C9 in terms of saturation. It can be seen that the resistance has been reduced. Also, the oxide semiconductor film C7 and acid contained in sample 7 It can be seen that it has a sheet resistance equivalent to that of the E7 semiconductor film.

[0412] Furthermore, the oxide semiconductor films C7 and E7 contained in sample 7, and sample 9 The oxide semiconductor film E9 contained in sample 10 is an indium oxide-tin oxide compound ( Compared to conductive films (ITO-SiO2), the sheet resistance is about an order of magnitude higher, and the index oxide Similar to conductive films of um-tin oxide compounds (ITO-SiO2), it can be used as an electrode. It is possible.

[0413] In other words, as in sample 9, in the region where the transistor is formed, the oxide semiconductor By providing an insulating film formed of an oxide insulating film on the film and then heat-treating it, the resistance of the oxide semiconductor film is improved. The voltage increases and can be used as a channel region. Also, in the region where the capacitive element is formed In this case, by exposing the surface of the oxide semiconductor film to plasma, furthermore, on the oxide semiconductor film By providing an insulating film formed of a nitride insulating film, the resistance of the oxide semiconductor film is reduced, and the electrode It can be seen that it can be used as such. [Examples]

[0414] This embodiment involves impurity analysis of an oxide semiconductor film and an insulating film formed on the oxide semiconductor film. This will be explained using Figure 28.

[0415] In this embodiment, two types of samples (hereinafter referred to as "samples") were used as samples for impurity analysis. Samples 11 and 12) were prepared.

[0416] First, the method for preparing sample 11 is shown below.

[0417] Sample 11 involved depositing an IGZO film on a glass substrate, followed by a silicon nitride film. Subsequently, heat treatment was performed at 450°C for 1 hour under a nitrogen atmosphere, followed by a mixture of nitrogen and oxygen gas. The material was heat-treated at 450°C for 1 hour under an atmosphere of nitrogen (80%) and oxygen (20%).

[0418] The IGZO film deposition conditions involve sputtering, using a metal oxide target. Using (In:Ga:Zn=1:1:1), Ar / O2 = 100 / 100 sccm(O2 Under the conditions of =50%, pressure=0.6Pa, deposition power=5000W, and substrate temperature=170℃, 1 A 00nm thick IGZO film was deposited.

[0419] Furthermore, the deposition conditions for silicon nitride films are as follows: plasma CVD method, SiH4 / N2 / NH3 = 50 / 5000 / 100 sccm, pressure = 100 Pa, deposition power = 1000 W, A silicon nitride film with a thickness of 100 nm was deposited under the condition that the substrate temperature was 220°C.

[0420] Next, the method for preparing sample 12 is shown below.

[0421] An IGZO film is formed on a glass substrate, and then a silicon oxide-nitride film and a silicon nitride film are formed. The film was deposited by layering. Then, it was heat-treated at 450°C for 1 hour under a nitrogen atmosphere, followed by nitration. The treatment was performed at 450°C for 1 hour under a mixed gas atmosphere of nitrogen and oxygen (nitrogen = 80%, oxygen = 20%). He carried out the rationale.

[0422] The deposition conditions for the IGZO film and the silicon nitride film were the same as those for sample 11. The following conditions were used. In addition, the deposition conditions for the silicon oxide nitride film were for the plasma CVD method. Therefore, SiH4 / N2O = 30 / 4000 sccm, pressure = 40 Pa, deposition power = 150 W A silicon oxide-nitride film with a thickness of 50 nm was deposited under the condition of a substrate temperature of 220°C, and then, Using plasma CVD, SiH4 / N2O = 160 / 4000 sccm, pressure = 200P a. A 400nm thick oxidative nitride film was deposited under the conditions of deposition power = 1500W and substrate temperature = 220℃. A reconstituted film was deposited.

[0423] The results of the impurity analysis of sample 11 and sample 12 are shown in Figure 28.

[0424] Furthermore, for impurity analysis, secondary ion mass spectrometry (SIMS) is used. Using Ion Mass Spectrometry, the direction of the arrow shown in Figure 28 is divided Analysis was performed, specifically measurements taken from the glass substrate side.

[0425] Figure 28(A) shows the hydrogen (H) concentration profile obtained from the measurement of sample 11. Figure 28(B) shows the hydrogen (H) concentration profile obtained from the measurement of sample 12. That is the case.

[0426] From Figure 28(A), the hydrogen (H) concentration in the IGZO film is 1.0 × 10⁻⁶. 20 ate / c m 3 It can be seen that the hydrogen (H) concentration in the silicon nitride film is 1.0 × 10⁻⁶. 2 3 atoms / cm 3 It can be seen that... Also, from Figure 28(B), hydrogen in the IGZO film (H) The concentration is 5.0 × 10 19 atoms / cm 3 It can be seen that this is the case. Also, nitrite The hydrogen (H) concentration in the silicon film is 3.0 × 10⁻⁶. 21 atoms / cm 3 That is I understand.

[0427] Furthermore, due to its measurement principle, SIMS analysis is limited to the vicinity of the sample surface and the layered boundaries between films of different materials. It is known that it is difficult to obtain accurate data near the surface. Therefore, in the film When analyzing the thickness distribution of hydrogen (H) using SIMS, the range within the target film is considered. Within the given range, the average value is adopted in the region where there are no extreme fluctuations and a nearly constant intensity is obtained. ru.

[0428] In this way, by changing the configuration of the insulating film in contact with the IGZO film, the water in the IGZO film can be controlled. A difference in the concentration of element (H) was observed.

[0429] For example, when using the above-mentioned IGZO film in the channel formation region of a transistor, sample 1 As shown in 2, a configuration in which a silicon oxidizide film is provided in contact with the IGZO film is preferred. As a light-transmitting conductive film used for the electrodes of the capacitive element, IGZO is used, as shown in sample 11. A configuration in which a silicon nitride film is provided in contact with the film is preferred. By using such a configuration Therefore, the IGZO film used in the channel formation region of the transistor and the I used in the electrodes of the capacitive element are used. Even when GZO films and IGZO films are fabricated using the same process, the hydrogen concentration in the IGZO film can be changed. [Examples]

[0430] In this example, the defect amounts of the oxide semiconductor film and the multilayer film are shown in Figures 29 and 30. I will explain.

[0431] First, let's describe the structure of the sample.

[0432] Sample 13 consists of a 35 nm thick oxide semiconductor film formed on a quartz substrate and an oxide semiconductor It has a nitride insulating film with a thickness of 100 nm formed on the film.

[0433] Samples 14 and 15 are multilayer films with a thickness of 30 nm formed on a quartz substrate, and on the multilayer film It has a nitride insulating film with a thickness of 100 nm formed thereon. The multilayer film of sample 14 has a thickness A first IGZO film with a thickness of 10 nm, a second IGZO film with a thickness of 10 nm, and a third IGZO film with a thickness of 10 nm Three IGZO films are stacked in sequence. Sample 15 also has a first IGZO film with a thickness of 20 nm. The O film, a second IGZO film with a thickness of 15 nm, and a third IGZO film with a thickness of 10 nm are stacked in order. It is layered. Samples 14 and 15, compared to sample 13, use an oxide semiconductor film instead. The difference is that it has a multilayer film.

[0434] Sample 16 consists of an oxide semiconductor film with a thickness of 100 nm formed on a quartz substrate, and an oxide semiconductor film. A 250 nm thick oxide insulating film formed on the body film, and a 10 nm thick oxide insulating film formed on the oxide insulating film. It has a 0 nm nitride insulating film. Sample 16 has an oxide half The difference is that the conductive film is not in contact with the nitride insulating film, but rather with the oxide insulating film.

[0435] Next, we will explain the method for preparing each sample.

[0436] First, we will explain the method for preparing sample 13.

[0437] A 35 nm thick IGZO film was deposited on a quartz substrate as an oxide semiconductor film. The film deposition conditions involve sputtering with a metal oxide target (In:Ga:Z Using n=1:1:1, Ar / O2 = 100 sccm / 100 sccm (O2=50%) The following conditions were used: pressure = 0.6 Pa, deposition power = 5000 W, and substrate temperature = 170 °C.

[0438] Next, as the first heat treatment, the material is heated in a nitrogen atmosphere at 450°C for 1 hour, Heating in a 450°C nitrogen and oxygen mixed gas atmosphere (nitrogen = 80%, oxygen = 20%) for 1 hour. The process was completed.

[0439] Next, a silicon nitride film with a thickness of 100 nm is deposited on the oxide semiconductor film as a nitride insulating film. The silicon nitride film deposition conditions were set using plasma CVD with a SiH4 / N2 / N H3 = 50 / 5000 / 100 sccm, pressure = 100 Pa, deposition power = 1000 W, base The test was conducted under the condition that the plate temperature was 350°C.

[0440] Next, as a second heat treatment, the material was heated in a nitrogen atmosphere at 250°C for 1 hour.

[0441] Sample 13 was prepared using the above procedure.

[0442] Next, the method for preparing sample 14 will be described.

[0443] Sample 14 had a multilayer film formed instead of the oxide semiconductor film of Sample 13. This involves sputtering a metal oxide target (In:Ga:Zn=) onto a quartz substrate. Using a 1:3:2 ratio, Ar / O2 = 180 / 20 sccm (O2 = 10%), pressure = 0. The first IGZ with a thickness of 10 nm was deposited under the conditions of 6 Pa, deposition power = 5000 W, and substrate temperature = 25°C. An O film was deposited. Next, a metal oxide target (In:Ga:Zn) was formed using the puttering method. Using a ratio of 1:1:1, Ar / O2 = 100 / 100 sccm (O2 = 50%), pressure = Under the conditions of 0.6 Pa, deposition power = 5000 W, and substrate temperature = 170°C, a second film with a thickness of 10 nm was produced. An IGZO film was deposited. Next, a metal oxide target (In:Ga) was formed using the puttering method. Using Zn=1:3:2, Ar / O2=180 / 20sccm (O2=10%), pressure Under the conditions of force = 0.6 Pa, deposition power = 5000 W, and substrate temperature = 25°C, a 10 nm thick third layer was deposited. An IGZO film was deposited.

[0444] The other steps were the same as for sample 13. Sample 14 was formed by the above steps.

[0445] Next, the method for preparing sample 15 will be described.

[0446] Sample 15 had a multilayer film formed instead of the oxide semiconductor film of Sample 13. This involves creating a 20nm thick IGZO film on a quartz substrate using the same conditions as the first IGZO film shown in sample 14. The first IGZO film was deposited. Next, the second IGZO film shown in sample 14 was deposited using the puttering method. Using the same conditions as for the ZO film, a second IGZO film with a thickness of 15 nm was deposited. Next, sample 1 Using the same conditions as the third IGZO film shown in 4, a third IGZO film with a thickness of 10 nm was deposited. Ta.

[0447] The other steps were the same as for sample 13. Sample 15 was formed by the above steps.

[0448] Next, the method for preparing sample 16 will be described.

[0449] Sample 16 was prepared using the same conditions as Sample 13, by layering a 100 nm thick oxide semiconductor on a quartz substrate. A membrane was formed.

[0450] Next, the first heat treatment was performed using the same conditions as for sample 13.

[0451] Next, on the oxide semiconductor film, a first silicon oxide nitride film with a thickness of 50 nm is applied as an oxide insulating film. A film and a second silicon oxide-nitride film with a thickness of 200 nm were formed. Here, plasma C Using the VD method, SiH4 / N2O = 30 / 4000 sccm, pressure = 40 Pa, deposition power = Under conditions of 150W and substrate temperature = 220°C, a first silicon oxide-nitride film with a thickness of 50nm was formed. The film was then processed using plasma CVD, resulting in a SiH4 / N2O ratio of 160 / 4000 sccm. Under the conditions of pressure = 200 Pa, deposition power = 1500 W, and substrate temperature = 220 °C, a thickness of 200 nm was achieved. A second silicon oxide-nitride film was deposited. The second silicon oxide-nitride film was deposited in a stoichiometric amount. It is a membrane that contains more oxygen than satisfies the theoretical composition requirement.

[0452] Next, using the same conditions as for sample 13, a silicon nitride film with a thickness of 100 nm was laid on an oxide insulating film. It formed.

[0453] Next, a second heat treatment was performed using the same conditions as for sample 13.

[0454] Sample 16 was formed by the above process.

[0455] Next, ESR measurements were performed on samples 13 to 16. ESR measurements were performed at a predetermined temperature. Then, using the magnetic field value (H0) at which microwave absorption occurs, we can use the equation g = hν / βH0 to determine g A parameter called a value is obtained. Note that ν is the microwave frequency, and h is Planck's constant. It is a number, and β is a Bohr magneton; both are constants.

[0456] Here, ESR measurements were performed under the following conditions: The measurement temperature was set to room temperature (25°C), and the value was 8.9 The high-frequency power (microwave power) was set to 2 GHz and the direction of the magnetic field was determined by the fabricated sample. It was made parallel to the film surface.

[0457] The oxide semiconductor films and multilayer films contained in samples 13 to 15 were obtained by ESR measurement. The first derivative curve is shown in Figure 29. Figure 29(A) shows the measurement results for sample 13, and Figure 29(B) shows the first derivative curve. Figure 29(C) shows the measurement results for sample 14, and Figure 29(C) shows the measurement results for sample 15.

[0458] Figure 30 shows the first derivative curve obtained by ESR measurement of the oxide semiconductor film contained in sample 16. show.

[0459] In Figures 29(A) to 29(C), sample 13 was oxidized at a g value of 1.93. A symmetrical signal caused by defects in the semiconductor film has been detected. Sample 14 and Sample In 15, a signal with symmetry due to defects in the multilayer film was detected at a g-value of 1.95. The spin density of sample 13 with a g value of 1.93 is 2.5 × 10⁻⁶. 19 SPI ns / cm 3 The sum of the spin densities for sample 14 with g values ​​of 1.93 and 1.95. is 1.6 × 10 19 spins / cm 3 The g value in sample 15 was 1.93 and The sum of the spin densities of 1.95 is 2.3 × 10⁻⁶. 19 spins / cm 3 That was the case. In other words, It can be seen that oxide semiconductor films and multilayer films contain defects. One example of a defect in multilayer films is oxygen deficiency.

[0460] In Figure 30, sample 16 shows a difference in the thickness of the oxide semiconductor film compared to samples 13 to 15. Despite the thickness, no signals exhibiting symmetry due to defects were detected, i.e., under detection Below the detection limit (here, the detection limit is 3.7 × 10⁻⁶) 16 spins / cm 3 (That is what it was.) This indicates that the amount of defects contained in the oxide semiconductor film cannot be detected.

[0461] A nitride insulating film, in this case a nitride film formed by plasma CVD on an oxide semiconductor film or multilayer film. When a recon film comes into contact with the oxide semiconductor film or multilayer film, defects, typically oxygen vacancies, are formed. It can be understood. On the other hand, when an insulating oxide film, here a silicon oxynitride film, is provided on the oxide semiconductor film, excess oxygen contained in the silicon oxynitride film, that is, oxygen more than the stoichiometric composition, diffuses into the oxide semiconductor film, and the defects in the oxide semiconductor film do not increase.

[0462] From the above, as shown in Samples 13 to 15, the oxide semiconductor film or multilayer film in contact with the nitride insulating film has many defects, typically a large amount of oxygen deficiency, and high conductivity, so it can be used as the electrode of a capacitive element. On the other hand, as shown in Sample 16, the oxide semiconductor film or multilayer film in contact with the insulating oxide film has a small amount of oxygen deficiency and low conductivity, so it can be used as the channel formation region of a transistor.

[0463] Here, the reason for the reduction in the resistivity of the oxide semiconductor film and multilayer film in contact with the nitride insulating film will be described below.

[0464] <Energy and Stability among H Existence Forms> First, the results of calculations regarding the energy and stability of the forms of H present in the oxide semiconductor film will be explained. Here, InGaZnO4 was used as the oxide semiconductor film.

[0465] The structure used in the calculation was based on an 84-atom bulk model obtained by doubling the hexagonal unit cell of InGaZnO4 in the a-axis and b-axis directions by a factor of 2 each.

[0466] In the bulk model, a model was prepared in which one O atom bonded to three In atoms and one Zn atom was replaced by a H atom (see Fig. 33(A)). Also, in Fig. 33(A), a view of the ab plane in the InO layer as seen from the c-axis is shown in Fig. 33(B). Three In atoms and one ​​​​A region in which one oxygen atom bonded to several Zn atoms has been removed is shown as oxygen-deficient Vo, as shown in Figure 33. In Figures A) and 33(B), this is shown by a dashed line. Also, the H atom located in the oxygen-deficient Vo is V It is written as oH.

[0467] Furthermore, in the bulk model, 3 In atoms and 1 Zn atom bonded to an O atom Remove the individual particles to form an oxygen vacancy (Vo). Near the Vo, one Ga particle is placed on the ab plane. A model was prepared in which an O atom bonded to two Zn atoms is bonded to an H atom (Figure 33). (See (C)). Also, in Figure 33(C), the ab plane of the InO layer is viewed from the c axis. This is shown in Figure 33(D). In Figures 33(C) and 33(D), the oxygen deficiency Vo is shown by a dashed line. Furthermore, it has an oxygen vacancy Vo, and near the oxygen vacancy Vo, there is one Ga on the ab plane. A model having an atom and an O atom bonded to two Zn atoms, with an H atom bonded to it, is called Vo+H. To write.

[0468] For the two models described above, optimization calculations were performed with fixed lattice constants to determine the total energy. The calculation was performed. Note that the smaller the total energy value, the more stable the structure is considered to be.

[0469] The calculations were performed using the first-principles calculation software VASP (The Vienna Academy). The tio simulation package was used. The calculation conditions are shown in Table 1.

[0470] [Table 1] The pseudopotential of the electronic state is Projector Augmented Wave(P The potential generated by the AW method is given the functional GGA / PBE (General ized-Gradient-Approximation / Perdew-Burke -Ernzerhof) was used.

[0471] In addition, Table 2 shows the total energies of the two models calculated by the calculation.

[0472]

Table 2

[0473] From Table 2, the total energy of VoH is 0.78 eV lower than that of Vo + H. Therefore, it can be said that VoH is more stable than Vo + H. Therefore, when a H atom approaches the oxygen vacancy (Vo), it is considered that the H atom is more likely to be incorporated into the oxygen vacancy (Vo) than to bond with an O atom.

[0474] <Thermodynamic state of VoH> Next, the calculation results of the formation energy and charge state of VoH in which a H atom is incorporated into the oxygen vacancy (Vo) will be explained. The formation energy of VoH varies depending on the charge state and also depends on the Fermi energy. Therefore, the stable charge state of VoH depends on the Fermi energy. Here, the state in which VoH emits one electron is denoted as (VoH) and the state in which it captures one electron is denoted as (VoH) and the state without electron transfer is denoted as (VoH + ), and the state in which it captures one electron is denoted as (VoH) - and the state without electron transfer is denoted as (VoH ). 0 The formation energies of (VoH) + , (VoH) - , and (VoH) 0 were calculated respectively.

[0475] The first-principles calculation software VASP was used for the calculation. The calculation conditions are shown in Table 3.

[0476] [Table 3] The pseudopotential of the electronic state is Projector Augmented Wave(P The potential generated by the AW method is given the functional Heyd-Scuseria-E The rnzerhof(HSE) DFT hybrid functional (HSE06) was used.

[0477] Furthermore, in calculating the formation energy of oxygen vacancies, the dilute limit of oxygen vacancy concentration is assumed, and electrons The energy was calculated after correcting for the excessive spread of holes into the conduction band and valence band. Taking the upper end of the valence band of a perfect crystal as the energy origin, the valence band shift originating from the defect structure is: The average electrostatic potential was used for correction.

[0478] Figure 34(A) shows (VoH) + (VoH) - (VoH) 0 Each formation energy —This shows the Fermi level on the horizontal axis and the formation energy on the vertical axis. The solid line represents (VoH ) + The formation energy is shown, and the dashed line represents (VoH) 0 The formation energy is shown, and the dashed line is (VoH) - This shows the formation energy. Also, the charge of VoH changes from + to 0 and then to -. The transition level is denoted as ε(+ / -).

[0479] Figure 34(B) shows the thermodynamic transition level of VoH. From the calculation results, InGaZnO The energy gap of 4 was 2.739 eV. Also, the energy of the valence band was 0 eV. If V is the transition level (ε(+ / -)), then the transition level is 2.62 eV, and it is located just below the conduction band. Therefore, when an H atom is incorporated into the oxygen-deficient (Vo), InGaZ It can be seen that nO4 is of type n.

[0480] When an oxide semiconductor film is exposed to plasma, the oxide semiconductor film is damaged, and the oxide semiconductor... Defects, typically oxygen vacancies, are formed in the conductive film. Furthermore, nitride insulating films are formed in oxide semiconductor films. When contact occurs, hydrogen contained in the nitride insulating film moves to the oxide semiconductor film. As a result of these processes, acid When hydrogen enters an oxygen vacancy in an oxide semiconductor film, VoH is formed within the oxide semiconductor film. As a result, the oxide semiconductor film becomes n-type, and its resistivity decreases. Therefore, for nitride insulating film The oxide semiconductor film in contact with the device can be used as an electrode for a capacitive element. [Examples]

[0481] In this example, the transmittance of the oxide semiconductor film in contact with the nitride insulating film is shown using Figure 37. explain.

[0482] Let me explain the structure of the sample.

[0483] Sample 17 has an oxide semiconductor film with a thickness of 35 nm formed on a glass substrate, and is an oxide semiconductor A silicon nitride film with a thickness of 100 nm is formed on the film.

[0484] Sample 18 has an oxide semiconductor film with a thickness of 35 nm formed on a glass substrate, and is an oxide semiconductor A silicon nitride film with a thickness of 100 nm is formed on the film, and a silicon nitride film with a thickness of 100 nm is formed on the silicon nitride film. A film of m indium oxide-tin oxide compound (ITO-SiO2) is formed.

[0485] Furthermore, in samples 17 and 18, the atomic ratio of metal elements in the oxide semiconductor film was This is represented as In-Ga-Zn oxide (IGZO(111)) with an In:Ga:Zn ratio of 1:1:1. An In-Ga-Zn oxide film was formed by sputtering targeting ).

[0486] In samples 17 and 18, the silicon nitride film consisted of silane, ammonia, and nitrogen. It was formed by plasma CVD using a specific material.

[0487] In sample 18, the indium oxide-tin oxide (ITO-SiO2) film was spat It was formed using the taring method.

[0488] Sample 19 is a 100 nm thick indium oxide-tin oxide compound (IT) on a glass substrate. A film of O-SiO2 is formed. Indium oxide-tin oxide compound (ITO-SiO2) The film was formed by sputtering.

[0489] Next, the transmittance of visible light was measured in samples 17 to 19. Measured transmittance This is shown in Figure 37. Figure 37(A) shows the measurement results for sample 17, and Figure 37(B) shows the results for sample 18. The measurement results are shown, and Figure 37(C) shows the measurement results for sample 19.

[0490] From Figure 37(A), in sample 17, the wavelengths between 340 nm and 800 nm The transmittance is 60% or higher, and the transmittance at wavelengths between 380nm and 800nm ​​is 70%. The transmittance is 80% or more, with a transmittance of 80% or more at wavelengths between 430nm and 800nm. .

[0491] From Figure 37(B), in sample 18, the wavelengths between 380 nm and 800 nm The transmittance is 60% or higher, and the transmittance at wavelengths between 430nm and 800nm ​​is 70%. It is % or more.

[0492] As shown in Figure 37(A), the oxide semiconductor film in contact with the silicon nitride film is as shown in Figure 37(C). It has a transmittance equivalent to or greater than that of the ITO-SiO2 film shown in Figure 37(B). As shown in the diagram, an oxide semiconductor film, a silicon nitride film, and an ITO-SiO2 film are stacked. Even in this structure, it has the same transmittance as the ITO-SiO2 film shown in Figure 37(C). Therefore, a container in which an oxide semiconductor film, a silicon nitride film, and an ITO-SiO2 film are stacked is It can be seen that the element is translucent. Note that instead of a silicon nitride film, a translucent material is used. A nitride insulating film is formed, and a transparent conductive film is formed instead of the ITO-SiO2 film. Even so, a light-transmitting capacitive element can be fabricated.

Claims

1. A display device having a transistor and a pixel electrode in each pixel, A first conductive film having a region positioned above the insulating surface and functioning as the gate of the transistor, A second conductive film having a region positioned above the insulating surface and functioning as a first wiring, A first insulating film having a region positioned above the first conductive film and a region positioned above the second conductive film, A first metal oxide film having a region positioned above the first insulating film and having a channel formation region for the transistor, A second metal oxide film having a region positioned above the first insulating film, A third conductive film having a region positioned above the first metal oxide film, functioning as either the source or drain of the transistor, and functioning as a second wiring, A fourth conductive film having a region positioned above the first metal oxide film and functioning as the other of the source or drain of the transistor, A fifth conductive film having a region positioned above the second metal oxide film and having the function of electrically connecting the second metal oxide film and the second conductive film, A second insulating film having a region positioned above the first metal oxide film and a region positioned above the second metal oxide film, A third insulating film having a region positioned above the second insulating film, The pixel electrode has a region positioned above the third insulating film and is electrically connected to the fourth conductive film, The second conductive film described above extends across the pixel and adjacent pixels. The third conductive film described above intersects with the second conductive film described above. The pixel electrode has a region that overlaps with the second metal oxide film, without the second insulating film, and via the third insulating film. Display device.

2. A display device having a transistor and a pixel electrode in each pixel, A first conductive film having a region positioned above the insulating surface and functioning as the gate of the transistor, A second conductive film having a region positioned above the insulating surface and functioning as a first wiring, A first insulating film having a region positioned above the first conductive film and a region positioned above the second conductive film, A first metal oxide film having a region positioned above the first insulating film and having a channel formation region for the transistor, A second metal oxide film having a region positioned above the first insulating film, A third conductive film having a region positioned above the first metal oxide film, functioning as either the source or drain of the transistor, and functioning as a second wiring, A fourth conductive film having a region positioned above the first metal oxide film and functioning as the other of the source or drain of the transistor, A fifth conductive film having a region positioned above the second metal oxide film and having the function of electrically connecting the second metal oxide film and the second conductive film, A second insulating film having a region positioned above the first metal oxide film and a region positioned above the second metal oxide film, A third insulating film having a region positioned above the second insulating film, The pixel electrode has a region positioned above the third insulating film and is electrically connected to the fourth conductive film, The second conductive film described above extends across the pixel and adjacent pixels. The third conductive film described above intersects with the second conductive film described above. The second insulating film and the third insulating film have regions that overlap with the channel formation region of the transistor. The pixel electrode has a region that overlaps with the second metal oxide film, without the second insulating film, and via the third insulating film. Display device.

3. A display device having a transistor and a pixel electrode in each pixel, A first conductive film having a region positioned above the insulating surface and functioning as the gate of the transistor, A second conductive film having a region positioned above the insulating surface and functioning as a first wiring, A first insulating film having a region positioned above the first conductive film and a region positioned above the second conductive film, A first metal oxide film having a region positioned above the first insulating film and having a channel formation region for the transistor, A second metal oxide film having a region positioned above the first insulating film, A third conductive film having a region positioned above the first metal oxide film, functioning as either the source or drain of the transistor, and functioning as a second wiring, A fourth conductive film having a region positioned above the first metal oxide film and functioning as the other of the source or drain of the transistor, A fifth conductive film having a region positioned above the second metal oxide film and having the function of electrically connecting the second metal oxide film and the second conductive film, A second insulating film having a region positioned above the first metal oxide film and a region positioned above the second metal oxide film, A third insulating film having a region positioned above the second insulating film, The pixel electrode has a region positioned above the third insulating film and is electrically connected to the fourth conductive film, The second conductive film described above extends across the pixel and adjacent pixels. The third conductive film described above intersects with the second conductive film described above. The aforementioned pixel electrode functions as one of the electrodes of an organic EL element. The pixel electrode has a region that overlaps with the second metal oxide film, without the second insulating film, and via the third insulating film. Display device.

4. A display device having a transistor and a pixel electrode in each pixel, A first conductive film having a region positioned above the insulating surface and functioning as the gate of the transistor, A second conductive film having a region positioned above the insulating surface and functioning as a first wiring, A first insulating film having a region positioned above the first conductive film and a region positioned above the second conductive film, A first metal oxide film having a region positioned above the first insulating film and having a channel formation region for the transistor, A second metal oxide film having a region positioned above the first insulating film, A third conductive film having a region positioned above the first metal oxide film, functioning as either the source or drain of the transistor, and functioning as a second wiring, A fourth conductive film having a region positioned above the first metal oxide film and functioning as the other of the source or drain of the transistor, A fifth conductive film having a region positioned above the second metal oxide film and having the function of electrically connecting the second metal oxide film and the second conductive film, A second insulating film having a region positioned above the first metal oxide film and a region positioned above the second metal oxide film, A third insulating film having a region positioned above the second insulating film, The pixel electrode has a region positioned above the third insulating film and is electrically connected to the fourth conductive film, The second conductive film described above extends across the pixel and adjacent pixels. The third conductive film described above intersects with the second conductive film described above. The second insulating film and the third insulating film have regions that overlap with the channel formation region of the transistor. The aforementioned pixel electrode functions as one of the electrodes of an organic EL element. The pixel electrode has a region that overlaps with the second metal oxide film, without the second insulating film, and via the third insulating film. Display device.

5. In any one of claims 1 to 4, The second metal oxide film functions as one electrode of the capacitive element. The pixel electrode has the function of the other electrode of the capacitive element. Display device.

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