Plasma treatment system and plasma treatment method

Abstract

Provided is a plasma processing system which makes it possible to reduce reflected waves of an RF signal. A plasma processing system according to the present disclosure comprises: a first RF signal generation unit which generates a first RF signal having a first frequency; a first matching circuit which is coupled to the first RF signal generation unit; a second RF signal generation unit which generates a second RF signal having a second frequency that is lower than the first frequency; a second matching circuit which is coupled to the second RF signal generation unit; a phase adjustment circuit which is coupled to the second matching circuit and which shifts the phase of the second RF signal supplied from the second RF signal generation unit via the second matching circuit; a first plasma processing device which is coupled to the first matching circuit and the second matching circuit, to which the first RF signal is supplied via the first matching circuit, and to which the second RF signal is supplied via the second matching circuit; and a second plasma processing device which is coupled to the first matching circuit and the phase adjustment circuit, to which the first RF signal is supplied via the first matching circuit, and to which the second RF signal that is phase-shifted in the phase adjustment circuit is supplied.

Description

Technical Field

[0001] Exemplary embodiments of the present disclosure relate to a plasma processing system and a plasma processing method.

Background Art

[0002] As a technique for matching RF (Radio Frequency), there is a device described in Patent Document 1.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] The present disclosure provides a plasma processing system capable of reducing the reflected wave of an RF signal.

Means for Solving the Problems

[0005] In one exemplary embodiment of the present disclosure, a plasma processing system is provided. The plasma processing system includes a first RF signal generation unit configured to generate a first RF signal having a first frequency; a first matching circuit coupled to the first RF signal generation unit; a second RF signal generation unit configured to generate a second RF signal having a second frequency lower than the first frequency; a second matching circuit coupled to the second RF signal generation unit; a phase adjustment circuit coupled to the second matching circuit and configured to shift the phase of the second RF signal supplied from the second RF signal generation unit via the second matching circuit; and the first matching circuit and the second matching circuit The system comprises: a first plasma processing apparatus which is coupled to the first plasma processing apparatus, the first RF signal being supplied to the first plasma processing apparatus via the first matching circuit, and a second RF signal being supplied to the first plasma processing apparatus via the second matching circuit; and a second plasma processing apparatus which is coupled to the first matching circuit and the phase adjustment circuit, the first RF signal being supplied to the second plasma processing apparatus via the first matching circuit, and a second RF signal phase-shifted in the phase adjustment circuit being supplied to the second plasma processing apparatus. [Effects of the Invention]

[0006] According to one exemplary embodiment of the present disclosure, a plasma processing system capable of reducing reflected RF signals can be provided. [Brief explanation of the drawing]

[0007] [Figure 1] This is a block diagram showing a plasma processing system according to one exemplary embodiment. [Figure 2] This is a block diagram showing the configuration of a plasma processing system according to one exemplary embodiment. [Figure 3] This diagram schematically shows an example of a plasma processing apparatus 1. [Figure 4A] This figure shows an example of the circuit configuration of the phase adjustment circuit 60. [Figure 4B] This figure shows an example of the circuit configuration of the phase adjustment circuit 60. [Figure 5] This is a block diagram showing a plasma processing system according to one exemplary embodiment. [Figure 6] This is a flowchart showing a plasma processing method according to one exemplary embodiment. [Figure 7] This is a timing chart showing an example of a source RF signal and a bias RF signal. [Figure 8] This is a timing chart showing an example of a source RF signal and a bias RF signal. [Figure 9] This figure shows an example of the relationship between the phase of the bias RF signal and the sheath capacitance. [Figure 10] This block diagram shows an example of the configuration of a plasma processing system according to one exemplary embodiment. [Figure 11] This block diagram shows an example of the configuration of the first RF generation unit 31a, the second RF generation unit 31b, and the first matching circuit 51a and the second matching circuit 51b. [Figure 12] This is a flowchart showing a plasma processing method according to one exemplary embodiment. [Figure 13] This timing chart shows an example of the period during which the source RF signal SR and bias RF signal BR1 are supplied. [Figure 14] This timing chart shows an example of the phase of each bias RF signal. [Figure 15] This block diagram shows an example of the configuration of a plasma processing system according to one exemplary embodiment. [Figure 16] This is a block diagram showing an example of the configuration of the first RF generation unit 31a, the first DC generation unit 32a, and the first matching circuit 51a. [Figure 17] This is a flowchart showing a plasma processing method according to one exemplary embodiment. [Figure 18] This timing chart shows an example of the period during which the source RF signal SR and bias DC signal BD1 are supplied. [Figure 19]It is a timing chart showing an example of the phase of each bias DC signal.

Embodiments for Carrying Out the Invention

[0008] Hereinafter, each embodiment of the present disclosure will be described.

[0009] In one exemplary embodiment, a plasma processing system is provided. The plasma processing system includes a first RF signal generation unit configured to generate a first RF signal having a first frequency, a first matching circuit coupled to the first RF signal generation unit, a second RF signal generation unit configured to generate a second RF signal having a second frequency lower than the first frequency, a second matching circuit coupled to the second RF signal generation unit, a phase adjustment circuit coupled to the second matching circuit and configured to shift the phase of the second RF signal supplied from the second RF signal generation unit through the second matching circuit, and a first plasma processing device coupled to the first matching circuit and the second matching circuit, wherein the first RF signal is supplied to the first plasma processing device through the first matching circuit, and the second RF signal is supplied to the first plasma processing device through the second matching circuit; and a second plasma processing device coupled to the first matching circuit and the phase adjustment circuit, wherein the first RF signal is supplied to the second plasma processing device through the first matching circuit, and the second RF signal whose phase is shifted in the phase adjustment circuit is supplied to the second plasma processing device.

[0010] In one exemplary embodiment, the phase adjustment circuit includes at least one inductor and at least one capacitor.

[0011] In one exemplary embodiment, the phase adjustment circuit includes at least one of a variable inductor and a variable capacitor.

[0012] In one exemplary embodiment, the system further includes a sensor configured to monitor a first RF signal between a first RF signal generation unit and a first matching circuit and output the monitoring result, wherein the phase adjustment circuit is configured to adjust one or both of the inductance of a variable inductor and the capacitance of a variable capacitor based on the monitoring result.

[0013] In one exemplary embodiment, the sensor is a VI sensor configured to monitor the phase difference between the voltage and current of a first RF signal.

[0014] In one exemplary embodiment, the sensor is a directional coupler configured to monitor the reflected waves of a first RF signal.

[0015] In one exemplary embodiment, the phase adjustment circuit is configured to adjust either or both the inductance of a variable inductor and / or the capacitance of a variable capacitor before or after plasma processing in a second plasma processing apparatus.

[0016] In one exemplary embodiment, the phase adjustment circuit is configured to adjust the inductance of a variable inductor and the capacitance of a variable capacitor during plasma processing in a second plasma processing apparatus.

[0017] In one exemplary embodiment, the phase difference between the second RF signal and the phase-shifted second RF signal is 180 degrees.

[0018] In one exemplary embodiment, the first plasma processing apparatus includes a first plasma processing chamber, a first substrate support located within the first plasma processing chamber, one or more first lower electrodes located within the first substrate support, and a first upper electrode located above the first substrate support; the second plasma processing apparatus includes a second plasma processing chamber, a second substrate support located within the second plasma processing chamber, one or more second lower electrodes located within the second substrate support, and a second upper electrode located above the second substrate support; the first matching circuit is coupled to one or more first lower electrodes or first upper electrodes and one or more second lower electrodes or second upper electrodes; the second matching circuit is coupled to one or more first lower electrodes; and the phase adjustment circuit is coupled to one or more second lower electrodes.

[0019] In one exemplary embodiment, the first plasma processing apparatus includes a first plasma processing chamber, a first substrate support located within the first plasma processing chamber, a first lower electrode located within the first substrate support, and a first antenna located above the first plasma processing chamber; the second plasma processing apparatus includes a second plasma processing chamber, a second substrate support located within the second plasma processing chamber, a second lower electrode located within the second substrate support, and a second antenna located above the second plasma processing chamber; the first matching circuit is coupled to the first and second antennas, the second matching circuit is coupled to the first lower electrode, and the phase adjustment circuit is coupled to the second lower electrode.

[0020] In one exemplary embodiment, the first frequency is 10 MHz or more and 120 MHz or less.

[0021] In one exemplary embodiment, the second frequency is between 100 kHz and 20 MHz.

[0022] In one exemplary embodiment, the second frequency is between 400 kHz and 4 MHz.

[0023] In one exemplary embodiment, the first RF signal is a continuous wave having a first frequency.

[0024] In one exemplary embodiment, the first RF signal is a pulse wave that periodically comprises a plurality of first electrical pulses, each of which comprises a continuous wave having a first frequency.

[0025] In one exemplary embodiment, the second RF signal is a continuous wave having a second frequency.

[0026] In one exemplary embodiment, the second RF signal is a pulse wave that periodically comprises a plurality of second electrical pulses, each of which comprises a continuous wave having a second frequency.

[0027] In one exemplary embodiment, a plasma processing method is provided that is performed in a plasma processing system including a first plasma processing apparatus and a second plasma processing apparatus. The plasma processing method comprises the steps of: generating a first RF signal having a first frequency; generating a second RF signal having a second frequency lower than the first frequency; shifting the phase of the second RF signal; supplying the first RF signal to the first plasma processing apparatus and the second plasma processing apparatus; supplying the second RF signal to the first plasma processing apparatus; and supplying the phase-shifted second RF signal to the second plasma processing apparatus.

[0028] In one exemplary embodiment, a plasma processing system is provided. The plasma processing system comprises: an RF signal generation unit configured to generate an RF signal; a matching circuit coupled to the RF signal generation unit; a voltage pulse generation unit configured to generate a sequence of voltage pulses; a phase adjustment circuit configured to shift the phase of the sequence of voltage pulses supplied from the voltage pulse generation unit; a first plasma processing device coupled to the matching circuit and the voltage pulse generation unit, wherein an RF signal is supplied to the first plasma processing device from the matching circuit and a sequence of voltage pulses is supplied to the first plasma processing device from the voltage pulse generation unit; and a second plasma processing device coupled to the matching circuit and the phase adjustment circuit, wherein an RF signal is supplied to the second plasma processing device from the matching circuit and a phase-shifted sequence of voltage pulses is supplied to the second plasma processing device from the phase adjustment circuit.

[0029] In one exemplary embodiment, a plasma processing system is provided. The plasma processing system comprises a source RF signal generation unit configured to generate a source RF signal for plasma generation; a first matching circuit coupled to the source RF signal generation unit; a bias RF signal generation unit configured to generate a bias RF signal; a second matching circuit coupled to the bias RF signal generation unit; n plasma processing units (n is an integer of 2 or more) coupled in parallel to the first matching circuit; and n-1 phase adjustment circuits, wherein the n-1 phase adjustment circuits are coupled in series between the second matching circuit and the nth plasma processing unit among the n plasma processing units, and are configured to sequentially shift the phase of the bias RF signal supplied from the bias RF signal generation unit via the second matching circuit; the kth (k is an integer from 1 to n-1) phase adjustment circuit among the n plasma processing units is coupled to the kth and k+1 plasma processing units among the n plasma processing units; and the first plasma processing unit among the n plasma processing units is The plasma processing apparatus includes a first plasma processing chamber and a first substrate support, the first substrate support being located within the first plasma processing chamber and including one or more first lower electrodes, the source RF signal being supplied to the first plasma processing apparatus via a first matching circuit, the bias RF signal being supplied to at least one of the one or more first lower electrodes of the first plasma processing apparatus via a second matching circuit, the k+1th plasma processing apparatus among the n plasma processing apparatuses includes a k+1th plasma processing chamber and a k+1th substrate support, the k+1th substrate support being located within the k+1th plasma processing chamber and including one or more k+1th lower electrodes, the source RF signal being supplied to the k+1th plasma processing apparatus via a first matching circuit, and the bias RF signal being phase-shifted in the kth phase adjustment circuit among the n-1 phase adjustment circuits being supplied to at least one of the one or more k+1th lower electrodes of the k+1th plasma processing apparatus.

[0030] In one exemplary embodiment, the n-1 phase adjustment circuits are configured to sequentially shift the phase of the bias RF signal by 360 degrees / n.

[0031] In one exemplary embodiment, the plasma processing system further comprises n first switches for switching whether or not to connect each of the n plasma processing devices to the first matching circuit, and n second switches for switching whether or not to connect each of the n plasma processing devices to the second matching circuit.

[0032] In one exemplary embodiment, a plasma processing system is provided. The plasma processing system comprises a source RF signal generator configured to generate a source RF signal for plasma generation; a first matching circuit coupled to the source RF signal generator; a voltage pulse generator configured to generate a sequence of n (n is an integer of 2 or more) voltage pulses, wherein the sequence of n voltage pulses is out of phase with respect to each other; and n plasma processing devices, wherein the k (k is an integer from 1 to n) plasma processing device includes a k plasma processing chamber and a k substrate support, the k substrate support being located within the k plasma processing chamber and including one or more first lower electrodes, the source RF signal being supplied to the k plasma processing device via the first matching circuit, and the sequence of the k voltage pulses of the sequence of n voltage pulses being supplied to at least one of the one or more k lower electrodes of the k plasma processing device.

[0033] Hereinafter, each embodiment of this disclosure will be described in detail with reference to the drawings. In each drawing, the same or similar elements are denoted by the same reference numeral, and redundant explanations are omitted. Unless otherwise specified, positional relationships such as up, down, left, and right will be described based on the positional relationships shown in the drawings. The dimensional ratios in the drawings do not represent actual ratios, and actual ratios are not limited to those shown.

[0034] Figure 1 is a block diagram illustrating a plasma processing system according to one exemplary embodiment. The plasma processing system includes a plasma processing apparatus 1 and a control unit 2. The plasma processing apparatus 1 includes a plasma processing chamber 10, a substrate support unit 11, and a plasma generation unit 12. The plasma processing chamber 10 has a plasma processing space. The plasma processing chamber 10 also has at least one gas supply port for supplying at least one processing gas to the plasma processing space, and at least one gas outlet for discharging gas from the plasma processing space. The gas supply port is connected to a gas supply unit 20, which will be described later, and the gas outlet is connected to an exhaust system 40, which will be described later. The substrate support unit 11 is located within the plasma processing space and has a substrate support surface for supporting a substrate.

[0035] The plasma generation unit 12 is configured to generate plasma from at least one processing gas supplied into the plasma processing space. The plasma formed in the plasma processing space may be a capacitively coupled plasma (CCP), an inductively coupled plasma (ICP), an electron-cyclotron-resonance plasma (ECR), a helicon wave plasma (HWP), or a surface wave plasma (SWP). Various types of plasma generation units, including an AC (Alternating Current) plasma generation unit and a DC (Direct Current) plasma generation unit, may also be used. In one embodiment, the AC signal (AC power) used in the AC plasma generation unit has a frequency in the range of 100 kHz to 10 GHz. Therefore, the AC signal includes an RF (Radio Frequency) signal and a microwave signal. In one embodiment, the RF signal has a frequency in the range of 200 kHz to 150 MHz.

[0036] The control unit 2 processes computer-executable instructions that cause the plasma processing apparatus 1 to perform the various processes described herein. The control unit 2 may be configured to control each element of the plasma processing apparatus 1 to perform the various processes described herein. In one embodiment, part or all of the control unit 2 may be included in the plasma processing apparatus 1. The control unit 2 may include, for example, a computer 2a. The computer 2a may include, for example, a processing unit (CPU: Central Processing Unit) 2a1, a storage unit 2a2, and a communication interface 2a3. The processing unit 2a1 may be configured to perform various control operations based on a program stored in the storage unit 2a2. The storage unit 2a2 may include RAM (Random Access Memory), ROM (Read Only Memory), HDD (Hard Disk Drive), SSD (Solid State Drive), or a combination thereof. The communication interface 2a3 may communicate with the plasma processing apparatus 1 via a communication line such as a LAN (Local Area Network).

[0037] Figure 2 is a block diagram showing the configuration of a plasma processing system according to one exemplary embodiment. The plasma processing system includes a first plasma processing apparatus 1-1 and a second plasma processing apparatus 1-2, a power supply 30, an impedance matching circuit 50, and a phase adjustment circuit 60. In one embodiment, the first plasma processing apparatus 1-1 includes a first plasma processing chamber, a first substrate support portion disposed within the first plasma processing chamber, a first lower electrode disposed within the first substrate support portion, and a first upper electrode disposed above the first substrate support portion. The second plasma processing apparatus 1-2 includes a second plasma processing chamber, a second substrate support portion disposed within the second plasma processing chamber, a second lower electrode disposed within the second substrate support portion, and a second upper electrode disposed above the second substrate support portion. Hereinafter, the first plasma processing apparatus 1-1 and / or the second plasma processing apparatus 1-2 will be collectively referred to as "plasma processing apparatus 1".

[0038] Figure 3 is a schematic diagram showing an example of the plasma processing apparatus 1. The following describes an example configuration of a capacitively coupled plasma processing apparatus as an example of the plasma processing apparatus 1, referring to each figure.

[0039] The plasma processing apparatus 1 includes a plasma processing chamber 10, a gas supply unit 20, and an exhaust system 40. The plasma processing apparatus 1 also includes a substrate support unit 11 and a gas introduction unit. The gas introduction unit is configured to introduce at least one processing gas into the plasma processing chamber 10. The gas introduction unit includes a shower head 13. The substrate support unit 11 is located inside the plasma processing chamber 10. The shower head 13 is located above the substrate support unit 11. In one exemplary embodiment, the shower head 13 constitutes at least a portion of the ceiling of the plasma processing chamber 10. The plasma processing chamber 10 has a plasma processing space 10s defined by the shower head 13, the side wall 10a of the plasma processing chamber 10, and the substrate support unit 11. The plasma processing chamber 10 has at least one gas supply port for supplying at least one processing gas to the plasma processing space 10s, and at least one gas outlet for discharging gas from the plasma processing space. The side wall 10a is grounded. The shower head 13 and the substrate support portion 11 are electrically insulated from the plasma processing chamber 10 housing.

[0040] The substrate support portion 11 includes a main body portion 111 and a ring assembly 112. The main body portion 111 has a central region (substrate support surface) 111a for supporting a substrate (wafer) W and an annular region (ring support surface) 111b for supporting the ring assembly 112. The annular region 111b of the main body portion 111 surrounds the central region 111a of the main body portion 111 in a plan view. The substrate W is placed on the central region 111a of the main body portion 111, and the ring assembly 112 is placed on the annular region 111b of the main body portion 111 so as to surround the substrate W on the central region 111a of the main body portion 111. In one embodiment, the main body portion 111 includes a base and an electrostatic chuck. The base includes a conductive member. The conductive member of the base may function as a lower electrode. The electrostatic chuck is placed on the base. The electrostatic chuck includes a ceramic member and an electrostatic electrode placed within the ceramic member. The ceramic member has a central region 111a. In one embodiment, the ceramic member also has an annular region. Other members surrounding the electrostatic chuck, such as an annular electrostatic chuck or an annular insulating member, may also have an annular region. In this case, the ring assembly 112 may be placed on the annular electrostatic chuck or the annular insulating member, or on both the electrostatic chuck and the annular insulating member. Furthermore, an RF or DC electrode may be placed within the ceramic member, in which case the RF or DC electrode can function as a lower electrode. When a bias RF signal or DC signal, described later, is supplied to the RF or DC electrode, the RF or DC electrode is also called a bias electrode. Furthermore, both the conductive member of the base and the RF or DC electrode may function as lower electrodes. Therefore, the substrate support 11 includes one or more lower electrodes. The ring assembly 112 includes one or more annular members. At least one of the one or more annular members is an edge ring. Although not shown in the figures, the substrate support 11 may also include a temperature control module configured to adjust at least one of the electrostatic chuck, ring assembly 112, and substrate to a target temperature. The temperature control module may include a heater, a heat transfer medium, a flow path, or a combination thereof. A heat transfer fluid, such as brine or gas, flows through the flow path.Furthermore, the substrate support portion 11 may include a heat transfer gas supply portion configured to supply heat transfer gas between the back surface of the substrate W and the substrate support surface 111a.

[0041] The showerhead 13 (see Figure 3) is configured to introduce at least one processing gas from the gas supply unit 20 into the plasma processing space 10s. The showerhead 13 has at least one gas supply port 13a, at least one gas diffusion chamber 13b, and a plurality of gas inlet ports 13c. The processing gas supplied to the gas supply port 13a passes through the gas diffusion chamber 13b and is introduced into the plasma processing space 10s through the plurality of gas inlet ports 13c. The showerhead 13 also includes one or more upper electrodes. In addition to the showerhead 13, the gas introduction unit may also include one or more side gas injectors (SGIs) attached to one or more openings formed in the side wall 10a.

[0042] The gas supply unit 20 may include at least one gas source 21 and at least one flow controller 22. In one embodiment, the gas supply unit 20 is configured to supply at least one processing gas to the shower head 13 from a corresponding gas source 21 via a corresponding flow controller 22. Each flow controller 22 may include, for example, a mass flow controller or a pressure-controlled flow controller. Furthermore, the gas supply unit 20 may include at least one flow modulation device that modulates or pulses the flow rate of at least one processing gas.

[0043] The power supply 30 includes an RF power supply 31 coupled to the plasma processing chamber 10 via at least one impedance matching circuit 50. The RF power supply 31 is configured to supply at least one RF signal (RF power), such as a source RF signal and a bias RF signal, to one or more lower electrodes and / or one or more upper electrodes. This causes plasma to be formed from at least one processing gas supplied to the plasma processing space 10s. Thus, the RF power supply 31 can function as at least part of the plasma generation unit 12. In addition, by supplying a bias RF signal to one or more lower electrodes, a bias potential is generated on the substrate W, and ionic components in the formed plasma can be drawn into the substrate W.

[0044] In one embodiment, the RF power supply 31 includes a first RF generation unit 31a and a second RF generation unit 31b. The first RF generation unit 31a is coupled to one or more lower electrodes and / or one or more upper electrodes via at least one matching circuit 51a and is configured to generate a source RF signal (source RF power) for plasma generation. The first RF generation unit 31a is an example of a source RF signal generation unit. In one embodiment, the source RF signal is a continuous wave or pulsed wave comprising RF having a frequency in the range of 10 MHz to 150 MHz. In one embodiment, the first RF generation unit 31a may be configured to generate a plurality of source RF signals having different frequencies. The generated one or more source RF signals are supplied to one or more lower electrodes and / or one or more upper electrodes. In one embodiment, the first RF generation unit 31a is configured to generate a first continuous or pulsed RF signal having a first frequency as the source RF signal.

[0045] The first matching circuit 51a is coupled to the first RF generation unit 31a. The first plasma processing unit 1-1 and the second plasma processing unit 1-2 are also coupled to the first matching circuit 51a. That is, the first matching circuit 51a is coupled to one or more upper electrodes or one or more lower electrodes of the first plasma processing unit 1-1, and also to one or more upper electrodes or one or more lower electrodes of the second plasma processing unit 1-2. Therefore, the generated first source RF signal is supplied via the first matching circuit 51a to one or more lower electrodes or one or more upper electrodes of the first plasma processing unit 1-1 and to one or more lower electrodes or one or more upper electrodes of the second plasma processing unit 1-2.

[0046] The second RF generation unit 31b is configured to be coupled to one or more lower electrodes via at least one matching circuit 51b and to generate a bias RF signal (bias RF power). The second RF generation unit 31b is an example of a bias RF signal generation unit. When one or more lower electrodes include two lower electrodes, one lower electrode may be coupled to the first RF generation unit 31a via a matching circuit 51a, and the other lower electrode may be coupled to the second RF generation unit 31b via a matching circuit 51b. For example, one lower electrode may be a base, and the other lower electrode may be a bias electrode.

[0047] In one embodiment, the bias RF signal has a lower frequency than the source RF signal. In one embodiment, the bias RF signal is a continuous or pulsed wave comprising RF having a frequency in the range of 100 kHz to 60 MHz. In one embodiment, the second RF generation unit 31b may be configured to generate a plurality of bias RF signals having different frequencies. The generated one or more bias RF signals are supplied to one or more lower electrodes. In various embodiments, at least one of the source RF signal and the bias RF signal may be pulsed. In one embodiment, the second RF generation unit 31b is configured to generate a second continuous or pulsed RF signal as the bias RF signal having a second frequency lower than the first frequency.

[0048] The second matching circuit 51b is coupled to the second RF generation unit 31b. The first plasma processing unit 1-1 and the phase adjustment circuit 60 are coupled to the second matching circuit 51b, and the second plasma processing unit 1-2 is coupled to the phase adjustment circuit 60. That is, the second matching circuit 51b is coupled to one or more lower electrodes of the first plasma processing unit 1-1. Therefore, the generated bias RF signal is supplied to one or more lower electrodes of the first plasma processing unit 1-1 and the phase adjustment circuit 60 via the second matching circuit 51b. In other words, the bias RF signal is supplied from the second matching circuit 51b to one or more lower electrodes of the first plasma processing unit 1-1 and the phase adjustment circuit 60. The phase of the bias RF signal supplied from the second RF generation unit 31b to the phase adjustment circuit 60 via the second matching circuit 51b is shifted in the phase adjustment circuit 60. The phase adjustment circuit 60 is coupled to the second plasma processing apparatus 1-2, that is, to one or more lower electrodes of the second plasma processing apparatus 1-2. Therefore, the phase-shifted bias RF signal is supplied from the phase adjustment circuit 60 to one or more lower electrodes of the second plasma processing apparatus 1-2.

[0049] The power supply 30 may also include a DC power supply 32 coupled to the plasma processing chamber 10. The DC power supply 32 includes a first DC generation unit 32a and a second DC generation unit 32b. In one embodiment, the first DC generation unit 32a is connected to one or more lower electrodes and configured to generate a first DC signal. The generated first DC signal is applied to one or more lower electrodes. In one embodiment, the first DC signal may be applied to other electrodes, such as electrodes in an electrostatic chuck.

[0050] In one embodiment, the second DC generation unit 32b is connected to one or more upper electrodes and configured to generate a second DC signal. The generated second DC signal is applied to one or more upper electrodes.

[0051] In various embodiments, the first and second DC signals may be pulsed. In this case, a sequence of voltage pulses is applied to one or more lower electrodes and / or one or more upper electrodes. The voltage pulses may have a rectangular, trapezoidal, triangular, or combination thereof pulse waveform. In one embodiment, a waveform generation unit for generating a sequence of voltage pulses from the DC signal is connected between the first DC generation unit 32a and one or more lower electrodes. Thus, the first DC generation unit 32a and the waveform generation unit constitute a voltage pulse generation unit. When the second DC generation unit 32b and the waveform generation unit constitute a voltage pulse generation unit, the voltage pulse generation unit is connected to one or more upper electrodes.

[0052] The voltage pulses may have positive or negative polarity. Furthermore, the sequence of voltage pulses may include one or more positive voltage pulses and one or more negative voltage pulses within one cycle. The first and second DC generation units 32a and 32b may be provided in addition to the RF power supply 31, and the first DC generation unit 32a may be provided in place of the second RF generation unit 31b. In the latter case, as shown in Figure 5, a phase adjustment circuit 60 is connected between the voltage pulse generation unit including the first DC signal generation unit 32a and one or more lower electrodes of the second plasma processing device 1-2 without the need for a matching circuit. In one embodiment, the voltage pulse generation unit including the first DC signal generation unit 32a is coupled to one or more lower electrodes of the first plasma processing device 1-1 and the phase adjustment circuit 60. Therefore, the sequence of voltage pulses generated by the voltage pulse generation unit including the first DC signal generation unit 32a is supplied to one or more lower electrodes of the first plasma processing device 1-1 and the phase adjustment circuit 60. The phase of the sequence of voltage pulses supplied from the voltage pulse generation unit, including the first DC signal generation unit 32a, to the phase adjustment circuit 60 is shifted in the phase adjustment circuit 60. The phase adjustment circuit 60 is coupled to one or more lower electrodes of the second plasma processing apparatus 1-2. Therefore, the phase-shifted sequence of voltage pulses is supplied from the phase adjustment circuit 60 to one or more lower electrodes of the second plasma processing apparatus 1-2.

[0053] The impedance matching circuit 50 includes a first matching circuit 51a and a second matching circuit 51b. The first matching circuit 51a has an input terminal and an output terminal. The input terminal is electrically coupled to the first RF generation unit 31a. The output terminal is electrically coupled to a substrate support 11 or shower head 13 provided on the first plasma processing apparatus 1-1 and a substrate support 11 or shower head 13 provided on the second plasma processing apparatus 1-2. The first matching circuit 51a adjusts the impedance of the output terminal to the impedance of the input terminal. For example, the first matching circuit 51a matches the impedance of the input terminal to the impedance of the output terminal. The impedance of the input terminal may be the output impedance of the first RF generation unit 31a. The impedance of the output terminal may include the load of the plasma generated in the first plasma processing apparatus 1-1 and the second plasma processing apparatus 1-2, respectively. The second matching circuit 51b has an input terminal and an output terminal. The input terminal is electrically coupled to the second RF generation unit 31b. The output terminal is electrically coupled to the substrate support unit 11 provided in the first plasma processing apparatus 1-1 and the substrate support unit 11 provided in the second plasma processing apparatus 1-2. The second matching circuit 51b adjusts the impedance of the output terminal to the impedance of the input terminal. For example, the second matching circuit 51b matches the impedance of the input terminal to the impedance of the output terminal. The impedance of the input terminal may be the output impedance of the second RF generation unit 31b. The impedance of the output terminal may include the load of the plasma generated in the first plasma processing apparatus 1-1 and the second plasma processing apparatus 1-2, respectively.

[0054] The phase adjustment circuit 60 receives the first bias RF signal from the second RF generation unit 31b via the second matching circuit 51b. The phase adjustment circuit 60 shifts the phase of the first bias RF signal to generate a second bias RF signal that has a phase difference with the first bias RF signal.

[0055] Figures 4A and 4B show an example of the circuit configuration of the phase adjustment circuit 60. The phase adjustment circuit 60 is configured to have an input terminal 61, an output terminal 62, one or more inductors 63, and one or more capacitors 64. The phase adjustment circuit 60 is electrically coupled at the input terminal 61 to the output terminal of the second matching circuit 51b. The phase adjustment circuit 60 is also electrically coupled at the output terminal 62 to the lower electrode included in the second plasma processing apparatus 1-2 or a conductive member that functions as a lower electrode. The phase adjustment circuit 60 may be a circuit in which one or both of the two circuits shown in Figures 4A and 4B are connected in series in multiple stages.

[0056] The phase adjustment circuit 60 shown in Figure 4A comprises one inductor 63 and two capacitors 64-1 and 64-2. One end of inductor 63 is electrically coupled to the input terminal 61, and the other end is electrically coupled to the output terminal 62. One end of capacitor 64-1 is electrically coupled to the input terminal 61 and one end of inductor 63, and the other end is grounded. One end of capacitor 64-2 is electrically coupled to the output terminal 62 and the other end of inductor 63, and the other end is grounded.

[0057] The phase adjustment circuit 60 shown in Figure 4B is composed of two inductors 63-1 and 63-2 and one capacitor 64. Inductors 63-1 and 63-2 are provided in series between the input terminal 61 and the output terminal 62. That is, one end of inductor 63-1 is electrically coupled to the input terminal 61, and the other end is electrically coupled to one end of inductor 63-2. Inductor 63-2's other end is electrically coupled to the output terminal 62. One end of capacitor 64 is electrically coupled to the other end of inductor 63-1 and one end of inductor 63-2, and the other end is grounded.

[0058] The inductor 63, capacitor 64, and / or other elements included in the phase adjustment circuit 60 may be configured to have variable characteristics. The capacitor 64 included in the phase adjustment circuit 60 shown in Figures 4A and 4B is a variable capacitor whose capacitance is variable. The inductor 63 may be a variable inductor whose inductance is variable. When the phase adjustment circuit 60 includes variable elements such as variable capacitors and variable inductors, the control unit 2 (see Figure 1) may control the characteristics of the variable elements to adjust the phase difference between the second bias RF signal and the first bias RF signal generated by the phase adjustment circuit 60. As an example, the plasma processing system includes a sensor electrically coupled between the first RF generation unit 31a and the first matching circuit 51a, and the control unit 2 may control the characteristics of the variable elements based on the measurement values ​​of the sensor. As an example, the sensor may be a sensor that measures the phase difference between the voltage and current of the source RF signal, or a sensor that measures the power of the reflected wave of the source RF signal using a directional coupler. In one embodiment, the sensor is configured to monitor the parameters of the source RF signal between the first RF generation unit 31a and the first matching circuit 51a and to output the monitoring results. The sensor may be a VI sensor or a directional coupler. The VI sensor is configured to monitor the phase difference between the voltage and current of the source RF signal. The directional coupler is configured to monitor the reflected waves of the source RF signal. The phase adjustment circuit 60 is configured to adjust the variable inductor and / or variable capacitor based on the monitoring results output by the sensor. The phase adjustment circuit 60 is configured to adjust the variable inductor and / or variable capacitor before or after plasma processing in the second plasma processing apparatus 1-2. The phase adjustment circuit 60 may also be configured to adjust the variable inductor and / or variable capacitor during plasma processing in the second plasma processing apparatus 1-2.

[0059] The exhaust system 40 (see Figure 3) may be connected to, for example, a gas outlet 10e located at the bottom of the plasma processing chamber 10. The exhaust system 40 may include a pressure regulating valve and a vacuum pump. The pressure regulating valve regulates the pressure in the plasma processing space 10s. The vacuum pump may include a turbomolecular pump, a dry pump, or a combination thereof.

[0060] Figure 6 is a flowchart of a plasma processing method according to one exemplary embodiment (hereinafter also referred to as "this processing method"). Figures 7 and 8 are timing charts showing an example of the period during which the source RF signal, the first bias RF signal, and the second bias RF signal are supplied in this processing method. In Figure 7, the horizontal axis represents time. In Figure 7, the vertical axis represents the power levels of the source RF signal, the first bias RF signal, and the second bias RF signal (for example, the effective values ​​of the power of the source RF signal, the first bias RF signal, and the second bias RF signal). Each signal "L1" indicates that the signal is not supplied (i.e., the power level is 0W) or is lower than the power level indicated by "H1".

[0061] As shown in Figure 6, this processing method includes the steps of placing a substrate (ST1), supplying a processing gas (ST2), supplying a source RF signal (ST3), and supplying a bias RF signal (ST4). Furthermore, the bias RF signal supply step (ST4) includes the steps of generating a first bias RF signal (ST41), supplying a first bias RF signal (ST42), generating a second bias RF signal (ST43), and supplying a second bias RF signal (ST44). The following describes each step of this processing method, but unless otherwise specified, the description of the "plasma processing chamber 10" refers to both the first plasma processing apparatus 1-1 and the second plasma processing apparatus 1-2.

[0062] In step ST1, the substrate W is placed on the substrate support portion 11. The substrate W may be, for example, a substrate on which a base film, an etched film to be etched by this processing method, and a mask film having a predetermined pattern are laminated on a silicon wafer. The etched film may be, for example, a dielectric film, a semiconductor film, a metal film, etc.

[0063] In step ST2, a processing gas is supplied into the plasma processing chamber 10. The processing gas is used to etch the etching film formed on the substrate W. The type of processing gas may be appropriately selected based on the material of the etching film, the material of the mask film, the material of the underlay film, the pattern of the mask film, the etching depth, etc.

[0064] In processes ST3 and ST4, the source RF signal, the first bias RF signal, and the second bias RF signal are supplied to the plasma processing chamber 10. Processes ST3 and ST4 may be started simultaneously or at different timings. If processes ST3 and ST4 are started at different timings, the order in which they are started is arbitrary. The first bias RF signal and the second bias RF signal are collectively referred to as the "bias RF signal."

[0065] In step ST3, first, the first RF generation unit 31a generates a source RF signal. As shown in Figures 7 and 8, the source RF signal is, for example, a pulsed wave containing an electrical pulse during the H period. That is, the source RF signal is a signal that alternates between an L period, where the power level of the first RF constituting the source RF signal is zero, and an H period, where the power level is high. The frequency of the first RF constituting the electrical pulse of the source RF signal is, for example, 10 MHz or more and 120 MHz or less. Also, the power level of the first RF may be greater than zero and less than H1 during the L period. Furthermore, the source RF signal may be a continuous wave rather than a pulsed wave. That is, the source RF signal may be a signal in which the first RF is continuous.

[0066] Furthermore, the first RF generation unit 31a supplies the generated source RF signal to the first plasma processing apparatus 1-1 and the second plasma processing apparatus 1-2 via the first matching circuit 51a. For example, the first RF generation unit 31a supplies the source RF signal to the substrate support section 11 of the first plasma processing apparatus 1-1 and also supplies the source RF signal to the substrate support section 11 of the second plasma processing apparatus 1-2. As a result, plasma is generated in both the first plasma processing apparatus 1-1 and the second plasma processing apparatus 1-2 by the processing gas supplied into the chamber.

[0067] In step ST4, a bias RF signal is supplied to the plasma processing chamber 10. First, in step ST41, the second RF generation unit 31b generates a first bias RF signal. As shown in Figures 7 and 8, the first bias RF signal is, for example, a pulsed wave containing an electrical pulse during the H period. That is, the first bias RF signal is a signal that alternates between an L period, in which the power level of the second RF constituting the first bias RF signal is zero, and an H period, in which the power level is high. The second RF constituting the first bias RF signal has a lower frequency than the first RF constituting the source RF signal. The frequency of the second RF is, for example, 100 kHz or more and 20 MHz or less. The frequency of the second RF may be 400 kHz or more and 4 MHz or less. Also, the bias RF signal may be a continuous wave rather than a pulsed wave. That is, the first bias RF signal may be a signal in which the second RF is continuous. For example, both the source RF signal and the first bias RF signal (and the second bias RF signal) may be continuous waves, or one may be a continuous wave and the other a pulsed wave.

[0068] In step ST41, when the first bias RF signal is generated, in step ST42, the phase adjustment circuit 60 generates a second bias RF signal. The phase adjustment circuit 60 receives the first bias RF signal from the first RF generation unit 31a, shifts its phase, and generates the second bias RF signal. That is, as shown in Figure 8, during period H, the third RF constituting the second bias RF signal has a phase difference Δθ with respect to the second RF constituting the electrical pulse of the first bias RF signal. In one embodiment, the phase difference Δθ is 180 degrees.

[0069] The phase difference Δθ may be set based on a measured value of the characteristics of the first RF signal. These characteristics may, for example, be the phase difference between the voltage and current of the first RF signal, or the power of the reflected wave of the first RF signal. For example, a sensor electrically coupled between the first RF generation unit 31a and the first matching circuit 51a may measure the characteristics of the first RF signal, and the control unit 2 may control the characteristics of the variable element included in the phase adjustment circuit 60 based on the measured value of these characteristics. The control unit 2 may predetermine the phase difference Δθ before performing plasma processing (e.g., etching) on ​​the substrate W. The control unit 2 may then maintain a constant phase difference Δθ during the plasma processing by keeping the characteristics of the variable element included in the phase adjustment circuit 60 constant, and perform plasma processing on the substrate W. Alternatively, the control unit 2 may dynamically control the phase difference Δθ during the plasma processing. As an example, a sensor electrically coupled between the first RF generation unit 31a and the first matching circuit 51a may measure the characteristics of the first RF signal during plasma processing, and the control unit 2 may dynamically control the characteristics of the variable element included in the phase adjustment circuit 60 based on the measured values ​​of these characteristics during plasma processing.

[0070] In steps ST41 and ST42, when the first bias RF signal and the second bias RF signal are generated, in step ST43, the first bias RF signal is supplied to the first plasma processing apparatus 1-1 and the second bias RF signal is supplied to the second plasma processing apparatus 1-2. For example, the first bias RF signal and the second bias RF signal are supplied to the bias electrodes included in the substrate support section 11 of the first plasma processing apparatus 1-1 and the second plasma processing apparatus 1-2, respectively. As a result, the capacitance of the first sheath generated between the substrate W and the plasma in the first plasma processing apparatus 1-1 (hereinafter referred to as "first sheath capacitance") changes based on the phase of the first bias RF signal. Also, the capacitance of the second sheath generated between the substrate W and the plasma in the second plasma processing apparatus 1-2 (hereinafter referred to as "second sheath capacitance") changes based on the phase of the second bias RF signal. Accordingly, a plasma processing method performed in a plasma processing system including a first plasma processing apparatus 1-1 and a second plasma processing apparatus 1-2 includes steps 1 to 6. In step 1, a first RF signal having a first frequency is generated. In step 2, a second RF signal having a second frequency lower than the first frequency is generated. In step 3, the phase of the second RF signal is shifted. In step 4, the first RF signal is supplied to the first plasma processing apparatus 1-1 and the second plasma processing apparatus 1-2. In step 5, the second RF signal is supplied to the first plasma processing apparatus 1-1. In step 6, the phase-shifted second RF signal is supplied to the second plasma processing apparatus 1-2.

[0071] Figure 9 shows an example of the relationship between the phase of a bias RF signal and its sheath capacitance. In Figure 9, the waveform of the first bias RF signal shows one period of the second RF signal included in the first bias RF signal. The waveform of the second bias RF signal shows one period of the third RF signal included in the second bias RF signal. The graph of the first sheath capacitance shows the first sheath capacitance for each phase of the first bias RF signal. The graph of the second sheath capacitance shows the second sheath capacitance for each phase of the second bias RF signal. In the example shown in Figure 9, the phase difference Δθ between the first bias RF signal and the second bias RF signal is 180 degrees.

[0072] In this embodiment, the first matching circuit 51a is configured such that when the first sheath capacitance and the second sheath capacitance are both capacitance C, the impedance of the input terminal of the first matching circuit 51a matches the impedance of the output terminal. That is, when the first sheath capacitance and the second sheath capacitance are both capacitance C, the impedances of the first plasma processing apparatus 1-1 and the second plasma processing apparatus 1-2 become the matching impedance. On the other hand, when the first sheath capacitance and the second sheath capacitance are other than capacitance C, the impedances of the first plasma processing apparatus 1-1 and the second plasma processing apparatus 1-2 deviate from the matching impedance. That is, impedance mismatch may occur based on the difference between the first sheath capacitance and the second sheath capacitance and capacitance C (the shaded portion in Figure 9).

[0073] On the other hand, as shown in Figure 9, according to this embodiment, a phase difference is provided between the first bias RF signal and the second bias RF signal. Therefore, when the impedance mismatch of one of the first plasma processing apparatus 1-1 and the second plasma processing apparatus 1-2 becomes large, the impedance mismatch of the other becomes small. As a result, even if the impedance mismatch of one of the first plasma processing apparatus 1-1 and the second plasma processing apparatus 1-2 is large, more power of the source RF signal is supplied to the other plasma processing chamber, which has a smaller impedance mismatch. For example, in period A (half a period of the bias RF signal) shown in Figure 9, the second sheath capacitance deviates more from capacitance C than the first sheath capacitance. Therefore, in period A, more power of the source RF signal is supplied to the first plasma processing apparatus 1-1 than to the second plasma processing apparatus 1-2. Similarly, in period B (half a period of the bias RF signal), more power of the source RF signal is supplied to the second plasma processing apparatus 1-2 than to the first plasma processing apparatus 1-1. This reduces the generation of reflected waves from the source RF signal, thereby suppressing power loss in the source RF signal. Furthermore, it reduces fluctuations in the load as seen from the first RF generation unit 31a.

[0074] Figure 10 is a block diagram showing an example of the configuration of a plasma processing system according to one exemplary embodiment. The plasma processing system according to this embodiment comprises n plasma processing devices, i.e., plasma processing devices 1-1 to 1-n, where n is an integer of 2 or more. The plasma processing system also includes a power supply 30, an impedance matching circuit 50, and n-1 phase adjustment circuits 60-1 to 60-n-1. In one embodiment, each of the plasma processing devices 1-1 to 1-n may have a configuration similar to that of the plasma processing device 1 shown in Figure 3.

[0075] The first matching circuit 51a is coupled to the first RF generation unit 31a. The plasma processing units 1-1 to 1-n are also coupled in parallel to the first matching circuit 51a. Specifically, each of the one or more upper electrodes or each of the one or more lower electrodes located in the plasma processing units 1-1 to 1-n is coupled to the first matching circuit 51a. Therefore, the source RF signal SR generated in the first RF generation unit 31a is supplied to one or more upper electrodes or one or more lower electrodes of the plasma processing units 1-1 to 1-n via the first matching circuit 51a.

[0076] The second matching circuit 51b is coupled to the second RF generation unit 31b. Furthermore, the plasma processing units 1-1 to 1-n are coupled in parallel to the second matching circuit 51b. Specifically, each of the one or more lower electrodes located in the plasma processing units 1-1 to 1-n is coupled to the second matching circuit 51b. Therefore, the bias RF signal generated in the second RF generation unit 31b is supplied to one or more lower electrodes of the plasma processing units 1-1 to 1-n via the second matching circuit 51b.

[0077] Phase adjustment circuits 60-1 to 60-n-1 are coupled in series between the second matching circuit 51b and the plasma processing device 1-n. Specifically, phase adjustment circuit 60-1 is coupled to the second matching circuit 51b and phase adjustment circuit 60-2. Phase adjustment circuit 60-2 is coupled to phase adjustment circuit 60-1 and phase adjustment circuit 60-3. Phase adjustment circuit 60-n-1 is coupled to phase adjustment circuit 60-n-2 and the plasma processing device 1-n.

[0078] The kth phase adjustment circuit 60-k among the phase adjustment circuits 60-1 to 60-n-1 is coupled to the kth plasma processing unit 1-k and the k+1th plasma processing unit 1-k+1 among the plasma processing units 1-1 to 1-n (where k is an integer from 1 to n-1). Specifically, plasma processing unit 1-k is coupled to the input terminal of phase adjustment circuit 60-k, and plasma processing unit 1-k+1 is coupled to the output terminal of phase adjustment circuit 60-k.

[0079] Phase adjustment circuits 60-1 to 60-n-1 receive the bias RF signal generated in the second RF generation unit 31b via the second matching circuit 51b and sequentially shift the phase of the bias RF signal (hereinafter, the bias signal generated in the second RF generation unit 31b will also be called "bias RF signal BR1", and the bias RF signal whose phase has been shifted by the phase adjustment circuit 60-k will also be called "bias RF signal BRk+1". Also, bias RF signals BR1 to BRn will be collectively referred to as "bias RF signal". Also, one of the bias RF signals BR1 to BRn will also be called "bias RF signal"). The bias RF signal BRk is supplied to the plasma processing device 1-k. For example, the bias RF signal BR1 generated in the second RF generation unit 31b is supplied to the plasma processing device 1-1 and the phase adjustment circuit 60-1 via the second matching circuit 51b. The phase adjustment circuit 60-1 shifts the phase of the bias RF signal BR1 to generate the bias RF signal BR2. The bias RF signal BR2 is supplied to the plasma processing unit 1-2 and the phase adjustment circuit 60-2. The phase adjustment circuit 60-n-1 then shifts the phase of the bias RF signal BRn-1 to generate the bias RF signal BRn. The bias RF signal BRn is supplied to the plasma processing unit 1-n. Note that the phase adjustment circuits 60-1 to 60-n-1 may have the same configuration and / or functions as the phase adjustment circuit 60 described in Figures 4A and 4B.

[0080] In this embodiment, the plasma processing system has switches SWa1 to SWan and switches SWb1 to SWbn. Switches SWa1 to SWan are coupled to the first matching circuit 51a and the plasma processing devices 1-1 to 1-n. Switches SWa1 to SWan each switch whether or not to supply the source RF signal SR generated in the first RF generation unit 31a to the plasma processing devices 1-1 to 1-n. Switches SWb1 to SWbn are coupled to the second matching circuit 51b or phase adjustment circuit 60-1 to 60-n-1 and the plasma processing devices 1-1 to 1-n. Switches SWb1 to SWbn each switch whether or not to supply the bias RF signal BR1 to BRn to the plasma processing devices 1-1 to 1-n.

[0081] Figure 11 is a block diagram showing an example of the configuration of the first RF generation unit 31a and the second RF generation unit 31b, and the first matching circuit 51a and the second matching circuit 51b. The first RF generation unit 31a has a control circuit 311 and an amplification circuit 312. The second RF generation unit 31b has a control circuit 313 and an amplification circuit 314. The first matching circuit 51a has a control circuit 511, a VI sensor 512, a matching circuit 513, and a voltage sensor 514. The second matching circuit 51b has a control circuit 515, a VI sensor 516, a matching circuit 517, a low-pass filter 518, and a voltage sensor 519.

[0082] Figure 12 is a flowchart showing an example of a plasma processing method according to this embodiment (hereinafter also referred to as "this processing method"). Figure 13 is a timing chart showing an example of the period during which the source RF signal SR and the bias RF signal BR1 are supplied in this processing method. Figure 14 is a timing chart showing an example of the phase of each bias RF signal. Hereinafter, an example of this processing method will be described with reference to Figures 10 to 14.

[0083] As shown in Figure 12, this processing method includes the steps of placing a substrate (ST1), supplying a processing gas (ST2), generating a source RF signal (ST3), and generating a bias RF signal (ST4). Furthermore, some or all of the steps T included in this processing method may be executed in parallel in plasma processing devices 1-1 to 1-n. In the example shown in Figure 12, at least steps ST3 and ST4 may be executed in parallel in plasma processing devices 1-1 to 1-n. In addition, in this processing method, steps ST2 to ST4 may be executed simultaneously. Furthermore, steps ST2 to ST4 may be executed in an order different from the order described below.

[0084] First, in step ST1, the substrate W is placed on the substrate support section 11 in each of the plasma processing apparatuses 1-1 to 1-n. Then, in step ST2, processing gas is supplied to the plasma processing chamber 10.

[0085] Next, in step ST3, the first RF generation unit 31a generates a source RF signal SR. As shown in Figure 13, the source RF signal SR is a pulse wave that includes an electrical pulse during the H period. As an example, the source RF signal SR is generated as follows. First, in the first RF generation unit 31a, the control circuit 311 generates a timing signal TS (see Figures 11 and 13). The timing signal TS is a signal that indicates the H period and L period of the source RF signal and / or bias RF signal. That is, the timing signal TS is a signal that has a period of high voltage (hereinafter also referred to as "on") and a period of low voltage (hereinafter also referred to as "off"). During the period when the timing signal TS is on, the source RF signal and / or bias RF signal are in the H period. Also, during the period when the timing signal TS is off, the source RF signal and / or bias RF signal are in the L period.

[0086] As shown in Figure 13, at time t1, when the timing signal TS changes from off to on, the amplifier circuit 312 generates RF. As a result, as shown in Figure 13, an electrical pulse is generated in the source RF signal SR at time t1. In this way, the source RF signal SR is generated by the amplifier circuit 312 periodically generating electrical pulses based on the timing signal TS. The generated source RF signal SR is supplied to the first matching circuit 51a.

[0087] Next, in step ST4, the second RF generation unit 31b generates a bias RF signal BR1. The bias RF signal BR1 is generated based on the timing signal TS generated by the control circuit 311 of the first RF generation unit 31a. Specifically, first, the control circuit 311 supplies the timing signal TS to the control circuit 313 of the second RF generation unit 31b. Then, when the timing signal TS is turned on at time t1, the amplification circuit 314 generates RF based on the instruction from the control circuit 313. As a result, an electrical pulse is generated in the bias RF signal BR1 at time t1, as shown in Figure 13. In this way, the bias RF signal BR1 is generated by the amplification circuit 314 periodically generating electrical pulses based on the timing signal TS. The generated bias RF signal BR1 is supplied to the second matching circuit 51b.

[0088] When the bias RF signal BR1 is supplied to the second matching circuit 51b, the second matching circuit 51b matches the impedance of its input terminal (hereinafter referred to as "input impedance") with the impedance of its output terminal (hereinafter referred to as "output impedance"). Specifically, first, the VI sensor 516 measures the voltage and current of the bias RF signal BR1 supplied from the second RF generation unit 31b. Then, the control circuit 515 controls the matching circuit 517 based on the measured voltage and current to match the input impedance and output impedance of the second matching circuit 51b.

[0089] The bias RF signal BR1 passes through the matching circuit 51b, then through the low-pass filter 518, and is supplied to the plasma processing device 1-1 and the phase adjustment circuit 60-1. In the second matching circuit 51b, the voltage sensor 519 measures the voltage of the bias RF signal BR1 after it has passed through the low-pass filter. The voltage measured by the voltage sensor 519 is supplied to the control circuit 515 and the control circuit 311 of the first RF generation unit 31a.

[0090] When the voltage measured by the voltage sensor 519 is supplied to the control circuit 311, the control circuit 311 generates a gate signal GS based on that voltage. In one example, as shown in Figure 13, the control circuit 311 may generate a pulse in the gate signal GS at the timing when the voltage of the bias RF signal BR1 peaks. That is, the gate signal GS may be a signal that periodically contains pulses, with each pulse appearing at the timing when the voltage of the bias RF signal BR1 peaks. The control circuit 311 also supplies the generated gate signal GS to the control circuit 511 of the first matching circuit 51a.

[0091] Furthermore, the first matching circuit 51a matches its input impedance and output impedance based on the gate signal GS. The input impedance may include the output impedance of the first RF generation unit 31a. The output impedance of the first matching circuit 51a may include the impedance of the loads of the plasma processing devices 1-1 to 1-n. As an example, the first matching circuit 51a matches its input impedance and output impedance at the timing when a pulse appears in the gate signal GS. For example, the matching circuit 513 may be controlled based on the voltage and current of the source RF signal SR measured by the VI sensor 512 at the timing when a pulse appears in the gate signal GS to match the input impedance and output impedance of the first matching circuit 51a. That is, the first matching circuit 51a may match its input impedance and output impedance at the timing when the voltage of the bias RF signal BR1 peaks.

[0092] The bias RF signal BR1 output from the second matching circuit 51b is supplied to the plasma processing unit 1-1 and the phase adjustment circuit 60-1. The phase adjustment circuit 60-1 shifts the phase of the bias RF signal BR1 to generate the bias RF signal BR2. The phase adjustment circuit 60-1 also supplies the bias RF signal BR2 to the plasma processing unit 1-2 and the phase adjustment circuit 60-2. The phase adjustment circuits 60-2 to 60-n-1 sequentially shift the phases of the received bias RF signals BR2 to BRn-1 to generate bias RF signals BR3 to BRn, respectively. The phase adjustment circuits 60-1 to 60-n-1 each shift the phase of the received bias RF signal based on the number n of plasma processing units 1. In this example, the phase adjustment circuits 60-1 to 60-n-1 shift the phase of the received bias RF signal by 360° / n, that is, by an angle obtained by dividing 360° by the number of plasma processing units 1. Furthermore, phase adjustment circuits 60-2 to 60-n-1 supply bias RF signals BR3 to BRn to plasma processing devices 1-3 to 1-n, respectively. Also, phase adjustment circuits 60-2 to 60-n-2 supply bias RF signals BR3 to BRn-1 to phase adjustment circuits 60-3 to 60-n-1.

[0093] Figure 14 is a timing chart showing an example of the phase of bias RF signals BR1 to BR4 during one period of bias RF signal BR1. Figure 14 shows an example where n=4, i.e., plasma processing units 1-1 to 1-4 are coupled to the first matching circuit 51a. In the example of Figure 14, phase adjustment circuits 60-1 to 60-3 are coupled in series between the second matching circuit 51b and the plasma processing unit 1-4. In Figure 14, the horizontal axis represents time or phase. bias This represents one period of the bias RF signal BR1.

[0094] As shown in Figure 14, the bias RF signal BR2 is shifted in phase by 360° / 4, or 90°, relative to the bias RF signal BR1. Similarly, the bias RF signal BR3 is shifted in phase by 90° relative to the bias RF signal BR2. Also, the bias RF signal BR4 is shifted in phase by 90° relative to the bias RF signal BR3. In this example, the first matching circuit 51a matches the impedance at a timing that is Δθ behind in phase from time t1, that is, at the timing when the phase of the bias RF signal BR1 is 90°. As a result, as explained in Figure 9, the impedance mismatch as seen from the first matching circuit 51a is largest for plasma processing unit 1-3, next largest for plasma processing units 1-2 and 1-4, and smallest for plasma processing unit 1-1. Consequently, the power of the source RF signal SR is supplied most to plasma processing unit 1-1. As the phase advances by another 90°, the impedance mismatch becomes smallest in plasma processing unit 1-2, and more power of the source RF signal SR is supplied to plasma processing unit 1-2. As the phase advances by another 90°, the impedance mismatch becomes smallest in plasma processing unit 1-3, and more power of the source RF signal SR is supplied to plasma processing unit 1-3. As the phase advances by another 90°, the impedance mismatch becomes smallest in plasma processing unit 1-4, and more power of the source RF signal SR is supplied to plasma processing unit 1-4. In other words, throughout one cycle of the bias RF signal, more power of the source RF signal SR is supplied to one of the plasma processing units 1-1 to 1-4. This reduces the occurrence of reflections of the source RF signal SR, and thus suppresses power loss of the source RF signal SR.

[0095] Furthermore, the timing at which the first matching circuit 51a performs impedance matching is not limited to the peak voltage of the bias RF signal BR1. For example, this timing may be any of the periods A shown in Figure 9. Alternatively, this timing may be multiple timings within period A shown in Figure 9. It may also be any timing at which the impedances of the plasma processing devices 1-1 to 1-n do not overlap. For example, when n=4, this timing may be when the phases of the bias RF signals BR1 to BR4 are 30° and 150°.

[0096] Furthermore, the plasma processing system may be operated by disconnecting one or more of the plasma processing devices 1-1 to 1-n from the impedance matching circuit 50 using switches SWa1 to SWan and switches SWb1 to SWbn. These one or more plasma processing devices may be, for example, plasma processing devices that are in a down state or idle state. In this case, the phase adjustment circuits 60-1 to 60-n-1 may adjust the amount of phase shift according to the number of plasma processing devices coupled to the impedance matching circuit 50. For example, in the example shown in Figure 14, if plasma processing device 1-4 is in a down state or idle state, the phase adjustment circuits 60-1 and 60-2 may consider n=3 and shift the phase by 360° / 3, or 120° each.

[0097] Referring to Figure 13, at time t2, when the timing signal TS changes from on to off, the first RF generation unit 31a and the second RF generation unit 31b stop generating the source RF signal SR and the bias DC signal BD1. Then, at time t3, when the timing signal TS changes from off to on, the first RF generation unit 31a and the second RF generation unit 31b start generating the source RF signal SR and the bias DC signal BD1 again. By repeating the above operation, plasma is generated from the processing gas in the plasma processing chamber 10, and plasma processing (e.g., etching) is performed on the substrate W.

[0098] Figure 15 is a block diagram showing an example configuration of a plasma processing system according to one exemplary embodiment. The plasma processing system according to this embodiment differs from the plasma processing system shown in Figure 10 mainly in that bias DC signals are supplied to the plasma processing devices 1-1 to 1-n as bias signals. That is, in this embodiment, the first DC generation unit 32a generates bias DC signals BD1 to BDn, and bias DC signals BD1 to BDn are supplied to the plasma processing devices 1-1 to 1-n.

[0099] Figure 16 is a block diagram showing an example of the configuration of the first RF generation unit 31a, the first DC generation unit 32a, and the first matching circuit 51a. The first DC generation unit 32a includes a DC generation unit 321 and a DC control unit 322. The DC generation unit 321 includes a control circuit 323 and an amplification circuit 324. The DC control unit 322 includes a control circuit 325, a pulse generation circuit 326, a voltage sensor 327, and low-pass filters 328-1 to 328-n.

[0100] Figure 17 is a flowchart showing an example of the plasma processing method according to this embodiment (hereinafter also referred to as "this processing method"). Figure 18 is a timing chart showing an example of the period during which the source RF signal SR and the bias DC signal BD1 are supplied in this processing method. Figure 19 is a timing chart showing an example of the phase of each bias DC signal. Hereinafter, an example of this processing method will be described with reference to Figures 15 to 19.

[0101] As shown in Figure 17, this processing method includes the steps of placing a substrate (ST1), supplying a processing gas (ST2), generating a source RF signal (ST3), and generating a bias DC signal (ST4). Note that some or all of the steps T included in this processing method may be executed in parallel in plasma processing devices 1-1 to 1-n. In the example shown in Figure 17, at least steps ST3 and ST4 may be executed in parallel in plasma processing devices 1-1 to 1-n. Furthermore, in this processing method, steps ST2 to ST4 may be executed simultaneously. Also, steps ST2 to ST4 may be executed in an order different from the order described below.

[0102] First, in step ST1, the substrate W is placed on the substrate support section 11 in each of the plasma processing apparatuses 1-1 to 1-n. Then, in step ST2, processing gas is supplied to the plasma processing chamber 10.

[0103] Next, in step ST3, the first RF generation unit 31a generates a source RF signal SR. As shown in Figure 18, at time t1, when the timing signal TS changes from off to on, the source RF signal SR is generated. The generated source RF signal SR is supplied to the first matching circuit 51a.

[0104] Next, in step ST4, the first DC generation unit 32a generates a bias DC signal BD1. The bias DC signal BD1 is generated based on a timing signal TS. Specifically, first, the control circuit 311 of the first RF generation unit 31a supplies the timing signal TS to the control circuit 313 of the DC control unit 322. When the timing signal TS is turned on at time t1, the pulse generation circuit 326 generates a sequence of voltage pulses from the DC voltage generated in the DC generation unit 321. The generated sequence of voltage pulses passes through the low-pass filter 328-1 and is output from the first DC generation unit 32a as the bias DC signal BD1. In addition, the DC control unit 322 uses a voltage sensor 327 to generate the voltage of the sequence of voltage pulses generated by the pulse generation circuit 326. The voltage measured by the voltage sensor 327 is supplied to the control circuit 325 and the control circuit 311 of the first RF generation unit 31a.

[0105] When the voltage measured by the voltage sensor 327 is supplied to the control circuit 311, the control circuit 311 generates a gate signal GS based on that voltage. In one example, as shown in Figure 18, the control circuit 311 may generate a pulse in the gate signal GS at a timing when the voltage value of the voltage pulse is approximately constant. The timing at which a pulse appears in the gate signal GS may be around half the pulse width of the voltage pulse. The first matching circuit 51a matches the input impedance and output impedance of the first matching circuit 51a based on the gate signal GS.

[0106] The pulse generation circuit 326 generates bias DC signals BD2 to BDn with a phase shift relative to the bias DC signal BD1. The bias DC signals BD2 to BDn, like the bias DC signal BD1, consist of a sequence of voltage pulses. The pulse generation circuit 326 shifts the phase of the bias DC signals BD2 to BDn based on the number n of plasma processing devices 1. In this example, the pulse generation circuit 326 shifts the phase of the bias DC signals BD1 to BDn, respectively, to T bias / n, that is, the period of one cycle of the bias DC signals BD1 to BDn is shifted by a time equal to the number of plasma processing units 1.

[0107] Figure 19 is a timing chart showing an example of the phase of bias DC signals BD1 to BD4 during one period of bias DC signal BD1. Figure 19 shows an example where n=4, i.e., plasma processing devices 1-1 to 1-4 are coupled to the first matching circuit 51a. In Figure 19, the horizontal axis represents time or phase. bias This represents one period of the bias DC signal BD1.

[0108] As shown in Figure 19, the bias DC signal BD2 has a phase difference of T with respect to the bias DC signal BD1. bias / 4, that is, a 1 / 4 period shift. Similarly, the bias DC signal BD3 has a phase shift of 1 / 4 period relative to the bias DC signal BD2. Also, the bias DC signal BD4 has a phase shift of 1 / 4 period relative to the bias DC signal BD3. And in this example, the first matching circuit 51a is shifted from time t1 to Δt, that is, T bias The impedance is matched with a delay of 8. In this way, at the timing when the voltage pulses of the bias DC signals BD1 to BDn are on, the impedance mismatch as seen from the first matching circuit 51a is smallest in the plasma processing device to which the voltage pulse is supplied. For example, at the timing when the voltage pulse of the bias DC signal BD1 is on, the impedance mismatch as seen from the first matching circuit 51a is smallest in the plasma processing device 1-1, and more power of the source RF signal SR is supplied to the plasma processing device 1-1. As a result, more power of the source RF signal SR is supplied to one of the plasma processing devices 1-1 to 1-4 over one cycle of the bias DC signal. This reduces the occurrence of reflection of the source RF signal SR, and thus suppresses power loss of the source RF signal SR. Note that the voltage pulses contained in each of the bias DC signals BD1 to BDn may be generated so as not to overlap with each other in time. For example, as shown in Figure 19, the period during which the pulse voltage is on is t ON is, T bias It can be shorter than / n.

[0109] The embodiments disclosed herein should be considered in all respects as illustrative and not restrictive. The above embodiments may be omitted, replaced, or modified in various ways without departing from the scope and spirit of the appended claims. For example, although the above embodiments describe a capacitively coupled plasma apparatus as an example, they are not limited thereto and may be applied to other plasma apparatuses. For example, an inductively-coupled plasma (ICP) apparatus may be used instead of a capacitively coupled plasma apparatus. In this case, the inductively-coupled plasma apparatus includes an antenna and a lower electrode. The antenna is located above or above the plasma processing chamber, and the lower electrode is located within the substrate support. In one embodiment, the first plasma processing apparatus includes a first plasma processing chamber, a first substrate support located within the first plasma processing chamber, a first lower electrode located within the first substrate support, and a first antenna located above the first plasma processing chamber. Furthermore, the second plasma processing apparatus includes a second plasma processing chamber, a second substrate support located within the second plasma processing chamber, a second lower electrode located within the second substrate support, and a second antenna located above the second plasma processing chamber. The first matching circuit is coupled to the first antenna and the second antenna, the second matching circuit is coupled to the first lower electrode, and the phase adjustment circuit is coupled to the second lower electrode. Thus, the first plasma processing apparatus is coupled to the first matching circuit and the second matching circuit, and the second plasma processing apparatus is coupled to the first matching circuit and the phase adjustment circuit.

[0110] Furthermore, embodiments of this disclosure may include the following:

[0111] (Note 1) A source RF signal generation unit configured to generate a source RF signal for plasma generation, A first matching circuit coupled to the source RF signal generation unit, A bias RF signal generation unit configured to generate a bias RF signal, A second matching circuit coupled to the bias RF signal generation unit, A phase adjustment circuit coupled to the second matching circuit and configured to shift the phase of the bias RF signal supplied from the bias RF signal generation unit via the second matching circuit, A first plasma processing apparatus comprising a first plasma processing chamber and a first substrate support, wherein the first substrate support is located within the first plasma processing chamber and includes one or more first lower electrodes, the source RF signal is supplied to the first plasma processing apparatus via a first matching circuit, and the bias RF signal is supplied to at least one of the one or more first lower electrodes of the first plasma processing apparatus via a second matching circuit, A second plasma processing apparatus comprising a second plasma processing chamber and a second substrate support, wherein the second substrate support is located within the second plasma processing chamber and includes one or more second lower electrodes, the source RF signal is supplied to the second plasma processing apparatus via the first matching circuit, and the phase-shifted bias RF signal in the phase adjustment circuit is supplied to at least one of the one or more second lower electrodes of the second plasma processing apparatus, A plasma processing system equipped with the following features.

[0112] (Note 2) The plasma processing system according to Appendix 1, wherein the phase adjustment circuit includes at least one inductor and at least one capacitor.

[0113] (Note 3) The plasma processing system according to Appendix 2, wherein the phase adjustment circuit includes at least one of a variable inductor and a variable capacitor.

[0114] (Note 4) The system further includes a sensor configured to monitor the source RF signal between the source RF signal generation unit and the first matching circuit and to output the monitoring result, The plasma processing system according to Appendix 3, wherein the phase adjustment circuit is configured to adjust either or both the inductance of the variable inductor and the capacitance of the variable capacitor based on the monitoring results.

[0115] (Note 5) The plasma processing system as described in Appendix 4, wherein the sensor is a VI sensor configured to monitor the phase difference between the voltage and current of the source RF signal.

[0116] (Note 6) The plasma processing system according to Appendix 4, wherein the sensor is a directional coupler configured to monitor the reflected waves of the source RF signal.

[0117] (Note 7) The plasma processing system according to any one of appendices 3 to 6, wherein the phase adjustment circuit is configured to adjust either or both of the inductance of the variable inductor and the capacitance of the variable capacitor before or after plasma processing in the second plasma processing apparatus.

[0118] (Note 8) The plasma processing system according to any one of appendices 3 to 6, wherein the phase adjustment circuit is configured to adjust the inductance of the variable inductor and the capacitance of the variable capacitor during plasma processing in the second plasma processing apparatus.

[0119] (Note 9) The plasma processing system according to any one of appendices 1 to 8, wherein the phase difference between the bias RF signal and the phase-shifted bias RF signal is 180 degrees.

[0120] (Note 10) The first plasma processing apparatus described above is Includes a first upper electrode positioned above the first substrate support portion, The second plasma processing apparatus is Including a second upper electrode positioned above the second substrate support portion, The first matching circuit is coupled to at least one of the one or more first lower electrodes or the first upper electrode, and to at least one of the one or more second lower electrodes or the second upper electrode. The second matching circuit is coupled to at least one of the one or more first lower electrodes, The phase adjustment circuit is coupled to at least one of the one or more second lower electrodes. A plasma processing system as described in any one of the appendices 1 through 9.

[0121] (Note 11) The first plasma processing apparatus described above is Includes a first antenna positioned above the first plasma processing chamber, The second plasma processing apparatus is Includes a second antenna positioned above the second plasma processing chamber, The first matching circuit is coupled to the first antenna and the second antenna. The second matching circuit is coupled to at least one of the one or more first lower electrodes, The phase adjustment circuit is coupled to at least one of the one or more second lower electrodes. A plasma processing system as described in any one of the appendices 1 through 9.

[0122] (Note 12) The plasma processing system according to any one of the appendices 1 to 11, wherein the source RF signal has a frequency in the range of 10 MHz to 120 MHz.

[0123] (Note 13) The plasma processing system according to any one of the appendices 1 to 11, wherein the bias RF signal has a frequency in the range of 100 kHz to 20 MHz.

[0124] (Note 14) The plasma processing system according to any one of the appendices 1 to 11, wherein the bias RF signal has a frequency in the range of 400 kHz to 4 MHz.

[0125] (Note 15) The plasma processing system according to any one of appendices 1 to 14, wherein the source RF signal is a continuous wave having a first frequency.

[0126] (Note 16) The source RF signal is a pulse wave that periodically includes a plurality of first electrical pulses. Each of the plurality of first electrical pulses is composed of a continuous wave having a first frequency. A plasma processing system as described in any one of the appendices 1 through 14.

[0127] (Note 17) The plasma processing system according to any one of appendices 1 to 16, wherein the bias RF signal is a continuous wave having a second frequency.

[0128] (Note 18) The bias RF signal is a pulse wave that periodically includes a plurality of second electrical pulses. Each of the plurality of second electrical pulses is composed of a continuous wave having a second frequency. A plasma processing system as described in any one of the appendices 1 through 16.

[0129] (Note 19) A plasma processing method performed in a plasma processing system including a first plasma processing apparatus and a second plasma processing apparatus, A step of generating a first RF signal having a first frequency, The steps include generating a second RF signal having a second frequency lower than the first frequency, The steps include shifting the phase of the second RF signal, The steps include supplying the first RF signal to the first plasma processing apparatus and the second plasma processing apparatus, The steps include supplying the second RF signal to the first plasma processing apparatus, The steps include supplying a phase-shifted second RF signal to the second plasma processing apparatus and A plasma processing method equipped with [the necessary components].

[0130] (Note 20) An RF signal generation unit configured to generate RF signals, Matching circuit coupled to the RF signal generation unit, A voltage pulse generation unit configured to generate a sequence of voltage pulses, A phase adjustment circuit configured to shift the phase of the sequence of voltage pulses supplied from the voltage pulse generation unit, A first plasma processing apparatus comprising a first plasma processing chamber and a first substrate support, wherein the first substrate support is located within the first plasma processing chamber and includes one or more first lower electrodes, the RF signal is supplied to the first plasma processing apparatus via the matching circuit, and the sequence of voltage pulses is supplied from the voltage pulse generation unit to the one or more first lower electrodes of the first plasma processing apparatus, A second plasma processing apparatus comprising a second plasma processing chamber and a second substrate support, wherein the second substrate support is located within the second plasma processing chamber and includes one or more second lower electrodes, the RF signal is supplied to the second plasma processing apparatus via the matching circuit, and a sequence of phase-shifted voltage pulses is supplied to at least one of the one or more second lower electrodes of the second plasma processing apparatus in the phase adjustment circuit, A plasma processing system equipped with the following features.

[0131] (Note 21) A source RF signal generation unit configured to generate a source RF signal for plasma generation, A first matching circuit coupled to the source RF signal generation unit, A bias RF signal generation unit configured to generate a bias RF signal, A second matching circuit coupled to the bias RF signal generation unit, n plasma processing units (where n is an integer of 2 or more) are coupled in parallel to the first matching circuit, n-1 phase adjustment circuits, Equipped with, The n-1 phase adjustment circuits are connected in series between the second matching circuit and the nth plasma processing unit among the n plasma processing units, and are configured to sequentially shift the phase of the bias RF signal supplied from the bias RF signal generation unit via the second matching circuit. The kth (where k is an integer from 1 to n-1) phase adjustment circuit among the n-1 phase adjustment circuits is coupled to the kth plasma processing apparatus and the k+1 plasma processing apparatus among the n plasma processing apparatuses. The first plasma processing apparatus among the n plasma processing apparatuses includes a first plasma processing chamber and a first substrate support, the first substrate support being located within the first plasma processing chamber and including one or more first lower electrodes, the source RF signal being supplied to the first plasma processing apparatus via a first matching circuit, and the bias RF signal being supplied to at least one of the one or more first lower electrodes of the first plasma processing apparatus via a second matching circuit. A plasma processing system in which the k+1th plasma processing device among the n plasma processing devices includes a k+1th plasma processing chamber and a k+1th substrate support, the k+1st substrate support is located within the k+1th plasma processing chamber and includes one or more k+1th lower electrodes, the source RF signal is supplied to the k+1st plasma processing device via the first matching circuit, and a phase-shifted bias RF signal in the kth phase adjustment circuit among the n-1 phase adjustment circuits is supplied to at least one of the one or more k+1th lower electrodes of the k+1st plasma processing device.

[0132] (Note 22) The plasma processing system according to Appendix 21, wherein the n-1 phase adjustment circuits are configured to sequentially shift the phase of the bias RF signal by 360 degrees / n.

[0133] (Note 23) n first switches for switching whether or not to connect each of the n plasma processing devices to the first matching circuit, n second switches for switching whether or not to connect each of the n plasma processing devices to the second matching circuit, A plasma processing system according to appendix 21 or 22, further comprising the above.

[0134] (Note 24) A source RF signal generation unit configured to generate a source RF signal for plasma generation, A first matching circuit coupled to the source RF signal generation unit, A voltage pulse generation unit configured to generate a sequence of n voltage pulses (where n is an integer greater than or equal to 2), wherein the sequence of n voltage pulses is in phase with respect to each other. n plasma processing devices, Equipped with, A plasma processing system in which, among the n plasma processing devices, the k-th plasma processing device (where k is an integer from 1 to n) includes a k-th plasma processing chamber and a k-th substrate support, the k-th substrate support is located within the k-th plasma processing chamber and includes one or more first lower electrodes, the source RF signal is supplied to the k-th plasma processing device via the first matching circuit, and the k-th voltage pulse sequence among the n-th voltage pulse sequences is supplied to at least one of the one or more k-th lower electrodes of the k-th plasma processing device. [Explanation of Symbols]

[0135] 1…Plasma processing apparatus, 2…Control unit, 10…Plasma processing chamber, 11…Substrate support unit, 13…Shower head, 30…Power supply, 31…RF power supply, 31a…First RF generation unit, 31b…Second RF generation unit, 32…DC power supply, 32a…First DC generation unit, 32b…Second DC generation unit, 50…Impedance matching circuit, 51a…First matching circuit, 51b…Second matching circuit, 60…Phase adjustment circuit, 63…Inductor, 64…Capacitor, W…Substrate

Claims

1. A source RF signal generation unit configured to generate a source RF signal for plasma generation, A first matching circuit coupled to the source RF signal generation unit, A bias RF signal generation unit configured to generate a bias RF signal, A second matching circuit coupled to the bias RF signal generation unit, A phase adjustment circuit coupled to the second matching circuit and configured to shift the phase of the bias RF signal supplied from the bias RF signal generation unit via the second matching circuit, A first plasma processing apparatus comprising a first plasma processing chamber and a first substrate support, wherein the first substrate support is disposed within the first plasma processing chamber and includes one or more first lower electrodes, the source RF signal is supplied to the first plasma processing apparatus via a first matching circuit, and the bias RF signal is supplied to at least one of the one or more first lower electrodes of the first plasma processing apparatus via a second matching circuit, A second plasma processing apparatus comprising a second plasma processing chamber and a second substrate support, wherein the second substrate support is disposed within the second plasma processing chamber and includes one or more second lower electrodes, the source RF signal is supplied to the second plasma processing apparatus via the first matching circuit, and the phase-shifted bias RF signal in the phase adjustment circuit is supplied to at least one of the one or more second lower electrodes of the second plasma processing apparatus, A plasma processing system equipped with [the following features].

2. The plasma processing system according to claim 1, wherein the phase adjustment circuit includes at least one inductor and at least one capacitor.

3. The plasma processing system according to claim 2, wherein the phase adjustment circuit includes at least one of a variable inductor and a variable capacitor.

4. The system further includes a sensor configured to monitor the source RF signal between the source RF signal generation unit and the first matching circuit and to output the monitoring result, The plasma processing system according to claim 3, wherein the phase adjustment circuit is configured to adjust one or both of the inductance of the variable inductor and the capacitance of the variable capacitor based on the monitoring results.

5. The plasma processing system according to claim 4, wherein the sensor is a VI sensor configured to monitor the phase difference between the voltage and current of the source RF signal.

6. The plasma processing system according to claim 4, wherein the sensor is a directional coupler configured to monitor the reflected wave of the source RF signal.

7. The plasma processing system according to claim 3, wherein the phase adjustment circuit is configured to adjust one or both of the inductance of the variable inductor and the capacitance of the variable capacitor before or after plasma processing in the second plasma processing apparatus.

8. The plasma processing system according to claim 3, wherein the phase adjustment circuit is configured to adjust the inductance of the variable inductor and the capacitance of the variable capacitor during plasma processing in the second plasma processing apparatus.

9. The plasma processing system according to claim 1, wherein the phase difference between the bias RF signal and the phase-shifted bias RF signal is 180 degrees.

10. The first plasma processing apparatus is Including a first upper electrode positioned above the first substrate support portion, The second plasma processing apparatus is Including a second upper electrode positioned above the second substrate support portion, The first matching circuit is coupled to at least one of the one or more first lower electrodes or the first upper electrode, and to at least one of the one or more second lower electrodes or the second upper electrode. The second matching circuit is coupled to at least one of the one or more first lower electrodes, The phase adjustment circuit is coupled to at least one of the one or more second lower electrodes. The plasma processing system according to claim 1.

11. The first plasma processing apparatus is Includes a first antenna positioned above the first plasma processing chamber, The second plasma processing apparatus is Includes a second antenna positioned above the second plasma processing chamber, The first matching circuit is coupled to the first antenna and the second antenna. The second matching circuit is coupled to at least one of the one or more first lower electrodes, The phase adjustment circuit is coupled to at least one of the one or more second lower electrodes. The plasma processing system according to claim 1.

12. The plasma processing system according to claim 1, wherein the source RF signal has a frequency in the range of 10 MHz to 120 MHz.

13. The plasma processing system according to claim 1, wherein the bias RF signal has a frequency in the range of 100 kHz to 20 MHz.

14. The plasma processing system according to claim 1, wherein the bias RF signal has a frequency in the range of 400 kHz to 4 MHz.

15. The plasma processing system according to claim 1, wherein the source RF signal is a continuous wave having a first frequency.

16. The source RF signal is a pulse wave that periodically includes a plurality of first electrical pulses. Each of the plurality of first electrical pulses is composed of a continuous wave having a first frequency. The plasma processing system according to claim 1.

17. The plasma processing system according to claim 1, wherein the bias RF signal is a continuous wave having a second frequency.

18. The bias RF signal is a pulse wave that periodically includes a plurality of second electrical pulses. Each of the plurality of second electrical pulses is composed of a continuous wave having a second frequency. The plasma processing system according to claim 1.

19. A plasma processing method performed in a plasma processing system including a first plasma processing apparatus and a second plasma processing apparatus, A step of generating a first RF signal having a first frequency, The steps include generating a second RF signal having a second frequency lower than the first frequency, The steps include shifting the phase of the second RF signal, The steps include supplying the first RF signal to the first plasma processing apparatus and the second plasma processing apparatus, The steps include supplying the second RF signal to the first plasma processing apparatus, The steps include supplying a phase-shifted second RF signal to the second plasma processing apparatus and A plasma processing method equipped with [the necessary components].

20. An RF signal generation unit configured to generate RF signals, Matching circuit coupled to the RF signal generation unit, A voltage pulse generation unit configured to generate a sequence of voltage pulses, A phase adjustment circuit configured to shift the phase of the sequence of voltage pulses supplied from the voltage pulse generation unit, A first plasma processing apparatus comprising a first plasma processing chamber and a first substrate support, wherein the first substrate support is located within the first plasma processing chamber and includes one or more first lower electrodes, the RF signal is supplied to the first plasma processing apparatus via the matching circuit, and the sequence of voltage pulses is supplied from the voltage pulse generation unit to the one or more first lower electrodes of the first plasma processing apparatus, A second plasma processing apparatus comprising a second plasma processing chamber and a second substrate support, wherein the second substrate support is located within the second plasma processing chamber and includes one or more second lower electrodes, the RF signal is supplied to the second plasma processing apparatus via the matching circuit, and a sequence of phase-shifted voltage pulses is supplied to at least one of the one or more second lower electrodes of the second plasma processing apparatus in the phase adjustment circuit, A plasma processing system equipped with [the following features].

21. A source RF signal generation unit configured to generate a source RF signal for plasma generation, A first matching circuit coupled to the source RF signal generation unit, A bias RF signal generation unit configured to generate a bias RF signal, A second matching circuit coupled to the bias RF signal generation unit, n plasma processing devices (where n is an integer of 2 or more) are coupled in parallel to the first matching circuit, n-1 phase adjustment circuits, Equipped with, The n-1 phase adjustment circuits are connected in series between the second matching circuit and the nth plasma processing device among the n plasma processing devices, and are configured to sequentially shift the phase of the bias RF signal supplied from the bias RF signal generation unit via the second matching circuit. The kth (where k is an integer from 1 to n-1) phase adjustment circuit among the n-1 phase adjustment circuits is coupled to the kth plasma processing apparatus and the k+1 plasma processing apparatus among the n plasma processing apparatuses. The first plasma processing apparatus among the n plasma processing apparatuses includes a first plasma processing chamber and a first substrate support, the first substrate support being located within the first plasma processing chamber and including one or more first lower electrodes, the source RF signal being supplied to the first plasma processing apparatus via a first matching circuit, and the bias RF signal being supplied to at least one of the one or more first lower electrodes of the first plasma processing apparatus via a second matching circuit. A plasma processing system in which the k+1 plasma processing device among the n plasma processing devices includes a k+1 plasma processing chamber and a k+1 substrate support, the k+1 substrate support is located within the k+1 plasma processing chamber and includes one or more k+1 lower electrodes, the source RF signal is supplied to the k+1 plasma processing device via the first matching circuit, and a phase-shifted bias RF signal in the k phase adjustment circuit among the n-1 phase adjustment circuits is supplied to at least one of the one or more k+1 lower electrodes of the k+1 plasma processing device.

22. The plasma processing system according to claim 21, wherein the n-1 phase adjustment circuits are configured to sequentially shift the phase of the bias RF signal by 360 degrees / n.

23. n first switches for switching whether or not to connect each of the n plasma processing devices to the first matching circuit, n second switches for switching whether or not to connect each of the n plasma processing devices to the second matching circuit, The plasma processing system according to claim 21, further comprising the following:

24. A source RF signal generation unit configured to generate a source RF signal for plasma generation, A first matching circuit coupled to the source RF signal generation unit, A voltage pulse generation unit configured to generate a sequence of n voltage pulses (where n is an integer of 2 or more), wherein the sequence of n voltage pulses is in phase with respect to each other. n plasma processing devices, Equipped with, A plasma processing system in which, among the n plasma processing devices, the k-th plasma processing device (where k is an integer from 1 to n) includes a k-th plasma processing chamber and a k-th substrate support, the k-th substrate support is located within the k-th plasma processing chamber and includes one or more k-th lower electrodes, the source RF signal is supplied to the k-th plasma processing device via the first matching circuit, and the sequence of the k-th voltage pulse among the n-th sequence of voltage pulses is supplied to at least one of the one or more k-th lower electrodes of the k-th plasma processing device.

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