Semiconductor device and its manufacturing method
By maintaining higher surface roughness on specific sidewalls of trench gates with a thicker insulating film coating, the semiconductor device achieves miniaturization while preserving reliability and breakdown voltage, addressing the challenge of sidewall irregularities in trench gates.
JP7869132B2Active Publication Date: 2026-06-02DENSO CORP +2
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- DENSO CORP
- Filing Date
- 2022-12-27
- Publication Date
- 2026-06-02
AI Technical Summary
Technical Problem
The miniaturization of semiconductor devices with trench gates is hindered by the need to increase trench pitch to remove sidewall irregularities, which affects breakdown voltage and reliability of the gate insulating film.
Method used
A semiconductor device design where the surface roughness of certain trench sidewalls is maintained to allow a thicker gate insulating film coating, thereby suppressing irregularity-related deterioration while maintaining a smaller trench pitch.
Benefits of technology
This approach enables miniaturization of semiconductor devices by ensuring the breakdown voltage and reliability of the gate insulating film without extensive sidewall smoothing, thus allowing for a reduced trench pitch.
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Smart Images
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Abstract
To provide a technology useful for miniaturization of a semiconductor device having multiple trench gates.SOLUTION: The surface roughness of a pair of end sidewalls 42 of an inner trench 40B is greater than the surface roughness of a pair of longitudinal sidewalls 44 in a longitudinal intermediate portion 46 of the inner trench 40B. Furthermore, the thickness of a gate insulating film 34 covering the pair of end sidewalls 42 of the inner trench 40B is greater than the thickness of the gate insulating film 34 covering the pair of longitudinal sidewalls 44 in the intermediate portion 46 of the inner trench 40B.SELECTED DRAWING: Figure 4
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