Drive circuits and electronic circuits

Abstract

To form a driving circuit with high withstanding voltage using an element with low withstanding voltage.SOLUTION: A driving circuit 10 is a circuit that drives a high withstanding voltage element Q1 with higher withstanding voltage than a first withstanding voltage, and includes inverters (INVs) 1 to 5 each formed of an element with the withstanding voltage performance with respect to a second withstanding voltage lower than the first withstanding voltage, and first to sixth transistors (FETs) M1 to M6 with higher withstanding voltage than the first withstanding voltage. The FET M1 has a first end to which a first voltage V1 is applied and a second end connected to a driving terminal of the high withstanding voltage element. To the INV I1, a driving signal is input. The FET M2 is connected to the FET M1. The INV I2 is connected to driving terminals of the INV I1 and the FET M1. The INV I3 is connected to the INV I1. The FET M3 is connected to the INV I2. The FET M4 is connected to the FET M3. The FET M5 is connected to the INV I3. The FET M6 is connected to the FET M5. The INV I4 is connected to the FET M6 and the FET M2. The INV I5 is connected to the FET M4 and the INV M4.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] Embodiments of the present invention relate to a drive circuit.

Background Art

[0002] Conventionally, in a drive circuit of a driver IC (Integrated Circuit) for a high-voltage MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor), particularly in a high-side drive circuit, a drive circuit using a process with a breakdown voltage of 15V or higher has been used to drive a 15V-driven MOSFET. On the other hand, in order to miniaturize the process, it is necessary to configure a drive circuit using a process with a gate breakdown voltage of about 5V. For this reason, a control circuit may be configured using a low-voltage power supply of about 5V based on the bootstrap voltage on the high-side, for example, the surface substrate potential on the insulating film of SOI (Silicon on Insulator).

[0003] However, when the low-side MOSFET in the output stage of the switching circuit transitions from on to off and then the high-side MOSFET switches to on, the output voltage rises from 0V to the positive power supply, and dv / dt is applied to the substrate capacitance in the high-side region, causing a displacement current to flow. There is a problem that this displacement current flows through the high-side circuit elements using the 5V power supply generated inside the IC, making malfunction likely to occur.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0005] Therefore, one of the non-limiting problems that this embodiment aims to solve is forming a high-voltage drive circuit using low-voltage elements. [Means for solving the problem]

[0006] According to one embodiment, the drive circuit is a circuit for driving a high-voltage element having a higher voltage rating than a first withstand voltage, and comprises a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a first inverter, a second inverter, a third inverter, a fourth inverter, and a fifth inverter. The first transistor has a first voltage applied to its first terminal and its second terminal connected to the drive terminal of the high-voltage element, and has a higher voltage rating than the first voltage rating. The second transistor has a higher breakdown voltage than the first transistor, with its first terminal connected to the second terminal of the first transistor, and a second voltage applied to the second terminal. The first inverter receives a drive signal from the first terminal and is formed of elements having withstand voltage performance to a second withstand voltage lower than the first withstand voltage. The second inverter is formed of an element having a voltage withstand capability against the second voltage, with its first terminal connected to the second terminal of the first inverter and its second terminal connected to the drive terminal of the first transistor. The third inverter has its first terminal connected to the first terminal of the first inverter and is formed of an element having withstand voltage performance against the second withstand voltage. The third transistor has its first terminal connected to the second terminal of the second inverter and has a higher voltage rating than the first transistor. The fourth transistor has its first terminal connected to the second terminal of the third transistor and has a higher withstand voltage than the first transistor. The fifth transistor has its first terminal connected to the second terminal of the third inverter and has a higher voltage rating than the first transistor. The sixth transistor has its first terminal connected to the second terminal of the fifth transistor and has a higher voltage rating than the first transistor. The fourth inverter is formed of an element having a voltage withstand capability against the second withstand voltage, with its first terminal connected to the second terminal of the sixth transistor and its second terminal connected to the drive terminal of the second transistor. The fifth inverter is formed of an element having a voltage withstand capability for the second voltage, with its first terminal connected to the second terminal of the fourth transistor and the second terminal of the fourth inverter, and its second terminal connected to the first terminal of the fourth inverter. [Brief explanation of the drawing]

[0007] [Figure 1] A circuit diagram showing an example of a drive circuit according to one embodiment. [Figure 2] A circuit diagram showing an example of a drive circuit according to one embodiment. [Figure 3] A circuit diagram showing an example of the use of a drive circuit according to one embodiment. [Figure 4] A circuit diagram showing an example of the use of a drive circuit according to one embodiment. [Modes for carrying out the invention]

[0008] Embodiments will be described below with reference to the drawings. The drive circuit in this disclosure is, as an example, a drive circuit for driving a high-side switch. In this disclosure, the expressions "higher" and "lower" may be used, but these can be interpreted as "greater than or equal to" and "less than or equal to," respectively, as needed.

[0009] (First Embodiment) Figure 1 is a circuit diagram showing a drive circuit according to one embodiment. The drive circuit 10 is a circuit for driving a high-voltage element Q1. The high-voltage element Q1 is, for example, an element that forms a high-side switch, and is a high-voltage MOSFET, such as an n-type DMOS (Double-Diffused MOSFET), to which a gate voltage of about 15[V] can be applied. The high-voltage element Q1 may also be, for example, a lateral-diffused DMOS (LDMOS). This high-voltage element Q1 is a switch to which a voltage of about 600[V] may be applied between the drain and source. The drive circuit 10 is a circuit that inputs a drive signal to the gate of this high-voltage element Q1, and uses an element with a lower voltage rating than the high-voltage element Q1, such as 5[V], as part of the circuit.

[0010] As an example, high-voltage components are defined as having the ability to withstand voltages of approximately 15[V], and low-voltage components as having the ability to withstand voltages of approximately 5[V], but the invention is not limited to these. Hereinafter, in this disclosure, the voltage at which high-voltage components are intended is defined as the first voltage at which high-voltage components are intended (e.g., 12[V] or 15[V]), and the voltage that is lower than the first voltage at which high-voltage components are not intended is defined as the second voltage at which high-voltage components are intended (e.g., 5[V]). High-voltage components are defined as components that can withstand voltages higher than the first voltage at which high-voltage components are intended, and low-voltage components are defined as components that cannot withstand the first voltage at which high-voltage components are intended, but can withstand the second voltage at which high-voltage components are intended.

[0011] The drive circuit 10 is formed by a plurality of transistors and a plurality of inverters. The drive circuit 10 receives, for example, a first voltage V1 and a second voltage V2 from an external source and generates a third voltage V3 and a fourth voltage V4 in which V1 > V3 > V4 > V2 in an internal voltage control circuit (details not shown). The first voltage V1 and the third voltage V3, and the fourth voltage V4 and the second voltage V2 are controlled to have a potential difference lower than the second withstand voltage, for example, a potential difference of 4[V]. In particular, the second voltage V2 can be the source voltage of the high-voltage element Q1.

[0012] In the present disclosure, for an element having terminals above and below in the drawing, the terminal on the upper side is referred to as the first terminal, and the terminal on the lower side is referred to as the second terminal. Also, for an element having terminals on the left and right in the drawing, the terminal on the left side may be described as the first terminal, and the terminal on the right side may be described as the second terminal.

[0013] The first transistor M1 is, for example, a high-voltage-resistant p-type MOSFET (pMOS). A first voltage V1 is applied to the source (the first terminal), and the drain (the second terminal) is connected to the gate (the drive terminal) of the high-voltage-resistant element Q1.

[0014] The second transistor M2 is, for example, a high-voltage-resistant n-type MOSFET (nMOS). The drain (the first terminal) is connected to the drain of the first transistor M1 and the gate of the high-voltage-resistant element Q1, and the source (the second terminal) is connected to the source of the high-voltage-resistant element Q1, to which a second voltage V2 is applied.

[0015] An appropriate resistor may be connected between the first transistor M1 and the second transistor M2 as necessary. These transistors form a CMOS (Complementary MOSFET) and output a drive signal for the high-voltage-resistant element Q1 from the shared drain based on the voltage applied to the gate. Also, the first transistor M1 and the second transistor M2 may be DMOS.

[0016] An enable signal for driving the high-voltage-resistant element Q1 is input to the first inverter I1. The first inverter I1 receives the enable signal from the input (the first terminal) side, and the output (the second terminal) is connected to the input of the second inverter I2.

[0017] The second inverter I2 has its input (the first terminal) connected to the output of the first inverter I1, and its output (the second terminal) is connected to the gate of the first transistor M1.

[0018] The input (first terminal) of the third inverter I3 is connected to the input of the first inverter I1.

[0019] The first inverter I1, the second inverter I2, and the third inverter I3 each have a positive reference voltage of the first voltage V1 and a negative reference voltage of the third voltage V3. In other words, the first voltage V1 is applied to the positive electrode of each inverter, and the third voltage V3 is applied to the negative electrode. These inverters may be elements that can withstand the potential difference between the first voltage V1 and the third voltage V3, and can be formed using low withstand voltage elements. As an example in FIG. 1, the elements forming these inverters do not have withstand voltage performance with respect to the first withstand voltage, but may have withstand voltage performance with respect to the second withstand voltage. For example, when the second withstand voltage is 5 [V], as shown in the figure, by applying a voltage of 4 [V], it is possible to safely operate the low withstand voltage elements in the drive circuit 10.

[0020] The signals output from the second inverter I2 and the third inverter I3 are each level-shifted and input to the latch circuit 12. The level shift circuit is formed by high withstand voltage elements, the third transistor M3, the fourth transistor M4, the fifth transistor M5, and the sixth transistor M6.

[0021] The third transistor M3 is, for example, a p-type MOSFET, the source (first terminal) is connected to the output of the second inverter I2, the drain (second terminal) is connected to the drain of the fourth transistor M4, and the third voltage V3 is applied to the gate (drive terminal).

[0022] The fourth transistor M4 is, for example, an n-type MOSFET, the drain (first terminal) is connected to the drain of the third transistor M3, the source (second terminal) is connected to the latch circuit 12, and the fourth voltage V4 is applied to the gate (drive terminal).

[0023] The signal output from the second inverter I2 is input to the source of the third transistor M3 as a signal with the third voltage V3 as the negative reference voltage. This signal is output from the drain of the third transistor M3 to the drain of the fourth transistor M4. Then, with the fourth voltage V4 as the positive reference voltage, it is output from the source of the fourth transistor M4 to the latch circuit 12. The fourth transistor M4 outputs a signal in a range where the voltage from its source is lower than the fourth voltage V4 applied to its gate. Therefore, the fourth transistor M4 outputs a signal with the positive power supply voltage referenced to the fourth voltage V4.

[0024] More specifically, when a third voltage V3 is applied to the gate of the third transistor M3, and a High signal with the negative reference voltage being the third voltage V3 is input to the source, the source-gate voltage exceeds a predetermined value, and drain current flows. When a Low signal is input to the source of the third transistor M3, the source-gate voltage falls below the predetermined value, and no drain current flows through the third transistor M3. Thus, when a Low signal with the negative reference voltage being the third voltage V3 is input to the source of the third transistor M3, no drain current flows, but when a High signal is input to the source, drain current flows.

[0025] When the fourth transistor M4 has a fourth voltage V4 applied to its gate, the drain potential rises due to the drain current of the third transistor M3, and the drain-source voltage rises, causing a drain current corresponding to the fourth voltage V4 to flow. As a result, the source of the fourth transistor M4 outputs a High / Low signal corresponding to the fourth voltage V4, depending on the High / Low state of the drain; that is, a signal with the fourth voltage V4 as the reference value of the positive voltage. In the latch circuit 12, a High / Low determination is made based on the voltage derived from this output signal.

[0026] The fifth transistor M5 is, for example, a p-type MOSFET, with its source (first terminal) connected to the output of the third inverter I3, its drain (second terminal) connected to the drain of the sixth transistor M6, and the third voltage V3 applied to its gate (drive terminal).

[0027] The sixth transistor M6 is, for example, an n-type MOSFET, with its drain (first terminal) connected to the drain of the fifth transistor M5, its source (second terminal) connected to the latch circuit 12, and the fourth voltage V4 applied to its gate (drive terminal).

[0028] The signal output from the third inverter I3 is input to the source of the fifth transistor M5 as a signal with the third voltage V3 as the negative reference voltage. This signal is output from the drain of the fifth transistor M5 to the drain of the sixth transistor M6. Then, with the fourth voltage V4 as the positive reference voltage, it is output from the source of the sixth transistor M6 to the latch circuit 12. The operation of the fifth transistor M5 and the sixth transistor M6 is the same as the operation of the third transistor M3 and the fourth transistor M4 described above.

[0029] The third transistor M3, the fourth transistor M4, the fifth transistor M5, and the sixth transistor M6 may each be, for example, DMOS transistors. Furthermore, these transistors may also be, for example, transistors having a breakdown voltage performance relative to the first breakdown voltage.

[0030] The latch circuit 12 is configured, for example, with a fourth inverter I4 and a fifth inverter I5. A resistor may be provided in the connection path between the fourth inverter I4 and the fifth inverter I5, if necessary.

[0031] The fourth inverter I4 has its input (first terminal) connected to the source of the sixth transistor M6, and its output (second terminal) connected to the gate of the second transistor M2 and the input of the fifth inverter I5.

[0032] The fifth inverter I5 has its input (first terminal) connected to the source of the fourth transistor M4, and its output (second terminal) connected to the input of the fourth inverter I4.

[0033] With the above connection, an RS latch is formed as a latch circuit 12, which resets the input of the fourth inverter I4 and sets the input of the fifth inverter I5. When a Low signal is input to the fourth inverter I4 and a High signal is input to the fifth inverter I5, a High signal is input to the gate of the second transistor M2. When a High signal is input to the fourth inverter I4 and a Low signal is input to the fifth inverter I5, a Low signal is input to the gate of the second transistor M2.

[0034] In other words, when a High signal is output from the 4th transistor M4 and a Low signal is output from the 6th transistor M6, a High signal is input to the 2nd transistor M2. Conversely, when a Low signal is output from the 4th transistor M4 and a High signal is output from the 6th transistor M6, a Low signal is input to the 2nd transistor M2.

[0035] The fourth inverter I4 and the fifth inverter I5 have a positive reference voltage of the fourth voltage V4 and a negative reference voltage of the second voltage V2, respectively. In other words, the fourth voltage V4 is applied to the positive electrode of each inverter, and the second voltage V2 is applied to the negative electrode. These inverters only need to be elements that can withstand the potential difference between the fourth voltage V4 and the second voltage V2, for example, 4[V] which is lower than the second withstand voltage, i.e., elements that have withstand voltage performance against the second withstand voltage, and can be formed using low-voltage elements.

[0036] When the enable signal is High, the first inverter I1 outputs a Low signal and the second inverter I2 outputs a High signal. As a result, a High signal is applied to the gate of the first transistor M1, with the positive reference voltage being the first voltage V1 and the negative reference voltage being the third voltage V3.

[0037] Furthermore, the third inverter I3 outputs a Low signal, and via the level-shifting circuit formed by the third transistors M3 to the sixth transistor M6, the fourth inverter I4 outputs a level-shifted High signal, and the fifth inverter I5 outputs a level-shifted Low signal. As a result, a High signal with the positive reference voltage being the fourth voltage V4 and the negative reference voltage being the second voltage V2 is applied to the gate of the second transistor M2.

[0038] Depending on the applied signal state described above, the first transistor M1 is turned off and the second transistor M2 is turned on, so that a Low signal, referenced to the first voltage V1 and the second voltage V2, is applied to the gate of the high-voltage element Q1.

[0039] When the enable signal is low, the opposite operation occurs: the first transistor M1 turns on and the second transistor M2 turns off, applying a high signal to the gate of the high-voltage element Q1, with the first voltage V1 and the second voltage V2 as references.

[0040] As described above, according to this embodiment, it is possible to drive a high-voltage element Q1 with a drain breakdown voltage of 15[V] using an element having breakdown voltage performance for a second breakdown voltage (for example, 5[V]). This drive circuit 10 can appropriately turn the switch on and off based on the source potential (corresponding to the second voltage V2) of the high-voltage element Q1, which is the high-side switch. Therefore, even when the high-side switch is switched on or off, the influence of displacement current caused by an external load connected to the output terminal OUT on the drive circuit 10 can be reduced.

[0041] Therefore, it becomes possible to form a driver circuit using low-voltage elements. By forming a driver using low-voltage elements, the chip size can be reduced. Furthermore, in terms of the process, the process for generating each of the inverter elements described above can be realized using the process for forming low-voltage elements. In addition, it becomes possible to configure a power device drive circuit using a low-voltage power supply of approximately 5[V] as the surface substrate potential on the SOI insulating film.

[0042] Figure 2 shows an example of a configuration using CMOS for the second inverter I2, third inverter I3, fourth inverter I4, and fifth inverter I5 in Figure 1.

[0043] The inverter described above may be formed using CMOS as shown in the figure. The gate breakdown voltage of each transistor can be determined from the voltage applied between its source and drain to provide a breakdown voltage performance against a second breakdown voltage (e.g., 5[V]). Furthermore, the first inverter I1 can have the same configuration as the second inverter I2 or the third inverter I3.

[0044] (Second Embodiment) The high-voltage element Q1 and drive circuit 10 according to the above embodiment can be used simply as a high-side switch with the load located on the opposite side of the switch relative to the power supply, but they can also be used in combination with a low-side switch.

[0045] Figure 3 shows an example of an electronic circuit comprising a high-side switch and a drive circuit 10 according to one embodiment.

[0046] Electronic circuit 1 is a circuit that operates by controlling the voltage applied from, for example, a 600[V] voltage source VBB using a first high-voltage element Q1, which is a high-side switch, and a second high-voltage element Q2, which is a low-side switch. The semiconductor on the left side of the drawing is shown as an example and can be any circuit whose voltage is to be controlled as a high-side switch.

[0047] The high-side switch corresponds to the high-voltage element Q1 in Figures 1 and 2. This high-side switch is driven by the signal output by the aforementioned drive circuit 10.

[0048] The drive circuit 10 receives the bootstrap voltage VBS as the first voltage V1, and the source voltage of the first high-voltage element Q1, which is a high-side switch, is input as the second voltage V2.

[0049] By connecting the drive circuit 10 in this manner, even if the potential of the first high-voltage element Q1 (second voltage V2) changes rapidly, the bootstrap voltage VBS appropriately controls the first voltage V1, thereby reducing the effect of displacement current on the transistors forming each inverter within the drive circuit 10.

[0050] By setting the first voltage V1 as the bootstrap voltage VBS and the second voltage V2 as the source voltage, even when, for example, the second high-voltage element Q2 transitions from on to off, and then the first high-voltage element Q1 transitions from off to on, applying a voltage of approximately 600[V] to an external load, the difference in the power supply voltage of the drive circuit 10 before and after the transition does not fluctuate significantly, and it is possible to maintain a voltage of 15[V], for example, as shown in Figure 1.

[0051] (Third embodiment) In the second embodiment, the case in which a low-side switch is provided was described, but the driver circuit for this low-side switch can also be made into a circuit similar to the drive circuit 10.

[0052] Figure 4 shows an example of a switch equipped with a high-side switch and a low-side switch according to one embodiment.

[0053] A drive circuit 10A for driving the first high-voltage element Q1, which is a high-side switch, and a drive circuit 10B for driving the second high-voltage element Q2, which is a low-side switch, are connected as shown in the figure. The configurations of drive circuits 10A and 10B can be the same. The symbols 'a' attached to the elements constituting drive circuits 10A and 10B indicate that they are elements of the high-side drive circuit 10A, and 'b' indicates that they are elements of the low-side drive circuit 10B.

[0054] The drive circuit 10A is connected as a circuit in the same manner as in the previously described embodiment, with the first voltage connected to a reference voltage which is the bootstrap voltage VBS and the second voltage which is the source voltage of the high-side switch. The first voltage is also connected to the power supply voltage VCC via a diode and a resistor so that the bootstrap voltage VBS is sufficient to drive the switch. By connecting in this manner, the high-side switch block can reduce the effects of displacement current, similar to the previously described embodiment.

[0055] The drive circuit 10B is connected such that the first voltage is the power supply voltage VCC and the second voltage is the source potential of the low-side switch, for example, the ground potential. By appropriately setting the power supply voltage VCC, the drive circuit 10B of the low-side switch can achieve the same operation as the drive circuit 10A of the high-side switch.

[0056] The drive circuits described in each of the embodiments above can be analyzed, for example, by analyzing the circuit pattern on the chip surface, or by means of an optical microscope or an electron microscope.

[0057] The switches described in each of the embodiments above can be applied, for example, to power devices such as inverters in home appliances such as air conditioners and other equipment that require high voltage.

[0058] While several embodiments of the present invention have been described, these embodiments are presented as examples only and are not intended to limit the scope of the invention. These novel embodiments can be carried out in a variety of other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their variations are included in the scope and spirit of the invention, as well as in the claims and their equivalents. [Explanation of symbols]

[0059] 1: Electronic circuit, 2: Switch, 10: Drive circuit, 12: Latch Circuit

Claims

1. A circuit for driving a high-voltage element having voltage resistance performance against a first voltage withstand voltage, A first transistor is a p-type MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) having a voltage withstand capability against the first voltage, with a first voltage applied to its first terminal and its second terminal connected to the drive terminal of the high-voltage element. A second transistor is an n-type MOSFET having a breakdown voltage performance relative to the first breakdown voltage, the first terminal of which is connected to the second terminal of the first transistor, and a second voltage is applied to the second terminal. A drive signal is input from the input terminal, and the first inverter is formed of elements having withstand voltage performance to a second withstand voltage lower than the first withstand voltage, A second inverter is formed of elements having a voltage withstand capability against the second voltage, the input terminal of which is connected to the output terminal of the first inverter, and the output terminal of which is connected to the drive terminal of the first transistor. A third inverter is formed of an element having a voltage withstand capability against the second voltage, and whose input terminal is connected to the input terminal of the first inverter. A third transistor is a p-type MOSFET having a voltage withstand capability against the first voltage, with its first terminal connected to the output terminal of the second inverter, and a third voltage applied to the drive terminal. A fourth transistor is an n-type MOSFET having a voltage withstand capability against the first voltage, with its first terminal connected to the second terminal of the third transistor, and a fourth voltage applied to the drive terminal. A fifth transistor is a p-type MOSFET having a voltage withstand capability against the first voltage, with its first terminal connected to the output terminal of the third inverter, the third voltage applied to the drive terminal, and the fifth transistor having a voltage withstand capability against the first voltage. A sixth transistor is an n-type MOSFET having a voltage withstand capability against the first withstand voltage, with its first terminal connected to the second terminal of the fifth transistor, the fourth voltage applied to the drive terminal, and the sixth transistor being a n-type MOSFET. A fourth inverter is formed of elements having a voltage withstand capability against the second voltage, with its input terminal connected to the second terminal of the sixth transistor and its output terminal connected to the drive terminal of the second transistor. A fifth inverter is formed of elements having a voltage withstand capability against the second voltage, the input terminal of which is connected to the second terminal of the fourth transistor and the output terminal of the fourth inverter, and the output terminal of which is connected to the input terminal of the fourth inverter. Equipped with, The third voltage is a voltage lower than the first voltage, and the potential difference between it and the first voltage is smaller than the second withstand voltage. The fourth voltage is higher than the second voltage and lower than the third voltage, and the potential difference between it and the second voltage is less than the second withstand voltage. Drive circuit.

2. The first inverter, the second inverter, and the third inverter are configured such that a first voltage is applied to the positive electrode and a third voltage is applied to the negative electrode. The fourth inverter and the fifth inverter are configured such that the fourth voltage is applied to the positive electrode and the second voltage is applied to the negative electrode. The drive circuit according to claim 1.

3. The second voltage is the voltage at the output terminal of the high-voltage element. The drive circuit according to claim 2.

4. Each of the first inverter, the second inverter, the third inverter, the fourth inverter, and the fifth inverter is formed using CMOS (Complementary MOSFET), and each of the transistors forming the CMOS is an element having withstand voltage performance against the second withstand voltage. The drive circuit according to claim 3.

5. The aforementioned high-voltage element is a high-side switch. A drive circuit according to any one of claims 1 to 4.

6. A first drive circuit which is a drive circuit according to any one of claims 1 to 4, The first drive circuit drives the high-voltage element, which forms a high-side switch, and the first high-voltage element The second high-voltage element is a low-side switch, An electronic circuit equipped with the following features.

7. The first voltage is the bootstrap voltage. The electronic circuit according to claim 6.

8. A first drive circuit which is a drive circuit according to any one of claims 1 to 4, The first drive circuit drives the high-voltage element, which forms a high-side switch, and the first high-voltage element A second drive circuit which is a drive circuit according to any one of claims 1 to 4, The second drive circuit drives the high-voltage element, which forms a low-side switch, and the second high-voltage element An electronic circuit equipped with the following features.

9. The first voltage of the first drive circuit is the bootstrap voltage. The electronic circuit according to claim 8.

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