Indication device

Abstract

To provide a semiconductor device with high reliability, to manufacture the semiconductor device, to manufacture the semiconductor device with high yield, and to improve productivity.SOLUTION: In a semiconductor device having a transistor in which a gate electrode layer, a gate insulation film, and an oxide semiconductor film are laminated in this order, and a source electrode layer and a drain electrode layer in contact with the oxide semiconductor film is provided, a step of eliminating residue matter resultant of an etching step existing on the gate electrode layer or an oxide semiconductor film surface and in its vicinity after forming the gate electrode layer or the source electrode layer and a drain electrode layer by the etching step.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to a semiconductor device and a method for manufacturing the semiconductor device.

[0002] In this specification, a semiconductor device generally refers to a device that can function by utilizing semiconductor characteristics. In general, electro-optical devices, semiconductor circuits, and electronic devices are all semiconductor devices.

Background Art

[0003] Techniques for forming transistors (also referred to as thin film transistors (TFTs)) using semiconductor thin films formed on substrates having insulating surfaces have attracted attention. Such transistors are widely applied to electronic devices such as integrated circuits (ICs) and image display devices (display devices). Although silicon-based semiconductor materials are widely known as semiconductor thin films applicable to transistors, oxide semiconductors have attracted attention as other materials. For example, transistors using a semiconductor layer made of an amorphous oxide containing indium (In), gallium (Ga), and zinc (Zn) (In-Ga-Zn-O-based amorphous oxide) have been disclosed (see Patent Document 1).

[0004]

[0005]

Prior Art Documents

Patent Documents

[0005]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0006] By the way, in a semiconductor device having a transistor using an oxide semiconductor, high reliability... Achieving this is crucial for commercialization.

[0007] However, semiconductor devices are composed of multiple thin films with complex structures, and a wide variety of materials, methods, and It is manufactured in the process. Therefore, the resulting semiconductor device may have shape defects or electrical defects due to the manufacturing process. There is a risk of degradation in performance.

[0008] In light of these problems, a highly reliable semiconductor having a transistor made of oxide semiconductor. One of the objectives is to provide a device.

[0009] Furthermore, the challenge is to manufacture highly reliable semiconductor devices with a high yield and improve productivity. Let it be one. [Means for solving the problem]

[0010] In a semiconductor device having an inverse staggered transistor with a bottom gate structure, the metal layer (gate Residue from the etching process that forms the electrode layer, or source electrode layer and drain electrode layer This further prevents contamination of the oxide semiconductor film or the surface and vicinity of the gate electrode layer.

[0011] Etching to form a gate electrode layer, or a metal layer such as a source electrode layer and a drain electrode layer. In the process, an etching agent (etchant) is applied to the surface of the metal layer or the surface of the oxide semiconductor film and its vicinity. Residue is generated by the etching gas or etching solution. Such residue is This can lead to a decrease in the voltage resistance of the gate insulating film and a decline in the electrical characteristics of the transistor, such as leakage current. This can lead to fluctuations.

[0012] The residue includes the etching material (etching gas or etching solution) and the metal layer being processed. The etching material contains elements contained in the oxide semiconductor film exposed to the etching material, and compounds of said elements. For example, a metal layer such as a gate electrode layer, or a source electrode layer and a drain electrode layer can be formed. In the etching process, a halogen-containing gas is preferably used, but in this case, the residue is These become logenoid impurities (halogens or halides).

[0013] Residues may include, for example, chlorine, fluorine, boron, phosphorus, aluminum, iron, or carbon. These are some examples. In addition, the residue may contain metal elements (for example, i) found in the oxide semiconductor film. It may contain elements such as galvium, gallium, or zinc.

[0014] One embodiment of the invention disclosed herein involves forming a source electrode layer and a drain electrode layer, Located between the source electrode layer and the drain electrode layer on the surface of the oxide semiconductor film and in its vicinity. A process to remove residue (residue removal process) is performed.

[0015] Another embodiment of the configuration of the invention disclosed herein is a gate electrode layer formed on the surface of the gate electrode layer. A process to remove any residue present on the surface (residue removal process) is performed.

[0016] The above residue removal process involves treatment with water or an alkaline solution, or plasma treatment. This can be done by using water or TMAH (Tetra Methyl Treatment with an ammonium hydroxide solution, or oxygen, nitrous oxide, Alternatively, plasma treatment using a noble gas (typically argon) can be suitably employed. Alternatively, treatment using dilute hydrofluoric acid (hydrofluoric acid) may be performed.

[0017] It is possible to prevent the surface of the oxide semiconductor film or the gate electrode layer and the vicinity thereof from being contaminated by residues Therefore, a semiconductor device having an inverted staggered transistor with a bottom gate structure has a surface density of residues (typically, halogen (e.g., chlorine, fluorine), boron, phosphorus, aluminum, iron, or carbon) on the surface of the oxide semiconductor film (or gate electrode layer) of 1 × 10 atoms / cm or less (preferably 1 × 10 13 atoms / cm or less). Also, the concentration of residues (typically, halogen (e.g., chlorine, fluorine), boron, phosphorus, aluminum, iron, or carbon) on the surface of the oxide semiconductor film (or gate electrode layer) can be 5 × 10 2 atoms / cm 12 or less (preferably 1 × 10 2 atoms / cm or less). 10 18 atoms / cm 3 18 3 atoms / cm 13 2 Thus, it is possible to provide a highly reliable semiconductor device including a transistor having stable electrical characteristics using an oxide semiconductor film. Also, a highly reliable semiconductor device can be manufactured with a high yield, improving productivity.

[0018] One form of the configuration of the invention disclosed in this specification has a gate electrode layer on an insulating surface, a gate insulating film on the gate electrode layer, an oxide semiconductor film on the gate insulating film, a source electrode layer and a drain electrode layer on the oxide semiconductor film, and is in contact with a region overlapping the gate electrode layer of the oxide semiconductor film, and has an insulating film covering the source electrode layer and the drain electrode layer. The surface density of halogen on the surface of the oxide semiconductor film in contact with the insulating film is 1 × 10 <00002 of the oxide semiconductor film. 04>

[0019] atoms / cm atoms / cm 13 atoms / cm 2The following semiconductor devices It is placed there.

[0020] One embodiment of the invention disclosed herein is a gate electrode layer on an insulating surface, and a gate electrode layer A gate insulating film is placed on top, an oxide semiconductor film is placed on the gate insulating film, and a source electrode is placed on the oxide semiconductor film. The polar layer and drain electrode layer are in contact with the region where they overlap with the gate electrode layer of the oxide semiconductor film, and It has a source electrode layer and an insulating film covering the drain electrode layer, and a halogen on the surface of the gate electrode layer The surface density is 1 × 10⁻⁶ 13 atoms / cm 2 The following is a semiconductor device.

[0021] One embodiment of the invention disclosed herein is a gate electrode layer on an insulating surface, and a gate electrode layer A gate insulating film is placed on top, an oxide semiconductor film is placed on the gate insulating film, and a source electrode is placed on the oxide semiconductor film. The polar layer and drain electrode layer are in contact with the region where they overlap with the gate electrode layer of the oxide semiconductor film, and It has an insulating film covering a source electrode layer and a drain electrode layer, and provides insulation in an oxide semiconductor film. The surface density of halogens on the surface in contact with the film is 1 × 10⁻⁶ 13 atoms / cm 2 The gate The surface density of halogen on the electrode layer surface is 1 × 10⁻⁶ 13 atoms / cm 2 The following is a Tze That is the case.

[0022] One embodiment of the invention disclosed herein involves forming a gate electrode layer on an insulating surface, and gate A gate insulating film is formed on the electrode layer, and an oxide semiconductor film is formed on the gate insulating film, and an oxide semiconductor film is formed. A conductive film is formed on a conductive film, and the conductive film is etched with a halogen-containing gas. A semiconductor that forms a source electrode layer and a drain electrode layer and performs a residue removal process on an oxide semiconductor film. This is a method for manufacturing a body device.

[0023] One embodiment of the invention disclosed herein involves forming a conductive film on an insulating surface, and then, The gate electrode layer is formed by etching with a gas containing rogen, and the residue remains in the gate electrode layer. A residue removal process is performed, and a gate insulating film is formed on the gate electrode layer from which the residue removal process has been performed. An oxide semiconductor film is formed on the gate insulating film, and a source electrode layer and drain are formed on the oxide semiconductor film. This is a method for fabricating a semiconductor device that forms an electrode layer.

[0024] One embodiment of the invention disclosed herein involves forming a first conductive film on an insulating surface, and the first A gate electrode layer is formed by etching the conductive film with a halogen-containing gas. A residue removal process is performed on the electrode layer, and a gate insulation is applied to the gate electrode layer from which the residue removal process has been performed. A film is formed, an oxide semiconductor film is formed on the gate insulating film, and a second conductive film is formed on the oxide semiconductor film. A film is formed, and the second conductive film is etched with a halogen-containing gas to create the source electrical A semiconductor device that forms polar layers and drain electrode layers and performs a residue removal process on an oxide semiconductor film. This is the manufacturing method.

[0025] One embodiment of the present invention is a semiconductor having a transistor or a circuit comprising a transistor. This relates to a device. For example, a transistor in which a channel formation region is formed in an oxide semiconductor. The present invention relates to a semiconductor device having a circuit that includes a transistor. For example, an LSI. Also, CPUs, power devices mounted in power supply circuits, memory, thyristors, converters Semiconductor integrated circuits including image sensors, and electro-optical devices such as liquid crystal display panels. This relates to electronic equipment that incorporates a light-emitting display device, which has a light-emitting element or light-emitting element, as a component. [Effects of the Invention]

[0026] The present invention provides a highly reliable semiconductor device having a transistor made of an oxide semiconductor.

[0027] Furthermore, it enables the high-yield manufacturing of highly reliable semiconductor devices, thereby improving productivity. [Brief explanation of the drawing]

[0028] [Figure 1] A cross-sectional view illustrating one form of a semiconductor device and a method for manufacturing such a semiconductor device. [Figure 2] A cross-sectional view illustrating one form of a semiconductor device and a method for manufacturing such a semiconductor device. [Figure 3] A cross-sectional view illustrating one form of a semiconductor device and a method for manufacturing such a semiconductor device. [Figure 4] A plan view illustrating one form of a semiconductor device. [Figure 5] Plan view and cross-sectional view illustrating one form of a semiconductor device. [Figure 6] A cross-sectional view showing one form of a semiconductor device. [Figure 7] Circuit diagram and cross-sectional view showing one form of a semiconductor device. [Figure 8] A diagram showing electronic equipment. [Figure 9] A diagram showing electronic equipment. [Modes for carrying out the invention]

[0029] Hereinafter, embodiments of the invention disclosed herein will be described in detail with reference to the drawings. However, the inventions disclosed herein are not limited to the following description, and their forms and details may vary. It will be readily apparent to those skilled in the art that this can be changed. This shall not be interpreted as being limited to the descriptions of the embodiments shown below. The ordinal number 2 is used for convenience only and does not indicate the order of processes or stacking. Furthermore, in this specification, a specific name is not used to identify the invention. do not have.

[0030] (Embodiment 1) In this embodiment, one form of a semiconductor device and a method for manufacturing a semiconductor device will be explained using Figure 1. In this embodiment, a transistor having an oxide semiconductor film is used as an example of a semiconductor device. This shows a semiconductor device that includes this component.

[0031] Even in a single-gate transistor structure where one channel formation region is formed, or where two are formed... It may be a double-gate structure or a triple-gate structure with three gates formed. It has two gate electrode layers arranged above and below the channel formation region, separated by a gate insulating film. A dual-gate type would also be acceptable.

[0032] The transistor 440 shown in Figure 1(E) is a bottom-gate structure and is an inverse staggered transistor. This is an example of a transistor, also called a transistor. Figure 1 shows the channel of transistor 440. This is a cross-sectional view along the length of the flannel.

[0033] As shown in Figure 1(E), the semiconductor device including transistor 440 has a base having an insulating surface On the plate 400, there is a gate electrode layer 401, a gate insulating film 402, an oxide semiconductor film 403, and a saw It has a drain electrode layer 405a and a drain electrode layer 405b. It also covers the transistor 440. An insulating film 407 is provided.

[0034] The oxide semiconductor used in the oxide semiconductor film 403 is at least indium (In). It contains, and is particularly preferably in which it contains In and zinc (Zn). Furthermore, using the oxide semiconductor film As a stabilizer to reduce variations in the electrical characteristics of transistors, in addition to those, It is preferable to have gallium (Ga). Also, tin (Sn) as a stabilizer. It is preferable to have hafnium (Hf) as a stabilizer. This is preferable. It is also preferable to have aluminum (Al) as a stabilizer. Furthermore, it is preferable to have zirconium (Zr) as a stabilizer.

[0035] Also, other stabilizers include lanthanides such as lanthanum (La) and cerium ( Ce, praseodymium (Pr), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), hol Mium (Ho), Erbium (Er), Thulium (Tm), Ytterbium (Yb), Lu It may contain one or more types of tecium (Lu).

[0036] For example, oxide semiconductors include indium oxide, tin oxide, zinc oxide, and In-Zn-based oxides. Materials, In-Mg oxides, In-Ga oxides, In-Ga-Zn oxides (IGZO and (Also written as), In-Al-Zn oxide, In-Sn-Zn oxide, In-Hf-Z n-based oxides, In-La-Zn oxides, In-Ce-Zn oxides, In-Pr-Zn oxides In-Nd-Zn oxides, In-Sm-Zn oxides, In-Eu-Zn oxides Oxides, In-Gd-Zn oxides, In-Tb-Zn oxides, In-Dy-Zn acids In-Ho-Zn oxides, In-Er-Zn oxides, In-Tm-Zn oxides Materials, In-Yb-Zn oxides, In-Lu-Zn ​​oxides, In-Sn-Ga-Zn oxides Oxides, In-Hf-Ga-Zn oxides, In-Al-Ga-Zn oxides, In-S n-Al-Zn oxides, In-Sn-Hf-Zn oxides, In-Hf-Al-Zn Oxides can be used.

[0037] For example, an In-Ga-Zn oxide is a material whose main components are In, Ga, and Zn. This means an oxide containing In, Ga, and Zn, and the ratio of In, Ga, and Zn is not specified. It is also acceptable for metal elements other than a and Zn to be present.

[0038] In addition, as an oxide semiconductor, InMO3(ZnO) m (m > 0, and m is not an integer) Materials represented by may also be used. Note that M is selected from Ga, Fe, Mn, and Co. It represents one or more metallic elements. Also, as an oxide semiconductor, In2SnO5 (ZnO) n Materials expressed as (n>0 and n is an integer) may also be used.

[0039] For example, In:Ga:Zn = 1:1:1 (= 1 / 3:1 / 3:1 / 3), In:Ga:Z n=2:2:1 (=2 / 5:2 / 5:1 / 5), or In:Ga:Zn=3:1:2 In-Ga-Zn oxides and their compositions with an atomic ratio of (=1 / 2:1 / 6:1 / 3) The oxide can be used. Alternatively, In:Sn:Zn=1:1:1 (=1 / 3: 1 / 3:1 / 3), In:Sn:Zn=2:1:3 (=1 / 3:1 / 6:1 / 2) or In-Sn has an atomic ratio of In:Sn:Zn = 2:1:5 (= 1 / 4:1 / 8:5 / 8). -Zn-based oxides or oxides with a similar composition are preferable.

[0040] However, indium-containing oxide semiconductors are not limited to these, and the required electrical properties (transition) A suitable composition should be used depending on the degree of motion, threshold, variability, etc. Also, if necessary To obtain the desired electrical properties, the carrier concentration, impurity concentration, defect density, and the origin of metal elements and oxygen are controlled. It is preferable to set appropriate atom ratios, interatomic distances, densities, etc.

[0041] For example, high mobility can be obtained relatively easily with In-Sn-Zn oxides. However, Furthermore, even with In-Ga-Zn oxides, mobility can be increased by lowering the bulk defect density. It is possible to do so.

[0042] For example, if the atomic ratio of In, Ga, and Zn is In:Ga:Zn=a:b:c(a+b+ The composition of an oxide with c=1 is such that the atomic ratio is In:Ga:Zn=A:B:C(A+B+C The composition of the oxide in the vicinity of (aA) = 1) means that a, b, and c are in the vicinity of (aA) 2 +(bB) 2 + (cC) 2 ≤r 2 This means satisfying the following condition. For example, r can be set to 0.05. The same applies to other oxides.

[0043] The oxide semiconductor film 403 is single crystal, polycrystalline (also called polycrystal), or amorphous. Which state will it take?

[0044] Preferably, the oxide semiconductor film 403 is CAAC-OS (C Axis Aligned The film is made of crystalline oxide semiconductor material.

[0045] CAAC-OS films are neither perfectly single crystals nor perfectly amorphous. This is an oxide semiconductor film having a crystalline-amorphous multiphase structure with crystalline and amorphous parts in an amorphous phase. Furthermore, the crystalline portion must be small enough to fit within a cube with sides of less than 100 nm. There are many. Transmission electron microscope (TEM) In the image observed using a microscope, the amorphous and crystalline parts contained in the CAAC-OS film are The boundaries are not always clear. Also, TEM reveals grain boundaries in the CAAC-OS film. Also called inboundary. ) cannot be confirmed. Therefore, the CAAC-OS film has grain boundaries. The resulting decrease in electron mobility is suppressed.

[0046] The crystalline portion contained in the CAAC-OS film has a c-axis that is the normal vector to the surface on which the CAAC-OS film is formed. Aligned in a direction parallel to the normal vector of the plane or surface, and triangular when viewed from a direction perpendicular to the ab plane. Having a shape or hexagonal atomic arrangement, the metal atoms are layered or when viewed from a direction perpendicular to the c-axis. Metal atoms and oxygen atoms are arranged in layers. Furthermore, the a-axis and between different crystalline regions are as follows: The orientation of the b-axis may be different. In this specification, when it is simply described as vertical, 85 The range of ° to 95° is also included. Furthermore, when simply described as parallel, -5° is used. The range of 5° or less is also included. It may be replaced with nitrogen.

[0047] Furthermore, the distribution of crystalline regions in the CAAC-OS film does not need to be uniform. For example, CAA In the formation process of a C-OS film, when crystal growth is performed from the surface side of the oxide semiconductor film, the shape The proportion of crystalline material may be higher near the surface compared to near the surface of the material. Also, CA By adding impurities to the AC-OS film, the crystalline region in the impurity-added area becomes amorphous. It can also become qualitative.

[0048] The c-axis of the crystalline portion contained in the CAAC-OS film is the normal vector to the surface on which the CAAC-OS film is formed. Because it aligns in a direction parallel to the normal vector of the surface or the material, the shape of the CAAC-OS film (formed Depending on the cross-sectional shape of the surface or face, they may face in different directions. Oh, the direction of the c-axis of the crystalline portion is the normal vector to the surface on which the CAAC-OS film was formed. The direction is parallel to the normal vector of the crystalline or surface. The crystalline portion is formed by deposition, and It is formed by performing crystallization treatments such as heat treatment after film formation.

[0049] Transistors using CAAC-OS film exhibit changes in electrical properties due to irradiation with visible light and ultraviolet light. Its value is small. Therefore, this transistor is highly reliable.

[0050] Furthermore, some of the oxygen constituting the oxide semiconductor film may be replaced with nitrogen.

[0051] Furthermore, in oxide semiconductors with crystalline regions, such as CAAC-OS films, bulk defects are more easily eliminated. It can be reduced, and by improving surface flatness, it can achieve mobility higher than that of amorphous oxide semiconductors. It can be obtained. To improve surface flatness, an oxide semiconductor is formed on a flat surface. Preferably, the average surface roughness (Ra) is 1 nm or less, preferably 0.3 It is preferable to form it on a surface with a wavelength of 0.1 nm or less, more preferably 0.1 nm or less.

[0052] Note that Ra is defined in JIS B601:2001 (ISO4287:1997) This is an extension of the arithmetic mean roughness that can be applied to curved surfaces in three dimensions, and is called a "reference surface." It can be expressed as "the average of the absolute values ​​of the deviations from the specified surface," and is defined by the following formula.

[0053]

number

[0054] Here, the specified surface is the surface to be measured for roughness, and the coordinates are ((x1, y1, f(x1, y1))(x1,y2,f(x1,y2))(x2,y1,f(x2,y1))(x2, Let the region be a quadrilateral represented by the four points y², f(x², y²), and project the specified plane onto the xy-plane. Let S0 be the area of ​​the rectangle, and Z0 be the height of the reference plane (average height of the specified plane). Ra is the original Measurement is possible using an atomic force microscope (AFM). It is Noh.

[0055] Furthermore, the reference plane is the plane parallel to the XY plane at the average height of the specified plane. When the average height of a fixed surface is denoted as Z0, the height of the reference surface can also be represented by Z0.

[0056] However, since the transistor 440 described in this embodiment is a bottom gate type, acid Below the semiconductor film, there is a substrate 400, a gate electrode layer 401, and a gate insulating film 402. Therefore, in order to obtain the above flat surface, the gate electrode layer 401 and the gate insulating film 40 After forming step 2, chemical mechanical polishing (CMP) is performed. Planarization processes such as polishing may be performed.

[0057] The thickness of the oxide semiconductor film 403 is 1 nm to 30 nm (preferably 5 nm to 10 nm). (m or less), sputtering method, MBE (Molecular Beam Epitaph) xy) method, CVD method, pulsed laser deposition method, ALD (Atomic Layer Deposition) The spar method and other methods can be used as appropriate. In addition, the oxide semiconductor film 403 is spa Film deposition is carried out with multiple substrate surfaces set approximately perpendicular to the surface of the tarring target. The film may also be deposited using a sputtering apparatus.

[0058] Figures 1(A) to (E) show an example of a method for fabricating a semiconductor device having a transistor 440. .

[0059] There are no major restrictions on the substrates that can be used for the substrate 400 having an insulating surface, however In both cases, it is necessary to have sufficient heat resistance to withstand subsequent heat treatment. For example, burrs Glass substrates such as umborosilicate glass and aluminoborosilicate glass, ceramic substrates, Quartz substrates, sapphire substrates, etc. can be used. Also, silicon and silicon carbide can be used. Which single-crystal semiconductor substrates, polycrystalline semiconductor substrates, and compound semiconductor groups such as silicon germanium Boards, SOI substrates, etc., can also be used, and semiconductor elements are provided on these substrates. This may be used as substrate 400.

[0060] Furthermore, a flexible substrate may be used as the substrate 400 to fabricate a semiconductor device. To fabricate such a semiconductor device, a transistor containing an oxide semiconductor film 403 is placed on a flexible substrate. The 440 may be fabricated directly, or a transient containing the oxide semiconductor film 403 may be fabricated on another fabricated substrate. The sta440 can be fabricated, then peeled off and transferred to a flexible substrate. Transistor 440 containing the fabricated substrate and oxide semiconductor film for peeling and transferring onto a flexible substrate. It is preferable to provide a release layer between them.

[0061] An insulating film may be provided on the substrate 400 as an underlayer. The insulating film can be prepared using plasma CVD. Alternatively, by sputtering or other methods, silicon oxide, silicon oxide nitride, aluminum oxide, Oxide insulating films such as aluminum oxide nitride, hafnium oxide, and gallium oxide, silica nitride silicon nitride, aluminum nitride, aluminum nitride, and other nitride dielectric films, Alternatively, these can be formed using a mixture of materials.

[0062] The substrate 400 (or the substrate 400 and the insulating film) may be subjected to heat treatment. For example, high-temperature gas GRTA (Gas Rapid Thermal Annealing) is a heat treatment process that uses gas. l) The device should be used to perform a heat treatment at 650°C for 1 to 5 minutes. The high-temperature gases used include noble gases such as argon, or nitrogen, which are affected by heat treatment. An inert gas that does not react with the material being processed is used. Furthermore, the process is carried out in an electric furnace at 500°C for 30 minutes. You may heat-treat it for one hour.

[0063] Next, a conductive film is formed on the substrate 400, and the conductive film is etched to form a gate electrode layer 4 Form 01. Etching of the conductive film can be done by dry etching or wet etching. Often, both can be used.

[0064] The materials for the gate electrode layer 401 are molybdenum, titanium, tantalum, tungsten, and aluminum. Metal materials such as um, copper, chromium, neodymium, scandium, or compounds mainly composed of these materials. It can be formed using gold material. Furthermore, impurities such as phosphorus can be used as the gate electrode layer 401. Semiconductor films, such as polycrystalline silicon films doped with elements, and nickel silicides. A silicide film may also be used. The gate electrode layer 401 may be a single layer or a multilayer structure. It can also be used as a structure.

[0065] Furthermore, the material of the gate electrode layer 401 is indium oxide containing tungsten oxide, and tungsten oxide. Indium oxide containing tan, indium tin oxide, indium tin oxide containing titanium oxide Oxides, silicon dioxide-added indium tin oxide, indium zinc oxide, tan oxide Conductive materials such as indium zinc oxide containing gusten can also be applied. Alternatively, a laminated structure of the above-mentioned conductive material and the above-mentioned metal material can be used.

[0066] Furthermore, the gate electrode layer 401 in contact with the gate insulating film 402 is a metal oxide containing nitrogen, Specifically, nitrogen-containing In-Ga-Zn oxide films and nitrogen-containing In-Sn oxide films. Films, nitrogen-containing In-Ga oxide films, nitrogen-containing In-Zn oxide films, and nitrogen This includes tin oxide films, indium oxide films containing nitrogen, and metal nitride films (such as InN and SnN). These films can be used with 5 eV (electron volts), preferably 5.5 eV ( It has a work function of more than (electron volts), and when used as a gate electrode layer, the electrons of the transistor The threshold voltage of the air characteristics can be made positive.

[0067] In this embodiment, a tungsten film with a thickness of 100 nm is formed by sputtering. .

[0068] Furthermore, after the gate electrode layer 401 is formed, the substrate 400 and the gate electrode layer 401 are subjected to heat treatment. It is permissible to do so. For example, heat treatment can be performed at 650°C for 1 to 5 minutes using a GRTA apparatus. Alternatively, the product may be heat-treated in an electric furnace at 500°C for 30 minutes to 1 hour.

[0069] Next, a gate insulating film 402 is formed on the gate electrode layer 401.

[0070] Furthermore, in order to improve the coverage of the gate insulating film 402, the surface of the gate electrode layer 401 is flat Chemical treatment may be performed. In particular, when a thin insulating film is used as the gate insulating film 402, It is preferable that the surface of the gate electrode layer 401 has good flatness.

[0071] The thickness of the gate insulating film 402 shall be between 1 nm and 20 nm, and the method of sputtering or MBE shall be used. Methods such as CVD, pulsed laser deposition, and ALD can be used as appropriate. The insulating film 402 has multiple substrate surfaces arranged approximately perpendicular to the sputtering target surface. The film may also be deposited using a sputtering apparatus that performs film deposition while the film is in its assembled state.

[0072] The materials for the gate insulating film 402 include silicon oxide film, gallium oxide film, and aluminum oxide. Aluminum film, silicon nitride film, silicon oxide nitride film, aluminum oxide nitride film, or silicon nitride oxide film It can be formed using a silicon film.

[0073] Furthermore, the gate insulating film 402 is made of hafnium oxide, yttrium oxide, and hafnium. Silicate (HfSi x O y (x>0, y>0), nitrogen-added hafnium silicate (HfSiO x N y (x>0, y>0), hafnium aluminate (HfAl x O y (x>0, y>0), by using high-k materials such as lanthanum oxide, gate The gate current can be reduced. Furthermore, the gate insulating film 402 may be a single layer structure or a multilayer structure. It's also well-structured.

[0074] The gate insulating film 402 preferably contains oxygen in the portion that is in contact with the oxide semiconductor film 403. In particular, the gate insulating film 402 has at least a stoichiometric composition in the film (bulk). It is preferable that an amount of oxygen exceeding the content in the gate insulating film 402 is present, for example. When using a silicon oxide film, SiO 2+α (However, assume α > 0.)

[0075] A gate insulating film 402 containing a large amount (excess) of oxygen serves as an oxygen source, and the oxide semiconductor film 4 By providing it in contact with 03, acid is transferred from the gate insulating film 402 to the oxide semiconductor film 403. It can supply the elements. The oxide semiconductor film 403 and the gate insulating film 402 are at least By performing heat treatment while partially in contact, oxygen is supplied to the oxide semiconductor film 403. You may go.

[0076] By supplying oxygen to the oxide semiconductor film 403, oxygen deficiencies in the film can be compensated for. Furthermore, the gate insulating film 402 is determined by the size of the transistor being fabricated and the gate insulating film 4 It is preferable to form it considering the step coverage of 02.

[0077] In this embodiment, a silicon oxide nitride film with a thickness of 200 nm is produced by high-density plasma CVD. It forms.

[0078] Furthermore, after the gate insulating film 402 is formed, the substrate 400, gate electrode layer 401, and gate insulating film are formed. The film 402 may be subjected to heat treatment. For example, using a GRTA apparatus, at 650°C for 1 to 5 minutes. Heat treatment should be performed for 30 minutes. Alternatively, heat treatment can be performed in an electric furnace at 500°C for 30 minutes to 1 hour. It is permissible to act rationally.

[0079] Next, an oxide semiconductor film 403 is formed on the gate insulating film 402 (see Figure 1(A)).

[0080] In the process of forming the oxide semiconductor film 403, hydrogen or water is added to the oxide semiconductor film 403. To minimize the presence of certain substances, a pretreatment is performed on the oxide semiconductor film 403 before deposition. The substrate on which the gate insulating film 402 has been formed is preheated in the preheating chamber of the taring device, and the substrate and It is preferable to desorb and exhaust impurities such as hydrogen and moisture adsorbed on the gate insulating film 402. Furthermore, a cryopump is preferred as the exhaust means to be installed in the preheating chamber.

[0081] In the region where the oxide semiconductor film 403 is in contact with the gate insulating film 402, a planarization treatment is applied. The planarization treatment may be performed. The planarization treatment is not particularly limited, but includes polishing treatment (e.g., CM). P treatment, dry etching, and plasma treatment can be used.

[0082] Plasma processing can be performed, for example, by introducing argon gas to generate plasma. Sputtering can be performed. Reverse sputtering is a process where RF is applied to the substrate side under an argon atmosphere. This method involves applying a voltage using a power supply to form plasma near the substrate and modify its surface. Note that nitrogen, helium, oxygen, etc. may be used instead of an argon atmosphere. (Reverse sputtering) When this is done, powdery material (particles, dust) adhering to the surface of the gate insulating film 402 is removed. It can remove (also known as).

[0083] For planarization, polishing, dry etching, and plasma treatment can be performed multiple times. Furthermore, these can be combined. Also, when combining them, the order of the steps is not particularly limited. It is not fixed and should be set appropriately according to the uneven surface condition of the gate insulating film 402.

[0084] Furthermore, the oxide semiconductor film 403 is formed under conditions where a large amount of oxygen is present during film formation (for example, oxygen The film is deposited by sputtering in a 100% atmosphere, and the oxygen content is high. Contains (preferably the oxygen content relative to the stoichiometric composition of the oxide semiconductor in the crystalline state) It is preferable to use a film that contains an excess of [the substance].

[0085] In this embodiment, the oxide semiconductor film 403 is a spa having an AC power supply. Using a sputtering method with a tarping device, an In-Ga-Zn based acid film with a thickness of 35 nm was produced. A zinc oxide film (IGZO film) is formed. In this embodiment, In:Ga:Zn=1:1: Using an In-Ga-Zn oxide target with an atomic ratio of 1 (=1 / 3:1 / 3:1 / 3) The film deposition conditions were under an oxygen and argon atmosphere (oxygen flow rate ratio 50%) and a pressure of 0.6 The parameters are Pa, power supply 5kW, and substrate temperature 170°C. The deposition rate under these deposition conditions is 16n It is m / min.

[0086] The sputtering gas used when depositing the oxide semiconductor film 403 is hydrogen, water, hydroxyl group or It is preferable to use a high-purity gas from which impurities such as hydrides have been removed.

[0087] The substrate is held in a deposition chamber under reduced pressure. Then, any residual moisture in the deposition chamber is removed. Sputtering gas from which hydrogen and water have been removed is introduced, and the above target is used to... An oxide semiconductor film 403 is deposited on the plate 400. To remove residual moisture in the deposition chamber, Adsorption-type vacuum pumps, such as cryopumps, ion pumps, and titanium sublimation pumps. It is preferable to use a turbomolecular pump as the exhaust means. A dotrap may also be added. The deposition chamber, which is evacuated using a cryopump, is, for example, For example, hydrogen atoms, water (H2O), and other compounds containing hydrogen atoms (more preferably containing carbon atoms). Since compounds such as [unclear] are exhausted, they are contained in the oxide semiconductor film 403 deposited in the deposition chamber. The concentration of impurities can be reduced.

[0088] Furthermore, without exposing the gate insulating film 402 to the atmosphere, the gate insulating film 402 and the oxide semiconductor film 40 It is preferable to form 3 continuously. The gate insulating film 402 is formed without exposing it to the atmosphere. When the edge film 402 and the oxide semiconductor film 403 are formed in succession, water is formed on the surface of the gate insulating film 402. It can prevent the adsorption of impurities such as minerals and water.

[0089] The oxide semiconductor film 403 is formed by a photolithography process into island-like structures. It can be formed by processing an oxide semiconductor film.

[0090] Furthermore, a resist mask for forming island-shaped oxide semiconductor films 403 is prepared by an inkjet method. It may also be formed by an inkjet method. If the resist mask is formed by an inkjet method, a photomask is used. Therefore, manufacturing costs can be reduced.

[0091] Note that etching of oxide semiconductor films can be done by either dry etching or wet etching. Both may be used. For example, the etching of oxide semiconductor films. As a quenching solution, a solution of phosphoric acid, acetic acid, and nitric acid can be used. O-07N (manufactured by Kanto Chemical Co., Ltd.) may also be used. In addition, ICP (Inductively Coupled Plasma (Inductively Coupled Plasma) Etching Method: Dry Etching Etching may also be performed by etching.

[0092] Furthermore, excess hydrogen (including water and hydroxyl groups) is removed from the oxide semiconductor film 403 (dehydration or Heat treatment may be performed to dehydrogenate the product. The heat treatment temperature should be 300°C or higher and 700°C or higher. The temperature should be below °C or below the substrate's strain point. Heat treatment should be performed under reduced pressure or in a nitrogen atmosphere. It is possible.

[0093] Furthermore, when a crystalline oxide semiconductor film is used as the oxide semiconductor film 403, for crystallization Heat treatment may be performed.

[0094] In this embodiment, a substrate is introduced into an electric furnace, which is one of the heat treatment devices, and an oxide semiconductor film 4 For 03, 1 hour under a nitrogen atmosphere at 450°C, and further under an atmosphere containing nitrogen and oxygen. Heat treatment is performed at 450°C for 1 hour.

[0095] Furthermore, the heat treatment device is not limited to electric furnaces, but also includes heat conduction or heat from heat-generating elements such as resistance heating elements. A device that heats the object to be processed by radiation may also be used. For example, a GRTA device or an LRT. A (Lamp Rapid Thermal Anneal) devices and other RTA (Rapid) equipment A Thermal Anneal (LTA) device can be used. The LRTA device is a halo Gen lamps, metal halide lamps, xenon arc lamps, carbon arc lamps, high Due to the radiation of light (electromagnetic waves) emitted from lamps such as sodium lamps and high-pressure mercury lamps It is a device that heats the object to be processed. The GRTA device performs heat treatment using high-temperature gas. It is a device. The high-temperature gas is a noble gas such as argon, or a gas like nitrogen, which is used in the heat treatment. Therefore, an inert gas that does not react with the material being processed is used.

[0096] For example, as a heat treatment, the substrate is placed in an inert gas heated to a high temperature of 650°C to 700°C. Alternatively, after heating for several minutes, a GRTA (Ground Removal and Exposure) may be performed to remove the substrate from the inert gas.

[0097] In addition, during the heat treatment, water is added to nitrogen or a noble gas such as helium, neon, or argon. It is preferable that it does not contain hydrogen, etc. Alternatively, nitrogen or helium introduced into the heat treatment apparatus. The purity of noble gases such as lium, neon, and argon is preferably 6N (99.9999%) or higher. This is 7N (99.99999%) or higher (i.e., impurity concentration of 1 ppm or less, preferably 0.1 ppm). It is preferable that the amount be less than or equal to ppm.

[0098] Furthermore, after heating the oxide semiconductor film 403 in the heat treatment, high-purity oxygen gas is placed in the same furnace. Dinitrate gas or ultra-dry air (CRDS (cavity ring down laser) The moisture content measured using a light-based dew point meter was 20 ppm (equivalent to a dew point of -55°C). The following may be introduced: preferably air at a concentration of 1 ppm or less, more preferably 10 ppb or less. It is preferable that the oxygen gas or nitrous oxide gas does not contain water, hydrogen, etc. Alternatively, the purity of the oxygen gas or nitrous oxide gas introduced into the heat treatment apparatus should preferably be 6N or higher. The concentration is 7N or higher (i.e., the impurity concentration in oxygen gas or nitrous oxide gas is 1 ppm or less). Preferably, the concentration is 0.1 ppm or less. Through this process, impurities are simultaneously reduced by the dehydration or dehydrogenation treatment. By supplying oxygen, which is the main component material that makes up the oxide semiconductor, The semiconductor film 403 can be made highly pure and type I (intrinsic).

[0099] The timing for heat treatment for dehydration or dehydrogenation depends on the film-like oxide semiconductor film. This can be done after the formation of the island-shaped oxide semiconductor film 403, or after the formation of the island-shaped oxide semiconductor film 403.

[0100] Furthermore, the heat treatment for dehydration or dehydrogenation may be carried out multiple times, and may be combined with other heat treatments. You may sleep.

[0101] A heat treatment for dehydration or dehydrogenation is performed to process the oxide semiconductor film 403 into island-like structures. Previously, when the thin oxide semiconductor film covers the gate insulating film 402, the gate insulating film 4 This is preferable because it prevents the release of oxygen contained in 02 through heat treatment. stomach.

[0102] Furthermore, oxygen (at least acid) is added to the oxide semiconductor film 403 that has undergone dehydration or dehydrogenation treatment. By introducing (containing either an elementary radical, an oxygen atom, or an oxygen ion), oxygen is supplied into the membrane. That's fine.

[0103] Furthermore, dehydration or dehydrogenation treatment removes oxygen, which is the main component material constituting oxide semiconductors. There is a risk that oxygen will be simultaneously desorbed and reduced. In oxide semiconductor films, oxygen is desorbed. In the affected area, an oxygen deficiency exists, which causes fluctuations in the transistor's electrical characteristics. This can result in a donor level being created.

[0104] Therefore, oxygen (at least oxygen ions) is added to the oxide semiconductor film that has undergone dehydration or dehydrogenation treatment. It is preferable to supply an oxide (containing either a chlorine, an oxygen atom, or an oxygen ion). By supplying oxygen to the semiconductor film, oxygen deficiencies within the film can be compensated for.

[0105] Oxygen is introduced into the oxide semiconductor film 403 that has undergone dehydration or dehydrogenation treatment. By supplying this material, the oxide semiconductor film 403 is made highly pure and i-type (intrinsic). This is possible. A transistor having a highly purified, i-type (intrinsic) oxide semiconductor film 403. It exhibits suppressed fluctuations in electrical characteristics and is electrically stable.

[0106] Methods for introducing oxygen include ion implantation, ion doping, and plasma immersion. On-plantation methods, plasma treatment, and other similar techniques can be used.

[0107] The oxygen introduction process is performed when introducing oxygen into the oxide semiconductor film 403. It can be introduced directly, or it can be introduced to the oxide semiconductor film 403 by passing through another film such as the insulating film 407. It may be introduced. When introducing oxygen through another membrane, ion implantation and ion doping are used. Methods such as the ion implantation method and plasma immersion ion implantation method can be used, but oxygen When directly introducing the solution into the exposed oxide semiconductor film 403, plasma treatment may also be used. It is possible.

[0108] It is preferable to introduce oxygen into the oxide semiconductor film 403 after dehydration or dehydrogenation treatment. However, it is not particularly limited. Also, the oxide semiconductor film 40 that has undergone the above-mentioned dehydration or dehydrogenation treatment. The introduction of oxygen into the third system may be performed multiple times.

[0109] Preferably, the oxide semiconductor film provided on the transistor is such that the oxide semiconductor is in a crystalline state It is preferable to have a membrane that contains a region with an excess of oxygen relative to the stoichiometric composition. In this case, the oxygen content should exceed the stoichiometric composition of the oxide semiconductor. The oxygen content should exceed the amount of oxygen in the case of a single crystal. Oxygen may also be present.

[0110] Hydrogen or water is removed from the oxide semiconductor, and it is purified to the highest possible purity with as few impurities as possible. By supplying oxygen and compensating for the oxygen deficiency, an i-type (intrinsic) oxide semiconductor is produced, or an i-type It is possible to create an oxide semiconductor that is very close to (intrinsic). By doing so, oxide To raise the Fermi level (Ef) of a semiconductor to the same level as the intrinsic Fermi level (Ei). Therefore, by using this oxide semiconductor film in a transistor, oxygen vacancies can be eliminated. Reduces the variation in the threshold voltage Vth of transistors and the threshold voltage shift ΔVth. It is possible.

[0111] Next, on the gate electrode layer 401, the gate insulating film 402, and the oxide semiconductor film 403, Conductive film 4 which forms the electrode layer and drain electrode layer (including wiring formed from the same layer) Forms 45 (see Figure 1(B)).

[0112] The conductive film 445 uses a material that can withstand subsequent heat treatment. Source electrode layer and drain electrode Examples of conductive films 445 used in the polar layer include Al, Cr, Cu, Ta, Ti, Mo, and W. A metal film containing elements selected from the above, or a metal nitride film (nitride film) composed of the above-mentioned elements. A film such as a tungsten film, molybdenum nitride film, or tungsten nitride film can be used. A high-melting-point metal such as Ti, Mo, or W is placed on either the underside or the upper side or both sides of a metal film such as Cu. The film or its metal nitride film (titanium nitride film, molybdenum nitride film, tungsten nitride film) A configuration in which these are stacked may also be used. In addition, the conductive material used for the source electrode layer and the drain electrode layer may be... The electrode film 445 may be formed from a conductive metal oxide. These are indium oxide (In2O3), tin oxide (SnO2), zinc oxide (ZnO), and indi Indium tin oxide (In2O3-SnO2, abbreviated as ITO), indium zinc oxide ( In2O3-ZnO) or materials containing silicon oxide are used. It is possible to be there.

[0113] A resist mask 448a and 448b are formed on the conductive film 445 by a photolithography process. Selective etching is performed using a halogen-containing gas 447 on the source electrode layer 40. 5a, The drain electrode layer 405b is formed (see Figure 1(C)). Source electrode layer 405a, After forming the drain electrode layer 405b, the resist masks 448a and 448b are removed.

[0114] For exposure during the formation of resist masks 448a and 448b, ultraviolet light, KrF laser light, and ArF laser light are used. It is preferable to use laser light. Underneath the adjacent source electrode layer 405a on the oxide semiconductor film 403. The gap between the end and the lower end of the drain electrode layer 405b determines the transistor that is later formed. The channel length L for 440 is determined. Note that when performing exposure with a channel length L less than 25 nm... In some cases, extremely short wavelengths of a few nanometers to tens of nanometers (extreme ultraviolet) are used. It is preferable to use violet for exposure during the formation of resist masks 448a and 448b. Exposure with ultra-ultraviolet light results in high resolution and a large depth of field. Therefore, subsequent formation of transistors... The channel length L of the zista can also be set to 10 nm or more and 1000 nm or less, and the circuit It can increase the operating speed.

[0115] Furthermore, in order to reduce the number of photomasks and processes used in the photolithography process, The resist mask formed by a multi-tone mask, which is an exposure mask where the light has multiple intensities, is formed by the light. The etching process may be performed using a mask. A resist mask formed using a multi-gradation mask. The ske will have a shape with multiple film thicknesses, and its shape can be further deformed by etching. Because it can do this, it can be used in multiple etching processes that process different patterns. Therefore, a single multi-tone mask can accommodate at least two different patterns. This allows for the formation of a resist mask, thereby reducing the number of photomasks. Furthermore, the corresponding photolithography process can also be reduced, thus simplifying the overall process.

[0116] In this embodiment, a halogen-containing gas 447 is used to etch the conductive film 445. Gas 447 containing halogens includes chlorine-containing gases, such as chlorine (Cl2), trichloride. It contains boron (BCl3), silicon tetrachloride (SiCl4), carbon tetrachloride (CCl4), etc. A gas containing halogens can be used. In addition, as gas 447 containing halogens, a gas containing fluorine can be used. For example, carbon tetrafluoride (CF4), sulfur fluoride (SF6), nitrogen fluoride (NF3), Gases containing trifluoromethane (CHF3), etc., can be used. Gases to which noble gases such as helium (He) or argon (Ar) are added are used. It is possible.

[0117] The etching method is parallel plate type RIE (Reactive Ion Etching). The ) method or the ICP etching method can be used. It can be etched to the desired processing shape. As such, etching conditions (amount of power applied to the coil-type electrode, amount of power applied to the substrate-side electrode) Adjust the power consumption, electrode temperature on the substrate, etc. as appropriate.

[0118] In this embodiment, the conductive film 445 is a titanium film with a thickness of 100 nm, obtained by sputtering. The device uses a laminated structure consisting of a 400 nm thick aluminum film and a 100 nm thick titanium film. Etching of film 445 was performed by dry etching, removing the titanium film, aluminum film, and titanium By etching the stacked film layers, the source electrode layer 405a and the drain electrode layer 405b are removed. To form.

[0119] In this embodiment, two layers, a titanium film and an aluminum film, are etched under the first etching conditions. After etching, the remaining titanium film monolayer is removed under second etching conditions. The etching conditions were: etching gas (BCl3:Cl2 = 750 sccm:150 sccm) Using the above, the bias power is set to 1500W, the ICP power supply power is set to 0W, and the pressure is set to 2.0Pa. The second etching condition is etching gas (BCl3:Cl2 = 700 sccm: Using 100 sccm, the bias power is set to 750W, and the ICP power supply power is set to 0W, and the voltage Assume the force is 2.0 Pa.

[0120] In the etching process for forming the source electrode layer 405a and the drain electrode layer 405b, An etching material (etching gas or etching solution) is applied to the surface and vicinity of the oxide semiconductor film. This results in residue being generated. Such residue can cause leakage current and other issues affecting the transistor's electrical components. This causes deterioration and fluctuations in air characteristics. In addition, elements contained in the etching material may be mixed into or adhered to the oxide semiconductor film 403, which may have an adverse effect on transistor characteristics.

[0121] The residues include the etching material (etching gas or etching solution), the conductive film 445 to be processed, elements contained in the oxide semiconductor film 403 exposed to the etching material, and compounds of these elements. For example, in the etching process for forming the source electrode layer and the drain electrode layer, a gas containing halogen is preferably used. In this case, the residues include halogen-based impurities ( halogen or halide).

[0122] Examples of the residues include chlorine, fluorine, boron, phosphorus, aluminum, iron, or carbon. In addition, the residues may also include metal elements (e.g., indium, gallium, or zinc) contained in the conductive film 445 and the oxide semiconductor film 403 exposed to the etching material, halides of the metal elements, oxides of the metal elements, etc. In some cases, the residues may also include elements contained in the resist masks 448a and 448b.

[0123] In this embodiment, since the gas 447 containing halogen is used in the etching process for forming the source electrode layer 405a and the drain electrode layer 405b, the resulting residues are halogen (chlorine in this embodiment) - based impurities (halogen or halide). When boron is also used in the gas 447 containing halogen as in this embodiment, the resulting residues include boron or compounds containing boron. When a solution of phosphoric acid, acetic acid, and nitric acid is used as the etching material, the residues include phosphorus. ​​​​​​​

[0124] Therefore, after forming the source electrode layer 405a and the drain electrode layer 405b, the oxide semiconductor film 4 03 Between the source electrode layer 405a and the drain electrode layer 405b on the surface and in its vicinity A process is carried out to remove any existing residue (see Figure 1(D)). The residue removal process involves water, if This can be done by treatment with an alkaline solution or by plasma treatment. Treatment with water or TMAH solution, or with oxygen, nitrous oxide, or noble gas (representative) Plasma treatment using argon (for example) can be suitably used. Treatment using acid may also be performed. Furthermore, the oxide semiconductor film 4 is removed by the process of removing the residue. 03 Remove any residue (mainly halogens or halides in this embodiment) adhering to the surface. It has a deodorizing effect.

[0125] Furthermore, during the etching process of the conductive film 445 and the residue removal process, the oxide semiconductor film 40 It is desirable to optimize the etching conditions so that part 3 is etched and not fragmented. However, if only the conductive film 445 is etched and the oxide semiconductor film 403 is not etched at all... It is difficult to obtain the condition of not etching, and during the etching of conductive film 445, oxide semi-oxides The conductive film 403 is partially etched, resulting in an oxide semiconductor film having grooves (recesses). Sometimes.

[0126] The transistor 440 of this embodiment is manufactured through the above process.

[0127] In this embodiment, an oxide semiconductor is placed on the source electrode layer 405a and the drain electrode layer 405b. An insulating film 407 is formed in contact with film 403, serving as a protective insulating film (see Figure 1(E)).

[0128] The insulating film 407 has a film thickness of at least 1 nm or more, and can be formed by appropriately using a method that does not mix impurities such as water and hydrogen into the insulating film 40 7. When hydrogen is contained in the insulating film 407, hydrogen may penetrate into the oxide semiconductor film 403 or oxygen in the oxide semiconductor film may be extracted by hydrogen, resulting in a decrease in the back channel resistance of the oxide semiconductor film 403 (n-type conversion), and there is a risk of forming a parasitic channel. Therefore, it is important not to use hydrogen in the film formation method so that the insulating film 407 becomes a film that contains as little hydrogen as possible. As the insulating film 407, typically, a single layer or a laminate of an inorganic insulating film such as a silicon oxide film, a silicon oxynitride film, an aluminum oxide film, an aluminum oxynitride film, a hafnium oxide film, or a gallium oxide film, a silicon nitride film, an aluminum nitride film, a silicon oxynitride film, or an aluminum oxynitride film can be used. When a heating process is performed as a dehydration or dehydrogenation treatment, it is preferable to supply oxygen to the oxide semiconductor film 403. By supplying oxygen to the oxide semiconductor film 403, oxygen deficiency in the film can be compensated. In this embodiment, since oxygen is supplied to the oxide semiconductor film 403 using the insulating film 407 as a supply source, an example of using an oxide insulating film (for example, a silicon oxide film, a silicon oxynitride film) containing oxygen for the insulating film 407 is shown. When the insulating film 407 is used as a supply source of oxygen, the insulating film 407

[0129] is a film that contains a large amount (excess) of oxygen (preferably, with respect to the stoichiometric composition in the crystalline state, oxygen is excessive). When the insulating film 407 is used as a supply source of oxygen, the insulating film 407 is a film that contains a large amount (excess) of oxygen (preferably, with respect to the stoichiometric composition in the crystalline state, oxygen

[0130] When a heating process is performed as a dehydration or dehydrogenation treatment, it is preferable to supply oxygen to the oxide semiconductor film 403. By supplying oxygen to the oxide semiconductor film 403, oxygen deficiency in the film can be compensated. By supplying oxygen to the oxide semiconductor film 403, oxygen deficiency in the film can be compensated. can be filled.

[0131] In this embodiment, since oxygen is supplied to the oxide semiconductor film 403 using the insulating film 407 as a supply source, an example of using an oxide insulating film (for example, a silicon oxide film, a silicon oxynitride film) containing oxygen for the insulating film 407 is shown. When the insulating film 407 is used as a supply source of oxygen, the insulating film 407 is a film that contains a large amount (excess) of oxygen (preferably, with respect to the stoichiometric composition in the crystalline state, oxygen is excessive). is a film that contains a large amount (excess) of oxygen (preferably, with respect to the stoichiometric composition in the crystalline state, oxygen If the membrane contains regions with an excess of [the substance], it can function suitably as an oxygen source. It is possible.

[0132] In this embodiment, a silicon oxide film with a thickness of 300 nm is used as the insulating film 407, sputtered The film is deposited using the densitometry method. The substrate temperature during film deposition should be between room temperature and 300°C. In this embodiment, the temperature is set to 100°C. Film deposition of silicon oxide film by sputtering is performed using a rare gas Under a sulfurous gas (typically argon) atmosphere, an oxygen atmosphere, or a mixed atmosphere of a noble gas and oxygen. This can be done in a silicon oxide target or sil A target can be used. For example, a silicon target can be used, containing oxygen. A silicon oxide film can be formed by sputtering under a controlled atmosphere.

[0133] Similar to the deposition of the oxide semiconductor film 403, residual moisture in the deposition chamber of the insulating film 407 is removed. For this purpose, it is preferable to use an adsorption-type vacuum pump (such as a cryopump). The concentration of impurities in the insulating film 407 deposited in a deposition chamber evacuated using an op-pump is reduced. Yes, it is possible. Furthermore, as an exhaust means for removing residual moisture in the deposition chamber of the insulating film 407, A turbomolecular pump with a cold trap added may also be used.

[0134] The sputtering gas used when depositing the insulating film 407 is free of impurities such as hydrogen and water. It is preferable to use a highly purified gas from which the gas has been removed.

[0135] Next, with a portion (channel formation region) of the oxide semiconductor film 403 in contact with the insulating film 407, A heating process is performed.

[0136] The heating process temperature is between 250°C and 700°C, or between 400°C and 700°C, This is set to be below the strain point of the substrate. For example, when a substrate is introduced into an electric furnace, which is one of the heat treatment devices, The oxide semiconductor film is subjected to a heating process at 250°C for 1 hour under a nitrogen atmosphere.

[0137] This heating process uses the same heating method and equipment as the heating process that performs dehydration or dehydrogenation. It can be used.

[0138] The heating process is carried out under reduced pressure, or with nitrogen, oxygen, or ultra-dry air (CRDS (cavity ring down)). When measured using a dew point meter with a laser spectroscopy method, the moisture content was 20 ppm (in terms of dew point). Air at -55℃ or below, preferably 1 ppm or less, preferably 10 ppb or less, or This can be done under a noble gas atmosphere (argon, helium, etc.), but the above nitrogen, oxygen, superdry It is preferable that the atmosphere, such as dry air or a noble gas, does not contain water, hydrogen, etc. The purity of nitrogen, oxygen, or noble gas introduced into the heat treatment apparatus must be 6N (99.9999%) or higher. Preferably 7N (99.99999%) or higher (i.e., an impurity concentration of 1 ppm or less is preferred) It is preferable that the concentration be 0.1 ppm or less.

[0139] Furthermore, the heating process is carried out with the oxide semiconductor film 403 and the insulating film 407 containing oxygen in contact. Therefore, the oxide semiconductor film 403, which is simultaneously reduced by the impurity removal process, is composed of Oxygen, one of the main component materials, is supplied from the oxygen-containing insulating film 407 to the oxide semiconductor film 403. They can provide it.

[0140] Furthermore, a highly dense inorganic insulating film may be provided on the insulating film 407. For example, the insulating film An aluminum oxide film is formed on 407 by sputtering. High density (film density 3.2 g / cm³) 3 Preferably 3.6 g / cm³ 3 (The above) This allows transistor 440 to be given stable electrical characteristics. The film density is Laza Rutherford Backscattering (RBS) Spectrometry and X-ray reflectivity measurement (XRR: X-Ray Reflectometry) It can be measured by (tion).

[0141] Aluminum oxide that can be used as a protective insulating film provided on transistor 440 The membrane has a barrier effect that prevents both hydrogen, water and other impurities, as well as oxygen, from passing through the membrane. It has a high blocking effect.

[0142] Therefore, the aluminum oxide film is subject to fluctuations in hydrogen during and after the manufacturing process. The impurities such as water are mixed into the oxide semiconductor film 403, and the main components that make up the oxide semiconductor It functions as a protective film that prevents the release of oxygen, which is the material, from the oxide semiconductor film 403.

[0143] Furthermore, a planarizing insulating film may be formed to reduce surface irregularities caused by transistor 440. i. As planarizing insulating films, polyimide, acrylic resin, benzocyclobutene-based resin, etc. The following organic materials can be used. In addition to the above organic materials, low dielectric constant materials (low-k Materials such as these can be used. Furthermore, multiple insulating films formed from these materials can be stacked. A planar insulating film may be formed by doing so.

[0144] For example, an acrylic resin film with a thickness of 1500 nm can be formed as the planarizing insulating film. The acrylic resin film is applied by a coating method and then fired (for example, under a nitrogen atmosphere at 250°C for 1 hour) to form the desired shape. It is possible.

[0145] After forming the planar insulating film, heat treatment may be performed. For example, at 250°C under a nitrogen atmosphere for 1 hour. Intermediate heat treatment is performed.

[0146] Thus, after the formation of the transistor 440, a heat treatment may be performed. You can do it several times.

[0147] As described above, by performing the process to remove the residue, the surface of the oxide semiconductor film 403 is Furthermore, to prevent contamination of the vicinity by residue, the inverted bottom gate structure A semiconductor device having a transistor 440 which is a type G transistor, has an oxide semiconductor film 40 3. Impurities on the surface caused by the etching process (typically halogens (e.g., chlorine, fluorine) The surface density of (element), boron, phosphorus, aluminum, iron, or carbon) is 1 × 10⁻⁶ 13 atoms / cm 2 The following (preferably 1 × 10) 12 atoms / cm 2 The following can be done: Furthermore, impurities caused by the etching process on the surface of the oxide semiconductor film 403 (typically, ha The concentration of chlorogenic compounds (e.g., chlorine, fluorine, boron, phosphorus, aluminum, iron, or carbon) 5 x 10 18 atoms / cm 3 The following (preferably 1 × 10) 18 atoms / cm 3 below ) can be done as follows.

[0148] Furthermore, impurities resulting from the etching process (typically halogens (e.g., chlorine, fluorine), etc.) The concentration of ion, phosphorus, aluminum, iron, or carbon is SIMS (Secondary It can be estimated using methods such as Ion Mass Spectrometry. Cut.

[0149] Therefore, a transistor 440 having stable electrical characteristics using an oxide semiconductor film 403 is obtained. We can provide highly reliable semiconductor devices, including... This allows for high-yield production and improved productivity.

[0150] (Embodiment 2) In this embodiment, another form of semiconductor device and method for manufacturing a semiconductor device is shown using Figure 2. Let me explain. The same parts as or having similar functions as those in the above embodiment, and the process, are as described above. This can be done in the same way as the method of application, so repeated explanations will be omitted. Also, detailed explanation of the same section The "Akira" part will be omitted.

[0151] The transistor 430 shown in Figure 2(E) is a bottom-gate structure and is an inverse staggered transistor. This is an example of a transistor, also called a transistor. Figure 2 shows the channel of transistor 430. This is a cross-sectional view along the length of the flannel.

[0152] As shown in Figure 2(E), the semiconductor device including transistor 430 has a base having an insulating surface On the plate 400, there is a gate electrode layer 401, a gate insulating film 402, an oxide semiconductor film 403, and a saw It has a drain electrode layer 405a and a drain electrode layer 405b. It also covers the transistor 430. An insulating film 407 is provided.

[0153] Figures 2(A) to (E) show an example of a method for fabricating a semiconductor device having a transistor 430. .

[0154] A conductive film 441 is formed on the substrate 400 (see Figure 2(A)). The material of the conductive film 441 is mo Ribdenum, Titanium, Tantalum, Tungsten, Aluminum, Copper, Chromium, Neodymium, S It can be formed using metallic materials such as candium or alloy materials that mainly consist of these materials. It can also be used as a conductive film 441, which is a polycrystalline silicon film doped with impurity elements such as phosphorus. Semiconductor films such as those represented by [specific example], or silicide films such as nickel silicide may be used. Conductive film 441 may be a single-layer structure or a laminated structure.

[0155] Furthermore, the material of the conductive film 441 is indium oxide containing tungsten oxide, titanium oxide. Includes indium oxide, indium tin oxide, and indium tin oxide containing titanium oxide. indium tin oxide, indium zinc oxide, tungsten oxide with added silicon dioxide Conductive materials such as indium zinc oxide containing ammonium compounds can also be applied. A laminated structure of a conductive material and the above-mentioned metal material can also be used.

[0156] In this embodiment, a conductive film 441 with a thickness of 100 nm is produced by sputtering. It forms a stencil film.

[0157] A resist mask 442 is formed on the conductive film 441 by a photolithography process, selectively Etching is performed to form the gate electrode layer 401 (see Figure 2(B)). Gate electrode layer After forming 401, remove the resist mask 442. Etching of the conductive film 441 is performed. Dry etching or wet etching can be used, or both can be used.

[0158] In this embodiment, a halogen-containing gas 443 is used to etch the conductive film 441. Gas 443 containing halogens includes chlorine-containing gases, such as chlorine (Cl2), trichloride. It contains boron (BCl3), silicon tetrachloride (SiCl4), carbon tetrachloride (CCl4), etc. A gas containing halogens can be used. In addition, as gas 443 containing halogens, a gas containing fluorine can be used. For example, carbon tetrafluoride (CF4), sulfur hexafluoride (SF6), nitrogen trifluoride (NF3) Gases containing ), trifluoromethane (CHF3), etc. can be used. These gases are used by adding noble gases such as helium (He) or argon (Ar) to them. It is possible to be there.

[0159] For etching methods, parallel plate type RIE etching or ICP etching can be used. The etching conditions (applied to the coil-type electrode) are set so that the desired machining shape can be etched. The amount of power applied, the amount of power applied to the electrodes on the substrate, the temperature of the electrodes on the substrate, etc., are adjusted as appropriate. .

[0160] In this embodiment, dry etching is used in the etching process of the conductive film 441, and halogen Gas 443 containing carbon tetrafluoride, chlorine, and oxygen (CF4:Cl2 Using O2 (25 sccm:25 sccm:10 sccm), the bias power is 150W. The ICP power supply will be set to 500W and the pressure to 1.0Pa.

[0161] In the etching process for forming the gate electrode layer 401, the surface of the gate electrode layer 401 and the Residue from the etching material (etching gas or etching solution) is generated in the vicinity. If impurities contained in such residues are present on the surface of the gate electrode layer, the gate insulator will fail. This leads to a deterioration in the voltage resistance of the edge film 402 (a decrease in breakdown voltage), and the gate electrode layer 401 and the saw A leakage current is generated between the drain electrode layer 405a or the drain electrode layer 405b. This can lead to fluctuations and degradation in the electrical characteristics of the transistor.

[0162] The residue includes the etching material (etching gas or etching solution) and the conductive film to be processed. The elements contained in 441 and compounds of those elements are included. For example, the gate electrode layer 401 In the etching process used for formation, a halogen-containing gas is preferably used, but in this case, the residue It contains halogen-based impurities (halogens or halides).

[0163] Residues include, for example, chlorine, fluorine, boron, phosphorus, aluminum, iron, or carbon. These include the metal elements contained in the conductive film 441, and the halogens of the metal elements. It may also contain oxides of metal elements, etc. Furthermore, it may contain resist mass as a residue. It may also contain elements found in C442.

[0164] In this embodiment, the etching process for forming the gate electrode layer 401 is performed using a gas containing a halogen. Since 443 is used, the resulting residue is a halogen (chlorine in this embodiment) impurity (halo It becomes a fluorine or halide. Also, as an etching material, a mixture of phosphoric acid, acetic acid, and nitric acid is used. When using a pulp solution, the residue may contain phosphorus, etc.

[0165] Therefore, after the formation of the gate electrode layer 401, residuals present on the surface of the gate electrode layer 401 and in its vicinity A residue removal process is performed (see Figure 2(C)). The residue removal process involves water or alkaline solution. This can be done by treatment with a nitrile solution or by plasma treatment. For example, water, Treatment with TMAH solution, or oxygen, nitrous oxide, or noble gas (typically, aluminum) Plasma treatment using (Gon) can be suitably used. Also, dilute hydrofluoric acid can be used You may proceed with the processing.

[0166] Next, a gate insulating film 402 is formed on the gate electrode layer 401. In this embodiment, high density A silicon oxidizride film with a thickness of 200 nm is formed using a plasma CVD method.

[0167] An oxide semiconductor film 403 is formed on the gate insulating film 402 (see Figure 2(D)). In terms of form, the oxide semiconductor film 403 is a sputtering apparatus having an AC power supply. Using a sputtering method, an In-Ga-Zn oxide film with a thickness of 35 nm (IGZ) was produced. A film (O film) is formed. In this embodiment, In:Ga:Zn = 1:1:1 (= 1 / 3: An In-Ga-Zn oxide target with an atomic ratio of 1 / 3:1 / 3 is used for film deposition. The conditions were: oxygen and argon atmosphere (oxygen flow rate ratio 50%), pressure 0.6 Pa, power supply The power output is 5kW and the substrate temperature is 170°C. The deposition rate under these conditions is 16nm / min. ru.

[0168] Excess hydrogen (including water and hydroxyl groups) is removed from the oxide semiconductor film 403 (dehydration or dehydrogenation). A heat treatment may be performed to convert it. In this embodiment, one of the heat treatment devices is The substrate is introduced into the electric furnace, and the oxide semiconductor film 403 is subjected to 1 in a nitrogen atmosphere at 450°C. The process involves heating for 1 hour at 450°C under a nitrogen and oxygen atmosphere.

[0169] Next, a conductive film is placed on the gate electrode layer 401, the gate insulating film 402, and the oxide semiconductor film 403. By forming and etching the conductive film, the source electrode layer 405a and the drain electrode layer are formed. Form 405b. Etching of the conductive film can be done by dry etching or wet etching. However, both are acceptable.

[0170] In this embodiment, a titanium film with a thickness of 100 nm and a film with a thickness of 400 nm are produced by sputtering. An aluminum film and a titanium film with a thickness of 100 nm are stacked and then etched using a dry etching method. By etching the stacked layers of tan film, aluminum film, and titanium film, the source electrode layer 405 a. Form the drain electrode layer 405b.

[0171] The transistor 430 of this embodiment is manufactured through the above process.

[0172] In this embodiment, an oxide semiconductor is placed on the source electrode layer 405a and the drain electrode layer 405b. An insulating film 407 is formed in contact with film 403, serving as a protective insulating film (see Figure 2(E)). Then, a 400 nm silicon oxidnitride film is formed by the CVD method. Furthermore, protective insulation... After film formation, heat treatment may be performed. For example, heat treatment at 300°C for 1 hour under a nitrogen atmosphere. To do so.

[0173] Furthermore, a planarizing insulating film may be formed to reduce surface irregularities caused by transistor 430. stomach.

[0174] For example, an acrylic resin film with a thickness of 1500 nm is formed on a protective insulating film as a planarizing insulating film. The acrylic resin film is applied by coating method and then fired (for example, at 250°C under a nitrogen atmosphere). It can be formed in 1 hour.

[0175] After forming the planar insulating film, heat treatment may be performed. For example, at 250°C under a nitrogen atmosphere for 1 hour. Intermediate heat treatment is performed.

[0176] As described above, the surface of the gate electrode layer 401 and its vicinity are prevented from being contaminated by residue. Therefore, it has transistor 420, which is an inverse staggered transistor with a bottom gate structure. The semiconductor device has impurities on the surface of the gate electrode layer 401 caused by the etching process (typically (These include halogens (e.g., chlorine, fluorine), boron, phosphorus, aluminum, iron, or carbon) The surface density is 1 × 10 13 atoms / cm 2 The following (preferably 1 × 10) 12 atom / cm 2 The following applies: Furthermore, impurities caused by the etching process on the surface of the gate electrode layer 401. Substances (typically halogens (e.g., chlorine, fluorine), boron, phosphorus, aluminum, iron, The concentration of (or carbon) is 5 × 10 18 atoms / cm 3 The following (preferably 1 × 10) 18 at oms / cm 3 The following can be done:

[0177] Therefore, a transistor 430 having stable electrical characteristics using an oxide semiconductor film 403 is obtained. We can provide highly reliable semiconductor devices, including... This allows for high-yield production and improved productivity.

[0178] (Embodiment 3) In this embodiment, another form of semiconductor device and method for manufacturing a semiconductor device is shown using Figure 3. Let me explain. The same parts as or having similar functions as those in the above embodiment, and the process, are as described above. This can be done in the same way as the method of application, so repeated explanations will be omitted. Also, detailed explanation of the same section The "Akira" part will be omitted.

[0179] The transistor 420 shown in Figure 3(F) is a bottom-gate structure and is an inverse staggered transistor. This is an example of a transistor, also called a transistor. Figure 3 shows the channel of transistor 420. This is a cross-sectional view along the length of the flannel.

[0180] As shown in Figure 3(F), the semiconductor device including transistor 420 has a base having an insulating surface On the plate 400, there is a gate electrode layer 401, a gate insulating film 402, an oxide semiconductor film 403, and a saw It has a drain electrode layer 405a and a drain electrode layer 405b. It also covers the transistor 420. An insulating film 407 is provided.

[0181] Figures 3(A) to (F) show an example of a method for fabricating a semiconductor device having transistor 420. .

[0182] A conductive film is formed on a substrate 400 having an insulating surface. The material of the conductive film is molybdenum, titanium Materials such as tantalum, tungsten, aluminum, copper, chromium, neodymium, scandium, etc. It can be formed using metallic materials or alloy materials that mainly consist of metallic materials. Semiconductor films, such as polycrystalline silicon films doped with impurity elements like phosphorus, are representative of the electrochemical films. Alternatively, a silicide film such as nickel silicide may be used. The conductive film may also be a single-layer structure. That's fine, and a layered structure is also acceptable.

[0183] Furthermore, the conductive film material includes indium oxide containing tungsten oxide, and titanium oxide containing Indium oxide, indium tin oxide, indium tin oxide containing titanium oxide, oxide Contains silicon-added indium tin oxide, indium zinc oxide, and tungsten oxide. Conductive materials such as indium zinc oxide can also be applied. The material and the above-mentioned metal material can also be arranged in a laminated structure.

[0184] In this embodiment, a tungsten film with a thickness of 100 nm is used as the conductive film by sputtering. It forms a film.

[0185] A resist mask is formed on a conductive film using a photolithography process, and then selectively etched. The gate electrode layer 401 is formed by performing the following steps (see Figure 3(A)). Afterward, remove the resist mask. The conductive film can be etched using dry etching or wet etching. Etching can be used, or both methods can be employed.

[0186] In this embodiment, a halogen-containing gas is used for etching the conductive film. The gases it contains include chlorine-containing gases, such as chlorine (Cl2) and boron trichloride (BCl3). ), use gases containing silicon tetrachloride (SiCl4), carbon tetrachloride (CCl4), etc. This is possible. In addition, as a halogen-containing gas, a fluorine-containing gas, such as carbon tetrafluoride, can be used. (CF4), sulfur hexafluoride (SF6), nitrogen trifluoride (NF3), trifluoromethane ( Gases containing CHF3, etc., can be used. In addition, helium (He) can be added to these gases. Gases to which noble gases such as argon (Ar) have been added can be used.

[0187] For etching methods, parallel plate type RIE etching or ICP etching can be used. The etching conditions (applied to the coil-type electrode) are set so that the desired machining shape can be etched. The amount of power applied, the amount of power applied to the electrodes on the substrate, the temperature of the electrodes on the substrate, etc., are adjusted as appropriate. .

[0188] In this embodiment, dry etching is used in the etching process of the conductive film, and the etching conditions Gases containing halogens include carbon tetrafluoride, chlorine, and oxygen (CF4: Using Cl2:O2 (25 sccm:25 sccm:10 sccm), the bias power is 1 The power consumption is set to 50W, the ICP power supply power to 500W, and the pressure to 1.0 Pa.

[0189] In the etching process for forming the gate electrode layer 401, the surface of the gate electrode layer 401 and the Residue from the etching material (etching gas or etching solution) is generated in the vicinity. If impurities contained in such residues are present on the surface of the gate electrode layer, the gate insulator will fail. This leads to a decrease in the breakdown voltage of the edge film 402, affecting the gate electrode layer 401 and the source electrode layer 405a or drain. A leakage current is generated between the electrode layer 405b and the transistor. Therefore, the electrical characteristics of the transistor are affected. This can be a factor that causes fluctuations and declines.

[0190] The residue includes the etching material (etching gas or etching solution) and the conductive film to be processed. It contains elements and compounds of those elements. For example, forming the gate electrode layer 401 In the etching process, a gas containing halogens is preferably used, but in this case, the residue contains It contains chlorogenic impurities (halogens or halides).

[0191] Residues include, for example, chlorine, fluorine, boron, phosphorus, aluminum, iron, or carbon. It can be produced. In addition, the residue contains metal elements, halides of metal elements, and metals. It may also contain oxides of elements. Furthermore, it may be present in the resist mask as a residue. Elements may also be included.

[0192] In this embodiment, the etching process for forming the gate electrode layer 401 is performed using a gas containing a halogen. Since this method is used, the resulting residue is a halogen (chlorine in this embodiment)-based impurity (halogen, (or halides). Also, as an etching material, a solution of phosphoric acid, acetic acid, and nitric acid. When using this method, the residue may contain phosphorus, etc.

[0193] Therefore, after forming the gate electrode layer 401, residuals present on the surface of the gate electrode layer 401 and in its vicinity A residue removal process is performed (see Figure 3(B)). The residue removal process involves using water or an alkaline solution. This can be done by treatment with a nitrile solution or by plasma treatment. For example, water, Treatment with TMAH solution, or oxygen, nitrous oxide, or noble gas (typically, aluminum) Plasma treatment using (Gon) can be suitably used. Also, dilute hydrofluoric acid can be used You may proceed with the processing.

[0194] Next, a gate insulating film 402 is formed on the gate electrode layer 401. In this embodiment, high density A silicon oxidizride film with a thickness of 200 nm is formed using a plasma CVD method.

[0195] An oxide semiconductor film 403 is formed on the gate insulating film 402 (see Figure 3(C)). In terms of form, the oxide semiconductor film 403 is a sputtering apparatus having an AC power supply. Using a sputtering method, an In-Ga-Zn oxide film with a thickness of 35 nm (IGZ) was produced. A film (O film) is formed. In this embodiment, In:Ga:Zn = 1:1:1 (= 1 / 3: An In-Ga-Zn oxide target with an atomic ratio of 1 / 3:1 / 3 is used for film deposition. The conditions were: oxygen and argon atmosphere (oxygen flow rate ratio 50%), pressure 0.6 Pa, power supply The power output is 5kW and the substrate temperature is 170°C. The deposition rate under these conditions is 16nm / min. ru.

[0196] Excess hydrogen (including water and hydroxyl groups) is removed from the oxide semiconductor film 403 (dehydration or dehydrogenation). A heat treatment may be performed to convert it. In this embodiment, one of the heat treatment devices is The substrate is introduced into the electric furnace, and the oxide semiconductor film 403 is subjected to 1 in a nitrogen atmosphere at 450°C. Furthermore, the body performs a heat treatment in a nitrogen and oxygen atmosphere at 450°C for 1 hour.

[0197] Next, on the gate electrode layer 401, the gate insulating film 402, and the oxide semiconductor film 403, A conductive film is formed to serve as the electrode layer and the drain electrode layer.

[0198] The conductive film is made of a material that can withstand subsequent heat treatment. The conductive film used can be selected from, for example, Al, Cr, Cu, Ta, Ti, Mo, and W. Metal films containing elements, or metal nitride films (titanium nitride films, nitride films) having the aforementioned elements as components. Molybdenum film, tungsten nitride film, etc. can be used. In addition, Al, Cu, etc. A high-melting-point metal film such as Ti, Mo, or W is placed on either the underside or the upper side of the metal film, or on both sides thereof. These metal nitride films (titanium nitride film, molybdenum nitride film, tungsten nitride film) are stacked. It may also be configured as follows. Furthermore, the conductive film used for the source electrode layer and the drain electrode layer is It may also be formed from a conductive metal oxide. Indium oxide is an example of a conductive metal oxide. In2O3), tin oxide (SnO2), zinc oxide (ZnO), indium tin oxide (I n2O3―SnO2 (abbreviated as ITO), indium zinc oxide (In2O3―ZnO ) or materials containing silicon oxide can be used.

[0199] A resist mask is formed on a conductive film using a photolithography process, and then selectively etched. This process is performed to form the source electrode layer 405a and the drain electrode layer 405b (see Figure 3(D)). After forming the source electrode layer 405a and the drain electrode layer 405b, the resist mask is removed. do.

[0200] In this embodiment, a halogen-containing gas is used for etching the conductive film. The gases it contains include chlorine-containing gases, such as chlorine (Cl2) and boron trichloride (BCl3). ), use gases containing silicon tetrachloride (SiCl4), carbon tetrachloride (CCl4), etc. This is possible. In addition, as a halogen-containing gas, a fluorine-containing gas, such as carbon tetrafluoride, can be used. (CF4), sulfur fluoride (SF6), nitrogen fluoride (NF3), trifluoromethane (CH4) Gases containing F3, etc. can be used. In addition, helium (He) and Gases to which noble gases such as argon (Ar) have been added can be used.

[0201] For etching methods, parallel plate type RIE etching or ICP etching can be used. The etching conditions (applied to the coil-type electrode) are set so that the desired machining shape can be etched. The amount of power applied, the amount of power applied to the electrodes on the substrate, the temperature of the electrodes on the substrate, etc., are adjusted as appropriate. .

[0202] In this embodiment, a titanium film with a thickness of 100 nm is used as the conductive film by sputtering. A layered structure consisting of a 400 nm thick aluminum film and a 100 nm thick titanium film is used. The etching process involves layering titanium films, aluminum films, and titanium films using a dry etching method. By etching, the source electrode layer 405a and the drain electrode layer 405b are formed.

[0203] In this embodiment, two layers, a titanium film and an aluminum film, are etched under the first etching conditions. After etching, the remaining titanium film monolayer is removed under second etching conditions. The etching conditions were: etching gas (BCl3:Cl2 = 750 sccm:150 sccm) Using the above, the bias power is set to 1500W, the ICP power supply power is set to 0W, and the pressure is set to 2.0Pa. The second etching condition is etching gas (BCl3:Cl2 = 700 sccm: Using 100 sccm, the bias power is set to 750W, and the ICP power supply power is set to 0W, and the voltage Assume the force is 2.0 Pa.

[0204] In the etching process for forming the source electrode layer 405a and the drain electrode layer 405b, An etching material (etching gas or etching solution) is applied to the surface and vicinity of the oxide semiconductor film. This results in residue being generated. Such residue can cause leakage current and other issues affecting the transistor's electrical components. This can lead to a decrease or fluctuation in atmospheric properties. Furthermore, elements contained in the etching material can affect oxide semiconductors. It may become mixed into or adhere to the body membrane 403, potentially adversely affecting transistor characteristics.

[0205] The residue includes the etching material (etching gas or etching solution) and the conductive film to be processed. , elements contained in the oxide semiconductor film 403 exposed to the etching material, and compounds of said elements This includes, for example, the etching process that forms the source electrode layer and the drain electrode layer A gas containing logens is preferably used, but in this case, the residue may contain halogenated impurities (halogens). It contains (or halides).

[0206] Residues include, for example, chlorine, fluorine, boron, phosphorus, aluminum, iron, or carbon. These include the conductive film and the oxide semiconductor film exposed to the etching material. Metallic elements contained in 03 (e.g., indium, gallium, or zinc), metallic element halos It may also contain oxides of metal elements and other substances. In addition, residues may remain. It may also contain elements found in sucrose.

[0207] In this embodiment, etching is used to form the source electrode layer 405a and the drain electrode layer 405b. Since a halogen-containing gas is used in the grinding process, the resulting residue is halogen (in this embodiment) This is a chlorine-based impurity (halogen or halide). Also, as in this embodiment When boron is also used in a gas containing halogens, the resulting residue will be boron, or boron. Compounds containing these are also included. Furthermore, a solution of phosphoric acid, acetic acid, and nitric acid is used as an etching agent. If used, the residue may contain phosphorus, etc.

[0208] Therefore, after forming the source electrode layer 405a and the drain electrode layer 405b, the oxide semiconductor film 4 03 Between the source electrode layer 405a and the drain electrode layer 405b on the surface and in its vicinity A process is carried out to remove any existing residue (see Figure 3(E)). The residue removal process involves water, if This can be done by treatment with an alkaline solution or by plasma treatment. Treatment with water or TMAH solution, or with oxygen, nitrous oxide, or noble gas (representative) Plasma treatment using argon (for example) can be suitably used. Treatment using acid may also be performed. Note that the step to remove residue is performed on the oxide semiconductor film 403. Remove any residue (mainly halogens or halides in this embodiment) adhering to the surface. It has the effect of doing so.

[0209] The transistor 420 of this embodiment is manufactured through the above process.

[0210] In this embodiment, an oxide semiconductor is placed on the source electrode layer 405a and the drain electrode layer 405b. An insulating film 407 is formed in contact with film 403, serving as a protective insulating film (see Figure 3(F)). Then, a 400 nm silicon oxidnitride film is formed by the CVD method. Furthermore, protective insulation... After film formation, heat treatment may be performed. For example, heat treatment at 300°C for 1 hour under a nitrogen atmosphere. To do so.

[0211] Furthermore, a planarizing insulating film may be formed to reduce surface irregularities caused by transistor 430. stomach.

[0212] For example, an acrylic resin film with a thickness of 1500 nm is formed on a protective insulating film as a planarizing insulating film. The acrylic resin film is applied by coating method and then fired (for example, at 250°C under a nitrogen atmosphere). It can be formed in 1 hour.

[0213] After forming the planar insulating film, heat treatment may be performed. For example, at 250°C under a nitrogen atmosphere for 1 hour. Intermediate heat treatment is performed.

[0214] As described above, the gate electrode layer 401 and the surface and vicinity of the oxide semiconductor film 403 remain Because it can prevent contamination by other substances, a bottom-gate inverse staggered transistor is used. A semiconductor device having a transistor 420 has an oxide semiconductor film 403 surface Impurities resulting from the chipping process (typically halogens (e.g., chlorine, fluorine), boron, phosphorus) The surface density of aluminum, iron, or carbon is 1 × 10⁻⁶ 13 atoms / cm 2 The following (preferred Or 1 x 10 12 atoms / cm 2 The following can be done. Also, the gate electrode layer 401 Impurities on the surface caused by the etching process (typically halogens (e.g., chlorine, The surface density of fluorine, boron, phosphorus, aluminum, iron, or carbon is 1 × 10⁻⁶. 13 ato ms / cm 2 The following (preferably 1 × 10) 12 atoms / cm 2 The following applies:

[0215] Furthermore, impurities on the surface of the oxide semiconductor film 403 caused by the etching process (typically, ha The concentration of chlorogenic compounds (e.g., chlorine, fluorine, boron, phosphorus, aluminum, iron, or carbon) 5 x 10 18 atoms / cm 3 The following (preferably 1 × 10) 18 atoms / cm 3 below ) can be made. Impurities caused by the etching process on the surface of the gate electrode layer 401 ( Typical examples include halogens (e.g., chlorine, fluorine), boron, phosphorus, aluminum, iron, or The concentration of carbon is 5 × 10 18 atoms / cm 3 The following (preferably 1 × 10) 18 Atom s / cm 3 The following can be done:

[0216] Therefore, a transistor 420 having stable electrical characteristics using an oxide semiconductor film 403 is obtained. We can provide highly reliable semiconductor devices, including... This allows for high-yield production and improved productivity.

[0217] (Embodiment 4) A semiconductor device having a display function using the transistors shown in any of Embodiments 1 to 3 It is possible to manufacture a device (also called a display device). In addition, a drive circuit including a transistor To form a system-on-panel by integrally forming part or all of the pixel portion on the same substrate. It is possible.

[0218] In Figure 4(A), the pixel portion 4002 provided on the first substrate 4001 is surrounded by A sealing material 4005 is provided and sealed by the second substrate 4006. Figure 4 ( In A), the region surrounded by the sealing material 4005 on the first substrate 4001 and These are formed in different regions on a separately prepared substrate using a single-crystal semiconductor film or a polycrystalline semiconductor film. A scan line drive circuit 4004 and a signal line drive circuit 4003 are implemented. The signal line drive circuit 4003 and the scan line drive circuit 4004 or the pixel unit 4002 are supplied Various signals and potentials are transmitted via FPC (Flexible Printed Circuit). These are supplied as 4018a and FPC4018b.

[0219] In Figures 4(B) and 4(C), the pixel portion 400 provided on the first substrate 4001 A sealing material 4005 is provided so as to surround 2 and the scan line drive circuit 4004. Furthermore, a second substrate 4006 is provided on top of the pixel section 4002 and the scan line driving circuit 4004. Therefore, the pixel unit 4002 and the scan line driving circuit 4004 are connected to the first substrate 4001. The display element is sealed together with the sealing material 4005 and the second substrate 4006. In Figures 4(B) and 4(C), the sealing material 4005 on the first substrate 4001 In a region different from the enclosed area, a single-crystal semiconductor film or multiple crystals are laid on a separately prepared substrate. A signal line driving circuit 4003 formed from a crystalline semiconductor film is implemented. (See Figure 4(B) and Figure 4(B)) In 4(C), a separately formed signal line drive circuit 4003 and a scan line drive circuit 400 The various signals and potentials applied to 4 or the pixel unit 4002 are supplied from the FPC 4018. Yes, they are.

[0220] Furthermore, in Figures 4(B) and 4(C), a signal line drive circuit 4003 is formed separately, An example is shown where it is mounted on board 4001 of 1, but the configuration is not limited to this. The drive circuit may be formed and implemented separately, or it may be part of the signal line drive circuit or part of the scan line drive circuit. It is also possible to form and implement only the relevant part separately.

[0221] Furthermore, the method of connecting the separately formed drive circuit is not particularly limited, and COG(Ch ip On Glass) method, wire bonding method, or TAB (Tape A Methods such as utmost bonding can be used. Figure 4(A) shows C This is an example of implementing the signal line drive circuit 4003 and the scan line drive circuit 4004 using the OG method. Figure 4(B) shows an example of implementing the signal line drive circuit 4003 using the COG method, and Figure 4(C) shows an example of implementing the signal line drive circuit 4003 using the COG method. This is an example of implementing the signal line drive circuit 4003 using the TAB method.

[0222] Furthermore, the display device includes a panel in which the display elements are sealed, and a controller on the panel. Includes modules with ICs and other components mounted on them.

[0223] In this specification, the term "display device" refers to an image display device, a display device, or an optical display device. This refers to the source (including lighting equipment).

[0224] Also, connectors, such as FPC, TAB tape, or TCP, are attached. Modules, modules with printed circuit boards attached to the end of TAB tapes or TCPs, or Modules in which ICs (integrated circuits) are directly mounted on the display element using the COG method are also all display components. It shall be included in the place.

[0225] Furthermore, the pixel section and scanning line driving circuit provided on the first substrate have multiple transistors. Therefore, the transistor shown in any of Embodiments 1 to 3 can be applied.

[0226] Display elements provided in a display device include liquid crystal elements (also called liquid crystal display elements) and light-emitting elements ( A light-emitting element (also called a light-emitting display element) can be used. The light-emitting element emits light when current or voltage is applied. This category includes elements whose intensity is controlled, specifically inorganic EL (Electroluminescent) elements. This includes uminescence, organic EL, etc. Also, electronic inks and other electrically charged materials. Display media where contrast changes can also be applied.

[0227] Furthermore, one form of semiconductor device will be explained using Figures 4 to 6. Figure 6 is shown in Figure 4(B This corresponds to a cross-sectional view in MN of ).

[0228] As shown in Figures 4 and 6, the semiconductor device has connection terminal electrodes 4015 and terminal electrodes 4016. It has, and the connecting terminal electrode 4015 and terminal electrode 4016 are FPC4018 (FPC40 The terminals of 18a and 4018b) are electrically connected via the anisotropic conductive film 4019. It is.

[0229] The connecting terminal electrode 4015 is formed from the same conductive film as the first electrode layer 4030, and the terminal electrode 4 016 is formed of the same conductive film as the gate electrode layer of transistors 4010 and 4011. ru.

[0230] Furthermore, the pixel section 4002 and the scanning line driving circuit 4004 provided on the first substrate 4001 are, It has multiple transistors, and in Figure 6, transistor 40 is included in the pixel section 4002. Figure 10 and transistor 4011 included in the scan line driving circuit 4004 are shown as examples. In 6(A), an insulating film 4020 is provided on transistors 4010 and 4011, as shown in Figure 6. In (B), an insulating film 4021 is further provided.

[0231] Transistors 4010 and 4011 are as shown in any of Embodiments 1 to 3. A transistor can be applied. In this embodiment, the transistor shown in Embodiment 1 An example of applying a transistor obtained with a similar structure and manufacturing method to the Ta440 is shown.

[0232] A transistor obtained with the same structure and manufacturing method as the transistor 440 shown in Embodiment 1 After forming the source electrode layer and drain electrode layer in sta 4010 and 4011, an oxide semiconductor film is formed. Remove any residue present between the source electrode layer and the drain electrode layer on and near the surface. The following process is carried out. The residue removal process involves treatment with water or an alkaline solution, or This can be done by lazma treatment. For example, treatment using water or TMAH solution, This involves plasma processing using oxygen, nitrous oxide, or a noble gas (typically argon). These can be suitably used. Treatment with dilute hydrofluoric acid may also be performed.

[0233] Furthermore, as shown in Embodiment 2, after the gate electrode layer is formed, the surface and vicinity of the gate electrode layer A step may be performed to remove residue caused by the etching process. As shown in 3, after the gate electrode layer is formed, remove any residue from the surface of the gate electrode layer and its vicinity. After performing the removal process and further forming the source electrode layer and drain electrode layer, the oxide semiconductor film surface and A step may be taken to remove any residue in the vicinity of the said object.

[0234] This prevents the oxide semiconductor film surface and its vicinity from being contaminated by residues, thus preventing transients Sta 4010 and 4011 are impurities caused by the etching process on the surface of oxide semiconductor films. Typical examples include halogens (e.g., chlorine, fluorine), boron, phosphorus, aluminum, iron, or The surface density of carbon is 1 × 10 13 atoms / cm 2 The following (preferably 1 × 10) 12 ato ms / cm 2 The following can be done. Note that etching on the oxide semiconductor film surface. Process-induced impurities (typically halogens (e.g., chlorine, fluorine), boron, phosphorus, aluminum) The concentration of (aluminum, iron, or carbon) is 5 × 10 18 atoms / cm 3 The following (preferably 1) ×10 18 atoms / cm 3 The following can be done:

[0235] Therefore, the stable electrical characteristics using the oxide semiconductor film of this embodiment shown in Figures 4 and 6 are A highly reliable semiconductor device containing transistors 4010 and 4011. We can provide such reliable semiconductor devices with high yield. This can improve productivity.

[0236] Furthermore, it overlaps with the channel formation region of the oxide semiconductor film of transistor 4011 for the drive circuit. A conductive layer may be provided at the same location. The conductive layer may overlap with the channel formation region of the oxide semiconductor film. By placing it in a specific position, the bias-thermal stress test (BT test) can be controlled before and after the stress test. The change in the threshold voltage of the converter 4011 can be further reduced. The potential may be the same as or different from that of the gate electrode layer of transistor 4011. It can also function as a second gate electrode layer. Furthermore, the potential of the conductive layer can be GND, 0 It may also be in a V state or a floating state.

[0237] Furthermore, the conductive layer shields against external electric fields, that is, external electric fields do not penetrate the internal (including transistors). It also has a function to prevent it from affecting the circuit (especially an electrostatic shielding function against static electricity). Due to the shielding function of the conductive layer, the electrical properties of the transistor are affected by external electric fields such as static electricity. This prevents the characteristics from fluctuating.

[0238] The transistor 4010 provided in the pixel section 4002 is electrically connected to the display element, and the display The panel is constructed using various display elements, as long as they can perform a display. You can use it.

[0239] Figure 6(A) shows an example of a liquid crystal display device using liquid crystal elements as display elements. The liquid crystal element 4013, which is a display element, has a first electrode layer 4030 and a second electrode layer 403 1, and a liquid crystal layer 4008 are included. An insulating film 4032, 4033 capable of performing the function is provided. The second electrode layer 4031 is on the second substrate Located on the 4006 side, the first electrode layer 4030 and the second electrode layer 4031 are connected to the liquid crystal layer 400. The configuration involves stacking components via 8.

[0240] Furthermore, spacer 4035 is a columnar spacer obtained by selectively etching the insulating film. It is provided to control the film thickness (cell gap) of the liquid crystal layer 4008. Spherical spacers may also be used.

[0241] When using liquid crystal elements as display elements, thermotropic liquid crystals, low molecular weight liquid crystals, and polymer liquid crystals are used. Crystals, polymer-dispersed liquid crystals, ferroelectric liquid crystals, antiferroelectric liquid crystals, etc. can be used. The liquid crystal material (liquid crystal composition) can be divided into a cholesteric phase, a smectic phase, and a cue phase, depending on the conditions. It exhibits the Big phase, chiral nematic phase, isotropic phase, etc.

[0242] Furthermore, a liquid crystal composition that exhibits a blue phase without using an alignment film may be used for the liquid crystal layer 4008. In this case, the liquid crystal layer 4008, the first electrode layer 4030, and the second electrode layer 4031 are The structure is in contact with each other. The blue phase is one of the liquid crystal phases, and the cholesteric liquid crystal is heated up. This is a phase that appears just before the transition from the cholesteric phase to the isotropic phase. The blue phase is a liquid crystal. Furthermore, it can be expressed using a liquid crystal composition mixed with a chiral agent. To broaden the temperature range in which the phase manifests, polymerizable monomers are added to the liquid crystal composition that manifests the blue phase. Furthermore, a polymerization initiator and other substances may be added to stabilize the polymer and form a liquid crystal layer. Yes, it is possible. Liquid crystal compositions that exhibit the blue phase have a short response speed and are optically isotropic, so No alignment processing is required, and it has low viewing angle dependence. Also, since an alignment layer is not required, it is not a Rabin Since rubbing is also unnecessary, it prevents electrostatic discharge damage caused by rubbing. This makes it possible to reduce defects and damage to liquid crystal displays during the manufacturing process. This makes it possible to improve the productivity of the display device. Transistors using oxide semiconductor films The effects of static electricity cause the electrical characteristics of the transistor to fluctuate significantly, exceeding the design range. There is a risk. Therefore, blue light is used in liquid crystal display devices that have transistors using oxide semiconductor films. Using a liquid crystal composition that exhibits phases is more effective.

[0243] Furthermore, the resistivity of the liquid crystal material is 1 × 10⁻⁶ 9 The value is Ω·cm or greater, preferably 1 × 10⁻⁶. 11 It is Ω·cm or greater, and more preferably 1 × 10⁻⁶ 12 It is greater than Ω·cm. Furthermore, this specification... The resistivity values ​​in this document shall be those measured at 20°C.

[0244] The size of the retention capacitance provided in a liquid crystal display device depends on the regeneration of the transistors arranged in the pixel area. The system is set to hold the charge for a predetermined period of time, taking into account the current and other factors. The size should be set considering the transistor's off-current, etc. The oxidation disclosed herein By using a transistor having a physical semiconductor film, the liquid crystal capacitance in each pixel is It is sufficient to provide a holding capacity having a size of 1 / 3 or less, preferably 1 / 5 or less of the capacity. ru.

[0245] The transistor using the oxide semiconductor film disclosed herein has an off-state current value ( The off-current value can be controlled to be low. Therefore, the holding time of electrical signals such as image signals can be controlled. It can be extended, and the writing interval can also be set to be longer when the power is on. Therefore, This reduces the frequency of the flashing operation, thus having the effect of suppressing power consumption.

[0246] Furthermore, transistors using oxide semiconductor films disclosed herein have a relatively high field effect. Because mobility is obtained, high-speed driving is possible. For example, a vehicle capable of such high-speed driving By using a transistor in a liquid crystal display device, the switching transistor in the pixel section and the drive transistor are used. The driver transistors used in the circuit can be formed on the same substrate. Furthermore, it is necessary to use a semiconductor device formed from a silicon wafer or the like as a separate drive circuit. Therefore, the number of components in the semiconductor device can be reduced. Also, even in the pixel area, high By using transistors capable of high-speed operation, high-quality images can be provided.

[0247] LCD displays include TN (Twisted Nematic) mode and IPS (In-Place Printed Display). lane-Switching) mode, FFS (Fringe Field Switching) mode ching) mode, ASM(Axially Symmetric aligned) Micro-cell mode, OCB (Optical Compensated B) irefringence) mode, FLC (Ferroelectric Liqui d Crystal) mode, AFLC (AntiFerroelectric Liq. You can use modes such as UID Crystal.

[0248] Furthermore, normally black type liquid crystal display devices, such as those employing vertical alignment (VA) mode, It may also be used as a transmissive liquid crystal display device. Several vertical orientation modes are possible, For example, MVA (Multi-Domain Vertical Alignment) Mode, PVA (Patterned Vertical Alignment) mode Features such as ASV (Advanced Super View) mode can be used. Furthermore, it can also be applied to VA-type liquid crystal display devices. VA-type liquid crystal display devices are... This is a type of method for controlling the arrangement of liquid crystal molecules in a liquid crystal display panel. VA-type liquid crystal display devices are... This method involves the liquid crystal molecules oriented perpendicular to the panel surface when no voltage is applied. Furthermore, a pixel is divided into several subpixel regions, each in a different direction. This is called multi-domainization or multi-domain design, which is a method of knocking down molecules. A method can be used.

[0249] Furthermore, in a display device, the black matrix (light-shielding layer), polarizing member, phase difference member, and reflector are used. Optical components (optical substrates) such as protective members are provided as appropriate. For example, polarizing substrates and phase difference substrates Circularly polarized light from a plate may be used. Also, backlights, sidelights, etc., may be used as light sources. It's okay to be there.

[0250] Furthermore, the display method used in the pixel area may be a progressive or interlaced method. It is possible. Also, when displaying in color, the color elements controlled by pixels are RGB (R is It is not limited to the three colors (red, green, and blue). For example, RGBW (where W represents white). Alternatively, some models use RGB with one or more additional colors such as yellow, cyan, or magenta. The size of the display area for each dot of the color element may differ. However, the disclosed invention This applies not only to color display devices, but also to monochrome display devices. It is also possible.

[0251] Furthermore, as a display element included in the display device, an electroluminescent light-emitting element is used. It can be applied to light-emitting devices that utilize electroluminescence. They are distinguished by whether they are organic or inorganic compounds, and generally the former are organic E The latter is called an L element, and the latter an inorganic EL element.

[0252] Organic EL elements emit electrons and holes from a pair of electrodes when a voltage is applied to the light-emitting element. Each of these is injected into a layer containing a luminescent organic compound, and an electric current flows through it. Then, these... The recombination of electrons and holes causes the luminescent organic compound to form an excited state. And when that excited state returns to the ground state, it emits light. From this mechanism, Such a light-emitting element is called a current-excited light-emitting element. In this embodiment, the light-emitting element is An example using an electroluminescent element is shown.

[0253] Inorganic electroluminescent (EL) elements are classified into dispersed inorganic EL elements and thin-film inorganic EL elements based on their element configuration. They are classified as such. Dispersive inorganic EL elements have a light-emitting layer in which particles of light-emitting material are dispersed in a binder. The luminescence mechanism utilizes donor and acceptor levels, and the donor-acceptor level is the key to this process. This is a receptor recombination type light emission. Thin-film inorganic EL elements sandwich the light-emitting layer between dielectric layers. Furthermore, it has a structure where it is sandwiched between electrodes, and the light emission mechanism utilizes the inner-shell electron transition of metal ions. This is a localized light emission. Here, we will explain using an organic EL element as the light-emitting element. ru.

[0254] A light-emitting element only needs to have at least one of its pair of electrodes that is translucent in order to extract light. Then, a transistor and a light-emitting element are formed on the substrate, and light is extracted from the side opposite to the substrate. This includes top-side emission, bottom-side emission which extracts light from the substrate side, and emission from both the substrate side and the opposite side of the substrate. There are light-emitting elements with a double-sided emission structure that extract light from both sides, and any light-emitting element with an emission structure is applicable. It is possible.

[0255] Figures 5(A)(B) and 6(B) show examples of light-emitting devices that use light-emitting elements as display elements. .

[0256] Figure 5(A) is a plan view of the light-emitting device, and the dashed lines V1-W1 and V2-W2 in Figure 5(A) The cross-section cut along V3-W3 corresponds to Figure 5(B). Note that the plan view in Figure 5(A) is shown below. In this example, the electroluminescent layer 542 and the second electrode layer 543 are omitted and not shown in the diagram.

[0257] The light-emitting device shown in Figure 5 consists of a transistor 510, a capacitive element 520, and a wiring layer on a substrate 500. It has an intersection 530, and the transistor 510 is electrically connected to the light-emitting element 540. Figure 5 shows a bottom-export type light source that passes through the substrate 500 to extract light from the light-emitting element 540. It is a light-emitting device with a specific structure.

[0258] As transistor 510, any transistor shown in any of embodiments 1 to 3 is suitable. It can be used. In this embodiment, the same as the transistor 440 shown in Embodiment 1. Examples of applying transistors obtained using various structures and fabrication methods are shown.

[0259] Transistor 510 consists of gate electrode layers 511a, 511b, gate insulating film 502, and oxide semiconductor Conductive film 512, conductive layers 513a, 513 functioning as source electrode layer or drain electrode layer Includes b.

[0260] A transistor obtained with the same structure and manufacturing method as the transistor 440 shown in Embodiment 1 Sta 510 consists of conductive layers 513a and 513, which function as source electrode layer and drain electrode layer. After b is formed, the source electrode layer and drain electrode on the surface of the oxide semiconductor film 512 and in its vicinity A process is performed to remove residue present between conductive layers 513a and 513b, which function as polar layers. The residue removal process involves treatment with water or an alkaline solution, or plasma treatment. This can be done by, for example, treatment using water or TMAH solution, or by using oxygen or monoacid. Plasma treatment using nitrous oxide or a noble gas (typically argon) is preferably used. It is possible to do so. Alternatively, treatment with dilute hydrofluoric acid may be performed.

[0261] Furthermore, as shown in Embodiment 2, after the gate electrode layers 511a and 511b are formed, Remove residues caused by the etching process from the surfaces and vicinity of layers 511a and 511b. The process may be carried out. Also, as shown in Embodiment 3, gate electrode layers 511a, 511 After b is formed, a process is carried out to remove residue from the surfaces of gate electrode layers 511a and 511b and their vicinity. After the process is carried out and conductive layers 513a and 513b are formed, the surface of the oxide semiconductor film 512 and its vicinity are further treated. A step to remove residue may be performed.

[0262] This prevents the surface of the oxide semiconductor film 512 and its vicinity from being contaminated by residues. Rangista 510 is an impurity caused by the etching process on the surface of the oxide semiconductor film 512. Typical examples include halogens (e.g., chlorine, fluorine), boron, phosphorus, aluminum, iron, or The surface density of carbon is 1 × 10 13 atoms / cm 2 The following (preferably 1 × 10) 12 ato ms / cm 2 The following can be achieved. Note that the oxide semiconductor film 512 surface Impurities resulting from the chipping process (typically halogens (e.g., chlorine, fluorine), boron, phosphorus) The concentration of aluminum, iron, or carbon is 5 × 10 18 atoms / cm 3 The following (preferred) ku is 1 x 10 18 atoms / cm 3 The following can be done:

[0263] Therefore, the oxide semiconductor film 512 of this embodiment shown in Figure 5 has stable electrical characteristics. To provide a reliable semiconductor device as a semiconductor device including transistor 510. This is possible. Furthermore, it is possible to manufacture such highly reliable semiconductor devices with a high yield and improve productivity. It can be raised.

[0264] Capacitive element 520 consists of conductive layers 521a, 521b, gate insulating film 502, and oxide semiconductor film 5 22. Includes a conductive layer 523, and the conductive layers 521a, 521b and the conductive layer 523 provide gate insulation. Capacitance is formed by sandwiching film 502 and oxide semiconductor film 522.

[0265] The wiring layer intersection 530 is the intersection of the gate electrode layers 511a and 511b and the conductive layer 533. Yes, gate electrode layers 511a and 511b and conductive layer 533 are separated by gate insulating film 502. They intersect via this.

[0266] In this embodiment, the gate electrode layer 511a and the conductive layer 521a have a film thickness of 30 nm. Using a titanium film, the gate electrode layer 511b and the conductive layer 521b are made of copper with a thickness of 200 nm. Thin films are used. Therefore, the gate electrode layer has a layered structure of a titanium film and a copper thin film.

[0267] For the oxide semiconductor films 512 and 522, IGZO films with a thickness of 25 nm are used.

[0268] An interlayer insulating film 504 is present on the transistor 510, the capacitive element 520, and the wiring layer intersection 530. A color fill is formed on the interlayer insulating film 504 in the region superimposed with the light-emitting element 540. A flat layer 505 is provided. A flat surface is provided on the interlayer insulating film 504 and the color filter layer 505. An insulating film 506 that functions as an insulating film is provided.

[0269] A first electrode layer 541, an electroluminescent layer 542, and a second electrode layer 543 are stacked on the insulating film 506 in that order. A light-emitting element 540 is provided, which includes a layered stacked structure. The light-emitting element 540 and a transistor 510 refers to the opening formed in the insulating film 506 and interlayer insulating film 504 that reach the conductive layer 513a. At the mouth, the first electrode layer 541 and the conductive layer 513a are electrically connected by contact. It is continued. Furthermore, a partition wall 507 is provided so as to cover a part of the first electrode layer 541 and the opening. It's being kicked.

[0270] The interlayer insulating film 504 has an acid coating with a thickness of 200 nm to 600 nm, applied by plasma CVD. A silicon nitride film can be used. In addition, the insulating film 506 has a film thickness of 1500 nm. A photosensitive acrylic film is used, and a photosensitive polyimide film with a thickness of 1500 nm is used for the partition wall 507. It is possible.

[0271] For the color filter layer 505, for example, a translucent resin with a chromatic color can be used. As the translucent resin for coloring, photosensitive and non-photosensitive organic resins can be used, but Using a non-stick organic resin layer reduces the number of resist masks, thus simplifying the process. And it is preferable.

[0272] Chromatic colors are colors other than achromatic colors such as black, gray, and white, and the color filter layer is a colored chromatic color. It is made of a material that transmits only colored light. Colors used include red, green, and blue. It is possible to use cyan, magenta, yellow, etc. Transmitting only chromatic light means that the transmitted light in the color filter layer is limited to that chromatic color. This means that it has a peak at the wavelength of light. The color filter layer contains coloring material It is best to appropriately control the optimal film thickness by considering the relationship between the concentration and light transmittance. For example, The thickness of the filter layer 505 should be between 1500 nm and 2000 nm.

[0273] In the light-emitting device shown in Figure 6(B), the light-emitting element 4513, which is a display element, is located in the pixel section 40 It is electrically connected to transistor 4010 located at 02. Also, light-emitting element 4513 The structure consists of a laminated structure of a first electrode layer 4030, an electroluminescent layer 4511, and a second electrode layer 4031. This is a design, but it is not limited to the configuration shown. The direction of light extracted from the light-emitting element 4513, etc. Additionally, the configuration of the light-emitting element 4513 can be changed as appropriate.

[0274] Partition walls 4510 and 507 are formed using organic or inorganic insulating materials. Particularly photosensitive. Using a resin material, an opening is formed on the first electrode layers 4030, 541, and the opening It is preferable to form the side walls into inclined surfaces with a continuous curvature.

[0275] Even if the electroluminescent layers 4511 and 542 consist of a single layer, multiple layers are stacked together. It doesn't matter whether it's composed of seaweed or something else.

[0276] To prevent oxygen, hydrogen, moisture, carbon dioxide, etc. from entering the light-emitting elements 4513 and 540, A protective film may be formed on the electrode layers 4031, 543 and the partition walls 4510, 507 of the second electrode layer. As protective films, silicon nitride films, silicon oxide nitride films, DLC films, etc., can be formed. ru.

[0277] Furthermore, to prevent oxygen, hydrogen, moisture, carbon dioxide, etc. from entering the light-emitting elements 4513 and 540. A layer containing an organic compound covering the light-emitting elements 4513 and 540 may be formed by vapor deposition. .

[0278] Furthermore, it is sealed by the first substrate 4001, the second substrate 4006, and the sealing material 4005. The enclosed space is filled with a sealant 4514 and sealed. In this way, it is not exposed to the outside air. A protective film with high airtightness and minimal degassing (laminated film, UV-curing resin) It is preferable to package (enclose) the product with film or other covering material.

[0279] In addition to inert gases such as nitrogen and argon, filler material 4514 may also be ultraviolet curing resin or Thermosetting resins can be used, such as PVC (polyvinyl chloride), acrylic, and polyimide. Epoxy resin, silicone resin, PVB (polyvinyl butyrene), or EVA (ethylene Vinyl acetate can be used. For example, nitrogen can be used as a filler.

[0280] Furthermore, if necessary, a polarizing plate or circular polarizing plate (including elliptical polarizing plate) may be placed on the emission surface of the light-emitting element. You may also appropriately incorporate optical films such as phase difference plates (λ / 4 plate, λ / 2 plate) and color filters. Furthermore, an anti-reflective coating may be provided on the polarizing plate or circular polarizing plate. For example, by the surface irregularities An anti-glare treatment can be applied to diffuse reflected light and reduce glare.

[0281] Furthermore, it is also possible to provide electronic paper that drives electronic ink as a display device. Electronic paper is also called an electrophoretic display device (electrophoretic display), and it is a paper-like material. It offers the same readability, lower power consumption compared to other display devices, and a thin and light form factor. It has the advantage of being such.

[0282] Electrophoresis display devices can take various forms, but one is a first particle with a positive charge and A microcapsule containing a second particle having a negative charge is divided into multiple parts in the solvent or solute. It is dispersed, and by applying an electric field to the microcapsules, the microcapsules This device moves particles in a circle in opposite directions and displays only the color of the particles that have gathered on one side. Furthermore, the first or second particle contains dye and moves in the absence of an electric field. It does not exist. Also, the color of the first particle and the color of the second particle are different (including colorless). do.

[0283] Thus, electrophoretic devices can detect the movement of substances with high dielectric constants into high electric field regions. This display utilizes a mild dielectrophoretic effect.

[0284] When the above microcapsules are dispersed in a solvent, it is called an electronic ink. This electronic ink can be printed on surfaces such as glass, plastic, fabric, and paper. Color display is also possible by using color filters or particles containing pigments.

[0285] Furthermore, the first and second particles in the microcapsules are made of conductive material, insulating material, Semiconductor materials, magnetic materials, liquid crystal materials, ferroelectric materials, electroluminescent materials, electro Using one type of material selected from trochromic materials, magnetophoretic materials, or a composite material thereof. Just be there.

[0286] Furthermore, a display device using the twist ball display method can also be applied as electronic paper. Yes, it is possible. The twist ball display method uses spherical particles painted in white and black as display elements. It is placed between the first electrode layer and the second electrode layer, which are the electrode layers to be used. This method displays information by generating a potential difference in the electrode layer to control the orientation of spherical particles. be.

[0287] In Figures 4 to 6, the first substrates 4001 and 500 and the second substrate 4006 are referred to as In addition to glass substrates, flexible substrates can also be used, for example, light-transmitting substrates. Plastic substrates can be used. Examples of plastics include FRP (Fiber Reinforced Plastic). Glass-reinforced plastics) sheet, PVF (polyvinyl fluorine) A acrylic film, polyester film, or acrylic resin film can be used. Also, if light transmission is not required, a metal substrate such as aluminum or stainless steel (metal f You may use film. For example, aluminum foil can be replaced with PVF film or polyester It is also possible to use a sheet with a structure sandwiched between films.

[0288] In this embodiment, an aluminum oxide film is used as the insulating film 4020. Insulating film 4020 These can be formed by sputtering or plasma CVD.

[0289] The aluminum oxide film provided as an insulating film 4020 on the oxide semiconductor film contains hydrogen and moisture. It has a high barrier effect (blocking effect) that prevents both impurities and oxygen from passing through the membrane. stomach.

[0290] Therefore, the aluminum oxide film is subject to fluctuations in hydrogen during and after the manufacturing process. The inclusion of impurities such as moisture into oxide semiconductor films, and the main component materials that make up the oxide semiconductors It functions as a protective film that prevents the release of certain oxygen atoms from the oxide semiconductor film.

[0291] Furthermore, insulating films 4021 and 506, which function as planarizing insulating films, are made of acrylic resin, polyimi. Heat-resistant organic materials such as benzocyclobutene resins, polyamide resins, and epoxy resins. Materials can be used. In addition to the above organic materials, low dielectric constant materials (low-k materials) can also be used. Siloxane resins, PSG (phosphorusilicate glass), BPSG (limboron glass), etc. These can be used. Furthermore, by stacking multiple insulating films formed from these materials... An insulating film may be formed.

[0292] The method for forming the insulating films 4021 and 506 is not particularly limited and depends on the material, such as sputtering. Inkjet method, SOG method, spin coating, dip coating, spray coating, droplet ejection method (inkjet) Laws and regulations, printing methods (screen printing, offset printing, etc.), doctor knife, roll coater - Curtain coaters, knife coaters, etc. can be used.

[0293] A display device displays images by transmitting light from a light source or display element. Therefore, the pixels through which light is transmitted. The thin films provided in the section, such as substrates, insulating films, and conductive films, are all sensitive to light in the visible light wavelength range. It should be translucent.

[0294] A first electrode layer and a second electrode layer (pixel electrode layer, common electrode layer, pair) that apply voltage to the display element. In the electrode layer (also called the direct electrode layer), the direction of the light to be extracted, the location where the electrode layer is provided, and Transmittance and reflectivity can be selected based on the pattern structure of the electrode layer.

[0295] The first electrode layers 4030, 541 and the second electrode layers 4031, 543 contain tungsten oxide. Contains indium oxide, indium zinc oxide containing tungsten oxide, and titanium oxide. Indium oxide, indium tin oxide containing titanium oxide, indium tin oxide (hereinafter (Indicated as ITO.) Indium zinc oxide, silicon oxide-added indium tin oxide. A transparent conductive material such as graphene can be used.

[0296] Furthermore, the first electrode layers 4030, 541 and the second electrode layers 4031, 543 are made of tungsten. W), molybdenum (Mo), zirconium (Zr), hafnium (Hf), vanadium ( V), niobium (Nb), tantalum (Ta), chromium (Cr), cobalt (Co), nickel Ni (Ni), Titanium (Ti), Platinum (Pt), Aluminum (Al), Copper (Cu), Silver ( Using one or more metals such as Ag, or their alloys, or their metal nitrides It can be formed.

[0297] In this embodiment, the light-emitting device shown in Figure 5 is a bottom-extrusion type, so the first electrode layer 541 The first electrode layer 541 is translucent, and the second electrode layer 543 is reflective. Therefore, the metal film When using this, the film thickness should be thin enough to maintain light transmission, and the second electrode layer 543 should have light transmission When using an electrical film, it is advisable to laminate a conductive film that has reflective properties.

[0298] Furthermore, the first electrode layers 4030, 541 and the second electrode layers 4031, 543 are made of highly conductive material. It can be formed using a conductive composition containing molecules (also called conductive polymers). As the electrochemical polymer, so-called π-electron conjugated conductive polymers can be used. , polyaniline or its derivatives, polypyrrole or its derivatives, polythiophene or its A derivative, or a copolymer consisting of two or more of aniline, pyrrole, and thiophene. Examples include its derivatives.

[0299] Furthermore, transistors are susceptible to damage from static electricity, etc., therefore, a protection circuit for the drive circuit is necessary. It is preferable to provide this. The protection circuit is preferably constructed using nonlinear elements.

[0300] As described above, by applying the transistor shown in any of Embodiments 1 to 3, We can provide semiconductor devices with various functions.

[0301] The configurations and methods shown in this embodiment may be combined with the configurations and methods shown in other embodiments as appropriate. They can be used together.

[0302] (Embodiment 5) Information about the object is read using the transistor shown in any of Embodiments 1 to 3. A semiconductor device with an image sensor function can be fabricated.

[0303] Figure 7(A) shows an example of a semiconductor device having an image sensor function. This is the equivalent circuit of the photosensor, and Figure 7(B) is a cross-sectional view showing a part of the photosensor.

[0304] Photodiode 602 has one electrode connected to the photodiode reset signal line 658, and the other electrode connected to the photodiode reset signal line 658. One electrode is electrically connected to the gate of transistor 640. Transistor 640 In this case, either the source or the drain is connected to the photosensor reference signal line 672, and the source or drain The other end is electrically connected to either the source or the drain of transistor 656. The transistor 656 has its gate connected to the gate signal line 659, and the other of its source or drain connected to the gate signal line 659. It is electrically connected to the sensor output signal line 671.

[0305] Furthermore, in the circuit diagrams in this specification, transistors using oxide semiconductor films are clearly defined. To make it clear, the symbol for a transistor using an oxide semiconductor film is written as "OS". In Figure 7(A), transistors 640 and 656 are of Embodiment 1. A transistor can be applied to any of the transistors shown in any of the three above, and a transistor using an oxide semiconductor film. In this embodiment, the structure is similar to that of the transistor 440 shown in Embodiment 1 and This section shows an example of applying transistors obtained using the fabrication method.

[0306] Figure 7(B) shows the photodiode 602 and transistor 640 in the photosensor. This is a cross-sectional view showing a substrate 601 (TFT substrate) having an insulating surface, which functions as a sensor. A photodiode 602 and a transistor 640 are provided. A substrate 613 is provided on top of transistor 640 using an adhesive layer 608. ru.

[0307] An insulating film 631, an interlayer insulating film 633, and an interlayer insulating film 634 are provided on the transistor 640. The photodiode 602 is provided on the interlayer insulating film 633, and the interlayer insulating film 63 3 Electrode layers 641a, 641b formed on and electrode layer 6 provided on interlayer insulating film 634 Between 42, the first semiconductor film 606a and the second semiconductor film 606 are arranged in order from the interlayer insulating film 633 side. It has a structure in which b and a third semiconductor film 606c are stacked.

[0308] The electrode layer 641b is electrically connected to the conductive layer 643 formed in the interlayer insulating film 634, and the electrode Layer 642 is electrically connected to the conductive layer 645 via electrode layer 641a. Conductive layer 645 It is electrically connected to the gate electrode layer of transistor 640, and photodiode 60 Point 2 is electrically connected to transistor 640.

[0309] Here, the first semiconductor film 606a is a semiconductor film having a p-type conductivity, and the second semiconductor film 606b is a high-resistance semiconductor film (i-type semiconductor film), and the third semiconductor film 606c is an n-type This example illustrates a pin-type photodiode in which conductive semiconductor films are stacked.

[0310] The first semiconductor film 606a is a p-type semiconductor film, and is an amorphous film containing impurity elements that impart p-type properties. It can be formed by a recon film. The formation of the first semiconductor film 606a involves impurities from group 13. Using a semiconductor material gas containing an element (e.g., boron (B)), the shape is formed by plasma CVD. To achieve this, silane (SiH4) can be used as the semiconductor material gas. Alternatively, Si2H 6. SiH2Cl2, SiHCl3, SiCl4, SiF4, etc. may also be used. After forming an amorphous silicon film that does not contain pure elements, the diffusion method or ion implantation method is used to... Impurity elements may be introduced into the amorphous silicon film. The impurity elements may be introduced by ion implantation or other methods. It is advisable to diffuse impurity elements by heating after insertion. In this case, amorphous silicon Methods for forming the film include LPCVD, vapor phase growth, or sputtering. It can be used as is. The thickness of the first semiconductor film 606a is formed to be between 10 nm and 50 nm. It is preferable to do so.

[0311] The second semiconductor film 606b is an i-type semiconductor film (intrinsic semiconductor film) and is made of amorphous silicon. The second semiconductor film 606b is formed using a semiconductor material gas to form amorphous silicon. The film is formed by plasma CVD. Silane (SiH4) is used as the semiconductor material gas. You can use this. Alternatively, you can use Si2H6, SiH2Cl2, SiHCl3, SiCl4, S iF4 or the like may be used. The formation of the second semiconductor film 606b is by LPCVD, vapor phase growth, This can also be done by sputtering or other methods. The thickness of the second semiconductor film 606b is 200 nm or more. It is preferable to form it so that the wavelength is 1000 nm or less.

[0312] The third semiconductor film 606c is an n-type semiconductor film, and is amorphous, containing impurity elements that confer n-type properties. It is formed by a silicon film. The formation of the third semiconductor film 606c requires impurity elements from Group 15 (e.g. For example, it is formed by plasma CVD using a semiconductor material gas containing phosphorus (P). Silane (SiH4) can be used as the conductive material gas. Alternatively, Si2H6, SiH 2Cl2, SiHCl3, SiCl4, SiF4, etc. may also be used. Furthermore, impurity elements may be used. After forming an amorphous silicon film that does not contain the amorphous silicon, the amorphous silicon is subjected to diffusion or ion implantation. Impurity elements may be introduced into the film. It is advisable to diffuse impurity elements by heating or other means. In this case, an amorphous silicon film is formed. Methods for achieving this include LPCVD, vapor phase growth, or sputtering. i. The thickness of the third semiconductor film 606c shall be formed to be between 20 nm and 200 nm. It is preferable.

[0313] Furthermore, the first semiconductor film 606a, the second semiconductor film 606b, and the third semiconductor film 606c are non It may be formed using a polycrystalline semiconductor instead of a crystalline semiconductor, or microcrystalline (semi-amorphous) semiconductor. Semi-Amorphous Semiconductor (SAS) semiconductor It may be formed using this method.

[0314] Furthermore, because the mobility of holes generated by the photoelectric effect is smaller than that of electrons, the pin-type Photodiodes exhibit better characteristics when the p-type semiconductor film side is the light-receiving surface. Here, p From the surface of the substrate 601 on which the in-type photodiode is formed, the photodiode 602 This example shows how to convert light received by a device into an electrical signal. It also shows the opposite conductivity to the semiconductor film side that acts as the light-receiving surface. Since light from the semiconductor film side with a specific pattern becomes ambient light, the electrode layer uses a conductive film with light-shielding properties. It would be good to have one. Also, the n-type semiconductor film side can be used as the light-receiving surface.

[0315] Insulating materials are used for insulating film 631, interlayer insulating film 633, and interlayer insulating film 634. Depending on the material, sputtering, plasma CVD, SOG, spin coating, and D Dropping, spray coating, droplet ejection (inkjet method, etc.), printing methods (screen printing, etc.) It can be formed using methods such as fret printing.

[0316] As insulating film 631, as an inorganic insulating material, silicon oxide layer, silicon oxide nitride layer, An oxide insulating film such as an aluminum oxide layer or an aluminum oxide nitride layer, or a silicon nitride layer. , nitrides such as silicon nitride layer, aluminum nitride layer, or aluminum nitride layer A single-layer or multi-layer insulating film can be used.

[0317] In this embodiment, an aluminum oxide film is used as the insulating film 631. The insulating film 631 is It can be formed by puttering or plasma CVD.

[0318] The aluminum oxide film provided as an insulating film 631 on the oxide semiconductor film is resistant to hydrogen and moisture. It has a high barrier effect (blocking effect) that prevents both impurities and oxygen from passing through the membrane. .

[0319] Therefore, the aluminum oxide film is subject to fluctuations in hydrogen during and after the manufacturing process. The inclusion of impurities such as moisture into oxide semiconductor films, and the main component materials that make up the oxide semiconductors It functions as a protective film that prevents the release of certain oxygen atoms from the oxide semiconductor film.

[0320] The interlayer insulating films 633 and 634 function as planar insulating films to reduce surface irregularities. An insulating film is preferred. Examples of interlayer insulating films 633 and 634 include polyimide and acrylic. Heat-resistant organic resins such as resins, benzocyclobutene resins, polyamides, and epoxy resins. Insulating materials can be used. In addition to the above organic insulating materials, low dielectric constant materials (low- k material), siloxane resin, PSG (phosphorusilicate glass), BPSG (phosphoboron A single layer or a laminate of silicate glass or the like can be used.

[0321] By detecting the light incident on the photodiode 602, information about the detected object can be read. This is possible. Furthermore, when reading information about the detected object, a light source such as a backlight is used. It is possible.

[0322] A transistor obtained with the same structure and manufacturing method as the transistor 440 shown in Embodiment 1 After forming the source electrode layer and drain electrode layer, the sta 640 is processed on the oxide semiconductor film surface and its vicinity. The process involves removing any residue present between the source electrode layer and the drain electrode layer. The residue removal process involves treatment with water or an alkaline solution, or plasma treatment. This can be done by, for example, treatment using water or TMAH solution, or oxygen or carbon dioxide. Plasma treatment using dinitrogen or a noble gas (typically argon) is preferably used. This can be done. Alternatively, treatment using dilute hydrofluoric acid may be performed.

[0323] Furthermore, as shown in Embodiment 2, after the gate electrode layer is formed, the surface and vicinity of the gate electrode layer A step may be performed to remove residue caused by the etching process. As shown in 3, after the gate electrode layer is formed, remove any residue from the surface of the gate electrode layer and its vicinity. After performing the removal process and further forming the source electrode layer and drain electrode layer, the oxide semiconductor film surface and A step may be taken to remove any residue in the vicinity of the said object.

[0324] This prevents the oxide semiconductor film surface and its vicinity from being contaminated by residues, thus preventing transients The stage 640 can reduce the surface density of impurities (typically, halogens (e.g., chlorine, fluorine), boron, phosphorus, aluminum, iron, or carbon) resulting from the etching process on the surface of the oxide semiconductor 13 film to 1×10 2 atoms / cm 12 or less (preferably 1×10 2 atoms / cm or less). Note that the density of impurities (typically, halogens (e.g., chlorine, fluorine), boron, phosphorus, aluminum, iron, 18 or carbon) resulting from the etching process on the surface of the oxide 3 semiconductor film can be reduced to 5×10 18 a toms / cm 3 or less (preferably 1×10

[0325] atoms / cm or less). Therefore, a highly reliable semiconductor device including a transistor

[0326] 640 having stable electrical characteristics using the oxide semiconductor film of this embodiment can be provided. Also, a highly reliable

[0327] (Embodiment 6) The semiconductor device disclosed in this specification can be applied to various electronic devices (including gaming machines). Examples of the electronic devices include television devices (also referred to as TVs or television receivers), monitors for computers, Examples include (pachinko machines, slot machines, etc.) and game cabinets. Specific examples of these electronic devices include An example is shown in Figure 8.

[0328] Figure 8(A) shows table 9000 having a display unit. Table 9000 is a housing The body 9001 incorporates a display unit 9003, which displays images. This is possible. Note that the configuration shown is one in which the housing 9001 is supported by four legs 9002. It also has a power cord 9005 for power supply attached to the casing 9001.

[0329] The semiconductor device shown in any of Embodiments 1 to 5 can be used in the display unit 9003. This allows for high reliability in electronic devices.

[0330] The display unit 9003 has a touch input function, and the display unit 9003 of table 9000 By touching the displayed button 9004 with your finger, you can operate the screen or input information. This enables communication with or control of other home appliances, and the screen It may also be used as a control device to control other home appliances through operation. For example, in one embodiment... Using the semiconductor device having the image sensor function shown in 5, the display unit 9003 can be touched. It can be equipped with an input function.

[0331] Furthermore, a hinge provided on the housing 9001 allows the screen of the display unit 9003 to be lowered relative to the floor. It can stand upright and can also be used as a television set. In a small room, Installing a large-screen television set reduces the available space, but it can be placed on a table. If the display unit is built-in, the space in the room can be used more effectively.

[0332] Figure 8(B) shows the television equipment 9100. The television equipment 9100 is, The housing 9101 incorporates a display unit 9103, and the display unit 9103 displays video. It is possible to do so. In this example, the housing 9101 is supported by the stand 9105. It shows success.

[0333] The television unit 9100 is operated using the control switches on the housing 9101 and a separate remote control. This can be done using the control unit 9110. The control keys provided by the remote control unit 9110 9109 allows you to control the channel and volume, and the information is displayed on the display unit 9103. The video can be controlled. Furthermore, the remote control unit 9110 can be controlled by the remote control unit. A display unit 9107 may be provided to display the information output from 9110.

[0334] The television system 9100 shown in Figure 8(B) includes a receiver, modem, and other components. The vision device 9100 can receive general television broadcasts using its receiver, and further By connecting to a wired or wireless communication network via a modem, one-way communication is possible. Information from sender to receiver or bidirectional (between sender and receiver, or between receivers, etc.) It is also possible to communicate with others.

[0335] The semiconductor device shown in any of Embodiments 1 to 5 is used for the display units 9103 and 9107. This makes it possible to provide high reliability to television equipment and remote control devices. It is possible.

[0336] Figure 8(C) shows a computer, consisting of the main unit 9201, the casing 9202, the display unit 9203, and the keys. Includes board 9204, external connection port 9205, pointing device 9206, etc.

[0337] The semiconductor device shown in any of Embodiments 1 to 5 can be used in the display unit 9203. This makes it possible to create a highly reliable computer.

[0338] Figures 9(A) and 9(B) show a foldable tablet device. Figure 9(A) is open In this state, the tablet terminal consists of a housing 9630, a display unit 9631a, and a display unit 963 1b, Display mode switch 9034, Power switch 9035, Power saving mode off It includes a replacement switch 9036, a fastener 9033, and an operating switch 9038.

[0339] The semiconductor device shown in any of Embodiments 1 to 5 includes a display unit 9631a and a display unit 9631 It can be used in (b), making it possible to create a highly reliable tablet device.

[0340] The display unit 9631a can be partially designated as a touch panel area 9632a, and the display will be Data can be entered by touching the operation key 9638. Note that the display unit 963 In 1a, as an example, one half of the area has a display-only function, and the other half of the area The diagram shows a configuration that includes touch panel functionality, but is not limited to this configuration. Display unit 963 The entire area of ​​1a may also be configured to have touch panel functionality. For example, the display unit 96 The entire surface of 31a is used as a touch panel with keyboard buttons, and the display unit 9631b is displayed. It can be used as a screen.

[0341] Furthermore, in the display unit 9631b, similar to the display unit 9631a, a part of the display unit 9631b This can be designated as the touch panel area 9632b. Also, the touch panel keyboard... By touching the location where the display switch button 9639 is displayed with your finger or stylus, Keyboard buttons can be displayed on the display unit 9631b.

[0342] Furthermore, touch panel area 9632a and touch panel area 9632b can be touched simultaneously. You can also input text.

[0343] Additionally, the display mode switch 9034 switches the display orientation, such as portrait or landscape. You can switch between black and white and color displays. Power saving mode switch. The 9036 uses a built-in light sensor in the tablet device to detect ambient light during use. The display brightness can be optimized according to the amount of light. The tablet device uses a light sensor. In addition, it incorporates other detection devices such as gyroscopes, accelerometers, and other sensors that detect tilt. It's okay to store it.

[0344] Furthermore, Figure 9(A) shows an example where the display area of ​​display unit 9631b and display unit 9631a are the same. However, this is not particularly limited, and one size may be different from the other, as indicated. The quality can also differ. For example, one display panel can display a higher resolution image than the other. You may do so.

[0345] Figure 9(B) shows the closed state, and the tablet terminal consists of a housing 9630 and a solar cell 963 3. It includes a charge / discharge control circuit 9634, a battery 9635, and a DC-DC converter 9636. In addition, Figure 9(B) shows an example of a charge / discharge control circuit 9634, with battery 9635 and D This shows a configuration that includes a CDC converter 9636.

[0346] Since the tablet device is foldable, the casing 9630 can be closed when not in use. Therefore, the display units 9631a and 9631b can be protected, thus providing durability. We can provide tablet devices that are highly durable and reliable from the perspective of long-term use.

[0347] In addition, the tablet devices shown in Figures 9(A) and 9(B) can also display various information. Functions to display still images, videos, text images, etc., calendar, date or time, etc. A touch input device that displays information on a display unit and allows users to perform touch input operations or edit the information displayed on the display unit. It has the ability to control processing through various software (programs), etc. can.

[0348] The solar cell 9633 mounted on the surface of the tablet device powers the touch panel. It can be supplied to the display unit or the video signal processing unit, etc. Note that the solar cell 9633 is housed in a casing. It can be provided on one or both sides of the body 9630, and efficiently charges the battery 9635. This configuration can be implemented. Note that the battery 9635 is a lithium-ion battery. Using it offers advantages such as enabling miniaturization.

[0349] Furthermore, the configuration and operation of the charge / discharge control circuit 9634 shown in Figure 9(B) are shown in Figure 9(C). A block diagram will be shown and explained. Figure 9(C) shows the solar cell 9633, battery 9635, DC-DC converter 9636, converter 9637, switches SW1 to SW3, display unit This refers to 9631, battery 9635, DCDC converter 9636, and The converter 9637 and switches SW1 to SW3 are connected to the charge / discharge control circuit 963 shown in Figure 9(B). This corresponds to section 4.

[0350] First, let's explain an example of operation when electricity is generated by the solar cell 9633 using ambient light. The electricity generated by the solar panel is converted to a DCD (Digital-to-Collar) voltage to charge the 9635 battery. The C converter 9636 performs either a boost or a buck. Then, the display unit 9631 operates in accordance with the solar power. When power from battery 9633 is used, switch SW1 is turned ON, and converter 96 At step 37, the voltage is increased or decreased to the voltage required for the display unit 9631. Also, the display unit 96 If you do not want to display on 31, turn SW1 off and SW2 on and set the battery 96 A configuration that allows for 35 charges would be appropriate.

[0351] The solar cell 9633 is shown as an example of a power generation method, but it is not particularly limited to this method. Other power generation methods such as electrical elements (piezo elements) and thermoelectric elements (Peltier elements) The configuration may also include charging the Terry 9635. For example, power can be transmitted and received wirelessly (contactlessly). This configuration involves a contactless power transmission module that charges via a wireless connection, or a combination of other charging methods. That is also acceptable.

[0352] The configurations and methods shown in this embodiment may be combined with the configurations and methods shown in other embodiments as appropriate. They can be used together. [Examples]

[0353] This example shows the results of a residue removal process performed on the metal film surface and the oxide semiconductor film surface. .

[0354] As a sample, an oxide semiconductor film with a ratio of In:Ga:Zn=3:1:2 was prepared on a silicon substrate. Using a sputtering method with an oxide target of [number of particles], a 50nm film thickness IGZO was produced. A film was formed. The deposition conditions were argon and oxygen (argon:oxygen = 30 sccm:15s). Under a ccm atmosphere, with a pressure of 0.4 Pa, a power supply of 0.5 kW, and a substrate temperature of 200°C, the experiment was conducted.

[0355] Next, the oxide semiconductor film is etched using the dry etching method (etching conditions: E Switching gas (BCl3:Cl2 = 60 sccm:20 sccm), ICP power supply 45 Sample A-1 was prepared using 0W, a bias power of 100W, and a pressure of 1.9Pa.

[0356] After etching, sample A-2 was prepared by further water treatment.

[0357] Plasma treatment using oxygen was performed on the IGZO film after water treatment (conditions: gas (O2 = 300 scc)). Sample B-1 was prepared by (m) using a power supply of 1800W, a pressure of 66.5Pa, and 3 minutes. Plasma treatment using nitrous oxide was performed on the IGZO film after processing (conditions: gas (N2O=20 (0 sccm), Power supply 100W, Power supply frequency 27MHz, Pressure 40Pa, Board temperature 35 Sample B-2 was prepared by performing the procedure at 0°C for 25 minutes. The IGZO film after water treatment was then treated with TMAH solution. Sample B-3 was prepared by performing the following treatment (conditions: 50°C, 60 seconds). IGZO film after water treatment. Treatment with ammonia peroxide (H2O:ammonia:hydrogen peroxide = 2:2:5) (room Sample B-4 was prepared by heating (10 seconds). After water treatment, the IGZO film was subjected to a plastic treatment using oxygen. Zuma treatment (Conditions: Gas (O2 = 200 sccm), Power supply 100W, Power supply frequency 27M) Sample B-5 was prepared by performing a test at Hz, pressure of 40 Pa, substrate temperature of 350°C, for 2 minutes. Samples B-1 and B-5 were subjected to plasma treatment using oxygen under different processing conditions.

[0358] Total Reflection X-ray Fluorescence The surface density of chlorine on the film surface of samples A-1, A-2, B-1 to B-5 was determined by nce) analysis. The results of the measurements are shown in Tables 1 and 2.

[0359] [Table 1]

[0360] [Table 2]

[0361] In A-1, where no residue removal process was performed after dry etching, After the process, the surface density of chlorine on the IGZO film surface increases significantly, but dry etching is performed. In A-2, where water treatment was performed after ing, the surface density of chlorine on the surface of the IGZO film increased. It can be confirmed that the burden has been reduced.

[0362] Furthermore, plasma treatment using nitrous oxide, treatment with TMAH solution, and ammonia hydrogenated water B-1 to B In step -5, after the residue removal process, the surface density of chlorine on the surface of the IGZO film is 1 × 10⁻⁶. 13 atoms / cm 2 The following is true: chlorine is removed more effectively, and the increase in surface density of chlorine is suppressed. It can be confirmed that this was done.

[0363] Next, as a sample, a metal film with a thickness of 200 nm was applied to a glass substrate by sputtering. Tungsten (W) film (deposition conditions: under an argon (80 sccm) atmosphere, at a pressure of 0.8p) (a) A film was deposited using a power supply of 1kW and a substrate temperature of 230°C.

[0364] Next, the tungsten film is etched using the dry etching method (etching conditions: E Matching gas (CF4:Cl2:O2 = 25 sccm:25 sccm:10 sccm), ICP (power supply 500W, bias power 100W, pressure 1.0Pa) was used, and the film thickness was approximately 50 nm was etched.

[0365] After etching, water treatment was performed.

[0366] Plasma treatment using oxygen was performed on the tungsten film after water treatment (conditions: gas (O2) = 300s). Sample C-1 was prepared by performing a ccm (c1cm) cycle with a power supply of 1800W and a pressure of 66.5Pa for 3 minutes. Plasma treatment using nitrous oxide on the tungsten film after water treatment (conditions: gas (N2 O=200 sccm), Power supply 100W, Power supply frequency 27MHz, Pressure 40Pa, Substrate Sample C-2 was prepared by performing a procedure at 350°C for 25 minutes. The tungsten film after water treatment was then treated with T Sample C-3 was prepared by treatment with MAH solution (conditions: 50°C, 60 seconds). After water treatment... On the tungsten membrane, ammonia peroxide (H2O:ammonia:hydrogen peroxide = 2:2:5 Sample C-4 was prepared by processing with (room temperature, 10 seconds). Tungsten film after water treatment Plasma treatment using oxygen (Conditions: Gas (O2 = 200 sccm), Power supply 100) (W, power frequency 27MHz, pressure 40Pa, substrate temperature 350℃, 2 minutes) Sample C-5 Samples were prepared. Samples C-1 and C-5 were subjected to plasma treatment using oxygen under different processing conditions. That is logical.

[0367] The surface density of chlorine on the film surface of samples C-1 to C-5 was measured by total internal reflection X-ray fluorescence analysis. The results are shown in Table 3.

[0368] [Table 3]

[0369] Dry etching, followed by water treatment, plasma treatment using nitrous oxide, and then TMAH solution The residue removal process involves treatment with ammonia hydrochloride, or plasma treatment using oxygen. In steps C-1 to C-5, after the residue removal process, the surface of the tungsten film was treated as follows: The surface density of chlorine is 1 × 10⁻⁶ 13 atoms / cm 2 The following is true, and chlorine is removed. It can be confirmed that the increase in surface density was suppressed.

[0370] Based on the above results, water treatment, plasma treatment using nitrous oxide, and treatment with TMAH solution are considered. Residue removal processes such as treatment with ammonia hydrochloride or plasma treatment using oxygen are, It was confirmed that this process has the effect of reducing the concentration of impurities on the film surface caused by the etching process. . [Explanation of symbols]

[0371] 400 circuit boards 401 Guard Layer 402 Gate Insulator 403 Oxide semiconductor film 405a Source electrode layer 405b Drain electrode layer 407 Insulating film 420 transistors 430 transistors 440 transistors 441 Conductive film 442 Resist Mask 443 Gas 445 Conductive film 447 Gas 448a Resist Mask 448b Resist Mask 500 circuit boards 502 Gate Insulator 504 Interlayer insulating film 505 Color Filter Layer 506 Insulating film 507 Bulkhead 510 transistors 511a Gridgate layer 511b Grid gate layer 512 Oxide semiconductor film 513a conductive layer 513b Conductive layer 520 Capacitive elements 521a conductive layer 521b Conductive layer 522 Oxide semiconductor film 523 Conductive layer 530 Wiring layer intersection 533 Conductive layer 540 light-emitting elements 541 Electrode layer 542 Electroluminescent layer 543 Electrode layer 601 circuit board 602 Photodiode 606a Semiconductor film 606b Semiconductor film 606c semiconductor film 608 Adhesive layer 613 circuit board 631 Insulating film 633 Interlayer insulating film 634 Interlayer insulating film 640 transistors 641a Electrode layer 641b Electrode layer 642 Electrode layer 643 Conductive layer 645 Conductive layer 656 transistors 658 Photodiode reset signal line 659 Gate signal line 671 Photosensor output signal line 672 Photosensor Reference Signal Line 4001 circuit board 4002 pixel section 4003 Signal Line Drive Circuit 4004 Scan Line Drive Circuit 4005 Sealant 4006 circuit board 4008 Liquid Crystal Layer 4010 Transistor 4011 Transistor 4013 Liquid crystal element 4015 Connection terminal electrode 4016 Terminal electrode 4018 FPC 4018a FPC 4018b FPC 4019 Anisotropic conductive film 4020 Insulating film 4021 Insulating film 4030 Electrode layer 4031 Electrode layer 4032 Insulating film 4033 Insulating film 4035 Spacer 4510 Bulkhead 4511 Electroluminescent layer 4513 Light-emitting element 4514 Filling material 9000 Table 9001 enclosure 9002 Legs 9003 Display section 9004 Display button 9005 Power Cord 9033 Fastener 9034 Switch 9035 Power switch 9036 Switch 9038 Operation switch 9100 Television equipment 9101 enclosure 9103 Display section 9105 Stand 9107 Display section 9109 Operation Keys 9110 Remote Control Unit 9201 Main Unit 9202 enclosure 9203 Display section 9204 Keyboard 9205 External connection port 9206 Pointing device 9630 cabinet 9631 Display section 9631a Display section 9631b Display section 9632a area 9632b area 9633 Solar Cell 9634 Charge / Discharge Control Circuit 9635 Battery 9636 DC-DC converter 9637 Converter 9638 Operation Keys 9639 button

Claims

1. A display device having a transistor and a capacitive element electrically connected to the transistor in each pixel, In the planar view of the aforementioned single pixel, A first conductive layer having the function of a gate electrode of the transistor, A second conductive layer having the same material as the first conductive layer and functioning as one electrode of the capacitive element, A first insulating layer having a region in contact with the upper surface of the first conductive layer and a region in contact with the upper surface of the second conductive layer, An oxide semiconductor layer having a region that overlaps with the first conductive layer and having a channel formation region for the transistor, A third conductive layer having a region located on the oxide semiconductor layer and functioning as one of the source electrode and drain electrode of the transistor, A fourth conductive layer having a region located on the oxide semiconductor layer and functioning as the other of the source electrode and drain electrode of the transistor, A fifth conductive layer having the same material as the third conductive layer and the fourth conductive layer, and overlapping with the second conductive layer, A sixth conductive layer having the same material as the third and fourth conductive layers and having a region extending in a first direction which is the same direction as the channel length direction of the transistor, A second insulating layer having a region in contact with the upper surface of the third conductive layer, a region in contact with the upper surface of the fourth conductive layer, a region in contact with the upper surface of the fifth conductive layer, and a region in contact with the upper surface of the sixth conductive layer, A seventh conductive layer having a region located on the second insulating layer and functioning as a pixel electrode, The fifth conductive layer functions as the other electrode of the capacitive element. The first conductive layer has a region extending in a second direction intersecting the first direction, The sixth conductive layer does not overlap with the oxide semiconductor layer, and does overlap with the first conductive layer. A display device in which, in a plan view, the portion where the sixth conductive layer and the first conductive layer overlap and the channel formation region of the transistor are arranged side by side along the second direction.

2. A display device having a transistor and a capacitive element electrically connected to the transistor in each pixel, In the planar view of the aforementioned single pixel, A first conductive layer having the function of a gate electrode of the transistor, A second conductive layer having the same material as the first conductive layer and functioning as one electrode of the capacitive element, A first insulating layer having a region in contact with the upper surface of the first conductive layer and a region in contact with the upper surface of the second conductive layer, A first oxide semiconductor layer having a region that overlaps with the first conductive layer and having a channel formation region for the transistor, A second oxide semiconductor layer having a region that overlaps with the second conductive layer and having the same material as the first oxide semiconductor layer, A third conductive layer having a region located on the first oxide semiconductor layer and functioning as one of the source electrode and drain electrode of the transistor, A fourth conductive layer having a region located on the first oxide semiconductor layer and functioning as the other of the source electrode and drain electrode of the transistor, A fifth conductive layer having the same material as the third conductive layer and the fourth conductive layer, and having a region located above the second oxide semiconductor layer, A sixth conductive layer having the same material as the third and fourth conductive layers and having a region extending in a first direction which is in the same direction as the channel length of the transistor, A second insulating layer having a region in contact with the upper surface of the third conductive layer, a region in contact with the upper surface of the fourth conductive layer, a region in contact with the upper surface of the fifth conductive layer, and a region in contact with the upper surface of the sixth conductive layer, A seventh conductive layer having a region located on the second insulating layer and functioning as a pixel electrode, The fifth conductive layer functions as the other electrode of the capacitive element. The first conductive layer has a region extending in a second direction intersecting the first direction, The sixth conductive layer does not overlap with the first oxide semiconductor layer and the second oxide semiconductor layer, and does overlap with the first conductive layer. A display device in which, in a plan view, the portion where the sixth conductive layer and the first conductive layer overlap and the channel formation region of the transistor are arranged side by side along the second direction.

3. In claim 1 or 2, In a plan view, the channel formation region of the transistor does not have a region located between the third conductive layer and the sixth conductive layer. In a plan view, the channel-forming region of the transistor does not have a region located between the fourth conductive layer and the sixth conductive layer, in a display device.

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