Method for generating unique information of a semiconductor device, method for managing unique information of a semiconductor device, and manufacturing apparatus for a semiconductor device.
By identifying and utilizing grain patterns on a semiconductor device's metal film in multiple stages, unique information is generated without structural changes, enhancing versatility and enabling efficient chip identification and management.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- MITSUBISHI ELECTRIC CORP
- Filing Date
- 2023-02-28
- Publication Date
- 2026-06-26
AI Technical Summary
Existing methods for generating unique information on semiconductor devices require additional structural modifications, such as forming a reading area or mounting memory elements, limiting their versatility.
A method that identifies a first reading area on a metal film of a semiconductor device, extracts grains within this area, and generates unique information based on the appearance of grains in a second, smaller reading area, without requiring structural modifications.
Enables the extraction of unique information in a highly versatile manner, allowing identification of each semiconductor device without altering its structure, and supports efficient retrieval and management of chip-specific information.
Smart Images

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Abstract
Description
Technical Field
[0001] The present disclosure relates to the generation and management of unique information for each semiconductor device.
Background Art
[0002] In the manufacture of semiconductor devices, in order to realize traceability at the chip level of the semiconductor device even after the wafer dicing process, for example, a method of imprinting a serial number for each chip, a method of forming a unique mark for each chip in a single mask process (a process of collectively processing a plurality of chips in a wafer using a single mask), a method of mounting a memory element (e.g., a fuse, a memory element, etc.) and storing a serial number, etc., leave unique manufacturing process information (hereinafter referred to as "unique information") for each chip. To take these methods, additional steps for leaving unique information on the chip are required, such as a chip imprinting step, a step of creating a special mask with a unique mark (pattern) for each chip, a step of forming a memory element, etc.
[0003] For example, Patent Document 1 below discloses a technique in which a reading area with an exposed metal film is formed in advance on a chip, and the shape of the grain boundary in the reading area is used as unique information of the chip. Since this technique extracts unique information from the chip rather than leaving unique information on the chip, the addition of the above-described steps is unnecessary.
Prior Art Documents
Patent Documents
[0004]
Patent Document 1
Summary of the Invention
Problems to be Solved by the Invention
[0005] However, the technique of Patent Document 1 has low versatility because it is necessary to form a reading area in advance on the chip.
[0006] This disclosure is made to solve the above-mentioned problems and aims to realize the extraction of unique information from semiconductor devices in a highly versatile manner. [Means for solving the problem]
[0007] The method for generating unique information of a semiconductor device according to this disclosure comprises: a first reading area identification step of identifying a first reading area on a metal film having the semiconductor device based on a base point defined on the semiconductor device; a grain extraction step of extracting a predetermined number of grains, starting with the largest ones, within the first reading area; a second reading area identification step of identifying a second reading area smaller than the first reading area based on a reference point defined from the positions of the predetermined number of grains extracted in the grain extraction step; and a step of generating unique information of the semiconductor device based on information extracted from the appearance of grains within the second reading area. [Effects of the Invention]
[0008] According to this disclosure, since no structural modification of the semiconductor device is required to extract unique information, the extraction of unique information from the semiconductor device can be achieved in a highly versatile manner. [Brief explanation of the drawing]
[0009] [Figure 1] This is a plan view showing an example of a semiconductor substrate in Embodiment 1. [Figure 2] This is a plan view showing an example of a semiconductor substrate in Embodiment 1. [Figure 3] This is a plan view showing an example of a semiconductor substrate in Embodiment 1. [Figure 4] This is a diagram illustrating the method for generating chip-specific information in Embodiment 1. [Figure 5] This is a diagram illustrating the method for generating chip-specific information in Embodiment 1. [Figure 6]This is a diagram illustrating the method for generating chip-specific information in Embodiment 1. [Figure 7] This is a diagram illustrating the method for generating chip-specific information in Embodiment 1. [Figure 8] This diagram shows the configuration of a semiconductor device manufacturing apparatus according to Embodiment 1. [Figure 9] This is a plan view showing an example of the position of the first reading area in Embodiment 2. [Figure 10] This is a plan view showing an example of the position of the first reading area in Embodiment 2. [Figure 11] This is a plan view showing an example of the position of the first reading area in Embodiment 2. [Figure 12] This is a diagram illustrating the method for generating chip-specific information in Embodiment 3. [Figure 13] This figure illustrates the method for setting the mesh of the second reading region in Embodiment 4. [Figure 14] This is a diagram illustrating the method for generating chip-specific information in Embodiment 4. [Modes for carrying out the invention]
[0010] <Embodiment 1> A method for manufacturing a semiconductor device according to Embodiment 1 will be described.
[0011] First, a semiconductor substrate is prepared as a wafer. The concentration of impurities in the prepared semiconductor substrate is appropriately selected according to the breakdown voltage of the semiconductor device to be fabricated. In this embodiment, a semiconductor substrate made of n-type silicon (Si) is prepared. However, a p-type semiconductor substrate may also be used, in which case the conductivity type of each region formed by ion implantation or epitaxial growth should be reversed compared to the case of an n-type semiconductor substrate.
[0012] Next, by means of ion implantation, epitaxial growth, or the like, a chip region that becomes a product of the semiconductor device and a dicing line surrounding the chip region are formed. In the chip region, an active region through which a main current flows and a termination region provided around the active region for maintaining the breakdown voltage of the semiconductor device are provided. A well-known breakdown voltage maintaining structure can be appropriately selected and provided in the termination region.
[0013] On a first main surface, which is one of the main surfaces of the semiconductor substrate, a surface electrode made of a metal film such as aluminum patterned by etching or the like using a mask is provided. The surface electrode is formed, for example, by depositing an aluminum-silicon alloy (Al-Si based alloy) by PVD (Physical Vapor Deposition) such as sputtering or evaporation.
[0014] A metal film having a laminated structure formed by further forming a nickel alloy (Ni alloy) or gold (Au) by electroless plating or electroplating on the aluminum-silicon alloy formed by PVD may be used as the surface electrode. When forming the surface electrode using plating, the surface electrode can be made into a thick metal film, so that the heat capacity of the surface electrode can be increased and the heat resistance can be improved. Note that the plating process for forming a nickel alloy on the aluminum-silicon alloy may be performed after processing on the second main surface side, which is the other main surface of the semiconductor substrate.
[0015] Before forming the surface electrode, a barrier metal may be provided on the lower surface of the surface electrode by forming a barrier metal on the first main surface of the semiconductor substrate. The barrier metal can be formed by forming a film of titanium, titanium nitride, or the like by PVD or CVD (Chemical Vapor Deposition). [[ID=I4]]
[0016] If necessary, a passivation film, which is a surface protection film, may be selectively formed on the active region and the termination region on the first main surface of the semiconductor substrate. The passivation film is formed of an organic substance such as silicon nitride, polyimide, or polybenzoxazole with controlled conductivity or refractive index.
[0017] A metal film may be formed on the second main surface of the semiconductor substrate as a back electrode. The back electrode can be formed by depositing aluminum-silicon alloy, titanium, or the like by PVD (photovoltaic deposition) such as sputtering or vapor deposition. Alternatively, a metal film with a layered structure consisting of two or more of the following materials may be used as the back electrode: aluminum-silicon alloy, titanium, nickel, gold, etc. Alternatively, a layered structure formed by forming a metal film on a PVD-formed metal film by electroless plating or electrolytic plating may also be used as the back electrode.
[0018] The semiconductor elements formed in a semiconductor device are power semiconductor elements (e.g., diode elements, switching elements, etc.) and integrated circuit elements. For example, if the semiconductor device is a switching element, a gate electrode is provided in the active region as a control electrode, and a gate signal that controls the on / off state of the switching element is input to the gate electrode. The structure of the gate electrode may be planar or trench. The gate electrode is electrically connected to a gate pad, which is a control pad, and an external gate signal is input to the control pad.
[0019] In addition to gate pads, semiconductor devices may be provided with control pads such as current sense pads, Kelvin source pads, and temperature sense diode pads. A current sense pad is a control pad for detecting the current flowing through a cell region in which a switching element is formed, and is electrically connected to a portion of the cell region so that a current ranging from a fraction to a fraction of the total current flowing through the cell region flows through it. A Kelvin source pad is a control pad to which a gate drive voltage is applied to control the on / off state of a switching element. A temperature sense diode pad is a control pad electrically connected to the anode and cathode of a temperature sense diode provided in the semiconductor device, and is used for measuring the temperature of a semiconductor element. The arrangement of the control pads can be arbitrary; for example, the control pad region may be arranged adjacent to the active region, or the control pad region may be arranged within the active region. The technology of this disclosure, described later, is also applicable to the metal film constituting the control pads.
[0020] Figures 1 to 3 show examples of the configuration of a semiconductor substrate as a wafer with semiconductor elements formed on it (i.e., a semiconductor substrate before dicing). Figures 1 and 2 are top views of the semiconductor substrate, with Figure 1 showing an example of a semiconductor device as a power semiconductor element and Figure 2 showing an example of a semiconductor device as an integrated circuit. Figure 3 is a cross-sectional view of a part of the semiconductor device shown in Figure 1 or Figure 2. After the semiconductor elements are formed on the semiconductor substrate as shown in Figures 1 to 3, the semiconductor device is obtained by dicing the semiconductor substrate along the dicing lines and separating it into chips.
[0021] Here, we will describe a method for obtaining unique information for each chip of a semiconductor device from the chip itself. In this embodiment, unique information for identifying individual chips is generated by extracting and digitizing features unique to the chip from the appearance of the grain. The unique information is different for each chip, and there is a one-to-one correspondence between the unique information and the chip.
[0022] The generation of unique information includes the following steps: a first reading area identification step, a grain extraction step, a second reading area identification step, a classification step, a matrix generation step, a unique information generation step, and a database storage step.
[0023] In the first reading area identification step, a base point is determined on the chip using a predetermined method, and the first reading area on the chip is identified based on this base point. For example, the outer edge of the chip can be used as the base point. The first reading area can be set at any position in the area where the metal film is formed. For semiconductor devices of the same type, the first reading area is set at the same position within the chip. The base point is not limited to the outer edge of the chip; it can be any location, such as the corner or center of the chip. In particular, the corners and center of the chip are less prone to misalignment, so setting them as base points makes it easier to observe the base point.
[0024] In the grain extraction process, micro-area observation devices such as optical microscopes and SEMs are used to observe the grains of the metal film within the first reading area. Then, the three largest grains (by diameter) are extracted, and their positional information is obtained. Note that heat treatment of the metal film tends to increase the grain size, and larger grain sizes make the grains easier to observe.
[0025] In the second reading area identification step, a second reading area for extracting unique information is identified based on a reference point defined by the positions of the three largest grains extracted in the grain extraction step. For example, as shown in Figure 4, the centroid of a triangle whose vertices are the positions of the three largest grains may be used as the reference point for identifying the second reading area.
[0026] The second reading area is smaller than the first reading area. The reason for making the second reading area smaller than the first reading area is to ensure that the resolution of the high-magnification image obtained when observing the second reading area with an optical microscope or SEM during the classification process described later is higher than that of the first reading area.
[0027] For example, if the second reading area is set in the center of the chip, the distance from the outer edge of the chip, which is the base point, to the second reading area is long, which raises concerns about a decrease in the positional accuracy of the second reading area. However, as in this embodiment, by setting the second reading area in two stages (first identifying the first reading area, and then identifying the second reading area within it), the decrease in the positional accuracy of the second reading area is suppressed. Since the second reading area is identified based on the position of grains that exist randomly in a physical manner, it can be identified with little positional deviation and with high accuracy.
[0028] In the classification process, the size (diameter) of grains within the second reading area is measured using an optical microscope or SEM, and the distribution of grain sizes as shown in Figure 5 is determined. Based on this distribution, the grain sizes are classified into classes. In this embodiment, the classification of grain sizes is performed in four stages, as shown in Figure 5: Class 0, Class 1, Class 2, and Class 3. More specifically, counting from the smallest size, grain sizes that fall within the range of less than 80% of the total number of grains are classified as Class 0, grain sizes that fall within the range of 80% or more but less than 90% are classified as Class 1, grain sizes that fall within the range of 90% or more but less than 95% are classified as Class 2, and grain sizes that fall within the range of 95% or more are classified as Class 3. The classification may have three or fewer stages, or five or more stages, but four stages are preferred from the viewpoint of processing speed and accuracy when classifying grains.
[0029] In the matrix generation process, as shown in Figure 6, the second reading area is divided into multiple meshes, the largest grain class (hereinafter referred to as the "maximum class") is extracted from each mesh, and a matrix showing the maximum class for each mesh is generated. In this embodiment, the second reading area is divided into 5x5 meshes. For example, if grains like those in Figure 6 are observed in the second reading area, a 5x5 matrix as shown in Figure 7 is generated.
[0030] As can be seen from Figure 5, the grain size distribution has a long tail on the side with larger grain sizes. In other words, there is a large variation in grain size in the region with relatively large grains. Therefore, it is easier to classify grains in the region with relatively large grains, and the above matrix is uniquely characterized for each chip. Creating the matrix from the extraction results of the largest grain class (maximum class) for each mesh is done to take advantage of this characteristic.
[0031] The appropriate size for the mesh demarcating the second reading area is considered to be one of the grain sizes from Class 1 to 3. The size of the second reading area and the number of meshes are set appropriately according to the appropriate mesh size. To ensure that each chip can be uniquely identified, it is desirable to have at least 5x5 meshes demarcating the second reading area.
[0032] In the unique information generation process, as shown in Figure 7, a numerical value is generated as the chip's unique information by arranging the numbers from each row of the matrix created in the matrix generation process into a single column. At this time, if an error correction symbol is added to the end of each row of the matrix when generating the unique information, the occurrence of data errors can be reduced.
[0033] In the database storage process, the unique information of the chip generated in the unique information generation process and the chip information of that chip are linked together and recorded in the database. Chip information includes, for example, lot number, wafer number, and wafer coordinates.
[0034] Next, we will explain how to retrieve the unique information and chip information for each chip recorded in the database. The unique information and chip information for each chip recorded in the database can be retrieved from the database at any time, for example, during the testing process of semiconductor devices before product shipment, or when semiconductor devices are returned from the customer after shipment. At that time, in order to retrieve the chip information of the target chip (hereinafter referred to as the "target chip"), it is necessary to compare the unique information of the target chip with the database. The comparison of unique information includes the comparison process and the chip information response process described below.
[0035] In the matching process, the unique information of the target chip is extracted using the same method as described above for generating unique information, and this unique information of the target chip is compared with the unique information stored in the database. In other words, it is checked whether or not unique information matching the unique information of the target chip is recorded in the database.
[0036] The chip information response process is performed if unique information matching the target chip's unique information is recorded in the database. In the chip information response process, chip information (lot number, wafer number, wafer coordinates, etc.) linked to the unique information matching the target chip's unique information is read from the database and presented to the user.
[0037] Figure 8 shows the configuration of a semiconductor manufacturing apparatus 1, which is a semiconductor device manufacturing apparatus according to Embodiment 1. The semiconductor manufacturing apparatus 1 includes a chip information recording unit 10, a database unit 20, and a chip information presentation unit 30.
[0038] The chip information recording unit 10 generates unique information for the semiconductor chip being manufactured, and records the generated unique information in the database unit 20, linking it with the chip information of the chip. The database unit 20 is a recording medium that records the unique information and chip information of the chip. The chip information presentation unit 30 reads the chip information of the target chip from the database unit 20 and presents it to the user. A semiconductor manufacturing apparatus 1 with the same configuration can also be applied to embodiments 2 to 4 described later.
[0039] As shown in Figure 8, the chip information recording unit 10 includes a first reading area identification unit 11, a grain extraction unit 12, a second reading area identification unit 13, and a unique information generation unit 14.
[0040] The first reading area identification unit 11 performs the above-described first reading area identification process on a semiconductor device chip in the manufacturing process (hereinafter referred to as the "manufactured chip"). In other words, the first reading area identification unit 11 identifies a first reading area on the manufactured chip.
[0041] The grain extraction unit 12 performs the grain extraction process described above on the manufactured chip. Specifically, the grain extraction unit 12 extracts the three largest grains (by size / diameter) from the first reading area of the manufactured chip and obtains their positional information.
[0042] The second reading area identification unit 13 performs the second reading area identification process described above on the manufactured chip. In other words, the second reading area identification unit 13 identifies the second reading area using the positions of the three largest grains extracted by the grain extraction unit 12 as reference points.
[0043] The unique information generation unit 14 performs the aforementioned classification process, matrix generation process, unique information generation process, and database storage process on the second reading area of the manufactured chip. Specifically, the unique information generation unit 14 classifies the grain sizes within the second reading area, creates a matrix from the largest grain size in each mesh of the second reading area, and generates unique information of the manufactured chip from this matrix. The unique information generation unit 14 also links the unique information of the manufactured chip with the chip information of that manufactured chip and records it in the database unit 20.
[0044] As shown in Figure 8, the chip information presentation unit 30 includes a matching unit 31 and a chip information response unit 32.
[0045] The matching unit 31 performs the matching process described above on the target chip. In other words, the matching unit 31 extracts the unique information of the target chip and compares the unique information of the target chip with the unique information stored in the database unit 20.
[0046] The chip information response unit 32 performs the above-described chip information response process if unique information matching the unique information of the target chip is recorded in the database unit 20. In other words, the chip information response unit 32 reads the chip information associated with the unique information that matches the unique information of the target chip from the database unit 20 and presents it to the user.
[0047] According to the technology of Embodiment 1, unique information of a semiconductor device chip can be extracted from any position on the metal film of the chip. Furthermore, since no structural modification of the chip is required to extract the unique information, this manufacturing method is highly versatile and can be applied to existing semiconductor devices.
[0048] Furthermore, in the technology according to Embodiment 1, it is also possible to set multiple second reading areas on a single chip, in which case the following effects can be expected. First, the amount of unique information extracted from a single chip can be increased, so even if the number of manufactured chips increases, it is possible to uniquely identify each chip. Also, even if grain cannot be measured in some second reading areas due to foreign matter or defects generated in the manufacturing process, unique information can be extracted from other second reading areas. Note that when setting multiple second reading areas, multiple first reading areas may also be set.
[0049] In this disclosure, the identification of the region from which unique information is extracted was performed in two stages. That is, first the first reading region was identified, then the second reading region was identified from the first reading region, and then the unique information was extracted from the second reading region. However, the setting of the region from which unique information is extracted may be performed in three or more stages. For example, first the first reading region may be identified, then the second reading region may be identified from the first reading region, then the third reading region may be identified from the second reading region, and then the unique information may be extracted from the third reading region. However, from the viewpoint of suppressing an increase in the number of processes, two stages are preferred.
[0050] <Embodiment 2> The positions of the first and second reading regions are not limited to the openings of the passivation film. In Embodiment 2, as shown in Figures 9, 10, and 11, the first reading region is set to the portion of the metal film covered with the passivation film. Although not shown, the second reading region is located within the first reading region, so the second reading region is also set to the portion of the metal film covered with the passivation film. Otherwise, it is the same as Embodiment 1.
[0051] Typically, since the passivation film is made of a transparent or translucent material, the grains in the first and second reading regions are still observable even when the first and second reading regions are covered with the passivation film.
[0052] The passivation film protects the chip and the surface of the metal film. By protecting the chip with the passivation film, for example, in the sealing process where the chip is sealed with a sealing material such as resin or gel, the stress generated between the sealing material and the metal film can be relieved. In this case, if the semiconductor manufacturing apparatus 1 and the second reading area are covered with the passivation film, deformation of the grain due to stress can be prevented, and the unique information can be prevented from changing.
[0053] <Embodiment 3> In Embodiment 3, as shown in Figure 12, the second reading region is set to include the edge of the passivation film located on the metal film. In this case, when the second reading region is viewed from above, the boundary line between the passivation film and the metal film crosses the second reading region.
[0054] Furthermore, in Embodiment 3, the method for extracting unique information from the second reading area differs from Embodiments 1 and 2. In this embodiment, as shown in Figure 12, along the boundary line between the passivation film and the metal film that crosses the second reading area, multiple intersection points are extracted between the boundary line and the grain contour line, and unique information is generated by arranging the distance values between each intersection point and converting them into numerical values.
[0055] According to Embodiment 3, by using the boundary lines on the chip to extract unique information, it is expected that the accuracy of extracting unique information can be improved.
[0056] <Embodiment 4> In Embodiment 4, the method for extracting unique information from the second reading area differs from Embodiments 1 to 3. In this embodiment, the second reading area is divided into multiple meshes, and as shown in Figure 13, the triplicate points (points that form the boundaries of three grains) of the grain boundaries present in the second reading area are extracted, and a matrix like Figure 14 is generated showing the number of triplicate points in each mesh. Then, as shown in Figure 14, the numerical values obtained by arranging the numbers in each row of the matrix created in the matrix generation process into a single column are generated as the unique information of the chip.
[0057] Generally, when there are four or more quadruple points (points that form the boundaries of four or more grains), the grain boundaries become complex and difficult to detect from images. However, when there are three quadruple points, which is the minimum number of points required to form a boundary, detection from images is easy. In Embodiment 4, unique information is extracted by detecting the three quadruple points of the grain boundaries, so an improvement in the accuracy of extracting unique information can be expected.
[0058] In the embodiments described above, an example using silicon as the semiconductor substrate material was shown. However, the semiconductor substrate is not limited to silicon, and may be a wide-bandgap semiconductor with a larger bandgap than silicon, such as silicon carbide, gallium nitride-based materials, gallium oxide-based materials, or diamond. Switching elements and diode elements formed from wide-bandgap semiconductors have high voltage resistance and high allowable current density, making it possible to miniaturize switching elements and diode elements. When the chip size is small, adding unique marks (patterns) to the chip reduces the effective area of the chip, so applying the technology described in this disclosure is effective.
[0059] Furthermore, it is possible to freely combine each embodiment, or to modify or omit each embodiment as appropriate.
[0060] <Note> The various aspects of this disclosure are summarized below as an appendix.
[0061] (Note 1) A first reading region identification step, in which a first reading region on a metal film having the semiconductor device is identified based on a base point defined on the semiconductor device, A grain extraction step in which a predetermined number of grains are extracted from the largest grains within the first reading area, A second reading area identification step, which identifies a second reading area smaller than the first reading area based on reference points defined from the positions of the predetermined number of grains extracted in the grain extraction step, A step of generating unique information of the semiconductor device based on information extracted from the appearance of grains in the second reading area, A method for generating unique information for a semiconductor device.
[0062] (Note 2) The process of generating unique information for the semiconductor device is as follows: A classification step of classifying the grains in the second reading area according to their size, A matrix generation step involves dividing the second reading area into multiple meshes and generating a matrix that shows the class of the largest grain in each mesh, A unique information generation step for generating unique information of the semiconductor device from the matrix, including, A method for generating unique information for a semiconductor device as described in Appendix 1.
[0063] (Note 3) The process for generating unique information of the semiconductor device includes a unique information generation step of extracting multiple intersection points between the boundary line and the grain contour line along the boundary line between the passivation film and the metal film that crosses the second reading area, and generating unique information of the semiconductor device based on the distance between each intersection point. A method for generating unique information for a semiconductor device as described in Appendix 1.
[0064] (Note 4) The process of generating unique information for the semiconductor device is as follows: A matrix generation step involves dividing the second reading area into multiple meshes, extracting the triple points of grain boundaries present in the second reading area, and generating a matrix that shows the number of triple points in each mesh. A unique information generation step for generating unique information of the semiconductor device from the matrix, including, A method for generating unique information for a semiconductor device as described in Appendix 1.
[0065] (Note 5) The first reading area is set within the area covered by the passivation film of the metal film. A method for generating unique information for a semiconductor device as described in any one of the appendices 1 to 4.
[0066] (Note 6) A step of generating unique information for a semiconductor device using the method for generating unique information for a semiconductor device described in any one of Appendix 1 to Appendix 5, A database storage step of storing the unique information of the semiconductor device in a database, linked to the chip information of the semiconductor device, A method for managing unique information of a semiconductor device.
[0067] (Note 7) A comparison step is performed in which the unique information of a semiconductor device is generated by the method for generating unique information of a semiconductor device described in any one of the appendices 1 to 5, and then compared with the unique information stored in the database. When the unique information of the semiconductor device matches the unique information stored in the database, the chip information associated with the unique information is retrieved from the database and presented to the user in a chip information response step. A method for managing unique information of a semiconductor device.
[0068] (Note 8) A first reading area identification unit identifies a first reading area on a metal film on a semiconductor device during the manufacturing process, based on a reference point defined on the semiconductor device during the manufacturing process. Within the first reading area, a grain extraction unit extracts a predetermined number of grains starting with the largest ones, A second reading area identification unit identifies a second reading area smaller than the first reading area based on reference points defined from the positions of the predetermined number of grains extracted by the grain extraction unit, A unique information generation unit generates unique information of the semiconductor device in the manufacturing process based on information extracted from the appearance of the grain in the second reading area, A database unit that stores the unique information of the semiconductor device in the manufacturing process, linked to the chip information of the semiconductor device in the manufacturing process, A matching unit generates unique information for semiconductor devices and compares it with the unique information stored in the database unit, A chip information response unit, when the unique information of the semiconductor device matches the unique information stored in the database unit, retrieves chip information associated with the unique information from the database unit and presents it to the user. A semiconductor device manufacturing apparatus equipped with the following features. [Explanation of Symbols]
[0069] 1 Semiconductor manufacturing equipment, 10 Chip information recording unit, 11 First reading area identification unit, 12 Grain extraction unit, 13 Second reading area identification unit, 14 Unique information generation unit, 20 Database unit, 30 Chip information presentation unit, 31 Verification unit, 32 Chip information response unit.
Claims
1. A first reading region identification step, in which a first reading region on a metal film having the semiconductor device is identified based on a base point defined on the semiconductor device, A grain extraction step in which a predetermined number of grains are extracted from the largest grains within the first reading area, A second reading area identification step, which identifies a second reading area smaller than the first reading area based on reference points defined from the positions of the predetermined number of grains extracted in the grain extraction step, A step of generating unique information of the semiconductor device based on information extracted from the appearance of grains in the second reading area, A method for generating unique information for a semiconductor device.
2. The process of generating unique information for the semiconductor device is as follows: A classification step of classifying the grains in the second reading area according to their size, A matrix generation step involves dividing the second reading area into multiple meshes and generating a matrix that shows the class of the largest grain in each mesh, A unique information generation step for generating unique information of the semiconductor device from the matrix, including, A method for generating unique information of a semiconductor device according to claim 1.
3. The process for generating unique information of the semiconductor device includes a unique information generation process that extracts multiple intersection points between the boundary line and the grain contour line along the boundary line between the passivation film and the metal film that crosses the second reading area, and generates unique information of the semiconductor device based on the distance between each intersection point. A method for generating unique information of a semiconductor device according to claim 1.
4. The process of generating unique information for the semiconductor device is as follows: A matrix generation step involves dividing the second reading area into multiple meshes, extracting the triple points of grain boundaries present in the second reading area, and generating a matrix that shows the number of triple points in each mesh. A unique information generation step for generating unique information of the semiconductor device from the matrix, including, A method for generating unique information of a semiconductor device according to claim 1.
5. The first reading area is set within the area covered by the passivation film of the metal film. A method for generating unique information of a semiconductor device according to any one of claims 1 to 4.
6. A step of generating unique information for a semiconductor device using the method for generating unique information for a semiconductor device described in any one of claims 1 to 4, A database storage step of storing the unique information of the semiconductor device in a database, linked to the chip information of the semiconductor device, A method for managing unique information of a semiconductor device.
7. A method for generating unique information of a semiconductor device according to any one of claims 1 to 4, comprising a comparison step of generating unique information of a semiconductor device and comparing it with unique information stored in a database, When the unique information of the semiconductor device matches the unique information stored in the database, the chip information associated with the unique information is retrieved from the database and presented to the user in a chip information response step. A method for managing unique information of a semiconductor device.
8. A first reading region identification unit identifies a first reading region on a metal film on a semiconductor device during the manufacturing process, based on a base point defined on the semiconductor device during the manufacturing process. Within the first reading area, a grain extraction unit extracts a predetermined number of grains starting with the largest ones, A second reading area identification unit identifies a second reading area smaller than the first reading area based on reference points defined from the positions of the predetermined number of grains extracted by the grain extraction unit, A unique information generation unit generates unique information of the semiconductor device in the manufacturing process based on information extracted from the appearance of the grain in the second reading area, A database unit that stores the unique information of the semiconductor device in the manufacturing process, linked to the chip information of the semiconductor device in the manufacturing process, A matching unit generates unique information for semiconductor devices and compares it with the unique information stored in the database unit, A chip information response unit, when the unique information of the semiconductor device matches the unique information stored in the database unit, retrieves chip information associated with the unique information from the database unit and presents it to the user. A semiconductor device manufacturing apparatus equipped with the following features.