Photodetector, method for manufacturing the same, and electronic equipment

Abstract

The present invention prevents pillars from collapsing. This photodetector is provided with a pixel array part in which multiple pixels are arranged in a two-dimensional form. Each of the multiple pixels is provided with a photoelectric conversion section that is provided to a semiconductor layer, and a metasurface structure that is positioned on the light incident surface side of the semiconductor layer and guides incident light to the photoelectric conversion section. The metasurface structure includes a plurality of pillars that are positioned at a distance from each other that is shorter than the wavelength of the incident light, and a transparent support body that connects and supports at least a portion between the plurality of pillars.

Description

Technical Field

[0001] The present technology (the technology according to the present disclosure) relates to a photodetection device, a manufacturing method thereof, and an electronic device, and particularly relates to a technology effective when applied to a photodetection device provided with a metasurface structure, a manufacturing method thereof, and an electronic device.

Background Art

[0002] In recent years, a technology for controlling the transmittance, phase, polarization, and wavefront of light using a structure smaller than the wavelength of light, called a metasurface, has attracted attention. There are various structures in this metasurface. Patent Document 1 discloses a pillar-type metasurface structure including a plurality of pillars. Further, Patent Document 2 discloses an image sensor in which a pillar-type metasurface structure is applied to a color separation lens array.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0004] By the way, a pillar-type metasurface structure needs to be formed by individually dispersing a plurality of pillars. For this reason, there is a concern that the pillars may simply fall down, and there is room for improvement from the viewpoint of the manufacturing yield of the photodetection device.

[0005] An object of the present technology is to provide a technology capable of suppressing the fall of pillars.

Means for Solving the Problems

[0006] (1) A photodetection device according to one aspect of the present technology is It comprises a pixel array section in which multiple pixels are arranged in a two-dimensional manner, Each of the above multiple pixels is, A photoelectric conversion unit provided in the semiconductor layer, The semiconductor layer comprises a metasurface structure disposed on the light incident surface side and guiding the incident light to the photoelectric conversion section, The above metasurface structure is, Multiple pillars arranged at a distance shorter than the wavelength of the incident light, The underlying layer in contact with the semiconductor layer side of the pillar, A transparent support structure that connects and supports at least a portion of the spaces between the multiple pillars at a different height from the aforementioned base layer, Includes.

[0007] (2) A method for manufacturing a photodetector according to another aspect of this technology is: Multiple pillars are formed on the light-incident surface side of the underlying layer, with each pillar positioned at a distance shorter than the wavelength of the incident light. A transparent support is formed between adjacent pillars, connecting and supporting at least a portion of the space between the multiple pillars. This includes the following.

[0008] (3) Electronic devices relating to other aspects of this technology are: The system comprises a light detection device, an optical lens that forms an image of light from a subject onto the imaging surface of the light detection device, and a signal processing circuit that performs signal processing on the signal output from the light detection device. The above-mentioned light detection device is It comprises a pixel array section in which multiple pixels are arranged in a two-dimensional manner, Each of the above multiple pixels is, A photoelectric conversion unit provided in the semiconductor layer, The semiconductor layer comprises a metasurface structure disposed on the light incident surface side and guiding the incident light to the photoelectric conversion section, The above metasurface structure is, Multiple pillars arranged at a distance shorter than the wavelength of the incident light, The underlying layer in contact with the semiconductor layer side of the pillar, A transparent support that connects and supports at least a part between the plurality of pillars at a height position different from the underlying layer, including.

Brief Description of Drawings

[0009] [Figure 1] It is a chip layout diagram showing a configuration example of a solid-state imaging device according to a first embodiment of the present technology. [Figure 2] It is a block diagram showing a configuration example of a solid-state imaging device according to a first embodiment of the present technology. [Figure 3] It is an equivalent circuit diagram showing a configuration example of a pixel of a solid-state imaging device according to a first embodiment of the present technology. [Figure 4] It is a schematic longitudinal sectional view showing a schematic configuration of a pixel array section and a peripheral section of a solid-state imaging device according to a first embodiment of the present technology. [Figure 5] It is a main part enlarged schematic longitudinal sectional view in which a part of the metasurface structure of FIG. 4 is enlarged. [Figure 6] It is a main part enlarged schematic longitudinal sectional view in which a part of FIG. 5 is enlarged. [Figure 7] It is a diagram showing an example of a planar layout pattern of pillars. [Figure 8A] It is a diagram showing a planar configuration of a semiconductor wafer. [Figure 8B] It is a diagram showing a configuration of a chip formation region by enlarging the A region of FIG. 8A. [Figure 9A] It is a schematic process longitudinal sectional view showing a manufacturing method of a solid-state imaging device according to a first embodiment of the present technology. [Figure 9B] It is a schematic process longitudinal sectional view following FIG. 9A. [Figure 9C] It is a schematic process longitudinal sectional view following FIG. 9B. [Figure 9D] It is a schematic process longitudinal sectional view following FIG. 9C. [Figure 9E] It is a schematic process longitudinal sectional view following FIG. 9D. [Figure 9F] It is a schematic process longitudinal sectional view following FIG. 9E. [Figure 9G] It is a schematic process longitudinal sectional view following FIG. 9F. [Figure 9H] This is a schematic longitudinal cross-sectional view of the process, following Figure 9G. [Figure 9I] This is a schematic longitudinal cross-sectional view of the process, following Figure 9H. [Figure 9J] This is a schematic longitudinal cross-sectional view, enlarged from a portion of Figure 9I. [Figure 9K] This is a schematic longitudinal cross-sectional view of the process, following Figure 9J. [Figure 9L] This is a schematic longitudinal cross-sectional view of the process, following Figure 9K. [Figure 10] This is a schematic longitudinal cross-sectional view showing a portion of the metasurface structure of a modified example of the first embodiment. [Figure 11] This diagram shows the different types of planar shapes of pillars. [Figure 12] This figure shows another example of a planar layout pattern for pillars. [Figure 13A] This is a schematic longitudinal cross-sectional view showing the process of forming a metasurface structure included in the manufacturing method of a solid-state imaging device according to the second embodiment of this technology. [Figure 13B] This is a schematic longitudinal cross-sectional view of the process, following Figure 13A. [Figure 13C] This is a schematic longitudinal cross-sectional view of the process, following Figure 13B. [Figure 13D] This is a schematic longitudinal cross-sectional view of the process, following Figure 13C. [Figure 13E] This is a schematic longitudinal cross-sectional view of the process, following Figure 13D. [Figure 13F] This is a schematic longitudinal cross-sectional view of the process, following Figure 13E. [Figure 14] This is a schematic longitudinal cross-sectional view showing an example configuration of a solid-state imaging device according to a third embodiment of this technology. [Figure 15] This is a schematic longitudinal cross-sectional view showing an example configuration of a solid-state imaging device according to a fourth embodiment of this technology. [Figure 16] This is a correlation diagram between pillar diameter and phase shift. [Figure 17] This is a diagram to explain phase folding. [Figure 18] This is a schematic longitudinal cross-sectional view showing an example of the configuration of the pixel array and peripheral parts of a solid-state imaging device according to the fifth embodiment of this technology. [Figure 19] Figure 18 is a schematic longitudinal cross-sectional view of a magnified portion of the metasurface structure. [Figure 20A] This is a schematic longitudinal cross-sectional view showing the process of forming a metasurface structure in the manufacturing method of a solid-state imaging device according to the fifth embodiment of this technology. [Figure 20B] This is a schematic longitudinal cross-sectional view of the process, following Figure 20A. [Figure 20C] This is a schematic longitudinal cross-sectional view of the process, following Figure 20B. [Figure 20D] This is a schematic longitudinal cross-sectional view of the process, following Figure 20C. [Figure 20E] This is a schematic longitudinal cross-sectional view of the process, following Figure 20D. [Figure 20F] This is a schematic longitudinal cross-sectional view of the process, following Figure 20E. [Figure 20G] This is a schematic longitudinal cross-sectional view of the process, following Figure 20F. [Figure 20H] This is a schematic longitudinal cross-sectional view of the process, following Figure 20G. [Figure 21] This is a schematic longitudinal cross-sectional view of a key part showing an example configuration of a metasurface structure of a solid-state imaging device according to the sixth embodiment of this technology. [Figure 22A] This is a schematic longitudinal cross-sectional view showing the process of forming a metasurface structure in the manufacturing method of a solid-state imaging device according to the sixth embodiment of this technology. [Figure 22B] This is a schematic longitudinal cross-sectional view of the process, following Figure 22A. [Figure 22C] This is a schematic longitudinal cross-sectional view of the process, following Figure 22B. [Figure 23] This is a schematic longitudinal cross-sectional view of a key part showing an example configuration of the metasurface structure of a solid-state imaging device according to the seventh embodiment of this technology. [Figure 24A] This is a schematic longitudinal cross-sectional view showing the process of forming a metasurface structure in the manufacturing method of a solid-state imaging device according to the seventh embodiment of this technology. [Figure 24B] This is a schematic longitudinal cross-sectional view of the process, following Figure 24A. [Figure 24C] This is a schematic longitudinal cross-sectional view of the process, following Figure 24B. [Figure 24D]This is a schematic longitudinal cross-sectional view of the process, following Figure 24C. [Figure 24E] This is a schematic longitudinal cross-sectional view of the process, following Figure 24D. [Figure 24F] This is a schematic longitudinal cross-sectional view of the process, following Figure 24E. [Figure 24G] This is a schematic longitudinal cross-sectional view of the process, following Figure 24F. [Figure 24H] This is a schematic longitudinal cross-sectional view of the process, following Figure 24G. [Figure 25] This is a schematic longitudinal cross-sectional view of a key part showing an example of the configuration of a metasurface structure in a solid-state imaging device according to the eighth embodiment of this technology. [Figure 26A] This is a schematic longitudinal cross-sectional view showing the process of forming a metasurface structure in the manufacturing method of a solid-state imaging device according to the eighth embodiment of this technology. [Figure 26B] This is a schematic longitudinal cross-sectional view of the process, following Figure 26A. [Figure 26C] This is a schematic longitudinal cross-sectional view of the process, following Figure 26B. [Figure 27A] This is a schematic longitudinal cross-sectional view of a key part showing an example of the configuration of a metasurface structure in a solid-state imaging device according to the ninth embodiment of this technology. [Figure 27B] Figure 27A is a schematic plan view of the main parts of the metasurface structure. [Figure 28A] This is a schematic longitudinal cross-sectional view showing the process of forming a metasurface structure in the manufacturing method of a solid-state imaging device according to the ninth embodiment of this technology. [Figure 28B] This is a schematic longitudinal cross-sectional view of the process, following Figure 28A. [Figure 28C] This is a schematic longitudinal cross-sectional view of the process, following Figure 28B. [Figure 29] This is a schematic longitudinal cross-sectional view of a main part showing an example of the configuration of a metasurface structure in a solid-state imaging device according to Modification 1 of the 9th embodiment of this technology. [Figure 30A] This is a schematic longitudinal cross-sectional view showing the process of forming a metasurface structure in a method for manufacturing a solid-state imaging device according to a modified example 2 of the ninth embodiment of this technology. [Figure 30B] This is a schematic longitudinal cross-sectional view of the process, following Figure 30A. [Figure 30C] This is a schematic longitudinal cross-sectional view of the process, following Figure 30B. [Figure 31A] This is a diagram to explain the tilting of the pillar. [Figure 31B] This is a diagram to explain the tilting of the pillar. [Figure 32] This is a schematic longitudinal cross-sectional view showing the general configuration of the pixel array and peripheral parts of a solid-state imaging device according to the tenth embodiment of this technology. [Figure 33] Figure 32 is an enlarged schematic longitudinal cross-sectional view of a key part of the metasurface structure. [Figure 34A] This is a schematic longitudinal cross-sectional view showing the metasurface structure formation step in the manufacturing method of a solid-state imaging device according to the tenth embodiment of this technology. [Figure 34B] This is a schematic longitudinal cross-sectional view of the process, following Figure 34A. [Figure 34C] This is a schematic longitudinal cross-sectional view of the process, following Figure 34B. [Figure 34D] This is a schematic longitudinal cross-sectional view of the process, following Figure 34C. [Figure 34E] This is a schematic longitudinal cross-sectional view of the process, following Figure 34D. [Figure 35A] This is a schematic longitudinal cross-sectional view showing the process of forming a metasurface structure in the manufacturing method of a solid-state imaging device according to the 11th embodiment of this technology. [Figure 35B] This is a schematic longitudinal cross-sectional view of the process, following Figure 35A. [Figure 35C] This is a schematic longitudinal cross-sectional view of the process, following Figure 35B. [Figure 35D] This is a schematic longitudinal cross-sectional view of the process, following Figure 35C. [Figure 36A] This is a schematic longitudinal cross-sectional view showing the process of forming a metasurface structure in the manufacturing method of a solid-state imaging device according to the twelfth embodiment of this technology. [Figure 36B] This is a schematic longitudinal cross-sectional view of the process, following Figure 36A. [Figure 36C] This is a schematic longitudinal cross-sectional view of the process, following Figure 36B. [Figure 36D] This is a schematic longitudinal cross-sectional view of the process, following Figure 36C. [Figure 36E] This is a schematic longitudinal cross-sectional view of the process, following Figure 36D. [Figure 36F] This is a schematic longitudinal cross-sectional view of the process, following Figure 36E. [Figure 37A] This is a schematic longitudinal cross-sectional view showing the process of forming a metasurface structure in the manufacturing method of a solid-state imaging device according to the 13th embodiment of this technology. [Figure 37B] This is a schematic longitudinal cross-sectional view of the process, following Figure 37A. [Figure 37C] This is a schematic longitudinal cross-sectional view of the process, following Figure 37B. [Figure 37D] This is a schematic longitudinal cross-sectional view of the process, following Figure 37C. [Figure 38A] This is a schematic longitudinal cross-sectional view showing the process of forming a metasurface structure in the manufacturing method of a solid-state imaging device according to the 14th embodiment of this technology. [Figure 38B] This is a schematic longitudinal cross-sectional view of the process, following Figure 38A. [Figure 38C] This is a schematic longitudinal cross-sectional view of the process, following Figure 38B. [Figure 38D] This is a schematic longitudinal cross-sectional view of the process, following Figure 38C. [Figure 39] This is a schematic longitudinal cross-sectional view showing the general configuration of the pixel array and peripheral parts of a solid-state imaging device according to the 15th embodiment of this technology. [Figure 40] Figure 39 is an enlarged schematic longitudinal cross-sectional view of the main part of the metasurface structure. [Figure 41] This is a schematic longitudinal cross-sectional view showing the general configuration of the pixel array and peripheral parts of a solid-state imaging device according to the 16th embodiment of this technology. [Figure 42] This is a schematic longitudinal cross-sectional view showing the general configuration of the pixel array and peripheral parts of a solid-state imaging device according to the 17th embodiment of this technology. [Figure 43] Figure 42 is a plan view showing one example of the configuration of a light-shielding film. [Figure 44] This is a plan view (part 1) showing a modified example of the light-shielding film. [Figure 45] This is a plan view (part 2) showing a modified example of the light-shielding film. [Figure 46]This is a plan view (part 3) showing a modified example of the light-shielding film. [Figure 47] Figure 42 is a longitudinal cross-sectional view showing one example of the configuration of the separation region. [Figure 48] This is a longitudinal cross-sectional view (part 1) showing a modified example of the separated region. [Figure 49] This is a longitudinal cross-sectional view (part 2) showing a modified example of the separated region. [Figure 50] This is a longitudinal cross-sectional view (part 3) showing a modified example of the separated region. [Figure 51] This is a longitudinal cross-sectional view (part 4) showing a modified example of the separated region. [Figure 52] This is a longitudinal cross-sectional view (part 5) showing a modified example of the separated region. [Figure 53] This is a schematic longitudinal cross-sectional view showing the general configuration of the pixel array section of a solid-state imaging device according to the 18th embodiment of this technology. [Figure 54A] This figure shows the cross-sectional structure along the line a54-a54 in Figure 53. [Figure 54B] This figure shows the cross-sectional structure along the line b54-b54 in Figure 53. [Figure 54C] This figure shows the cross-sectional structure along the line c54-c54 in Figure 53. [Figure 54D] This figure shows the cross-sectional structure along the line d54-d54 in Figure 53. [Figure 55] This diagram shows a diffraction / scattering element provided at the interface on the light incident surface side of a semiconductor layer. [Figure 56] This is a diagram (part 1) showing an optical branching section provided at the interface on the light incident surface side of the semiconductor layer. [Figure 57] This is a diagram (part 2) showing the optical branching section provided at the interface on the light incident surface side of the semiconductor layer. [Figure 58] This is a diagram (part 3) showing an optical branching section provided at the interface on the light incident surface side of the semiconductor layer. [Figure 59] This is a schematic longitudinal cross-sectional view of a key part showing the combination of the deflection section (metasurface structure) of the prism function and the on-chip lens in the light detection device according to the 19th embodiment of this technology. [Figure 60]This is a schematic longitudinal cross-sectional view of the main part showing the combination of a deflection unit that combines prism and lens functions and an on-chip lens. [Figure 61] This is a schematic longitudinal cross-sectional view of the main components showing the combination of the deflection part (metasurface structure) of the prism function and the inner lens. [Figure 62] This is a schematic longitudinal cross-sectional view of the main part showing the combination of a deflection section, which combines prism function (metasurface structure) and lens function, and an inner lens. [Figure 63] This is a schematic longitudinal cross-sectional view (part 1) of the main part showing the configuration of the light-shielding wall in the light detection device according to the 20th embodiment of this technology. [Figure 64] This is a schematic longitudinal section (part 2) illustrating the main components of the light-shielding wall. [Figure 65] This is a schematic longitudinal section (part 3) illustrating the main components of the light-shielding wall. [Figure 66] This is a schematic longitudinal section (part 4) illustrating the main components of the light-shielding wall. [Figure 67] This is a plan view (part 1) showing the configuration of the divided photoelectric conversion section in the photodetector according to the 21st embodiment of this technology. [Figure 68] This is a plan view (part 2) showing the configuration of the divided photoelectric conversion section. [Figure 69] This is a schematic longitudinal cross-sectional view of a key part of a photodetector according to the 22nd embodiment of this technology, showing an example configuration in which a color filter made of a general pigment or dye is provided on the deflection section. [Figure 70] This is a schematic longitudinal cross-sectional view of the main part showing an example configuration in which a color filter is placed above the deflection section. [Figure 71] This is a planar diagram showing an example of a color filter array. [Figure 72] This is a schematic longitudinal cross-sectional view of the main components showing the combination with a plasmon filter. [Figure 73] This is a schematic plan view of a plasmon filter. [Figure 74] This is a schematic longitudinal cross-sectional view of the main part showing the combination with a GMR filter. [Figure 75]This is a schematic plan view showing the diffraction grating and clad-core structure of a GMR filter. [Figure 76] This is a schematic longitudinal cross-sectional view of a key part showing a combination with stacked filters of different refractive indices. [Figure 77] This is a magnified view of a portion of a stacked filter with different refractive indices. [Figure 78] This diagram illustrates the phase difference required for vertical input. [Figure 79] This figure shows a phase difference map corresponding to a prism angle in a certain direction. [Figure 80] This is a characteristic diagram showing the phase difference library, which links phase difference and pillar diameter. [Figure 81] This diagram illustrates the process of replacing the phase difference of each pillar with the pillar diameter. [Figure 82] This is a plan view showing the field of view of the photodetector. [Figure 83] This is a plan view showing examples of pillar arrangements for different statue heights. [Figure 84] This diagram shows a phase difference map that combines lens and prism functions. [Figure 85] This diagram illustrates the phase difference map of a lens. [Figure 86] This figure shows a schematic configuration of an electronic device according to the 23rd embodiment of this technology. [Figure 87] This figure shows a schematic configuration of an electronic device according to the 24th embodiment of this technology. [Modes for carrying out the invention]

[0010] The embodiments of this technology will be described in detail below with reference to the drawings. In the drawings referenced in the following explanation, identical or similar parts are denoted by the same or similar reference numerals. However, it should be noted that the drawings are schematic, and the relationship between thickness and planar dimensions, the ratio of the thickness of each layer, etc., may differ from reality. Therefore, specific thicknesses and dimensions should be determined by referring to the following explanation.

[0011] Furthermore, it goes without saying that there may be differences in the dimensional relationships and ratios between drawings. Also, the effects described herein are merely examples and not limiting, and other effects may exist.

[0012] Furthermore, in this specification, transparency is defined as a state in which the transmittance of the material is close to 100% for the wavelength range in which the photodetector is expected to receive light. For example, even if the material itself absorbs light in the expected wavelength range, if it is processed to be extremely thin and has a transmittance close to 100%, it is considered transparent. For example, in the case of a photodetector used in the near-infrared region, even if a material has high absorption in the visible range, it can be said to be transparent if its transmittance in the near-infrared region is close to 100%. Alternatively, even if there are some absorption or reflection components, if their effects are within an acceptable range when compared with the sensitivity specifications of the photodetector, it can be considered transparent.

[0013] Furthermore, the following embodiments are illustrative examples of apparatus and methods for realizing the technical concept of this technology, and do not limit the configuration to those described below. In other words, the technical concept of this technology can be modified in various ways within the technical scope described in the claims.

[0014] Furthermore, the definitions of directions such as up and down in the following explanation are merely for explanatory convenience and do not limit the technical concept of this technology. For example, it is obvious that if an object is rotated 90° and observed, up and down will be converted to left and right and read accordingly, and if it is rotated 180° and observed, up and down will be inverted and read accordingly.

[0015] Furthermore, in the following embodiments, in the three mutually orthogonal directions in space, the first and second mutually orthogonal directions within the same plane are defined as the X direction and the Y direction, respectively, and the third direction orthogonal to each of the first and second directions is defined as the Z direction. In the following embodiments, the thickness direction of the semiconductor layer, which will be described later, is described as the Z direction.

[0016] [First Embodiment] In this first embodiment, an example of applying this technology to a solid-state imaging device, which is a back-illuminated CMOS (Complementary Metal Oxide Semiconductor) image sensor, will be described.

[0017] ≪Overall Configuration of Solid State Imaging System≫ First, let's describe the overall configuration of the solid-state imaging device 1A. As shown in Figure 1, the solid-state imaging device 1A according to the first embodiment of this technology is mainly composed of a semiconductor chip 2 whose two-dimensional planar shape when viewed from above is rectangular. That is, the solid-state imaging device 1A is mounted on the semiconductor chip 2. As shown in Figure 86, this solid-state imaging device 1A(201) captures image light (incident light 206) from a subject through an optical lens 202, converts the amount of light of the incident light 206 that is imaged on the imaging surface into an electrical signal on a pixel-by-pixel basis, and outputs it as a pixel signal.

[0018] As shown in Figure 1, the semiconductor chip 2 on which the solid-state imaging device 1A is mounted comprises a rectangular pixel array portion 2A located in the center of a two-dimensional plane including the mutually orthogonal X and Y directions, and a peripheral portion 2B located outside the pixel array portion 2A so as to surround it.

[0019] The pixel array section 2A is a light-receiving surface that receives light focused by an optical lens (optical system) 202, for example, as shown in Figure 86. Multiple pixels 3 are arranged in a matrix (array) within the pixel array section 2A in a two-dimensional plane including the X and Y directions. In other words, the pixels 3 are repeatedly arranged in mutually orthogonal X and Y directions within the two-dimensional plane.

[0020] As shown in Figure 1, multiple bonding pads 14 are arranged in the peripheral area 2B. Each of the multiple bonding pads 14 is arranged, for example, along each of the four edges in the two-dimensional plane of the semiconductor chip 2. Each of the multiple bonding pads 14 is an input / output terminal used when electrically connecting the semiconductor chip 2 to an external device.

[0021] As shown in Figure 2, the semiconductor chip 2 (solid-state imaging device 1A) comprises a pixel array section 2A, a vertical drive section 4, a column signal processing section 5, and a control section 8. The pixel array section 2A is configured with pixels 3 arranged in a two-dimensional grid. Here, the pixels 3 generate an image signal corresponding to the irradiated light. These pixels 3 have a photoelectric conversion section 21 (see Figure 3) that generates an electric charge corresponding to the irradiated light. The pixels 3 also further have a pixel circuit 29 shown in Figure 3. This pixel circuit 29 generates an image signal based on the electric charge generated by the photoelectric conversion section 21. The generation of the image signal is controlled by a control signal generated by the vertical drive section 4, which will be described later.

[0022] As shown in Figure 2, signal lines 11 and 12 are arranged in an XY matrix in the pixel array section 2A. Signal line 11 is a signal line that transmits control signals from the pixel circuit 29 (see Figure 3) in the pixel 3, and is arranged in each row of the pixel array section 2A and is wired in common to the pixels 3 in each row. Signal line 12 is a signal line that transmits image signals generated by the pixel circuit 29 of the pixel 3, and is arranged in each column of the pixel array section 2A and is wired in common to the pixels 3 in each column. These photoelectric conversion unit 21 and pixel circuit 29 are mounted on a semiconductor chip 2.

[0023] The vertical drive unit 4 generates control signals for the pixel circuit 29 of the pixel 3. The vertical drive unit 4 transmits the generated control signals to the pixel 3 via the signal line 11.

[0024] The column signal processing unit 5 processes the image signal generated by the pixel 3. This column signal processing unit 5 processes the image signal transmitted from the pixel 3 via the signal line 12. Processing in the column signal processing unit 5 includes, for example, analog-to-digital conversion, which converts the analog image signal generated in the pixel 3 into a digital image signal. The image signal processed by the column signal processing unit 5 is output as the image signal of the solid-state imaging device 1A.

[0025] The control unit 8 controls the entire solid-state imaging device 1A. The control unit 8 controls the solid-state imaging device 1A by generating and outputting control signals that control the vertical drive unit 4 and the column signal processing unit 5. The control signals generated by the control unit 8 are transmitted to the vertical drive unit 4 and the column signal processing unit 5, respectively, via signal lines 8a and 8b.

[0026] The vertical drive unit 4, column signal processing unit 5, and control unit 8 are sometimes collectively referred to as the logic circuit.

[0027] As shown in Figure 3, the pixel 3 comprises a photoelectric conversion unit 21 and a pixel circuit 29. The pixel circuit 29 comprises a charge holding unit 22 and MOS transistors 23 to 26.

[0028] The anode of the photoelectric conversion unit 21 is grounded, and its cathode is connected to the source of the MOS transistor 23. The drain of the MOS transistor 23 is connected to the source of the MOS transistor 24, the gate electrode of the MOS transistor 25, and one end of the charge holding unit 22. The other end of the charge holding unit 22 is grounded.

[0029] The drains of MOS transistors 25 and 26 are connected in common to the power line Vdd, and the source of MOS transistor 25 is connected to the drain of MOS transistor 26. The source of MOS transistor 26 is connected to the output signal line OUT. The gate electrodes of MOS transistors 23, 24, and 26 are connected to the transfer signal line TR, the reset signal line RST, and the selection signal line SEL, respectively.

[0030] The transfer signal line TR, reset signal line RST, and selection signal line SEL constitute signal line 11. The output signal line OUT constitutes signal line 12. The photoelectric conversion unit 21 generates an electric charge corresponding to the irradiated light, as described above. For example, a photodiode can be used as this photoelectric conversion unit 21. The charge holding unit 22 and MOS transistors 23 to 26 constitute the pixel circuit 29.

[0031] The MOS transistor 23 is a transistor that transfers the charge generated by the photoelectric conversion of the photoelectric conversion unit 21 to the charge holding unit 22. The charge transfer in the MOS transistor 23 is controlled by a signal transmitted by the transfer signal line TR.

[0032] The charge holding unit 22 is a capacitor that holds the charge transferred by the MOS transistor 23. The MOS transistor 25 is a transistor that generates a signal based on the charge held in the charge holding unit 22. The MOS transistor 26 is a transistor that outputs the signal generated by the MOS transistor 25 as an image signal to the output signal line OUT. This MOS transistor 26 is controlled by a signal transmitted by the selection signal line SEL.

[0033] The MOS transistor 24 resets the charge holding unit 22 by discharging the charge held in the charge holding unit 22 to the power line Vdd. This reset by the MOS transistor 24 is controlled by a signal transmitted by the reset signal line RST and is performed before the charge transfer by the MOS transistor 23.

[0034] Furthermore, during this reset, the photoelectric conversion unit 21 can also be reset by making the MOS transistor 23 conductive. In this way, the pixel circuit 29 converts the charge generated by the photoelectric conversion unit 21 into an image signal.

[0035] Each of the MOS transistors 23 to 26 includes a pair of main electrode regions that function as a gate insulating film, gate electrode, source region, and drain region, and the gate insulating film is a silicon oxide film, making it a field-effect transistor. MIS transistors may be used instead of MOS transistors.

[0036] ≪Specific Configuration of a Solid State Imaging Device≫ Next, we will describe the specific configuration of the solid-state imaging device 1A. As shown in Figure 4, the semiconductor chip 2 comprises a semiconductor substrate 30 and a support substrate 41 provided on the side of the semiconductor substrate 30 opposite to the light incident surface.

[0037] <Semiconductor substrate> The semiconductor substrate 30 comprises a semiconductor layer 31 on which a plurality of photoelectric conversion units 21 are provided, and a multilayer wiring layer 35 provided on the first surface S1 side of the first surface S1 and second surface S2 located on opposite sides of each other in the thickness direction of the semiconductor layer 31. Furthermore, the semiconductor substrate 30 further includes a fixed charge film 45, an insulating film 46, a light-shielding film 47, and an insulating film 48 that are sequentially stacked on the second surface S2 side of the semiconductor layer 31, starting from the second surface S2 side. Furthermore, the semiconductor substrate 30 further includes a metasurface structure 50 provided on the second surface S2 side of the semiconductor layer 31, and on the side opposite to the semiconductor layer 31 with respect to the second surface S2 side of the semiconductor layer 31.

[0038] Here, the first surface S1 of the semiconductor layer 31 is sometimes called the element formation surface or main surface, and the second surface S2 is sometimes called the light incident surface or back surface. In this first embodiment, the solid-state imaging device 1A converts light incident from the second surface (light incident surface, back surface) S2 side of the semiconductor layer 31 into photoelectric energy using a photoelectric conversion unit 21 provided in the semiconductor layer 31. Furthermore, a planar view refers to a view taken from a direction aligned with the thickness direction (Z direction) of the semiconductor layer 31.

[0039] <Semiconductor layer> As shown in Figure 4, the semiconductor layer 31 is provided with a semiconductor region 33 of a first conductivity type, p-type in this first embodiment, and a semiconductor region 34 of a second conductivity type, n-type in this first embodiment. For example, a Si substrate, SiGe substrate, InGaAs substrate, etc., can be used as the semiconductor layer 31. In this first embodiment, for example, a Si substrate is used. The semiconductor layer 31 is provided over the pixel array portion 2A and the peripheral portion 2B.

[0040] As shown in Figure 4, the p-type semiconductor region 33 is provided across the entire thickness direction (Z direction) of the semiconductor layer 31, in other words, across the second surface S2 and the first surface S1 of the semiconductor layer 31. Furthermore, the p-type semiconductor region 33 is provided across the entire pixel array portion 2A in a plan view, and also across the pixel array portion 2A and the peripheral portion 2B.

[0041] The n-type semiconductor region 34 is provided within the p-type semiconductor region 33 for each pixel 3, and extends across the second surface S2 and the first surface S1 of the semiconductor layer 31. That is, the n-type semiconductor region 34 is surrounded by the p-type semiconductor region 33 on the upper surface on the second surface S2 side of the semiconductor layer 31, the lower surface on the first surface S1 side of the semiconductor layer 31, and the side surface.

[0042] Here, the photoelectric conversion unit 21 described above is mainly composed of an n-type semiconductor region 34 and is configured as a pn junction type photodiode with a p-type semiconductor region 33 and an n-type semiconductor region 34.

[0043] The p-type semiconductor regions 33 located on the upper and lower sides of the n-type semiconductor region 34 (photoelectric conversion section 21), in other words, the p-type semiconductor regions 33 facing both the front and back surfaces of the semiconductor layer 31, also serve as hole charge accumulation regions for suppressing dark current.

[0044] The p-type semiconductor region 33 located on the side of the n-type semiconductor region 34 functions as an isolation region 32 that electrically isolates adjacent n-type semiconductor regions 34. That is, the isolation region 32 in this first embodiment is composed of p-type semiconductor regions 33. The photoelectric conversion unit 21, including the n-type semiconductor region 34, is partitioned by the isolation region 32 and electrically isolated from adjacent photoelectric conversion units 21. A ground potential of, for example, 0V is applied to the isolation region 32 as a reference potential.

[0045] Although not shown in Figure 4, the MOS transistors 23-26 included in the pixel circuit 29 described above are configured on the first surface S1 side of the semiconductor layer 31. In this first embodiment, the MOS transistors 23-26 are provided for each pixel 3, but they can also be shared by multiple pixels.

[0046] <Multilayer wiring layer> As shown in Figure 4, the multilayer wiring layer 35 is provided on the first surface S1 side of the semiconductor layer 31, opposite to the light incident surface (second surface S2) side, and the wiring layer, including the wiring 37, is stacked in multiple layers via an interlayer insulating film 36.

[0047] The multilayer wiring layer 35 transmits image signals generated by the pixels 3. Furthermore, the multilayer wiring layer 35 transmits signals applied to the pixel circuit 29. Specifically, the multilayer wiring layer 35 constitutes the signal lines (output signal line OUT, transfer signal line TR, reset signal line RST, and selection signal line SEL) and power line Vdd as described in Figure 3. The multilayer wiring layer 35 and the pixel circuit 29 are connected by via plugs. The wiring layers of the multilayer wiring layer 35 are also connected by via plugs. The multilayer wiring layer 35 can be made of a metal such as aluminum (Al) or copper (Cu). The via plugs can be made of a metal such as tungsten (W) or Cu. For the interlayer insulating film 36 of the multilayer wiring layer 35, a silicon oxide film can be used, for example.

[0048] The pixel transistors of each pixel 3 are driven via the wiring 37 of this multilayer wiring layer 35. Since the multilayer wiring layer 35 is located on the opposite side of the semiconductor layer 31 from the light incident surface side (second surface S2 side), the degree of freedom in routing the wiring 37 is improved. The multilayer wiring layer 35 is provided across the pixel array section 2A and the peripheral section 2B.

[0049] <Fixed charge membrane> As shown in Figure 4, the fixed charge film 45 is provided across the pixel array portion 2A and the peripheral portion 2B. The fixed charge film 45 has a negative fixed charge due to the oxygen dipole and plays a role in enhancing pinning. The fixed charge film 45 can be composed of an oxide or nitride containing at least one of Hf, Al, zirconium, Ta, and Ti. It can also be composed of an oxide or nitride containing at least one of lanthanum, cerium, neodymium, promethium, samarium, europium, gadolinium, terbium, dysprosium, holmium, thulium, ytterbium, lutetium, and yttrium. Furthermore, the fixed charge film 45 can be composed of hafnium oxynitride or aluminum oxynitride. In addition, silicon or nitrogen can be added to the fixed charge film 45 in amounts that do not impair its insulating properties. This can improve heat resistance, etc. Preferably, the fixed charge film 45 also serves as an anti-reflective film for Si substrates with a high refractive index by controlling the film thickness or by multilayer lamination.

[0050] <Insulated film> As shown in Figure 4, the insulating film 46 is provided adjacent to the second surface S2 of the semiconductor layer 31 and is a film that insulates the semiconductor layer 31. This insulating film 46 is made of, for example, SiO2 and insulates and protects the back side (second surface S2 side) of the semiconductor layer 31. The insulating film 46 is provided over the entire area of ​​the pixel array portion 2A, and may also be provided over both the pixel array portion 2A and the peripheral portion 2B.

[0051] <Light-blocking film> As shown in Figure 4, the light-shielding film 47 is positioned on the semiconductor layer 31 side of the metasurface structure 50 and in a region that overlaps with the boundary of the pixel 3 in a plan view, thereby shielding stray light leaking in from adjacent pixels 3. The light-shielding film 47 can be made of any material that blocks light. For example, it is preferable to form it from a metal film such as Al, W, or copper, as it has strong light-shielding properties and can be precisely processed by microfabrication, such as etching. It can also be made from silver, gold, platinum, Mo, Cr, Ti, nickel, iron, tellurium, or alloys containing these metals. It can also be made by laminating multiple layers of these materials. To improve adhesion with the underlying insulating film 46, a barrier metal, such as Ti, Ta, W, Co, Mo, or alloys thereof, or nitrides thereof, oxides thereof, or carbides thereof, may be provided under the light-shielding film 47. Furthermore, this light-shielding film 47 may also serve to shield pixels that determine the optical black level, and may also serve to shield for noise prevention in the surrounding circuit area. The light-shielding film 47 is preferably grounded to prevent damage from plasma damage caused by accumulated charge during processing. The grounding structure may be formed within the pixel array, or it may be provided in the region outside the effective area shown in Figure 4, after all conductors are electrically connected. That is, as shown in Figure 4, the light-shielding film 47 in the peripheral part 2B may be electrically connected to the p-type semiconductor region 33 of the semiconductor layer 31. The light-shielding film 47 is located between the light incident surface side (second surface S2 side) of the semiconductor layer 31 and the metasurface structure 50, and has an opening in at least a part of the pixel 3.

[0052] <Insulated film> As shown in Figure 4, the insulating film 48 is a film arranged adjacent to the insulating film 46 and the light-shielding film 47. This insulating film 48 insulates and flattens the second surface S2 side (back side, light incident side) of the semiconductor layer 31. This insulating film 46 is made of, for example, a silicon oxide film with excellent light transmittance. The insulating film 48 is provided over the entire area of ​​the pixel array portion 2A, and may also be provided over both the pixel array portion 2A and the peripheral portion 2B.

[0053] <Support substrate> As shown in Figure 4, the support substrate 41 is provided across the pixel array section 2A and the peripheral section 2B. The support substrate 41 is a substrate that reinforces and supports the semiconductor layer 31, etc., in the manufacturing process of the solid-state imaging device 1A, and is made of, for example, a silicon substrate. The support substrate 41 is bonded to the semiconductor substrate 30 by plasma bonding or adhesive material, and supports the semiconductor layer 31, etc. The support substrate 41 may also have logic circuits, and by forming connection vias between the substrates, it is possible to reduce the chip size by stacking various peripheral circuit functions vertically.

[0054] <Correction membrane for warping> As shown in Figure 4, a warp correction film 42 is provided on the side of the multilayer wiring layer 35 opposite to the semiconductor layer 31 to reduce the warping of the wafer when bonding the semiconductor substrate 30 and the support substrate 41. This warp correction film 42 covers the entire wafer.

[0055] <Metasurface Structure> As shown in Figure 4, the metasurface structure 50 is provided for each pixel 3 on the light incident surface side (second surface S2 side) of the semiconductor layer 31, and guides the incident light to the photoelectric conversion unit 21. That is, each pixel 3 comprises a photoelectric conversion unit 21 provided in the semiconductor layer 31, and a metasurface structure 50 arranged on the light incident surface side of the semiconductor layer 31 and guiding the incident light to the photoelectric conversion unit 21. The photoelectric conversion unit 21 then converts the incident light guided by the metasurface structure 50 into photoelectric energy.

[0056] As shown in Figures 4 and 5, the metasurface structure 50 of this first embodiment is provided on the light incident surface side opposite to the semiconductor layer 31, with respect to the second surface S2 side of the semiconductor layer 31. The metasurface structure 50 of this first embodiment includes a plurality of pillars 54 arranged on the light incident surface side of the insulating film 48 at a distance shorter than the wavelength of the incident light being handled, and a transparent material 55 filled between adjacent pillars 54. The metasurface structure 50 of this first embodiment may further include an anti-reflective film 51 provided on the semiconductor layer 31 side of the pillars 54, an anti-reflective film 53 provided on the side of the pillars 54 opposite to the semiconductor layer 31, and a transparent protective film 57 provided on the side of the transparent material 55 opposite to the semiconductor layer 31. The metasurface structure 50 is not limited to the pixel array section 2A, but can also be provided in the peripheral section 2B. The purpose of the metasurface structure 50 in the peripheral section 2B is to prevent reflection so that incident light from the module lens or stray light from the set housing does not reflect off the peripheral section 2B and cause flare or ghosting, thereby degrading image quality. In other words, the design guidelines differ from those of the pixel array section 2A, which is designed to improve pixel characteristics, and it is desirable to create different layouts. For example, if an absorber such as carbon black is provided below the metasurface structure 50 in the peripheral section 2B, the metasurface structure 50 may be designed so that the optical path length within the absorber is long due to oblique incidence, thereby increasing the absorption efficiency. Alternatively, considering the entire set housing, the metasurface structure 50 may be provided at an angle so that reflected light from the peripheral section 2B does not re-enter the pixel array section 2A.

[0057] <Anti-reflective film> As shown in Figures 4 and 5, the anti-reflective film 51 is provided over the entire pixel array portion 2A, and may also extend to the peripheral portion 2B. The anti-reflective film 51 is constructed with a film thickness that takes into account the so-called λ / (4n) rule, where λ is the wavelength expected for light detection and n is the refractive index of the anti-reflective film, in order to suppress light reflection due to the refractive index interface at the bottom portion (semiconductor layer 31 side) of the pillar 54. Furthermore, to enhance the anti-reflective effect, films with different refractive indices may be stacked. This anti-reflective film 51 may also function as an etching stopper layer when forming the pillar 54 by processing the pillar-forming film by dry etching. The anti-reflective film 51 is made of a material that has an etching selectivity ratio with respect to the pillar 54.

[0058] <Pillar> As shown in Figures 4 and 5, each of the multiple pillars 54 is processed into a columnar shape and extends upward from the upper surface of the anti-reflective coating 51. The multiple pillars 54 include pillars 54 with different thicknesses, arrangement pitches, or shapes. Figure 7 shows an example of a planar layout pattern of the multiple pillars 54 (a group of pillars containing multiple pillars 54). By including such a planar layout pattern (group of pillars) of multiple pillars 54, the phase difference of light changes locally, making it possible to control the direction of light according to the layout (arrangement pattern) of the pillars 54.

[0059] The planar layout pattern of the pillar 54 may be set for each pixel 3, or multiple pixels 3 may share a single planar layout pattern. Furthermore, the planar layout pattern of the pillar 54 may be common to all pixels 3, or different planar layout patterns may be mixed for predetermined pixels 3. Figure 12 shows another example of a planar layout pattern for multiple pillars 54.

[0060] <Anti-reflective film> As shown in Figures 4 and 5, the anti-reflective film 53 is provided on one end of the pillar 54 opposite to the semiconductor layer 31 side. The anti-reflective film 53 is constructed with a film thickness that takes into account the so-called λ / (4n) rule in order to suppress the reflection of light (incident light) at the refractive index interface on the upper part of the pillar 54. Furthermore, to enhance the anti-reflective effect, films with different refractive indices may be laminated. By forming the anti-reflective film 53 before processing the pillar 54, it may be applied only to the part of the pillar 54 with a high refractive index.

[0061] <Transparent material> As shown in Figures 4 and 5, the transparent material 55 may fill the space between adjacent pillars 54 and cover each of the multiple pillars 54 and the anti-reflective film 53, acting as a transparent support that connects and supports the pillars. The transparent material 55 may be provided over the entire area of ​​the pixel array section 2A, or it may extend over both the pixel array section 2A and the peripheral section 2B. This transparent material 55 can suppress defects caused by the collapse of the pillars 54 and adhesive residue from the protective tape during assembly. The transparent material 55 and the pillars 54 have different refractive indices.

[0062] The thickness dimension of the transparent material 55 from the anti-reflective coating 51 is the same as, or greater than, the height of the pillar 54 from the anti-reflective coating 51 plus the thickness of the anti-reflective coating 53.

[0063] <Transparent protective film> As shown in Figure 4, the transparent protective film 57 is provided over the entire area of ​​the pixel array portion 2A, and may also be provided over both the pixel array portion 2A and the peripheral portion 2B. The transparent protective film 57 is made of an inorganic material. In this first embodiment, the transparent protective film 57 is made of, for example, a silicon oxide film.

[0064] <Materials for the pillar> For pillar 54, especially in near-infrared (NIR) applications, it is preferable to use one of the following materials: amorphous silicon (a-Si), polysilicon, or germanium (Ge).

[0065] Furthermore, for applications primarily in the visible region, it is preferable to use one of the following materials: titanium oxide, niobium oxide, tantalum oxide, aluminum oxide, hafnium oxide, silicon nitride, silicon oxide, silicon nitride, silicon carbide, silicon oxide, silicon nitride, or zirconium oxide, or a laminated structure in which at least two of these materials are stacked.

[0066] <Planar shape of the pillar> The planar shape of the pillar 54 of the metasurface structure 50 is determined in terms of controlling the effective refractive index, controlling the anisotropy of the polarization component, the area ratio-dependent reflection component, processability, and resistance to pattern collapse. Figure 11 shows variations in the planar shape of the pillar.

[0067] In Figure 11, (1) to (3) exhibit excellent isotropy in polarization control. Alternatively, (4) to (8) have four-fold symmetry or mirror inversion symmetry with respect to the horizontal and vertical axes, or the 45-degree and 135-degree axes, from the polarization viewpoint. Alternatively, (9) to (21) exhibit uniaxial characteristics from the polarization viewpoint. Furthermore, when narrowing the short side of (12) to control the pattern, if pattern collapse occurs, it is desirable to place auxiliary patterns such as (22) and (23) to prevent collapse. When comparing with the same cross-sectional area, (3), (5), (11), (13), (17), and (19) can avoid the risk of pattern collapse and create a small effective refractive index difference. Furthermore, when comparing with the same pitch, (4) and (5) are advantageous for square arrangements, and (1) to (3) are advantageous for honeycomb structures when increasing the pillar filling ratio and creating a phase difference.

[0068] <Pillar height> The height of pillar 54 is preferably such that, with respect to the phase difference library defined by wavelength, refractive index of the pillar and transparent material, pillar shape and height, etc., the pillar diameter can be processed by the process, and the phase can be rotated by 2π or more, as described later. Figure 16 shows an example of a phase difference library for circular pillars with an amorphous Si pitch of 350 nm. When the process limit is a pillar diameter of 250 nm, it is preferable to set the pillar height to 800 nm.

[0069] <Refractive index and thickness of anti-reflective coating> It is preferable to provide anti-reflective films 51 and 53 with different refractive indices and thicknesses that cancel out the phases of reflected waves on the upper part of the pillar 54, or the lower part of the pillar 54, or both. Specifically, it is preferable that the thickness of the anti-reflective films 51 and 53 be approximately λ / (4n). In practice, it is necessary to consider the interference effect of the multilayer film and the grazing incidence characteristics, and it is preferable to optimize this through optical simulation or actual measurement.

[0070] <How to reverse phase> As shown in Figure 17, scattering occurs at the phase folding point, resulting in stray light. Furthermore, if the area ratio differs for each of the three pixels, the reflection component (sensitivity loss) changes. Therefore, it is preferable to fold the phase according to the following rules (a) and (b). (a) Folding at the pixel level (b) Intrapixel folding occurs near the pixel center. Rule (a) ensures that the area ratios of neighboring pixels are equal, thereby suppressing reflectivity variations. Rule (b) is important because stray light from the folded portion crosses the pixel boundary, causing crosstalk and degrading performance. Therefore, it is desirable to maintain a distance between the folded portion and each pixel boundary. In other words, due to symmetry, it is preferable to set the in-pixel reflection to pass near the pixel center.

[0071] <Shape of anti-reflective coating> As shown in Figure 6, the anti-reflective coating 51 includes a main portion 51a that extends two-dimensionally directly below and around the pillar 54, and a projection 51b that protrudes from the main portion 51a directly below the pillar 54 and is narrower than the width of the bottom of the pillar 54. The pillar 54 and the projection 51b of the anti-reflective coating 51 are surrounded by a transparent material 55. That is, the transparent material 55 is also filled between the end face (bottom surface) of the pillar 54 on the anti-reflective coating 51 side and the main portion 51a of the anti-reflective coating 51, outside the projection 51b of the anti-reflective coating 51. In this way, the pillar 54 and the projection 51b of the anti-reflective coating 51 are surrounded by the transparent material 55, which suppresses peeling of the transparent material 55 by an anchoring effect. Furthermore, since the projection 51b, which is processed to be narrower than the width of the bottom of the pillar, has weaker rigidity, it is desirable to make it rounded to alleviate stress concentration.

[0072] <Effective refractive index> As shown in Figure 5, when the effective refractive index considering the area ratio at the upper surface of one end of the pillar 54 is n1, the effective refractive index considering the area ratio of the anti-reflective coating 51 directly below the lower surface of the other end of the pillar 54 is n2, and the refractive index of the anti-reflective coating 51 is n3, it is desirable from the viewpoint of reflection suppression that the effective refractive index be n1>n2 and n3>n2, minimizing the influence of the discontinuous interface of the refractive index. Furthermore, it is preferable to set the heights of n2 and n3 such that the phases of the reflected waves from each interface cancel each other out.

[0073] <Materials for transparent materials> The refractive index difference between the pillar 54 and the transparent material 55 is preferably 0.3 or greater in order to create a phase difference of light. The transparent material 55 is composed of an organic or inorganic material. As an organic material, for example, any of siloxane resins, styrene resins, acrylic resins, or styrene-acrylic copolymer resins can be used, or any of siloxane resins, styrene resins, acrylic resins, or styrene-acrylic copolymer resins can be used which contain fluorine, or a siloxane resin, styrene resin, acrylic resin, or styrene-acrylic copolymer resin can be used which contains beads with a refractive index lower than these resins.

[0074] As inorganic materials, at least one of the following materials can be used: silicon oxide, niobium oxide, tantalum oxide, aluminum oxide, hafnium oxide, silicon nitride, silicon oxide nitride, silicon carbide, silicon oxide carbide, silicon nitride carbide, and zirconium oxide. Furthermore, the structure can be composed of a laminated structure in which at least two or more layers of any of these materials—silicon oxide, niobium oxide, tantalum oxide, aluminum oxide, hafnium oxide, silicon nitride, silicon oxide nitride, silicon carbide, silicon oxide carbide, silicon nitride carbide, and zirconium oxide—are stacked.

[0075] Although the solid-state imaging device 1A disclosed herein is a back-illuminated type, it is not limited to this, and can be applied to front-illuminated solid-state imaging devices, and even solid-state imaging devices using organic photoelectric conversion films.

[0076] ≪Manufacturing Method for Solid State Imaging Devices≫ Next, the manufacturing method of the solid-state imaging device 1A according to this first embodiment will be described with reference to Figures 8A and 8B, and Figures 9A to 9L. Figure 8A shows the planar structure of a semiconductor wafer, and Figure 8B is a magnified view of area A in Figure 8A, showing the structure of the chip formation region. Figures 9A to 9L are schematic longitudinal cross-sectional views illustrating the manufacturing method of the solid-state imaging device 1A.

[0077] Here, as shown in Figures 8A and 8B, the solid-state imaging device 1A is fabricated in the chip formation region 62 of the semiconductor wafer 60. The chip formation region 62 is partitioned by scribe lines 61 and arranged in a matrix. Figure 8B shows nine chip formation regions 62 arranged in a 3x3 configuration, with three in each of the X and Y directions. Then, by individually separating these multiple chip formation regions 62 along the scribe lines 61, a semiconductor chip 2 on which the solid-state imaging device 1A is mounted is formed. The separation of the chip formation region 62 is performed after the solid-state imaging device 1A has been formed in each chip formation region 62 by the manufacturing process described below. Note that scribe line 61 is not physically formed.

[0078] First, as shown in Figure 9A, a plurality of photoelectric conversion units 21, partitioned by isolation regions 32, are formed in the semiconductor layer 31. The isolation regions 32 and the photoelectric conversion units 21 can be constructed by forming a p-type semiconductor region 33 in the semiconductor layer 31, and simultaneously forming a plurality of n-type semiconductor regions 34 adjacent to each other and spaced apart within this p-type semiconductor region 33. The p-type semiconductor regions 33 located on the upper and lower sides of the n-type semiconductor region 34 (photoelectric conversion unit 21) also serve as hole charge accumulation regions for suppressing dark current. The p-type semiconductor regions 33 located on the side of the n-type semiconductor region 34 function as isolation regions 32 that electrically separate adjacent n-type semiconductor regions 34.

[0079] In this first embodiment, the manufacturing process for the solid-state imaging device 1A includes a grinding step after this step, in which the second surface S2 side of the semiconductor layer 31 is ground to reduce the thickness of the semiconductor layer 31. Therefore, the p-type semiconductor region 33 is formed to a depth greater than or equal to the thickness of the semiconductor layer 31 after the grinding step.

[0080] Next, although not shown in detail, MOS transistors 22-26 included in the pixel circuit 29 and MOS transistors included in the logic circuit are formed on the first surface S1 of the semiconductor layer 31.

[0081] Next, as shown in Figure 9B, a multilayer wiring layer 35 is formed on the first surface S1 side of the semiconductor layer 31. The multilayer wiring layer 35 has a configuration in which multiple wiring layers, each containing wiring 37, are stacked in layers with an interlayer insulating film 36 in between. This process forms a semiconductor substrate 30 including a semiconductor layer 31 and a multilayer wiring layer 35.

[0082] Next, as shown in Figure 9C, the multilayer wiring layer 35 side of the semiconductor substrate 30 and the main surface side of the support substrate 41 are bonded together via the warp correction film 42. This bonding is performed by plasma bonding. This bonding may also be performed by adhesive. The warp correction film 42 is pre-applied to the bonding surface side of the support substrate 41. This process forms a semiconductor wafer 60 including a semiconductor substrate 30 and a support substrate 41.

[0083] Next, as shown in Figure 9D, the thickness of the semiconductor layer 31 is reduced. Specifically, the second surface S2 side of the semiconductor layer 31 is etched by wet etching or dry etching to reduce its thickness, and then the second surface S2 side of the semiconductor layer 31 is further ground by CMP to reduce its thickness to a predetermined level. The thickness of the semiconductor layer 31 is set according to the wavelength range being handled. For example, although not limited to this, a range of 2 to 6 μm is preferred if only the visible light region is being detected, and a range of 3 to 15 μm is preferred if the near-infrared region is also to be detected.

[0084] Next, as shown in Figure 9E, a fixed charge film 45, an insulating film 46, a light-shielding film 47, and an insulating film 48 are formed in this order on the second surface S2 side of the semiconductor layer 31. The fixed charge film 45 can be formed by CVD (Chemical Vapor Deposition), sputtering, or atomic layer deposition (ALD). The ALD method is preferable because it provides good coverage at the atomic layer level and allows for the simultaneous formation of a silicon oxide film that reduces interface states during the deposition of the fixed charge film 45. It is preferable that the fixed charge film 45 also serves as an anti-reflective film for the high refractive index Si semiconductor layer by controlling its thickness or by multilayer stacking. When the insulating film 46 is composed of a silicon oxide film deposited by, for example, the ALD method, if it is made thin, film peeling due to blistering is more likely to occur. Therefore, it is best to make the insulating film 46 at least 20 nm thick, preferably 50 nm thick or more.

[0085] The light-shielding film 47 is formed by depositing the aforementioned material using a CVD method or a sputtering method. Since processing metal in an electrically floating state may cause plasma damage, it is preferable to transfer, for example, a resist pattern with a width of several μm in the region outside the pixel array 2A, form grooves by anisotropic etching or wet etching to expose the second surface S2 of the semiconductor layer 31, and then deposit the light-shielding material by grounding it to the semiconductor layer 31. It is preferable to ground the region of the semiconductor layer 31 to which the light-shielding material is grounded, for example, the p-type semiconductor region 33. The light-shielding material is constructed by stacking multiple layers; for example, titanium, titanium nitride, or a laminated film thereof may be used as the adhesion layer to the insulating film 46. Alternatively, titanium, titanium nitride, or a laminated film thereof alone can be used as the light-shielding film 47. Furthermore, the light-shielding material can also serve as a light-shielding film for black level calculation pixels (not shown), which are pixels for calculating the black level of the image signal, or as a light-shielding film to prevent malfunctions of peripheral circuits.

[0086] The light-shielding film 47 can be formed by creating, for example, openings for guiding light to the photoelectric conversion section, and also by forming resist cutouts in pad sections, scribe line sections, etc., on the light-shielding material, and then partially removing the light-shielding material by anisotropic etching or the like. If necessary, the residue is removed by chemical washing.

[0087] The insulating film 48 is formed by depositing a light-shielding film on the insulating film 46, for example, by depositing a silicon oxide film using a CVD method or a sputtering method. After deposition, the insulating film 48 is planarized by CMP.

[0088] Next, as shown in Figure 9F, an anti-reflective film 51, a pillar-forming film 52, and an anti-reflective film 53 are formed in this order on the side of the insulating film 48 opposite to the semiconductor layer 31 (the light incident surface side of the insulating film 48). Specifically, the anti-reflective film 51 is formed by depositing a silicon nitride (Si3N4) film with a thickness of approximately 125 nm using the CVD method. The pillar-forming film 52 is formed by depositing amorphous silicon with a thickness of approximately 800 nm using the CVD method. The anti-reflective film 53 is formed by depositing silicon nitride with a thickness of approximately 125 nm using the CVD method. In addition to amorphous silicon, the above-mentioned materials can be used as the pillar-forming film 52.

[0089] Next, as shown in Figure 9G, a resist mask RM1 with a predetermined planar layout pattern is formed on the side of the anti-reflective film 53 opposite to the semiconductor layer 31 (the side of the insulating film 48 where light is incident). This resist mask RM1 is formed using well-known photolithography techniques. The planar layout pattern of the resist mask RM1 defines the planar layout pattern of the pillar 54.

[0090] Next, the resist mask RM1 is used as an etching mask to sequentially etch the anti-reflective film 53 and pillar-forming film 52 on the outside of the resist mask RM1, forming columnar pillars 54 and anti-reflective films 53 as shown in Figure 9H. Multiple pillars 54 constitute a predetermined planar layout pattern for each pixel 3. The anti-reflective film 53 is formed on one end of each pillar 54 opposite to the semiconductor layer 31 side.

[0091] In this process, etching of the anti-reflective coating 53 and the pillar-forming coating 52 is performed, for example, using anisotropic dry etching. The etching of the pillar-forming coating 52 is performed under etching conditions that are selective to the anti-reflective coatings 53 and 51.

[0092] If the selectivity of the resist mask RM1 is insufficient, the resist pattern may be transferred to a hard mask, such as a silicon oxide film, and then etched through the hard mask using a hard mask process.

[0093] The anti-reflective coating 51 located at the bottom of the pillar 54 is provided for the purpose of optically preventing reflection, but in addition to this function, it may also serve as an etching stopper layer during etching. Alternatively, the anti-reflective coating 51 may be provided solely as an etching stopper layer without any anti-reflective design. This would increase reflection and reduce sensitivity, but it would allow for a reduction in the number of film deposition steps.

[0094] Next, wet chemical cleaning is performed to remove the resist mask RM1 and processing residue, as shown in Figure 9I. After chemical cleaning, with normal shake-drying, there is a high risk of pattern collapse due to surface tension imbalance during chemical drying. To counteract this, the surface tension may be replaced with IPA, which has low surface tension, before drying, or supercritical fluid cleaning may be used.

[0095] In this process, the anti-reflective coating 51 is etched isotropically, and as shown in Figure 9J, an anti-reflective coating 51 is formed that includes a main portion 51a that extends two-dimensionally directly below and around the pillar 54, and a rounded projection 51b that protrudes from the main portion 51a directly below the pillar 54 and is narrower than the width of the bottom of the pillar 54. The rounded, flared shape reduces stress concentration and suppresses pattern collapse originating from the projection 51b of the anti-reflective coating 51.

[0096] Next, as shown in Figure 9K, a transparent material 55 is formed between adjacent pillars 54. The transparent material 55 is transparent and made of a material with a large refractive index difference from that of the pillars 54. The transparent material 55 is formed, for example, by a fluorine-containing siloxane resin using a rotary coating method. The organic and inorganic materials mentioned above can be used as the transparent material 55. The transparent material 55 is formed with a film thickness greater than the height of the pillars 54.

[0097] In this process, the pillar 54 is supported by the transparent material 55, which prevents damage to the pillar when removing protective tape during assembly and avoids defects caused by adhesive residue in the gaps of the pillar, thus preventing failure modes due to impact from drops in the market.

[0098] Furthermore, in this process, the transparent material 55 is also filled between the end face (bottom surface) of the pillar 54 on the anti-reflective film 51 side and the main part 51a of the anti-reflective film 51, outside the protrusion 51b of the anti-reflective film 51. As a result, the pillar 54 and the protrusion 51b of the anti-reflective film 51 are surrounded by the transparent material 55, which helps to suppress peeling of the transparent material 55 through an anchoring effect.

[0099] Next, as shown in Figure 9L, a transparent protective film 57 made of an inorganic material, such as a silicon oxide film, is formed on the side of the transparent material 55 opposite to the semiconductor layer side (the light incident surface side of the transparent material 55) by CVD. This process nearly completes the metasurface structure 50 of the first embodiment.

[0100] Subsequently, by forming a bonding opening that exposes the bonding pad 14 shown in Figure 1, the solid-state imaging device 1A shown in Figure 4 is almost completed. This bonding opening is formed using a resist mask, but since the transparent material 55 is covered with a transparent protective film 57 made of inorganic material when the resist mask is removed, it is possible to avoid damage to the transparent material 55 when the resist mask is removed.

[0101] Furthermore, this process almost completes the semiconductor wafer 60 shown in Figures 8A and 8B. A solid-state imaging device 1A is formed in each of the multiple chip formation regions 62 of the semiconductor wafer 60.

[0102] Subsequently, the semiconductor chip 2 on which the solid-state imaging device 1A is mounted is formed by individually separating the multiple chip formation regions 62 of the semiconductor wafer 60 along the scribe lines 61.

[0103] <<Main effects of the first embodiment>> Next, the main effects of this first embodiment will be described. The solid-state imaging device 1A according to this first embodiment includes a metasurface structure 50. The metasurface structure 50 includes a transparent material 55 filled between adjacent pillars 54. As a result, the pillars 54 are supported by the transparent material 55, making it possible to suppress the collapse of the pillars 54.

[0104] Furthermore, the metasurface structure 50 is equipped with an anti-reflective coating 51. The anti-reflective coating 51 includes a main portion 51a that extends two-dimensionally directly below and around the pillar 54, and a rounded projection 51b that protrudes from the main portion 51a directly below the pillar 54 and is narrower in width than the bottom of the pillar 54. The pillar 54 and the projection 51b of the anti-reflective coating 51 are surrounded by a transparent material 55. As a result, peeling of the transparent material 55 can be suppressed by the anchoring effect. Moreover, the rounded, flared shape reduces stress concentration and can suppress pattern collapse originating from the projection 51b of the anti-reflective coating 51.

[0105] The solid-state imaging device 1A according to this first embodiment includes a filling step of filling the space between adjacent pillars 54 with a transparent material 55. This makes it possible to provide a solid-state imaging device 1A having a metasurface structure 50 in which the pillars 54 are supported by the transparent material 55.

[0106] <<Variations of the First Embodiment>> In the first embodiment described above, the case in which the anti-reflective coating 51 as the base layer of the pillar 54 includes a main portion 51a and a projection 51b was described. In contrast, in this modified example, as shown in Figure 10, the anti-reflective coating 51 as the base layer of the pillar 54 has a recess 51c in the portion between adjacent pillars 54 in a plan view.

[0107] In this case, if the refractive index at the upper surface of one end of the pillar 54 is n1, the refractive index at the lower surface of the other end of the pillar 54 is n2, and the refractive index at the bottom surface of the recess 51c of the anti-reflective film 51 is n3, then the effective refractive index satisfies n1>n2 and n3>n2, allowing for a stepped refractive index configuration. Compared to a shape without the recess 51c, the effect of the refractive index discontinuity interface is mitigated, which is preferable from the viewpoint of reflection suppression. Such a shape may be formed by controlling the type of gas so that the etching tapers during processing of the bottom portion, or the recess 51c may be formed in advance on the anti-reflective film 51 by a lithography process and anisotropic etching.

[0108] [Second Embodiment] A method for manufacturing a solid-state imaging device according to a second embodiment of this technology will be explained with reference to Figures 13A to 13J.

[0109] First, after performing the same steps as shown in Figures 9A to 9E of the first embodiment, an anti-reflective film 51 and a transparent material 55 are formed in this order on the side of the insulating film 48 opposite to the semiconductor layer 31 (the light incident surface side of the insulating film 48), as shown in Figure 13A. The anti-reflective film 51 is formed, for example, by depositing a silicon nitride film with a thickness of about 125 nm using the CVD method. The transparent material 55 is transparent and uses a material with a large refractive index difference from the pillar-forming film 52 (pillar 54) described later. The transparent material 55 is formed, for example, by forming a silicon oxide film using CVD. The transparent material 55 is not limited to a silicon oxide film; the inorganic and organic materials mentioned above can also be used. The transparent material 55 is formed with a thickness slightly thicker than the pillar 54 described later.

[0110] Next, as shown in Figure 13B, a resist mask RM2 with a predetermined planar layout pattern is formed on the side of the transparent material 55 opposite to the semiconductor layer 31 (the light incident surface side of the transparent material 55). This resist mask RM2 is formed using well-known photolithography techniques. The planar layout pattern of the resist mask RM2 defines the planar layout pattern of the pillar 54, which will be described later.

[0111] Next, the resist mask RM2 is used as an etching mask to etch the transparent material 55 outside the resist mask RM2 to form through holes Th1 in the transparent material 55 for forming pillars 54, and then the resist mask RM2 is removed as shown in Figure 13C.

[0112] Next, as shown in Figure 13D, a pillar-forming film 52 is formed in the through-hole Th1 of the transparent material 55. The pillar-forming film 52 is formed by depositing amorphous silicon, for example, using a highly covering method, such as the CVD method, so as not to generate voids in the through-hole Th1. Since the pillar-forming film 52 fills the through-hole Th1 of the transparent material 55 using a highly covering method, it is formed to a position higher than the upper edge of the transparent material 55. In addition to amorphous silicon, the above-mentioned materials can be used as the pillar-forming film 52.

[0113] Next, the light incident surface side of the pillar-forming film 52 is etched or ground by CMP so that the thickness of the pillar-forming film 52 is approximately the same as the thickness of the transparent material 55, as shown in Figure 13E. In this process, a plurality of pillars 54, each made of a pillar-forming film 52 and spaced apart from one another, are formed, and a transparent material 55 is formed between adjacent pillars 54 in a predetermined planar layout pattern. This planar layout pattern of the pillar group is formed, for example, for each pixel 3.

[0114] Next, as shown in Figure 13F, an anti-reflective film 53 is formed on the opposite side of the pillar 54 and the transparent material 55 from the anti-reflective film 51 side (the light incident surface side of the pillar 54 and the transparent material 55), extending two-dimensionally (planarly) across the pillar 54 and the transparent material 55. The anti-reflective film 53 is formed, for example, by depositing a silicon nitride film with a thickness of about 125 nm using the CVD method.

[0115] This process makes it possible to form a metasurface structure in which a transparent material 55 is filled between adjacent pillars 54.

[0116] In this second embodiment of the manufacturing method for the solid-state imaging device, the same effects as those obtained in the manufacturing method for the solid-state imaging device 1A according to the first embodiment described above can be obtained.

[0117] [Third Embodiment] The solid-state imaging device 1B according to the third embodiment of this technology has basically the same configuration as the solid-state imaging device 1A according to the first embodiment described above, but differs in the following configurations.

[0118] In other words, as shown in Figure 14, the solid-state imaging device 1B according to this third embodiment has two layers of metasurface structures 50 stacked on top of each other.

[0119] The lower of the two stages, the metasurface structure 50, includes a plurality of pillars 54 arranged on the light incident surface side of the insulating film 48 at a distance shorter than the wavelength of the incident light being handled, a transparent material 55 filled between adjacent pillars 54 and pillars 54, an anti-reflective film 51 provided on the semiconductor layer 31 side of the pillars 54, and an anti-reflective film 53 provided on the side of the pillars 54 opposite to the semiconductor layer 31 side.

[0120] The upper of the two stages, the metasurface structure 50, includes a plurality of pillars 54 arranged on the light incident surface side of the insulating film 48 at a distance shorter than the wavelength of the incident light being handled, a transparent material 55 filled between adjacent pillars 54, an anti-reflective film 51 provided on the semiconductor layer 31 side of the pillars 54, an anti-reflective film 53 provided on the side of the pillars 54 opposite to the semiconductor layer 31, and a transparent protective film 57 provided on the side of the transparent material 55 opposite to the semiconductor layer 31.

[0121] In this way, by stacking the metasurface structure 50 in two layers, and by changing the design of the metasurface structure 50 in each layer and combining them, it becomes possible to broaden the wavelength bandwidth and enable multispectral projection. Furthermore, it becomes possible to achieve polarization control.

[0122] Furthermore, while it may be difficult to increase the height of the pillars 54 due to the tilting of the pillars 54 caused by wet chemical cleaning, this problem can be avoided by stacking the metasurface structure 50 in two layers, as in this third embodiment.

[0123] In this third embodiment, the case in which the metasurface structure 50 is stacked in two layers has been described, but the metasurface structure 50 may be stacked in two or more layers (multiple layers).

[0124] [Fourth Embodiment] The solid-state imaging device 1C according to the fourth embodiment of this technology has basically the same configuration as the solid-state imaging device 1A according to the first embodiment described above, but differs in the following configurations.

[0125] That is, as shown in Figure 15, in this fourth embodiment of the solid-state imaging device 1C, the transparent material 55 is divided into sections by grooves 58 for each pixel 3. A transparent protective film 57 may be provided on the side walls and bottom surfaces within the grooves 58, as well as on the upper surface (light incident surface) of the transparent material 55.

[0126] In this way, by dividing the transparent material 55 with grooves 58 for each pixel 3, in addition to controlling the pillars 54, it becomes possible to guide the light (incident light) near the boundary of the pixel 3 to the pixel itself due to the difference in refractive index between the transparent material 55 and the atmosphere (air).

[0127] Furthermore, by dividing the transparent material 55 with grooves 58 for each pixel 3, a lens effect is brought about in the transparent material 55, which provides the effects of suppressing color mixing and improving sensitivity. It is preferable to select the material and film thickness of the transparent protective film 57 in accordance with the λ / (4n) rule to prevent reflection.

[0128] [Fifth Embodiment] The solid-state imaging device 1D according to the fifth embodiment of this technology has basically the same configuration as the solid-state imaging device 1A according to the first embodiment described above, but differs in the following configurations.

[0129] That is, as shown in Figures 18 and 19, the solid-state imaging device 1D according to this fifth embodiment is equipped with a metasurface structure 70 instead of the metasurface structure 50 shown in Figures 4 and 5 of the first embodiment described above. The other configurations are generally the same as those of the first embodiment described above, so their explanation is omitted here.

[0130] <Metasurface Structure> As shown in Figures 18 and 19, the metasurface structure 70 of this fifth embodiment, like the metasurface structure 50 of the first embodiment described above, is provided on the second surface S2 side of the semiconductor layer 31, and on the light incident surface side opposite to the semiconductor layer 31 side with respect to the second surface S2 side of the semiconductor layer 31. The metasurface structure 70 of this fifth embodiment includes a plurality of pillars 79 arranged on the light incident surface side of the insulating film 48 at a distance shorter than the wavelength of the incident light being handled, and transparent reinforcing beams 77 that support the pillars 79 between adjacent pillars 79.

[0131] Furthermore, the metasurface structure 70 of this fifth embodiment may further include an anti-reflective film 71 provided on the insulating film 48 side of the pillar 79, and an anti-reflective film 80 provided on the side of the pillar 79 opposite to the insulating film 48 side. The metasurface structure 70 of this fifth embodiment is also provided for each pixel 3 on the light incident surface side (second surface S2 side) of the semiconductor layer 31, and guides the incident light to the photoelectric conversion unit 21.

[0132] <Anti-reflective film> The anti-reflective film 71, like the anti-reflective film 51 of the first embodiment described above, is provided over the entire area of ​​the pixel array portion 2A and extends across both the pixel array portion 2A and the peripheral portion 2B. The anti-reflective film 71, like the anti-reflective film 51 of the first embodiment described above, is constructed with a film thickness that takes into account the so-called λ / (4n) rule in order to suppress light reflection due to the refractive index interface at the bottom portion (semiconductor layer 31 side) of the pillar 79. Furthermore, to enhance the anti-reflective effect, films with different refractive indices may be laminated.

[0133] Furthermore, this anti-reflective film 71 functions as an etching stopper layer when dry etching is performed to form the pillars 54, or when dry etching is performed on the transparent material 55 for embedding the pillar-forming film. The anti-reflective film 71 is made of a material that has an etching selectivity ratio with respect to the pillars 79.

[0134] <Pillar> As shown in Figures 18 and 19, each of the multiple pillars 79 is processed into a columnar shape and extends upward from the upper surface of the anti-reflective coating 71. The multiple pillars 79 include pillars 79 of different thicknesses, arrangement pitches, or shapes. The group of pillars including the multiple pillars 79 in this fifth embodiment also has a planar layout pattern similar to, for example, the group of pillars including the multiple pillars 54 in the first embodiment described above. By including such a planar layout pattern of the group of pillars composed of multiple pillars 79, the phase difference of light is changed locally, making it possible to control the direction of light according to the layout (arrangement pattern) of the pillars 79.

[0135] Furthermore, the planar layout pattern of a pillar group containing multiple pillars 79 may be set for each pixel 3, or multiple pixels 3 may share a single planar layout pattern. Also, the planar layout pattern of a pillar group containing multiple pillars 79 may be common to all pixels 3, or different planar layout patterns may be mixed for a predetermined number of pixels 3.

[0136] <Anti-reflective film> As shown in Figures 18 and 19, the anti-reflective film 80 may be provided on one end of the pillar 79 opposite to the semiconductor layer 31 side, for each pillar 79, similar to the anti-reflective film 53 in the first embodiment described above. The anti-reflective film 80 is constructed with a film thickness that takes into account the so-called λ / (4n) rule in order to suppress the reflection of light (incident light) at the refractive index interface on the upper part of the pillar 79. Furthermore, to enhance the anti-reflective effect, films with different refractive indices may be laminated. By forming the anti-reflective film 80 before processing the pillar 79, it may be provided only on the parts of the pillar 79 with a high refractive index.

[0137] <Transparent reinforcing beam> As shown in Figures 18 and 19, the transparent reinforcing beam 77 is provided as a transparent support that connects and supports the pillars, between adjacent pillars 79, supporting the adjacent pillars 79, and spaced apart from the anti-reflective film 71 so that a gap 81 exists between the beam and the anti-reflective film 71. The transparent reinforcing beam 77 increases the overall strength of the pillars by connecting each of the multiple pillars 79 in a two-dimensional plane including the X and Y directions.

[0138] ≪Manufacturing Method for Solid State Imaging Devices≫ Next, the manufacturing method of the solid-state imaging device 1D according to this fifth embodiment will be described. Here, we will focus on the manufacturing method of the metasurface structure 70 and will explain it using Figures 20A to 20H.

[0139] First, after performing the same steps as shown in Figures 9A to 9E of the first embodiment described above, as shown in Figure 20A, an anti-reflective film 71, a first sacrificial film 72, a support-forming film (support film, reinforcing beam-forming film) 73, a second sacrificial film 74, an amorphous carbon film 75, and an anti-reflective film 76 are formed on the side of the insulating film 48 opposite to the semiconductor layer 31 (the light incident surface side of the insulating film 48), in order from the insulating film 48 side. The anti-reflective film 71 is formed, for example, by depositing a silicon nitride (Si3N4) film with a thickness of about 125 nm using the CVD method. The first sacrificial film 72 and the second sacrificial film 74 are formed, for example, by depositing a silicon oxide film using the CVD method. The support-forming film 73 is formed, for example, by depositing a silicon nitride film using the CVD method. The anti-reflective film 76 is formed, for example, by depositing a silicon nitride film using the CVD method.

[0140] The support film 73 can be any of the following materials: titanium oxide, niobium oxide, tantalum oxide, aluminum oxide, hafnium oxide, silicon nitride, silicon oxide, silicon nitride, silicon carbide, silicon oxide carbide, silicon nitride carbide, or zirconium oxide, or a laminated structure thereof. It is desirable that there is no absorption in the wavelength range targeted by the photodetector.

[0141] Next, as shown in Figure 20A, a resist mask RM4 with a predetermined planar layout pattern is formed on the side of the anti-reflective film 76 opposite to the amorphous carbon film 75 side (the side of the anti-reflective film where light is incident). This resist mask RM4 is formed using well-known photolithography techniques. The planar layout pattern of the resist mask RM4 defines the planar layout pattern of the pillar 59.

[0142] Next, the resist mask RM4 is used as an etching mask, and the anti-reflective film 76, amorphous carbon film 75, second sacrificial film 74, support-forming film 73, and first sacrificial film 72 outside the resist mask RM4 are sequentially etched by dry etching to form through-holes Th1 for forming pillars 79, as shown in Figure 20B. The through-holes Th1 are formed to a depth that reaches from the upper surface of the anti-reflective film 76 to the anti-reflective film 71. The size and position of the through-holes Th1 are determined by the optical properties, so they are not necessarily arranged at equal intervals. In this process, a transparent reinforcing beam 77 made of a support-forming film 73 is formed around the through-hole Th1.

[0143] Next, as shown in Figure 20C, the resist mask RM4, the anti-reflective film 76, and the amorphous carbon film 75 are selectively removed.

[0144] Next, as shown in Figure 20D, a pillar-forming film 78 is formed on the side of the second sacrificial film 74 opposite to the transparent reinforcing beam 77 by filling the through-hole Th1 with a high-coverage film deposition method such as ALD or CVD to prevent void formation.

[0145] Next, as shown in Figure 20E, the pillar-forming film 78 on the second sacrificial film 74 side is selectively removed by CMP or full-surface etch-back method so that the pillar-forming film 78 remains in the through-hole Th1, thereby exposing the second sacrificial film 74. In this process, a pillar 79 made of a pillar-forming film 78 is formed inside the through hole Th1.

[0146] Next, when forming an anti-reflective coating on the upper part of the pillar 79, as shown in Figure 20F, an anti-reflective coating 80 is formed that extends two-dimensionally (planarly) across the pillar 79 and the second sacrificial film 74 on the side opposite to the transparent reinforcing beam 77 of each of the pillar 79 and the second sacrificial film 74.

[0147] The anti-reflective film 80 is formed by depositing one of the following materials (titanium oxide, niobium oxide, tantalum oxide, aluminum oxide, hafnium oxide, silicon nitride, silicon oxide, silicon nitride, silicon carbide, silicon oxide carbide, silicon nitride carbide, zirconium oxide, or a laminated structure thereof).

[0148] Here, since the surface of the pillar 79 exhibits high light reflection, it is preferable to form an anti-reflective coating 80. For example, if the pillar 79 is made of a-Si with a refractive index of about 3.5, it is desirable to suppress reflection by forming a silicon nitride film with a refractive index of about 1.8, which is intermediate with that of air, and it is preferable to configure the film thickness considering the λ / (4n) rule.

[0149] Next, the anti-reflective coating 80 is patterned to form anti-reflective coatings 80 that are individually placed on multiple pillars 79, as shown in Figure 20G. The patterning of the anti-reflective coating 80 is performed using well-known photolithography and dry etching techniques.

[0150] Next, as shown in Figure 20H, the second sacrificial film 74 and the first sacrificial film 72 are removed. A wet etching method using hydrofluoric acid (HF) as the etching agent can be used to remove the second sacrificial film 74 and the first sacrificial film 72. In this process, transparent reinforcing beams 77 are formed between adjacent pillars 79, supporting them and spaced apart from the anti-reflective coating 71, and a gap 81 is formed between the anti-reflective coating 71 and the transparent reinforcing beams 77. The gap 81 functions as an air layer and has a refractive index of 1, so the refractive index difference with the pillars 79 can be increased compared to the case in the first embodiment described above where a transparent material 55 is filled between adjacent pillars 54. This process nearly completes the metasurface structure 70 of this fifth embodiment.

[0151] In this fifth embodiment of the solid-state imaging device 1D, the same effects as those obtained in the solid-state imaging device 1A according to the first embodiment described above can be obtained. Furthermore, the manufacturing method of the solid-state imaging device 1D according to this fifth embodiment also provides the same effects as the manufacturing method of the solid-state imaging device 1A according to the first embodiment described above.

[0152] [Sixth Embodiment] The solid-state imaging device according to the sixth embodiment of this technology has basically the same configuration as the solid-state imaging device 1D according to the fifth embodiment described above, but differs in the following configurations.

[0153] In other words, the solid-state imaging device according to this sixth embodiment is equipped with a metasurface structure 70A shown in Figure 21, instead of the metasurface structure 70 shown in Figures 18 and 19 of the fifth embodiment described above. Unlike the metasurface structure 70, the metasurface structure 70A of this sixth embodiment has transparent reinforcing beams 77 spaced apart from each other and arranged in two stages in the height direction of the pillar 79, as shown in Figure 21. The other configurations are generally the same as those of the fifth embodiment described above.

[0154] The manufacturing method of the solid-state imaging device according to this sixth embodiment will be described below, focusing specifically on the manufacturing method of the metasurface structure 70A, using Figures 22A to 22C.

[0155] First, after performing the same steps as shown in Figures 9A to 9E of the first embodiment described above, as shown in Figure 22A, an anti-reflective film 71, a first sacrificial film 72, a support-forming film (support film, reinforcing beam-forming film) 73, a first sacrificial film 72, a support-forming film (support film) 73, a second sacrificial film 74, an amorphous carbon film 75, and an anti-reflective film 76 are formed on the side of the insulating film 48 opposite to the semiconductor layer 31 (the light incident surface side of the insulating film 48), in order from the insulating film 48 side.

[0156] Next, the anti-reflective film 76, amorphous carbon film 75, second sacrificial film 74, support-forming film 73, first sacrificial film 72, support-forming film 73 and first sacrificial film 72 are sequentially patterned to form through-holes Th1 for forming pillars 79, as shown in Figure 22B. The through-holes Th1 are formed to a depth that reaches from the upper surface of the anti-reflective film 76 to the anti-reflective film 71. These patternings are performed using photolithography and dry etching techniques similar to those in the fifth embodiment described above.

[0157] After selectively removing the anti-reflective coating 76 and the amorphous carbon coating 75, a pillar-forming coating 78 is formed on the side of the second sacrificial coating 74 opposite to the transparent reinforcing beam 77, filling the through-hole Th1, as shown in Figure 22C.

[0158] Subsequently, the metasurface structure 70A of this sixth embodiment can be formed by performing the same steps as in the fifth embodiment described above.

[0159] In this sixth embodiment of the solid-state imaging device, the same effects as those obtained in the solid-state imaging device 1D according to the fifth embodiment described above can be obtained. Furthermore, the same effects as those obtained for the manufacturing method of the solid-state imaging device 1D according to the fifth embodiment described above can be obtained in the manufacturing method of the solid-state imaging device 6 according to this sixth embodiment.

[0160] In addition, the solid-state imaging device according to the sixth embodiment includes transparent reinforcing beams 77 that are stacked in two stages with a gap therebetween. Therefore, compared with the case where a single-stage transparent reinforcing beam 77 is provided, deformation of the pillar 79 can be further suppressed. The two-stage arrangement of the transparent reinforcing beams 77 is particularly useful when the height of the pillar 79 is high.

[0161] In the sixth embodiment, the case where the transparent reinforcing beams 77 are stacked in two stages has been described. However, the transparent reinforcing beams 77 may be stacked in two or more (a plurality of) stages.

[0162] 〔Seventh Embodiment〕 The solid-state imaging device according to the seventh embodiment of the present technology basically has the same configuration as the solid-state imaging device 1D according to the fifth embodiment described above, and the following configuration is different. That is, the solid-state imaging device according to the seventh embodiment includes a metasurface structure 70B shown in FIG. 23 instead of the metasurface structure 70 shown in FIGS. 18 and 19 of the fifth embodiment described above. And, unlike the metasurface structure 70A, in the metasurface structure 70B of the seventh embodiment, as shown in FIG. 23, one end side of the pillar 79 is covered with the thin film portion 77a of the transparent reinforcing beam 77. Other configurations are substantially the same as those of the fifth embodiment described above.

[0163] Hereinafter, a method for manufacturing the solid-state imaging device according to the seventh embodiment will be described with a focus on the method for manufacturing the metasurface structure 70B using FIGS. 24A to 24H.

[0164] First, after performing the same steps as those shown in FIGS. 9A to 9E of the above-described first embodiment, as shown in FIG. 24A, on the side of the insulating film 48 opposite to the semiconductor layer 31 side (the light incident surface side of the insulating film 48), an antireflection film 71 and a pillar forming film 78 are formed in this order from the insulating film 48 side. The antireflection film 71, which will be described later, functions as a stopper film when forming pillars and also functions as an antireflection film at the interface between the insulating film 48 as a base film and the pillar 79. As the antireflection film 71, for example, a silicon oxide film is used. As the pillar forming film 78, for example, amorphous silicon, polysilicon, germanium, or the like is used.

[0165] Next, the pillar forming film 78 is patterned into a predetermined planar layout pattern to form pillars 79 made of the pillar forming film 78 as shown in FIG. 24B. The patterning of the pillar forming film 78 is performed using well-known photolithography techniques and dry etching techniques.

[0166] Next, as shown in FIG. 24C, a first sacrificial film 72 is formed with a film thickness thinner than the height of the pillar 79 between adjacent pillars 79 and 79. The first sacrificial film 72 is formed by film formation using a coating method, CVD method, or the like.

[0167] Next, as shown in FIG. 24D, the first sacrificial film 72 on one end side of the pillar 79 is selectively removed by an etch-back method to expose the upper surface and side surface of one end side of the pillar 79.

[0168] Next, as shown in FIG. 24E, a transparent reinforcing beam 77 is formed by film formation on the first sacrificial film 72 between adjacent pillars 79 and 79. This transparent reinforcing beam 77 is formed with a film thickness thinner than the height of the portion where one end side of the pillar 79 is exposed. In this step, the transparent reinforcing beam 77 supports the pillar 79 between adjacent pillars 79 and 79. Also, in this step, one end side of the pillar 79 is covered with the thin film portion 77a of the transparent reinforcing beam 77.

[0169] Next, a second sacrificial film 74 is formed on the transparent reinforcing beam 77 between adjacent pillars 79. Then, the thin film portion 77a of the transparent reinforcing beam 77 is used as a stopper film, and the second sacrificial film 74 is removed, for example, by CMP, until the thin film portion 77a is exposed, as shown in Figure 24F.

[0170] Next, as shown in Figure 24G, an anti-reflective film 80 is formed on the pillar 79 and the second sacrificial film 74 on the side opposite to the transparent reinforcing beam 77, extending two-dimensionally across the pillar 79 and the second sacrificial film 74.

[0171] Next, the anti-reflective coating 80 is patterned to form anti-reflective coatings 80 that are individually placed on multiple pillars 79, as shown in Figure 24H. The patterning of the anti-reflective coating 80 is performed using well-known photolithography and dry etching techniques.

[0172] Next, the second sacrificial film 74 and the first sacrificial film 72 are removed, similar to the fifth embodiment described above. A wet etching method using hydrofluoric acid (HF) as the etching agent can be used to remove the second sacrificial film 74 and the first sacrificial film 72. In this process, as shown in Figure 23, a transparent reinforcing beam 77 is formed that supports the pillars 79 between adjacent pillars 79, is spaced apart from the anti-reflective coating 71, and has one end of the pillar 79 covered with a thin film portion 79a, and a gap 81 is formed between the anti-reflective coating 71 and the transparent reinforcing beam 77.

[0173] This makes it possible to form a metasurface structure 70B in which adjacent pillars 79 are supported by transparent reinforcing beams 77 between them, and a gap 81 is provided between the anti-reflective film 91 and the transparent reinforcing beams 77.

[0174] In this seventh embodiment of the solid-state imaging device, the same effects as those obtained in the solid-state imaging device 1D according to the fifth embodiment described above can be obtained. Furthermore, the same effects as those obtained for the manufacturing method of the solid-state imaging device 1D according to the fifth embodiment described above can be obtained in the manufacturing method of the solid-state imaging device 7 according to this seventh embodiment.

[0175] [Eighth Embodiment] The solid-state imaging device according to the eighth embodiment of this technology has basically the same configuration as the solid-state imaging device 1D according to the fifth embodiment described above, but differs in the following configurations.

[0176] In other words, the solid-state imaging device according to this eighth embodiment is equipped with a metasurface structure 70C shown in Figure 25, instead of the metasurface structure 70 shown in Figures 18 and 19 of the fifth embodiment described above. Unlike the metasurface structure 70A, the metasurface structure 70C of this eighth embodiment has a configuration in which the anti-reflective coating 80 extends two-dimensionally across adjacent pillars 79, as shown in Figure 25. The other configurations are generally the same as those of the fifth embodiment described above.

[0177] The manufacturing method of the solid-state imaging device according to this eighth embodiment will be described below, focusing specifically on the manufacturing method of the metasurface structure 70C, using Figures 26A to 26C.

[0178] First, the same steps as those shown in Figures 9A to 9E of the first embodiment described above are performed, and then the same steps as those shown in Figures 20A to 20D of the fifth embodiment described above are performed to form a pillar-forming film 78 on the side of the second sacrificial film 74 opposite to the reinforcing beam 77, so as shown in Figure 26A, so as to fill the through hole Th1.

[0179] Next, as shown in Figure 26B, the pillar-forming film 78 on the second sacrificial film 74 side is selectively removed by CMP or etch-back method so that the pillar-forming film 78 remains in the through-hole Th1, thereby exposing the second sacrificial film 74. In this process, a pillar 79 made of a pillar-forming film 78 is formed inside the through hole Th1.

[0180] Next, as shown in FIG. 26C, an antireflection film 80 that extends two-dimensionally (planarly) over the pillar 79 and the second sacrificial film 74 is formed on the side opposite to the transparent reinforcing beam 77 side of each of the pillar 79 and the second sacrificial film 74.

[0181] Next, as shown in FIG. 25, the second sacrificial film 74 and the first sacrificial film 72 are selectively removed. Through this process, a metasurface structure 70C can be formed in which the pillar 79 is supported by the transparent reinforcing beam 77 between adjacent pillars 79, and a gap 81 is provided between the antireflection film 91 and the transparent reinforcing beam 77.

[0182] In the solid-state imaging device according to this eighth embodiment, the same effects as those of the solid-state imaging device 1D according to the above-described fifth embodiment can be obtained. Also, in the manufacturing method of the solid-state imaging device according to this eighth embodiment, the same effects as those of the manufacturing method of the solid-state imaging device 1D according to the above-described fifth embodiment can be obtained.

[0183] 〔Eighth Embodiment〕 The solid-state imaging device according to the ninth embodiment of the present technology basically has the same configuration as the solid-state imaging device 1D according to the above-described fifth embodiment, and the following configuration is different.

[0184] That is, the solid-state imaging device according to this ninth embodiment includes a metasurface structure 70D shown in FIGS. 27A and 27B instead of the metasurface structure 70 shown in FIGS. 18 and 19 of the above-described fifth embodiment. And, unlike the metasurface structure 70A, the metasurface structure 70D of this ninth embodiment has an antireflection film 80 that extends two-dimensionally over adjacent pillars 79 and 79, and is configured in a concavo-convex shape that reflects the step formed by one end side of the pillar 79 and the transparent reinforcing beam 77. Other configurations are generally the same as those of the above-described fifth embodiment.

[0185] The manufacturing method of the solid-state imaging device according to this ninth embodiment will be described below, focusing specifically on the manufacturing method of the metasurface structure 70D, using Figures 28A to 28C.

[0186] First, the same steps as those shown in Figures 9A to 9E of the first embodiment described above are performed, and then the same steps as those shown in Figures 20A to 20D of the fifth embodiment described above are performed to form a pillar-forming film 78 on the side of the second sacrificial film 74 opposite to the transparent support film 73, so as shown in Figure 28A, so as to fill the through hole Th1.

[0187] Next, as shown in Figure 28B, the pillar-forming film 78 on the second sacrificial film 74 side is selectively removed by CMP or etch-back method so that the pillar-forming film 78 remains in the through-hole Th1, thereby exposing the second sacrificial film 74. In this process, a pillar 79 made of a pillar-forming film 78 is formed inside the through hole Th1.

[0188] Next, as shown in Figure 28C, the second sacrificial film 74 and the first sacrificial film 72 are removed. For the removal of the second sacrificial film 74 and the first sacrificial film 72, for example, a wet etching method using hydrofluoric acid (HF) as the etching agent can be used. In this process, transparent reinforcing beams 77 are formed between adjacent pillars 79, supporting them and spaced apart from the anti-reflective coating 71, and a gap 81 is formed between the anti-reflective coating 71 and the transparent reinforcing beams 77. The gap 81 functions as an air layer and has a refractive index of 1, so the refractive index difference with the pillars 79 can be increased compared to the case in the first embodiment described above where a transparent material 55 is filled between adjacent pillars 54.

[0189] Next, as shown in Figures 27A and 27B, an anti-reflective film 80 is formed that extends two-dimensionally across adjacent pillars 79 and has an uneven shape that reflects the step formed between one end of the pillar 79 and the transparent reinforcing beam 77. The anti-reflective film 80 is made from one of the following materials (titanium oxide, niobium oxide, tantalum oxide, aluminum oxide, hafnium oxide, silicon nitride, silicon oxide, silicon nitride, silicon carbide, silicon oxide carbide, silicon nitride carbide, zirconium oxide, or a multilayer structure thereof) and deposited using P-CVD, PVD, vapor deposition, etc. In this process, it is preferable to deposit the anti-reflective film 80 only on the upper surface of the pillar for optical properties. However, by considering the coverage provided by each deposition method and performing optical design accordingly, degradation of properties can be minimized.

[0190] This process makes it possible to form a metasurface structure 70D in which adjacent pillars 79 are supported by transparent reinforcing beams 77 between them, and a gap 81 is provided between the anti-reflective film 91 and the transparent reinforcing beams 77.

[0191] In this ninth embodiment of the solid-state imaging device, the same effects as those obtained in the solid-state imaging device 1D of the fifth embodiment described above can be obtained. Furthermore, the same effects as those obtained for the manufacturing method of the solid-state imaging device 1D according to the fifth embodiment described above can be obtained in the manufacturing method of the solid-state imaging device 9th embodiment.

[0192] Furthermore, regarding the target refractive index of the anti-reflective coating, for example, if the pillar is made of a-Si with a refractive index of about 3.5, it is desirable to form a silicon nitride film with a refractive index of about 1.8, which is intermediate with the refractive index of air, and it is preferable to construct it with a film thickness that takes the λ / (4n) rule into consideration.

[0193] ≪Variations≫ Furthermore, when the anti-reflective film 80 is formed by ALD, CVD, etc., as shown in Figure 29, the anti-reflective film 80 is formed on both the semiconductor layer 31 side and the side opposite to the semiconductor layer 31 side of the transparent reinforcing beam 77 (both the side with the void 81 and the side with the incident light).

[0194] Next, a method for manufacturing a modified version of this ninth embodiment will be described. In this modified version as well, the method for manufacturing the metasurface structure 70E will be explained using Figures 30A to 30C.

[0195] First, the same steps as those shown in Figures 9A to 9E of the first embodiment described above, the same steps as those shown in Figures 20A to 20D of the fifth embodiment described above, and the same steps as those shown in Figures 28A to 28B of the ninth embodiment described above are performed, and then, as shown in Figure 30A, the second sacrificial film 74 on the upper side of the transparent reinforcing beam 77 (opposite the semiconductor layer side of the transparent reinforcing beam 77) is selectively removed.

[0196] Next, as shown in Figure 30B, an anti-reflective film 80 is formed that extends two-dimensionally across adjacent pillars 79 and has an uneven shape that reflects the step formed between one end of the pillar 79 and the transparent reinforcing beam 77.

[0197] In this process, since the pillar 79 is covered by the transparent reinforcing beam 77 and the first sacrificial film 72, except for the portion that protrudes upward from the transparent reinforcing beam 77, the anti-reflective film 80 is selectively formed on the side of the transparent reinforcing beam 77 opposite to the semiconductor layer 31 side (the side of the light incident surface of the transparent reinforcing beam 77).

[0198] Next, as shown in Figure 30C, the first sacrificial film 72 is selectively removed. This process makes it possible to form a metasurface structure 70E in which adjacent pillars 79 are supported by transparent reinforcing beams 77 between them, and a gap 81 is provided between the anti-reflective film 91 and the transparent reinforcing beams 77.

[0199] In this modified solid-state imaging device according to the ninth embodiment, the same effects as those obtained in the solid-state imaging device 1D according to the fifth embodiment described above can be obtained. Furthermore, the method for manufacturing a solid-state imaging device according to this modified ninth embodiment also provides the same effects as the method for manufacturing the solid-state imaging device 1D according to the fifth embodiment described above.

[0200] <Pillar aspect ratio> Figures 31A and 31B are diagrams illustrating the tilting of the pillar. When wet cleaning is performed on pillar structures with a high aspect ratio, a difference in the drying timing of the chemical solution between the pillar PP can cause a localized imbalance in surface tension, potentially leading to the collapse of the pillars. The local force acting between these pillars PP is known as the Laplace pressure, and is formulated as ΔP = 2γ·cosθ / D, where ΔP is the Laplace pressure, γ is the surface tension of the chemical solution, θ is the contact angle, and D is the distance between the patterns. The maximum stress σmax acting on the pillar pattern is formulated as σmax = 3ΔP(H / W)^2, where H is the pillar height and W is the pillar width. A higher aspect ratio of the pillar results in a greater force acting on the pattern. If the rigidity of the pillar material is insufficient to withstand this maximum stress σmax, the pillar PP will collapse.

[0201] The technology disclosed herein is effective in creating a phase difference in metasurface design using elevated pillar structures, and by incorporating reinforcing beams, it is possible to prevent pattern collapse due to the drying of chemicals used in wet cleaning. Furthermore, a combination of a transparent material 55 and a reinforcing beam 77 may be used as a transparent support that connects and supports the pillars. In this case, it is preferable that the refractive index difference between the reinforcing beam 77 and the transparent material 55 is 0.2 or less.

[0202] [Tenth Embodiment] The solid-state imaging device 1E according to the tenth embodiment of this technology has basically the same configuration as the solid-state imaging device 1A according to the first embodiment described above, with the following differences.

[0203] That is, as shown in Figures 32 and 33, the solid-state imaging device 1E according to this tenth embodiment is equipped with a metasurface structure 90 instead of the metasurface structure 50 shown in Figures 4 and 5 of the first embodiment described above. The other configurations are generally the same as those of the first embodiment described above, so their explanation is omitted here.

[0204] <Metasurface Structure> As shown in Figures 32 and 33, the metasurface structure 90 of this tenth embodiment is provided on the light incident surface side of the insulating film 48 as the underlying layer, opposite to the semiconductor layer 31 side, similar to the metasurface structure 50 of the first embodiment described above. The metasurface structure 90 of this tenth embodiment includes a plurality of pillars 93 arranged on the light incident surface side of the insulating film 48 at a distance shorter than the wavelength of the incident light being handled, and a transparent protective film 97 supporting the pillars 93 on the side opposite to the semiconductor layer 31 side. The metasurface structure 90 of this tenth embodiment further includes a gap 99 provided between adjacent pillars 93. Furthermore, it may also include an anti-reflective film 91 provided on the insulating film 48 side of the pillars 93. The metasurface structure 90 of this tenth embodiment is also provided for each pixel 3 on the light incident surface side (second surface S2 side) of the semiconductor layer 31, and guides the incident light to the photoelectric conversion unit 21.

[0205] <Anti-reflective film> The anti-reflective film 91, like the anti-reflective film 51 of the first embodiment described above, is provided over the entire area of ​​the pixel array portion 2A and extends across both the pixel array portion 2A and the peripheral portion 2B. The anti-reflective film 91, like the anti-reflective film 51 of the first embodiment described above, is constructed with a film thickness that takes into account the so-called λ / (4n) rule in order to suppress light reflection due to the refractive index interface at the bottom portion (semiconductor layer 31 side) of the pillar 93. Furthermore, films with different refractive indices may be laminated to enhance the anti-reflective effect. This anti-reflective film 91 functions as an etching stopper layer when the pillar-forming film is processed by dry etching to form the pillar 93. The anti-reflective film 91 is made of a material that has an etching selectivity ratio with respect to the pillar 93.

[0206] <Pillar> As shown in Figures 32 and 33, each of the multiple pillars 93 is processed into a columnar shape and extends upward from the upper surface of the anti-reflective coating 91. The multiple pillars 93 include pillars 93 with different thicknesses, arrangement pitches, or shapes. The group of pillars 93 in this tenth embodiment also has a planar layout pattern similar to, for example, the group of pillars 54 in the first embodiment described above. By including such a planar layout pattern of the group of pillars 93, the phase difference of light changes locally, making it possible to control the direction of light according to the layout (arrangement pattern) of the pillars 93.

[0207] <Transparent protective film> As shown in Figures 32 and 33, the transparent protective film 97 is configured to extend two-dimensionally across adjacent pillars 93. The transparent protective film 97 supports the other end of each adjacent pillar 93 and is spaced apart from the anti-reflective film 91 so that a gap 81 exists between it and the anti-reflective film 91. In other words, each of the multiple pillars 93 is supported at one end by the anti-reflective film 91 and at the other end opposite to the first end by the transparent protective film 97.

[0208] The transparent protective film 97 may be provided over the entire area of ​​the pixel array 2A, or it may be provided for each individual pixel 3, or it may be shared by multiple pixels 3. In this tenth embodiment, the transparent protective film 97 is provided over the entire area of ​​the pixel array 2A.

[0209] The transparent protective film 97 may be constructed with a film thickness that takes into account the so-called λ / (4n) rule in order to suppress the reflection of light (incident light) at the refractive index interface on the upper part of the pillar 93. Furthermore, films with different refractive indices may be laminated to enhance the anti-reflective effect. In other words, the transparent protective film 97 can support adjacent pillars 93 with their other end faces and also have an anti-reflective function.

[0210] ≪Manufacturing Method for Solid State Imaging Devices≫ Next, a method for manufacturing the solid-state imaging device 1E according to this tenth embodiment will be described. Here, we will focus on the method for manufacturing the metasurface structure 90 and will explain it using Figures 33A to 33E.

[0211] First, after performing the same steps as shown in Figures 9A to 9E of the first embodiment described above, an anti-reflective film 91 and a plurality of pillars 93 are formed on the side of the insulating film 48 opposite to the semiconductor layer 31 side (the light incident surface side of the insulating film 48), starting from the insulating film 48 side, as shown in Figure 34A.

[0212] The anti-reflective coating 91 is formed, for example, by depositing a silicon nitride (Si3N4) film with a thickness of about 125 nm using a CVD method. Multiple pillars 93 can be formed by depositing a pillar-forming film on the anti-reflective coating 91, and then patterning this pillar-forming film using an etching mask with a predetermined pattern.

[0213] Pillar-forming films are created by depositing amorphous silicon (a-Si), polycrystalline silicon (Poly Si), titanium dioxide, niobium oxide, tantalum oxide, aluminum oxide, hafnium oxide, silicon nitride, silicon oxide, silicon nitride oxide, silicon carbide, silicon oxide carbide, silicon nitride oxide, or zirconium oxide, or by depositing a laminated structure of these materials, using ALD (Atomic Layer Deposition), CVD (Chemical Vapor Deposition), PVD (Physical Vapor Deposition), or a coating method (Spin Coat).

[0214] Next, as shown in Figure 34B, a sacrificial film 95 is formed on the pillar 93 side of the anti-reflective coating 91 so as to fill the gaps between adjacent pillars 93. The sacrificial film 95 is formed, for example, by depositing a silicon oxide film using the CVD method. The sacrificial film 95 is formed with a thickness greater than the height of the pillar 93.

[0215] Next, as shown in Figure 34C, the sacrificial film 95 is selectively removed from the side opposite to the anti-reflective film 91 (the upper surface side of the sacrificial film 95) by CMP or full-surface etch-back method, so that the sacrificial film 95 remains between adjacent pillars 93, thereby exposing one end of the pillar 93.

[0216] Next, as shown in Figure 34D, a transparent protective film 97 is formed on the opposite side of each pillar 93 and sacrificial film 95 from the anti-reflective film 91 side, extending two-dimensionally (planarly) across the pillar 93 and sacrificial film 95. The transparent protective film 97 is formed by depositing one of the following materials (titanium oxide, niobium oxide, tantalum oxide, aluminum oxide, hafnium oxide, silicon nitride, silicon oxide, silicon nitride, silicon carbide, silicon oxide carbide, silicon nitride carbide, zirconium oxide, or a laminated structure thereof). In this embodiment, a silicon nitride film is used. It is preferable to give the transparent protective film 97 a reflective function. For example, if the pillar 93 is a-Si with a refractive index of about 3.5, it is preferable to form a silicon nitride film with a refractive index of about 1.8, which is intermediate with the refractive index of air, and it is preferable to configure the film thickness considering the λ / (4n) rule.

[0217] Next, as shown in Figure 34E, the sacrificial film 95 is selectively removed. The removal of the sacrificial film 95 is performed using a wet etching method or a dry etching method that has a high selectivity ratio for the anti-reflective film 91, pillars 93, and transparent protective film 97. In this embodiment, the sacrificial film 95 was removed using a wet etching method with hydrofluoric acid (HF) as the etching agent.

[0218] In this process, adjacent pillars 93 are supported by a transparent protective film on each other's other end, and a gap 99 is formed between the anti-reflective film 91 and the transparent protective film 97. The gap 99 functions as an air layer and has a refractive index of 1, so the refractive index difference with the pillars 93 can be increased compared to the case in the first embodiment described above where a transparent material 55 is filled between adjacent pillars 54. This process nearly completes the metasurface structure 90 of the tenth embodiment. Furthermore, in order to form this hollow structure, it is necessary to increase the etching selectivity ratio of the pillars 93, transparent protective film 97, and anti-reflective film 91 that remain after processing, and the sacrificial film 95 that is removed after processing, thus limiting the combination of materials and removal methods. For example, when the sacrificial film 95 is SiO2, the removal method can be wet etching with hydrofluoric acid, and suitable materials to remain are amorphous silicon, polysilicon, titanium oxide, silicon nitride, etc. In addition, Ge, SiC, SiOC, and SiNC can also be materials to remain. Alternatively, when the sacrificial film 95 is aluminum or an aluminum alloy containing AlCu, AlSi, etc., removal methods include nitric acid, phosphoric acid, sulfuric acid, hydrochloric acid, and mixtures of these with hydrogen peroxide, and wet etching with SC-1, etc., and the materials to be left behind are preferably amorphous silicon, polysilicon, silicon nitride, etc. In addition, Nb2O5, Ge, SiO2, SiON, SiC, SiOC, and SiNC can also be left behind materials. Alternatively, when the sacrificial film 95 is made of pure aluminum or titanium, removal methods include dry etching using chlorine gas, and suitable materials to be left behind include amorphous silicon, polysilicon, and silicon nitride. In addition, Nb2O5, ZrO2, Al2O3, HfO2, SiO2, SiON, SiC, SiOC, and SiNC can also be left behind. Alternatively, when the sacrificial film 95 is made of Cu, removal methods include wet etching using a mixture of phosphoric acid, sulfuric acid, hydrochloric acid, and hydrogen peroxide, and suitable materials to be left behind include titanium oxide and silicon nitride. In addition, Nb2O5, Ge, SiO2, SiON, SiC, SiOC, and SiNC can also be left behind materials. Alternatively, when the sacrificial film 95 is an SOG film, removal methods include wet etching using an AZ remover, and suitable materials to be left behind include amorphous silicon, polysilicon, titanium oxide, and silicon nitride. In addition, Nb2O5, ZrO2, Ge, HfO2, SiO2, SiON, SiC, SiOC, and SiNC can also be left behind. Alternatively, when the sacrificial film 95 is tungsten, removal methods include dry etching using SF6 gas, and suitable materials to be left behind include amorphous silicon, polysilicon, titanium oxide, and silicon nitride. In addition, Nb2O5, ZrO2, Al2O3, HfO2, SiO2, SiON, SiC, SiOC, and SiNC can also be left behind. Alternatively, when the sacrificial film 95 is an organic film, removal methods include dry etching using oxygen gas and wet etching using a mixture of sulfuric acid and an oxidizing agent such as hydrogen peroxide. Suitable materials to be retained include amorphous silicon, polysilicon, titanium dioxide, and silicon nitride. In addition, Nb2O5, ZrO2, Ge, HfO2, SiO2, SiON, SiC, SiOC, and SiNC can also be retained materials. As for Al2O3, it can be retained by dry etching using oxygen gas. The materials and removal methods described above are combinations that the authors discovered through their experiments to have a high etching selectivity and produce almost no defects due to residue, but they are not limited to these.

[0219] In this tenth embodiment of the solid-state imaging device 1E, the same effects as those of the solid-state imaging device 1A according to the first embodiment described above can be obtained. Furthermore, the manufacturing method of the solid-state imaging device 1E according to this tenth embodiment also provides the same effects as the manufacturing method of the solid-state imaging device 1A according to the first embodiment described above. Furthermore, in this tenth embodiment of the solid-state imaging device 1E, similar to the solid-state imaging device 1D of the fifth embodiment described above, the refractive index difference with the pillar 93 can be further increased.

[0220] [Embodiment No. 11] A method for manufacturing a solid-state imaging device according to the 11th embodiment of this technology will be described. Here, we will focus on the method for manufacturing a metasurface structure and will explain it using Figures 35A to 35D.

[0221] First, the same steps as those shown in Figures 9A to 9E of the first embodiment and the same steps as those shown in Figures 34A to 34C of the tenth embodiment are performed. Then, as shown in Figure 35A, a transparent protective film 97 is formed in the same manner as in the tenth embodiment, extending two-dimensionally (planarly) across the pillar 93 and the sacrificial film 95 on the opposite side of each pillar 93 and sacrificial film 95 from the anti-reflective film 91 side. This transparent protective film 97 of the eleventh embodiment is formed with a thinner film thickness than the transparent protective film 97 of the tenth embodiment.

[0222] Next, as shown in Figure 35B, through-holes 97a are formed in the transparent protective film 97, penetrating from both the front and back surfaces. The through-holes 97a are holes that facilitate the supply of etching solution or etching gas to the sacrificial film 95 when removing the sacrificial film 95, and are preferably opened at pixel boundaries or in invalid regions. The through-holes 97a are formed using well-known photolithography and etching techniques. The through-holes 97a are formed in positions that overlap with the sacrificial film 95 in a plan view.

[0223] Next, as shown in Figure 35C, the sacrificial film 95 is selectively removed. The removal of the sacrificial film 95 is performed using a wet etching method or a dry etching method that has a high selectivity ratio for the anti-reflective film 91, pillar 93, and transparent protective film 97. In this embodiment, the sacrificial film 95 was removed using a wet etching method with hydrofluoric acid (HF) as the etching agent. In this process, the etching solution is supplied from the outer periphery of the transparent protective film 97 and also through the through-holes 97a of the transparent protective film 97, making it useful when there are problems with residue or processing time. In this process, adjacent pillars 93 are supported by a transparent protective film 97 at one end, and a gap 99 is formed between the anti-reflective film 91 and the transparent protective film 97.

[0224] Next, as shown in Figure 35D, a film is deposited on the upper surface of the transparent protective film 97 to close the through-holes 97a. It is useful to use a film deposition method with low coverage, such as sputtering, to close the through-holes 97a. This film deposition to close the through-holes 97a increases the thickness of the transparent protective film 97. In addition, although traces of the through-holes 97a remain, it is possible to avoid characteristic effects by opening them at pixel boundaries or in invalid regions. This process nearly completes the metasurface structure 90 of this 11th embodiment. It should be noted that blocking the through-hole 97a is not always necessary, and if there are no problems such as residue in subsequent processes, it is not necessary to block the through-hole 97a.

[0225] In this 11th embodiment of the solid-state imaging device, the same effects as those of the solid-state imaging device 1E according to the 10th embodiment described above can be obtained. Furthermore, the same effects as those obtained for the manufacturing method of the solid-state imaging device 1E according to the 11th embodiment can be obtained in this 11th embodiment as well.

[0226] [Twelfth Embodiment] A method for manufacturing a solid-state imaging device according to the 12th embodiment of this technology will be described. Here, the method for manufacturing a metasurface structure will be explained using Figures 36A to 36F. In the 10th embodiment described above, the process of forming a sacrificial film after forming pillars was explained, but in this 12th embodiment, the process of forming a pillar by creating an opening in the sacrificial film that is the negative-positive inversion pattern of the pillar and embedding a pillar-forming film (pillar material) into this opening will be explained.

[0227] First, after performing the same steps as shown in Figures 9A to 9E of the first embodiment, an anti-reflective film 91 and a sacrificial film 95 are formed on the insulating film 48 in order from the insulating film 48 side, as shown in Figure 36A.

[0228] Next, as shown in Figure 36B, a plurality of openings 95a are formed in the sacrificial film 95. The plurality of openings 95a are formed using a negative-positive inversion pattern of the pillars. The plurality of openings 95a can be formed using well-known photolithography and etching techniques.

[0229] Next, as shown in Figure 36C, the interior of each of the multiple openings 95a is filled with a pillar-forming film 92 using a high-coverage deposition method such as ALD or CVD to prevent void formation. The pillar-forming film 92 is formed with a thickness greater than the depth of the opening 95a so as to cover the sacrificial film 95.

[0230] Next, as shown in Figure 36D, the pillar-forming film 92 on the sacrificial film 95 is selectively removed by CMP or full-surface etch-back method so that the pillar-forming film 92 remains in each of the multiple openings 95a, thereby exposing the sacrificial film 95.

[0231] In this process, a pillar 93 made of a pillar-forming film 92a is formed in each of the multiple openings 95a.

[0232] Next, a transparent protective film 97 is formed as shown in Figure 36E. It is preferable to design the film thickness of the transparent protective film 97 to meet the anti-reflective conditions considering the so-called λ / (4n) rule. Furthermore, the transparent protective film 97 may be composed of multiple layers to enhance its anti-reflective function. Afterward, the sacrificial film 95 is removed as shown in Figure 36F.

[0233] In this process, adjacent pillars 93 are supported by a transparent protective film on one end of each pillar 93, and a gap 99 is formed between the anti-reflective film 91 and the transparent protective film 97. Furthermore, this process almost completes the metasurface structure 90 of the twelfth embodiment.

[0234] In this 12th embodiment of the solid-state imaging device, the same effects as the solid-state imaging device 1E according to the 10th embodiment described above can be obtained. Furthermore, the same effects as those obtained for the manufacturing method of the solid-state imaging device 1E according to the 12th embodiment can be obtained in this 12th embodiment as well.

[0235] Furthermore, in this twelfth embodiment, since the process involves embedding a pillar-forming film (pillar material) 92 into the opening 95a of the sacrificial film 95 to form a pillar 93, it is useful when forming the pillar 93 using a difficult-to-etch material such as titanium oxide.

[0236] [13th Embodiment] A method for manufacturing a solid-state imaging device according to the 13th embodiment of this technology will be described. Here, the method for manufacturing a metasurface structure will be explained using Figures 37A to 37D. The manufacturing process of this 13th embodiment is a combination of the manufacturing process of the 12th embodiment and the manufacturing process of the 211th embodiment described above.

[0237] First, the same steps as those shown in Figures 9A to 9E of the first embodiment and the same steps as those shown in Figures 34A to 34D of the twelfth embodiment are performed, and then, as shown in Figure 37A, a transparent protective film 97 is formed, and then, as shown in Figure 37B, through holes 97a are formed in the transparent protective film 97. The through holes 97a are holes that facilitate the supply of etching solution and etching gas to the sacrificial film 95 when removing the sacrificial film 95, and it is preferable that they be opened at pixel boundaries or in invalid regions. The through holes 97a are formed using well-known photolithography and etching techniques. Then, as shown in Figure 37C, the sacrificial film 95 is selectively removed. Then, as shown in Figure 37D, a film is formed on the upper surface of the transparent protective film 97 to close the through hole 97a. The steps shown in Figures 37A to 37D are the same as the steps shown in Figures 35A to 35D of the 11th embodiment described above. This process nearly completes the metasurface structure 90 of this 13th embodiment. It should be noted that blocking the through-hole 97a is not always necessary, and if there are no problems with residue or processing time, blocking the through-hole 97a is not required.

[0238] In this 13th embodiment of the solid-state imaging device, the same effects as the solid-state imaging device 1E according to the 10th embodiment described above can be obtained. Furthermore, the same effects as those obtained for the manufacturing method of the solid-state imaging device 1E according to the 11th embodiment can be obtained in this 11th embodiment as well.

[0239] [14th Embodiment] A method for manufacturing a solid-state imaging device according to the 14th embodiment of this technology will be described. Here, we will focus on the method for manufacturing a metasurface structure and will explain it using Figures 38A to 38D.

[0240] First, the same steps as those shown in Figures 9A to 9E of the first embodiment, and the same steps as those shown in Figures 36A to 36C of the twelfth embodiment are performed to reach the state shown in Figure 38A.

[0241] Next, as shown in Figure 38B, through-holes 92b are formed at positions where the pillar-forming film 92 overlaps with the sacrificial film 95 in a plan view, reaching from the surface of the pillar-forming film 92 to the sacrificial film 95. The through-holes 92b are holes that facilitate the supply of etching solution or etching gas to the sacrificial film 95 when removing the sacrificial film 95, and it is preferable that they be opened at pixel boundaries or in invalid regions. The through-holes 92b are formed using well-known photolithography and etching techniques.

[0242] Next, as shown in Figure 38C, the sacrificial film 95 is selectively removed to form a void 99. The sacrificial film 95 is removed using a wet etching method or a dry etching method that has a high selectivity ratio with respect to the anti-reflective film 91 and the pillar-forming film 92. In this embodiment, the sacrificial film 95 was removed using a wet etching method with hydrofluoric acid (HF) as the etching agent. In this process, the etching solution is supplied from the outer periphery of the pillar-forming film 92 and also from the through-holes 92b of the pillar-forming film 92, which is useful when there are problems with residue or processing time. In this process, a plurality of pillars 93 are formed, each consisting of a pillar-forming film 92, surrounded by a void 99, and connected at the other end by the pillar-forming film 92.

[0243] Next, as shown in Figure 38D, a transparent protective film 97 is formed on the side of the pillar-forming film 92 opposite to the anti-reflective film 91 side, extending in a two-dimensional (planar) manner, and the through-hole 92b is closed with this transparent protective film 97. The transparent protective film 97 is formed in the same manner as the transparent protective film 97 of the 10th embodiment described above. If the pillar-forming film 92 remains in a planar manner, reflection is likely to occur due to the difference in refractive index, so it is preferable to provide a transparent protective film 97 that has a reflective function. This process nearly completes the metasurface structure 90 of this 14th embodiment.

[0244] Furthermore, the closure of the through-hole 92b may be performed using a film deposition method with low coverage, such as sputtering. Also, although traces of the through-hole 92b remain, it is possible to avoid characteristic effects by opening it at pixel boundaries or in invalid regions.

[0245] In this 14th embodiment of the solid-state imaging device, the same effects as those of the solid-state imaging device 1E according to the 10th embodiment described above can be obtained. Furthermore, the same effects as those obtained for the manufacturing method of the solid-state imaging device 1E according to the 10th embodiment described above can be obtained in this 14th embodiment as well.

[0246] [15th Embodiment] The solid-state imaging device 1F according to the 15th embodiment of this technology has basically the same configuration as the solid-state imaging device 1E according to the 10th embodiment described above, but differs in the following configurations.

[0247] That is, as shown in Figures 39 and 40, the solid-state imaging device 1F according to this 15th embodiment is equipped with a metasurface structure 90A instead of the metasurface structure 90 shown in Figures 32 and 33 of the 10th embodiment described above. The other configurations are generally the same as those of the 10th embodiment described above.

[0248] The difference between the metasurface structure 90A of this 15th embodiment and the metasurface structure 90 of the 10th embodiment described above is that the metasurface structure 90A is equipped with an anti-reflective coating 94. That is, the metasurface structure 90A of this 15th embodiment is equipped with an anti-reflective coating 94 between the other end of the pillar 93 and the transparent protective coating 97. As shown in Figures 39 and 40, the anti-reflective film 94 is provided on each pillar 93 at the other end of the pillar 93 opposite to the semiconductor layer 31 side. The anti-reflective film 94 is constructed with a film thickness that takes into account the so-called λ / (4n) rule in order to suppress the reflection of light (incident light) at the refractive index interface on the upper part of the pillar 93. In this 15th embodiment, transparent protective films 97 with different refractive indices are laminated to enhance the anti-reflective effect.

[0249] In this 15th embodiment of the solid-state imaging device 1E, the same effects as those obtained in the solid-state imaging device 1D according to the 10th embodiment described above can be obtained.

[0250] [16th Embodiment] The solid-state imaging device 1G according to the 16th embodiment of this technology has basically the same configuration as the solid-state imaging device 1A according to the first embodiment described above, but differs in the following configurations.

[0251] That is, as shown in Figure 41, the solid-state imaging device 1G according to this 16th embodiment includes a two-tiered stacked metasurface structure. The other configurations are generally the same as those of the 10th embodiment described above.

[0252] Here, the lower of the two stages is a metasurface structure 90, which includes an anti-reflective film 91 provided on the light incident surface side of the insulating film 48, a plurality of pillars 93 arranged on the light incident surface side of the anti-reflective film 91 at a distance shorter than the wavelength of the incident light being handled, a gap 99 provided between adjacent pillars 93 and pillars 93, and a transparent protective film 97 provided on the side of the pillar 93 opposite to the semiconductor layer 31 side.

[0253] The upper of the two stages is a metasurface structure 50, which includes a plurality of pillars 54 arranged on the light incident surface side of the transparent protective film 97 at a distance shorter than the wavelength of the incident light being handled, an anti-reflective film 53 provided on one end of each pillar 54, a transparent material 55 filled between adjacent pillars 54, and a transparent protective film 57 provided on the light incident surface side of the transparent material 55.

[0254] In this way, by stacking metasurface structures in two layers, and by changing and combining the designs of the metasurface structures in each layer, it becomes possible to broaden the wavelength bandwidth, enable multispectral projection, and further, achieve polarization control.

[0255] Furthermore, while it may be difficult to increase the height of the pillars due to the tilting of the pillars 54 caused by wet chemical cleaning, the problem of increasing the height of the pillars can be avoided by stacking the metasurface structure in two layers, as in this 16th embodiment.

[0256] In this 16th embodiment, the case in which the metasurface structure is stacked in two layers has been described, but the metasurface structure may be stacked in two or more layers (multiple layers), and furthermore, any combination of the metasurface structures in the embodiments described above is possible.

[0257] [Embodiment 17] Figure 42 is a schematic longitudinal cross-sectional view showing the approximate configuration of the pixel array and peripheral portions of a solid-state imaging device according to the 17th embodiment of this technology. Figure 43 is a plan view showing one example of the configuration of the light-shielding film shown in Figure 42, and Figures 44, 45, and 46 are plan views showing modified examples of the light-shielding film.

[0258] In Figure 43, a light-shielding film 47 is formed between adjacent photoelectric conversion units 21. This suppresses crosstalk by shielding light between pixels. In addition, as shown in Figures 42 and 43, the black reference pixel is also shielded.

[0259] Figure 44 shows a structure without inter-pixel shading. In Figure 44, pillar 93 controls stray light at the pixel boundaries, thereby increasing sensitivity without inter-pixel shading.

[0260] Figure 45 shows a structure including image plane phase-difference pixels. In Figure 45, by forming pixels with different parallax using the light-shielding film 47, the subject distance is calculated from the amount of image shift, enabling high-speed focusing and distance measurement (sensing) of the camera lens. In the case of interchangeable lenses, the incident angle at the edge of the field of view changes for each lens, so it is necessary to provide phase-difference pixels according to each angle. With conventional on-chip lenses, pupil correction cannot be changed for each pixel 3, resulting in pixels where the aperture size of the light-shielding film 47 becomes narrower, reducing sensitivity. On the other hand, by using this embodiment, it becomes possible to focus light to the center of the pixel regardless of the angle of incidence, thus avoiding the generation of a narrow aperture size and preventing a decrease in sensitivity.

[0261] Figure 46 shows a pinhole structure. In Figure 46, the light-shielding film 47 is provided with a pinhole, and the incident light is focused by the metasurface structure 90 for each pixel, guiding the light to pass through the pinhole. It is desirable that the aperture ratio of the pinhole here be 25% or less. With this configuration, light that passes through the pinhole and is reflected by the second surface S2 of the semiconductor layer 31 and does not reach the photoelectric conversion unit 21 is re-reflected at the bottom surface of the pinhole and returned to the photoelectric conversion unit 21, thereby improving sensitivity. Alternatively, even if light that penetrates the semiconductor layer 31 is re-reflected by the first surface S1 or the multilayer wiring layer 35 and exits from the opposite second surface 2, it is re-reflected at the bottom surface of the pinhole and returned to the photoelectric conversion unit 21, thereby improving sensitivity. This pinhole-based confinement structure suppresses reflected light emitted from the light detector, reducing image degradation known as flare and ghosting. Furthermore, it not only suppresses reflected light generated by the light detector but also has the effect of shielding against unwanted light that unintentionally enters the light detector. This pinhole structure is effective for near-infrared light detection devices that easily penetrate the semiconductor substrate 30. On the other hand, focusing long-wavelength near-infrared light requires an on-chip lens made of a material with high refractive index, such as amorphous silicon, polysilicon, or germanium. However, strong reflection occurs if there is a planar interface with a large difference in refractive index. To counter this reflection from the on-chip lens, instead of focusing with a curved lens shape, it is possible to adjust to an appropriate effective refractive index by using a pillar, thereby suppressing reflection at the lens interface.

[0262] This embodiment increases sensitivity by aligning the light-gathering point with the pinhole. Alternatively, by changing the pillar design every 100 pixels to cause defocusing, low-sensitivity and high-sensitivity pixels can be generated, thereby achieving high dynamic range (HDR). Or, HDR can also be achieved by changing the pinhole size for each pixel.

[0263] Figure 47 is a longitudinal cross-sectional view showing one example configuration of the separation region in Figure 42, and Figures 48 to 52 are longitudinal cross-sectional views showing modified examples of the separation region.

[0264] Metasurface design controls the phase / wavefront of light using microstructures smaller than the wavelength of the light being symmetrically positioned. However, microscopic stray light inevitably occurs at discontinuous material interfaces. When incorporating metasurface elements into photodetectors, it is essential to strengthen element isolation to prevent this stray light from causing crosstalk between pixels. This paper describes embodiments of isolation regions necessary to suppress crosstalk caused by metasurface structures.

[0265] Figure 47 shows a structure in which inter-pixel light shielding separation is provided by a light-shielding film 47 directly above the semiconductor layer 31, and charge crosstalk is reduced on the semiconductor layer 31 side by a potential provided by an ion implant. Although crosstalk of stray light that enters the semiconductor layer 31 cannot be suppressed, the processing damage to the semiconductor layer 31 is low, which is advantageous in dark conditions.

[0266] Figure 48 shows a structure in which the semiconductor layer 31 is deeply trenched or penetrated, the pinning of the sidewall is reinforced with a stationary charge film, and an insulating film 33a is embedded. Compared to Figure 47, charge crosstalk is enhanced, and some of the stray light can be returned to the photoelectric conversion unit 21 of the pixel due to the refractive index difference between the semiconductor layer 31 and the insulating film 33a. However, the number of processes increases, and there is a risk that the dark time performance will deteriorate due to interface damage caused by trenching.

[0267] Figure 49 shows a structure in which a semiconductor layer 31 is trenched with a fine width (e.g., 100 nm or less), and a fixed charge film 45 is formed on the side wall, closing the upper end of the trench and creating a void 33b. The refractive index difference is larger than that of the insulating film 33a in Figure 48, making interfacial reflection more likely and improving the self-pixel confinement effect of stray light. However, a challenge is the large variation in the degree of occlusion.

[0268] Figure 50 shows a structure in which the semiconductor layer 31 is shallowly trenched (for example, 100-400 nm), a fixed charge film 45 and an insulating film 46 are provided, and a portion of the light-shielding film 47 is embedded into the semiconductor layer 31. Compared to Figure 47, this makes it possible to block the crosstalk path between the light-shielding film 47 and the semiconductor layer 31, but there are concerns about damage from processing and deterioration of dark performance due to contamination.

[0269] Figure 51 shows a structure in which the semiconductor layer 31 is deeply trenched or penetrated, the pinning of the sidewalls is reinforced with a fixed charge film 45, an insulating film is embedded, and a light-shielding metal is embedded in the gap of the insulating film. Compared to Figure 48, the light-shielding film absorbs stray light and suppresses crosstalk, but the self-pixel return component of stray light is reduced, resulting in a slight decrease in sensitivity, and there are concerns about deterioration of dark performance due to processing damage and contamination.

[0270] Figure 52 shows a structure in which pinning of the sidewalls is reinforced with a fixed charge film 45, an insulating film 46 is embedded in a deep trench with a narrow line width and a shallow trench with a wider line width, and a light-shielding metal is embedded only in the shallow trench. Compared to Figure 47, this structure blocks the crosstalk path between the light-shielding film 47 and the semiconductor layer 31, strengthens the suppression of charge crosstalk within the semiconductor layer 31 at deeper positions, and allows the self-pixel confinement effect of stray light to be exerted even at deeper positions, thereby reducing the sensitivity loss that occurs in Figure 51. However, there are concerns about an increase in the number of processes and deterioration of dark performance due to processing damage and contamination.

[0271] [Embodiment 18] Figure 53 is a schematic longitudinal cross-sectional view showing the general configuration of the pixel array section of a solid-state imaging device according to the 18th embodiment of this technology.

[0272] Figure 54A shows the cross-sectional structure along the line a54-a54 in Figure 53, Figure 54B shows the cross-sectional structure along the line b54-b54 in Figure 53, Figure 54C shows the cross-sectional structure along the line c54-c54 in Figure 53, and Figure 54D shows the cross-sectional structure along the line d54-d54 in Figure 53.

[0273] As shown in Figures 53 and 54A to 54D, the solid-state imaging device according to this 18th embodiment includes a semiconductor layer 31, a photoelectric conversion unit 21 provided on the semiconductor layer 31 for each pixel 3, a fixed charge film 45, an insulating film 46, a light-shielding film 47, an insulating film 48, a multilayer wiring layer 35, and a metasurface structure 90. Furthermore, the solid-state imaging device according to this 18th embodiment includes a diffraction / scattering element 101 with periodic irregularities provided on the interface of the semiconductor layer 31 on the light incident surface side. The multilayer wiring layer 35 may include a reflector 47a, which is part of the wiring 37, in a region that overlaps with the photoelectric conversion unit 21 in a plan view.

[0274] In order to enhance element isolation in order to suppress stray light generated in the metasurface structure 90, other stray light is also suppressed. That is, when combined with substrate surface processing technology that deflects light entering the substrate at an angle to improve sensitivity, it becomes possible to simultaneously suppress stray light generated in the metasurface element and stray light generated on the substrate surface with a single element isolation section 213.

[0275] <Configuration of the light-receiving side of the semiconductor layer> Figure 55 shows a diffraction / scattering element provided at the interface on the light incident surface side of the semiconductor layer ((a) is a longitudinal section view, (b) is a cross section view). Figure 56 shows an optical branching section provided at the interface on the light incident surface side of the semiconductor layer ((a) is a longitudinal section view, (b) is a cross section view) (part 1), Figure 57 shows an optical branching section provided at the interface on the light incident surface side of the semiconductor layer ((a) is a longitudinal section view, (b) is a cross section view) (part 2), and Figure 58 shows an optical branching section provided at the interface on the light incident surface side of the semiconductor layer ((a) is a longitudinal section view, (b) is a cross section view) (part 3).

[0276] Figure 55((a),(b)) shows a diffraction / scattering element 101 in which periodic irregularities are provided at the interface on the light incident side (light receiving side) of the semiconductor layer 31 on which the photoelectric conversion unit 21 is formed. These irregularities act as a diffraction grating, causing higher-order components to diffract obliquely and increasing the optical path length within the photoelectric conversion unit 21, thereby improving the sensitivity of near-infrared light components in particular. Specifically, this diffraction / scattering structure can be a square pyramid formed by, for example, wet etching of the Si(111) surface using AKW (Alkali Water). However, the diffraction / scattering structure may also be formed by dry etching. Furthermore, by creating a shape in which the cross-sectional area changes in the depth direction, reflection is suppressed and sensitivity is slightly improved.

[0277] Figure 56((a),(b)) shows that by branching and angling the light with shallow grooves embedded in an oxide film, the 0th-order light can be reduced and sensitivity can be improved. The light branching section is formed by creating a trench in the top part of the photoelectric conversion section 21 and embedding a fixed charge film 45 and an insulating film 46, such as SiO2, with ALD or the like. When viewed from the incident light side, the light branching section 102 may be provided linearly in a plan view at the position where the light is focused, or it may be provided crossing at a 90° angle. In this case, the angle of crossing is not limited to 90°.

[0278] Furthermore, as shown in Figures 57 and 58, a crossed optical branching section 102 may be provided, as well as another optical branching section relative to the optical branching section 102. Since the etching rate in the crossed section becomes faster due to the microloading effect, a gap can be provided in the crossed section to separate it and improve uniformity in the depth direction. The embedding of the fixed charge film 45 and oxide film in the trench groove of the optical branching section 102 can be performed simultaneously with the embedding of the separation region (element separation section) 32, thereby reducing the number of steps involved.

[0279] [Embodiment 19] <The deflection section and on-chip lens of the prism function> Figure 59 is a schematic longitudinal cross-sectional view of the main components of a light detection device according to the 19th embodiment of this technology, showing the combination of the deflection section of the prism function and the on-chip lens. Metasurface design can provide both prism and lens functions, but this requires a greater phase difference. If the pillar height constraint necessitates folding the phase difference, stray light due to scattering at the folding point becomes a concern. As a workaround, the pillar 93 may be dedicated solely to the prism function of guiding the photoelectric conversion unit 21 perpendicularly, and light focusing may be achieved using an on-chip lens 103. By implementing these measures, the necessary phase difference within a pixel can be reduced, and aliasing within a pixel can be minimized. Furthermore, by providing an on-chip lens 103 on top of the deflection unit 106, the amount of light corresponding to the reflection at the pixel boundary of the pixel 3 can be reduced, thereby mitigating stray light.

[0280] <A polarizing unit that combines prism and lens functions, and an on-chip lens> Figure 60 is a schematic longitudinal cross-sectional view of the main components showing the combination of a deflection unit that combines prism and lens functions and an on-chip lens.

[0281] In the configuration where the aforementioned light-shielding film 47 is used as a pinhole, the pinhole diameter can be reduced by increasing the lens power to further restrict the light. Reducing the pinhole diameter can enhance the light containment effect and flare sensitivity suppression effect. As a means of increasing this lens power, it is conceivable to have the pillar 93 perform both prism and lens functions, and to provide an on-chip lens 103. Furthermore, to reduce stray light caused by light hitting the boundary of the pillar 93's pixels 3 at the edge of the field of view, pupil correction may be added to the on-chip lens 103.

[0282] In both Figures 59 and 60, the on-chip lens 103 can be constructed from organic materials such as styrene resin, acrylic resin, styrene-acrylic resin, and siloxane resin. It can also be constructed by dispersing titanium oxide particles in the aforementioned organic materials or polyimide resins. It may also be constructed from inorganic materials such as silicon nitride or silicon oxynitride. Furthermore, a material film with a different refractive index than the on-chip lens 103 can be placed on the surface of the on-chip lens 103 to prevent reflection. For NIR applications, materials such as amorphous Si, Poly Si, and germanium may also be used. The deflection section 106 may be composed of any of the metasurface structures of the embodiments described above. Figures 59 and 60, and later Figures 61 to 66, 69, 70, 72, 74 and 76, show a metasurface structure 90 as an example, but are not limited to this.

[0283] <The deflection part and inner lens of the prism function> Figure 61 is a schematic longitudinal cross-sectional view of the main components showing the combination of the deflection section 106 (metasurface structure 90) of the prism function and the inner lens 104. Metasurface design can provide both prism and lens functions, but requires a phase difference. If the pillar height constraint necessitates folding the phase difference, stray light due to scattering at the folding point is a concern.

[0284] As a workaround, the pillar 93 may be dedicated solely to the prism function of guiding it perpendicularly to the photoelectric conversion unit 21, and light focusing may be achieved by providing an inner lens 104.

[0285] By implementing these measures, the necessary phase difference within a pixel can be reduced, and aliasing within a pixel can be minimized.

[0286] Figure 62 is a schematic longitudinal cross-sectional view of the main components showing the combination of a deflection section, which combines prism function (metasurface structure 90) and lens function, and an inner lens.

[0287] In the configuration where the aforementioned light-shielding film 47 is used as a pinhole, the pinhole diameter can be reduced by increasing the lens power to further restrict the light. Reducing the pinhole diameter can enhance the light confinement effect and the flare sensitivity suppression effect. As a means of increasing this lens power, it is conceivable to have the pillar 93 perform both prism and lens functions, and then incorporate an inner lens 104.

[0288] In both Figure 61 and Figure 62, the inner lens may be made of an inorganic material such as silicon nitride or silicon oxynitride. Furthermore, a material film 105 with a different refractive index than the inner lens 104 may be placed on the surface of the inner lens 104 to prevent reflection.

[0289] Furthermore, for near-infrared light applications, materials such as amorphous Si, Poly-Si, and germanium may be used for the inner lens 104. Moreover, the inner lens 104 may be provided as a box lens with a rectangular cross-section. Even with a rectangular cross-section, it is possible to bend the wavefront and produce a lens effect by using the refractive index difference between the materials in the box lens.

[0290] [20th Embodiment] <Example of light-blocking wall configuration> Figures 63 to 66 are schematic longitudinal cross-sectional views of the main parts showing the configuration of the light-shielding wall in a light detection device according to the 20th embodiment of this technology.

[0291] When increasing the height of the deflection section 106, for example, by increasing the distance between the metasurface structure 90 and the semiconductor layer 31, such as when aligning the focusing point with a pinhole structure or when configuring the deflection section 106 in multiple stages, the crosstalk path between the deflection section 106 and the semiconductor layer 31 becomes wide, raising concerns about performance degradation. As a countermeasure, a light-shielding wall or cladding section may be provided between the deflection section 106 and the semiconductor layer 31.

[0292] The structure in Figure 63 includes a light-shielding wall 108 formed by trenching the insulating film 107 down to the light-shielding film 47, embedding a light-shielding material, such as tungsten, and then performing CMP (Chemical Modulation). This configuration makes it possible to block the crosstalk path between the semiconductor layer 31 and the deflection portion 106.

[0293] The structure shown in Figure 64 is designed with a distance between the upper end of the light-shielding wall 108 and the deflection section 106 in order to reduce vignetting at the upper end of the light-shielding wall 108. Although crosstalk is slightly worsened, a decrease in sensitivity can be suppressed.

[0294] The structure in Figure 65 includes a cladding portion 109 made of a material with a lower refractive index than the insulating film 107. By providing this, light absorption by the cladding portion 109 is eliminated, and the decrease in sensitivity can be suppressed. However, the ability to block crosstalk is reduced. Alternatively, the cladding portion 109 may be left as a void, and the insulating film 107 may be deposited using a film deposition method with poor coverage to close the upper end of the void.

[0295] The structure in Figure 66 has a cladding section 109, for example, an air gap, that spans the deflection section 106. This configuration enhances the waveguide effect. However, structural fragility is a concern.

[0296] [21st Embodiment] <Configuration of the divided photoelectric conversion unit> Figure 67 is a plan view showing the configuration of the division of the photoelectric conversion unit in a photodetector according to the 21st embodiment of this technology.

[0297] By dividing the photoelectric conversion unit 21 of pixel 3 into multiple parts and creating differences between them, the subject distance can be calculated from the amount of image shift, enabling high-speed focusing and distance measurement (sensing) of the camera lens. During signal processing for image creation, the signal-to-noise ratio can be improved by adding the outputs within pixel 100, or the amount of blur can be reduced by shifting and adding images with different parallax.

[0298] While various modifications are possible for the division of the photoelectric conversion unit 21, in the case of a left-right division shown in Figure 67, distance measurement is possible for subjects with vertical stripe contrast. Furthermore, in the case of a top-bottom and left-right division shown in Figure 68, distance measurement becomes possible for both vertical and horizontal stripes. The division of the photoelectric conversion unit 212 is not limited to these.

[0299] Furthermore, the isolation region 32 within pixel 3 can be derived from the example given for the boundary of pixel 3. Moreover, by increasing the number of processes, it is possible to use different combinations for element isolation within pixel 3 and element isolation between pixels 3. For example, by embedding a light-shielding film 47 in the isolation region 32 between pixels 3 as shown in Figure 51, and embedding a silicon oxide film for element isolation within pixel 3 as shown in Figure 48, it is possible to suppress inter-pixel crosstalk while maintaining sensitivity within pixel 3. Note that the combinations are not limited to these.

[0300] [22nd Embodiment] <Color filter configuration> Pillar-type metasurface structures containing deflection elements generally require a wavelength-dependent optimal design; therefore, it is desirable to target a single wavelength whenever possible. For example, they are suitable for sensing applications where a monochromatic IR-LED is actively projected and the reflected light is detected.

[0301] On the other hand, when imaging subjects based on a broadband continuous wavelength light source, metasurface design becomes difficult as is. However, by incorporating filters within the pixels to limit the wavelength band, it becomes easier to find a design solution for the metasurface element.

[0302] Figure 69 is a schematic longitudinal cross-sectional view of the main part of a photodetector according to the 22nd embodiment of this technology, showing an example configuration in which a color filter 110 made of a general pigment or dye is provided below the deflection element. By providing the color filter 110, it is possible to narrow the wavelength range and improve the controllability of light. In this case, it is desirable that the deflection unit 106 has a lens function in addition to the prism function. In this case, the pillar design needs to be different for each pixel color. The deflection unit 106, for example, the metasurface structure 90, is placed on the color filter 110 via an insulating film 111.

[0303] Figure 70 is a schematic longitudinal cross-sectional view of a key part showing an example of a configuration in which a color filter is provided on the deflection section. The color filter 110, made of pigment or dye, exhibits little change in transmission spectrum with respect to oblique incidence, making this configuration possible. In this configuration, pupil correction may be applied to obliquely incident light at the edge of the field of view by providing an on-chip lens 103 on top of the color filter 110. This makes it possible to reduce sensitivity loss due to inter-pixel light shielding. The color filter 110 is placed on the deflection section 106, for example, the metasurface structure 90, via a planarization film 112.

[0304] Next, Figures 71(a) to (d) show examples of color filter arrangements. Figure 71(a) is a Bayer arrangement consisting of the three primary colors RGB, Figure 71(b) is a GRB-W arrangement with pixels that do not have color filters, Figure 71(c) is a Quad-Bayer arrangement that enables 2x2 pixel addition and individual output, and Figure 71(d) is a ClearVid arrangement that improves resolution by rotating the arrangement by 45 degrees. However, it may also be a complementary color arrangement, or a combination of primary and complementary color arrangements, and is not limited to these.

[0305] <Variations of color filters> <Combination with plasmon filters> Figure 72 is a schematic longitudinal cross-sectional view of the main components showing the combination with a plasmon filter. Figure 73 is a schematic plan view of the plasmon filter from above.

[0306] The plasmon filter 113 is an optical element that utilizes surface plasmon resonance to achieve a light filtering effect, and uses a metallic conductive thin film as its substrate. To efficiently obtain the effect of surface plasmon resonance, it is necessary to keep the electrical resistance of the surface of the conductive thin film as low as possible. As this metallic conductive thin film, aluminum or its alloys are often used because they have low electrical resistance and are easy to process (for example, Japanese Patent Application Publication No. 2018-98641).

[0307] The plasmon filter 113 is known to have a changing transmittance spectrum for oblique incidence. It is desirable to provide the deflection element (metasurface structure) of the present technology above the plasmon filter 113 and design the deflection element so that the principal ray from the camera lens is perpendicularly incident with respect to the peak wavelength of the spectrum for 0-degree incidence. The plasmon filter 113 is covered with an insulating film 114. And the deflection part 106 is arranged on the light incident surface side of the plasmon filter 113 through the insulating film 114. By providing it in this way, the uniformity of the transmittance spectrum within the angle of view can be improved.

[0308] <Combination with GMR filter> FIG. 74 is a schematic longitudinal sectional view of a main part showing a combination with a GMR filter. FIG. 75 is a plan view of the GMR filter as seen from above.

[0309] [[ID=1GMR (Guided Mode Resonance) filter 115 is an optical filter capable of transmitting only light in a narrow wavelength band (narrow band) by combining a diffraction grating (A) and a cladding-core structure (B) (for example, JP 2018-195908). It utilizes the resonance between the guided mode generated in the waveguide and the diffracted light, has high light utilization efficiency, and can obtain a sharp resonance spectrum. [[ID= The GMR filter 115 is known to have a changing transmittance spectrum for oblique incidence. It is preferable to provide the deflection part 106 of the present embodiment above the GMR filter 115 and design the deflection element for each pixel so that the principal ray from the camera lens is perpendicularly incident with respect to the GMR filter 115. By providing it in this way, the uniformity of the transmittance spectrum within the angle of view can be improved.

[0311] <Combination with a laminated filter having different refractive indices> FIG. 76 is a schematic longitudinal sectional view of a main part showing a combination with a laminated filter having different refractive indices. FIG. 77 is an enlarged view of a part of the laminated filter having different refractive indices.

[0312] ​The stacked filter 117 can be configured by alternating stacking layers with different refractive indices, thereby achieving a specific transmission / reflection spectrum through the interference effect of light. Furthermore, it is possible to design a narrowband spectrum by setting up a pseudo-defect layer that disrupts periodicity using a technique called photonic crystallization. However, when light is incident on the stacked filter 117 at an oblique angle, the effective film thickness increases, which causes the spectrum to shift to shorter wavelengths.

[0313] For such a stacked filter 117, it is preferable to provide a deflection section 106 on top of the stacked filter 117 and design a deflection element for each pixel so that the principal ray from the camera lens is incident perpendicularly on the stacked filter 117.

[0314] As described above, according to this embodiment, the pillar 93 is provided with a metasurface structure having a different prism function for each pixel 3 as a deflection part 106 on the light incident surface side of the photoelectric conversion unit 21, thereby improving optical characteristics against crosstalk due to oblique incidence at the edge of the field of view, and non-uniformity of sensitivity and transmission spectrum. Furthermore, the process of changing the shape of the on-chip lens 103 is unnecessary, and optical characteristics against crosstalk due to oblique incidence at the edge of the field of view, and non-uniformity of sensitivity and transmission spectrum can be improved with a simple process of using a metasurface element.

[0315] Furthermore, according to this embodiment, by providing the deflection section 106 in at least two stages via a flat film, even when a sufficient phase difference cannot be achieved with a single layer, the optical characteristics can be improved against crosstalk and sensitivity non-uniformity due to oblique incidence at the edge of the field of view, and color-by-color control of the continuous wavelength spectrum can also be realized.

[0316] Furthermore, according to this embodiment, since the pillar 93 with a high refractive index is prone to reflection, anti-reflective coatings with different refractive indices can be provided on the pillar 93 to achieve anti-reflective properties in terms of sensitivity and flare.

[0317] [Example of pillar configuration] <Derivation of Metaface Design (Prism Function)> Next, we will explain the derivation of the metasurface design for the prism function. (Step 1) Derivation of the pixel-by-pixel phase difference map As shown in Figure 78, when the incident angle of light at a certain pixel 3 is θ, the pixel size is D, the assumed wavelength is λ, and the pillar position within the pixel is x, the phase difference required for normal incidence can be calculated using equation (1).

[0318]

number

[0319] For simplicity, we have shown the case of the prism angle in the x-direction here, but as shown in Figure 79, it is possible to extend this to two dimensions and create a phase difference map corresponding to the prism angle in any direction.

[0320] Furthermore, since the prism design only requires a relative phase difference between the pillars 93, uncertainty in the constants is permissible.

[0321] (Step 2) Derivation of the phase difference library Considering the pillar pitch, height, refractive index, extinction coefficient, shape, and film configuration near the pillars for the structure to be mounted on the photodetector, a phase difference library is created that links the phase difference with the pillar diameter, as shown in Figure 80.

[0322] This phase difference library can be calculated using optical simulations such as FDTD or RCWA, or it can be determined experimentally. Note that light with a phase difference of α is equivalent to α + 2π × N (where N is an integer). That is, even if a phase difference of 2π + φ is required, only a phase difference of φ is needed. This substitution to an equivalent phase is called "2π folding".

[0323] (Step 3) Derivation of pillar layout From the phase difference map, the phase difference of each pillar 93 can be replaced with the pillar diameter using a phase difference library. However, due to process limitations imposed by various factors such as lithography resolution and pattern distortion of high-aspect-ratio pillars, these are defined as design rules, and the generated pillars 93 are controlled to satisfy these design rules.

[0324] Specifically, for the phase difference, the following processes can be considered: adjusting the constant term shown in Figure 81(a) (uniform offset processing), and performing the 2π folding process shown in Figure 81(b), thereby replacing the phase difference of each pillar 93 shown in Figure 81(c) with the pillar diameter. If these processes do not meet the design rules, the following measures will be taken.

[0325] The first solution is to force the image to fold at a point other than 2π. However, this process causes scattering at the folding point, raising concerns about stray light.

[0326] The second approach involves forcibly rounding patterns outside the design rules by approximating them to the nearest phase pillar diameter within the design rules. While this rounding may introduce some error, it is acceptable as long as the impact on pixel characteristics is not problematic.

[0327] [Variations in the pillar configuration] Next, we will explain the derivation of a metasurface design that combines prism and lens functions.

[0328] Figure 82 is a plan view showing the field of view of the photodetector according to this embodiment. Figure 83 is a plan view showing examples of pillar arrangements for different image heights.

[0329] In Figure 82, the deflection section 106 is designed to effectively utilize light at the edges of the photodetector's field of view. This is achieved by combining a lens design that focuses light towards the center of the pixel according to the image height and a deflection design that matches the prism angle required for each image height, resulting in a pillar 93 for each pixel. Specifically, as shown in Figure 82(1), the principal ray of the module lens is incident perpendicularly on the pixel 3 located in the center of the field of view (center of the image height). The deflection section 106-1 corresponding to the pixel 3 is arranged point-symmetrically with respect to the center of the pixel, as shown in Figure 83(1). The phase becomes faster towards the outside, meaning that light passing through the deflection section 106-1 is focused towards the center of the pixel 3. Because the pillars 93 are arranged point-symmetrically, the direction of the principal ray does not change.

[0330] At the image height (2) shown in Figure 82(2), the principal ray is incident at a horizontal angle of 10 degrees, and the pixel 3 corresponding to image height (2) is equipped with a deflection unit 106-2. As shown in Figure 83(2), in addition to the lens design at the center of the image height described above, the deflection unit 106-2 has pillars 93 arranged with a linear phase difference in the horizontal direction so as to correspond to the prism angle at which the light incident at 10 degrees horizontally becomes vertical. By arranging it in this way, it is possible to simultaneously combine a lens function that focuses light at the center of the pixel and a prism function that results in a prism angle of 10 degrees.

[0331] At the image height (3) shown in Figure 82(3), the principal ray is incident at a horizontal tilt of 20 degrees, and the pixel 3 corresponding to image height (3) is equipped with a deflection unit 106-3. As shown in Figure 83(3), in addition to the lens design at the center of the image height described above, the pillar 93 of the deflection unit 106-3 is arranged with a linear phase difference in the horizontal direction so as to correspond to the prism angle at which the light incident at 20 degrees horizontally becomes vertical. The linear tilt of this phase difference is approximately twice that of the tilt at 10 degrees. By arranging it in this way, it is possible to simultaneously combine a lens function that focuses light at the center of the pixel and a prism function that results in a prism angle of 20 degrees.

[0332] At the image height (4) shown in Figure 82(4), the principal ray is incident at a 30-degree horizontal tilt, and the pixel 3 corresponding to image height (4) is equipped with a deflection section 106-4. As shown in Figure 83(4), in addition to the lens design at the center of the image height described above, the pillars 93 are arranged with a linear phase difference in the horizontal direction to correspond to the prism angle at which the 30-degree horizontal incident light becomes vertical. This arrangement allows for the simultaneous combination of a lens function that focuses light at the center of the pixel and a prism function that provides a 30-degree prism angle. Note that Figures 82(1) to (4) are just examples, and different layouts are possible by 2π folding or offset processing of the phase difference. What is important is the relative phase difference between the pillars 93.

[0333] <Derivation of Metasurface Design> (Step 1) Derivation of the pixel-by-pixel phase difference map If we can obtain phase difference maps for lens function and phase difference maps for prism function, we can synthesize a phase difference map that combines both lens and prism functions (Figure 84(c)) by simply adding them together for each pillar. The derivation process for the prism phase difference map shown in Figure 84(a) has been described above and is omitted here. For the lens phase difference map shown in Figure 84(b), if the assumed lens shape and refractive index are known, the phase difference can be calculated from the lens thickness corresponding to each pillar position and the assumed wavelength. Alternatively, it can be calculated using optical simulations such as FDTD or RCWA, or it can be determined experimentally. It is also possible to have only the lens function without designing a prism for each of the three pixels.

[0334] To express this more generally, if we can provide the refractive index and geometric shape of the material used to mount optical elements with specific functions to each pixel, we can translate that shape into a phase difference map. By defining the diameter of each pillar through a transformation using a phase difference library and creating pillar elements (metasurface structures), we can realize those functions. Furthermore, it becomes possible to combine multiple phase difference maps designed in this way to simultaneously realize multiple functions.

[0335] As shown in Figure 85, given a function of the lens thickness T(x,y) due to the geometric shape with respect to the pillar position (x,y), the phase difference map of the lens can be calculated using equation (2), where n1 is the refractive index of the lens and n2 is the refractive index of the upper part of the lens (e.g., air).

[0336]

number

[0337] [23rd Embodiment] <Examples of applications in electronic devices> This technology (the technology disclosed herein) can be applied to various electronic devices such as imaging devices like digital still cameras and digital video cameras, mobile phones equipped with imaging functions, or other devices equipped with imaging functions.

[0338] Figure 86 is a diagram showing the schematic configuration of an electronic device (e.g., a camera) according to the 23rd embodiment of this technology.

[0339] As shown in Figure 86, the electronic device 200 comprises a solid-state imaging device 201, an optical lens 202, a shutter device 203, a drive circuit 204, and a signal processing circuit 205. This electronic device 200 shows an embodiment in which the solid-state imaging device and distance measuring sensor according to the actual embodiment of this technology are used in an electronic device (e.g., a camera) as the solid-state imaging device 201.

[0340] The optical lens 202 forms an image of the subject's image light (incident light 206) onto the imaging surface of the solid-state imager 201. This causes signal charge to accumulate within the solid-state imager 201 over a certain period of time. The shutter device 203 controls the light illumination and light shielding periods for the solid-state imager 201. The drive circuit 204 supplies drive signals to control the transfer operation of the solid-state imager 201 and the shutter operation of the shutter device 203. The drive signals (timing signals) supplied from the drive circuit 204 enable signal transfer of the solid-state imager 201. The signal processing circuit 205 performs various signal processing on the signals (pixel signals) output from the solid-state imager 201. The processed video signal is stored in a storage medium such as memory, or output to a monitor.

[0341] The solid-state imaging device 201 has a metasurface structure, which controls the direction of the principal light rays incident at an angle from the optical lens 202 for each pixel, so that, for example, the light rays can be incident perpendicularly on the photoelectric conversion unit at any image height. With this configuration, the electronic device 200 of the 19th embodiment can improve sensitivity non-uniformity within the field of view, shading, and deterioration of crosstalk.

[0342] It should be noted that the electronic device 200 to which the solid-state imaging device of the above embodiment can be applied is not limited to cameras, but can also be applied to other electronic devices. For example, it may be applied to imaging devices such as camera modules for mobile devices such as mobile phones and tablet terminals.

[0343] [24th Embodiment] [Examples of applications in electronic devices] This embodiment is an example in which the pixel structure according to the present disclosure is applied to the light-receiving section of a distance measuring device that measures distance using light reflection. Figure 87 is a block diagram showing an example configuration of an electronic device using a distance measuring device applicable to this embodiment. The electronic device 300 includes a distance measuring device 301 and an application unit 320.

[0344] The application unit 320 is implemented, for example, by a program running on the CPU, and requests the distance measuring device 301 to perform distance measurement and receives distance information and other results from the distance measuring device 301.

[0345] The distance measuring device 301 includes a light source unit 310, a light receiving unit 311, and a distance measuring processing unit 312. The light source unit 310 includes, for example, a light-emitting element that emits light of wavelengths in the infrared region, and a drive circuit that drives the light-emitting element to emit light. As the light-emitting element included in the light source unit 310, for example, an LED (Light Emitting Diode) can be applied. However, as the light-emitting element included in the light source unit 310, a VCSEL (Vertical Cavity Surface Emitting Laser) in which multiple light-emitting elements are formed in an array can also be applied.

[0346] The light-receiving unit 311 includes, for example, a light-receiving element capable of detecting light of wavelengths in the infrared region, and a signal processing circuit that outputs a pixel signal corresponding to the light detected by the light-receiving element. The pixel 3 described in the first embodiment can be used as the light-receiving element included in the light-receiving unit 311.

[0347] The distance measurement processing unit 312 performs distance measurement processing in the distance measurement device 301 in response to distance measurement instructions from, for example, the application unit 320. For example, the distance measurement processing unit 312 generates a light source control signal to drive the light source unit 310 and supplies it to the light source unit 310.

[0348] Furthermore, the distance measurement processing unit 312 controls light reception by the light receiving unit 311 in synchronization with the light source control signal supplied to the light source unit 310. For example, the distance measurement processing unit 312 generates an exposure control signal that controls the exposure period in the light receiving unit 311 in synchronization with the light source control signal and supplies it to the light receiving unit 311. The light receiving unit 311 outputs a valid pixel signal within the exposure period indicated by this exposure control signal.

[0349] The distance measurement processing unit 312 calculates distance information based on the pixel signal output from the light receiving unit 311 in response to light reception and the light source control signal for driving the light source unit 310. The distance measurement processing unit 312 can also generate predetermined image information based on this pixel signal. The distance measurement processing unit 312 passes the distance information and image information calculated and generated based on the pixel signal to the application unit 320.

[0350] In this configuration, the distance measurement processing unit 312 generates a light source control signal to drive the light source unit 310 and supplies it to the light source unit 310, for example, in response to an instruction from the application unit 320 to perform distance measurement. At the same time, the distance measurement processing unit 312 controls the light reception by the light receiving unit 311 based on an exposure control signal synchronized with the light source control signal.

[0351] In the distance measuring device 301, the light source unit 310 emits light in response to a light source control signal generated by the distance measuring processing unit 312. The light emitted by the light source unit 310 is emitted from the light source unit 310 as emitted light 330. This emitted light 330 is reflected, for example, by the object to be measured 331 and received by the light receiving unit 311 as reflected light 332.

[0352] The light-receiving unit 311 supplies a pixel signal corresponding to the reception of reflected light 332 to the distance-measuring processing unit 312. The distance-measuring processing unit 312 measures the distance D to the object to be measured 331 based on the timing of the light emission from the light source unit 310 and the timing of the light reception by the light-receiving unit 311. Here, two methods are known as distance-measuring methods using reflected light: the direct ToF (Time of Flight) method and the indirect ToF method.

[0353] The direct ToF method measures the distance D based on the difference (time difference) between the timing of light emission by the light source unit 310 and the timing of light reception by the light receiving unit 311. The indirect ToF method measures the distance D based on the phase difference between the phase of light emitted by the light source unit 310 and the phase of light received by the light receiving unit 311. In direct ToF (Time-of-Flight) systems, an avalanche element is often used for electron amplification. However, when light is obliquely incident on the photoelectric conversion unit 212 at the edge of the field of view, inter-pixel variations occur in the time it takes for the photoelectrically converted electrons to reach the avalanche element, leading to distance measurement errors. On the other hand, by applying this embodiment, it becomes possible to cause the photoelectric conversion element to be incident perpendicularly at any image height, thereby reducing inter-pixel variations in the time it takes for the electrons to reach the avalanche element. In indirect ToF, two charge storage units called FDs (Floating Diffusion) are provided and read alternately to calculate the phase. However, when light is obliquely incident on the photoelectric conversion unit 212 at the edge of the field of view, crosstalk called PLS differs between the two FDs, causing an output difference, resulting in a phase shift in the calculation and a distance measurement error. On the other hand, by applying this embodiment, it becomes possible to cause perpendicular incidence to the photoelectric conversion element at any image height, eliminating the crosstalk difference between the two FDs and achieving distance measurement accuracy with less error. This embodiment is applicable to both direct ToF and indirect ToF light receiving units 311.

[0354] Furthermore, this technology may also be configured as follows. (1) It comprises a pixel array section in which multiple pixels are arranged in a two-dimensional manner, Each of the aforementioned plurality of pixels is A photoelectric conversion unit provided in the semiconductor layer, The semiconductor layer comprises a metasurface structure provided on the light incident surface side and which guides incident light to the photoelectric conversion section, The aforementioned metasurface structure is A plurality of pillars arranged at a distance shorter than the wavelength of the incident light, The underlying layer in contact with the semiconductor layer side of the pillar, A transparent support structure that connects and supports at least a portion of the spaces between the multiple pillars at a different height from the aforementioned base layer, A light detection device including a light detector. (2) The transparent support is a transparent material that fills the spaces between the plurality of pillars. The light detection device according to (1) above, wherein the refractive index of the transparent material and the pillar are different. (3) The light detection device according to (1) above, wherein the transparent support is a reinforcing beam provided at a different height from the end of the pillar. (4) The transparent support is a transparent protective film that supports the plurality of pillars as a plane at the end opposite to the semiconductor layer side, The photodetector according to (1) above, wherein the metasurface structure further includes a gap provided between adjacent pillars. (5) The light detection device according to any one of (1) to (4) above, wherein at least a portion of the pixels includes pillars of different thickness, array pitch, or shape within the pixels. (6) The aforementioned metasurface structure is stacked in multiple layers, and is a light detection device according to any one of (1) to (5) above. (7) The light detection device according to any one of (1) to (6) above, wherein the underlying layer in contact with the semiconductor layer side of the plurality of pillars has a recess in the portion between the pillars that are adjacent to each other in a plan view. (8) The photodetector according to any one of (1) to (7) above, wherein the metasurface structure further includes an anti-reflective film provided on at least one of the semiconductor layer side and the side opposite to the semiconductor layer side of the pillar, and having a refractive index different from that of the pillar. (9) The photodetector according to (8) above, wherein the anti-reflective film provided on the semiconductor layer side of the pillar is made of a material with a high etching selectivity ratio with respect to the pillar. (10) The light detection device according to any one of (1) to (9) above, further comprising a light-shielding film located between the light incident surface side of the semiconductor layer and the metasurface structure, and having an opening in at least a portion of the pixel. (11) The light detection device according to any one of (1) to (10) above, wherein a curved lens portion is provided on at least one of the light incident surface side and the side opposite to the light incident surface side of the metasurface structure. (12) The light detection device according to any one of (1) to (11) above, wherein at least a portion of the pixels has an uneven shape on the light incident surface side of the semiconductor layer. (13) The photodetector according to any one of (1) to (12) above, wherein the pillar includes any of the following materials: amorphous silicon, polycrystalline silicon, germanium, titanium oxide, niobium oxide, tantalum oxide, aluminum oxide, hafnium oxide, silicon nitride, silicon oxide, silicon carbide, silicon oxide, silicon nitride, and zirconium oxide, or a laminated structure in which at least two or more of the following materials are laminated: amorphous silicon, polycrystalline silicon, germanium, titanium oxide, niobium oxide, tantalum oxide, aluminum oxide, hafnium oxide, silicon nitride, silicon oxide, silicon oxide, silicon carbide, silicon oxide, silicon nitride, and zirconium oxide. (14) The underlying layer in contact with the semiconductor layer side of the pillar includes a main portion that extends two-dimensionally directly below and around the pillar, and a projection that protrudes from the main portion directly below the pillar and is narrower than the width of the bottom of the pillar. The light detection device according to (2) above, wherein the pillar and the projection of the anti-reflective coating are surrounded by the transparent material. (15) The light detection device according to (2) above, wherein the transparent material is partitioned by grooves for each pixel. (16) The light detection device according to (2) above, wherein the transparent material is composed of any of the following: a siloxane resin, a styrene resin, an acrylic resin, or a styrene-acrylic copolymer resin, or a material containing fluorine in any of the siloxane resin, the styrene resin, the acrylic resin, or the styrene-acrylic copolymer resin, or a material in which beads with a refractive index lower than those of the siloxane resin, the styrene resin, the acrylic resin, or the styrene-acrylic copolymer resin are embedded. (17) The photodetector according to (2) or (3) above, wherein the transparent material or the reinforcing beam is composed of at least one of the following materials: silicon oxide, niobium oxide, tantalum oxide, aluminum oxide, hafnium oxide, silicon nitride, silicon oxide nitride, silicon carbide, silicon oxide carbide, silicon nitride carbide, or zirconium oxide, or a laminated structure in which at least two or more of the following materials are laminated: silicon oxide, niobium oxide, tantalum oxide, aluminum oxide, hafnium oxide, silicon nitride, silicon oxide nitride, silicon carbide, silicon oxide carbide, silicon nitride carbide, or zirconium oxide. (18) The photodetector according to (11) above, wherein the metasurface structure further includes a transparent protective film made of an inorganic material, which is provided on the side of the transparent material opposite to the semiconductor layer. (19) The photodetector according to (3) above, wherein the metasurface structure further includes a transparent material made of a different material from the reinforcing beam, which is filled between adjacent pillars. (20) The light detection device according to (3) above, wherein the reinforcing beams are provided in multiple stages spaced apart from each other in the height direction of the pillar. (twenty one) The light detection device according to (4) above, wherein the transparent protective film is made of a material with a different refractive index than the pillar and has an anti-reflective function. (twenty two) The light detection device according to (2) above, wherein the refractive index difference between the pillar and the transparent material is 0.3 or more. (twenty three) The system further comprises a transparent material filled between the multiple pillars, The difference in refractive index between the reinforcing material and the transparent material is 0.2 or less. The light detection device described in (3) above. (twenty four) On the light-incident side of the underlying layer, multiple pillars are formed, arranged at distances shorter than the wavelength of the incident light. A transparent material is filled between the adjacent pillars. A method for manufacturing a light detection device, including the following. (twenty five) A transparent support is formed on the light incident side of the underlying layer. A plurality of pillars are provided on the light incident surface side of the aforementioned base layer, and adjacent pillars are supported by the transparent support, A method for manufacturing a light detection device, including the following. (26) Multiple pillars are formed on the light incident surface side of the underlying layer. A reinforcing beam is formed in a plan view at a height different from the end of the aforementioned pillar. A method for manufacturing a light detection device, including the following. (27) On the light-incident side of the underlying layer, multiple pillars are formed, arranged at distances shorter than the wavelength of the incident light. A transparent protective film is formed to support the side of each pillar opposite to the semiconductor layer, such that a gap exists between adjacent pillars. A method for manufacturing a light detection device, including the following. (28) The system comprises a light detection device, an optical lens that forms an image of light from a subject onto the imaging surface of the light detection device, and a signal processing circuit that performs signal processing on the signal output from the light detection device. It comprises a pixel array section in which multiple pixels are arranged in a two-dimensional manner, Each of the aforementioned plurality of pixels is A photoelectric conversion unit provided in the semiconductor layer, The semiconductor layer comprises a metasurface structure disposed on the light incident surface side and guiding the incident light to the photoelectric conversion section, The aforementioned metasurface structure is A plurality of pillars arranged adjacent to each other at a distance shorter than the wavelength of the incident light, a base layer contacting from the semiconductor layer side of the pillar, a transparent support body that connects and supports at least a part between the plurality of pillars at a height position different from that of the base layer, and an electronic device including the same.

[0355] The scope of the present technology is not limited to the illustrated and described exemplary embodiments, and includes all embodiments that bring equivalent effects to those intended by the present technology. Further, the scope of the present technology is not limited to the combination of the features of the invention defined by the claims, and may be defined by any desired combination of the specific features among all the disclosed features.

Explanation of Reference Numerals

[0356] 1A, 1B, 1C Solid-state imaging device 2 Semiconductor chip 2A Pixel array section [[ID=​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​​ 46, 48, 107 insulating film 47 Light-shielding film 50, 70, 70A, 70B, 70C, 70D, 70E, 90, 90A Metasurface Structure 51,53 Anti-reflection coating 51a Main section 51b Protrusion 52 Pillar-forming film 54 Pillar 55,56 Transparent material 57,97 Transparent protective film 58 Groove 60 semiconductor wafers 61 Scribeline 62 Chip formation area 71 Anti-reflective coating 72, 74, 95 Sacrificial membrane 73 Support formation membrane 75 Amorphous carbon film 77 Reinforcement beams 90,90A Metasurface Structure 91 Anti-reflective coating 92 Pillar-forming film 93 Pillar 94 Anti-reflective coating 95 Sacrificial membrane 97 Transparent protective film 99 Cavity 101 Diffraction and Scattering Elements 102 Optical branching section 103 On-chip lens 104 Inner Lens 106 Deflection section 107 Insulating Film 108 Light-blocking wall 109 Clad section 110 Color Filters 112 Planarization film 113 Plasmon Filter 114 Insulating Film 115 GMR filter 117 Stacked Filters 200 Electronic equipment 201 Solid-state imaging device 202 Optical Lenses 203 Shutter device 204 Drive Circuit 205 Signal Processing Circuit 300 Electronic equipment 301 Distance measuring device 310 Light source section 311 Light receiving part 312 Distance Measurement Processing Unit 320 Application Department 330 Emitted light 331 Object to be measured 332 Reflected light RST Reset signal line SEL Selection Signal Line TR transfer signal line Vdd power line

Claims

1. It comprises a pixel array section in which multiple pixels are arranged in a two-dimensional manner, Each of the aforementioned plurality of pixels is A photoelectric conversion unit provided in the semiconductor layer, A metasurf is provided on the light incident surface side of the semiconductor layer and guides the incident light to the photoelectric conversion section. Equipped with a casing structure, The aforementioned metasurface structure is A plurality of pillars arranged at a distance shorter than the wavelength of the incident light, The underlying layer in contact with the semiconductor layer side of the pillar, A transparent support structure that connects and supports at least a portion of the spaces between the multiple pillars at a different height from the aforementioned base layer, Includes, The transparent support is a reinforcing beam provided at a different height from the end of the pillar, in a light detection device.

2. The photodetector according to claim 1, wherein the metasurface structure further includes a gap provided between adjacent pillars.

3. The photodetector according to claim 1, wherein at least a portion of the pixels includes pillars of different thickness, array pitch, or shape within the pixels.

4. The photodetector according to claim 1, wherein the metasurface structure is stacked in multiple layers.

5. The photodetector according to claim 1, wherein the underlying layer in contact with the semiconductor layer side of the plurality of pillars has a recess in the portion between the pillars that are adjacent to each other in a plan view.

6. The aforementioned metasurface structure is The pillar further includes an anti-reflective film provided on at least one of the sides of the pillar opposite to the semiconductor layer and having a refractive index different from that of the pillar. The light detection device according to claim 1.

7. The anti-reflective film provided on the semiconductor layer side of the pillar is The pillar is made of a material with a high etching selectivity ratio. The light detection device according to claim 6.

8. Located between the light incident surface side of the semiconductor layer and the metasurface structure, The light-shielding film further comprises an aperture having at least a portion within the pixel. The light detection device according to claim 1.

9. A curved lens portion is provided on at least one of the light incident surface side and the side opposite to the light incident surface side of the metasurface structure. The light detection device according to claim 1.

10. At least a portion of the aforementioned pixels have an uneven shape on the light incident surface side of the semiconductor layer. The light detection device according to claim 1.

11. The pillar includes any of the following materials: amorphous silicon, polycrystalline silicon, germanium, titanium oxide, niobium oxide, tantalum oxide, aluminum oxide, hafnium oxide, silicon nitride, silicon oxide, silicon carbide, silicon oxide, silicon nitride, and zirconium oxide, or a laminated structure in which at least two or more of the following materials are stacked: amorphous silicon, polycrystalline silicon, germanium, titanium oxide, niobium oxide, tantalum oxide, aluminum oxide, hafnium oxide, silicon nitride, silicon oxide, silicon oxide, silicon carbide, silicon oxide, silicon nitride, and zirconium oxide. The light detection device according to claim 1.

12. The reinforcing beam is composed of at least one of the following materials: silicon oxide, niobium oxide, tantalum oxide, aluminum oxide, hafnium oxide, silicon nitride, silicon oxide nitride, silicon carbide, silicon oxide carbide, silicon nitride carbide, zirconium oxide, or a laminated structure in which at least two or more of the following materials are laminated: silicon oxide, niobium oxide, tantalum oxide, aluminum oxide, hafnium oxide, silicon nitride, silicon oxide nitride, silicon carbide, silicon oxide carbide, silicon nitride carbide, zirconium oxide. The light detection device according to claim 1.

13. The metasurface structure further includes a transparent material, made of a different material from the reinforcing beam, which is filled between adjacent pillars. The light detection device according to claim 1.

14. The reinforcing beams are arranged in multiple stages spaced apart from each other in the height direction of the pillar. The light detection device according to claim 1.

15. The system further comprises a transparent material filled between the plurality of pillars, The refractive index difference between the reinforcing beam and the transparent material is 0.2 or less. The light detection device according to claim 1.

16. Multiple pillars are formed on the light-incident surface side of the underlying layer, arranged at distances shorter than the wavelength of the incident light. A reinforcing beam is formed in a plan view at a height different from the end of the pillar. A method for manufacturing a light detection device, including the following.

17. The system comprises a light detection device, an optical lens that forms an image of light from a subject onto the imaging surface of the light detection device, and a signal processing circuit that performs signal processing on the signal output from the light detection device. The aforementioned light detection device includes a pixel array section in which a plurality of pixels are arranged in a two-dimensional manner. Each of the aforementioned plurality of pixels is A photoelectric conversion unit provided in the semiconductor layer, The semiconductor layer comprises a metasurface structure disposed on the light incident surface side and guiding the incident light to the photoelectric conversion section, The aforementioned metasurface structure is A plurality of pillars arranged at a distance shorter than the wavelength of the incident light, The underlying layer in contact with the semiconductor layer side of the pillar, A transparent support structure that connects and supports at least a portion of the spaces between the multiple pillars at a different height from the aforementioned base layer, Includes, The transparent support is a reinforcing beam provided at a different height from the end of the pillar, in an electronic device.

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