Solder joint member, semiconductor device, solder joint method, and method for manufacturing a semiconductor device.
Patent Information
- Application Number
- JP2024528112
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2022-06-20
- Publication Date
- 2026-06-26
- Estimated Expiration
- 2042-06-20
AI Technical Summary
Existing lead-free solder alloys used in semiconductor devices face issues with residual stress and shrinkage cavities due to differences in thermal expansion and melting point phases, leading to potential cracking and electrical reliability problems.
A solder joint member with a multiphase structure comprising Sn, Ag, Cu, Bi, and Sb, with specific melting point ranges, is used to distribute stress and prevent cracking by incorporating phases with varying melting points to accommodate thermal contraction.
The multiphase solder joint member effectively reduces stress and prevents cracking, ensuring high reliability and electrical stability in semiconductor devices.
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Abstract
Description
Technical Field
[0001] The present disclosure relates to a solder joint member, a semiconductor device, a soldering method, and a method for manufacturing a semiconductor device.
Background Art
[0002] In recent years, the reliability requirements for semiconductor devices including semiconductor elements and circuit boards have been increasing. In semiconductor devices, particularly for the joint (joint body) between the semiconductor element and the circuit board, since the difference in the coefficient of thermal expansion between the two is large and defects are likely to occur, improvement in reliability is required.
[0003] On the other hand, in order to reduce the environmental load, the adoption of lead-free solder that does not contain lead (Pb), which is a substance subject to environmental regulations, as the solder used for joining such joints has been promoted. As a typical conventional lead-free solder, solder having a composition of Sn-3Ag-0.5Cu (wt%) (Sn-3Ag-0.5Cu solder) is known.
[0004] The melting point of Sn-3Ag-0.5Cu solder is 220°C. In order to melt the lead-free solder to increase its fluidity (wet and spread on the joint surface), it is necessary to raise the heating temperature to about 250°C, which is 30°C higher than the melting point. During subsequent cooling, due to thermal contraction, the joint member may warp or accumulate high residual stress. Therefore, in the joint reliability evaluation (heat cycle test, power cycle test) after cooling, the stress is released and cracks are likely to occur in the solder joint at an early stage.
[0005] In order to reduce such residual stress after soldering, Bi, In, etc. having the effect of lowering the melting point are added to the above Sn-3Ag-0.5Cu solder.
[0006] For example, Patent Document 1 (Japanese Patent Publication No. 2002-120085) discloses a lead-free solder alloy having a melting temperature lower than 215°C and consisting substantially of 76-96% tin, 0.2-2.5% copper, 2.5-4.5% silver, and more than 0% up to 12% indium. It is stated that this provides a lead-free solder with a suitable melting temperature range (175-210°C) useful for mainstream electronics manufacturing, resulting in high strength and high fatigue resistance.
[0007] Furthermore, Patent Document 2 (Japanese Unexamined Patent Publication No. 2018-149558) discloses a lead-free solder alloy comprising 1% to 4% by mass of Ag, 0.1% to 1% by mass of Cu, 1.5% to 5% by mass of Sb, and 1% to 6% by mass of In, with the remainder being Sn. In addition, a lead-free solder alloy is disclosed that further contains 1% to 5.5% by mass of Bi in addition to the above composition.
[0008] Furthermore, Patent Document 2 discloses specific reflow conditions (temperature profile), which include preheating from 170°C to 190°C for 110 seconds, a peak temperature of 245°C, a time of 65 seconds above 200°C, a time of 45 seconds above 220°C, and a cooling rate of 3 to 8°C / second from the peak temperature to 200°C. [Prior art documents] [Patent Documents]
[0009] [Patent Document 1] Japanese Patent Publication No. 2002-120085 [Patent Document 2] Japanese Patent Publication No. 2018-149558 [Overview of the Initiative] [Problems that the invention aims to solve]
[0010] Patent documents 1 and 2 do not focus on the structure (composition) of the joint after soldering, which presents practical problems in terms of actual use.
[0011] Specifically, at the bonding surface, Sn, the main component of solder, forms an intermetallic compound. Near the interface between this intermetallic compound and its surroundings, other additive elements are locally concentrated relative to the main component Sn, forming a phase with a different melting point than the solder itself before use. For example, if the other additive element is Bi, a Sn-Bi eutectic phase (melting point 140°C) is formed. Therefore, during solidification shrinkage after soldering, the main phase solidifies first, followed by the phase with a lower melting point (e.g., the Sn-Bi phase). This timing difference in solidification can cause shrinkage cavities (crevice-like gaps that form during the solidification process) and stress due to thermal shrinkage, potentially damaging the semiconductor element being bonded.
[0012] Furthermore, if the joined components (semiconductor elements or substrates) warp or develop irregularities after soldering, the electrical characteristics of the semiconductor elements will change at each solder joint, posing electrical design problems. In addition, if irregularities develop on the semiconductor elements, stress from the wire bonding process (electrical wiring) may be applied to the semiconductor elements, potentially causing them to crack or resulting in faulty wire bonding.
[0013] Furthermore, in Patent Documents 1 and 2, the addition of In has the effect of lowering the melting point of solder. However, since In is a metal that oxidizes easily, if the solder contains a large amount of In, voids may be created during the initial bonding due to the oxidation of In. For this reason, in practice, the amount of In added needs to be less than the amount described in the above-mentioned documents.
[0014] The purpose of this disclosure is to provide a solder that can suppress the occurrence of defects caused by joints formed using solder. [Means for solving the problem]
[0015] The solder joint member of this embodiment is A solder joining member for joining a first object and a second object, containing Sn as a main component, 3% by mass or more and less than 4% by mass of Ag, 0.5% by mass or more and less than 1.0% by mass of Cu, 2.5% by mass or more and less than 4% by mass of Bi, and 0.5% by mass or more and less than 3% by mass of Sb, including Sn, Ag and Cu, having a main phase with a melting point of 210°C or more and less than 220°C, covering at least a part of the main phase, 170 °C or more 180 °C and less than -Sb a Sn-Bi alloy phase having a melting point of covering at least a part of the Sn-Bi -Sb alloy phase, 135 °C or more 145 °C and less than i-go a Sn-B phase having a melting point of, and having.
Advantages of the Invention
[0016] According to the present disclosure, the occurrence of defects caused by a joint formed using solder can be suppressed.
[0017] The solder joining member of the present disclosure has two phases with a lower melting point than the internal main phase in the vicinity of the joining interface with the object (the object to be joined), so the stress generated during thermal contraction (solidification shrinkage) is relaxed, and the occurrence of defects caused by stress is suppressed. For this reason, a highly reliable joint (and a semiconductor device having the same) is provided.
[0018] In addition, by having the above two phases, the stress generated after joining is also relaxed, so a joint (and a semiconductor device having the same) that can maintain high reliability even after joining is provided.
Brief Description of the Drawings
[0019] [Figure 1] It is a flowchart showing the manufacturing procedure of a semiconductor device (a semiconductor element joined body). [Figure 2] It is a schematic cross-sectional view showing the first step of FIG. 1. [Figure 3]It is a schematic cross-sectional view showing the second step of FIG. 1. [Figure 4] It is a schematic cross-sectional view showing the third step of FIG. 1. [Figure 5] It is a schematic cross-sectional view showing the fourth step of FIG. 1. [Figure 6] It is a schematic cross-sectional view showing the fifth step of FIG. 1. [Figure 7] It is a schematic cross-sectional view of the joint interface part after the fifth step of FIG. 1. [Figure 8] It is the DSC measurement result of the solder joint member of Example 1. [Figure 9] It is the DSC measurement result of the solder joint member of Comparative Example 1. [Figure 10] It is the cross-sectional observation result of the solder joint member of Example 1. [Figure 11] [[ID=2,4]]It is the cross-sectional observation result of the solder joint member of Comparative Example 1. [Figure 12] It is a schematic cross-sectional view of the solder joint member of Embodiment 1.
Mode for Carrying Out the Invention
[0020] Hereinafter, embodiments of the present disclosure will be described. In the drawings, dimensional relationships such as length, width, thickness, depth, etc. are appropriately changed for clarity and simplification of the drawings, and do not represent actual dimensional relationships.
[0021] Embodiment 1. <Solder joint member> The solder joint member 4 of the present embodiment is a member that joins the first object 2 (for example, a substrate) and the second object 3 (for example, a semiconductor element) (see FIG. 6). Note that the solder joint member 4 is a member made of solder (solder alloy) that has melted and then solidified by a heating process, unlike the solder sheet 1 described later, and is a member that exists in a state of being joined to both of the joined members (the first object and the second object).
[0022] The solder joint member 4 of this embodiment contains Sn as the main component, Ag in 3% to less than 4% by mass, Cu in 0.5% to less than 1.0% by mass, Bi in 2.5% to less than 4% by mass, and Sb in 0.5% to less than 3% by mass.
[0023] Furthermore, the solder joint member 4 of this embodiment is The main phase 12 (high melting point phase) contains Sn, Ag, and Cu and has a melting point of 210°C or higher and less than 220°C, Covering at least a portion of the main phase 12, 170 Above ℃ 180 Sn-Bi with a melting point below ℃ -Sb alloy phase 11 ( Medium (Melting point phase) and, Sn-Bi -Sb alloy phase 11 Covering at least a portion of, 135 Above ℃ 145 Sn-B, which has a melting point below ℃ i-go gold phase 10 ( low (Melting point phase) and, It has (see Figures 7 and 12).
[0024] Thus, the solder joint member 4 of this embodiment has a multiphase structure and has multiple phases with separate melting points.
[0025] Furthermore, in the solder joint member 4, Sn-B i-go gold phase 10 ( low (Melting point phase), Sn-Bi -Sb alloy phase 11 ( Medium The melting point phase and the main phase 12 (high melting point phase) basically exist in this order from the side of the member to be joined (first object 2 or second object 3).
[0026] The solder joint member 4 of this embodiment contains Sn as its main component. Here, "main component" refers to the component that is present in the largest quantity among the components contained in the solder joint member 4. The Sn content in the solder joint member 4 is preferably 60% by mass or more, more preferably 70% by mass or more, and even more preferably 80% by mass or more.
[0027] In the solder joint member 4 of this embodiment, the Ag content is 3% by mass or more and less than 4% by mass, and the Cu content is 0.5% by mass or more and less than 1.0% by mass. It has been confirmed that the effects of this disclosure can be obtained when the Ag and Cu content are within this range.
[0028] The addition of Ag and Cu has the effect of lowering the melting point, as the melting point of the Sn-Ag-Cu eutectic is 220°C, compared to 232°C for elemental Sn. Furthermore, the addition of Ag enhances the strength of the Ag-Sn compound through fine dispersion strengthening. The addition of Cu prevents Sn from forming coarse interfacial compounds at the bonding interface. In the absence of Cu, compound reactions proceed at the bonding interface, leading to the disappearance of Sn and increased Bi concentration; therefore, it is preferable to keep the amount of Cu added within the above range.
[0029] Furthermore, the solder joint member 4 may contain elements other than those mentioned above. For example, it may contain, as another additive element, In in an amount of 0.1% by mass or more and less than 1% by mass, which has a melting point lowering effect. Even in this case, the bonding properties will not be significantly affected, and the same effects as described above can be obtained.
[0030] Embodiment 2. <Semiconductor device> The semiconductor device according to this embodiment comprises a substrate 2 and a semiconductor element 3. The substrate 2 and the semiconductor element 3 are joined together via a soldering member 4 as described in Embodiment 1. This provides a highly reliable semiconductor device.
[0031] Embodiment 3. <Soldering Method> The soldering method of this embodiment is a soldering method for joining a first object 2 (e.g., a substrate) and a second object 3 (e.g., a semiconductor element) (see Figures 1 to 6).
[0032] The soldering method of this embodiment includes a heating step of heating a solder sheet 1, which contains Sn, 3% to less than 4% by mass of Ag, 0.5% to less than 1.0% by mass of Cu, 2.5% to less than 4% by mass of Bi, and 0.5% to less than 3% by mass of Sb as its main components, while sandwiched between a first object 2 and a second object 3.
[0033] Through the heating process, the solder sheet 1 becomes a solder joint member 4, and the first object 2 and the second object 3 are joined together. The processes other than the heating process will be described later in the examples.
[0034] In the heating process, the heating temperature (maximum temperature reached) is preferably 220°C or higher and less than 230°C, and the heating time (the time during which the temperature is maintained at 220°C or higher and less than 230°C) is preferably 10 minutes or higher and less than 20 minutes. In this case, the solder joint member of this embodiment can be formed more reliably, and the effects of the solder joint member described above can be obtained.
[0035] Furthermore, in this disclosure, the oxygen concentration within the solder sheet 1 is also important. Bi is easily oxidized, and if Bi is not added and stored in a vacuum desiccator or the like, the solder wettability will be poor and a good joint cannot be obtained. The oxygen concentration in the solder sheet 1 is preferably more than 0 ppm and less than 500 ppm, in which case the same effects as described above can be obtained more reliably.
[0036] Embodiment 4. <Manufacturing method for semiconductor devices> The semiconductor device manufacturing method of this embodiment is a method for manufacturing a semiconductor device comprising a substrate and a semiconductor element. The semiconductor device manufacturing method of this embodiment includes a step of joining the substrate (substrate wiring such as a copper plate) and the semiconductor element using the soldering method of Embodiment 3. This provides a highly reliable semiconductor device. [Examples]
[0037] The present disclosure will be further described below with reference to examples, but the present disclosure is not limited to these examples.
[0038] (Example 1) Hereinafter, with reference to the flowchart shown in Figure 1, an example of the procedure for manufacturing a semiconductor device in this embodiment, specifically for creating a semiconductor device junction (a junction of a semiconductor device and a substrate), will be described.
[0039] First, as the first step (S1), the solder sheet 1 is cut to a predetermined size (see Figure 2).
[0040] Specifically, first, a bulk material was prepared by adding and dissolving each element to achieve a composition shown as a representative example of solder composition: Sn-3.5Ag-0.7Cu-3.3Bi-2.0Sb (the values represent mass percent; Sn is the remainder of the composition ratio of the other elements).
[0041] Next, a roll-shaped solder sheet 1 was fabricated using a rolling process at a temperature of 100°C or lower to achieve a thickness of 100 μm. It was then cut to the same size as the semiconductor device described below: 5 mm x 5 mm.
[0042] Furthermore, the solder sheet 1 may be manufactured not only by rolling, but also by melting the bulk material and sequentially pouring the molten solder through thin slits. Also, as described above, when there are many elements (five elements), the composition of the bulk material may become non-uniform due to temperature variations in the melting furnace. In that case, the Sn-Ag-Cu bulk material may be manufactured first, and then the solder composition may be adjusted by melting it again and adding predetermined amounts of the remaining Bi and Sb. Alternatively, the solder may be formed into solder balls, the solder balls may be uniformly scattered on a flat plate, and then compressed and molded to manufacture the sheet.
[0043] Next, in the second step (S2), solder sheet 1 was placed on substrate 2 (copper plate) (see Figure 3).
[0044] Substrate 2 was made of tough-pitch copper (thickness: 1 mm, size: 10 mm x 10 mm). The outermost surface of substrate 2 is solid copper, and no plating treatment was applied to this outermost surface.
[0045] Note C u To prevent oxidation, a predetermined amount of rust inhibitor with a decomposition temperature of 100°C or lower that does not affect bonding properties may be applied to the outermost surface of the gold plate. Furthermore, when placing the solder sheet 1, an organic agent that decomposes at temperatures above 100°C may be used as a tack agent to prevent the solder sheet 1 from shifting from its initial position. A viscosity of 200 Pa·s or higher is preferred for the tack agent. Alternatively, a resist film may be applied to areas other than the bonding area of the Cu plate to prevent the solder sheet 1 from shifting.
[0046] The solder sheet 1 may be slightly curved during cutting or handling. This is because the solder sheet 1 will completely melt when heated, so its initial shape will not have any effect. However, if the solder sheet is so curved that it is impossible to mount the semiconductor element in the next step, it may be straightened on another flat plate to make it parallel.
[0047] Next, in the third step (S3), the semiconductor element 3 was placed on the solder sheet 1 (see Figure 4). The semiconductor element 3 is made of Si, has a thickness of 100 μm, and measures 5 mm x 5 mm. A Ni film is formed on the side to be bonded so that the solder wets it. In addition, the aforementioned tack material may be applied between the semiconductor element 3 and the solder sheet 1 to fix its mounting position.
[0048] Next, as the fourth step, the laminate of each component obtained in the above steps was placed on a hot plate 6 inside the heating furnace 5 (see Figure 5). Then, formic acid, a typical organic acid capable of reducing oxide films, was sealed inside the heating furnace 5, and the solder sheet 1 was melted by heating at 180°C for 5 minutes, followed by heating at 230°C for 10 minutes, to form the solder joint member 4.
[0049] Next, in the fifth step (S5), the sample (semiconductor element assembly) on which the solder joint member 4 was formed was placed on the cooling plate 7 and cooled (see Figure 6).
[0050] In this process, the thermal contraction of the solder can cause the semiconductor element to warp or undulate (resulting in unevenness), which can lead to variations in the electrical properties of the semiconductor element 3. Therefore, during the cooling process, the sample was gradually cooled to 130°C (due to the 100°C temperature drop from 230°C to 130°C) over 360 seconds.
[0051] Furthermore, this type of cooling (slow cooling) process is not performed in general solder manufacturing processes. This is because such a slow cooling process increases the cycle time (working time) of solder joints. However, considering the influence of the semiconductor element 3 mentioned above, slow cooling as described above was performed to minimize stress.
[0052] A semiconductor device junction was obtained through the above process. Figure 7 is a schematic cross-sectional view showing the bonding interface 8 (part of the solder bonding member 4 and substrate 2 side, including the bonding interface between the two) of the semiconductor device assembly (see Figure 6) obtained after the fifth step. As shown in Figure 7, the bonding interface 8 contains, in order from the substrate 2 side, an interface compound 9 (a compound containing components of the substrate 2 and components of the solder sheet 1), a Sn-Bi alloy phase 10 (low melting point phase), a Sn-Bi-Sb alloy phase 11 (medium melting point phase), and a main phase 12.
[0053] The configuration of each phase in the solder joint member 4, including the substrate 2 side and the semiconductor element 3 side, is as shown in Figure 12.
[0054] <Rating> The semiconductor element 3 was removed from the obtained sample (semiconductor element assembly), and a portion of the solder joint member 4 was scraped off from the semiconductor element 3 side, leaving only the joint interface 8 on the substrate (Cu board) 2 side. Since the sample may contain processing oil, polishing debris, and moisture during preparation, it was pre-cleaned with ethanol and left at room temperature for 24 hours after cleaning.
[0055] Differential scanning calorimetry (DSC) measurements were performed on the joint interface 8 of the solder joint member 4. A platinum (Pt) pan was used to hold the sample. DSC measurement (apparatus) is a method (apparatus) for measuring the state change of a sample, and by DSC measurement, the melting point of the solder joint member 4 at the joint interface 8 can be confirmed. The heating rate during DSC measurement was set to 2°C / min.
[0056] Figure 8 shows the DSC measurement results of the sample. In Figure 8, the horizontal axis represents the heating temperature during DSC measurement, and the vertical axis represents the heat flow of the solder joint member 4. Note that when the material changes from solid to liquid, an endothermic reaction occurs, so the heat flow will be a negative value. The vertical axis is logarithmic, the heat flow is in units of mW, and the values shown in Figure 8 are relative values (relative to the Pt pan).
[0057] The results shown in Figure 8 revealed three main heat flow peaks (inverse peaks). These three peaks correspond to the phase with a melting point of 135°C to less than 145°C (low melting point phase: Sn-Bi alloy phase 10), the phase with a melting point of 170°C to less than 180°C (medium melting point phase: Sn-Bi-Sb alloy phase 11), and the phase with a melting point of 210°C to less than 220°C (main phase 12).
[0058] From these results, it can be confirmed that in this embodiment, multiple phases are formed by the interfacial reaction during bonding, as shown in Figure 7, at the bonding interface 8 after the fifth step (a part of the substrate side of the solder bonding member 4).
[0059] Next, the bonding strength of the sample (semiconductor device assembly) was measured by a dicia test. The result showed a bonding strength of 48 MPa. This value is above the target value of 40 MPa. Note that the peel strength of a similar assembly obtained using general-purpose Sn-3Ag-0.5Cu solder was 40 MPa, so a higher bonding strength was set as the target value. The reason for the high bonding strength is presumed to be that the addition of Bi and Sb to the solder activated a solid solution strengthening mechanism in some areas.
[0060] Furthermore, the amount of warpage (maximum distance from the substrate) of the semiconductor element in the sample (semiconductor element junction) was measured. As a result, the amount of warpage for the entire semiconductor element was 10 μm or less, clearing the target of 30 μm or less. On the other hand, general-purpose Sn-3Ag-0.5Cu solder If used The warp was 40 μm, which was not met.
[0061] (Comparative Example 1) To investigate the effect of Sb addition, a sample (semiconductor device junction) was prepared in the same manner as in Example 1, except that solder sheet 1 did not contain Sb (solder sheet 1 had a composition of Sn-3.5Ag-0.7Cu-3.3Bi), and the same evaluation was performed.
[0062] Figure 9 shows the DSC measurement results for Comparative Example 1. As shown in Figure 9, no intermediate melting point phase was observed in Comparative Example 1, and the low melting point phase was outside the range of "135°C or higher and less than 145°C" as in Example 1. This is thought to be because the added Sb has the effect of raising the melting points of the low melting point phase and the intermediate melting point phase. Regarding the main phase 12, a peak corresponding to a phase with a melting point of 210°C or higher and less than 220°C is observed, similar to Example 1. This is thought to have become more pronounced due to the concentration of Sb at the bonding interface.
[0063] To clarify the above mechanism, elemental mapping was performed on the solder joint member 4 of the sample from Example 1, which was prepared using Sb-containing solder sheet 1 (Sn-3.5Ag-0.7Cu-3.3Bi-2.0Sb). As a result, as shown in Figure 10, Sb and Bi were concentrated, particularly at the joint interface, indicating that these are the low-melting-point and medium-melting-point phases.
[0064] Furthermore, as shown in the SEM image in Figure 11, in the sample of Comparative Example 1, which was prepared using solder sheet 1 (Sn-3.5Ag-0.7Cu-3.3Bi) without added Sb, the formation of shrinkage cavities due to solidification shrinkage on the interface compound 9 was confirmed. This is thought to be because, without the addition of Sb, the main phase 12 solidifies, and then when the low-melting-point phase solidifies, it solidifies all at once, causing such shrinkage cavities to form. In other words, the addition of Sb is thought to have the effect of suppressing solidification shrinkage cracks of the low-melting-point phase due to phase separation formed at the joint interface during the slow cooling process used to suppress residual stress at the joint in this disclosure.
[0065] (Example 2) The amounts of Bi and Sb added were varied as shown in Table 1. The bonded samples obtained in the same manner as in Example 1 were visually inspected for solidification cracks using SEM images. The results are shown in Table 1. In Table 1, "OK" indicates no solidification cracks, and "NG" indicates the presence of solidification cracks.
[0066] [Table 1]
[0067] The results shown in Table 1 indicate that when Bi is added in amounts between 2.5% and 4% by mass, and Sb in amounts between 0.5% and 3% by mass, solidification cracks are absent, and good bonding is possible. In this case, the bonding strength of the bonded samples was confirmed to be 40 MPa or higher. This is thought to be because high bonding strength was maintained due to the absence of solidification cracks (shrinkage cavities). The warpage of the semiconductor device was also good, at 10 μm or less.
[0068] When the Bi content was less than 2.5 mass%, sufficient solder wettability was not obtained, resulting in insufficient joint strength (less than 40 MPa). When the Bi content was 4 mass or more, the proportion of the low-melting-point phase increased, leading to solidification cracking and insufficient joint strength (less than 40 MPa).
[0069] When the Sb content was less than 0.5 mass%, the intermediate melting point phase did not provide sufficient effect, resulting in solidification cracking and insufficient joint strength (less than 40 MPa). When the Sb content was 3 mass% or more, the melting point of the main phase 12 also increased, resulting in insufficient solder wettability and insufficient joint strength (less than 40 MPa).
[0070] The embodiments and examples disclosed herein should be considered in all respects to be illustrative and not restrictive. The scope of this disclosure is indicated by the claims rather than the foregoing description, and all modifications are intended to be within the meaning and scope of the equivalents of the claims. [Explanation of Symbols]
[0071] 1 Solder sheet, 2 First object (substrate: copper plate), 3 Second object (semiconductor device), 4 Solder joint member, 5 Heating furnace, 6 Hot plate, 7 Cooling plate, 8 Joint interface, 9 Interface compound, 10 Sn-Bi alloy phase (low melting point phase), 11 Sn-Bi-Sb alloy phase (medium melting point phase), 12 Main phase.
Claims
1. A soldering member for joining a first object and a second object, It consists of 3% to less than 4% by mass of Ag, 0.5% to less than 1.0% by mass of Cu, 2.5% to 3.8% by mass of Bi, 0.5% to 2.8% by mass of Sb, and the remainder being Sn. Furthermore, it may contain 0.1% by mass or more and less than 1% by mass of In. A main phase comprising Sn, Ag, and Cu, having a melting point of 210°C or higher and less than 220°C, A Sn-Bi-Sb alloy phase covering at least a portion of the main phase and having a melting point of 170°C or higher and less than 180°C, The Sn-Bi-Sb alloy phase comprises a Sn-Bi alloy phase that covers at least a portion of the aforementioned Sn-Bi-Sb alloy phase and has a melting point of 135°C or higher and less than 145°C. A solder joint member in which the main phase, the Sn-Bi-Sb alloy phase, and the Sn-Bi alloy phase are stacked in that order.
2. The soldering member according to claim 1, wherein the first object is a substrate and the second object is a semiconductor element.
3. It comprises a substrate and a semiconductor element, A semiconductor device in which the substrate and the semiconductor element are joined via a soldering member as described in claim 1 or 2.
4. A soldering method for joining a first object and a second object, A heating step in which a solder sheet consisting of 3% by mass or more and less than 4% by mass of Ag, 0.5% by mass or more and less than 1.0% by mass of Cu, 2.5% by mass or more and 3.8% by mass of Bi, 0.5% by mass or more and 2.8% by mass of Sb, and the remainder being Sn, is heated while sandwiched between the first object and the second object, The heating step is followed by a cooling step of cooling the solder sheet sandwiched between the first object and the second object. In the heating process, the maximum temperature reached is 220°C or higher and less than 230°C, and the heating time at the heating temperature is 10 minutes or more and less than 20 minutes. The soldering method wherein the solder sheet may further contain 0.1% by mass or more and less than 1% by mass of In.
5. The soldering method according to claim 4, wherein the total amount of oxygen contained in the solder sheet is greater than 0 ppm and less than 500 ppm.
6. The soldering method according to claim 4 or 5, wherein the first object is a substrate and the second object is a semiconductor element.
7. A method for manufacturing a semiconductor device comprising a substrate and a semiconductor element, A method for manufacturing a semiconductor device, comprising the step of joining the substrate and the semiconductor element using the soldering method described in claim 6.
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