Method for manufacturing a semiconductor device and a semiconductor device.

Abstract

To prevent the occurrence of a crack and separation in an outer peripheral part of a sintering material.SOLUTION: In a mount region r1 on a pattern 12c-1 where a semiconductor chip 1 is mounted, a sintering material 13b is applied in a range H1 larger than the chip size of the semiconductor chip 1 and then the sintering material 13b is dried (step P1). Before the semiconductor chip 1 is mounted, an outer peripheral part 31 of the sintering material 13b protruding from the chip size is irradiated with laser light to sinter the outer peripheral part 31 (step P2). After the outer peripheral part 31 is sintered, the semiconductor chip 1 is bonded to the mount region r1 through the sintering material 13b by application of pressure and heat (step P3). The outer peripheral part 31 is sparse, and the part of the sintering part 13b other than the outer peripheral part 31 is dense.SELECTED DRAWING: Figure 2

Description

Technical Field

[0001] The present invention relates to a method for manufacturing a semiconductor device and a semiconductor device.

Background Art

[0002] In a conventional bonding process of a semiconductor device, a semiconductor chip, an insulating substrate, a heat dissipation base, etc. are bonded by solder and attached to a cooling body via a thermal compound (a high thermal conductivity adhesive).

[0003] Thus, soldering is mainly performed for bonding the semiconductor chip and the insulating substrate. In recent years, however, sintering bonding that bonds by sintering a sintering material containing metal fine particles at the nano level or micro level has attracted attention.

[0004] Metal nanoparticles such as Ag used in the sintering material have high heat resistance and thermal conductivity. Therefore, sintering bonding has the advantages of high heat resistance, high heat dissipation, and high reliability of the bonding degree because stable bonding can be performed compared with bonding by solder.

[0005] As related technologies, for example, a technique has been proposed in which a sintering agent paste is printed so as to protrude around a chip mounting area and dried, and the peripheral portion of the sintering agent paste is pressure-heated by a pressing device to densify the peripheral portion (Patent Document 1). Also, a technique has been proposed in which a laser beam is irradiated on the sintered metal of the protruding portion from a semiconductor element for power to form a processing groove, and the sintered metal of the protruding portion is removed by washing (Patent Document 2).

Prior Art Documents

Patent Documents

[0006]

Patent Document 1

Patent Document 2

Summary of the Invention

[0007] During sintering bonding, the sintering material is applied using a squeegee with a metal mask. Figure 8 shows the process of applying the squeegee material to the sintering material. [Step P21] A metal mask 20 is placed on the insulating substrate 12. The metal mask 20 is a mask plate used to apply paste-like solder or sintered material to predetermined positions on the insulating substrate 12 when mounting components onto the insulating substrate 12.

[0008] Furthermore, the metal mask 20 has openings 20a at locations corresponding to predetermined positions on the insulating substrate 12 on which the semiconductor chip is mounted, and the metal mask 20 is superimposed on the insulating substrate 12 so that the predetermined positions and the openings 20a coincide.

[0009] [Step P22] The squeegee 21 is moved on the surface of the metal mask 20 to pour and fill the opening 20a with sintered material 3. [Step P23] The squeegee 21 is moved away from the metal mask 20, and the metal mask 20 is moved perpendicularly away from the insulating substrate 12 to dry the sintered material 3.

[0010] Here, as shown in step P23, in squeegee application, after the sintered material 3 is applied to the metal mask 20, the metal mask 20 is separated perpendicularly from the insulating substrate 12, causing the sintered material 3 to lift due to the separating motion. As a result, corners 3a may be formed in the sintered material 3 that was filling the edges of the opening 20a of the metal mask 20.

[0011] Figure 9 shows the semiconductor chip bonding process. After step P23 described above, the insulating substrate 12 coated with sintered material 3 is placed on the pressurizing device 5. Then, the pressurizing device 5 heats the sintered material 3 through the semiconductor chip 1 and applies pressure (pressurizing Pr), bonding the semiconductor chip 1 to the insulating substrate 12 via the sintered material 3.

[0012] Figure 10 shows a state in which a semiconductor chip has cracked. As described above, in sintering bonding, after applying the sintering material 3 to the insulating substrate 12, it is dried and then the semiconductor chip 1 is bonded to the insulating substrate 12 by pressurized heating.

[0013] However, as shown in Figures 9 and 10, corners 3a may be formed in the sintered material 3 when the metal mask 20 is separated after squeegee application. Therefore, when the semiconductor chip 1 is mounted on the corners 3a formed in the sintered material 3 and pressure is applied, the difference in the gap between the center and the edge of the sintered material 3 causes the semiconductor chip 1 to crack, resulting in chip cracking (TCR). To address these issues, it is conceivable to apply the sintered material 3 to an area larger than the chip size of the semiconductor chip 1.

[0014] Figure 11 shows a state in which a semiconductor chip is bonded by applying sintering material to an area larger than the chip size of the semiconductor chip. By applying sintering material 3 in an area larger than the chip size of the semiconductor chip 1, the semiconductor chip 1 can be bonded to the insulating substrate 12 by applying pressure in a way that prevents the semiconductor chip 1 from being mounted on the corners 3a formed in the sintering material 3. In other words, since the semiconductor chip 1 can be placed on the flat surface of the sintered material 3, it is possible to prevent the semiconductor chip 1 from cracking due to the pressure applied during bonding.

[0015] Figure 12 shows cracks and delamination occurring in the sintered material. However, if pressure heating bonding is performed in the state shown in Figure 11, a difference will occur between the void ratio of the outer peripheral portion 31 of the sintered material 3 that protrudes from the semiconductor chip 1 and the void ratio of the joint portion 32 of the sintered material 3 between the semiconductor chip 1 and the insulating substrate 12 (the portion of the sintered material 3 other than the outer peripheral portion 31).

[0016] During the bonding of the semiconductor chip 1, pressure and heating are applied to the semiconductor chip 1, so the bonding portion 32 is subjected to pressure and heating. On the other hand, the outer peripheral portion 31 is heated but not pressurized. As a result, a difference arises between the void ratio of the outer peripheral portion 31 and the void ratio of the bonding portion 32.

[0017] Furthermore, when there is a large difference between the void ratio of the outer periphery 31 and the void ratio of the joint 32, if, for example, a heat cycle (H / C: a reliability test in which the target device is operated by repeatedly alternating between high and low ambient temperatures) is performed, or if the semiconductor chip 1 is actually driven continuously, there is a problem that cracks (fissures) cr will occur in the sintered material 3. In addition, cracks in the sintered material 3 may cause delamination ex between the sintered material 3 and the insulating substrate 12.

[0018] In one aspect, the present invention aims to provide a method for manufacturing a semiconductor device and a semiconductor device that prevent the occurrence of cracks and delamination on the outer periphery of the sintered material. [Means for solving the problem]

[0019] To solve the above problems, a method for manufacturing a semiconductor device is provided. In this method, a sintering material is applied to a mounting area on an insulating substrate on which a semiconductor chip will be mounted, over an area larger than the chip size of the semiconductor chip, and the sintering material is dried. Before mounting the semiconductor chip, a laser beam is irradiated onto the outer periphery of the sintering material that extends beyond the chip size to sinter the outer periphery, and after the outer periphery is sintered, the semiconductor chip is bonded to the mounting area via the sintering material by pressurized heating.

[0020] Furthermore, a semiconductor device is provided to solve the above problems. The semiconductor device comprises an insulating substrate, a semiconductor chip mounted on the insulating substrate, and a sintered material that bonds the semiconductor chip to the insulating substrate. The sintered material has an outer periphery that protrudes from the semiconductor chip, and the protruding outer periphery of the sintered material is sintered, and the protruding outer periphery of the sintered material is sparse, while the parts other than the protruding outer periphery are dense, and the protruding outer periphery is From the end of the semiconductor chip The thickness decreases as you move away from it. It slopes in such a way It has a tapered shape.

Advantages of the Invention

[0021] According to one aspect, it becomes possible to prevent the occurrence of cracks and peeling on the outer peripheral portion of the sintered material.

Brief Description of the Drawings

[0022] [Figure 1] It is a diagram showing the configuration of the semiconductor device of the present invention. [Figure 2] It is a diagram for explaining the manufacturing method of the semiconductor device of the present invention. [Figure 3] It is a diagram showing the steps of the manufacturing method of the semiconductor device. [Figure 4] It is a diagram showing the steps of the manufacturing method of the semiconductor device. [Figure 5] It is a diagram showing the steps of the manufacturing method of the semiconductor device. [Figure 6] It is a diagram showing the steps of the manufacturing method of the semiconductor device. [Figure 7] It is a diagram for explaining the insulation between the semiconductor chip and the outer peripheral portion. [Figure 8] It is a diagram showing the step of squeegee coating of the sintered material. [Figure 9] It is a diagram showing the bonding step of the semiconductor chip. [Figure 10] It is a diagram showing a state where chip cracking of the semiconductor chip has occurred. [Figure 11] It is a diagram showing a state where the semiconductor chip is bonded by applying the sintered material in a range larger than the chip size of the semiconductor chip. [Figure 12] It is a diagram showing cracks and peeling generated in the sintered material.

Embodiments for Carrying Out the Invention

[0023] This embodiment will be described below with reference to the drawings. In the following description, "top surface" refers to the surface facing upwards as viewed from the page. Similarly, "up" and "upper part" refer to the direction facing upwards as viewed from the page. "Down" refers to the direction facing downwards as viewed from the page. These directions are used in all drawings. "Top surface," "up," "upper part," and "down" are merely convenient expressions to specify relative positional relationships and do not limit the technical concept of the present invention.

[0024] <Configuration of semiconductor device> Figure 1 shows the configuration of the semiconductor device of the present invention. It shows a cross-sectional view of the semiconductor device 10. The semiconductor device 10 comprises a semiconductor chip 1 mounted on a cooling body 11 and an insulating substrate 12.

[0025] The insulating substrate 12 has a ceramic 12a and patterns (foils) 12b, 12c-1, and 12c-2 (hereinafter, when patterns 12c-1 and 12c-2 are referred to collectively, they will be called pattern 12c). Furthermore, if patterns 12b and 12c are, for example, copper patterns, a DCB (Direct Copper Bonding) substrate can be used in which patterns 12b and 12c are directly bonded to the ceramic 12a.

[0026] One side of the metal base plate 11b is mounted on the upper surface of the cooling body 11 via thermal grease 11a, and the insulating substrate 12 is mounted on the other side of the metal base plate 11b. The pattern 12b of the insulating substrate 12 is then joined to the metal base plate 11b via sintered material 13a (or solder).

[0027] A semiconductor chip 1, for example, made of silicon, is bonded to the pattern 12c-1 of the insulating substrate 12 via a sintered material 13b. The outer peripheral portion 31 of the sintered material 13b is tapered by sintering with laser light.

[0028] In other words, the sintered material 13b is applied to the insulating substrate 12 over an area larger than the chip size of the semiconductor chip 1, the sintered material 13b is dried, and before mounting to the mounting area of ​​the semiconductor chip 1, the outer peripheral portion 31 of the sintered material 13b that extends beyond the chip size is irradiated with laser light to sinter the outer peripheral portion 31. Furthermore, the sintered material 13b becomes sparse in the outer peripheral portion 31 that extends beyond the semiconductor chip 1, while the portion of the sintered material 13b other than the outer peripheral portion 31 becomes dense. Preferably, the first void ratio of the sintered material 13b in the outer peripheral portion 31 that extends beyond the semiconductor chip 1 is 30-40%, and the second void ratio of the portion of the sintered material 13b other than the outer peripheral portion 31 is 10-30%.

[0029] On the other hand, wires 14-1, 14-2, and 14-3 are, for example, aluminum wires with a wire diameter of 300 μm to 400 μm. Wire 14-1 connects pattern 12c-1 to the external terminal 16a provided on terminal case 16.

[0030] Wire 14-2 connects the electrode of the semiconductor chip 1 to the pattern 12c-2, which serves as the lead electrode of the insulating substrate 12. The semiconductor chip 1 has electrodes (Al-Si electrodes) coated with, for example, an Al-Si alloy film.

[0031] Wire 14-3 connects pattern 12c-2 to external terminal 16b provided on terminal case 16. The joining of wires 14-1, 14-2, and 14-3 is performed by ultrasonic and load-based wire bonding.

[0032] The insulating substrate 12 to which the semiconductor chip 1 is bonded is housed in a terminal case 16, and the area enclosed by the terminal case 16 and the metal base plate 11b is filled with sealing resin 15 to seal it. The terminal case 16 and the metal base plate 11b are fixed together with an adhesive or the like.

[0033] Here, the patterns 12b and 12c of the insulating substrate 12 are made of a material with excellent conductivity. Such a material is made of, for example, copper, aluminum, or an alloy containing at least one of these. The thickness of the patterns 12b and 12c is preferably 0.10 mm or more and 2.00 mm or less, and more preferably 0.20 mm or more and 1.00 mm or less.

[0034] In addition to the semiconductor chip 1, wiring components such as bonding wires, lead frames, and connection terminals, as well as electronic components, can be appropriately placed on pattern 12c as needed.

[0035] It is also possible to plate such patterns 12c with materials that have excellent corrosion resistance. Such materials include, for example, aluminum, nickel, titanium, chromium, molybdenum, tantalum, niobium, tungsten, vanadium, bismuth, zirconium, hafnium, gold, silver, platinum, palladium, or alloys containing at least one of these. The number, placement, and shape of patterns 12c can be selected as appropriate through design.

[0036] On the other hand, the metal base plate 11b is made of a metal with excellent thermal conductivity. This metal is, for example, aluminum, iron, silver, copper, or an alloy containing at least one of these. Examples of such alloys include metal composites such as aluminum-silicon nitride (Al-SiC) or magnesium-silicon nitride (Mg-SiC).

[0037] Furthermore, to improve corrosion resistance, a material such as nickel may be formed on the surface of the metal base plate 11b by plating or other means. Specifically, in addition to nickel, nickel-phosphorus alloys, nickel-boron alloys, etc., are also available. The thickness of the plating film is preferably 1 μm or more, and more preferably 5 μm or more. The cooling body 11 is a heat sink with one or more fins or a water-cooled cooling device, etc.

[0038] On the other hand, semiconductor chip 1 is a power device composed of silicon, silicon carbide, or gallium nitride. Semiconductor chip 1 includes switching elements. Switching elements include power MOSFETs (Metal Oxide Semiconductor Field Effect Transistors), IGBTs (Insulated Gate Bipolar Transistors), etc.

[0039] Such a semiconductor chip 1 includes, for example, a drain electrode (positive electrode, collector electrode in IGBTs) as the main electrode, and a gate electrode and a source electrode (negative electrode, emitter electrode in IGBTs) as control electrodes.

[0040] Furthermore, semiconductor chip 1 includes a diode element. The diode element is, for example, an FWD (Free Wheeling Diode) such as an SBD (Schottky Barrier Diode) or a PiN (P-intrinsic-N) diode.

[0041] The thickness of the semiconductor chip 1 is, for example, between 80 μm and 500 μm, with an average of approximately 200 μm. Other electronic components may also be placed on pattern 12c as needed. These electronic components include, for example, capacitors, resistors, thermistors, current sensors, and control ICs (Integrated Circuits).

[0042] On the other hand, the sealing resin 15 comprises a thermosetting resin and a filler contained in the thermosetting resin. Examples of thermosetting resins include epoxy resins, phenolic resins, maleimide resins, and polyester resins.

[0043] An example of the sealing resin 15 is an epoxy resin, which contains a filler such as silicon oxide, aluminum oxide, boron nitride, or aluminum nitride. Alternatively, the sealing resin 15 may be a thermoplastic resin.

[0044] Thermoplastic resins include, for example, PPS (polyphenylene sulfide) resin, PBT (polybutylene terephthalate) resin, PBS (polybutylene succinate) resin, or ABS (acrylonitrile butadiene styrene) resin.

[0045] <Process for manufacturing semiconductor devices> The method for manufacturing a semiconductor device will be described in detail below. Figure 2 is a diagram illustrating steps P1 to P3 of the semiconductor device manufacturing method of the present invention. [Process P1] A sintered material 13b is applied to the mounting area r1 on the pattern 12c-1 of the insulating substrate 12 on which the semiconductor chip 1 is mounted, over an area H1 larger than the chip size of the semiconductor chip 1, and the sintered material 13b is dried.

[0046] [Step P2] Before mounting the semiconductor chip 1, the outer periphery 31 of the sintered material 13b that extends beyond the chip size is irradiated with laser light to sinter the outer periphery 31. In the figure, L indicates the irradiation of laser light.

[0047] [Step P3] After the outer periphery 31 is sintered, the semiconductor chip 1 is bonded to the mounting area r1 via the sintered material 13b by pressurized heating. The outer periphery 31 is sparse, while the sintered material 13b outside the outer periphery 31 is dense.

[0048] As described above, in the semiconductor device manufacturing method of the present invention, a sintered material 13b is applied to a mounting area r1 on a pattern 12c-1 of an insulating substrate 12 on which a semiconductor chip 1 is mounted, over an area H1 larger than the chip size of the semiconductor chip 1. Laser light is irradiated onto the outer peripheral portion 31 of the sintered material 13b that extends beyond the chip size to sinter the outer peripheral portion 31. After that, the semiconductor chip 1 is bonded to the pattern 12c-1 of the insulating substrate 12 via the sintered material 13b by pressurized heating.

[0049] As a result, the outer periphery 31 is sintered by the laser light, causing the sintered material 13b to become less dense in the outer periphery 31 that extends beyond the semiconductor chip 1, while the rest of the sintered material 13b becomes denser. In other words, the difference between the void ratio of the outer periphery 31 and the void ratio of the rest of the sintered material 13b can be reduced, thereby preventing cracks and delamination of the outer periphery 31 of the sintered material 13b. Preferably, the first void ratio of the outer periphery 31 that extends beyond the semiconductor chip 1 is 30-40%, and the second void ratio of the rest of the sintered material 13b is 10-30%.

[0050] Figures 3 to 6 show steps P11 to P15 of the semiconductor device manufacturing method. [Step P11] As shown in Figure 3, the metal mask 2 is placed on the pattern 12c of the insulating substrate 12. As shown in Figure 2, the sintered material 13b is applied to the mounting area r1 on the pattern 12c-1 on which the semiconductor chip 1 will be mounted, over an area H1 larger than the chip size of the semiconductor chip 1.

[0051] Therefore, the metal mask 2 is provided with an opening 2a that has the same shape as the area H1, which is larger than the chip size of the semiconductor chip 1. Then, the metal mask 2 is superimposed on the pattern 12c-1 so that the shape of the area H1, which is larger than the chip size of the semiconductor chip 1, and the opening 2a match. Here, the metal mask 2 can be, for example, a metal mask made of a material such as stainless steel. The thickness of the metal mask 2 is preferably, for example, 50 mm to 200 mm.

[0052] [Step P12] As shown in Figure 4, the squeegee 21 is moved on the surface of the metal mask 2 to pour and fill the opening 2a with viscous sintered material 13b.

[0053] For example, silver sintered material or copper sintered material can be used as the sintered material 13b. Silver and copper are preferably used as the metal contained in the sintered material 13b, but metals other than silver and copper may also be used, as well as alloys of two or more metals or mixtures of two or more metals.

[0054] [Step P13] The squeegee 21 is moved away from the metal mask 2 towards the upper space. Then, the pattern 12c-1 and the metal mask 2 are separated relative to each other in the vertical direction of the pattern 12c-1, and the sintered material 13b is dried in a drying oven.

[0055] Furthermore, when the metal mask 2 and pattern 12c-1 are separated, the sintered material 13b lifts up, which may cause corners 3a to form on the sintered material 13b that was filling the edge portion of the opening 2a of the metal mask 2.

[0056] Furthermore, the drying conditions for the sintered material 13b can be, for example, 120°C for about 15 minutes. The thickness of the thickest part of the sintered material 13b after drying can be, for example, 50 μm to 130 μm, and the porosity of the sintered material 13b can be, for example, 60% to 70%.

[0057] [Step P14] As shown in Figure 5, before mounting the semiconductor chip 1, the outer periphery 31 (shaded area in Figure 5) of the sintered material 13b that extends beyond the chip size of the semiconductor chip 1 is irradiated with laser light from a laser oscillator to sinter the outer periphery 31. Since corner 3a is included in the outer periphery 31, corner 3a is also irradiated with laser light. L in the figure indicates the irradiation of laser light.

[0058] Here, the distance D from the outer edge of the semiconductor chip 1 (the outer edge of the mounting area r1) to the outer edge of the sintered material 13b is between 0.5 mm and 1 mm. Furthermore, if the sintered material 13b is made of silver particles, the laser light wavelength is in the ultraviolet region, which is close to the absorption wavelength of silver (300 nm to 350 nm). For example, the third harmonic of a YAG (Yttrium Aluminum Garnet) laser, 355 nm, is used, and the laser is irradiated at low power to avoid damaging the surroundings.

[0059] Furthermore, when using infrared light (e.g., YAG laser light, 1064 nm) or visible light (e.g., the second harmonic of YAG laser light, 532 nm) laser light, metals such as gold and copper absorb the laser light more readily than silver in these wavelength ranges. Therefore, depending on the type of metal used for the metal electrodes in pattern 12c-1, adjustments to the laser light output may be necessary. In addition, while a solid-state laser or semiconductor laser capable of producing wavelengths in the ultraviolet range is preferable for the laser oscillator that outputs the laser light, gas lasers can also be used.

[0060] [Step P14a] As shown in Figure 6, the outer periphery 31 of the sintered material 13b after irradiation with laser light is shown. The outer periphery 31 of the sintered material 13b is irradiated with laser light and sintered. The outer periphery 31 may become tapered as a result of sintering. st in Figure 6 shows the sintering of the outer periphery 31.

[0061] [Step P15] An insulating substrate 12 including a pattern 12c-1, on which a sintered material 13b whose outer periphery 31 has been sintered by laser light is applied, is placed on the pressurizing device 5. Then, the pressurizing device 5 applies pressure (Pressure Pr) between the semiconductor chip 1 and the insulating substrate 12 including the pattern 12c-1, and raises the temperature to the sintering temperature of the sintered material 13b to sinter the metal particles contained in the sintered material 13b, thereby bonding the semiconductor chip 1 to the pattern 12c-1 via the sintered material 13b.

[0062] The heating temperature during pressurization by the pressurizing device 5 can be, for example, around 200°C to 280°C. The pressurizing pressure can be, for example, around 1 MPa to 15 MPa. The pressurizing time can be, for example, around 1 minute to 15 minutes.

[0063] By performing this type of sintering bond, the outer periphery 31 of the sintered material 13b is sintered by laser irradiation, so the outer periphery 31 that protrudes from the semiconductor chip 1 becomes sparse, while the rest of the sintered material 13b becomes dense. In other words, the difference between the void ratio of the outer periphery 31 of the sintered material 13b and the void ratio of the rest of the sintered material 13b can be reduced. Therefore, cracks and delamination of the outer periphery 31 can be prevented even during the hardening / cooling of the semiconductor chip 1 or during continuous operation of the semiconductor chip 1.

[0064] <Ensuring insulation> Figure 7 is a diagram illustrating the insulation between the semiconductor chip and the outer periphery. As described above, when the outer periphery 31 of the sintered material 13b is irradiated with laser light, the outer periphery 31 is sintered, removing the corner 3a that was present on the outer periphery 31, and the outer periphery 31 after laser light irradiation becomes a downwardly tapered shape. Therefore, the distance d0 between the upper surface of the semiconductor chip 1 and the upper surface of the sintered outer periphery 31 increases, thus ensuring insulation between the semiconductor chip 1 and the outer periphery 31.

[0065] As described above, according to the present invention, a sintered material is printed on an insulating substrate pattern larger than the chip size of the semiconductor chip, the outer periphery of the excess sintered material is irradiated with laser light to sinter it, and then the semiconductor chip is bonded to the insulating substrate via the sintered material by pressurized heating.

[0066] This reduces the difference in void ratio between the outer periphery of the sintered material and the void ratio of the rest of the sintered material, thereby preventing cracks and delamination from occurring at the periphery. Furthermore, it enables the realization of semiconductor devices with high heat resistance and high heat dissipation, improving reliability.

[0067] This invention reduces the difference in void ratio by sintering the portion of the semiconductor chip that protrudes from the chip before mounting (after drying) using laser light.

[0068] In the laser sintering method of the present invention, uniform density can be achieved even in the protruding outer periphery. Furthermore, since the corners formed around the sintered material before chip mounting can be reliably sintered and tapered, chip cracking that occurs when the semiconductor chip is mounted and sintered together can be suppressed.

[0069] Although embodiments have been illustrated above, the configurations of each part shown in the embodiments can be replaced with others having similar functions. Furthermore, other arbitrary components or processes may be added. Moreover, any two or more configurations (features) from the embodiments described above may be combined. [Explanation of symbols]

[0070] 1. Semiconductor chip 5. Pressurizing device 10 Semiconductor Devices 11 Cooling element 11a Thermal grease 11b Metal base plate 12 Insulating substrate 12a Ceramic Patterns 12b, 12c-1, and 12c-2 3, 13a, 13b Sintered material 3a corner 14-1, 14-2, 14-3 wires 15 Sealing resin 16 terminal case 16a, 16b external terminal 2.20 Metal Mask 2a, 20a opening 21 Squeegee 31 Outer periphery 32 Joint r1 mounting area H1 Range Irradiation of L laser light D, d0 distance st sintering Pr pressurization TCR chip crack cr crack ex peeling

Claims

1. A sintering material is applied to the mounting area on the insulating substrate on which the semiconductor chip is mounted, over an area larger than the chip size of the semiconductor chip, and the sintering material is dried. Before mounting the semiconductor chip, the outer periphery of the sintered material that extends beyond the chip size is irradiated with laser light to sinter the outer periphery. After the outer periphery is sintered, the semiconductor chip is bonded to the mounting area by pressurizing and heating via the sintered material. A method for manufacturing a semiconductor device.

2. The method for manufacturing a semiconductor device according to claim 1, wherein the distance from the outer periphery of the semiconductor chip to the outer periphery of the sintered material is 0.5 mm to 1 mm.

3. The method for manufacturing a semiconductor device according to claim 1, wherein the outer periphery is irradiated with laser light having a wavelength in the ultraviolet region.

4. A metal mask having an opening of the same shape as the aforementioned range is placed on the insulating substrate. Using a squeegee, the sintered material is applied onto the metal mask and the opening is filled with the sintered material. The insulating substrate and the metal mask are separated relative to each other in the direction perpendicular to the insulating substrate. The sintered material applied to the aforementioned area is dried. A method for manufacturing a semiconductor device according to claim 1.

5. Insulating substrate and A semiconductor chip mounted on the aforementioned insulating substrate, A sintered material for bonding the semiconductor chip to the insulating substrate, It has, The sintered material has an outer periphery that protrudes from the semiconductor chip, the protruding outer periphery of the sintered material is sintered, the protruding outer periphery of the sintered material is sparse, and the parts other than the protruding outer periphery are dense. The protruding outer periphery has a tapered shape that slopes downwards in the direction away from the end of the semiconductor chip, Semiconductor equipment.

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