Semiconductor device

JPWO2022259809A5Active Publication Date: 2025-03-21ROHM CO LTD
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Patent Information

Application Number
JP2023527579
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2022-05-12
Filing Date
2022-05-12
Publication Date
2025-03-21
Estimated Expiration
2042-05-12

AI Technical Summary

Technical Problem

Existing semiconductor devices face misalignment issues between conductive members and electrodes, which can hinder wire joining and affect the device's performance, particularly when the conductive members cover the gate electrode.

Method used

The semiconductor device incorporates a conductive member with specific surface configurations and bonding layers that ensure proper alignment and bonding between the conductive member and the lead, using a first conductive bonding layer that contacts the conductive member's surfaces and the lead's surfaces, thereby regulating displacement and enhancing bonding strength.

Benefits of technology

This configuration effectively suppresses misalignment and improves the bonding strength between the conductive member and the lead, ensuring reliable electrical connections and enhanced performance by maintaining alignment and increasing the bonding area.

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Abstract

This semiconductor device comprises: a first lead; a semiconductor element having a first electrode; a conductive member that makes the first lead and the first electrode conductive to each other; a first conductive junction layer for conductively joining the first lead and the conductive member; and a second conductive junction layer for conductively joining the first electrode and the conductive member. The conductive member has a first surface facing the first lead in the thickness direction of the semiconductor element, and a second surface facing the first lead in a first direction orthogonal to the thickness direction. The first lead has a third surface facing the first surface, and a fourth surface facing the second surface. The first conductive junction layer is in contact with the first and third surfaces.
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Description

Semiconductor Devices

[0001] The present disclosure relates to semiconductor devices.

[0002] Patent Document 1 discloses an example of a semiconductor device (power module) in which multiple semiconductor elements are bonded to a conductor layer. The semiconductor device includes multiple connecting metal members bonded to the conductor layer and the multiple semiconductor elements. This allows a large current to flow through the multiple semiconductor elements.

[0003] However, in the semiconductor device disclosed in Patent Document 1, at least one of the multiple connecting metal members may be misaligned with respect to the electrodes of the semiconductor element to which they are bonded. If the degree of misalignment is relatively large, the connecting metal member may cover the gate electrode of the semiconductor element. In this case, when bonding a wire to the gate electrode, the connecting metal member makes it difficult to bond the wire. Therefore, a method for suppressing the misalignment of the connecting metal members with respect to the electrodes of the semiconductor element is desired.

[0004] JP 2016-162773 A

[0005] In view of the above circumstances, one object of the present disclosure is to provide a semiconductor device that can suppress misalignment of a conductive member with respect to an electrode of a semiconductor element.

[0006] The semiconductor device provided by the present disclosure comprises a first lead, a semiconductor element having a first electrode, a conductive member that electrically connects the first lead and the first electrode, a first conductive bonding layer that electrically connects the first lead and the conductive member, and a second conductive bonding layer that electrically connects the first electrode and the conductive member, wherein the conductive member has a first surface that faces the first lead in a thickness direction of the semiconductor element and a second surface that faces the first lead in a first direction perpendicular to the thickness direction, the first lead has a third surface that faces the first surface and a fourth surface that faces the second surface, and the first conductive bonding layer is in contact with the first surface and the third surface.

[0007] According to the semiconductor device according to the present disclosure, it is possible to suppress misalignment of the conductive member with respect to the electrode of the semiconductor element.

[0008] Other features and advantages of the present disclosure will become more apparent from the following detailed description taken in conjunction with the accompanying drawings.

[0009] FIG. 1 is a plan view of a semiconductor device according to a first embodiment of the present disclosure, seen through a sealing resin. FIG. 2 is a plan view corresponding to FIG. 1, further showing a conductive member, a first conductive bonding layer, and a second conductive member. FIG. 3 is a bottom view of the semiconductor device shown in FIG. 1. FIG. 4 is a right side view of the semiconductor device shown in FIG. 1. FIG. 5 is a rear view of the semiconductor device shown in FIG. 1. FIG. 6 is a cross-sectional view taken along line VI-VI in FIG. 1. FIG. 7 is a cross-sectional view taken along line VII-VII in FIG. 1. FIG. 8 is a cross-sectional view taken along line VIII-VIII in FIG. 1. FIG. 9 is a partially enlarged view of FIG. 6. FIG. 10 is a partially enlarged view of FIG. 6. FIG. 11 is a partially enlarged cross-sectional view of a modified example of the semiconductor device shown in FIG. 1. FIG. 12 is a plan view of a semiconductor device according to a second embodiment of the present disclosure, seen through a sealing resin. FIG. 13 is a cross-sectional view taken along line XIII-XIII in FIG. 12. 14 is a cross-sectional view taken along line XIV-XIV in FIG. 12. FIG. 15 is a partially enlarged view of FIG. 13. FIG. 16 is a plan view of a semiconductor device according to a third embodiment of the present disclosure, seen through the sealing resin. FIG. 17 is a cross-sectional view taken along line XVII-XVII in FIG. 16. FIG. 18 is a partially enlarged view of FIG. 17. FIG. 19 is a partially enlarged cross-sectional view of a modified example of the semiconductor device shown in FIG. 16. FIG. 20 is a plan view of a semiconductor device according to a fourth embodiment of the present disclosure, seen through the sealing resin. FIG. 21 is a cross-sectional view taken along line XXI-XXI in FIG. 20. FIG. 22 is a partially enlarged view of FIG. 21.

[0010] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present disclosure will be described with reference to the accompanying drawings.

[0011] A semiconductor device A10 according to a first embodiment of the present disclosure will be described with reference to FIGS. 1 to 10 . The semiconductor device A10 is used in electronic devices equipped with a power conversion circuit, such as a DC-DC converter. The semiconductor device A10 includes a semiconductor element 10, a conductive member 30, a first lead 21, a second lead 22, a die pad 23, a bonding layer 29, a first conductive bonding layer 31, a second conductive member 32, a wire 40, and a sealing resin 50. For ease of understanding, FIG. 1 shows the sealing resin 50 in perspective. For ease of understanding, FIG. 2 shows the conductive member 30, the first conductive bonding layer 31, and the second conductive member 32 in perspective, compared to FIG. 1 . In FIGS. 1 and 2 , the penetrated sealing resin 50 is indicated by an imaginary line (two-dot chain line). In FIG. 2 , the penetrated conductive member 30 is indicated by an imaginary line. In FIG. 1 , lines VII-VII and VIII-VIII are indicated by dashed lines, respectively.

[0012] In describing the semiconductor device A10, for convenience, the thickness direction of the semiconductor element 10 will be referred to as the "thickness direction z." One direction perpendicular to the thickness direction z will be referred to as the "first direction x." A direction perpendicular to both the thickness direction z and the first direction x will be referred to as the "second direction y."

[0013] As shown in FIGS. 1, 2, 6, and 7, the semiconductor element 10 is mounted on a die pad 23. The semiconductor element 10 is, for example, a metal-oxide-semiconductor field-effect transistor (MOSFET). Alternatively, the semiconductor element 10 may be a switching element such as an insulated gate bipolar transistor (IGBT) or a diode. In the description of the semiconductor device A10, the semiconductor element 10 is an n-channel, vertically structured MOSFET. The semiconductor element 10 includes a compound semiconductor substrate. The compound semiconductor substrate has a composition including silicon carbide (SiC). That is, the semiconductor substrate contains silicon carbide. As shown in FIGS. 2 and 9, the semiconductor element 10 has a first electrode 11, a second electrode 12, and a third electrode (a gate electrode in the illustrated example) 13.

[0014] As shown in Fig. 9, the first electrode 11 and the second electrode 12 are spaced apart from each other in the thickness direction z, and the first electrode 11 is located on one side of the second electrode 12 in the thickness direction z. A current corresponding to the power converted by the semiconductor element 10 flows through the first electrode 11. That is, the first electrode 11 corresponds to the source electrode of the semiconductor element 10. The first electrode 11 includes a plurality of metal plating layers. The first electrode 11 includes a nickel (Ni) plating layer and a gold (Au) plating layer laminated on the nickel plating layer. Alternatively, the first electrode 11 may include a nickel plating layer, a palladium (Pd) plating layer laminated on the nickel plating layer, and a gold plating layer laminated on the palladium plating layer.

[0015] 9 , the second electrode 12 is located on the opposite side to the first electrode 11 in the thickness direction z and faces the die pad 23. A current corresponding to the power before being converted by the semiconductor element 10 flows through the second electrode 12. In other words, the second electrode 12 corresponds to the drain electrode of the semiconductor element 10.

[0016] 2 , the gate electrode 13 is located on the same side as the first electrode 11 in the thickness direction z. A gate voltage for driving the semiconductor element 10 is applied to the gate electrode 13. When viewed in the thickness direction z, the area of ​​the gate electrode 13 is smaller than the area of ​​the first electrode 11.

[0017] The conductive member 30 electrically connects the first lead 21 and the first electrode 11 of the semiconductor element 10. Therefore, the conductive member 30 forms part of the conductive path of the semiconductor device A10. The conductive member 30 contains copper (Cu). The conductive member 30 is a metal clip. As shown in FIGS. 1 and 6 , the conductive member 30 straddles the first lead 21 and the die pad 23. As shown in FIGS. 6 and 10 , the conductive member 30 has a first surface 301, a second surface 302, a bonding surface 303, and an inclined surface 304.

[0018] 10 , the first surface 301 faces the first lead 21 in the thickness direction z. The second surface 302 faces the first lead 21 in the first direction x. The second surface 302 faces the side opposite to the side on which the semiconductor element 10 is located in the first direction x. The second surface 302 is located on a side farther away from the semiconductor element 10 in the first direction x than the first surface 301. The second surface 302 is connected to the first surface 301.

[0019] 9 , the bonding surface 303 faces the first electrode 11 of the semiconductor element 10. The inclined surface 304 is located between the first surface 301 and the bonding surface 303 in the first direction x and is connected to the bonding surface 303. The inclined surface 304 is inclined at an inclination angle α with respect to the bonding surface 303 in a direction away from the semiconductor element 10 in the thickness direction z as it moves away from the bonding surface 303 in the first direction x. As an example, the inclination angle α is equal to or greater than 30° and equal to or less than 60°.

[0020] The first lead 21, the second lead 22, and the die pad 23, together with the conductive member 30, form a conductive path of the semiconductor device A10. The first lead 21, the second lead 22, and the die pad 23 are formed from the same lead frame. The lead frame is made of copper or a copper alloy. Therefore, the composition of the first lead 21, the second lead 22, and the die pad 23 includes copper.

[0021] 1 and 2, the first lead 21 is located on one side in the first direction x. The first lead 21 is electrically connected to the first electrode 11 of the semiconductor element 10 via the conductive member 30. Therefore, the first lead 21 forms the source terminal of the semiconductor device A10. As shown in FIGS. 1 to 3, the first lead 21 has a first main surface 211, a first mounting surface 212, a plurality of first side surfaces 213, a third surface 214, a fourth surface 215, a fifth surface 216, and a plurality of recesses 217.

[0022] 6 and 10 , the third surface 214 faces one side in the thickness direction z (e.g., the upper side in FIG. 10 ). In relation to this, as shown in FIG. 9 , the first electrode 11 has a surface facing outward from the semiconductor element 10 (i.e., one side in the thickness direction z) and a surface facing inward from the semiconductor element 10 (i.e., the other side in the thickness direction z). That is, in the thickness direction z, the side to which the third surface 214 faces and the side to which the outward surface of the first electrode 11 faces are the same. The third surface 214 faces the first surface 301 of the conductive member 30.

[0023] 6 and 10 , the fourth surface 215 faces the side where the semiconductor element 10 is located in the first direction x. The fourth surface 215 faces the second surface 302 of the conductive member 30. The fourth surface 215 is connected to the third surface 214. A notch defined by the third surface 214 and the fourth surface 215 is formed in the first lead 21.

[0024] 6 and 10 , the first main surface 211 faces the same side as the third surface 214 in the thickness direction z. The first main surface 211 is located on the opposite side of the first side surface 213 in the thickness direction z, with the fourth surface 215 sandwiched therebetween. The first main surface 211 is located on a side farther away from the semiconductor element 10 in the first direction x than the third surface 214. The first main surface 211 is connected to the fourth surface 215. A plating layer containing nickel, silver (Ag), or the like may be provided on the first main surface 211.

[0025] 6 and 10 , the first mounting surface 212 faces the opposite side to the third surface 214 in the thickness direction z. As shown in FIG. 3 , the first mounting surface 212 is exposed from the sealing resin 50. The third surface 214 is located between the first main surface 211 and the first mounting surface 212 in the thickness direction z. As viewed in the thickness direction z, the third surface 214 overlaps the first mounting surface 212 (see FIGS. 2 and 3 ). A plating layer containing tin (Sn) or the like may be provided on the first mounting surface 212.

[0026] 6 and 10 , the fifth surface 216 faces the same side as the fourth surface 215 in the first direction x. The fifth surface 216 is located between the first mounting surface 212 and the third surface 214 in the thickness direction z. The fifth surface 216 is connected to the first mounting surface 212 and the third surface 214. The fifth surface 216 is located on the opposite side of the fourth surface 215 in the first direction x, with the third surface 214 sandwiched therebetween. The fifth surface 216 is located closer to the semiconductor element 10 in the first direction x than the fourth surface 215.

[0027] 2 and 6 , the multiple first side surfaces 213 face the side opposite to the side on which the semiconductor element 10 is located in the first direction x. The multiple first side surfaces 213 are connected to the first main surface 211 and the first mounting surface 212. The multiple first side surfaces 213 are arranged along the second direction y. As shown in FIG. 5 , the multiple first side surfaces 213 are exposed from the sealing resin 50.

[0028] 2 and 3 , the recesses 217 are recessed in the first direction x from between two first side surfaces 213 adjacent to each other in the second direction y. The recesses 217 are filled with a sealing resin 50.

[0029] 1 and 2, the second lead 22 is located away from the first lead 21 in the second direction y. The second lead 22 is electrically connected to the gate electrode 13 of the semiconductor element 10. Therefore, the second lead 22 forms the gate terminal of the semiconductor device A10. As shown in FIGS. 1 to 3, the second lead 22 has a second main surface 221, a second mounting surface 222, a second side surface 223, and a thin portion 224.

[0030] 8 , the second main surface 221 faces the same side in the thickness direction z as the third surface 214 of the first lead 21. The position of the second main surface 221 in the thickness direction z is equal to the position of the first main surface 211 of the first lead 21 in the thickness direction z. A plating layer containing nickel, silver, or the like may be provided on the second main surface 221.

[0031] 8, the second mounting surface 222 faces the opposite side in the thickness direction z from the second main surface 221. As shown in Fig. 3, the second mounting surface 222 is exposed from the sealing resin 50. A plating layer containing tin or the like may be provided on the first mounting surface 212.

[0032] 1 and 2 , the second side surface 223 faces the same side as the multiple first side surfaces 213 of the first lead 21 in the first direction x. The second side surface 223 is connected to the second main surface 221 and the second mounting surface 222. As shown in FIG. 5 , the second side surface 223 is exposed from the sealing resin 50.

[0033] As shown in FIG. 3 , the thin-walled portion 224 has a canopy-like shape that extends from the second mounting surface 222 in a direction perpendicular to the thickness direction z when viewed in the thickness direction z. A portion of the second main surface 221 is included in the thin-walled portion 224. As shown in FIG. 8 , the thin-walled portion 224 includes an intermediate surface 224A and an end surface 224B. The intermediate surface 224A faces the opposite side from the second main surface 221 in the thickness direction z. The intermediate surface 224A is located between the second main surface 221 and the second mounting surface 222 in the thickness direction z. The intermediate surface 224A is in contact with the sealing resin 50. The end surface 224B is connected to the second main surface 221 and the intermediate surface 224A and faces the second direction y. As shown in FIG. 5 , the end surface 224B is exposed from the sealing resin 50. The area of ​​the end surface 224B is smaller than the area of ​​the second side surface 223.

[0034] 1 and 2, the die pad 23 is located away from the first lead 21 and the second lead 22 in the first direction x. The die pad 23 is electrically connected to the second electrode 12 of the semiconductor element 10. Therefore, the die pad 23 forms the drain terminal of the semiconductor device A10. As shown in FIGS. 1 to 3, the die pad 23 has a mounting surface 231, a back surface 232, multiple peripheral surfaces 233, and a thin portion 234.

[0035] 6 , the mounting surface 231 faces the same side as the third surface 214 of the first lead 21 in the thickness direction z. The position of the mounting surface 231 in the thickness direction z is equal to the position of the first main surface 211 of the first lead 21 in the thickness direction z. The semiconductor element 10 is mounted on the mounting surface 231. A plating layer containing nickel, silver, or the like may be provided on the mounting surface 231.

[0036] 6 and 7 , the rear surface 232 faces the side opposite to the side on which the semiconductor element 10 is located in the thickness direction z. As shown in Fig. 3 , the rear surface 232 is exposed from the sealing resin 50. When viewed in the thickness direction z, the rear surface 232 overlaps the semiconductor element 10. A plating layer containing tin or the like may be provided on the rear surface 232.

[0037] 1 and 2 , the multiple circumferential surfaces 233 face the opposite side to the first side surface 213 of the first lead 21 in the first direction x. The multiple circumferential surfaces 233 are connected to the mounting surface 231 and the back surface 232. The multiple circumferential surfaces 233 are arranged along the second direction y. As shown in FIG. 6 , the multiple circumferential surfaces 233 are exposed from the sealing resin 50.

[0038] As shown in FIG. 3 , the thin portion 234 has a canopy shape that protrudes from the back surface 232 in a direction perpendicular to the thickness direction z when viewed in the thickness direction z. A portion of the mounting surface 231 is included in the thin portion 234. As shown in FIG. 7 , the thin portion 234 includes an intermediate surface 234A and a pair of end surfaces 234B. The intermediate surface 234A faces the opposite side from the mounting surface 231 in the thickness direction z. The intermediate surface 234A is located between the mounting surface 231 and the back surface 232 in the thickness direction z. The intermediate surface 234A is in contact with the sealing resin 50. The pair of end surfaces 234B are connected to the mounting surface 231 and the intermediate surface 234A and face opposite sides in the second direction y. The pair of end surfaces 234B are located apart from each other in the second direction y. The pair of end surfaces 234B are exposed from the sealing resin 50. The area of ​​each of the pair of end faces 234B is smaller than the area of ​​each of the plurality of peripheral faces 233.

[0039] 9 , the bonding layer 29 is interposed between the mounting surface 231 of the die pad 23 and the second electrode 12 of the semiconductor element 10. The bonding layer 29 is in contact with the mounting surface 231 and the second electrode 12. The bonding layer 29 electrically connects the die pad 23 and the second electrode 12. This electrically connects the die pad 23 to the second electrode 12. The composition of the bonding layer 29 includes tin. The bonding layer 29 is solder.

[0040] The first conductive bonding layer 31 conductively bonds the first lead 21 and the conductive member 30. In FIG. 1 , the first conductive bonding layer 31 is indicated by a region with multiple diagonal lines. As shown in FIG. 10 , the first conductive bonding layer 31 includes a portion located between the first surface 301 of the conductive member 30 and the third surface 214 of the first lead 21. This portion is in contact with the first surface 301 and the third surface 214. Furthermore, the first conductive bonding layer 31 includes a portion located between the second surface 302 of the conductive member 30 and the fourth surface 215 of the first lead 21. This portion is in contact with the second surface 302 and the fourth surface 215. The composition of the first conductive bonding layer 31 includes tin. The first conductive bonding layer 31 is solder.

[0041] 10 , the maximum value of the first distance P1 from the first surface 301 of the conductive member 30 to the third surface 214 of the first lead 21 is smaller than the maximum value of the second distance P2 from the second surface 302 of the conductive member 30 to the fourth surface 215 of the first lead 21. As a result, the thickness of the portion of the first conductive bonding layer 31 located between the first surface 301 and the third surface 214 is thinner than the thickness of the portion of the first conductive bonding layer 31 located between the second surface 302 and the fourth surface 215.

[0042] The second conductive member 32 electrically connects the first electrode 11 of the semiconductor element 10 to the conductive member 30. In FIG. 1 , the second conductive member 32 is indicated by a region with multiple diagonal lines. As shown in FIG. 9 , the second conductive member 32 is interposed between the first electrode 11 and the bonding surface 303 of the conductive member 30. The second conductive member 32 is in contact with the first electrode 11 and the bonding surface 303. The composition of the second conductive member 32 includes tin. The second conductive member 32 is solder.

[0043] 1 , the wire 40 is electrically connected to the gate electrode 13 of the semiconductor element 10 and the second main surface 221 of the second lead 22. This electrically connects the second lead 22 to the gate electrode 13. The composition of the wire 40 includes gold. Alternatively, the composition of the wire 40 may include aluminum (Al) or copper.

[0044] 1 and 6 , the sealing resin 50 covers the semiconductor element 10, the conductive member 30, the wire 40, and portions of the first lead 21, the second lead 22, and the die pad 23. The sealing resin 50 has electrical insulation properties. The sealing resin 50 is made of a material containing, for example, black epoxy resin. The sealing resin 50 has a top surface 51, a bottom surface 52, a pair of first side surfaces 53, and a pair of second side surfaces 54.

[0045] 6 and 7, the top surface 51 faces the same side as the mounting surface 231 of the die pad 23 in the thickness direction z. As shown in Fig. 6 and 7, the bottom surface 52 faces the opposite side to the top surface 51 in the thickness direction z. As shown in Fig. 3, the first mounting surface 212 of the first lead 21, the second mounting surface 222 of the second lead 22, and the back surface 232 of the die pad 23 are exposed from the bottom surface 52.

[0046] 3 , 5 , and 6 , the pair of first side surfaces 53 face opposite each other in the first direction x and are spaced apart from each other in the first direction x. The pair of first side surfaces 53 are connected to the top surface 51 and the bottom surface 52. A plurality of first side surfaces 213 of the first lead 21 and a second side surface 223 of the second lead 22 are exposed from one of the pair of first side surfaces 53. A plurality of peripheral surfaces 233 of the die pad 23 are exposed from the other first side surface 53. The plurality of first side surfaces 213, the second side surfaces 223, and the plurality of peripheral surfaces 233 are flush with either of the pair of first side surfaces 53.

[0047] 3 , 4 , 7 , and 8 , the pair of second side surfaces 54 face opposite each other in the second direction y and are spaced apart from each other in the second direction y. The pair of second side surfaces 54 are connected to the top surface 51 and the bottom surface 52. A pair of end surfaces 234B of the die pad 23 are exposed from the pair of second side surfaces 54. An end surface 224B of the second lead 22 is exposed from one of the pair of second side surfaces 54. The pair of end surfaces 234B and the end surface 224B are flush with either of the pair of second side surfaces 54.

[0048] Next, a semiconductor device A11, which is a modification of the semiconductor device A10, will be described with reference to Fig. 11. The position in Fig. 11 is the same as the position in Fig. 10.

[0049] 11 , in the semiconductor device A11, the configurations of the first surface 301 of the conductive member 30 and the third surface 214 and fourth surface 215 of the first lead 21 differ from those of the semiconductor device A10. The first surface 301 and the third surface 214 are curved surfaces that are concave in opposite directions in the thickness direction z. The fourth surface 215 is curved in the first direction x. The fourth surface 215 is smoothly connected to the third surface 214. The third surface 214 and the fourth surface 215 each form part of a single curved surface provided on the first lead 21.

[0050] The first surface 301, the third surface 214, and the fourth surface 215 of the semiconductor device A11 are obtained by etching the lead frame that forms the base of the first lead 21 and the conductive member 30. On the other hand, the third surface 214 and the fourth surface 215 of the semiconductor device A10 are obtained by pressing the lead frame that forms the base of the first lead 21.

[0051] Next, the effects of the semiconductor device A10 will be described.

[0052] The semiconductor device A10 includes a first lead 21, a conductive member 30 that electrically connects the first lead 21 and a first electrode 11 of the semiconductor element 10, and a first conductive bonding layer 31 that electrically connects the first lead 21 and the conductive member 30. The conductive member 30 has a first surface 301 that faces the first lead 21 in the thickness direction z and a second surface 302 that faces the first lead 21 in the first direction x. The first lead 21 has a third surface 214 that faces the first surface 301 and a fourth surface 215 that faces the second surface 302. The first conductive bonding layer 31 is in contact with the first surface 301 and the third surface 214. With this configuration, when the conductive member 30 is conductively joined to the first lead 21 via the first conductive bonding layer 31, if the conductive member 30 attempts to shift in the first direction x, the second surface 302 comes into contact with the fourth surface 215, or the first conductive bonding layer 31 is sandwiched between the second surface 302 and the fourth surface 215. This restricts the displacement of the conductive member 30 in the first direction x, thereby suppressing misalignment of the conductive member 30 in the first direction x relative to the first electrode 11. Therefore, with the semiconductor device A10, it is possible to suppress misalignment of the conductive member 30 relative to the electrode (first electrode 11) of the semiconductor element 10.

[0053] The first conductive bonding layer 31 is also in contact with the second surface 302 of the conductive member 30 and the fourth surface 215 of the first lead 21. This increases the bonding area of ​​the conductive member 30 to the first lead 21. Therefore, the bonding strength of the conductive member 30 to the first lead 21 can be improved.

[0054] The maximum value of the first distance P1 from the first surface 301 of the conductive member 30 to the third surface 214 of the first lead 21 is smaller than the maximum value of the second distance P2 from the second surface 302 of the conductive member 30 to the fourth surface 215 of the first lead 21. This configuration reflects the fact that a relatively large compressive stress acts on a portion of the first conductive bonding layer 31 located between the first surface 301 and the third surface 214 when the conductive member 30 is conductively bonded to the first lead 21 via the first conductive bonding layer 31. This improves the bonding strength of the conductive member 30 to the first lead 21. Furthermore, this configuration reflects the fact that a relatively large reaction force is applied to the second surface 302 of the melted first conductive bonding layer 31 when the conductive member 30 attempts to shift in the first direction x when the conductive member 30 is conductively bonded to the first lead 21 via the first conductive bonding layer 31. This more effectively suppresses misalignment of the conductive member 30 with respect to the first electrode 11 of the semiconductor element 10 in the first direction x.

[0055] In the semiconductor device A11, the first surface 301 of the conductive member 30 is a curved surface that is concave in the thickness direction z. This configuration increases the contact area of ​​the conductive member 30 with the first conductive bonding layer 31. Furthermore, an anchoring effect due to the first surface 301 occurs in the first conductive bonding layer 31. This further improves the bonding strength of the conductive member 30 with the first lead 21.

[0056] The first conductive bonding layer 31 is in contact with the first main surface 211 of the first lead 21. This configuration manifests itself as the first conductive bonding layer 31 filling the gaps between the first surface 301 and the second surface 302 of the conductive member 30 and the third surface 214 and the fourth surface 215 of the first lead 21. This reliably improves the bonding strength of the conductive member 30 to the first lead 21.

[0057] The first lead 21 has a first mounting surface 212 facing the opposite side to the third surface 214 in the thickness direction z. As viewed in the thickness direction z, the third surface 214 overlaps the first mounting surface 212. With this configuration, when the conductive member 30 is conductively joined to the first lead 21 via the first conductive bonding layer 31, the entire first mounting surface 212 is supported by a workpiece. When a compressive force acts from the conductive member 30 on the third surface 214, a reaction force from the workpiece acts on the first mounting surface 212. This makes it possible to suppress bending of the first lead 21.

[0058] The compositions of the first conductive bonding layer 31, the second conductive member 32, and the bonding layer 29 contain tin, which allows the semiconductor element 10 to be bonded to the die pad 23 in the step of conductively bonding the conductive member 30 to the first lead 21 and the first electrode 11 of the semiconductor element 10.

[0059] The first lead 21 has a first side surface 213 facing the opposite side to the side on which the semiconductor element 10 is located in the first direction x. The first side surface 213 is exposed from the sealing resin 50. With this configuration, when the semiconductor device A10 is mounted on a wiring board, solder adheres to the first mounting surface 212 and the first side surface 213 of the first lead 21. This forms a solder fillet that covers the first side surface 213. Therefore, the mounting strength of the semiconductor device A10 on the wiring board can be improved.

[0060] The back surface 232 of the die pad 23 is exposed from the sealing resin 50. This can improve the heat dissipation performance of the semiconductor device A10.

[0061] The conductive member 30 contains copper, which reduces the electrical resistance of the conductive member 30 compared to a wire containing aluminum in its composition. This is advantageous for passing a larger current through the semiconductor element 10.

[0062] A semiconductor device A20 according to a second embodiment of the present disclosure will be described with reference to Figures 12 to 15. In these figures, elements that are the same as or similar to those in the semiconductor device A10 described above are given the same reference numerals, and duplicated descriptions will be omitted. For ease of understanding, Figure 12 shows a view through the sealing resin 50.

[0063] The semiconductor device A20 differs from the semiconductor device A10 described above in the configuration of the first lead 21 and the conductive member 30.

[0064] 12 , 13 , and 15 , in the semiconductor device A20, the first lead 21 does not have a first main surface 211. The third surface 214 of the first lead 21 is connected to the plurality of first side surfaces 213. The fourth surface 215 of the first lead 21 is located between the first mounting surface 212 and the third surface 214 in the thickness direction z. The fourth surface 215 is connected to the first mounting surface 212.

[0065] 15 , the first surface 301 of the conductive member 30 is located closer to the third surface 214 of the first lead 21 in the thickness direction z than the second surface 302. The first surface 301 is located farther from the semiconductor element 10 in the first direction x than the second surface 302. A notch defined by the first surface 301 and the second surface 302 is formed in the conductive member 30.

[0066] Next, the effects of the semiconductor device A20 will be described.

[0067] The semiconductor device A20 includes a first lead 21, a conductive member 30 that electrically connects the first lead 21 to a first electrode 11 of a semiconductor element 10, and a first conductive bonding layer 31 that electrically connects the first lead 21 to the conductive member 30. The conductive member 30 has a first surface 301 that faces the first lead 21 in the thickness direction z and a second surface 302 that faces the first lead 21 in the first direction x. The first lead 21 has a third surface 214 that faces the first surface 301 and a fourth surface 215 that faces the second surface 302. The first conductive bonding layer 31 is in contact with the first surface 301 and the third surface 214. Therefore, the semiconductor device A20 also makes it possible to suppress misalignment of the conductive member 30 with respect to the electrode (first electrode 11) of the semiconductor element 10. Furthermore, since the semiconductor device A20 has the same configuration as the semiconductor device A10, the semiconductor device A20 also achieves the same effects as those of the configuration.

[0068] By adopting the configuration of the semiconductor device A20, the dimension of the first lead 21 in the first direction x can be reduced compared to the semiconductor device A10. This makes it possible to increase the distance in the first direction x between the first lead 21 and the die pad 23. Therefore, when forming the sealing resin 50, it is possible to increase the density of the resin filled between the first lead 21 and the die pad 23 in the first direction x.

[0069] A semiconductor device A30 according to a third embodiment of the present disclosure will be described with reference to Figures 16 to 18. In these figures, elements that are the same as or similar to those in the semiconductor device A10 described above are given the same reference numerals, and duplicated descriptions will be omitted. For ease of understanding, Figure 16 shows a view through the sealing resin 50.

[0070] The semiconductor device A20 differs from the semiconductor device A10 described above in the configurations of the conductive member 30 and the first conductive bonding layer 31.

[0071] 16 and 18 , the conductive member 30 has a restricting surface 305. The restricting surface 305 faces the same side as the second surface 302 in the first direction x. The restricting surface 305 is located on the opposite side of the second surface 302 in the thickness direction z, with the first surface 301 sandwiched therebetween. The restricting surface 305 is located on the opposite side of the second surface 302 in the first direction x, with the first surface 301 sandwiched therebetween. The restricting surface 305 is located on a side closer to the semiconductor element 10 in the first direction x than the second surface 302. A notch defined by the first surface 301 and the restricting surface 305 is formed in the conductive member 30.

[0072] 16 and 18 , the restricting surface 305 of the conductive member 30 faces the fifth surface 216 of the first lead 21. A part of the first conductive bonding layer 31 is located between the fifth surface 216 and the restricting surface 305. The first conductive bonding layer 31 is in contact with the fifth surface 216 and the restricting surface 305.

[0073] Next, a semiconductor device A31, which is a modification of the semiconductor device A30, will be described with reference to Fig. 19. The position in Fig. 19 is the same as the position in Fig. 18.

[0074] 19 , in the semiconductor device A31, the conductive member 30 has an opposing surface 306 instead of the restricting surface 305. The opposing surface 306 faces the same side as the first surface 301 in the thickness direction z. The opposing surface 306 is located on the opposite side from the first surface 301 in the thickness direction z, with the second surface 302 sandwiched therebetween. The opposing surface 306 is located on the opposite side from the first surface 301 in the first direction x, with the second surface 302 sandwiched therebetween. The opposing surface 306 is located on a side farther from the semiconductor element 10 in the first direction x than the first surface 301. A notch defined by the second surface 302 and the opposing surface 306 is formed in the conductive member 30.

[0075] 19 , the opposing surface 306 of the conductive member 30 faces the first main surface 211 of the first lead 21. A part of the first conductive bonding layer 31 is located between the first main surface 211 and the opposing surface 306. The first conductive bonding layer 31 is in contact with the opposing surface 306.

[0076] Next, the effects of the semiconductor device A30 will be described.

[0077] The semiconductor device A30 includes a first lead 21, a conductive member 30 that electrically connects the first lead 21 to a first electrode 11 of a semiconductor element 10, and a first conductive bonding layer 31 that electrically connects the first lead 21 to the conductive member 30. The conductive member 30 has a first surface 301 that faces the first lead 21 in the thickness direction z and a second surface 302 that faces the first lead 21 in the first direction x. The first lead 21 has a third surface 214 that faces the first surface 301 and a fourth surface 215 that faces the second surface 302. The first conductive bonding layer 31 is in contact with the first surface 301 and the third surface 214. Therefore, the semiconductor device A30 also makes it possible to suppress misalignment of the conductive member 30 with respect to the electrode (first electrode 11) of the semiconductor element 10. Furthermore, since the semiconductor device A30 has the same configuration as the semiconductor device A10, the semiconductor device A30 also achieves the effects of the configuration.

[0078] In the semiconductor device A30, the conductive member 30 has a restricting surface 305 facing the fifth surface 216 of the first lead 21. With this configuration, when the conductive member 30 is conductively joined to the first lead 21 via the first conductive bonding layer 31, if the conductive member 30 attempts to shift in the first direction x, the restricting surface 305 comes into contact with the fifth surface 216, or the first conductive bonding layer 31 is sandwiched between the restricting surface 305 and the fifth surface 216. As a result, displacement of the conductive member 30 in the first direction x is restricted by both the second surface 302 and the restricting surface 305, so that positional shift of the conductive member 30 in the first direction x with respect to the first electrode 11 of the semiconductor element 10 can be effectively suppressed. In this case, if a portion of the first conductive bonding layer 31 is located between the fifth surface 216 and the restricting surface 305 and is in contact with the fifth surface 216 and the restricting surface 305, the bonding area of ​​the conductive member 30 to the first lead 21 is increased, thereby improving the bonding strength of the conductive member 30 to the first lead 21.

[0079] In the semiconductor device A31, the conductive member 30 has an opposing surface 306 that faces the first main surface 211 of the first lead 21. The first conductive bonding layer 31 is in contact with the first main surface 211 and the opposing surface 306. With this configuration, when the conductive member 30 is conductively bonded to the first lead 21 via the first conductive bonding layer 31, the reaction force in the thickness direction z that acts from the first lead 21 to the conductive member 30 via the first conductive bonding layer 31 increases. This increases the bonding area of ​​the conductive member 30 to the first lead 21 while increasing the compressive stress in the thickness direction z that acts on the first conductive bonding layer 31, thereby improving the bonding strength of the conductive member 30 to the first lead 21.

[0080] 20 to 22, a semiconductor device A40 according to a fourth embodiment of the present disclosure will be described. In these figures, elements that are the same as or similar to those in the semiconductor device A10 described above are given the same reference numerals, and duplicated explanations will be omitted. For ease of understanding, FIG. 20 shows a view through the sealing resin 50.

[0081] The semiconductor device A40 differs from the semiconductor device A10 described above in the configuration of the first lead 21 and the conductive member 30.

[0082] 20 to 22 , in the semiconductor device A40, the first lead 21 does not have a fifth surface 216. The fourth surface 215 of the first lead 21 faces the side opposite to the side on which the semiconductor element 10 is located in the first direction x. The third surface 214 of the first lead 21 is located between the fourth surface 215 and the multiple first side surfaces 213 in the first direction x. The first main surface 211 of the first lead 21 is located closer to the semiconductor element 10 in the first direction x than the third surface 214.

[0083] As shown in FIGS. 20 and 21 , the conductive member 30 straddles the first main surface 211 of the first lead 21 .

[0084] Next, the effects of the semiconductor device A40 will be described.

[0085] The semiconductor device A40 includes a first lead 21, a conductive member 30 that electrically connects the first lead 21 to a first electrode 11 of a semiconductor element 10, and a first conductive bonding layer 31 that electrically connects the first lead 21 to the conductive member 30. The conductive member 30 has a first surface 301 that faces the first lead 21 in the thickness direction z and a second surface 302 that faces the first lead 21 in the first direction x. The first lead 21 has a third surface 214 that faces the first surface 301 and a fourth surface 215 that faces the second surface 302. The first conductive bonding layer 31 is in contact with the first surface 301 and the third surface 214. Therefore, the semiconductor device A40 also makes it possible to suppress misalignment of the conductive member 30 with respect to the electrode (first electrode 11) of the semiconductor element 10. Furthermore, since the semiconductor device A40 has the same configuration as the semiconductor device A10, the semiconductor device A40 also achieves the same effects as those of the configuration.

[0086] The present disclosure is not limited to the above-described embodiment, and the specific configuration of each part of the present disclosure can be freely modified in various ways.

[0087] The present disclosure includes embodiments described in the following appendices. Appendix 1. A semiconductor device comprising: a first lead; a semiconductor element having a first electrode; a conductive member that electrically connects the first lead and the first electrode; a first conductive bonding layer that electrically connects the first lead and the conductive member; and a second conductive bonding layer that electrically connects the first electrode and the conductive member, wherein the conductive member has a first surface that faces the first lead in a thickness direction of the semiconductor element and a second surface that faces the first lead in a first direction orthogonal to the thickness direction, the first lead has a third surface that faces the first surface and a fourth surface that faces the second surface, and the first conductive bonding layer is in contact with the first surface and the third surface. Appendix 2. The semiconductor device described in Appendix 1, wherein the third surface faces the same side as an outward surface of the first electrode in the thickness direction. Appendix 3. The semiconductor device according to Supplementary Note 2, wherein the first conductive junction layer is in contact with the second surface and the fourth surface. Supplementary Note 4. The semiconductor device according to Supplementary Note 3, wherein the first surface is a curved surface concave in the thickness direction. Supplementary Note 5. The semiconductor device according to Supplementary Note 3 or 4, wherein a maximum value of a first distance from the first surface to the third surface is smaller than a maximum value of a second distance from the second surface to the fourth surface. Supplementary Note 6. The semiconductor device according to any of Supplementary Notes 3 to 5, wherein the first lead has a first main surface facing the same side as the third surface in the thickness direction, and the first main surface is located on the opposite side to the third surface in the thickness direction, with the fourth surface sandwiched therebetween. Supplementary Note 7. The semiconductor device according to Supplementary Note 6, wherein the fourth surface faces a side on which the semiconductor element is located in the first direction. Supplementary Note 8. The semiconductor device according to Supplementary Note 7, wherein the first conductive junction layer is in contact with the first main surface. Supplementary Note 9. 7. The semiconductor device according to claim 6, wherein the fourth surface faces a side opposite to a side on which the semiconductor element is located in the first direction, and the conductive member straddles the first main surface.Appendix 10. The semiconductor device according to Appendix 7 or 8, wherein the first lead has a first mounting surface facing the opposite side to the third surface in the thickness direction and a fifth surface facing the same side as the fourth surface in the first direction, wherein the third surface overlaps the first mounting surface as viewed in the thickness direction, and the fifth surface is located between the first mounting surface and the third surface in the thickness direction and is located on the opposite side to the fourth surface in the first direction, with the third surface sandwiched between them. Appendix 11. The semiconductor device according to Appendix 10, wherein the conductive member has a restricting surface facing the fifth surface. Appendix 12. The semiconductor device according to Appendix 11, wherein a portion of the first conductive bonding layer is located between the fifth surface and the restricting surface. Appendix 13. The semiconductor device according to any of Appendixes 10 to 12, wherein the first conductive bonding layer and the second conductive bonding layer contain tin. Appendix 14. Appendix 13: The semiconductor device according to Appendix 13, further comprising: a die pad located away from the first lead; and a bonding layer that bonds the die pad and the semiconductor element, the bonding layer containing tin. Appendix 15: The semiconductor device according to Appendix 14, wherein the semiconductor element has a second electrode located on the opposite side to the first electrode in the thickness direction, and the bonding layer is in contact with the second electrode. Appendix 16: The semiconductor device according to Appendix 15, further comprising: a second lead located away from the first lead in a second direction orthogonal to the thickness direction and the first direction, the semiconductor element has a gate electrode located on the same side as the first electrode in the thickness direction, and the second lead is electrically connected to the gate electrode. Appendix 17: The semiconductor device according to any one of appendices 14 to 16, further comprising a sealing resin that covers the semiconductor element and the conductive member, and a portion of each of the first lead and the die pad, wherein the die pad has a back surface facing the opposite side to the side on which the semiconductor element is located in the thickness direction, and the first mounting surface and the back surface are exposed from the sealing resin.Appendix 18. The semiconductor device according to appendix 17, wherein the first lead has a first side surface facing the opposite side to the side on which the semiconductor element is located in the first direction, and the first side surface is exposed from the sealing resin.

[0088] A10, A20, A30, A40: semiconductor device 10: semiconductor element 11: first electrode 12: second electrode 13: gate electrode 21: first lead 211: first main surface 212: first mounting surface 213: first side surface 214: third surface 215: fourth surface 216: fifth surface 217: recess 22: second lead 221: second main surface 222: second mounting surface 223: second side surface 224: thin portion 224A: intermediate surface 224B: end surface 23: die pad 231: mounting surface 232: back surface 233: peripheral surface 234: thin portion 234A: intermediate surface 234B: end surface 29: bonding layer 30: conductive member 301: first surface 302: second surface 303: Bonding surface 304: Inclined surface 305: Restricting surface 306: Opposing surface 31: First conductive member 32: Second conductive member 40: Wire 50: Sealing resin 51: Top surface 52: Bottom surface 53: First side surface 54: Second side surface P1: First gap P2: Second gap z: Thickness direction x: First direction y: Second direction

Claims

1. The first lead; A semiconductor element having a first electrode; a conductive member that electrically connects the first lead and the first electrode; a first conductive joining layer that conductively joins the first lead and the conductive member; a second conductive joining layer that conductively joins the first electrode and the conductive member, the conductive member has a first surface facing the first lead in a thickness direction of the semiconductor element and a second surface facing the first lead in a first direction perpendicular to the thickness direction, the first lead has a third surface opposite the first surface and a fourth surface opposite the second surface; The first conductive junction layer is in contact with the first surface and the third surface.

2. The semiconductor device according to claim 1 , wherein the third surface faces the same side as an outer surface of the first electrode in the thickness direction.

3. The semiconductor device according to claim 2 , wherein the first conductive junction layer is in contact with the second surface and the fourth surface.

4. The semiconductor device according to claim 3 , wherein the first surface is a curved surface recessed in the thickness direction.

5. 4. The semiconductor device according to claim 3, wherein a maximum value of a first distance from said first surface to said third surface is smaller than a maximum value of a second distance from said second surface to said fourth surface.

6. the first lead has a first main surface facing the same side as the third surface in the thickness direction; 6. The semiconductor device according to claim 3, wherein the first main surface is located on the opposite side to the third surface in the thickness direction with the fourth surface therebetween.

7. The semiconductor device according to claim 6 , wherein the fourth surface faces a side on which the semiconductor element is located in the first direction.

8. The semiconductor device according to claim 7 , wherein the first conductive junction layer is in contact with the first main surface.

9. the fourth surface faces a side opposite to a side on which the semiconductor element is located in the first direction; The semiconductor device according to claim 6 , wherein the conductive member straddles the first main surface.

10. the first lead has a first mounting surface facing a side opposite to the third surface in the thickness direction, and a fifth surface facing the same side as the fourth surface in the first direction, When viewed in the thickness direction, the third surface overlaps the first mounting surface, 8. The semiconductor device according to claim 7, wherein the fifth surface is located between the first mounting surface and the third surface in the thickness direction, and is located on the opposite side to the fourth surface in the first direction, with the third surface therebetween.

11. The semiconductor device according to claim 10 , wherein the conductive member has a restriction surface facing the fifth surface.

12. The semiconductor device according to claim 11 , wherein a portion of the first conductive junction layer is located between the fifth surface and the regulation surface.

13. The semiconductor device according to claim 10 , wherein the first conductive junction layer and the second conductive junction layer contain tin.

14. a die pad located away from the first lead; a bonding layer that bonds the die pad and the semiconductor element, The semiconductor device according to claim 13 , wherein the bonding layer contains tin.

15. the semiconductor element has a second electrode located on an opposite side to the first electrode in the thickness direction; The semiconductor device according to claim 14 , wherein the bonding layer is in contact with the second electrode.

16. a second lead located away from the first lead in a second direction perpendicular to the thickness direction and the first direction; the semiconductor element has a gate electrode located on the same side as the first electrode in the thickness direction; The semiconductor device according to claim 15 , wherein the second lead is electrically connected to the gate electrode.

17. a sealing resin that covers the semiconductor element, the conductive member, the first lead, and a portion of the die pad; the die pad has a back surface facing a side opposite to a side on which the semiconductor element is located in the thickness direction, The semiconductor device according to claim 14 , wherein the first mounting surface and the back surface are exposed from the sealing resin.

18. the first lead has a first side surface facing a side opposite to a side on which the semiconductor element is located in the first direction; The semiconductor device according to claim 17 , wherein the first side surface is exposed from the sealing resin.