Method for manufacturing a display device
Patent Information
- Application Number
- JP2023542022
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Priority Date
- 2021-09-17
- Filing Date
- 2022-08-08
- Publication Date
- 2025-08-06
AI Technical Summary
Current display device manufacturing methods face challenges in achieving high-definition, high-resolution, and highly reliable displays, particularly due to inaccuracies with metal masks that lead to low yield and reliability issues during the processing of light-emitting layers.
The method involves forming light-emitting layers using a photolithography process without a shadow mask, with a sacrificial mask layer to protect the light-emitting layer and reduce damage, and using insulating layers to prevent short-circuiting and improve heat resistance, allowing for precise island-shaped light-emitting layer formation and high aperture ratios.
This approach enables the production of high-definition display devices with improved reliability, increased aperture ratios, and enhanced manufacturing yield by reducing damage to the light-emitting layers and allowing for tighter spacing between subpixels, resulting in vivid, high-contrast displays with extended lifespan.
Abstract
Description
Display device manufacturing method, display device, display module, and electronic device
[0001] 1. Field of the Invention One embodiment of the present invention relates to a display device, a display module, and an electronic device. 2. Description of the Related Art One embodiment of the present invention relates to a manufacturing method of a display device.
[0002] One embodiment of the present invention is not limited to the above technical field, and examples of the technical field of one embodiment of the present invention include semiconductor devices, display devices, light-emitting devices, power storage devices, memory devices, electronic devices, lighting devices, input devices (e.g., touch sensors), input / output devices (e.g., touch panels), driving methods thereof, and manufacturing methods thereof.
[0003] In recent years, display devices have been expected to be used in a variety of applications. For example, applications of large display devices include home television devices (also called televisions or television receivers), digital signage, and public information displays (PIDs). In addition, development of mobile information terminals, such as smartphones and tablet terminals equipped with touch panels, is progressing.
[0004] There is also a demand for higher definition display devices. Devices requiring high-definition display devices, such as devices for virtual reality (VR), augmented reality (AR), substitutional reality (SR), and mixed reality (MR), are being actively developed.
[0005] As a display device, for example, a light-emitting device having a light-emitting device (also referred to as a light-emitting element) has been developed. A light-emitting device (also referred to as an EL device or an EL element) utilizing an electroluminescence (hereinafter referred to as EL) phenomenon has features such as being easily thin and lightweight, being capable of high-speed response to an input signal, and being capable of being driven by a DC constant voltage power supply, and is therefore applied to a display device.
[0006] Patent Document 1 discloses a display device for VR that uses an organic EL device (also called an organic EL element).
[0007] International Publication No. 2018 / 087625
[0008] An object of one embodiment of the present invention is to provide a display device with high display quality.An object of one embodiment of the present invention is to provide a high-resolution display device.An object of one embodiment of the present invention is to provide a highly reliable display device.
[0009] An object of one embodiment of the present invention is to provide a method for manufacturing a high-resolution display device.An object of one embodiment of the present invention is to provide a method for manufacturing a high-resolution display device.An object of one embodiment of the present invention is to provide a method for manufacturing a highly reliable display device.An object of one embodiment of the present invention is to provide a method for manufacturing a display device with high yield.
[0010] Note that the description of these problems does not preclude the existence of other problems. One embodiment of the present invention does not necessarily have to solve all of these problems. Problems other than these can be extracted from the description in the specification, drawings, and claims.
[0011] One embodiment of the present invention includes forming a first pixel electrode and a first conductive layer, forming a first film on the first pixel electrode, forming a first mask film on the first film and the first conductive layer, processing the first film and the first mask film to form a first layer and a first mask layer on the first pixel electrode, forming a second mask layer on the first conductive layer, forming a first insulating film on the first mask layer and the second mask layer, forming a second insulating film on the first insulating film using a photosensitive resin composition, exposing and developing the second insulating film to expose a portion of the first insulating film that overlaps with the second mask layer, performing a first etching treatment using the second insulating film as a mask to remove a portion of the first insulating film that overlaps with the second mask layer, and thinning a thickness of a part of the second mask layer, and forming a second insulating film. a first insulating layer that overlaps with the first mask layer by exposing and developing the film, forming a second insulating layer that covers an edge of the first layer; a second etching process using the second insulating layer as a mask to remove the portion of the first insulating layer that overlaps with the first mask layer; forming a first insulating layer that overlaps with the second insulating layer; thinning a portion of the first mask layer; performing a heat treatment; and then performing a third etching process using the second insulating layer as a mask to remove a portion of the first mask layer and expose an upper surface of the first layer. A common electrode is formed by covering the first layer, the first conductive layer, and the second insulating layer.
[0012] Another embodiment of the present invention is a method for forming a first pixel electrode, a second pixel electrode, and a first conductive layer, forming a first film over the first pixel electrode and the second pixel electrode, forming a first mask film over the first film and the first conductive layer, processing the first film and the first mask film to form the first layer and the first mask layer over the first pixel electrode, forming a second mask layer over the first conductive layer, and exposing the second pixel electrode, forming a second film over the first mask layer and the second pixel electrode, forming the second mask film over the second film, and forming the second film and and processing the second mask film to form a second layer and a third mask layer on the second pixel electrode, and exposing the first mask layer and the second mask layer; forming a first insulating film on the first to third mask layers; forming a second insulating film on the first insulating film using a photosensitive resin composition; exposing and developing the second insulating film to expose a portion of the first insulating film that overlaps with the second mask layer; and performing a first etching process using the second insulating film as a mask to expose a portion of the first insulating film that overlaps with the second mask layer. a second insulating film is exposed and developed to expose the portions of the first insulating film that overlap with the first mask layer and the portions that overlap with the third mask layer, thereby forming a second insulating layer that overlaps with a region sandwiched between the first pixel electrode and the second pixel electrode; a second etching process is performed using the second insulating layer as a mask to remove the portions of the first insulating film that overlap with the first mask layer and the portions that overlap with the third mask layer, thereby forming a first insulating layer that overlaps with the second insulating layer; This is a method for manufacturing a display device, which includes: thinning the film thickness of a part of a first mask layer and a part of a third mask layer; performing a heat treatment; then performing a third etching treatment using a second insulating layer as a mask to remove a part of the first mask layer and a part of the third mask layer and expose the top surface of the first layer and the top surface of the second layer; covering the first layer, the second layer, the first conductive layer, and the second insulating layer to form a common electrode; and removing a part of the second mask layer and exposing the top surface of the first conductive layer by the second etching treatment or the third etching treatment.
[0013] The first layer preferably has at least a first light-emitting layer.
[0014] The first layer preferably has a first functional layer on a first light-emitting layer, and the first functional layer preferably has at least one of a hole injection layer, an electron injection layer, a hole transport layer, an electron transport layer, a hole blocking layer, and an electron blocking layer.
[0015] It is preferable that the first mask film, the second mask film, and the first insulating film are each formed of an aluminum oxide film by ALD.
[0016] Another embodiment of the present invention provides a light-emitting device including a first light-emitting device, a second light-emitting device, a first lens, a second lens, a first insulating layer, and a second insulating layer. The first light-emitting device includes a first pixel electrode, a first light-emitting layer over the first pixel electrode, and a common electrode over the first light-emitting layer. The second light-emitting device includes a second pixel electrode, a second light-emitting layer over the second pixel electrode, and a common electrode over the second light-emitting layer. The first lens overlaps with the first light-emitting device. the second lens overlaps the second light-emitting device; the first insulating layer covers a portion of the top surface and a side surface of the first light-emitting layer and a portion of the top surface and a side surface of the second light-emitting layer; the second insulating layer overlaps a portion of the top surface and a side surface of the first light-emitting layer and a portion of the top surface and a side surface of the second light-emitting layer via the first insulating layer; the common electrode covers the second insulating layer; and an end of the second insulating layer has a tapered shape with a taper angle of less than 90° in a cross-sectional view.
[0017] The second insulating layer preferably covers at least a part of the side surface of the end of the first insulating layer.
[0018] The first light-emitting device preferably has a first functional layer between the first light-emitting layer and the common electrode, and the first functional layer preferably has at least one of a hole injection layer, an electron injection layer, a hole transport layer, an electron transport layer, a hole blocking layer, and an electron blocking layer.
[0019] Another embodiment of the present invention is a display module including a display device having any of the above structures, such as a display module to which a connector such as a flexible printed circuit (hereinafter referred to as FPC) or a tape carrier package (TCP) is attached, or a display module to which an integrated circuit (IC) is mounted by a chip-on-glass (COG) method, a chip-on-film (COF) method, or the like.
[0020] Another embodiment of the present invention is an electronic device including the above-described display module and at least one of a housing, a battery, a camera, a speaker, and a microphone.
[0021] According to one embodiment of the present invention, a display device with high display quality can be provided. According to one embodiment of the present invention, a high-definition display device can be provided. According to one embodiment of the present invention, a high-resolution display device can be provided. According to one embodiment of the present invention, a highly reliable display device can be provided.
[0022] According to one embodiment of the present invention, a method for manufacturing a high-resolution display device can be provided. According to one embodiment of the present invention, a method for manufacturing a high-resolution display device can be provided. According to one embodiment of the present invention, a method for manufacturing a highly reliable display device can be provided. According to one embodiment of the present invention, a method for manufacturing a display device with high yield can be provided.
[0023] Note that the description of these effects does not preclude the existence of other effects. One embodiment of the present invention does not necessarily have all of these effects. Effects other than these can be extracted from the description in the specification, drawings, and claims.
[0024] FIG. 1A is a top view showing an example of a display device. FIG. 1B is a cross-sectional view showing an example of a display device. FIG. 1C is a top view showing an example of a first layer. FIGS. 2A and 2B are cross-sectional views showing an example of a display device. FIGS. 3A and 3B are cross-sectional views showing an example of a display device. FIGS. 4A and 4B are cross-sectional views showing an example of a display device. FIGS. 5A and 5B are cross-sectional views showing an example of a display device. FIGS. 6A and 6B are cross-sectional views showing an example of a display device. FIGS. 7A and 7B are cross-sectional views showing an example of a display device. FIG. 8A is a cross-sectional view showing an example of a display device. FIGS. 8B and 8C are cross-sectional views showing an example of a pixel electrode. FIGS. 9A to 9C are cross-sectional views showing an example of a display device. FIGS. 10A and 10B are cross-sectional views showing an example of a display device. FIG. 11A is a top view showing an example of a display device. FIG. 11B is a cross-sectional view showing an example of a display device. FIGS. 12A to 12C are cross-sectional views showing an example of a manufacturing method of a display device. FIGS. 13A to 13C are cross-sectional views showing an example of a manufacturing method of a display device. 14A to 14C are cross-sectional views showing an example of a method for manufacturing a display device. FIGS. 15A to 15C are cross-sectional views showing an example of a method for manufacturing a display device. FIGS. 16A to 16C are cross-sectional views showing an example of a method for manufacturing a display device. FIGS. 17A to 17C are cross-sectional views showing an example of a method for manufacturing a display device. FIGS. 18A to 18C are cross-sectional views showing an example of a method for manufacturing a display device. FIGS. 19A and 19B are cross-sectional views showing an example of a method for manufacturing a display device. FIGS. 20A and 20B are cross-sectional views showing an example of a method for manufacturing a display device. FIGS. 21A to 21D are cross-sectional views showing an example of a method for manufacturing a display device. FIGS. 22A to 22F are views showing an example of a pixel. FIGS. 23A to 23K are views showing an example of a pixel. FIGS. 24A and 24B are perspective views showing an example of a display device. FIGS. 25A to 25C are cross-sectional views showing an example of a display device. FIG. 26 is a cross-sectional view showing an example of a display device. FIG. 27 is a cross-sectional view showing an example of a display device. FIG. 28 is a cross-sectional view showing an example of a display device. Fig. 29 is a cross-sectional view showing an example of a display device, Fig. 30 is a cross-sectional view showing an example of a display device, and Fig. 31 is a perspective view showing an example of a display device.FIG. 32A is a cross-sectional view showing an example of a display device. FIGS. 32B and 32C are cross-sectional views showing an example of a transistor. FIGS. 33A to 33D are cross-sectional views showing an example of a display device. FIG. 34 is a cross-sectional view showing an example of a display device. FIGS. 35A to 35F are diagrams showing an example of a configuration of a light-emitting device. FIGS. 36A and 36B are diagrams showing an example of a configuration of a light-receiving device. FIGS. 36C to 36E are diagrams showing an example of a configuration of a display device. FIGS. 37A to 37D are diagrams showing an example of an electronic device. FIGS. 38A to 38F are diagrams showing an example of an electronic device. FIGS. 39A to 39G are diagrams showing an example of an electronic device. FIG. 40 is a diagram showing the results of Example 1. FIGS. 41A to 41D are photographs of light emission from the display device of Example 2. FIGS. 42A to 42D are photographs of light emission from the display device of Example 2. FIG. 43 is a circuit diagram of a pixel circuit of a display device of Example 3. FIGS. 44A and 44B are photographs of light emission from the display device of Example 3. Fig. 45 is a diagram showing the results of a reliability test on the light-emitting device of Example 4. Fig. 46 is a diagram showing the results of a reliability test on the light-emitting device of Example 4. Fig. 47 is a diagram showing the results of a reliability test on the light-emitting device of Example 4. Fig. 48 is a diagram showing the results of a reliability test on the light-emitting device of Example 4.
[0025] The embodiments will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and it will be readily understood by those skilled in the art that various changes can be made in form and detail without departing from the spirit and scope of the present invention. Therefore, the present invention should not be interpreted as being limited to the description of the embodiments shown below.
[0026] In the configuration of the invention described below, the same parts or parts having similar functions are denoted by the same reference numerals in different drawings, and repeated explanations thereof will be omitted. Furthermore, when referring to similar functions, the same hatching pattern may be used and no particular reference numeral may be assigned.
[0027] Furthermore, for ease of understanding, the position, size, range, etc. of each component shown in the drawings may not represent the actual position, size, range, etc. Therefore, the disclosed invention is not necessarily limited to the position, size, range, etc. disclosed in the drawings.
[0028] The terms "film" and "layer" can be interchangeable depending on the circumstances. For example, the term "conductive layer" can be changed to the term "conductive film." Or, for example, the term "insulating film" can be changed to the term "insulating layer."
[0029] In this specification, etc., a device fabricated using a metal mask or an FMM (fine metal mask, high-resolution metal mask) may be referred to as a device with an MM (metal mask) structure. Also, in this specification, etc., a device fabricated without using a metal mask or an FMM may be referred to as a device with an MML (metal maskless) structure.
[0030] In this specification and the like, holes or electrons may be referred to as "carriers." Specifically, a hole injection layer or an electron injection layer may be referred to as a "carrier injection layer," a hole transport layer or an electron transport layer may be referred to as a "carrier transport layer," and a hole block layer or an electron block layer may be referred to as a "carrier block layer." Note that the above-mentioned carrier injection layer, carrier transport layer, and carrier block layer may not be clearly distinguishable from each other depending on their cross-sectional shapes or characteristics. Furthermore, one layer may have two or three functions among the carrier injection layer, carrier transport layer, and carrier block layer.
[0031] In this specification and the like, a light-emitting device (also referred to as a light-emitting element) has an EL layer between a pair of electrodes. The EL layer has at least a light-emitting layer. Here, examples of layers (also referred to as functional layers) included in the EL layer include a light-emitting layer, a carrier injection layer (a hole injection layer and an electron injection layer), a carrier transport layer (a hole transport layer and an electron transport layer), and a carrier block layer (a hole block layer and an electron block layer). In this specification and the like, a light-receiving device (also referred to as a light-receiving element) has at least an active layer that functions as a photoelectric conversion layer between a pair of electrodes. In this specification and the like, one of the pair of electrodes may be referred to as a pixel electrode, and the other as a common electrode.
[0032] Embodiment 1 In this embodiment, a display device of one embodiment of the present invention will be described with reference to FIGS.
[0033] A display device according to one embodiment of the present invention includes light-emitting devices manufactured for different light-emitting colors and is capable of full-color display.
[0034] A structure in which different light-emitting layers are fabricated or painted separately for each color light-emitting device (e.g., blue (B), green (G), and red (R)) is sometimes called an SBS (Side By Side) structure. The SBS structure allows the materials and configuration to be optimized for each light-emitting device, increasing the freedom in material and configuration selection and facilitating improvements in brightness and reliability.
[0035] When manufacturing a display device having a plurality of light-emitting devices each emitting a different light color, it is necessary to form the light-emitting layers each emitting a different light color in an island shape.
[0036] In this specification, the term "island-like" refers to a state in which two or more layers made of the same material and formed in the same process are physically separated. For example, an island-like light-emitting layer refers to a state in which the light-emitting layer is physically separated from the adjacent light-emitting layer.
[0037] For example, island-shaped light-emitting layers can be formed by vacuum deposition using a metal mask. However, this method can result in deviations in the shape and position of the island-shaped light-emitting layers from the design due to various factors, such as the accuracy of the metal mask, misalignment between the metal mask and the substrate, deflection of the metal mask, and the spread of the contours of the formed film due to vapor scattering, making it difficult to achieve high-definition and high-aperture ratio displays. Furthermore, during deposition, the contours of the layer can become blurred, resulting in thin edges. In other words, the thickness of the island-shaped light-emitting layer can vary depending on the location. Furthermore, when fabricating large, high-resolution, or high-definition display devices, there is a concern that low manufacturing yields may be caused by low dimensional accuracy of the metal mask and deformation due to heat, etc.
[0038] Therefore, when manufacturing a display device according to one embodiment of the present invention, the light-emitting layer is processed into a fine pattern by photolithography without using a shadow mask such as a metal mask. Specifically, a pixel electrode is formed for each subpixel, and then the light-emitting layer is formed over the plurality of pixel electrodes. Then, the light-emitting layer is processed by photolithography to form one island-shaped light-emitting layer for each pixel electrode. This allows the light-emitting layer to be divided into subpixels, and an island-shaped light-emitting layer to be formed for each subpixel.
[0039] When the light-emitting layer is processed into an island shape, a structure in which the light-emitting layer is processed using photolithography directly above the light-emitting layer is conceivable. In this structure, the light-emitting layer may be damaged (e.g., damaged by processing), resulting in a significant loss of reliability. Therefore, when manufacturing a display device according to one embodiment of the present invention, it is preferable to form a mask layer (also referred to as a sacrificial layer, a protective layer, or the like) on a functional layer (e.g., a carrier block layer, a carrier transport layer, or a carrier injection layer, more specifically, a hole block layer, an electron transport layer, or an electron injection layer) located above the light-emitting layer, and then process the light-emitting layer and the functional layer into an island shape. By applying this method, a highly reliable display device can be provided. By providing another functional layer between the light-emitting layer and the mask layer, the light-emitting layer can be prevented from being exposed to the outermost surface during the manufacturing process of the display device, thereby reducing damage to the light-emitting layer.
[0040] In this specification, the mask film and the mask layer are each located above at least the light-emitting layer (more specifically, the layer that is processed into an island shape among the layers that make up the EL layer), and have the function of protecting the light-emitting layer during the manufacturing process.
[0041] The EL layer preferably has a first region, which is a light-emitting region (also referred to as a light-emitting area), and a second region outside the first region. The second region can also be called a dummy region. The first region is located between a pixel electrode and a common electrode. The first region is covered with a mask layer during the manufacturing process of the display device, and damage to the first region is significantly reduced. Therefore, a light-emitting device with high light-emitting efficiency and a long life can be realized. On the other hand, the second region includes the edge of the EL layer and its vicinity, and includes a portion that may be damaged by exposure to plasma during the manufacturing process of the display device. By not using the second region as a light-emitting region, variation in the characteristics of the light-emitting device can be suppressed.
[0042] Furthermore, when the light-emitting layer is processed into an island shape, it is preferable to process a layer located below the light-emitting layer (e.g., a carrier injection layer, a carrier transport layer, or a carrier block layer, more specifically, a hole injection layer, a hole transport layer, an electron block layer, or the like) into the same island shape as the light-emitting layer. Processing a layer located below the light-emitting layer into the same island shape as the light-emitting layer can reduce leakage current (also referred to as lateral leakage current) that may occur between adjacent subpixels. For example, when a hole injection layer is shared between adjacent subpixels, lateral leakage current may occur due to the hole injection layer. On the other hand, in a display device according to one embodiment of the present invention, the light-emitting layer and the hole injection layer can be processed into the same island shape, so that lateral leakage current between adjacent subpixels is substantially eliminated or can be extremely reduced.
[0043] Here, for example, when processing is performed using a photolithography method, various damages may be inflicted on the EL layer due to heating during the preparation of a resist mask, and exposure to an etching solution or etching gas during processing and removal of the resist mask. Furthermore, when a mask layer is provided on the EL layer, the EL layer may be affected by heating, an etching solution, an etching gas, etc. during the deposition, processing, and removal of the mask layer.
[0044] Furthermore, if the processes performed after the deposition of the EL layer are performed at a temperature higher than the heat resistance temperature of the EL layer, the EL layer may be deteriorated, and the luminous efficiency and reliability of the light-emitting device may decrease.
[0045] Therefore, in one embodiment of the present invention, the heat resistance temperature of the compounds contained in the light-emitting device is preferably 100°C or higher and 180°C or lower, more preferably 120°C or higher and 180°C or lower, and even more preferably 140°C or higher and 180°C or lower.
[0046] Examples of heat resistance temperature indicators include glass transition point (Tg), softening point, melting point, thermal decomposition temperature, and 5% weight loss temperature. For example, the glass transition point of the material contained in each layer constituting the EL layer can be used as an indicator of the heat resistance temperature. Furthermore, when the layer is a mixed layer made of multiple materials, for example, the glass transition point of the material contained in the largest amount can be used. Alternatively, the lowest temperature among the glass transition points of the multiple materials may be used.
[0047] In particular, it is preferable to increase the heat resistance temperature of the functional layer provided on the light-emitting layer. Furthermore, it is even more preferable to increase the heat resistance temperature of the functional layer provided on and in contact with the light-emitting layer. The high heat resistance of the functional layer makes it possible to effectively protect the light-emitting layer and reduce damage to the light-emitting layer.
[0048] In particular, it is preferable to increase the heat resistance temperature of the light-emitting layer, which can prevent the light-emitting layer from being damaged by heating, resulting in a decrease in light-emitting efficiency and a shortened lifespan.
[0049] By increasing the heat resistance temperature of the light-emitting device, the reliability of the light-emitting device can be improved. In addition, the temperature range in the manufacturing process of the display device can be widened, which leads to improvement in manufacturing yield and reliability.
[0050] In light-emitting devices that emit light of different colors, it is not necessary to form all layers constituting the EL layer separately; some layers can be formed in the same process. In a manufacturing method of a display device according to one embodiment of the present invention, after some layers constituting the EL layer are formed in an island shape for each color, at least a part of the mask layer is removed, and the remaining layers constituting the EL layer (sometimes referred to as a common layer) and a common electrode (also referred to as an upper electrode) are formed in common (as a single film) for the light-emitting devices of each color. For example, a carrier injection layer and a common electrode can be formed in common for the light-emitting devices of each color.
[0051] On the other hand, the carrier injection layer is often a layer with relatively high conductivity among the EL layers. Therefore, if the carrier injection layer comes into contact with the side surface of a part of the EL layer formed in an island shape or with the side surface of the pixel electrode, the light-emitting device may be short-circuited. Even when the carrier injection layer is formed in an island shape and a common electrode is formed in common to the light-emitting devices of each color, the light-emitting device may be short-circuited if the common electrode comes into contact with the side surface of the EL layer or the side surface of the pixel electrode.
[0052] Therefore, the display device of one embodiment of the present invention includes an insulating layer that covers at least the side surfaces of the island-shaped light-emitting layers. In addition, the insulating layer preferably covers part of the top surface of the island-shaped light-emitting layers.
[0053] This prevents at least a portion of the island-shaped EL layer and the pixel electrode from coming into contact with the carrier injection layer or the common electrode, thereby preventing short circuits in the light-emitting device and improving the reliability of the light-emitting device.
[0054] In a cross-sectional view, the end of the insulating layer preferably has a tapered shape with a taper angle of less than 90°. This prevents step disconnection of the common layer and common electrode provided on the insulating layer. Therefore, connection defects due to step disconnection can be suppressed. Furthermore, it is possible to suppress an increase in electrical resistance due to a local thinning of the common electrode caused by the step.
[0055] In this specification, a tapered shape refers to a shape in which at least a portion of the side surface of a structure is inclined relative to the substrate surface or the surface to be formed. For example, it is preferable to have a region in which the angle (also called the taper angle) between the inclined side surface and the substrate surface or the surface to be formed is less than 90°. The side surface of the structure, the substrate surface, and the surface to be formed do not necessarily need to be completely flat, and may be approximately planar with a slight curvature or approximately planar with a slight unevenness.
[0056] In this specification and the like, the term "step discontinuity" refers to a phenomenon in which a layer, film, or electrode is divided due to the shape of the surface on which it is formed (for example, a step or the like).
[0057] As described above, the island-shaped light-emitting layer manufactured by the method for manufacturing a display device according to one embodiment of the present invention is not formed using a fine metal mask, but is formed by forming the light-emitting layer on the entire surface and then processing it. Therefore, a high-definition display device or a display device with a high aperture ratio, which has been difficult to achieve until now, can be realized. Furthermore, since the light-emitting layer can be separately manufactured for each color, a display device with extremely vivid, high contrast, and high display quality can be realized. Furthermore, by providing a mask layer on the light-emitting layer, damage to the light-emitting layer during the manufacturing process of the display device can be reduced, thereby improving the reliability of the light-emitting device.
[0058] Furthermore, while it is difficult to achieve a spacing of less than 10 μm between adjacent light-emitting devices using, for example, a fine metal mask, a photolithography method according to one embodiment of the present invention can narrow the spacing between adjacent light-emitting devices, adjacent EL layers, or adjacent pixel electrodes to, for example, less than 10 μm, 5 μm or less, 3 μm or less, 2 μm or less, 1.5 μm or less, 1 μm or less, or 0.5 μm or less in a process on a glass substrate. Furthermore, by using, for example, an exposure apparatus for LSIs, the spacing between adjacent light-emitting devices, adjacent EL layers, or adjacent pixel electrodes in a process on a Si wafer can be narrowed to, for example, 500 nm or less, 200 nm or less, 100 nm or less, or even 50 nm or less. This significantly reduces the area of the non-light-emitting region that may exist between two light-emitting devices, enabling the aperture ratio to approach 100%. For example, in a display device of one embodiment of the present invention, the aperture ratio can be 40% or more, 50% or more, 60% or more, 70% or more, 80% or more, or even 90% or more, but less than 100%.
[0059] Increasing the aperture ratio of a display device can improve the reliability of the display device. More specifically, when the lifetime of a display device using an organic EL device and having an aperture ratio of 10% is taken as the reference, the lifetime of a display device having an aperture ratio of 20% (i.e., an aperture ratio twice as high as the reference) is approximately 3.25 times longer, and the lifetime of a display device having an aperture ratio of 40% (i.e., an aperture ratio four times as high as the reference) is approximately 10.6 times longer. As such, as the aperture ratio increases, the current density flowing through the organic EL device can be reduced, thereby improving the lifetime of the display device. In the display device of one embodiment of the present invention, the aperture ratio can be increased, thereby improving the display quality of the display device. Furthermore, as the aperture ratio of the display device increases, an excellent effect is achieved, such as a significant improvement in the reliability (particularly the lifetime) of the display device.
[0060] Furthermore, the pattern of the light-emitting layer itself (also known as the processing size) can be made much smaller than when a fine metal mask is used. Furthermore, for example, when a metal mask is used to separately fabricate light-emitting layers, thickness variations occur between the center and edges of the light-emitting layer, resulting in a smaller effective area that can be used as a light-emitting region relative to the area of the light-emitting layer. On the other hand, the above-described fabrication method processes a film formed to a uniform thickness, allowing island-shaped light-emitting layers to be formed with a uniform thickness. Therefore, even with a fine pattern, almost the entire area can be used as a light-emitting region. This allows the fabrication of a display device that combines high definition and a high aperture ratio. Furthermore, the display device can be made smaller and lighter.
[0061] Specifically, the resolution of the display device of one embodiment of the present invention can be, for example, 2000 ppi or more, preferably 3000 ppi or more, more preferably 5000 ppi or more, and still more preferably 6000 ppi or more, and can be 20000 ppi or less, or 30000 ppi or less.
[0062] In this embodiment, a cross-sectional structure of a display device according to one embodiment of the present invention will be mainly described, and a manufacturing method of the display device according to one embodiment of the present invention will be described in detail in Embodiment 2.
[0063] FIG. 1A shows a top view of a display device 100. The display device 100 has a display section in which a plurality of pixels 110 are arranged, and a connection section 140 outside the display section. A plurality of sub-pixels are arranged in a matrix in the display section. FIG. 1A shows two rows and six columns of sub-pixels, which together form two rows and two columns of pixels 110. The connection section 140 can also be called a cathode contact section.
[0064] 1A corresponds to the top surface shape of the light-emitting region. In this specification and the like, the top surface shape refers to the shape in a plan view, that is, the shape seen from above.
[0065] The top surface shape of the subpixel may be, for example, a triangle, a quadrangle (including a rectangle and a square), a polygon such as a pentagon, a polygon with rounded corners, an ellipse, or a circle.
[0066] Furthermore, the circuit layout constituting the subpixel is not limited to the range of the subpixel shown in Fig. 1A and may be located outside of it. For example, the transistor included in the subpixel 110a may be located within the range of the subpixel 110b shown in Fig. 1A, or part or all of the transistor may be located outside the range of the subpixel 110a.
[0067] 1A shows the subpixels 110a, 110b, and 110c as having the same or approximately the same aperture ratio (which can also be referred to as the size or size of the light-emitting region), but this is not a limitation of one embodiment of the present invention. The aperture ratios of the subpixels 110a, 110b, and 110c can be determined as appropriate. The aperture ratios of the subpixels 110a, 110b, and 110c may be different from one another, or two or more of the subpixels 110a, 110b, and 110c may be the same or approximately the same.
[0068] A stripe arrangement is applied to the pixel 110 shown in FIG. 1A. The pixel 110 shown in FIG. 1A is composed of three subpixels, 110a, 110b, and 110c. The subpixels 110a, 110b, and 110c each have a light-emitting device that emits light of a different color. Examples of the subpixels 110a, 110b, and 110c include subpixels of three colors: red (R), green (G), and blue (B), and subpixels of three colors: yellow (Y), cyan (C), and magenta (M). The number of types of subpixels is not limited to three, and may be four or more. Examples of four subpixels include subpixels of four colors: R, G, B, and white (W), subpixels of four colors: R, G, B, and Y, and subpixels of R, G, B, and infrared (IR).
[0069] In this specification and the like, the row direction may be referred to as the X direction, and the column direction may be referred to as the Y direction. The X direction and the Y direction intersect, for example, perpendicularly (see FIG. 1A ). FIG. 1A shows an example in which subpixels of different colors are arranged side by side in the X direction, and subpixels of the same color are arranged side by side in the Y direction.
[0070] 1A shows an example in which the connection portion 140 is located below the display portion when viewed from above, but the location of the connection portion 140 is not particularly limited. The connection portion 140 only needs to be located in at least one of the upper, right, left, and lower sides of the display portion when viewed from above, and may be located so as to surround all four sides of the display portion. The shape of the upper surface of the connection portion 140 may be strip-shaped, L-shaped, U-shaped, frame-shaped, or the like. Furthermore, the connection portion 140 may be singular or plural.
[0071] FIG. 1B shows a cross-sectional view taken along dashed line X1-X2 in FIG. 1A. FIG. 1C shows a top view of the first layer 113a. FIGS. 2A and 2B show enlarged views of a portion of the cross-sectional view shown in FIG. 1B. FIGS. 3 to 7 show modified examples of FIG. 2. FIGS. 8A and 9A to 9C show modified examples of FIG. 1B. FIGS. 8B and 8C show cross-sectional views of modified pixel electrodes. FIGS. 10A and 10B show cross-sectional views taken along dashed line Y1-Y2 in FIG. 1A.
[0072] 1B , in display device 100, an insulating layer is provided on layer 101 including transistors, light-emitting devices 130a, 130b, and 130c are provided on the insulating layer, and a protective layer 131 is provided to cover these light-emitting devices. Substrate 120 is bonded to protective layer 131 by resin layer 122. In addition, an insulating layer 125 and an insulating layer 127 on insulating layer 125 are provided in the region between adjacent light-emitting devices.
[0073] 1B shows multiple cross sections of insulating layer 125 and insulating layer 127, but when display device 100 is viewed from above, insulating layer 125 and insulating layer 127 are each connected to one another. That is, display device 100 can be configured to have, for example, one insulating layer 125 and one insulating layer 127. Note that display device 100 may have multiple insulating layers 125 that are separated from one another, or may have multiple insulating layers 127 that are separated from one another.
[0074] The display device of one embodiment of the present invention may be any of a top emission type that emits light in a direction opposite to a substrate on which a light-emitting device is formed, a bottom emission type that emits light toward a substrate on which a light-emitting device is formed, and a dual emission type that emits light from both sides.
[0075] The layer 101 including transistors can have, for example, a stacked structure in which a plurality of transistors are provided on a substrate and an insulating layer is provided to cover these transistors. The insulating layer over the transistors may have a single-layer structure or a stacked structure. FIG. 1B illustrates insulating layers over the transistors, including an insulating layer 255a, an insulating layer 255b over the insulating layer 255a, and an insulating layer 255c over the insulating layer 255b. These insulating layers may have a recess between adjacent light-emitting devices. FIG. 1B and other figures illustrate an example in which a recess is provided in the insulating layer 255c. Note that the insulating layer 255c does not necessarily have a recess between adjacent light-emitting devices. Note that the insulating layers over the transistors (insulating layers 255a to 255c) may also be considered as part of the layer 101 including transistors.
[0076] The insulating layers 255a, 255b, and 255c can each be suitably formed using various inorganic insulating films such as an oxide insulating film, a nitride insulating film, an oxynitride insulating film, and a nitride oxide insulating film. The insulating layers 255a and 255c are preferably formed using an oxide insulating film or an oxynitride insulating film such as a silicon oxide film, a silicon oxynitride film, or an aluminum oxide film. The insulating layer 255b is preferably formed using a nitride insulating film or a nitride oxide insulating film such as a silicon nitride film or a silicon nitride oxide film. More specifically, the insulating layers 255a and 255c are preferably formed using silicon oxide films, and the insulating layer 255b is preferably formed using a silicon nitride film. The insulating layer 255b preferably functions as an etching protective film.
[0077] In this specification and the like, an oxynitride refers to a material whose composition contains more oxygen than nitrogen, and a nitride oxide refers to a material whose composition contains more nitrogen than oxygen. For example, silicon oxynitride refers to a material whose composition contains more oxygen than nitrogen, and silicon nitride oxide refers to a material whose composition contains more nitrogen than oxygen.
[0078] A structural example of the layer 101 including a transistor will be described later in Embodiment 4.
[0079] The light emitting devices 130a, 130b, and 130c each emit light of a different color, and preferably emit light of three colors, for example, red (R), green (G), and blue (B).
[0080] As the light-emitting device, for example, an OLED (organic light-emitting diode) or a QLED (quantum-dot light-emitting diode) is preferably used. Examples of the light-emitting material contained in the light-emitting device include a fluorescent material, a phosphorescent material, an inorganic compound (such as a quantum dot material), and a material that exhibits thermally activated delayed fluorescence (thermally activated delayed fluorescence: TADF material). Furthermore, an LED such as a micro LED (light-emitting diode) can also be used as the light-emitting device.
[0081] The light emitting device can emit light of infrared, red, green, blue, cyan, magenta, yellow, white, etc. The color purity can be improved by providing the light emitting device with a microcavity structure.
[0082] For the structure and materials of the light-emitting device, reference can be made to Embodiment Mode 5.
[0083] Of the pair of electrodes that a light-emitting device has, one electrode functions as an anode and the other electrode functions as a cathode. In the following, an example in which the pixel electrode functions as the anode and the common electrode functions as the cathode will be described.
[0084] The light-emitting device 130a has a pixel electrode 111a on an insulating layer 255c, an island-shaped first layer 113a on the pixel electrode 111a, a common layer 114 on the island-shaped first layer 113a, and a common electrode 115 on the common layer 114. In the light-emitting device 130a, the first layer 113a and the common layer 114 can be collectively referred to as an EL layer.
[0085] The light-emitting device 130b has a pixel electrode 111b on an insulating layer 255c, an island-shaped second layer 113b on the pixel electrode 111b, a common layer 114 on the island-shaped second layer 113b, and a common electrode 115 on the common layer 114. In the light-emitting device 130b, the second layer 113b and the common layer 114 can be collectively referred to as an EL layer.
[0086] The light-emitting device 130c has a pixel electrode 111c on an insulating layer 255c, an island-shaped third layer 113c on the pixel electrode 111c, a common layer 114 on the island-shaped third layer 113c, and a common electrode 115 on the common layer 114. In the light-emitting device 130c, the third layer 113c and the common layer 114 can be collectively referred to as an EL layer.
[0087] In this specification and the like, among the EL layers included in the light-emitting devices, layers provided in an island shape for each light-emitting device are referred to as the first layer 113a, the second layer 113b, or the third layer 113c, and a layer shared by a plurality of light-emitting devices is referred to as the common layer 114. Note that in this specification and the like, the first layer 113a, the second layer 113b, and the third layer 113c may be referred to as an island-shaped EL layer, an EL layer formed in an island shape, or the like, without including the common layer 114.
[0088] The first layer 113a, the second layer 113b, and the third layer 113c are separated from one another. By providing an EL layer in an island shape for each light-emitting device, leakage current between adjacent light-emitting devices can be suppressed. This makes it possible to prevent crosstalk caused by unintended light emission and realize a display device with extremely high contrast. In particular, a display device with high current efficiency at low luminance can be realized.
[0089] The pixel electrodes 111a, 111b, and 111c each preferably have a tapered edge. Specifically, the pixel electrodes 111a, 111b, and 111c each preferably have a tapered edge with a taper angle of less than 90°. When the pixel electrodes have a tapered edge, the first layer 113a, the second layer 113b, and the third layer 113c provided along the side surfaces of the pixel electrodes also have a tapered edge (corresponding to the inclined portions described below). Tapering the side surfaces of the pixel electrodes can improve the coverage of the EL layer provided along the side surfaces of the pixel electrodes.
[0090] 1B and other figures illustrate a configuration in which the angle formed by the sidewall of the recess in the insulating layer 255c and the insulating layer 255b is equal to the tapered shape of the pixel electrodes 111a, 111b, and 111c, but the present invention is not limited to this. For example, the tapered shapes of the pixel electrodes 111a, 111b, and 111c may be different from the tapered shape of the recess formed in the insulating layer 255c.
[0091] In FIG. 1B , an insulating layer (also referred to as a partition wall, bank, spacer, or the like) covering the upper end of the pixel electrode 111a is not provided between the pixel electrode 111a and the first layer 113a. Furthermore, an insulating layer covering the upper end of the pixel electrode 111b is not provided between the pixel electrode 111b and the second layer 113b. Therefore, the distance between adjacent light-emitting devices can be made extremely narrow. This allows a high-definition or high-resolution display device to be obtained. Furthermore, a mask for forming the insulating layer is not required, thereby reducing the manufacturing cost of the display device.
[0092] Furthermore, by using a structure in which an insulating layer covering an edge of the pixel electrode is not provided between the pixel electrode and the EL layer, in other words, by using a structure in which an insulating layer is not provided between the pixel electrode and the EL layer, light from the EL layer can be efficiently extracted. Therefore, the display device of one embodiment of the present invention can have extremely low viewing angle dependence. By reducing the viewing angle dependence, the visibility of images in the display device can be improved. For example, in the display device of one embodiment of the present invention, the viewing angle (the maximum angle at which a certain contrast ratio is maintained when the screen is viewed from an oblique direction) can be set to a range of 100° to less than 180°, preferably 150° to 170°. Note that the above viewing angle can be applied to both the vertical and horizontal directions.
[0093] The light-emitting device of the present embodiment may have a single structure (a structure having only one light-emitting unit) or a tandem structure (a structure having multiple light-emitting units). The light-emitting unit has at least one light-emitting layer.
[0094] The first layer 113a, the second layer 113b, and the third layer 113c each include at least a light-emitting layer. Preferably, one of the first layer 113a, the second layer 113b, and the third layer 113c includes a light-emitting layer that emits red light, another includes a light-emitting layer that emits green light, and the remaining layer includes a light-emitting layer that emits blue light. For example, the first layer 113a may include a light-emitting layer that emits red light, the second layer 113b may include a light-emitting layer that emits green light, and the third layer 113c may include a light-emitting layer that emits blue light.
[0095] In addition, when a light-emitting device with a tandem structure is used, it is preferable that the first layer 113a has a structure having a plurality of light-emitting units that emit red light, the second layer 113b has a structure having a plurality of light-emitting units that emit green light, and the third layer 113c has a structure having a plurality of light-emitting units that emit blue light. It is preferable to provide a charge generation layer between each of the light-emitting units.
[0096] Furthermore, the first layer 113a, the second layer 113b, and the third layer 113c may each have one or more of a hole injection layer, a hole transport layer, a hole blocking layer, a charge generation layer, an electron blocking layer, an electron transport layer, and an electron injection layer.
[0097] For example, the first layer 113a, the second layer 113b, and the third layer 113c may each include a hole injection layer, a hole transport layer, a light-emitting layer, and an electron transport layer in this order. Alternatively, an electron blocking layer may be provided between the hole transport layer and the light-emitting layer. Alternatively, a hole blocking layer may be provided between the electron transport layer and the light-emitting layer. Alternatively, an electron injection layer may be provided on the electron transport layer.
[0098] For example, the first layer 113a, the second layer 113b, and the third layer 113c may each include an electron injection layer, an electron transport layer, a light-emitting layer, and a hole transport layer in this order. Alternatively, a hole blocking layer may be provided between the electron transport layer and the light-emitting layer. Alternatively, an electron blocking layer may be provided between the hole transport layer and the light-emitting layer. Alternatively, a hole injection layer may be provided on the hole transport layer.
[0099] As described above, the first layer 113a, the second layer 113b, and the third layer 113c preferably have a light-emitting layer and a carrier transport layer (electron transport layer or hole transport layer) on the light-emitting layer. The first layer 113a, the second layer 113b, and the third layer 113c preferably have a light-emitting layer and a carrier block layer (hole block layer or electron block layer) on the light-emitting layer. The first layer 113a, the second layer 113b, and the third layer 113c preferably have a light-emitting layer, a carrier block layer on the light-emitting layer, and a carrier transport layer on the carrier block layer. The surfaces of the first layer 113a, the second layer 113b, and the third layer 113c are exposed during the manufacturing process of the display device. Therefore, by providing one or both of the carrier transport layer and the carrier block layer on the light-emitting layer, the light-emitting layer can be prevented from being exposed to the outermost surface, thereby reducing damage to the light-emitting layer. This can improve the reliability of the light-emitting device.
[0100] The heat resistance temperature of each of the compounds contained in the first layer 113a, the second layer 113b, and the third layer 113c is preferably 100° C. or higher and 180° C. or lower, more preferably 120° C. or higher and 180° C. or lower, and still more preferably 140° C. or higher and 180° C. For example, the glass transition point (Tg) of each of these compounds is preferably 100° C. or higher and 180° C. or lower, more preferably 120° C. or higher and 180° C. or lower, and still more preferably 140° C. or higher and 180° C. or lower.
[0101] In particular, it is preferable that the heat resistance temperature of the functional layer provided on the light-emitting layer is high. Furthermore, it is even more preferable that the heat resistance temperature of the functional layer provided on and in contact with the light-emitting layer is high. The high heat resistance of the functional layer makes it possible to effectively protect the light-emitting layer and reduce damage to the light-emitting layer.
[0102] Furthermore, it is preferable that the light-emitting layer has a high heat resistance temperature, which can prevent the light-emitting layer from being damaged by heating, resulting in a decrease in light-emitting efficiency and a shortened lifespan.
[0103] The light-emitting layer includes a light-emitting substance (a light-emitting organic compound, also referred to as a guest material) and an organic compound (also referred to as a host material). The light-emitting layer contains a larger amount of the organic compound than the light-emitting substance, and therefore the Tg of the organic compound can be used as an index of the heat resistance temperature of the light-emitting layer.
[0104] The first layer 113a, the second layer 113b, and the third layer 113c may have, for example, a first light-emitting unit, a charge generation layer, and a second light-emitting unit stacked in this order on a pixel electrode.
[0105] The second light-emitting unit preferably has an emitting layer and a carrier transport layer (electron transport layer or hole transport layer) on the emitting layer. The second light-emitting unit preferably has an emitting layer and a carrier block layer (hole block layer or electron block layer) on the emitting layer. The second light-emitting unit preferably has an emitting layer, a carrier block layer on the emitting layer, and a carrier transport layer on the carrier block layer. The surface of the second light-emitting unit is exposed during the manufacturing process of the display device. Therefore, by providing one or both of the carrier transport layer and the carrier block layer on the emitting layer, the emitting layer is prevented from being exposed to the outermost surface, thereby reducing damage to the emitting layer. This improves the reliability of the light-emitting device. When three or more emitting units are included, the uppermost emitting unit preferably has an emitting layer and one or both of the carrier transport layer and the carrier block layer on the emitting layer.
[0106] The common layer 114 may include, for example, an electron injection layer or a hole injection layer. Alternatively, the common layer 114 may include a stack of an electron transport layer and an electron injection layer, or a stack of a hole transport layer and a hole injection layer. The common layer 114 is shared by the light-emitting devices 130 a, 130 b, and 130 c.
[0107] 1B shows an example in which the edge of the first layer 113a is positioned outside the edge of the pixel electrode 111a. Note that although the pixel electrode 111a and the first layer 113a are used as an example for explanation, the same can be said for the pixel electrode 111b and the second layer 113b, and the pixel electrode 111c and the third layer 113c.
[0108] 1B, the first layer 113a is formed so as to cover the edge of the pixel electrode 111a. With this configuration, it is possible to use the entire upper surface of the pixel electrode as a light-emitting region, and it is easier to increase the aperture ratio compared to a configuration in which the edge of the island-shaped EL layer is located inside the edge of the pixel electrode.
[0109] Furthermore, by covering the side surfaces of the pixel electrodes with the EL layer, contact between the pixel electrodes and the common electrode 115 can be prevented, thereby preventing short circuits in the light-emitting device. Furthermore, the distance between the light-emitting region of the EL layer (i.e., the region overlapping with the pixel electrode) and the edge of the EL layer can be increased. Since the edge of the EL layer may be damaged by processing, using an area away from the edge of the EL layer as the light-emitting region may improve the reliability of the light-emitting device.
[0110] The first layer 113a, the second layer 113b, and the third layer 113c each preferably have a first region, which is a light-emitting region, and a second region (dummy region) outside the first region. The first region is located between the pixel electrode and the common electrode. The first region is covered with a mask layer during the manufacturing process of the display device, and damage to the first region is significantly reduced. Therefore, a light-emitting device with high light-emitting efficiency and a long life can be realized. On the other hand, the second region includes the edge of the EL layer and its vicinity, and includes a portion that may be damaged by exposure to plasma during the manufacturing process of the display device. By not using the second region as a light-emitting region, variation in the characteristics of the light-emitting device can be suppressed.
[0111] The width L3 shown in FIGS. 1B and 1C corresponds to the width of the first region 113_1 (light-emitting region) in the first layer 113a. The widths L1 and L2 shown in FIGS. 1B and 1C correspond to the width of the second region 113_2 (dummy region) in the first layer 113a. As shown in FIG. 1C, the second region 113_2 is provided to surround the first region 113_1, so the width of the second region 113_2 can be confirmed at two locations, left and right, in cross-sectional views such as FIG. 1B. The width of the second region 113_2 can be the width L1 or the width L2, and may be, for example, the shorter of the widths L1 and L2. The widths L1 to L3 can be confirmed in cross-sectional observation images, etc.
[0112] The enlarged view shown in Fig. 2A shows the width L2 of the second region 113_2. The second region 113_2 is a portion of the first layer 113a where at least one of the mask layer 118a, the insulating layer 125, and the insulating layer 127 overlaps. In addition, in the first layer 113a, etc., a portion located outside the edge of the upper surface of the pixel electrode, such as the region 103 shown in Fig. 6B, is a dummy region.
[0113] The width of the second region 113_2 is 1 nm or more, preferably 5 nm or more, 50 nm or more, or 100 nm or more. A wider dummy region is preferable because it can uniformize the quality of the light-emitting region and suppress variations in the characteristics of the light-emitting device. On the other hand, a narrower dummy region is preferable because it widens the light-emitting region and increases the aperture ratio of the pixel. Therefore, the width of the second region 113_2 is preferably 50% or less of the width L3 of the first region 113_1, more preferably 40% or less, 30% or less, 20% or less, or 10% or less. Furthermore, in a small, high-resolution display device, such as a display device for a wearable device, the width of the second region 113_2 is preferably 500 nm or less, more preferably 300 nm or less, 200 nm or less, or 150 nm or less.
[0114] In the island-shaped EL layer, the first region (light-emitting region) is a region where EL (electroluminescence) light emission is obtained. Furthermore, in the island-shaped EL layer, both the first region (light-emitting region) and the second region (dummy region) are regions where PL (photoluminescence) light emission is obtained. From these facts, it can be said that the first region and the second region can be distinguished by checking the EL light emission and the PL light emission.
[0115] The common electrode 115 is shared by the light-emitting devices 130a, 130b, and 130c. The common electrode 115 shared by the plurality of light-emitting devices is electrically connected to a conductive layer 123 provided in a connection portion 140 (see FIGS. 10A and 10B). The conductive layer 123 is preferably made of the same material and formed in the same process as the pixel electrodes 111a, 111b, and 111c.
[0116] 10A shows an example in which a common layer 114 is provided on the conductive layer 123, and the conductive layer 123 and the common electrode 115 are electrically connected to each other through the common layer 114. The common layer 114 does not need to be provided in the connection portion 140. In FIG. 10B, the conductive layer 123 and the common electrode 115 are directly connected to each other. For example, by using a mask (also called an area mask or a rough metal mask to distinguish it from a fine metal mask) for defining a film formation area, the regions where the common layer 114 and the common electrode 115 are formed can be changed.
[0117] 1B, a mask layer 118a is located on the first layer 113a of the light-emitting device 130a, a mask layer 118b is located on the second layer 113b of the light-emitting device 130b, and a mask layer 118c is located on the third layer 113c of the light-emitting device 130c. The mask layers are provided to surround the first region 113_1 (light-emitting region). In other words, the mask layers have openings in the portions that overlap with the light-emitting regions. The top surface shape of the mask layer is identical, approximately identical, or similar to that of the second region 113_2 shown in FIG. 1C. The mask layer 118a is a remaining portion of the mask layer that was provided in contact with the top surface of the first layer 113a when the first layer 113a was processed. Similarly, the mask layer 118b is a mask layer formed when the second layer 113b is formed, and the mask layer 118c is a mask layer formed when the third layer 113c is formed, with a portion of the mask layer remaining. In this manner, in the display device of one embodiment of the present invention, a mask layer used to protect the EL layer during the manufacturing process may remain partially. The same material may be used for any two or all of the mask layers 118a to 118c, or different materials may be used for each of the mask layers. Note that hereinafter, the mask layers 118a, 118b, and 118c may be collectively referred to as the mask layer 118.
[0118] In FIG. 1B , one end of the mask layer 118a (the end opposite the light-emitting region, the outer end) is aligned or approximately aligned with the end of the first layer 113a, and the other end of the mask layer 118a is located on the first layer 113a. Here, the other end of the mask layer 118a (the end on the light-emitting region side, the inner end) preferably overlaps the first layer 113a and the pixel electrode 111a. In this case, the other end of the mask layer 118a is likely to be formed on a flat or approximately flat surface of the first layer 113a. The same applies to the mask layers 118b and 118c. Furthermore, the mask layer 118 remains, for example, between the top surface of the island-shaped EL layer (the first layer 113a, the second layer 113b, or the third layer 113c) and the insulating layer 125. The mask layer will be described in detail in Embodiment 2.
[0119] In addition, when the edges are aligned or approximately aligned, and when the top surface shapes are the same or approximately aligned, it can be said that at least a portion of the contours of the stacked layers overlap when viewed from above. For example, this includes cases where the upper and lower layers are processed using the same mask pattern or a portion of the same mask pattern. However, strictly speaking, the contours may not overlap, and the upper layer may be located inside the lower layer, or outside the lower layer. In these cases, it is also said that the edges are approximately aligned, or the top surface shapes are approximately aligned.
[0120] The side surfaces of the first layer 113a, the second layer 113b, and the third layer 113c are covered with the insulating layer 125. The insulating layer 127 overlaps the side surfaces of the first layer 113a, the second layer 113b, and the third layer 113c with the insulating layer 125 interposed therebetween.
[0121] Furthermore, a portion of the upper surface of each of the first layer 113a, the second layer 113b, and the third layer 113c is covered with a mask layer 118. The insulating layer 125 and the insulating layer 127 overlap a portion of the upper surface of each of the first layer 113a, the second layer 113b, and the third layer 113c via the mask layer 118. Note that the upper surfaces of each of the first layer 113a, the second layer 113b, and the third layer 113c are not limited to the upper surface of the flat portion that overlaps the upper surface of the pixel electrode, but may also include the upper surfaces of the inclined portion and flat portion (see region 103 in FIG. 6A ) located outside the upper surface of the pixel electrode.
[0122] By covering part of the top surfaces and side surfaces of the first layer 113a, the second layer 113b, and the third layer 113c with at least one of the insulating layer 125, the insulating layer 127, and the mask layer 118, the common layer 114 (or the common electrode 115) is prevented from contacting the side surfaces of the pixel electrodes 111a, 111b, and 111c, the first layer 113a, the second layer 113b, and the third layer 113c, thereby preventing short circuits in the light-emitting device and improving the reliability of the light-emitting device.
[0123] 1B, the first to third layers 113a to 113c are all shown to have the same thickness, but the present invention is not limited to this. The first to third layers 113a to 113c may have different thicknesses. For example, it is preferable to set the thickness of each layer in accordance with the optical path length that enhances the light emitted by each of the first to third layers 113a to 113c. This allows for a microcavity structure to be realized, and the color purity of each light-emitting device to be improved.
[0124] The insulating layer 125 is preferably in contact with the side surfaces of the first layer 113a, the second layer 113b, and the third layer 113c (see the end portions of the first layer 113a and the second layer 113b and the areas in their vicinity surrounded by dashed lines in FIG. 2A ). The insulating layer 125 being in contact with the first layer 113a, the second layer 113b, and the third layer 113c can prevent the first layer 113a, the second layer 113b, and the third layer 113c from peeling off. The insulating layer 125 being in close contact with the first layer 113a, the second layer 113b, or the third layer 113c can fix or bond the adjacent first layer 113a, etc., by the insulating layer 125. This can improve the reliability of the light-emitting device. Furthermore, the manufacturing yield of the light-emitting device can be increased.
[0125] 1B , the insulating layer 125 and the insulating layer 127 cover part of the top surface and both the side surfaces of the first layer 113 a, the second layer 113 b, and the third layer 113 c, which can further prevent peeling of the EL layer and improve the reliability of the light-emitting device and the manufacturing yield of the light-emitting device.
[0126] 1B shows an example in which a stacked structure of a first layer 113a, a mask layer 118a, an insulating layer 125, and an insulating layer 127 is located on an end of a pixel electrode 111a. Similarly, a stacked structure of a second layer 113b, a mask layer 118b, an insulating layer 125, and an insulating layer 127 is located on an end of a pixel electrode 111b, and a stacked structure of a third layer 113c, a mask layer 118c, an insulating layer 125, and an insulating layer 127 is located on an end of a pixel electrode 111c.
[0127] 1B shows a configuration in which the edge of the pixel electrode 111a is covered with the first layer 113a, and the insulating layer 125 is in contact with the side surface of the first layer 113a. Similarly, the edge of the pixel electrode 111b is covered with the second layer 113b, the edge of the pixel electrode 111c is covered with the third layer 113c, and the insulating layer 125 is in contact with the side surface of the second layer 113b and the side surface of the third layer 113c.
[0128] The insulating layer 127 is provided over the insulating layer 125 so as to fill recesses in the insulating layer 125. The insulating layer 127 can be configured to overlap with part of the top surfaces and side surfaces of the first layer 113a, the second layer 113b, and the third layer 113c with the insulating layer 125 interposed therebetween. In other words, the insulating layer 127 can be said to cover part of the top surfaces and side surfaces of the first layer 113a, the second layer 113b, and the third layer 113c with the insulating layer 125 interposed therebetween. The insulating layer 127 preferably covers at least part of the side surfaces of the insulating layer 125.
[0129] By providing the insulating layers 125 and 127, the gaps between the adjacent island-shaped EL layers can be filled, which reduces large unevenness in height on the surface where layers (for example, the carrier injection layer and the common electrode) are formed on the island-shaped EL layers, thereby making the surface flatter. Therefore, the coverage of the carrier injection layer, the common electrode, and the like can be improved.
[0130] The common layer 114 and the common electrode 115 are provided over the first layer 113a, the second layer 113b, the third layer 113c, the mask layer 118, the insulating layer 125, and the insulating layer 127. Before the insulating layer 125 and the insulating layer 127 are provided, a step is generated between a region where the pixel electrode and the island-shaped EL layer are provided and a region where the pixel electrode and the island-shaped EL layer are not provided (a region between light-emitting devices). In the display device of one embodiment of the present invention, the insulating layer 125 and the insulating layer 127 can flatten the step, thereby improving the coverage of the common layer 114 and the common electrode 115. Therefore, poor connection due to disconnection can be suppressed. Furthermore, the step can suppress an increase in electrical resistance due to a local thinning of the common electrode 115.
[0131] The upper surface of the insulating layer 127 preferably has a highly flat shape, but may have a convex portion, a convex curved surface, a concave curved surface, or a concave portion. For example, the upper surface of the insulating layer 127 preferably has a highly flat, smooth convex curved surface shape.
[0132] Next, examples of materials for the insulating layer 125 and the insulating layer 127 will be described.
[0133] The insulating layer 125 can be an insulating layer containing an inorganic material. For example, an inorganic insulating film such as an insulating oxide film, a nitride insulating film, an oxynitride insulating film, or a nitride oxide insulating film can be used for the insulating layer 125. The insulating layer 125 may have a single-layer structure or a stacked-layer structure. Examples of oxide insulating films include a silicon oxide film, an aluminum oxide film, a magnesium oxide film, an indium gallium zinc oxide film, a gallium oxide film, a germanium oxide film, an yttrium oxide film, a zirconium oxide film, a lanthanum oxide film, a neodymium oxide film, a hafnium oxide film, and a tantalum oxide film. Examples of nitride insulating films include a silicon nitride film and an aluminum nitride film. Examples of oxynitride insulating films include a silicon oxynitride film and an aluminum oxynitride film. Examples of nitride oxide insulating films include a silicon nitride oxide film and an aluminum nitride oxide film. In particular, aluminum oxide is preferable because it has a high etching selectivity with respect to the EL layer and has a function of protecting the EL layer in the formation of the insulating layer 127 described later. In particular, by using an inorganic insulating film such as an aluminum oxide film, a hafnium oxide film, or a silicon oxide film formed by atomic layer deposition (ALD) as the insulating layer 125, it is possible to form an insulating layer 125 that has few pinholes and has an excellent function of protecting the EL layer. The insulating layer 125 may also have a stacked structure of a film formed by ALD and a film formed by sputtering. For example, the insulating layer 125 may have a stacked structure of an aluminum oxide film formed by ALD and a silicon nitride film formed by sputtering.
[0134] The insulating layer 125 preferably functions as a barrier insulating layer against at least one of water and oxygen. The insulating layer 125 preferably has a function of suppressing diffusion of at least one of water and oxygen. The insulating layer 125 preferably has a function of capturing or fixing (also referred to as gettering) at least one of water and oxygen.
[0135] In this specification and the like, a barrier insulating layer refers to an insulating layer having barrier properties. In addition, in this specification and the like, the barrier properties refer to a function of suppressing the diffusion of a corresponding substance (also referred to as low permeability) or a function of capturing or fixing (also referred to as gettering) a corresponding substance.
[0136] The insulating layer 125 has a function as a barrier insulating layer or a gettering function, which makes it possible to suppress the intrusion of impurities (typically, at least one of water and oxygen) that may diffuse into each light-emitting device from the outside. With this configuration, it is possible to provide a highly reliable light-emitting device and further a highly reliable display device.
[0137] The insulating layer 125 preferably has a low impurity concentration. This can prevent impurities from entering the EL layer from the insulating layer 125 and causing deterioration of the EL layer. Furthermore, a low impurity concentration in the insulating layer 125 can improve the barrier properties against at least one of water and oxygen. For example, it is desirable that the insulating layer 125 has a sufficiently low hydrogen concentration or a sufficiently low carbon concentration, or preferably both of them.
[0138] The insulating layer 125 and the mask layers 118a, 118b, and 118c can be made of the same material. In this case, the boundary between the insulating layer 125 and any of the mask layers 118a, 118b, and 118c may become unclear and indistinguishable. Therefore, any of the mask layers 118a, 118b, and 118c and the insulating layer 125 may be recognized as a single layer. In other words, one layer may be provided in contact with a portion of the top surface and side surfaces of each of the first layer 113a, the second layer 113b, and the third layer 113c, and the insulating layer 127 may be observed to cover at least a portion of the side surfaces of the single layer.
[0139] The insulating layer 127 provided on the insulating layer 125 has the function of flattening large unevenness of the insulating layer 125 formed between adjacent light-emitting devices. In other words, the insulating layer 127 has the effect of improving the flatness of the surface on which the common electrode 115 is formed.
[0140] An insulating layer containing an organic material can be suitably used as the insulating layer 127. As the organic material, a photosensitive organic resin is preferably used, for example, a photosensitive resin composition containing an acrylic resin is preferably used. Note that in this specification and the like, the term "acrylic resin" does not refer only to polymethacrylic acid ester or methacrylic resin, but may refer to all acrylic polymers in a broad sense.
[0141] The insulating layer 127 may also be made of acrylic resin, polyimide resin, epoxy resin, imide resin, polyamide resin, polyimideamide resin, silicone resin, siloxane resin, benzocyclobutene-based resin, phenolic resin, or precursors of these resins. The insulating layer 127 may also be made of organic materials such as polyvinyl alcohol (PVA), polyvinyl butyral, polyvinylpyrrolidone, polyethylene glycol, polyglycerin, pullulan, water-soluble cellulose, or alcohol-soluble polyamide resin. The photosensitive resin may also be a photoresist. Either a positive-type material or a negative-type material may be used as the photosensitive organic resin.
[0142] The insulating layer 127 may be made of a material that absorbs visible light. The insulating layer 127 absorbs light emitted from the light-emitting device, thereby preventing light from leaking from the light-emitting device to an adjacent light-emitting device through the insulating layer 127 (stray light). This improves the display quality of the display device. Furthermore, since the display quality can be improved without using a polarizing plate in the display device, the display device can be made lighter and thinner.
[0143] Examples of materials that absorb visible light include materials containing pigments such as black, materials containing dyes, light-absorbing resin materials (e.g., polyimide), and resin materials that can be used for color filters (color filter materials). In particular, using a resin material in which two or more color filter materials are laminated or mixed is preferable because it can enhance the visible light blocking effect. In particular, mixing three or more color filter materials makes it possible to form a black or nearly black resin layer.
[0144] Next, the structure of the insulating layer 127 and its vicinity will be described using FIGS. 2A and 2B . FIG. 2A is an enlarged cross-sectional view of the insulating layer 127 between the light-emitting devices 130a and 130b and a region including the periphery thereof. The following description will be given using the insulating layer 127 between the light-emitting devices 130a and 130b as an example, but the same applies to the insulating layer 127 between the light-emitting devices 130b and 130c, and the insulating layer 127 between the light-emitting devices 130c and 130a. FIG. 2B is an enlarged view of the end of the insulating layer 127 on the second layer 113b and its vicinity, as shown in FIG. 2A . The following description will sometimes be given using the end of the insulating layer 127 on the second layer 113b as an example, but the same applies to the end of the insulating layer 127 on the first layer 113a and the end of the insulating layer 127 on the third layer 113c.
[0145] As shown in FIG. 2A , a first layer 113a is provided covering the pixel electrode 111a, and a second layer 113b is provided covering the pixel electrode 111b. A mask layer 118a is provided in contact with a portion of the top surface of the first layer 113a, and a mask layer 118b is provided in contact with a portion of the top surface of the second layer 113b. An insulating layer 125 is provided in contact with the top and side surfaces of the mask layer 118a, the side surfaces of the first layer 113a, the top surface of the insulating layer 255c, the top and side surfaces of the mask layer 118b, and the side surfaces of the second layer 113b. The insulating layer 125 also covers a portion of the top surface of the first layer 113a and a portion of the top surface of the second layer 113b. An insulating layer 127 is provided in contact with the top surface of the insulating layer 125. Furthermore, the insulating layer 127 overlaps with a part of the upper surface and the side surface of the first layer 113a and a part of the upper surface and the side surface of the second layer 113b via the insulating layer 125, and is in contact with at least a part of the side surface of the insulating layer 125. A common layer 114 is provided to cover the first layer 113a, the mask layer 118a, the second layer 113b, the mask layer 118b, the insulating layer 125, and the insulating layer 127, and a common electrode 115 is provided on the common layer 114.
[0146] Furthermore, the insulating layer 127 is formed in the region between the two island-shaped EL layers (for example, in FIG. 2A , the region between the first layer 113 a and the second layer 113 b). At this time, at least a portion of the insulating layer 127 is disposed at a position sandwiched between a side edge of one EL layer (for example, in FIG. 2A , the first layer 113 a) and a side edge of the other EL layer (for example, in FIG. 2A , the second layer 113 b). By providing such an insulating layer 127, it is possible to prevent the formation of divided portions and locally thin portions in the common layer 114 and the common electrode 115 formed on the island-shaped EL layers and the insulating layer 127.
[0147] 2B , the insulating layer 127 preferably has a tapered shape at its end with a taper angle θ1 in a cross-sectional view of the display device. The taper angle θ1 is the angle between the side surface of the insulating layer 127 and the substrate surface. However, the taper angle θ1 is not limited to the substrate surface, and may be the angle between the side surface of the insulating layer 127 and the upper surface of the flat portion of the second layer 113b or the upper surface of the flat portion of the pixel electrode 111b.
[0148] The taper angle θ1 of the insulating layer 127 is less than 90°, preferably 60° or less, more preferably 45° or less, and even more preferably 20° or less. By forming the end of the insulating layer 127 in such a forward tapered shape, the common layer 114 and the common electrode 115 provided on the insulating layer 127 can be formed with good coverage, and the occurrence of discontinuities or local thinning can be suppressed. This improves the in-plane uniformity of the common layer 114 and the common electrode 115, thereby improving the display quality of the display device.
[0149] 2A , in a cross-sectional view of the display device, the upper surface of the insulating layer 127 preferably has a convex curved shape. The convex curved shape of the upper surface of the insulating layer 127 preferably bulges gently toward the center. Furthermore, the convex curved portion in the center of the upper surface of the insulating layer 127 preferably has a shape that is continuously connected to the tapered portions at the ends. By forming the insulating layer 127 in this shape, the common layer 114 and the common electrode 115 can be formed with good coverage over the entire upper surface of the insulating layer 127.
[0150] 2B , the end of the insulating layer 127 is preferably positioned outside the end of the insulating layer 125. This reduces the unevenness of the surface on which the common layer 114 and the common electrode 115 are formed, and improves the coverage of the common layer 114 and the common electrode 115.
[0151] 2B , the insulating layer 125 preferably has a tapered shape at its end with a taper angle θ2 in a cross-sectional view of the display device. The taper angle θ2 is the angle between the side surface of the insulating layer 125 and the substrate surface. However, the taper angle θ2 is not limited to the substrate surface, and may be the angle between the side surface of the insulating layer 125 and the upper surface of the flat portion of the second layer 113b or the upper surface of the flat portion of the pixel electrode 111b.
[0152] The taper angle θ2 of the insulating layer 125 is less than 90°, preferably 60° or less, more preferably 45° or less, and even more preferably 20° or less.
[0153] 2B, the mask layer 118b preferably has a tapered shape at its end with a taper angle θ3 in a cross-sectional view of the display device. The taper angle θ3 is the angle between the side surface of the mask layer 118b and the substrate surface. However, the taper angle θ3 is not limited to the substrate surface, and may be the angle between the top surface of the flat portion of the second layer 113b or the top surface of the flat portion of the pixel electrode 111b and the side surface of the insulating layer 127.
[0154] The taper angle θ3 of the mask layer 118b is less than 90°, preferably 60° or less, more preferably 45° or less, and even more preferably 20° or less. By forming the mask layer 118b in such a forward tapered shape, the common layer 114 and the common electrode 115 provided on the mask layer 118b can be formed with good coverage.
[0155] The ends of the mask layers 118a and 118b are preferably located outside the ends of the insulating layer 125. This reduces the unevenness of the surfaces on which the common layer 114 and the common electrode 115 are formed, and improves the coverage of the common layer 114 and the common electrode 115.
[0156] As will be described in detail in Embodiment 2, if the insulating layer 125 and the mask layer 118 are etched at the same time, side etching may cause the insulating layer 125 and the mask layer 118 below the edge of the insulating layer 127 to disappear, forming a cavity (which may also be called a hole). Such a cavity may cause unevenness on the surface on which the common layer 114 and the common electrode 115 are formed, making the common layer 114 and the common electrode 115 more likely to be discontinuous. Therefore, by performing the etching process in two stages and performing a heat treatment between the two etchings, even if a cavity is formed in the first etching process, the heat treatment deforms the insulating layer 127, thereby filling the cavity. Furthermore, since the second etching process etches a thin film, the amount of side etching is reduced, making it less likely that a cavity will be formed. Even if a cavity is formed, it can be made extremely small. Therefore, unevenness on the surface on which the common layer 114 and the common electrode 115 are formed can be suppressed, and discontinuity in the common layer 114 and the common electrode 115 can be suppressed. Since the etching process is performed twice in this manner, the taper angles θ2 and θ3 may be different from each other. Alternatively, the taper angles θ2 and θ3 may be the same. Alternatively, the taper angles θ2 and θ3 may be smaller than the taper angle θ1.
[0157] The insulating layer 127 may cover at least a portion of the side surface of the mask layer 118a and at least a portion of the side surface of the mask layer 118b. For example, FIG. 2B shows an example in which the insulating layer 127 contacts and covers the inclined surface located at the end of the mask layer 118b formed by the first etching process, while the inclined surface located at the end of the mask layer 118b formed by the second etching process is exposed. These two inclined surfaces may be distinguishable because they have different taper angles. Alternatively, there may be little difference in the taper angles of the side surfaces formed by the two etching processes, making them indistinguishable.
[0158] 3A and 3B also show an example in which the insulating layer 127 covers the entire side surfaces of the mask layer 118a and the entire side surfaces of the mask layer 118b. Specifically, in FIG. 3B, the insulating layer 127 contacts and covers both of the two inclined surfaces. This is preferable because it further reduces the unevenness of the surfaces on which the common layer 114 and the common electrode 115 are formed. FIG. 3B also shows an example in which the end of the insulating layer 127 is located outside the end of the mask layer 118b. As shown in FIG. 2B, the end of the insulating layer 127 may be located inside the end of the mask layer 118b, or may be aligned or approximately aligned with the end of the mask layer 118b. Also, as shown in FIG. 3B, the insulating layer 127 may contact the second layer 113b.
[0159] 4A, 4B, 5A, and 5B show examples in which the insulating layer 127 has a concave curved shape (also referred to as a constricted portion, a recess, a dent, a depression, or the like) on the side surface. Depending on the material and forming conditions (heating temperature, heating time, heating atmosphere, and the like) of the insulating layer 127, the concave curved shape may be formed on the side surface of the insulating layer 127.
[0160] 4A and 4B show an example in which the insulating layer 127 covers a part of the side surface of the mask layer 118b and the remaining part of the side surface of the mask layer 118b is exposed, while Fig. 5A and 5B show an example in which the insulating layer 127 contacts and covers the entire side surface of the mask layer 118a and the entire side surface of the mask layer 118b.
[0161] 3 to 5, it is preferable that the taper angles θ1 to θ3 are in the above ranges.
[0162] 2 to 5, it is preferable that one end of the insulating layer 127 overlaps the top surface of the pixel electrode 111a and the other end of the insulating layer 127 overlaps the top surface of the pixel electrode 111b. This structure allows the ends of the insulating layer 127 to be formed on flat or approximately flat regions of the first layer 113a and the second layer 113b. This makes it relatively easy to form the tapered shapes of the insulating layer 127, the insulating layer 125, and the mask layer 118. Furthermore, peeling of the pixel electrodes 111a, 111b, the first layer 113a, and the second layer 113b can be suppressed. On the other hand, the smaller the overlapping portion between the top surface of the pixel electrode and the insulating layer 127, the wider the light-emitting region of the light-emitting device, which increases the aperture ratio, which is preferable.
[0163] The insulating layer 127 does not have to overlap the top surfaces of the pixel electrodes. As shown in FIG. 6A , the insulating layer 127 may not overlap the top surfaces of the pixel electrodes, but one end of the insulating layer 127 may overlap a side surface of the pixel electrode 111a, and the other end of the insulating layer 127 may overlap a side surface of the pixel electrode 111b. As shown in FIG. 6B , the insulating layer 127 may not overlap the pixel electrodes, but may be provided in a region sandwiched between the pixel electrodes 111a and 111b. In FIGS. 6A and 6B , part or all of the top surfaces of the inclined and flat portions (regions 103) of the first layer 113a and the second layer 113b located outside the top surfaces of the pixel electrodes are covered by the mask layer 118, the insulating layer 125, and the insulating layer 127. Even with this configuration, it is possible to reduce the unevenness of the surface on which the common layer 114 and the common electrode 115 are formed, and improve the coverage of the common layer 114 and the common electrode 115, compared to a configuration in which the mask layer 118, the insulating layer 125, and the insulating layer 127 are not provided. Note that the region 103 can be called a dummy region.
[0164] As shown in FIG. 7A, the upper surface of the insulating layer 127 may have a flat portion in a cross-sectional view of the display device.
[0165] 7B , the upper surface of the insulating layer 127 may have a concave curved shape in a cross-sectional view of the display device. In FIG. 7B , the upper surface of the insulating layer 127 has a shape that gently bulges toward the center, i.e., a convex curved surface, and a shape that is recessed in the center and its vicinity, i.e., a concave curved surface. Also, in FIG. 7B , the convex curved portion of the upper surface of the insulating layer 127 has a shape that is continuously connected to the tapered portions at the ends. Even when the insulating layer 127 has such a shape, the common layer 114 and the common electrode 115 can be formed with good coverage over the entire upper surface of the insulating layer 127.
[0166] To form the insulating layer 127 having a concave curved surface in the center as shown in Figure 7B, an exposure method using a multi-tone mask (typically a half-tone mask or a gray-tone mask) can be applied. Note that a multi-tone mask is a mask that can perform exposure at three exposure levels: exposed portion, intermediate exposed portion, and unexposed portion, and is an exposure mask that transmits light with multiple intensities. Using a single photomask (a single exposure and development process), it is possible to form the insulating layer 127 having regions with multiple thicknesses (typically two types).
[0167] The method for forming the concave curved surface in the center of insulating layer 127 is not limited to the above. For example, two photomasks may be used to separately form an exposed portion and an intermediately exposed portion. Alternatively, the viscosity of the resin material used for insulating layer 127 may be adjusted. Specifically, the viscosity of the material used for insulating layer 127 may be set to 10 cP or less, preferably 1 cP or more and 5 cP or less.
[0168] Although not shown, the concave curved surface in the center of the insulating layer 127 does not necessarily have to be continuous, and may be interrupted between adjacent light-emitting devices. In this case, a portion of the insulating layer 127 disappears at the center of the insulating layer 127 shown in Fig. 7B, exposing the surface of the insulating layer 125. In this case, the insulating layer 127 may have a shape that can cover the common layer 114 and the common electrode 115.
[0169] 2 to 7 , the insulating layer 127, the insulating layer 125, the mask layer 118a, and the mask layer 118b are provided, thereby enabling the common layer 114 and the common electrode 115 to be formed with high coverage from the flat or substantially flat region of the first layer 113a to the flat or substantially flat region of the second layer 113b. This prevents the formation of disconnected portions and locally thin portions in the common layer 114 and the common electrode 115. This prevents poor connection between the light-emitting devices in the common layer 114 and the common electrode 115 due to disconnected portions and increases in electrical resistance due to locally thin portions. This allows the display device according to one embodiment of the present invention to have improved display quality.
[0170] It is preferable that the light-emitting devices 130a, 130b, and 130c have a protective layer 131. The reliability of the light-emitting devices can be improved by providing the protective layer 131. The protective layer 131 may have a single-layer structure or a stacked structure of two or more layers.
[0171] There is no restriction on the conductivity of the protective layer 131. The protective layer 131 can be made of at least one of an insulating film, a semiconductor film, and a conductive film.
[0172] The protective layer 131 has an inorganic film, which can prevent oxidation of the common electrode 115, prevent impurities (moisture, oxygen, etc.) from entering the light-emitting device, and so on, thereby suppressing deterioration of the light-emitting device and improving the reliability of the display device.
[0173] For the protective layer 131, for example, an inorganic insulating film such as an insulating oxide film, an insulating nitride film, an insulating oxynitride film, or an insulating nitride oxide film can be used. Specific examples of these inorganic insulating films are as given in the description of the insulating layer 125. In particular, the protective layer 131 preferably has an insulating nitride film or an insulating nitride oxide film, and more preferably has an insulating nitride film.
[0174] Alternatively, an inorganic film containing In—Sn oxide (also referred to as ITO), In—Zn oxide, Ga—Zn oxide, Al—Zn oxide, indium gallium zinc oxide (In—Ga—Zn oxide, also referred to as IGZO), or the like can be used for the protective layer 131. The inorganic film preferably has high resistance, specifically, preferably has higher resistance than the common electrode 115. The inorganic film may further contain nitrogen.
[0175] When light emitted from the light-emitting device is extracted through the protective layer 131, it is preferable that the protective layer 131 has high transparency to visible light. For example, ITO, IGZO, and aluminum oxide are preferable because they are inorganic materials that have high transparency to visible light.
[0176] For example, a stacked structure of an aluminum oxide film and a silicon nitride film on the aluminum oxide film, or a stacked structure of an aluminum oxide film and an IGZO film on the aluminum oxide film can be used as the protective layer 131. By using such a stacked structure, impurities (water, oxygen, etc.) can be prevented from entering the EL layer side.
[0177] Furthermore, the protective layer 131 may have an organic film. For example, the protective layer 131 may have both an organic film and an inorganic film. Examples of organic materials that can be used for the protective layer 131 include the organic insulating materials that can be used for the insulating layer 127.
[0178] The protective layer 131 may have a two-layer structure formed by using different film formation methods. Specifically, the first layer of the protective layer 131 may be formed by the ALD method, and the second layer of the protective layer 131 may be formed by the sputtering method.
[0179] A light-shielding layer may be provided on the surface of the substrate 120 facing the resin layer 122. Various optical members may be disposed on the outside of the substrate 120. Examples of optical members include a polarizing plate, a retardation plate, a light diffusion layer (such as a diffusion film), an anti-reflection layer, and a light-collecting film. Furthermore, a surface protection layer such as an anti-static film that suppresses the adhesion of dust, a water-repellent film that makes it difficult for dirt to adhere, a hard coat film that suppresses the occurrence of scratches during use, or an impact absorbing layer may be disposed on the outside of the substrate 120. For example, a glass layer or a silica layer (SiO x The surface protection layer can be preferably formed of a material such as DLC (diamond-like carbon), aluminum oxide (AlO x ), polyester-based materials, or polycarbonate-based materials may also be used. Note that it is preferable to use a material with high transmittance to visible light for the surface protection layer. It is also preferable to use a material with high hardness for the surface protection layer.
[0180] The substrate 120 can be made of glass, quartz, ceramics, sapphire, resin, metal, alloy, semiconductor, or the like. A material that transmits light is used for the substrate on the side from which light from the light-emitting device is extracted. Using a flexible material for the substrate 120 increases the flexibility of the display device, enabling a flexible display to be realized. A polarizing plate may also be used as the substrate 120.
[0181] The substrate 120 can be made of polyester resin such as polyethylene terephthalate (PET) or polyethylene naphthalate (PEN), polyacrylonitrile resin, acrylic resin, polyimide resin, polymethyl methacrylate resin, polycarbonate (PC) resin, polyethersulfone (PES) resin, polyamide resin (nylon, aramid, etc.), polysiloxane resin, cycloolefin resin, polystyrene resin, polyamideimide resin, polyurethane resin, polyvinyl chloride resin, polyvinylidene chloride resin, polypropylene resin, polytetrafluoroethylene (PTFE) resin, ABS resin, cellulose nanofiber, etc. The substrate 120 can also be made of glass having a thickness sufficient to provide flexibility.
[0182] When a circularly polarizing plate is superimposed on a display device, it is preferable that the display device has a substrate with high optical isotropy. A substrate with high optical isotropy has small birefringence (or a small amount of birefringence).
[0183] The absolute value of the retardation (phase difference) of a substrate having high optical isotropy is preferably 30 nm or less, more preferably 20 nm or less, and even more preferably 10 nm or less.
[0184] Examples of films with high optical isotropy include triacetyl cellulose (TAC, also known as cellulose triacetate) films, cycloolefin polymer (COP) films, cycloolefin copolymer (COC) films, and acrylic films.
[0185] Furthermore, when a film is used as a substrate, the film may absorb water, causing deformation such as wrinkles in the display device. Therefore, it is preferable to use a film with low water absorption for the substrate. For example, it is preferable to use a film with a water absorption rate of 1% or less, more preferably 0.1% or less, and even more preferably 0.01% or less.
[0186] The resin layer 122 can be made of various curable adhesives, such as a photo-curable adhesive (e.g., an ultraviolet curable adhesive), a reactive curable adhesive, a thermosetting adhesive, or an anaerobic adhesive. Examples of such adhesives include epoxy resin, acrylic resin, silicone resin, phenolic resin, polyimide resin, imide resin, PVC (polyvinyl chloride) resin, PVB (polyvinyl butyral) resin, and EVA (ethylene vinyl acetate) resin. In particular, a material with low moisture permeability, such as epoxy resin, is preferable. Alternatively, a two-component resin may be used. Alternatively, an adhesive sheet or the like may be used.
[0187] Examples of materials that can be used for conductive layers such as the gate, source, and drain of a transistor, as well as various wirings and electrodes that constitute a display device include metals such as aluminum, titanium, chromium, nickel, copper, yttrium, zirconium, molybdenum, silver, tantalum, and tungsten, and alloys containing these metals as their main components. Films containing these materials can be used as a single layer or a stacked layer structure.
[0188] Examples of light-transmitting conductive materials include conductive oxides such as indium oxide, indium tin oxide, indium zinc oxide, zinc oxide, and zinc oxide containing gallium, or graphene. Alternatively, metal materials such as gold, silver, platinum, magnesium, nickel, tungsten, chromium, molybdenum, iron, cobalt, copper, palladium, and titanium, or alloy materials containing such metal materials, can be used. Alternatively, nitrides of such metal materials (e.g., titanium nitride) can be used. When using metal materials or alloy materials (or their nitrides), it is preferable to thin them sufficiently to ensure light-transmitting properties. A stacked film of the above materials can also be used as the conductive layer. For example, a stacked film of an alloy of silver and magnesium and indium tin oxide is preferable because it can enhance conductivity. These materials can also be used for conductive layers such as various wirings and electrodes constituting display devices, and conductive layers (conductive layers functioning as pixel electrodes or counter electrodes) in light-emitting devices.
[0189] Examples of insulating materials that can be used for each insulating layer include resins such as acrylic resin and epoxy resin, and inorganic insulating materials such as silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, and aluminum oxide.
[0190] 8A shows a modification of FIG. 1B. In FIG. 8A, the upper and side surfaces of the pixel electrodes 111a, 111b, and 111c are covered with conductive layers 116a, 116b, and 116c, respectively. The conductive layers 116a, 116b, and 116c can also be considered as part of the pixel electrodes.
[0191] In FIG. 1B , the side surface of the pixel electrode 111a contacts the first layer 113a. If the pixel electrode 111a has a stacked structure, there will be multiple conductive layers in contact with the first layer 113a. This may result in areas of poor adhesion between the pixel electrode 111a and the first layer 113a. This also applies to the areas between the pixel electrode 111b and the second layer 113b, and between the pixel electrode 111c and the third layer 113c.
[0192] Furthermore, when a portion of the film that will become the conductive layers 116a, 116b, and 116c is removed by wet etching after the pixel electrodes 111a, 111b, and 111c are formed, galvanic corrosion may occur if the etching solution comes into contact with the pixel electrodes 111a, 111b, and 111c.
[0193] 8A, the upper and side surfaces of the pixel electrodes 111a, 111b, and 111c are covered with the conductive layers 116a, 116b, and 116c, respectively, which prevents the etching solution from coming into contact with the pixel electrodes 111a, 111b, and 111c, thereby preventing deterioration due to galvanic corrosion or the like. This allows for a wider range of material options for the pixel electrode 111a. Furthermore, since the first layer 113a and the conductive layer 116a are in contact with each other, adhesion is also uniform.
[0194] In the case of a top-emission display device, it is preferable to use electrodes (reflective electrodes) that are reflective to visible light for the pixel electrodes 111a, 111b, and 111c, and electrodes (transparent electrodes) that are transparent to visible light for the conductive layers 116a, 116b, and 116c.
[0195] The pixel electrode 111 shown in FIG. 8B has a three-layer structure, and the conductive layer 116 has a single-layer structure. For example, it is preferable to use a three-layer structure of a titanium film, an aluminum film, and a titanium film as the pixel electrode 111, and to use an oxide conductive layer (e.g., In—Si—Sn oxide (also referred to as ITSO)) as the conductive layer 116. The aluminum film has high reflectivity and is suitable as a reflective electrode. On the other hand, if aluminum and the oxide conductive layer come into contact with each other, electrolytic corrosion may occur. Therefore, it is preferable to provide a titanium film between the aluminum film and the oxide conductive layer.
[0196] 8C has a three-layer structure, and the conductive layer 116 has a two-layer structure. For example, it is preferable to use a three-layer structure of a titanium film, an aluminum film, and a titanium film as the pixel electrode 111, and a two-layer structure of a titanium film and an oxide conductive layer (for example, ITSO) as the conductive layer 116.
[0197] 9A to 9C, the display device may be provided with a lens array 133. The lens array 133 may be provided over the light emitting device.
[0198] 9A and 9B show an example in which a lens array 133 is provided on light-emitting devices 130a, 130b, and 130c via a protective layer 131. By forming the lens array 133 directly on a substrate on which the light-emitting devices are formed, it is possible to improve the accuracy of alignment between the light-emitting devices and the lens array.
[0199] 9C shows an example in which a substrate 120 provided with a lens array 133 is bonded onto a protective layer 131 by a resin layer 122. By providing the lens array 133 on the substrate 120, the temperature of the heat treatment in the formation process can be increased.
[0200] 9B shows an example in which a layer having a planarizing function is used as the protective layer 131, but as shown in FIGS. 9A and 9C, the protective layer 131 does not have to have a planarizing function. For example, by using an organic film for the protective layer 131, the upper surface of the protective layer 131 can be made flat. Also, the protective layer 131 shown in FIGS. 9A and 9C can be formed by using, for example, an inorganic film.
[0201] The convex surface of the lens array 133 may face the substrate 120 side or the light-emitting device side.
[0202] The lens array 133 can be formed using at least one of an inorganic material and an organic material. For example, a material containing a resin can be used for the lenses. Also, a material containing at least one of an oxide and a sulfide can be used for the lenses. For example, a microlens array can be used as the lens array 133. The lens array 133 can be formed directly on the substrate or the light-emitting device, or a separately formed lens array can be bonded thereto.
[0203] Fig. 11A shows a top view of a display device 100 different from that shown in Fig. 1A. A pixel 110 shown in Fig. 11A is composed of four types of subpixels: subpixels 110a, 110b, 110c, and 110d.
[0204] The sub-pixels 110a, 110b, 110c, and 110d may each have a light-emitting device that emits light of a different color, such as sub-pixels of four colors R, G, B, and W, sub-pixels of four colors R, G, B, and Y, or sub-pixels of four colors R, G, B, and IR.
[0205] Furthermore, the display device of one embodiment of the present invention may include a light-receiving device in a pixel.
[0206] Of the four sub-pixels included in pixel 110 shown in FIG. 11A, three may be configured to have a light-emitting device, and the remaining one may be configured to have a light-receiving device.
[0207] The light receiving device may be, for example, a pn-type or pin-type photodiode. The light receiving device functions as a photoelectric conversion device (also called a photoelectric conversion element) that detects light incident on the light receiving device and generates electric charges. The amount of electric charges generated by the light receiving device is determined based on the amount of light incident on the light receiving device.
[0208] The light-receiving device can detect one or both of visible light and infrared light. When detecting visible light, it can detect one or more of light such as blue, purple, blue-purple, green, yellow-green, yellow, orange, and red. When detecting infrared light, it is preferable because it enables detection of an object even in a dark place.
[0209] In particular, it is preferable to use an organic photodiode having a layer containing an organic compound as the light-receiving device. Organic photodiodes can be easily made thin, lightweight, and large in area, and have a high degree of freedom in shape and design, making them applicable to a variety of display devices.
[0210] In one embodiment of the present invention, an organic EL device is used as the light-emitting device, and an organic photodiode is used as the light-receiving device. The organic EL device and the organic photodiode can be formed on the same substrate. Therefore, the organic photodiode can be built into a display device using the organic EL device.
[0211] The light-receiving device is driven by applying a reverse bias between the pixel electrode and the common electrode, so that it can detect light incident on the light-receiving device, generate electric charges, and extract them as a current.
[0212] The same manufacturing method as for the light-emitting device can be applied to the light-receiving device. The island-shaped active layer (also called a photoelectric conversion layer) of the light-receiving device is formed by depositing a film to become the active layer on the entire surface and then processing it, rather than using a fine metal mask. Therefore, the island-shaped active layer can be formed with a uniform thickness. Furthermore, by providing a mask layer on the active layer, damage to the active layer during the manufacturing process of the display device can be reduced, thereby improving the reliability of the light-receiving device.
[0213] The sixth embodiment can be referred to for the configuration and materials of the light receiving device.
[0214] Fig. 11B shows a cross-sectional view taken along dashed line X3-X4 in Fig. 11A. For a cross-sectional view taken along dashed line X1-X2 in Fig. 11A, refer to Fig. 1B, and for a cross-sectional view taken along dashed line Y1-Y2, refer to Fig. 7A or 7B.
[0215] 11B , in the display device 100, an insulating layer is provided on a layer 101 including transistors, a light-emitting device 130 a and a light-receiving device 150 are provided on the insulating layer, a protective layer 131 is provided so as to cover the light-emitting device and the light-receiving device, and the substrate 120 is bonded by a resin layer 122. In addition, an insulating layer 125 and an insulating layer 127 on the insulating layer 125 are provided in the region between the adjacent light-emitting device and light-receiving device.
[0216] FIG. 11B shows an example in which the light emitting device 130a emits light toward the substrate 120 side, and light is incident on the light receiving device 150 from the substrate 120 side (see light Lem and light Lin).
[0217] The configuration of the light-emitting device 130a is as described above.
[0218] The light-receiving device 150 has a pixel electrode 111d on the insulating layer 255c, a fourth layer 113d on the pixel electrode 111d, a common layer 114 on the fourth layer 113d, and a common electrode 115 on the common layer 114. The fourth layer 113d includes at least an active layer.
[0219] Here, the fourth layer 113d includes at least an active layer and preferably has multiple functional layers. Examples of functional layers include a carrier transport layer (hole transport layer and electron transport layer) and a carrier block layer (hole block layer and electron block layer). It is also preferable to have one or more layers on the active layer. Having another layer between the active layer and the mask layer can prevent the active layer from being exposed to the outermost surface during the manufacturing process of the display device, thereby reducing damage to the active layer. This can improve the reliability of the light-receiving device 150. Therefore, it is preferable that the fourth layer 113d has an active layer and a carrier block layer (hole block layer or electron block layer) or a carrier transport layer (electron transport layer or hole transport layer) on the active layer.
[0220] The fourth layer 113d is a layer provided in the light-receiving device 150 but not in the light-emitting device. However, functional layers other than the active layer included in the fourth layer 113d may have the same material as functional layers other than the light-emitting layers included in the first to third layers 113a to 113c. On the other hand, the common layer 114 is a continuous layer shared by the light-emitting device and the light-receiving device.
[0221] Here, a layer shared by a light-receiving device and a light-emitting device may have different functions in the light-emitting device and in the light-receiving device. In this specification, components may be referred to based on their functions in the light-emitting device. For example, a hole injection layer functions as a hole injection layer in the light-emitting device and as a hole transport layer in the light-receiving device. Similarly, an electron injection layer functions as an electron injection layer in the light-emitting device and as an electron transport layer in the light-receiving device. Furthermore, a layer shared by a light-receiving device and a light-emitting device may have the same function in the light-emitting device and in the light-receiving device. A hole transport layer functions as a hole transport layer in both the light-emitting device and the light-receiving device, and an electron transport layer functions as an electron transport layer in both the light-emitting device and the light-receiving device.
[0222] A mask layer 118a is located between the first layer 113a and the insulating layer 125, and a mask layer 118d is located between the fourth layer 113d and the insulating layer 125. The mask layer 118a is a remaining portion of a mask layer that was provided on the first layer 113a when the first layer 113a was processed. The mask layer 118d is a remaining portion of a mask layer that was provided in contact with the upper surface of the fourth layer 113d, which is a layer including an active layer, when the fourth layer 113d was processed. The mask layers 118a and 118d may be made of the same material or different materials.
[0223] 11A illustrates an example in which the aperture ratio (which can also be referred to as the size, the size of the light-emitting region, or the size of the light-receiving region) of the subpixel 110d is larger than that of the subpixels 110a, 110b, and 110c, but this is not a limitation of one embodiment of the present invention. The aperture ratios of the subpixels 110a, 110b, 110c, and 110d can be determined as appropriate. The aperture ratios of the subpixels 110a, 110b, 110c, and 110d may be different from one another, or two or more of the subpixels may be equal or approximately equal.
[0224] The subpixel 110d may have a higher aperture ratio than at least one of the subpixels 110a, 110b, and 110c. The larger light-receiving area of the subpixel 110d may facilitate detection of an object. For example, depending on the resolution of the display device and the circuit configuration of the subpixels, the aperture ratio of the subpixel 110d may be higher than the aperture ratios of the other subpixels.
[0225] Furthermore, the subpixel 110d may have a lower aperture ratio than at least one of the subpixels 110a, 110b, and 110c. If the light-receiving area of the subpixel 110d is small, the imaging range is narrowed, which makes it possible to suppress blurring in the imaging result and improve the resolution. This is preferable because it enables high-definition or high-resolution imaging.
[0226] In this way, the sub-pixel 110d can have a detection wavelength, resolution, and aperture ratio suited to the application.
[0227] In a display device according to one embodiment of the present invention, an EL layer is provided in an island shape for each light-emitting device, thereby suppressing leakage current between subpixels. This prevents crosstalk due to unintended light emission, resulting in a display device with extremely high contrast. Furthermore, the edges of the island-shaped EL layer, which may be damaged during the manufacturing process of the display device, and their vicinity are used as dummy regions and are not used as light-emitting regions, thereby suppressing variations in the characteristics of the light-emitting devices. Furthermore, by providing an insulating layer having a tapered edge between adjacent island-shaped EL layers, discontinuities during the formation of a common electrode are suppressed, and locally thin portions of the common electrode are prevented from being formed. This suppresses connection defects in the common layer and common electrode due to disconnected portions and increases in electrical resistance due to locally thin portions. This enables the display device according to one embodiment of the present invention to achieve both high resolution and high display quality.
[0228] This embodiment mode can be combined with other embodiment modes as appropriate. In addition, in this specification, when a plurality of configuration examples are shown in one embodiment mode, the configuration examples can be combined as appropriate.
[0229] 12 to 21. Note that with regard to materials and formation methods of elements, descriptions of the same parts as those described in Embodiment 1 may be omitted. In addition, details of the structure of a light-emitting device will be described in Embodiment 5.
[0230] 12 to 20 show a cross-sectional view taken along dashed dotted line X1-X2 and a cross-sectional view taken along dashed dotted line Y1-Y2 shown in Fig. 1A side by side. Fig. 21 shows an enlarged view of the end of insulating layer 127 and its vicinity.
[0231] Thin films (insulating films, semiconductor films, conductive films, etc.) constituting display devices can be formed using a sputtering method, a chemical vapor deposition (CVD) method, a vacuum evaporation method, a pulsed laser deposition (PLD) method, an atomic layer deposition (ALD) method, etc. CVD methods include a plasma enhanced chemical vapor deposition (PECVD) method and a thermal CVD method. One type of thermal CVD method is a metal organic chemical vapor deposition (MOCVD) method.
[0232] Furthermore, thin films (insulating films, semiconductor films, conductive films, etc.) constituting the display device can be formed by a wet film formation method such as spin coating, dipping, spray coating, inkjet, dispensing, screen printing, offset printing, doctor knife method, slit coating, roll coating, curtain coating, or knife coating.
[0233] In particular, vacuum processes such as vapor deposition and solution processes such as spin coating and inkjet printing can be used to fabricate light-emitting devices. Vapor deposition methods include physical vapor deposition (PVD) methods such as sputtering, ion plating, ion beam deposition, molecular beam deposition, and vacuum deposition, and chemical vapor deposition (CVD). In particular, functional layers included in the EL layer (hole injection layer, hole transport layer, hole blocking layer, light-emitting layer, electron blocking layer, electron transport layer, electron injection layer, charge generation layer, etc.) can be formed by vapor deposition (vacuum deposition, etc.), coating methods (dip coating, die coating, bar coating, spin coating, spray coating, etc.), printing methods (inkjet printing, screen (stencil printing), offset (lithographic printing), flexography (relief printing), gravure, microcontact printing, etc.), etc.
[0234] Furthermore, when processing the thin film that constitutes the display device, a photolithography method or the like can be used. Alternatively, the thin film may be processed by a nanoimprint method, a sandblasting method, a lift-off method, or the like. Furthermore, the island-shaped thin film may be directly formed by a film formation method using a shielding mask such as a metal mask.
[0235] There are two typical photolithography methods: one is to form a resist mask on the thin film to be processed, process the thin film by etching or the like, and then remove the resist mask; the other is to form a photosensitive thin film, and then process the thin film into the desired shape by exposure and development.
[0236] In photolithography, the light used for exposure may be, for example, i-line (wavelength 365 nm), g-line (wavelength 436 nm), h-line (wavelength 405 nm), or a mixture of these. Other light sources that can be used include ultraviolet light, KrF laser light, ArF laser light, etc. Exposure may also be performed by immersion exposure technology. Extreme ultraviolet (EUV) light or X-rays may also be used as the light used for exposure. An electron beam may also be used instead of the light used for exposure. Extreme ultraviolet light, X-rays, or an electron beam are preferred because they enable extremely fine processing. When exposure is performed by scanning a beam such as an electron beam, a photomask is not required.
[0237] For etching the thin film, dry etching, wet etching, sandblasting, or the like can be used.
[0238] First, an insulating layer 255a, an insulating layer 255b, and an insulating layer 255c are formed in this order over the layer 101 including the transistor. Then, pixel electrodes 111a, 111b, and 111c and a conductive layer 123 are formed over the insulating layer 255c (FIG. 12A). The conductive film that becomes the pixel electrode can be formed by, for example, sputtering or vacuum evaporation.
[0239] Next, it is preferable to perform a hydrophobic treatment on the pixel electrodes. The hydrophobic treatment can change the surface of the treatment target from hydrophilic to hydrophobic, or can increase the hydrophobicity of the surface of the treatment target. By performing the hydrophobic treatment on the pixel electrodes, the adhesion between the pixel electrodes and the film (here, film 113A) formed in a later process can be increased, and film peeling can be suppressed. Note that the hydrophobic treatment does not have to be performed.
[0240] The hydrophobic treatment can be performed by, for example, fluorine modification of the pixel electrodes. The fluorine modification can be performed by, for example, treatment with a fluorine-containing gas, heat treatment, plasma treatment in a fluorine-containing gas atmosphere, or the like. As the fluorine-containing gas, for example, fluorine gas can be used, and for example, fluorocarbon gas can be used. As the fluorocarbon gas, for example, carbon tetrafluoride (CF 4 ) Gas, C 4 F 6 Gas, C 2 F 6 Gas, C 4 F 8 Gas, C 5 F 8 As a gas containing fluorine, for example, SF 6 Gas, NF 3 Gas, CHF 3 Gases such as helium gas, argon gas, or hydrogen gas can be added to these gases as appropriate.
[0241] The surface of the pixel electrode can be hydrophobized by performing a plasma treatment on the surface of the pixel electrode in a gas atmosphere containing a Group 18 element such as argon, followed by a treatment using a silylating agent. Examples of the silylating agent that can be used include hexamethyldisilazane (HMDS) and trimethylsilylimidazole (TMSI). Furthermore, the surface of the pixel electrode can be hydrophobized by performing a plasma treatment on the surface of the pixel electrode in a gas atmosphere containing a Group 18 element such as argon, followed by a treatment using a silane coupling agent.
[0242] By performing plasma treatment on the surface of the pixel electrode in a gas atmosphere containing a Group 18 element such as argon, it is possible to damage the surface of the pixel electrode. This makes it easier for methyl groups contained in a silylating agent such as HMDS to bond to the surface of the pixel electrode. Also, silane coupling by a silane coupling agent is more likely to occur. As described above, by performing plasma treatment on the surface of the pixel electrode in a gas atmosphere containing a Group 18 element such as argon, and then performing treatment using a silylating agent or a silane coupling agent, it is possible to hydrophobize the surface of the pixel electrode.
[0243] Treatment using a silylating agent or a silane coupling agent can be performed by applying the silylating agent or the silane coupling agent using, for example, a spin coating method or a dipping method. Treatment using a silylating agent or a silane coupling agent can also be performed by, for example, using a vapor phase method to form a film containing a silylating agent or a film containing a silane coupling agent on a pixel electrode or the like. In the vapor phase method, first, a material containing a silylating agent or a material containing a silane coupling agent is volatilized to incorporate the silylating agent or the silane coupling agent into an atmosphere. Next, a substrate on which a pixel electrode or the like is formed is placed in this atmosphere. This allows a film containing the silylating agent or the silane coupling agent to be formed on the pixel electrode, thereby hydrophobizing the surface of the pixel electrode.
[0244] Subsequently, a film 113A, which will later become the first layer 113a, is formed on the pixel electrode (FIG. 12A).
[0245] 12A , in the cross-sectional view taken along dashed dotted line Y1-Y2, the film 113A is not formed on the conductive layer 123. For example, by using an area mask, the film 113A can be formed only in a desired region. By employing a film formation process using an area mask and a processing process using a resist mask, a light-emitting device can be fabricated through a relatively simple process.
[0246] As described in Embodiment 1, in the display device of one embodiment of the present invention, a material with high heat resistance is used for the light-emitting device. Specifically, the heat resistance temperature of each compound contained in the film 113A is preferably 100° C. or higher and 180° C. or lower, more preferably 120° C. or higher and 180° C. or lower, and further preferably 140° C. or higher and 180° C. or lower. This can improve the reliability of the light-emitting device. Furthermore, the upper limit of the temperature to which the display device can be subjected in the manufacturing process can be increased. Therefore, the range of choices for materials and formation methods used in the display device can be expanded, and the manufacturing yield and reliability can be improved.
[0247] The film 113A can be formed by, for example, a vapor deposition method, specifically a vacuum deposition method. Alternatively, the film 113A may be formed by a transfer method, a printing method, an inkjet method, a coating method, or the like.
[0248] Subsequently, a mask film 118A that will later become the mask layer 118a and a mask film 119A that will later become the mask layer 119a are formed in this order on the film 113A and the conductive layer 123 (FIG. 12A).
[0249] In this embodiment, an example is shown in which the mask film is formed with a two-layer structure of mask film 118A and mask film 119A, but the mask film may have a single-layer structure or a laminated structure of three or more layers.
[0250] By providing a mask layer over the film 113A, damage to the film 113A during the manufacturing process of the display device can be reduced, and the reliability of the light-emitting device can be improved.
[0251] The mask film 118A is made of a film that is highly resistant to the processing conditions of the film 113A, specifically, a film that has a large etching selectivity with respect to the film 113A. The mask film 119A is made of a film that has a large etching selectivity with respect to the mask film 118A.
[0252] Furthermore, the mask films 118A and 119A are formed at a temperature lower than the heat-resistant temperature of the film 113A. The substrate temperature when forming the mask films 118A and 119A is typically 200°C or lower, preferably 150°C or lower, more preferably 120°C or lower, more preferably 100°C or lower, and even more preferably 80°C or lower.
[0253] Examples of the heat resistance temperature index include a glass transition point, a softening point, a melting point, a thermal decomposition temperature, a 5% weight loss temperature, etc. The heat resistance temperature of the films 113A to 113C (i.e., the first to third layers 113a to 113c) can be any of these temperatures, preferably the lowest temperature among them.
[0254] As described above, in the display device of one embodiment of the present invention, a material with high heat resistance is used for the light-emitting device. Therefore, the substrate temperature during the formation of the mask film can be set to 100° C. or higher, 120° C. or higher, or 140° C. or higher. For example, the inorganic insulating film can be made denser and have a higher barrier property as the film formation temperature increases. Therefore, by forming the mask film at such a temperature, damage to the film 113A can be further reduced, and the reliability of the light-emitting device can be improved.
[0255] It is preferable to use a film that can be removed by wet etching for the mask film 118A and the mask film 119A. By using the wet etching method, damage to the film 113A during processing of the mask film 118A and the mask film 119A can be reduced compared to when using the dry etching method.
[0256] The mask films 118A and 119A can be formed by, for example, sputtering, ALD (including thermal ALD and PEALD), CVD, or vacuum deposition. Alternatively, the mask films 118A and 119A may be formed by the wet film formation method described above.
[0257] It is preferable that the mask film 118A formed on and in contact with the film 113A be formed using a formation method that causes less damage to the film 113A than the mask film 119A. For example, it is preferable to form the mask film 118A using the ALD method or the vacuum deposition method rather than the sputtering method.
[0258] The mask film 118A and the mask film 119A may each be made of one or more of a metal film, an alloy film, a metal oxide film, a semiconductor film, an organic insulating film, an inorganic insulating film, or the like.
[0259] The mask films 118A and 119A can each be made of a metal material such as gold, silver, platinum, magnesium, nickel, tungsten, chromium, molybdenum, iron, cobalt, copper, palladium, titanium, aluminum, yttrium, zirconium, or tantalum, or an alloy material containing such a metal material. It is particularly preferable to use a low-melting-point material such as aluminum or silver. Using a metal material capable of blocking ultraviolet rays for one or both of the mask films 118A and 119A is preferable because it can prevent ultraviolet rays from irradiating the film 113A and suppress deterioration of the film 113A.
[0260] Furthermore, using a metal film or an alloy film for one or both of the mask films 118A and 119A is preferable because it is possible to prevent plasma damage to the film 113A and to prevent deterioration of the film 113A. Specifically, it is possible to prevent plasma damage to the film 113A in processes using a dry etching method and ashing processes. In particular, it is preferable to use a metal film or an alloy film such as a tungsten film as the mask film 119A.
[0261] Furthermore, for the mask film 118A and the mask film 119A, metal oxides such as In—Ga—Zn oxide, indium oxide, In—Zn oxide, In—Sn oxide, indium titanium oxide (In—Ti oxide), indium tin zinc oxide (In—Sn—Zn oxide), indium titanium zinc oxide (In—Ti—Zn oxide), indium gallium tin zinc oxide (In—Ga—Sn—Zn oxide), and indium tin oxide containing silicon can be used, respectively.
[0262] In addition, instead of the above gallium, an element M (M is one or more elements selected from aluminum, silicon, boron, yttrium, copper, vanadium, beryllium, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, and magnesium) may be used.
[0263] Furthermore, a film containing a material that has light-shielding properties, particularly against ultraviolet light, can be used as the mask film. For example, a film that is reflective to ultraviolet light or a film that absorbs ultraviolet light can be used. As the light-shielding material, various materials can be used, such as metals, insulators, semiconductors, and semimetals that have light-shielding properties against ultraviolet light. However, since part or all of the mask film will be removed in a later process, it is preferable that the film be a film that can be processed by etching, and particularly that it has good processability.
[0264] For example, semiconductor materials such as silicon or germanium can be used as materials that are highly compatible with semiconductor manufacturing processes. Alternatively, oxides or nitrides of the above semiconductor materials can be used. Alternatively, non-metallic (semi-metallic) materials such as carbon or compounds thereof can be used. Alternatively, metals such as titanium, tantalum, tungsten, chromium, and aluminum, or alloys containing one or more of these, can be used. Alternatively, oxides containing the above metals, such as titanium oxide or chromium oxide, or nitrides such as titanium nitride, chromium nitride, or tantalum nitride can be used.
[0265] By using a film containing a material having ultraviolet light blocking properties as the mask film, it is possible to prevent the EL layer from being exposed to ultraviolet light during the exposure process, etc. By preventing the EL layer from being damaged by ultraviolet light, the reliability of the light-emitting device can be improved.
[0266] The same effect can be achieved when a film containing a material that blocks ultraviolet light is used as the material for the insulating film 125A described later.
[0267] Furthermore, the mask films 118A and 119A can each be made of various inorganic insulating films that can be used for the protective layer 131. In particular, oxide insulating films are preferable because they have higher adhesion to the film 113A than nitride insulating films. For example, inorganic insulating materials such as aluminum oxide, hafnium oxide, and silicon oxide can each be used for the mask films 118A and 119A. For example, aluminum oxide films can be formed as the mask films 118A and 119A using the ALD method. Using the ALD method is preferable because it can reduce damage to the underlying layer (especially the EL layer).
[0268] For example, an inorganic insulating film (e.g., an aluminum oxide film) formed using the ALD method can be used as the mask film 118A, and an inorganic film (e.g., an In-Ga-Zn oxide film, a silicon film, or a tungsten film) formed using the sputtering method can be used as the mask film 119A.
[0269] The same inorganic insulating film can be used for both the mask film 118A and the insulating layer 125 to be formed later. For example, an aluminum oxide film formed using an ALD method can be used for both the mask film 118A and the insulating layer 125. The mask film 118A and the insulating layer 125 may be formed under the same or different film-forming conditions. For example, by forming the mask film 118A under the same conditions as the insulating layer 125, the mask film 118A can be an insulating layer with high barrier properties against at least one of water and oxygen. On the other hand, since the mask film 118A is a layer that will be largely or completely removed in a later process, it is preferable that it be easily processed. Therefore, it is preferable that the mask film 118A be formed under conditions where the substrate temperature during film formation is lower than that of the insulating layer 125.
[0270] An organic material may be used for one or both of the mask films 118A and 119A. For example, the organic material may be a material that is soluble in a solvent that is chemically stable with respect to at least the uppermost film 113A. Materials that dissolve in water or alcohol are particularly suitable. When forming a film of such a material, it is preferable to apply the material dissolved in a solvent such as water or alcohol by a wet film formation method, and then perform a heat treatment to evaporate the solvent. In this case, performing the heat treatment under a reduced pressure atmosphere is preferable because it allows the solvent to be removed at a low temperature in a short time, thereby reducing thermal damage to the film 113A.
[0271] The mask film 118A and the mask film 119A may each be made of an organic resin such as polyvinyl alcohol (PVA), polyvinyl butyral, polyvinylpyrrolidone, polyethylene glycol, polyglycerin, pullulan, water-soluble cellulose, alcohol-soluble polyamide resin, or a fluororesin such as a perfluoropolymer.
[0272] For example, the mask film 118A can be an organic film (e.g., a PVA film) formed using either a vapor deposition method or the above-mentioned wet film formation method, and the mask film 119A can be an inorganic film (e.g., a silicon nitride film) formed using a sputtering method.
[0273] As described in Embodiment 1, in the display device of one embodiment of the present invention, part of the mask film may remain as a mask layer.
[0274] Subsequently, a resist mask 190a is formed on the mask film 119A (FIG. 12A). The resist mask 190a can be formed by applying a photosensitive resin (photoresist) and then performing exposure and development.
[0275] The resist mask 190a may be made of either a positive resist material or a negative resist material.
[0276] The resist mask 190a is provided in a position overlapping with the pixel electrode 111a. The resist mask 190a is preferably provided also in a position overlapping with the conductive layer 123. This can prevent the conductive layer 123 from being damaged during the manufacturing process of the display device. Note that the resist mask 190a does not necessarily have to be provided on the conductive layer 123.
[0277] 12A , the resist mask 190a is preferably provided so as to cover the end of the film 113A to the end of the conductive layer 123 (the end on the film 113A side). This ensures that the ends of the mask layers 118a and 119a overlap with the end of the film 113A even after the mask films 118A and 119A are processed. Furthermore, because the mask layers 118a and 119a are provided so as to cover the end of the film 113A to the end of the conductive layer 123 (the end on the film 113A side), exposure of the insulating layer 255c can be prevented even after the film 113A is processed (see the cross-sectional view between Y1 and Y2 in FIG. 13B ). This prevents the insulating layers 255a to 255c and parts of the insulating layers included in the transistor-containing layer 101 from being removed by etching or the like, thereby preventing exposure of the conductive layers included in the transistor-containing layer 101. Therefore, it is possible to prevent the conductive layer from being unintentionally electrically connected to another conductive layer, and for example, it is possible to prevent a short circuit between the conductive layer and the common electrode 115.
[0278] Next, a resist mask 190a is used to remove a portion of the mask film 119A, forming a mask layer 119a (FIG. 12B). The mask layer 119a remains on the pixel electrode 111a and the conductive layer 123. The resist mask 190a is then removed (FIG. 12C). Next, using the mask layer 119a as a mask (also referred to as a hard mask), a portion of the mask film 118A is removed, forming a mask layer 118a (FIG. 13A).
[0279] The mask films 118A and 119A can be processed by wet etching or dry etching, respectively, and are preferably processed by anisotropic etching.
[0280] Compared to the case of using dry etching, the use of wet etching can reduce damage to the film 113A during processing of the mask films 118A and 119A. When using wet etching, it is preferable to use, for example, a developer, a tetramethylammonium hydroxide (TMAH) aqueous solution, dilute hydrofluoric acid, oxalic acid, phosphoric acid, acetic acid, nitric acid, or a mixed solution containing two or more of these.
[0281] In processing the mask film 119A, since the film 113A is not exposed, the range of processing methods to be selected is wider than in processing the mask film 118A. Specifically, even when a gas containing oxygen is used as an etching gas in processing the mask film 119A, deterioration of the film 113A can be further suppressed.
[0282] Furthermore, when dry etching is used to process the mask film 118A, deterioration of the film 113A can be suppressed by not using a gas containing oxygen as the etching gas. 4 , C 4 F 8 , SF 6 , CHF 3 , Cl 2 , H 2 O, BCl 3 It is preferable to use a gas containing a noble gas (also called a rare gas) such as He as the etching gas.
[0283] For example, when an aluminum oxide film formed by the ALD method is used as the mask film 118A, CHF 3 and He or CHF 3 and He and CH 4 The mask film 118A can be processed by dry etching using a diluted phosphoric acid solution. When an In-Ga-Zn oxide film formed by sputtering is used as the mask film 119A, the mask film 119A can be processed by wet etching using a diluted phosphoric acid solution. 4 The mask film 119A may be processed by dry etching using diluted phosphoric acid and Ar. Alternatively, the mask film 119A may be processed by wet etching using diluted phosphoric acid. When a tungsten film formed by sputtering is used as the mask film 119A, SF 6 , C.F. 4 and O 2 , or CF 4 and Cl 2 and O 2 The mask film 119A can be processed by dry etching using the above.
[0284] The resist mask 190a can be removed by, for example, ashing using oxygen plasma. Alternatively, ashing using oxygen gas and CF 4 , C 4 F 8 , SF 6 , CHF 3 , Cl 2 , H 2 O, BCl 3 Alternatively, a noble gas such as He may be used. Alternatively, the resist mask 190a may be removed by wet etching. At this time, the mask film 118A is located on the outermost surface and the film 113A is not exposed, so that damage to the film 113A can be suppressed in the process of removing the resist mask 190a. This also broadens the range of options for removing the resist mask 190a.
[0285] Subsequently, the film 113A is processed to form the first layer 113a. For example, the mask layer 119a and the mask layer 118a are used as hard masks to remove a portion of the film 113A, thereby forming the first layer 113a (FIG. 13B).
[0286] 13B, a laminated structure of the first layer 113a, the mask layer 118a, and the mask layer 119a remains on the pixel electrode 111a, and the pixel electrodes 111b and 111c are exposed.
[0287] The film 113A is preferably processed by anisotropic etching, particularly anisotropic dry etching, or wet etching.
[0288] FIG. 13B shows an example of processing the film 113A by dry etching. In the dry etching apparatus, the etching gas is converted into plasma. Therefore, the surface of the display device being fabricated is exposed to the plasma (plasma 121a). Here, using a metal film or an alloy film for one or both of the mask layers 118a and 119a is preferable because it can prevent damage caused by the plasma to the remaining portion of the film 113A (the portion that will become the first layer 113a) and suppress deterioration of the first layer 113a. In particular, it is preferable to use a metal film or an alloy film, such as a tungsten film, as the mask layer 119a.
[0289] When dry etching is used, deterioration of the film 113A can be suppressed by not using a gas containing oxygen as the etching gas.
[0290] Alternatively, a gas containing oxygen may be used as the etching gas. When the etching gas contains oxygen, the etching rate can be increased. Therefore, etching can be performed under low power conditions while maintaining a sufficiently high etching rate. This can suppress damage to the film 113A. Furthermore, problems such as adhesion of reaction products that occur during etching can be suppressed.
[0291] When dry etching is used, for example, H 2 , C.F. 4 , C4 F 8 , SF 6 , CHF 3 , Cl 2 , H 2 O, BCl 3 It is preferable to use a gas containing one or more of the noble gases such as He and Ar as the etching gas. Alternatively, it is preferable to use a gas containing one or more of these and oxygen as the etching gas. Alternatively, oxygen gas may be used as the etching gas. Specifically, for example, H 2 and a gas containing Ar, or CF 4 A gas containing CF and He can be used as an etching gas. 4 A gas containing H, He, and oxygen can be used as the etching gas. 2 A gas containing Ar and a gas containing oxygen can be used as the etching gas.
[0292] The dry etching apparatus may be a dry etching apparatus having a high-density plasma source. Examples of the dry etching apparatus having a high-density plasma source include an inductively coupled plasma (ICP) etching apparatus. Alternatively, a capacitively coupled plasma (CCP) etching apparatus having parallel-plate electrodes may be used. The capacitively coupled plasma etching apparatus having parallel-plate electrodes may be configured to apply a high-frequency voltage to one of the parallel-plate electrodes. Alternatively, it may be configured to apply multiple different high-frequency voltages to one of the parallel-plate electrodes. Alternatively, it may be configured to apply a high-frequency voltage of the same frequency to each of the parallel-plate electrodes. Alternatively, it may be configured to apply high-frequency voltages of different frequencies to each of the parallel-plate electrodes.
[0293] 13B shows an example in which the edge of the first layer 113a is positioned outside the edge of the pixel electrode 111a. This configuration can increase the aperture ratio of the pixel. Although not shown in FIG. 13B, the etching process may form a recess in a region of the insulating layer 255c that does not overlap with the first layer 113a.
[0294] Furthermore, because the first layer 113a covers the top and side surfaces of the pixel electrode 111a, subsequent processes can be performed without exposing the pixel electrode 111a. If the edges of the pixel electrode 111a are exposed, corrosion may occur during etching processes, etc. Products resulting from corrosion of the pixel electrode 111a may be unstable, dissolving in solution during wet etching, or scattering into the atmosphere during dry etching. Dissolving the products into solution or scattering into the atmosphere may result in the products adhering to, for example, the processed surface and the side surfaces of the first layer 113a, potentially adversely affecting the characteristics of the light-emitting device or forming leak paths between multiple light-emitting devices. Furthermore, in regions where the edges of the pixel electrode 111a are exposed, the adhesion between adjacent layers may be reduced, potentially making the first layer 113a or the pixel electrode 111a more susceptible to peeling.
[0295] Therefore, by configuring the first layer 113a to cover the upper and side surfaces of the pixel electrode 111a, it is possible to improve, for example, the yield and characteristics of the light-emitting device.
[0296] Furthermore, as described in the first embodiment, the first layer 113a covers the upper and side surfaces of the pixel electrode 111a, thereby providing a dummy region in the first layer 113a outside the light-emitting region (the region between the pixel electrode 111a and the common electrode 115). Here, the end of the first layer 113a may be damaged during processing of the film 113A. Furthermore, the end of the first layer 113a may be exposed to plasma and damaged in a subsequent process (see plasma 121b in FIG. 15A and plasma 121c in FIG. 15C). Because the end of the first layer 113a and its vicinity are dummy regions and not used as light-emitting regions, even if they are damaged, they are unlikely to adversely affect the characteristics of the light-emitting device. Meanwhile, because the light-emitting region of the first layer 113a is covered by a mask layer, it is not exposed to plasma, and plasma damage is sufficiently reduced. The mask layer is preferably provided not only to cover the upper surface of the flat portion of the first layer 113a that overlaps with the upper surface of the pixel electrode 111a, but also to cover the upper surfaces of the inclined portion and flat portion located outside the upper surface of the pixel electrode 111a. In this way, a portion of the first layer 113a that is less susceptible to damage during the manufacturing process is used as the light-emitting region, thereby realizing a light-emitting device with high light-emitting efficiency and long life.
[0297] In the region corresponding to the connection portion 140, the laminated structure of the mask layer 118a and the mask layer 119a remains on the conductive layer 123.
[0298] 13B , the mask layers 118a and 119a are provided to cover the ends of the first layer 113a and the conductive layer 123, and the top surface of the insulating layer 255c is not exposed. Therefore, the insulating layers 255a to 255c and parts of the insulating layers included in the layer 101 including the transistors are removed by etching or the like, which can prevent the conductive layers included in the layer 101 including the transistors from being exposed. Therefore, the conductive layers can be prevented from being unintentionally electrically connected to other conductive layers.
[0299] As described above, in one embodiment of the present invention, the resist mask 190a is formed over the mask film 119A, and part of the mask film 119A is removed using the resist mask 190a to form the mask layer 119a. Then, part of the film 113A is removed using the mask layer 119a as a hard mask to form the first layer 113a. Therefore, it can be said that the first layer 113a is formed by processing the film 113A by photolithography. Note that part of the film 113A may be removed using the resist mask 190a. Then, the resist mask 190a may be removed.
[0300] Next, it is preferable to perform a hydrophobic treatment on the pixel electrode. When processing the film 113A, the surface state of the pixel electrode may change to a hydrophilic state. By performing a hydrophobic treatment on the pixel electrode, it is possible to improve the adhesion between the pixel electrode and a film (here, film 113B) to be formed in a later process, and to suppress film peeling. Note that the hydrophobic treatment is not necessarily required.
[0301] Subsequently, a film 113B, which will later become the second layer 113b, is formed on the pixel electrodes 111b and 111c and on the mask layer 119a (FIG. 13C).
[0302] Film 113B can be formed using methods similar to those that can be used to form film 113A.
[0303] Next, a mask film 118B, which will later become mask layer 118b, and a mask film 119B, which will later become mask layer 119b, are formed in this order on film 113B, and then a resist mask 190b is formed (FIG. 13C). The materials and formation methods for mask films 118B and 119B are the same as those applicable to mask films 118A and 119A. The materials and formation methods for resist mask 190b are the same as those applicable to resist mask 190a.
[0304] The resist mask 190b is provided at a position overlapping the pixel electrode 111b.
[0305] Next, a resist mask 190b is used to remove a portion of the mask film 119B, forming a mask layer 119b (FIG. 14A). The mask layer 119b remains on the pixel electrode 111b. The resist mask 190b is then removed (FIG. 14B). Next, using the mask layer 119b as a mask, a portion of the mask film 118B is removed, forming a mask layer 118b (FIG. 14C). Next, the film 113B is processed to form the second layer 113b. For example, using the mask layer 119b and the mask layer 118b as a hard mask, a portion of the film 113B is removed, forming the second layer 113b (FIG. 15A).
[0306] FIG. 15A shows an example of processing the film 113B by dry etching. The surface of the display device being fabricated is exposed to plasma (plasma 121b). Here, using a metal or alloy film for one or both of the mask layers 118a and 119a is preferable because it can prevent plasma damage to the first layer 113a and suppress deterioration of the first layer 113a. Furthermore, using a metal or alloy film for one or both of the mask layers 118b and 119b is preferable because it can prevent plasma damage to the remaining portion of the film 113B (the second layer 113b) and suppress deterioration of the second layer 113b. In particular, it is preferable to use a metal or alloy film, such as a tungsten film, as the mask layer 119b.
[0307] 15A, a laminated structure of the second layer 113b, the mask layer 118b, and the mask layer 119b remains on the pixel electrode 111b, and the mask layer 119a and the pixel electrode 111c are exposed.
[0308] Next, it is preferable to perform a hydrophobic treatment on the pixel electrode. When processing the film 113B, the surface state of the pixel electrode may change to a hydrophilic state. By performing a hydrophobic treatment on the pixel electrode, it is possible to improve the adhesion between the pixel electrode and a film (here, film 113C) to be formed in a later process, and to suppress film peeling. Note that the hydrophobic treatment is not necessarily required.
[0309] Subsequently, a film 113C that will later become the third layer 113c is formed on the pixel electrode 111c and the mask layers 119a and 119b (FIG. 15B).
[0310] Film 113C can be formed using methods similar to those that can be used to form film 113A.
[0311] Next, a mask film 118C, which will later become the mask layer 118c, and a mask film 119C, which will later become the mask layer 119c, are formed in this order on the film 113C, and then a resist mask 190c is formed (FIG. 15B). The materials and formation methods of the mask films 118C and 119C are the same as those applicable to the mask films 118A and 119A. The materials and formation methods of the resist mask 190c are the same as those applicable to the resist mask 190a.
[0312] The resist mask 190c is provided at a position overlapping the pixel electrode 111c.
[0313] Next, a resist mask 190c is used to remove a portion of the mask film 119C, forming a mask layer 119c. The mask layer 119c remains on the pixel electrode 111c. The resist mask 190c is then removed. Next, using the mask layer 119c as a mask, a portion of the mask film 118C is removed, forming a mask layer 118c. Next, the film 113C is processed to form a third layer 113c. For example, using the mask layer 119c and the mask layer 118c as a hard mask, a portion of the film 113C is removed, forming the third layer 113c (FIG. 15C).
[0314] FIG. 15C shows an example of processing the film 113C by dry etching. The surface of the display device being fabricated is exposed to plasma (plasma 121c). Here, using a metal or alloy film for one or both of the mask layers 118a and 119a, and one or both of the mask layers 118b and 119b, respectively, is preferable because it can prevent plasma damage to the first layer 113a and the second layer 113b and suppress deterioration of the first layer 113a and the second layer 113b. Furthermore, using a metal or alloy film for one or both of the mask layers 118c and 119c is preferable because it can prevent plasma damage to the remaining portion of the film 113C (the third layer 113c) and suppress deterioration of the third layer 113c. In particular, it is preferable to use a metal or alloy film, such as a tungsten film, as the mask layer 119c.
[0315] 15C, a laminated structure of the third layer 113c, the mask layer 118c, and the mask layer 119c remains on the pixel electrode 111c, and the mask layers 119a and 119b are exposed.
[0316] Note that the side surfaces of the first layer 113 a, the second layer 113 b, and the third layer 113 c are preferably perpendicular or substantially perpendicular to the surface on which they are to be formed. For example, the angle formed between the surface on which they are to be formed and the side surfaces is preferably 60° to 90°.
[0317] As described above, the distance between any two adjacent layers of the first layer 113a, the second layer 113b, and the third layer 113c formed by photolithography can be narrowed to 8 μm or less, 5 μm or less, 3 μm or less, 2 μm or less, or 1 μm or less. Here, the distance can be defined, for example, as the distance between any two adjacent opposing ends of the first layer 113a, the second layer 113b, and the third layer 113c. By narrowing the distance between the island-shaped EL layers in this manner, a display device with high definition and a large aperture ratio can be provided.
[0318] As shown in FIGS. 11A and 11B , when a display device having both a light-emitting device and a light-receiving device is fabricated, the fourth layer 113d of the light-receiving device is formed in the same order as the first to third layers 113a to 113c. The order in which the first to fourth layers 113a to 113d are formed is not particularly limited. For example, by forming a layer with high adhesion to the pixel electrode first, film peeling during the process can be suppressed. For example, if the first to third layers 113a to 113c have higher adhesion to the pixel electrode than the fourth layer 113d, it is preferable to form the first to third layers 113a to 113c first. Furthermore, the thickness of the layer formed first may affect the distance between the substrate and a mask for defining the film formation area in the subsequent layer formation process. By forming the thinner layer first, shadowing (the formation of a layer in a shadow area) can be suppressed. For example, when forming a light-emitting device with a tandem structure, the first to third layers 113a to 113c are often thicker than the fourth layer 113d, so it is preferable to form the fourth layer 113d first. Furthermore, when a film is formed by a wet process using a polymer material, it is preferable to form the film first. For example, when a polymer material is used for the active layer, it is preferable to form the fourth layer 113d first. As described above, by determining the order of formation depending on the material, film formation method, etc., it is possible to increase the yield in manufacturing display devices.
[0319] Next, it is preferable to remove the mask layers 119a, 119b, and 119c ( FIG. 16A ). Depending on the subsequent process, the mask layers 118a, 118b, 118c, 119a, 119b, and 119c may remain on the display device. By removing the mask layers 119a, 119b, and 119c at this stage, it is possible to prevent the mask layers 119a, 119b, and 119c from remaining on the display device. For example, if a conductive material is used for the mask layers 119a, 119b, and 119c, removing the mask layers 119a, 119b, and 119c in advance can prevent the generation of leakage current and the formation of capacitance due to the remaining mask layers 119a, 119b, and 119c.
[0320] In this embodiment, the case where the mask layers 119 a, 119 b, and 119 c are removed will be described as an example, but the mask layers 119 a, 119 b, and 119 c do not have to be removed. For example, if the mask layers 119 a, 119 b, and 119 c contain the aforementioned material that blocks ultraviolet light, it is preferable to proceed to the next step without removing the mask layers, as this can protect the island-shaped EL layer from ultraviolet light.
[0321] The mask layer removal step can be performed using the same method as the mask layer processing step. In particular, by using a wet etching method, damage to the first layer 113 a, the second layer 113 b, and the third layer 113 c during mask layer removal can be reduced compared to when a dry etching method is used.
[0322] When a metal film or an alloy film is used for the mask layers 119a, 119b, and 119c, the mask layers 119a, 119b, and 119c can prevent plasma damage to the EL layer. Therefore, the film can be processed using a dry etching method until the mask layers 119a, 119b, and 119c are removed. However, in the process of removing the mask layers 119a, 119b, and 119c and in the processes thereafter, the film that prevents plasma damage to the EL layer is no longer present. Therefore, it is preferable to process the film using a method that does not use plasma, such as a wet etching method.
[0323] The mask layer may also be removed by dissolving it in a solvent such as water or alcohol, such as ethyl alcohol, methyl alcohol, isopropyl alcohol (IPA), or glycerin.
[0324] After removing the mask layers, drying treatment may be performed to remove water contained in the first layer 113a, the second layer 113b, and the third layer 113c and water adsorbed to the surfaces of the first layer 113a, the second layer 113b, and the third layer 113c. For example, heat treatment can be performed in an inert gas atmosphere such as a nitrogen atmosphere or a reduced-pressure atmosphere. The heat treatment can be performed at a substrate temperature of 50°C or higher and 200°C or lower, preferably 60°C or higher and 150°C or lower, and more preferably 70°C or higher and 120°C or lower. A reduced-pressure atmosphere is preferable because drying can be performed at a lower temperature.
[0325] Next, an insulating film 125A, which will later become the insulating layer 125, is formed to cover the pixel electrode, the first layer 113a, the second layer 113b, the third layer 113c, the mask layer 118a, the mask layer 118b, and the mask layer 118c (Figure 16A).
[0326] As will be described later, the insulating film 127a is formed in contact with the upper surface of the insulating film 125A. Therefore, it is preferable that the upper surface of the insulating film 125A has high adhesion to the resin composition (e.g., a photosensitive resin composition containing an acrylic resin) used for the insulating film 127a. To improve this adhesion, it is preferable to perform a surface treatment to hydrophobize (or increase the hydrophobicity of) the upper surface of the insulating film 125A. For example, it is preferable to perform the treatment using a silylating agent such as hexamethyldisilazane (HMDS). By hydrophobizing the upper surface of the insulating film 125A in this way, the insulating film 127a can be formed with good adhesion. The surface treatment may be the hydrophobization treatment described above.
[0327] Subsequently, an insulating film 127a is formed on the insulating film 125A (FIG. 16B).
[0328] The insulating films 125A and 127a are preferably formed by a method that causes less damage to the first layer 113a, the second layer 113b, and the third layer 113c. In particular, since the insulating film 125A is formed in contact with the side surfaces of the first layer 113a, the second layer 113b, and the third layer 113c, it is preferably formed by a method that causes less damage to the first layer 113a, the second layer 113b, and the third layer 113c than the insulating film 127a.
[0329] The insulating films 125A and 127a are formed at a temperature lower than the heat-resistant temperatures of the first layer 113a, the second layer 113b, and the third layer 113c, respectively. By increasing the substrate temperature during film formation, the insulating film 125A can have a low impurity concentration and a high barrier property against at least one of water and oxygen, even if it is thin.
[0330] The substrate temperature when forming the insulating film 125A and the insulating film 127a is preferably 60°C or higher, 80°C or higher, 100°C or higher, or 120°C or higher, and 200°C or lower, 180°C or lower, 160°C or lower, 150°C or lower, or 140°C or lower, respectively.
[0331] As described above, in the display device of one embodiment of the present invention, a material with high heat resistance is used for the light-emitting device. Therefore, the substrate temperatures during the formation of the insulating films 125A and 127a can be set to 100° C. or higher, 120° C. or higher, or 140° C. or higher, respectively. For example, the higher the deposition temperature of an inorganic insulating film, the denser the film can be and the higher the barrier property it can have. Therefore, by depositing the insulating film 125A at such a temperature, damage to the first layer 113a, the second layer 113b, and the third layer 113c can be further reduced, thereby improving the reliability of the light-emitting device.
[0332] As the insulating film 125A, it is preferable to form an insulating film having a thickness of 3 nm or more, 5 nm or more, or 10 nm or more, and 200 nm or less, 150 nm or less, 100 nm or less, or 50 nm or less within the above substrate temperature range.
[0333] The insulating film 125A is preferably formed by, for example, an ALD method. The ALD method is preferable because it can reduce film formation damage and form a film with high coverage. The insulating film 125A is preferably formed as an aluminum oxide film by, for example, an ALD method.
[0334] Alternatively, the insulating film 125A may be formed by a sputtering method, a CVD method, or a PECVD method, which have a faster film formation rate than an ALD method. This enables a highly reliable display device to be manufactured with high productivity.
[0335] The insulating film 127a is preferably formed by the wet deposition method described above. For example, the insulating film 127a is preferably formed by spin coating using a photosensitive resin, more specifically, using a photosensitive resin composition containing an acrylic resin.
[0336] Furthermore, heat treatment (also referred to as pre-baking) is preferably performed after the insulating film 127a is formed. The heat treatment is performed at a temperature lower than the upper temperature limits of the first layer 113a, the second layer 113b, and the third layer 113c. The substrate temperature during the heat treatment is preferably 50° C. or higher and 200° C. or lower, more preferably 60° C. or higher and 150° C. or lower, and even more preferably 70° C. or higher and 120° C. or lower. This allows the solvent contained in the insulating film 127a to be removed.
[0337] 16C, exposure is performed at the connection portion 140. Specifically, visible light or ultraviolet light is irradiated onto a part of the insulating film 127a at the connection portion 140, causing the part of the insulating film 127a to be exposed to light.
[0338] When a positive photosensitive resin composition containing an acrylic resin is used for the insulating film 127a, a mask 132a is used to irradiate visible light or ultraviolet light to regions where the insulating layer 127 will not be formed in a later step. The insulating layer 127 is formed in a region sandwiched between any two of the pixel electrodes 111a, 111b, and 111c, and around the conductive layer 123. Therefore, as shown in Fig. 16C, a mask 132a is used to irradiate visible light or ultraviolet light to regions of the insulating film 127a that overlap with the conductive layer 123.
[0339] The light used for exposure preferably contains i-line (wavelength 365 nm), and may contain at least one of g-line (wavelength 436 nm) and h-line (wavelength 405 nm).
[0340] 16C shows an example in which a positive photosensitive resin is used for the insulating film 127a and visible light or ultraviolet light is irradiated onto the region where the insulating layer 127 is not formed, but the present invention is not limited to this. For example, a negative photosensitive resin may be used for the insulating film 127a. In this case, visible light or ultraviolet light is irradiated onto the region where the insulating layer 127 is formed.
[0341] 17A, development is performed to remove the exposed areas of the insulating film 127a, forming an insulating layer 127b. The insulating layer 127b is formed over the entire display area and in the area surrounding the conductive layer 123. When an acrylic resin is used for the insulating film 127a, it is preferable to use an alkaline solution as the developer, such as a tetramethylammonium hydroxide (TMAH) aqueous solution.
[0342] The developing method is not particularly limited, and a dip method, a spin method, a paddle method, a vibration method, or the like can be used. Note that, in order to stabilize the etching rate, it is preferable to apply a method in which a new solution is constantly supplied. Alternatively, it is preferable to apply a method in which the supply and retention (development) of the solution are repeated (also called a step paddle method). The step paddle method is preferable because it can reduce the amount of solution consumed and stabilize the etching rate compared to a method in which a new solution is constantly supplied.
[0343] Subsequently, residues (so-called scum) remaining after development may be removed, for example, by ashing using oxygen plasma.
[0344] 17B , an etching process is performed using insulating layer 127b as a mask to remove a portion of insulating film 125A, forming insulating layer 125B, and thinning the thickness of a portion of mask layer 118a in connection portion 140. In connection portion 140, the surface of the thin portion of mask layer 118a is exposed. Note that, hereinafter, the etching process using insulating layer 127b as a mask may be referred to as a first etching process.
[0345] The first etching treatment can be performed by dry etching or wet etching. Note that it is preferable to form the insulating film 125A using the same material as the mask layer 118a because the first etching treatment can be performed in one step.
[0346] When dry etching is performed, it is preferable to use a chlorine-based gas. 2 , BCl 3 , SiCl 4 , and CCl 4 These gases can be used alone or in combination of two or more. Furthermore, the chlorine-based gas can be appropriately mixed with one or more of oxygen gas, hydrogen gas, helium gas, and argon gas. By using dry etching, thin regions of the mask layer 118 a can be formed with good in-plane uniformity.
[0347] Furthermore, the first etching process is preferably performed by wet etching. By using wet etching, damage to the first layer 113a, the second layer 113b, and the third layer 113c can be reduced compared to when dry etching is used. Furthermore, by using the same method and apparatus as those used in the second etching process described below, the process can be simplified. For example, wet etching can be performed using an alkaline solution. For example, for wet etching of an aluminum oxide film, it is preferable to use an aqueous solution of tetramethylammonium hydroxide (TMAH), which is an alkaline solution. In this case, wet etching can be performed by the paddle method. Furthermore, it is preferable to use the step-paddle method described above.
[0348] As shown in FIG. 17B , the first etching process does not completely remove the mask layer 118a, but stops when the film thickness is reduced. The mask layer 118a in the connection portion 140 is also processed in the second and third etching processes described below. If the mask layer 118a is completely removed in the first etching process, the insulating layer 125B and the mask layer below the end of the insulating layer 127 may be removed by side etching in the second and third etching processes, resulting in the formation of a cavity. Leaving the mask layer 118a on the conductive layer 123 in this way prevents excessive etching of the mask layer 118a and damage to the conductive layer 123 in subsequent processes.
[0349] 17B shows a configuration in which the thickness of the mask layer 118a is thinned, but the present invention is not limited to this. For example, depending on the thickness of the insulating film 125A and the thickness of the mask layer 118a, the first etching process may be stopped after only thinning a portion of the insulating film 125A. Furthermore, if the insulating film 125A is formed using the same material as the mask layer 118a, the boundary between the insulating film 125A and the mask layer 118a may become unclear, making it impossible to determine whether the insulating film 125A has been removed or remains with a thin thickness, and whether the thickness of the mask layer 118a has been thinned.
[0350] 17B shows an example in which the shape of insulating layer 127b is unchanged from that of FIG. 17A, but the present invention is not limited to this. For example, the end of insulating layer 127b may droop and cover the end of insulating layer 125B. Also, for example, the end of insulating layer 127b may contact the upper surface of mask layer 118a. As described above, if the developed insulating layer 127b is not exposed to light, the shape of insulating layer 127b may be easily changed.
[0351] 17C, exposure is performed in the display area. Specifically, visible light or ultraviolet light is irradiated onto a part of the insulating layer 127b in the display area, causing the part of the insulating layer 127b to be exposed to light.
[0352] As described above, the insulating layer 127 is formed in the region sandwiched between any two of the pixel electrodes 111a, 111b, and 111c, and around the conductive layer 123. Therefore, as shown in Fig. 17C, visible light or ultraviolet light is irradiated onto the pixel electrodes 111a, 111b, and 111c using a mask 132b.
[0353] The width of the insulating layer 127 to be formed later can be controlled by the region to be exposed to light. In this embodiment, the insulating layer 127 is processed so as to have a portion overlapping with the upper surface of the pixel electrode (FIGS. 2A and 2B). As shown in FIG. 6A or 6B, the insulating layer 127 does not necessarily have a portion overlapping with the upper surface of the pixel electrode.
[0354] The light used for exposure can be the same as that used in the step shown in FIG. 16C.
[0355] Here, by providing a barrier insulating layer against oxygen (e.g., an aluminum oxide film) as one or both of the mask layer 118 (mask layers 118a, 118b, and 118c) and the insulating film 125A, diffusion of oxygen into the first layer 113a, the second layer 113b, and the third layer 113c can be reduced. When the EL layer is irradiated with light (visible light or ultraviolet light), organic compounds contained in the EL layer are excited, which may promote a reaction with oxygen contained in the atmosphere. More specifically, when the EL layer is irradiated with light (visible light or ultraviolet light) in an oxygen-containing atmosphere, oxygen may bond to the organic compounds contained in the EL layer. By providing the mask layer 118 and the insulating film 125A on the island-shaped EL layer, binding of oxygen in the atmosphere to the organic compounds contained in the EL layer can be reduced.
[0356] 18A and 21A, development is performed to remove the exposed areas of the insulating layer 127b, forming an insulating layer 127c. Note that Fig. 21A is an enlarged view of the second layer 113b and the end of the insulating layer 127c and its vicinity shown in Fig. 18A. The insulating layer 127c is formed in a region sandwiched between any two of the pixel electrodes 111a, 111b, and 111c, and in a region surrounding the conductive layer 123.
[0357] Subsequently, residues (so-called scum) remaining after development may be removed, for example, by ashing using oxygen plasma.
[0358] In order to adjust the height of the surface of the insulating layer 127c, etching may be performed. The insulating layer 127c may be processed by ashing using oxygen plasma, for example.
[0359] Next, as shown in FIGS. 18B and 21B, an etching process is performed using the insulating layer 127c as a mask to remove a portion of the insulating layer 125B and thin the film thickness of a portion of the mask layers 118a, 118b, and 118c. This results in the formation of the insulating layer 125 below the insulating layer 127c. Furthermore, the surfaces of the thin portions of the mask layers 118a, 118b, and 118c are exposed. Note that FIG. 21B is an enlarged view of the second layer 113b and the end and vicinity of the insulating layer 127c shown in FIG. 18B. Note that hereinafter, the etching process using the insulating layer 127c as a mask may be referred to as the second etching process.
[0360] The second etching treatment can be performed by dry etching or wet etching. Note that if the insulating film 125A is formed using the same material as the mask layers 118a, 118b, and 118c, the second etching treatment can be performed all at once, which is preferable. The second etching treatment is preferably performed using the same method as the first etching treatment.
[0361] As shown in FIG. 21B, by performing etching using insulating layer 127b, which has tapered side surfaces, as a mask, the side surfaces of insulating layer 125 and the upper end portions of the side surfaces of mask layers 118a, 118b, and 118c can be tapered relatively easily.
[0362] The second etching treatment is preferably performed by wet etching, because wet etching can reduce damage to the first layer 113 a, the second layer 113 b, and the third layer 113 c compared to dry etching.
[0363] 18B and 21B , in the second etching process, the mask layers 118 a, 118 b, and 118 c are not completely removed, and the etching process is stopped when the film thickness is reduced. In this way, by leaving the corresponding mask layers 118 a, 118 b, and 118 c on the first layer 113 a, the second layer 113 b, and the third layer 113 c, it is possible to prevent the first layer 113 a, the second layer 113 b, and the third layer 113 c from being damaged in subsequent processing steps.
[0364] 18B and 21B illustrate a configuration in which the thicknesses of the mask layers 118a, 118b, and 118c are thinned, but the present invention is not limited thereto. For example, depending on the thicknesses of the insulating film 125A and the mask layers 118a, 118b, and 118c, the second etching process may be stopped before the insulating layer 125B is processed into the insulating layer 125. Specifically, the second etching process may be stopped after only a portion of the insulating layer 125B is thinned. Furthermore, if the insulating film 125A is formed using the same material as the mask layers 118a, 118b, and 118c, the boundary between the insulating film 125A (and the same for the insulating layer 125B and the insulating layer 125) and the mask layers 118a, 118b, and 118c may become unclear, making it impossible to determine whether the insulating layer 125 has been formed or whether the thicknesses of the mask layers 118a, 118b, and 118c have been thinned.
[0365] 18B and 21B show an example in which the shape of the insulating layer 127c is unchanged from that of FIGS. 18A and 21A, but the present invention is not limited to this. For example, the end of the insulating layer 127c may droop and cover the end of the insulating layer 125. Also, for example, the end of the insulating layer 127c may contact the upper surfaces of the mask layers 118a, 118b, and 118c. As described above, if the developed insulating layer 127c is not exposed to light, the shape of the insulating layer 127c may be easily changed.
[0366] 18B shows an example in which, in the second etching process, mask layer 118a in connection portion 140 is completely removed, exposing conductive layer 123. The present invention is not limited to this, and at the stage of FIG. 18B, there may be a portion in connection portion 140 where mask layer 118a has a thin film thickness, and conductive layer 123 may not be exposed.
[0367] Here, consider a case where the insulating film 127a is exposed to light and developed in the same process for the display section and the connection section 140. Specifically, visible light or ultraviolet light is irradiated onto the pixel electrodes 111a, 111b, and 111c, and onto the conductive layer 123, through the insulating film 127a shown in FIG. 16B. Then, development is performed, forming an insulating layer 127c in the region sandwiched between any two of the pixel electrodes 111a, 111b, and 111c, and around the conductive layer 123 (FIG. 18C). Next, etching is performed on the insulating film 125A to remove portions of the insulating film 125A between the display section and the connection section 140.
[0368] Since the etching process is performed before post-baking, there may be limitations on the equipment and methods that can be used. For example, it is preferable to perform the etching process of the insulating film 125A by a puddle method using a developing device and a developing solution. This allows the insulating film 125A to be processed without adding any new equipment in addition to the equipment used for exposure, development, and post-baking. For example, when an aluminum oxide film is used as the insulating film 125A, the insulating film 125A can be processed by wet etching using a developing solution containing TMAH.
[0369] Here, wet etching is preferably performed using a method that consumes minimal amounts of etching solution, such as a paddle etching method. The etching area of the insulating film 125A in the connection portion 140 is significantly larger than the etching area of the insulating film 125A in the display portion. Therefore, for example, with a paddle etching method, the supply rate of the etchant is limited in the connection portion 140, and the etching rate is likely to be lower than in the display portion. If a difference in etching rate occurs between the display portion and the connection portion 140, stable processing of the insulating film 125A cannot be performed. For example, if the etching time is set to match the etching rate in the connection portion 140, the insulating film 125A in the display portion may be over-etched. Furthermore, if the etching time is set to match the etching rate in the display portion, the insulating film 125A in the connection portion 140 may not be sufficiently etched, resulting in residual etching. On the other hand, methods that constantly supply new etching solution to prevent differences in etching rate (e.g., a spin etching method) consume a large amount of etching solution.
[0370] Therefore, as described above, in the manufacturing method of the display device of one embodiment of the present invention, the insulating film 127a in the connection portion 140 is exposed to light and developed separately from the insulating layer 127b in the display portion. This allows the etching conditions (etching time, etc.) of the insulating film 125A to be controlled independently for the connection portion 140 and the display portion. This prevents excessive etching of the insulating film 125A in the display portion and insufficient etching of the insulating film 125A in the connection portion 140, and enables the insulating film 125A to be processed into a desired shape.
[0371] Next, the entire substrate is exposed to visible light or ultraviolet light, and the insulating layer 127c is preferably irradiated with the light (FIG. 18C). The energy density of the exposure is 0 mJ / cm. 2 Larger than 800 mJ / cm 2 It is preferable that the dose is 0 mJ / cm or less. 2 Greater than 500 mJ / cm 2It is more preferable to perform the following. By performing such exposure after development, the transparency of the insulating layer 127c can be improved in some cases. Furthermore, the substrate temperature required for heat treatment to transform the insulating layer 127c into a tapered shape in a later step can be reduced in some cases.
[0372] If a resin that hardens or accelerates hardening by light irradiation is used as the material for the insulating layer 127, the insulating layer 127 can be sufficiently hardened and its shape stability can be improved by irradiating it with light at least once after development.
[0373] Here, by providing an oxygen barrier insulating layer (e.g., an aluminum oxide film) as the mask layers 118a, 118b, and 118c, diffusion of oxygen into the first layer 113a, the second layer 113b, and the third layer 113c can be reduced. When the EL layer is irradiated with light (visible light or ultraviolet light), the organic compound contained in the EL layer becomes excited, which may promote a reaction with oxygen contained in the atmosphere. More specifically, when the EL layer is irradiated with light (visible light or ultraviolet light) in an oxygen-containing atmosphere, oxygen may bond to the organic compound contained in the EL layer. By providing the mask layers 118a, 118b, and 118c on the island-shaped EL layer, binding of oxygen in the atmosphere to the organic compound contained in the EL layer can be reduced.
[0374] On the other hand, as will be described later, not exposing the insulating layer 127c to light may make it easier to change the shape of the insulating layer 127c or to transform the insulating layer 127 into a tapered shape in a later process. Furthermore, the taper angle of the end of the insulating layer 127 may become smaller. Furthermore, the end of the insulating layer 127 may cover the entire side surface of the mask layer, or may even be located outside the end of the mask layer. Therefore, it may be preferable not to expose the insulating layer 127c or 127 after development.
[0375] For example, if a photocurable resin is used as the material for the insulating layer 127c, exposing the insulating layer 127c to light initiates polymerization, thereby hardening the insulating layer 127c. At this stage, the insulating layer 127c may not be exposed to light, and at least one of the post-baking and the third etching process described below may be performed while the insulating layer 127c remains in a relatively shape-deformable state. This prevents the formation of irregularities on the surfaces on which the common layer 114 and the common electrode 115 are formed, and also prevents the common layer 114 and the common electrode 115 from being broken apart. The insulating layer 127c (or the insulating layer 127) may be exposed to light after the post-baking, the third etching process, the formation of the common electrode, or the formation of the protective layer 131. Exposure may be performed after development and before the first or second etching process. On the other hand, depending on the material of the insulating layer 127c (e.g., a positive-tone material) and the conditions of the etching process, exposure may cause the insulating layer 127b or the insulating layer 127c to dissolve in the etching solution during the etching process. Therefore, it is preferable to perform exposure after the second etching process and before post-baking. This allows the insulating layer 127 to be produced in a desired shape with high reproducibility and stability.
[0376] Here, the irradiation of visible light or ultraviolet light shown in FIG. 18C is preferably performed in an oxygen-free atmosphere or an atmosphere with a low oxygen content. For example, the irradiation of visible light or ultraviolet light is preferably performed in an inert gas atmosphere such as a nitrogen atmosphere, a reduced-pressure atmosphere with a reduced oxygen content compared to the air atmosphere, or a pressurized atmosphere with a reduced oxygen content compared to the air atmosphere. If the irradiation of visible light or ultraviolet light is performed in an oxygen-rich atmosphere, the compounds contained in the EL layer may be oxidized and deteriorated. However, by performing the irradiation of visible light or ultraviolet light in an oxygen-free atmosphere or an oxygen-low atmosphere, deterioration of the EL layer can be prevented, thereby providing a display device with higher reliability. The same applies to the exposure processes shown in FIGS. 16C and 17C.
[0377] Next, heat treatment (also referred to as post-baking) is performed. As shown in FIGS. 19A and 21C, heat treatment can transform the insulating layer 127c into an insulating layer 127 having tapered side surfaces. As described above, the shape of the insulating layer 127c may already change and have tapered side surfaces when the second etching treatment is completed. The heat treatment is performed at a temperature lower than the heat resistance temperature of the EL layer. The heat treatment can be performed at a substrate temperature of 50° C. to 200° C., preferably 60° C. to 150° C., and more preferably 70° C. to 130° C. The heating atmosphere may be an air atmosphere or an inert gas atmosphere. The heating atmosphere may be an atmospheric pressure atmosphere or a reduced-pressure atmosphere. A reduced-pressure atmosphere is preferable because drying can be performed at a lower temperature. The substrate temperature in this heat treatment is preferably higher than that in the heat treatment (pre-baking) performed after the formation of the insulating film 127a. This improves the adhesion between insulating layer 127 and insulating layer 125, and also improves the corrosion resistance of insulating layer 127. Note that Fig. 21C is an enlarged view of second layer 113b and the end of insulating layer 127 and its vicinity shown in Fig. 19A.
[0378] As described above, in the display device of one embodiment of the present invention, a material with high heat resistance is used for the light-emitting device. Therefore, the pre-baking temperature and the post-baking temperature can be set to 100° C. or higher, 120° C. or higher, or 140° C. or higher, respectively. This can further improve the adhesion between the insulating layer 127 and the insulating layer 125 and the corrosion resistance of the insulating layer 127. Furthermore, the range of materials that can be used for the insulating layer 127 can be broadened. Furthermore, by sufficiently removing the solvent and the like contained in the insulating layer 127, impurities such as water and oxygen can be prevented from entering the EL layer.
[0379] By not completely removing the mask layers 118a, 118b, and 118c in the first etching process and leaving the mask layers 118a, 118b, and 118c in a thinner state, the first layer 113a, the second layer 113b, and the third layer 113c can be prevented from being damaged and deteriorated in the heat treatment, thereby improving the reliability of the light-emitting device.
[0380] Depending on the material of the insulating layer 127 and the temperature, time, and atmosphere of the post-baking, a concave curved shape may be formed on the side surface of the insulating layer 127, as shown in Figures 4A and 4B. For example, the higher the temperature or the longer the post-baking time, the more likely the shape of the insulating layer 127 is to change, and a concave curved shape may be formed. Furthermore, as described above, if the developed insulating layer 127c is not exposed to light, the shape of the insulating layer 127 may be more likely to change during post-baking.
[0381] Next, as shown in FIGS. 19B and 21D , an etching process is performed using the insulating layer 127 as a mask to remove portions of the mask layers 118a, 118b, and 118c. Note that a portion of the insulating layer 125 may also be removed. As a result, openings are formed in the mask layers 118a, 118b, and 118c, respectively, exposing the top surfaces of the first layer 113a, the second layer 113b, the third layer 113c, and the conductive layer 123. Note that FIG. 21D is an enlarged view of the second layer 113b and the end of the insulating layer 127 and their vicinity shown in FIG. 19B . Note that hereinafter, the etching process using the insulating layer 127 as a mask may be referred to as the third etching process.
[0382] The end of insulating layer 125 is covered with insulating layer 127. Also, Figures 19B and 21D show an example in which part of the end of mask layer 118b (specifically, the tapered portion formed by the second etching process) is covered with insulating layer 127, and the tapered portion formed by the third etching process is exposed. In other words, this corresponds to the structure shown in Figures 2A and 2B.
[0383] If the insulating layer 125 and the mask layer are etched together after post-baking without performing the first and second etching processes, side etching may cause the insulating layer 125 and the mask layer below the edge of the insulating layer 127 to disappear, forming a cavity. Such a cavity may cause unevenness on the surface on which the common layer 114 and the common electrode 115 are formed, making the common layer 114 and the common electrode 115 more likely to be discontinuous. Even if side etching of the insulating layer 125 and the mask layer occurs during the first or second etching process, post-baking can subsequently fill the cavity with the insulating layer 127. The subsequent third etching process etches the thinner mask layer, reducing the amount of side etching and making it less likely for cavities to form. Even if cavities do form, they can be extremely small. This allows for a smoother surface on which the common layer 114 and the common electrode 115 are formed.
[0384] 3A, 3B, 5A, and 5B, the insulating layer 127 may cover the entire end of the mask layer 118b. For example, the end of the insulating layer 127 may droop and cover the end of the mask layer 118b. Furthermore, for example, the end of the insulating layer 127 may contact the top surface of at least one of the first layer 113a, the second layer 113b, and the third layer 113c. As described above, if the developed insulating layer 127b is not exposed to light, the shape of the insulating layer 127 may be easily deformed.
[0385] The second etching treatment is preferably performed by wet etching. By using a wet etching method, damage to the first layer 113 a, the second layer 113 b, and the third layer 113 c can be reduced compared to when a dry etching method is used. Wet etching can be performed using an alkaline solution or the like.
[0386] As described above, by providing the insulating layer 127, the insulating layer 125, the mask layer 118a, the mask layer 118b, and the mask layer 118c, it is possible to prevent poor connection between the light-emitting devices due to disconnection of the common layer 114 and the common electrode 115 and an increase in electrical resistance due to a locally thin portion of the film thickness. As a result, the display device of one embodiment of the present invention can have improved display quality.
[0387] Furthermore, after exposing parts of the first layer 113a, the second layer 113b, and the third layer 113c, further heat treatment may be performed. This heat treatment can remove water contained in the EL layer and water adsorbed to the surface of the EL layer. Furthermore, this heat treatment may change the shape of the insulating layer 127. Specifically, the insulating layer 127 may expand to cover at least one of the ends of the insulating layer 125, the ends of the mask layers 118a, 118b, and 118c, and the top surfaces of the first layer 113a, the second layer 113b, and the third layer 113c. For example, the insulating layer 127 may have the shape shown in FIGS. 3A and 3B. For example, heat treatment can be performed in an inert gas atmosphere or a reduced-pressure atmosphere. The heat treatment can be performed at a substrate temperature of 50° C. to 200° C., preferably 60° C. to 150° C., more preferably 70° C. to 120° C. A reduced pressure atmosphere is preferable because it allows dehydration at a lower temperature. However, it is preferable to appropriately set the temperature range for the heat treatment, taking into consideration the heat resistance temperature of the EL layer. In addition, when taking into consideration the heat resistance temperature of the EL layer, a temperature of 70°C or higher and 120°C or lower is particularly suitable within the above temperature range.
[0388] Next, the common layer 114 and the common electrode 115 are formed in this order on the insulating layer 127, the first layer 113a, the second layer 113b, and the third layer 113c (FIG. 20A), and further, the protective layer 131 is formed (FIG. 20B). Then, the substrate 120 is attached to the protective layer 131 using the resin layer 122, thereby completing the display device (FIG. 1B).
[0389] The common layer 114 can be formed by a method such as a vapor deposition method (including a vacuum deposition method), a transfer method, a printing method, an inkjet method, or a coating method.
[0390] For example, sputtering or vacuum deposition can be used to form the common electrode 115. Alternatively, a film formed by deposition and a film formed by sputtering may be stacked.
[0391] The protective layer 131 can be formed by vacuum deposition, sputtering, CVD, ALD, or the like.
[0392] As described above, in the manufacturing method of the display device of this embodiment, the island-shaped first layer 113a, the island-shaped second layer 113b, and the island-shaped third layer 113c are formed by forming a film over the entire surface and then processing it, rather than using a fine metal mask. Therefore, each layer can be formed to a uniform thickness. This allows a high-resolution display device or a display device with a high aperture ratio to be realized. Furthermore, even if the resolution or aperture ratio is high and the distance between subpixels is extremely short, the first layer 113a, the second layer 113b, and the third layer 113c can be prevented from contacting each other in adjacent subpixels. Therefore, leakage current between subpixels can be suppressed. This prevents crosstalk due to unintended light emission, and a display device with extremely high contrast can be realized.
[0393] Furthermore, by providing the insulating layer 127 having a tapered edge between adjacent island-shaped EL layers, it is possible to suppress the occurrence of a step during the formation of the common electrode 115 and to prevent the formation of a locally thin portion in the common electrode 115. This can suppress the occurrence of a connection failure due to the disconnected portion in the common layer 114 and the common electrode 115 and an increase in electrical resistance due to the locally thin portion. Therefore, the display device of one embodiment of the present invention can achieve both high definition and high display quality.
[0394] Furthermore, by performing exposure and development of the film that will become insulating layer 127 separately for the display section and the connection section 140, the processing conditions for the film that will become insulating layer 125 can be controlled independently for the display section and the connection section 140. This allows insulating layer 125 to be processed into a desired shape, reducing manufacturing defects in the display device.
[0395] This embodiment mode can be combined with other embodiment modes as appropriate.
[0396] Embodiment 3 In this embodiment, a display device of one embodiment of the present invention will be described with reference to FIGS. 22 and 23. FIG.
[0397] [Pixel Layout] In this embodiment, pixel layouts different from that shown in FIG. 1A will be mainly described. There are no particular limitations on the arrangement of sub-pixels, and various methods can be applied. Examples of sub-pixel arrangements include a stripe arrangement, an S-stripe arrangement, a matrix arrangement, a delta arrangement, a Bayer arrangement, and a pentile arrangement.
[0398] The top surface shape of the sub-pixels shown in the drawings in this embodiment corresponds to the top surface shape of the light-emitting region (or light-receiving region).
[0399] Furthermore, the layout of the circuits constituting the sub-pixels is not limited to the range of the sub-pixels shown in the drawings, and may be arranged outside of the range.
[0400] An S-stripe arrangement is applied to the pixel 110 shown in Fig. 22A. The pixel 110 shown in Fig. 22A is composed of three sub-pixels, 110a, 110b, and 110c.
[0401] The pixel 110 shown in Figure 22B includes a subpixel 110a having a substantially triangular or trapezoidal top surface shape with rounded corners, a subpixel 110b having a substantially triangular or trapezoidal top surface shape with rounded corners, and a subpixel 110c having a substantially rectangular or hexagonal top surface shape with rounded corners. Furthermore, the subpixel 110b has a larger light-emitting area than the subpixel 110a. In this manner, the shape and size of each subpixel can be determined independently. For example, the more reliable the light-emitting device, the smaller the size of the subpixel can be.
[0402] The Pentile arrangement is applied to the pixels 124a and 124b shown in Fig. 22C. Fig. 22C shows an example in which a pixel 124a having sub-pixels 110a and 110b and a pixel 124b having sub-pixels 110b and 110c are arranged alternately.
[0403] 22D and 22E are pixels 124a and 124b that have a delta arrangement. Pixel 124a has two subpixels (subpixels 110a and 110b) in the top row (first row) and one subpixel (subpixel 110c) in the bottom row (second row). Pixel 124b has one subpixel (subpixel 110c) in the top row (first row) and two subpixels (subpixels 110a and 110b) in the bottom row (second row).
[0404] FIG. 22D shows an example in which each subpixel has a substantially rectangular top surface shape with rounded corners, and FIG. 22E shows an example in which each subpixel has a circular top surface shape.
[0405] 22F shows an example in which subpixels of each color are arranged in a zigzag pattern. Specifically, when viewed from above, the positions of the upper sides of two subpixels aligned in the column direction (for example, subpixels 110a and 110b, or subpixels 110b and 110c) are misaligned.
[0406] 22A to 22F, it is preferable that the subpixel 110a be the subpixel R that emits red light, the subpixel 110b be the subpixel G that emits green light, and the subpixel 110c be the subpixel B that emits blue light. Note that the configuration of the subpixels is not limited to this, and the colors that the subpixels emit and their order of arrangement can be determined appropriately. For example, the subpixel 110b may be the subpixel R that emits red light, and the subpixel 110a may be the subpixel G that emits green light.
[0407] In photolithography, the finer the pattern to be processed, the more significant the effect of light diffraction becomes. This reduces the fidelity of the photomask pattern when it is transferred by exposure, making it difficult to process the resist mask into the desired shape. Therefore, even if the photomask pattern is rectangular, it is likely to have rounded corners. As a result, the top surface shape of the subpixel may become a polygon with rounded corners, an ellipse, a circle, or the like.
[0408] Furthermore, in a manufacturing method of a display device according to one embodiment of the present invention, the EL layer is processed into an island shape using a resist mask. The resist film formed on the EL layer needs to be cured at a temperature lower than the heat resistance temperature of the EL layer. Therefore, depending on the heat resistance temperature of the material for the EL layer and the curing temperature of the resist material, the resist film may not be cured sufficiently. A resist film that is not cured sufficiently may have a shape that deviates from the desired shape during processing. As a result, the top surface shape of the EL layer may become a polygon with rounded corners, an ellipse, a circle, or the like. For example, when a resist mask with a square top surface shape is formed, a resist mask with a circular top surface shape may be formed, resulting in a circular top surface shape of the EL layer.
[0409] In order to form the top surface of the EL layer into a desired shape, a technique for correcting a mask pattern in advance (OPC (Optical Proximity Correction) technique) may be used so that the design pattern and the transfer pattern coincide with each other. Specifically, the OPC technique adds a correction pattern to the corners of figures on the mask pattern.
[0410] As shown in Figures 23A to 23I, a pixel can be configured to have four types of sub-pixels.
[0411] The pixels 110 shown in FIGS. 23A to 23C are arranged in a stripe pattern.
[0412] Figure 23A is an example in which each subpixel has a rectangular top surface shape, Figure 23B is an example in which each subpixel has a top surface shape that is a combination of two semicircles and a rectangle, and Figure 23C is an example in which each subpixel has an elliptical top surface shape.
[0413] The pixels 110 shown in FIGS. 23D to 23F are arranged in a matrix.
[0414] Figure 23D is an example in which each sub-pixel has a square top surface shape, Figure 23E is an example in which each sub-pixel has an approximately square top surface shape with rounded corners, and Figure 23F is an example in which each sub-pixel has a circular top surface shape.
[0415] 23G and 23H show an example in which one pixel 110 is configured in two rows and three columns.
[0416] 23G has three subpixels (subpixels 110a, 110b, and 110c) in the top row (first row) and one subpixel (subpixel 110d) in the bottom row (second row). In other words, pixel 110 has subpixel 110a in the left column (first column), subpixel 110b in the center column (second column), subpixel 110c in the right column (third column), and subpixels 110d across these three columns.
[0417] The pixel 110 shown in FIG. 23H has three subpixels (subpixels 110a, 110b, and 110c) in the top row (first row) and three subpixels 110d in the bottom row (second row). In other words, the pixel 110 has subpixels 110a and 110d in the left column (first column), subpixels 110b and 110d in the center column (second column), and subpixels 110c and 110d in the right column (third column). By aligning the subpixels in the top and bottom rows as shown in FIG. 23H , it is possible to efficiently remove dust and other particles that may occur during the manufacturing process. Therefore, a display device with high display quality can be provided.
[0418] FIG. 23I shows an example in which one pixel 110 is configured in three rows and two columns.
[0419] 23I has subpixel 110a in the top row (first row), subpixel 110b in the middle row (second row), subpixel 110c across the first and second rows, and one subpixel (subpixel 110d) in the bottom row (third row). In other words, pixel 110 has subpixels 110a and 110b in the left column (first column), subpixel 110c in the right column (second column), and subpixel 110d across these two columns.
[0420] The pixel 110 shown in FIGS. 23A to 23I is composed of four sub-pixels 110a, 110b, 110c, and 110d.
[0421] The sub-pixels 110a, 110b, 110c, and 110d may each have a light-emitting device that emits light of a different color, such as sub-pixels of four colors R, G, B, and white (W), sub-pixels of four colors R, G, B, and Y, or sub-pixels of R, G, B, and infrared (IR).
[0422] 23A to 23I, it is preferable that the subpixel 110a be the subpixel R that emits red light, the subpixel 110b be the subpixel G that emits green light, the subpixel 110c be the subpixel B that emits blue light, and the subpixel 110d be any one of the subpixels W that emit white light, Y that emit yellow light, and IR that emit near-infrared light. With such a configuration, the pixel 110 shown in FIGS. 23G and 23H has a stripe layout of R, G, and B, thereby improving display quality. Furthermore, the pixel 110 shown in FIG. 23I has a so-called S-stripe layout of R, G, and B, thereby improving display quality.
[0423] The pixel 110 may also have sub-pixels that include light-receiving devices.
[0424] In each pixel 110 shown in FIGS. 23A to 23I, any one of the subpixels 110a to 110d may be a subpixel having a light-receiving device.
[0425] 23A to 23I , it is preferable that, for example, the subpixel 110a be the subpixel R that emits red light, the subpixel 110b be the subpixel G that emits green light, the subpixel 110c be the subpixel B that emits blue light, and the subpixel 110d be the subpixel S that has a light-receiving device. With this configuration, the pixels 110 shown in FIGS. 23G and 23H have a stripe layout of R, G, and B, which can improve display quality. Furthermore, the pixel 110 shown in FIG. 23I has a so-called S-stripe layout of R, G, and B, which can improve display quality.
[0426] The wavelength of light detected by the subpixel S having the light receiving device is not particularly limited. The subpixel S can be configured to detect either or both of visible light and infrared light.
[0427] As shown in Figures 23J and 23K, a pixel can be configured to have five types of sub-pixels.
[0428] FIG. 23J shows an example in which one pixel 110 is configured in two rows and three columns.
[0429] 23J has three subpixels (subpixels 110a, 110b, and 110c) in the top row (first row) and two subpixels (subpixels 110d and 110e) in the bottom row (second row). In other words, pixel 110 has subpixels 110a and 110d in the left column (first column), subpixel 110b in the center column (second column), subpixel 110c in the right column (third column), and subpixel 110e from the second column to the third column.
[0430] FIG. 23K shows an example in which one pixel 110 is configured in three rows and two columns.
[0431] 23K has subpixel 110a in the top row (first row), subpixel 110b in the middle row (second row), subpixel 110c across rows 1 and 2, and two subpixels (subpixels 110d and 110e) in the bottom row (third row). In other words, pixel 110 has subpixels 110a, 110b, and 110d in the left column (first column), and subpixels 110c and 110e in the right column (second column).
[0432] 23J and 23K, it is preferable that the subpixel 110a be the subpixel R that emits red light, the subpixel 110b be the subpixel G that emits green light, and the subpixel 110c be the subpixel B that emits blue light. In this configuration, the pixel 110 shown in FIG. 23J has a stripe layout of R, G, and B, which can improve display quality. Furthermore, the pixel 110 shown in FIG. 23K has a so-called S-stripe layout of R, G, and B, which can improve display quality.
[0433] 23J and 23K, it is preferable to use a subpixel S having a light-receiving device in at least one of the subpixels 110d and 110e. When a light-receiving device is used in both the subpixels 110d and 110e, the configurations of the light-receiving devices may be different from each other. For example, the wavelength ranges of light detected may be at least partially different from each other. Specifically, one of the subpixels 110d and 110e may have a light-receiving device that mainly detects visible light, and the other may have a light-receiving device that mainly detects infrared light.
[0434] 23J and 23K, it is preferable that one of the subpixels 110d and 110e is a subpixel S having a light-receiving device, and the other is a subpixel having a light-emitting device that can be used as a light source. For example, it is preferable that one of the subpixels 110d and 110e is a subpixel IR that emits infrared light, and the other is a subpixel S having a light-receiving device that detects infrared light.
[0435] In a pixel having sub-pixels R, G, B, IR, and S, an image can be displayed using the sub-pixels R, G, and B, while the sub-pixel IR can be used as a light source to detect reflected infrared light emitted by the sub-pixel IR at the sub-pixel S.
[0436] As described above, the display device of one embodiment of the present invention can employ various layouts for a pixel having a subpixel including a light-emitting device. Furthermore, the display device of one embodiment of the present invention can employ a pixel having both a light-emitting device and a light-receiving device. In this case, various layouts can also be employed.
[0437] This embodiment mode can be combined with other embodiment modes as appropriate.
[0438] Embodiment 4 In this embodiment, a display device of one embodiment of the present invention will be described with reference to FIGS.
[0439] The display device of the present embodiment can be a high-definition display device, and can therefore be used, for example, as a display unit for a wristwatch-type or bracelet-type information terminal (wearable device), as well as a display unit for a wearable device that can be worn on the head, such as a head-mounted display (HMD) for VR, or a glasses-type AR device.
[0440] The display device of this embodiment can be a high-resolution display device or a large-sized display device. Therefore, the display device of this embodiment can be used in electronic devices having relatively large screens, such as television devices, desktop or notebook personal computers, computer monitors, digital signage, and large game machines such as pachinko machines, as well as in display units of digital cameras, digital video cameras, digital photo frames, mobile phones, portable game machines, personal digital assistants, and sound reproducing devices.
[0441] 24A shows a perspective view of a display module 280. The display module 280 includes a display device 100A and an FPC 290. Note that the display device included in the display module 280 is not limited to the display device 100A, and may be any of the display devices 100B to 100F described below.
[0442] The display module 280 has a substrate 291 and a substrate 292. The display module 280 has a display portion 281. The display portion 281 is a region that displays an image in the display module 280, and is a region where light from each pixel provided in a pixel portion 284 (described later) can be viewed.
[0443] 24B is a perspective view schematically illustrating the configuration on the substrate 291 side. A circuit portion 282, a pixel circuit portion 283 on the circuit portion 282, and a pixel portion 284 on the pixel circuit portion 283 are stacked on the substrate 291. A terminal portion 285 for connecting to the FPC 290 is provided in a portion of the substrate 291 that does not overlap with the pixel portion 284. The terminal portion 285 and the circuit portion 282 are electrically connected by a wiring portion 286 composed of a plurality of wirings.
[0444] The pixel section 284 has a plurality of periodically arranged pixels 284a. An enlarged view of one pixel 284a is shown on the right side of Fig. 24B. The various configurations described in the previous embodiments can be applied to the pixel 284a. Fig. 24B shows an example in which the pixel 284a has a configuration similar to that of the pixel 110 shown in Fig. 1A.
[0445] The pixel circuit section 283 has a plurality of pixel circuits 283a arranged periodically.
[0446] One pixel circuit 283a is a circuit that controls the driving of multiple elements included in one pixel 284a. One pixel circuit 283a can be configured to have three circuits that control the light emission of one light-emitting device. For example, the pixel circuit 283a can be configured to have at least one selection transistor, one current control transistor (drive transistor), and a capacitor for each light-emitting device. In this case, a gate signal is input to the gate of the selection transistor, and a source signal is input to the source. This realizes an active matrix display device.
[0447] The circuit portion 282 includes a circuit for driving each pixel circuit 283 a of the pixel circuit portion 283. For example, the circuit portion 282 preferably includes one or both of a gate line driver circuit and a source line driver circuit. In addition, the circuit portion 282 may include at least one of an arithmetic circuit, a memory circuit, a power supply circuit, and the like.
[0448] The FPC 290 functions as wiring for supplying a video signal, a power supply potential, or the like from the outside to the circuit portion 282. An IC may be mounted on the FPC 290.
[0449] The display module 280 can be configured such that one or both of the pixel circuit unit 283 and the circuit unit 282 are provided overlapping below the pixel unit 284, thereby enabling the aperture ratio (effective display area ratio) of the display unit 281 to be extremely high. For example, the aperture ratio of the display unit 281 can be 40% or more and less than 100%, preferably 50% or more and 95% or less, and more preferably 60% or more and 95% or less. Furthermore, the pixels 284a can be arranged at an extremely high density, enabling the resolution of the display unit 281 to be extremely high. For example, it is preferable that the pixels 284a be arranged in the display unit 281 at a resolution of 2000 ppi or more, preferably 3000 ppi or more, more preferably 5000 ppi or more, and even more preferably 6000 ppi or more, and 20,000 ppi or less, or 30,000 ppi or less.
[0450] Because such a display module 280 has extremely high resolution, it can be suitably used in VR devices such as HMDs or eyeglass-type AR devices. For example, even in a configuration in which the display unit of the display module 280 is viewed through lenses, the display module 280 has an extremely high-resolution display unit 281, so even when the display unit is enlarged with lenses, the pixels are not visible, allowing for a highly immersive display. Furthermore, the display module 280 is not limited to this, and can be suitably used in electronic devices with relatively small displays. For example, it can be suitably used in the display unit of a wearable electronic device such as a wristwatch.
[0451] Display Device 100A A display device 100A shown in FIG. 25A includes a substrate 301, a light-emitting device 130R, a light-emitting device 130G, a light-emitting device 130B, a capacitor 240, and a transistor 310. The display device 100A shown in FIG.
[0452] 24A and 24B. The stacked structure from the substrate 301 to the insulating layer 255c corresponds to the layer 101 including the transistor in Embodiment 1.
[0453] The transistor 310 has a channel formation region in a substrate 301. The substrate 301 can be, for example, a semiconductor substrate such as a single crystal silicon substrate. The transistor 310 includes a part of the substrate 301, a conductive layer 311, a low-resistance region 312, an insulating layer 313, and an insulating layer 314. The conductive layer 311 functions as a gate electrode. The insulating layer 313 is located between the substrate 301 and the conductive layer 311 and functions as a gate insulating layer. The low-resistance region 312 is a region in which the substrate 301 is doped with impurities and functions as one of a source and a drain. The insulating layer 314 is provided to cover a side surface of the conductive layer 311.
[0454] An element isolation layer 315 is provided between two adjacent transistors 310 so as to be embedded in the substrate 301 .
[0455] In addition, an insulating layer 261 is provided to cover the transistor 310 , and a capacitor 240 is provided over the insulating layer 261 .
[0456] The capacitor 240 has a conductive layer 241, a conductive layer 245, and an insulating layer 243 located therebetween. The conductive layer 241 functions as one electrode of the capacitor 240, the conductive layer 245 functions as the other electrode of the capacitor 240, and the insulating layer 243 functions as a dielectric of the capacitor 240.
[0457] The conductive layer 241 is provided over the insulating layer 261 and is buried in the insulating layer 254. The conductive layer 241 is electrically connected to one of the source and drain of the transistor 310 by a plug 271 buried in the insulating layer 261. The insulating layer 243 is provided to cover the conductive layer 241. The conductive layer 245 is provided in a region overlapping with the conductive layer 241 with the insulating layer 243 interposed therebetween.
[0458] Note that at least one of the conductive layer levels included in the layer 101 including the transistor preferably includes a conductive layer surrounding the outside of the display portion 281 (or the pixel portion 284). The conductive layer can also be called a guard ring. By providing the conductive layer, it is possible to prevent elements such as transistors and light-emitting devices from being damaged by a high voltage applied to the elements due to charging caused by electrostatic discharge (ESD) or a process using plasma.
[0459] An insulating layer 255a is provided covering the capacitor 240, an insulating layer 255b is provided on the insulating layer 255a, and an insulating layer 255c is provided on the insulating layer 255b. The light-emitting device 130R, the light-emitting device 130G, and the light-emitting device 130B are provided on the insulating layer 255c. FIG. 25A shows an example in which the light-emitting device 130R, the light-emitting device 130G, and the light-emitting device 130B have the same stacked structure as that shown in FIG. 1B. An insulator is provided in the region between adjacent light-emitting devices. In FIG. 25A and other drawings, an insulating layer 125 and an insulating layer 127 on the insulating layer 125 are provided in this region.
[0460] A mask layer 118a is located on the first layer 113a of the light-emitting device 130R, a mask layer 118b is located on the second layer 113b of the light-emitting device 130G, and a mask layer 118c is located on the third layer 113c of the light-emitting device 130B.
[0461] The pixel electrodes 111a, 111b, and 111c are electrically connected to one of the source and drain of the transistor 310 via a plug 256 embedded in the insulating layer 243, the insulating layer 255a, the insulating layer 255b, and the insulating layer 255c, a conductive layer 241 embedded in the insulating layer 254, and a plug 271 embedded in the insulating layer 261. The height of the top surface of the insulating layer 255c and the height of the top surface of the plug 256 are the same or approximately the same. Various conductive materials can be used for the plug. Figure 25A and other figures show an example in which the pixel electrode has a two-layer structure consisting of a reflective electrode and a transparent electrode on the reflective electrode.
[0462] Furthermore, a protective layer 131 is provided on the light-emitting devices 130R, 130G, and 130B. A substrate 120 is bonded to the protective layer 131 with a resin layer 122. For details of the components from the light-emitting devices to the substrate 120, refer to Embodiment 1. The substrate 120 corresponds to the substrate 292 in FIG. 24A .
[0463] The display device shown in Figures 25B and 25C is an example including light-emitting devices 130R and 130G and a light-receiving device 150. Although not shown, the display device also includes a light-emitting device 130B. In Figures 25B and 25C, layers below the insulating layer 255a are omitted. The display device shown in Figures 25B and 25C can be applied with, for example, any of the configurations of the transistor-including layer 101 shown in Figures 25A and 26 to 30.
[0464] The light-receiving device 150 includes a stack of a pixel electrode 111 d, a fourth layer 113 d, a common layer 114, and a common electrode 115. For details of the display device including the light-receiving device, reference can be made to Embodiments 1 and 6.
[0465] As shown in Figure 25C, the display device may be provided with a lens array 133. The lens array 133 may be provided over one or both of the light-emitting device and the light-receiving device.
[0466] 25C shows an example in which a lens array 133 is provided on the light-emitting devices 130R and 130G and the light-receiving device 150 via a protective layer 131. By forming the lens array 133 directly on the substrate on which the light-emitting devices (and light-receiving devices) are formed, it is possible to improve the accuracy of alignment between the light-emitting devices or the light-receiving devices and the lens array.
[0467] In FIG. 25C, light emitted from the light emitting device passes through a lens array 133 and is extracted to the outside of the display device.
[0468] Alternatively, the lens array 133 may be provided on the substrate 120 and attached onto the protective layer 131 with the resin layer 122. By providing the lens array 133 on the substrate 120, the temperature of the heat treatment in the process of forming the lens array 133 can be increased.
[0469] The convex surface of the lens array 133 may face the substrate 120 side or the light-emitting device side.
[0470] The lens array 133 can be formed using at least one of an inorganic material and an organic material. For example, a material containing a resin can be used for the lenses. Also, a material containing at least one of an oxide and a sulfide can be used for the lenses. For example, a microlens array can be used as the lens array 133. The lens array 133 can be formed directly on the substrate or the light-emitting device, or a separately formed lens array can be bonded thereto.
[0471] 26 has a configuration in which a transistor 310A and a transistor 310B, each having a channel formed in a semiconductor substrate, are stacked. Note that in the following description of the display device, descriptions of parts that are the same as those of the display device described above may be omitted.
[0472] The display device 100B has a configuration in which a substrate 301B on which a transistor 310B, a capacitor 240, and a light-emitting device are provided and a substrate 301A on which a transistor 310A is provided are bonded together.
[0473] Here, it is preferable to provide an insulating layer 345 on the lower surface of the substrate 301B. It is also preferable to provide an insulating layer 346 on the insulating layer 261 provided on the substrate 301A. The insulating layers 345 and 346 are insulating layers that function as protective layers and can suppress the diffusion of impurities into the substrates 301B and 301A. As the insulating layers 345 and 346, an inorganic insulating film that can be used for the protective layer 131 or the insulating layer 332 can be used.
[0474] The substrate 301B is provided with a plug 343 that penetrates the substrate 301B and an insulating layer 345. Here, it is preferable to provide an insulating layer 344 to cover the side surface of the plug 343. The insulating layer 344 is an insulating layer that functions as a protective layer and can suppress the diffusion of impurities into the substrate 301B. The insulating layer 344 can be an inorganic insulating film that can be used for the protective layer 131.
[0475] Furthermore, a conductive layer 342 is provided on the back surface (surface opposite to the substrate 120 side) of the substrate 301B, below the insulating layer 345. The conductive layer 342 is preferably provided so as to be embedded in the insulating layer 335. Furthermore, the lower surfaces of the conductive layer 342 and the insulating layer 335 are preferably flattened. Here, the conductive layer 342 is electrically connected to the plug 343.
[0476] On the other hand, in the substrate 301A, a conductive layer 341 is provided on an insulating layer 346. The conductive layer 341 is preferably provided so as to be embedded in the insulating layer 336. In addition, the upper surfaces of the conductive layer 341 and the insulating layer 336 are preferably flattened.
[0477] The substrate 301A and the substrate 301B are electrically connected by bonding the conductive layer 341 and the conductive layer 342. Here, by improving the flatness of the surface formed by the conductive layer 342 and the insulating layer 335 and the surface formed by the conductive layer 341 and the insulating layer 336, the conductive layer 341 and the conductive layer 342 can be favorably bonded to each other.
[0478] It is preferable to use the same conductive material for the conductive layers 341 and 342. For example, a metal film containing an element selected from Al, Cr, Cu, Ta, Ti, Mo, and W, or a metal nitride film containing the above elements (titanium nitride film, molybdenum nitride film, tungsten nitride film), etc., can be used. In particular, it is preferable to use copper for the conductive layers 341 and 342. This allows the use of Cu-Cu (copper-copper) direct bonding technology (technology that achieves electrical conductivity by connecting Cu (copper) pads together).
[0479] [Display Device 100C] A display device 100C shown in FIG. 27 has a configuration in which a conductive layer 341 and a conductive layer 342 are joined via a bump 347.
[0480] 27 , by providing a bump 347 between the conductive layer 341 and the conductive layer 342, the conductive layer 341 and the conductive layer 342 can be electrically connected. The bump 347 can be formed using a conductive material containing, for example, gold (Au), nickel (Ni), indium (In), tin (Sn), or the like. Alternatively, for example, solder may be used as the bump 347. An adhesive layer 348 may be provided between the insulating layer 345 and the insulating layer 346. When the bump 347 is provided, the insulating layer 335 and the insulating layer 336 may not be provided.
[0481] [Display Device 100D] A display device 100D shown in FIG. 28 differs from the display device 100A mainly in the configuration of the transistors.
[0482] The transistor 320 is a transistor (OS transistor) in which a metal oxide (also referred to as an oxide semiconductor) is used for a semiconductor layer in which a channel is formed.
[0483] The transistor 320 includes a semiconductor layer 321 , an insulating layer 323 , a conductive layer 324 , a pair of conductive layers 325 , an insulating layer 326 , and a conductive layer 327 .
[0484] 24A and 24B . The stacked structure from the substrate 331 to the insulating layer 255c corresponds to the layer 101 including the transistor in Embodiment 1. The substrate 331 can be an insulating substrate or a semiconductor substrate.
[0485] An insulating layer 332 is provided over a substrate 331. The insulating layer 332 functions as a barrier layer that prevents impurities such as water or hydrogen from diffusing from the substrate 331 to the transistor 320 and prevents oxygen from being released from the semiconductor layer 321 toward the insulating layer 332. The insulating layer 332 can be, for example, a film through which hydrogen or oxygen is less likely to diffuse than a silicon oxide film, such as an aluminum oxide film, a hafnium oxide film, or a silicon nitride film.
[0486] A conductive layer 327 is provided over the insulating layer 332, and an insulating layer 326 is provided to cover the conductive layer 327. The conductive layer 327 functions as a first gate electrode of the transistor 320, and part of the insulating layer 326 functions as a first gate insulating layer. An oxide insulating film such as a silicon oxide film is preferably used for at least a portion of the insulating layer 326 that is in contact with the semiconductor layer 321. The top surface of the insulating layer 326 is preferably planarized.
[0487] The semiconductor layer 321 is provided over the insulating layer 326. The semiconductor layer 321 preferably includes a metal oxide (also referred to as an oxide semiconductor) film having semiconductor properties. A pair of conductive layers 325 is provided over and in contact with the semiconductor layer 321 and functions as a source electrode and a drain electrode.
[0488] An insulating layer 328 is provided to cover top surfaces and side surfaces of the pair of conductive layers 325 and side surfaces of the semiconductor layer 321, and an insulating layer 264 is provided over the insulating layer 328. The insulating layer 328 functions as a barrier layer that prevents impurities such as water or hydrogen from diffusing from the insulating layer 264 or the like into the semiconductor layer 321 and prevents oxygen from being released from the semiconductor layer 321. The insulating layer 328 can be an insulating film similar to the insulating layer 332.
[0489] Openings reaching the semiconductor layer 321 are provided in the insulating layer 328 and the insulating layer 264. Inside the openings, an insulating layer 323 and a conductive layer 324 are buried, which are in contact with side surfaces of the insulating layer 264, the insulating layer 328, and the conductive layer 325 and an upper surface of the semiconductor layer 321. The conductive layer 324 functions as a second gate electrode, and the insulating layer 323 functions as a second gate insulating layer.
[0490] The top surfaces of the conductive layer 324, the insulating layer 323, and the insulating layer 264 are planarized so that their heights are the same or approximately the same, and insulating layers 329 and 265 are provided to cover them.
[0491] The insulating layer 264 and the insulating layer 265 function as interlayer insulating layers. The insulating layer 329 functions as a barrier layer that prevents impurities such as water or hydrogen from diffusing from the insulating layer 265 or the like to the transistor 320. The insulating layer 329 can be formed using an insulating film similar to the insulating layer 328 and the insulating layer 332.
[0492] A plug 274 electrically connected to one of the pair of conductive layers 325 is provided to be embedded in the insulating layer 265, the insulating layer 329, and the insulating layer 264. Here, the plug 274 preferably includes a conductive layer 274a covering the side surfaces of the openings of the insulating layer 265, the insulating layer 329, the insulating layer 264, and the insulating layer 328 and part of the top surface of the conductive layer 325, and a conductive layer 274b in contact with the top surface of the conductive layer 274a. In this case, the conductive layer 274a is preferably made of a conductive material through which hydrogen and oxygen do not easily diffuse.
[0493] [Display Device 100E] A display device 100E illustrated in FIG. 29 has a stacked structure of a transistor 320A and a transistor 320B each including an oxide semiconductor as a semiconductor in which a channel is formed.
[0494] The transistor 320A, the transistor 320B, and the surrounding configurations thereof can be referred to the display device 100D.
[0495] Although two transistors including an oxide semiconductor are stacked here, the present invention is not limited to this structure, and for example, three or more transistors may be stacked.
[0496] [Display Device 100F] A display device 100F shown in FIG. 30 has a stacked structure of a transistor 310 in which a channel is formed in a substrate 301 and a transistor 320 in which a channel is formed and a semiconductor layer containing metal oxide.
[0497] An insulating layer 261 is provided to cover the transistor 310, and a conductive layer 251 is provided over the insulating layer 261. An insulating layer 262 is provided to cover the conductive layer 251, and a conductive layer 252 is provided over the insulating layer 262. The conductive layers 251 and 252 each function as wirings. An insulating layer 263 and an insulating layer 332 are provided to cover the conductive layer 252, and the transistor 320 is provided over the insulating layer 332. An insulating layer 265 is provided to cover the transistor 320, and a capacitor 240 is provided over the insulating layer 265. The capacitor 240 and the transistor 320 are electrically connected by a plug 274.
[0498] The transistor 320 can be used as a transistor that forms a pixel circuit. The transistor 310 can be used as a transistor that forms a pixel circuit or a driver circuit (gate line driver circuit, source line driver circuit) that drives the pixel circuit. The transistors 310 and 320 can be used as transistors that form various circuits such as an arithmetic circuit or a memory circuit.
[0499] By using this configuration, not only pixel circuits but also driving circuits etc. can be formed directly below the light-emitting device, making it possible to make the display device smaller than when driving circuits are provided around the periphery of the display area.
[0500] [Display Device 100G] FIG. 31 shows a perspective view of the display device 100G, and FIG. 32A shows a cross-sectional view of the display device 100G.
[0501] The display device 100G has a configuration in which a substrate 152 and a substrate 151 are bonded together. In Fig. 31, the substrate 152 is indicated by a dashed line.
[0502] The display device 100G includes a display portion 162, a connection portion 140, a circuit 164, wiring 165, and the like. Fig. 31 shows an example in which an IC 173 and an FPC 172 are mounted on the display device 100G. Therefore, the configuration shown in Fig. 31 can also be said to be a display module including the display device 100G, an IC (integrated circuit), and an FPC.
[0503] The connection portion 140 is provided on the outside of the display portion 162. The connection portion 140 can be provided along one side or multiple sides of the display portion 162. There may be one or more connection portions 140. FIG. 31 shows an example in which the connection portion 140 is provided so as to surround the four sides of the display portion. The connection portion 140 electrically connects the common electrode of the light-emitting device and the conductive layer, and can supply a potential to the common electrode.
[0504] The circuit 164 can be, for example, a scanning line driver circuit.
[0505] The wiring 165 has a function of supplying signals and power to the display portion 162 and the circuit 164. The signals and power are input to the wiring 165 from the outside via the FPC 172 or input to the wiring 165 from the IC 173.
[0506] 31 shows an example in which an IC 173 is provided on a substrate 151 by a chip-on-glass (COG) method, a chip-on-film (COF) method, or the like. The IC 173 may be, for example, an IC having a scanning line driver circuit or a signal line driver circuit. The display device 100G and the display module may not necessarily include an IC. Alternatively, the IC may be mounted on an FPC by a COF method or the like.
[0507] Figure 32A shows an example of a cross section of the display device 100G when a portion of the area including the FPC 172, a portion of the circuit 164, a portion of the display unit 162, a portion of the connection portion 140, and a portion of the area including the end portion are cut away.
[0508] The display device 100G shown in Figure 32A has, between a substrate 151 and a substrate 152, a transistor 201, a transistor 205, a light-emitting device 130R that emits red light, a light-emitting device 130G that emits green light, and a light-emitting device 130B that emits blue light, etc.
[0509] The light-emitting devices 130R, 130G, and 130B each have the same structure as the laminated structure shown in Fig. 1B, except that the configuration of the pixel electrodes is different. For details of the light-emitting devices, refer to Embodiment 1.
[0510] The light-emitting device 130R includes a conductive layer 112a, a conductive layer 126a on the conductive layer 112a, and a conductive layer 129a on the conductive layer 126a. All or some of the conductive layers 112a, 126a, and 129a may be called pixel electrodes.
[0511] Light-emitting device 130G includes conductive layer 112b, conductive layer 126b on conductive layer 112b, and conductive layer 129b on conductive layer 126b.
[0512] Light-emitting device 130B includes conductive layer 112c, conductive layer 126c on conductive layer 112c, and conductive layer 129c on conductive layer 126c.
[0513] The conductive layer 112a is connected to a conductive layer 222b included in the transistor 205 through an opening provided in the insulating layer 214. An end of the conductive layer 126a is located outside an end of the conductive layer 112a. An end of the conductive layer 126a and an end of the conductive layer 129a are aligned or approximately aligned. For example, a conductive layer functioning as a reflective electrode can be used for the conductive layer 112a and the conductive layer 126a, and a conductive layer functioning as a transparent electrode can be used for the conductive layer 129a.
[0514] The conductive layers 112b, 126b, and 129b in the light-emitting device 130G and the conductive layers 112c, 126c, and 129c in the light-emitting device 130B are similar to the conductive layers 112a, 126a, and 129a in the light-emitting device 130R, and therefore will not be described in detail.
[0515] The conductive layers 112a, 112b, and 112c are formed to cover the openings provided in the insulating layer 214. A layer 128 is filled in the recesses of the conductive layers 112a, 112b, and 112c.
[0516] The layer 128 has a function of planarizing the recesses of the conductive layers 112a, 112b, and 112c. Conductive layers 126a, 126b, and 126c electrically connected to the conductive layers 112a, 112b, and 112c are provided over the conductive layers 112a, 112b, and 112c and the layer 128. Therefore, regions overlapping with the recesses of the conductive layers 112a, 112b, and 112c can also be used as light-emitting regions, thereby increasing the aperture ratio of the pixel.
[0517] The layer 128 may be an insulating layer or a conductive layer. Various inorganic insulating materials, organic insulating materials, and conductive materials can be used as appropriate for the layer 128. In particular, the layer 128 is preferably formed using an insulating material, and more preferably using an organic insulating material. For example, the organic insulating material that can be used for the insulating layer 127 can be used for the layer 128.
[0518] The top surfaces and side surfaces of the conductive layers 126a and 129a are covered with the first layer 113a. Similarly, the top surfaces and side surfaces of the conductive layers 126b and 129b are covered with the second layer 113b, and the top surfaces and side surfaces of the conductive layers 126c and 129c are covered with the third layer 113c. Therefore, the entire regions where the conductive layers 126a, 126b, and 126c are provided can be used as light-emitting regions of the light-emitting devices 130R, 130G, and 130B, thereby increasing the aperture ratio of the pixel.
[0519] A portion of the top surface and side surfaces of each of the first layer 113a, the second layer 113b, and the third layer 113c are covered with insulating layers 125 and 127. A mask layer 118a is located between the first layer 113a and the insulating layer 125. A mask layer 118b is located between the second layer 113b and the insulating layer 125, and a mask layer 118c is located between the third layer 113c and the insulating layer 125. A common layer 114 is provided on the first layer 113a, the second layer 113b, the third layer 113c, and the insulating layers 125 and 127, and a common electrode 115 is provided on the common layer 114. The common layer 114 and the common electrode 115 are each a continuous film provided in common to a plurality of light-emitting devices.
[0520] A protective layer 131 is provided on the light-emitting devices 130R, 130G, and 130B. The protective layer 131 and the substrate 152 are bonded via an adhesive layer 142. A light-shielding layer 117 is provided on the substrate 152. A solid sealing structure, a hollow sealing structure, or the like can be applied to seal the light-emitting devices. In FIG. 32A , the space between the substrates 152 and 151 is filled with the adhesive layer 142, thereby applying a solid sealing structure. Alternatively, the space may be filled with an inert gas (such as nitrogen or argon), thereby applying a hollow sealing structure. In this case, the adhesive layer 142 may be provided so as not to overlap the light-emitting devices. Alternatively, the space may be filled with a resin different from the frame-shaped adhesive layer 142.
[0521] The protective layer 131 is preferably provided in at least the display portion 162 and is provided so as to cover the entire display portion 162. The protective layer 131 is preferably provided so as to cover not only the display portion 162 but also the connection portion 140 and the circuit 164. The protective layer 131 is preferably provided up to the edge of the display device 100G. On the other hand, in the connection portion 204, the FPC 172 and the conductive layer 166 are electrically connected to each other, so that a portion where the protective layer 131 is not provided is generated.
[0522] A connection portion 204 is provided in a region of the substrate 151 where the substrate 152 does not overlap. In the connection portion 204, the wiring 165 is electrically connected to the FPC 172 via a conductive layer 166 and a connection layer 242. The conductive layer 166 has an example of a stacked structure including a conductive film obtained by processing the same conductive film as the conductive layers 112a, 112b, and 112c, a conductive film obtained by processing the same conductive film as the conductive layers 126a, 126b, and 126c, and a conductive film obtained by processing the same conductive film as the conductive layers 129a, 129b, and 129c. The conductive layer 166 is exposed on the top surface of the connection portion 204. This allows the connection portion 204 and the FPC 172 to be electrically connected via the connection layer 242.
[0523] For example, after the protective layer 131 is formed over the entire surface of the display device 100G, a mask is used to remove the region of the protective layer 131 that overlaps with the conductive layer 166, thereby exposing the conductive layer 166.
[0524] Alternatively, a laminated structure of at least one organic layer and a conductive layer may be provided on the conductive layer 166, and the protective layer 131 may be provided on the laminated structure. A peeling initiation point (a portion that triggers peeling) may then be formed on the laminated structure using a laser or a sharp blade (e.g., a needle or cutter), selectively removing the laminated structure and the protective layer 131 thereon to expose the conductive layer 166. For example, the protective layer 131 can be selectively removed by pressing an adhesive roller against the substrate 151 and moving the roller relative to the substrate while rotating. Alternatively, adhesive tape may be attached to the substrate 151 and peeled off. Because of poor adhesion between the organic layer and the conductive layer, or between the organic layers themselves, separation occurs at the interface between the organic layer and the conductive layer or within the organic layer. This allows selective removal of the region of the protective layer 131 that overlaps with the conductive layer 166. If an organic layer or the like remains on the conductive layer 166, it can be removed using an organic solvent or the like.
[0525] The organic layer can be, for example, at least one organic layer (a layer functioning as a light-emitting layer, a carrier blocking layer, a carrier transport layer, or a carrier injection layer) used in any of the first layer 113a, the second layer 113b, and the third layer 113c. The organic layer can be formed simultaneously with the formation of any of the first layer 113a, the second layer 113b, and the third layer 113c, or can be provided separately. The conductive layer can be formed in the same process and with the same material as the common electrode 115. For example, an ITO film is preferably formed as the common electrode 115 and the conductive layer. Note that when a stacked structure is used for the common electrode 115, at least one of the layers constituting the common electrode 115 is provided as the conductive layer.
[0526] Furthermore, the upper surface of the conductive layer 166 may be covered with a mask so that the protective layer 131 is not formed on the conductive layer 166. As the mask, for example, a metal mask (area metal mask) or an adhesive or adhesive tape or film may be used. By forming the protective layer 131 with the mask in place and then removing the mask, the conductive layer 166 can be kept exposed even after the protective layer 131 is formed.
[0527] By using such a method, a region where the protective layer 131 is not provided can be formed in the connection portion 204, and in this region, the conductive layer 166 and the FPC 172 can be electrically connected via the connection layer 242.
[0528] In the connection portion 140, a conductive layer 123 is provided on the insulating layer 214. The conductive layer 123 has an example of a stacked structure including a conductive film obtained by processing the same conductive film as the conductive layers 112a, 112b, and 112c, a conductive film obtained by processing the same conductive film as the conductive layers 126a, 126b, and 126c, and a conductive film obtained by processing the same conductive film as the conductive layers 129a, 129b, and 129c. The end of the conductive layer 123 is covered with a mask layer 118a, an insulating layer 125, and an insulating layer 127. A common layer 114 is provided on the conductive layer 123, and a common electrode 115 is provided on the common layer 114. The conductive layer 123 and the common electrode 115 are electrically connected via the common layer 114. The common layer 114 does not necessarily have to be provided in the connection portion 140. In this case, the conductive layer 123 and the common electrode 115 are in direct contact with each other and electrically connected.
[0529] The display device 100G is a top-emission type. Light emitted by the light-emitting device is emitted toward the substrate 152. The substrate 152 is preferably made of a material that is highly transparent to visible light. The pixel electrodes contain a material that reflects visible light, and the counter electrode (common electrode 115) contains a material that transmits visible light.
[0530] The stacked structure from the substrate 151 to the insulating layer 214 corresponds to the layer 101 including the transistor in Embodiment 1.
[0531] The transistor 201 and the transistor 205 are both formed over a substrate 151. These transistors can be manufactured using the same material and through the same process.
[0532] An insulating layer 211, an insulating layer 213, an insulating layer 215, and an insulating layer 214 are provided over the substrate 151 in this order. A part of the insulating layer 211 functions as a gate insulating layer for each transistor. A part of the insulating layer 213 functions as a gate insulating layer for each transistor. The insulating layer 215 is provided to cover the transistor. The insulating layer 214 is provided to cover the transistor and functions as a planarization layer. Note that the number of gate insulating layers and the number of insulating layers covering the transistors are not limited, and each may be a single layer or two or more layers.
[0533] At least one insulating layer covering the transistor is preferably made of a material that is resistant to the diffusion of impurities such as water and hydrogen. This allows the insulating layer to function as a barrier layer. With this structure, it is possible to effectively prevent impurities from diffusing into the transistor from the outside, thereby improving the reliability of the display device.
[0534] It is preferable to use an inorganic insulating film for each of the insulating layers 211, 213, and 215. Examples of the inorganic insulating film that can be used include a silicon nitride film, a silicon oxynitride film, a silicon oxide film, a silicon nitride oxide film, an aluminum oxide film, and an aluminum nitride film. Alternatively, a hafnium oxide film, an yttrium oxide film, a zirconium oxide film, a gallium oxide film, a tantalum oxide film, a magnesium oxide film, a lanthanum oxide film, a cerium oxide film, and a neodymium oxide film may also be used. Two or more of the above insulating films may be stacked.
[0535] An organic insulating layer is suitable for the insulating layer 214, which functions as a planarization layer. Materials that can be used for the organic insulating layer include acrylic resin, polyimide resin, epoxy resin, polyamide resin, polyimideamide resin, siloxane resin, benzocyclobutene-based resin, phenolic resin, and precursors of these resins. The insulating layer 214 may also have a stacked structure of an organic insulating layer and an inorganic insulating layer. The outermost layer of the insulating layer 214 preferably functions as an etching protection layer. This can prevent recesses from being formed in the insulating layer 214 during processing of the conductive layer 112a, the conductive layer 126a, the conductive layer 129a, or the like. Alternatively, recesses may be formed in the insulating layer 214 during processing of the conductive layer 112a, the conductive layer 126a, the conductive layer 129a, or the like.
[0536] The transistor 201 and the transistor 205 each include a conductive layer 221 that functions as a gate, an insulating layer 211 that functions as a gate insulating layer, conductive layers 222a and 222b that function as a source and a drain, a semiconductor layer 231, an insulating layer 213 that functions as a gate insulating layer, and a conductive layer 223 that functions as a gate. Here, the same hatching pattern is applied to multiple layers obtained by processing the same conductive film. The insulating layer 211 is located between the conductive layer 221 and the semiconductor layer 231. The insulating layer 213 is located between the conductive layer 223 and the semiconductor layer 231.
[0537] The structure of the transistor included in the display device of this embodiment is not particularly limited. For example, a planar transistor, a staggered transistor, an inverted staggered transistor, or the like can be used. Furthermore, either a top-gate transistor or a bottom-gate transistor structure may be used. Alternatively, gates may be provided above and below a semiconductor layer in which a channel is formed.
[0538] The transistor 201 and the transistor 205 have a structure in which a semiconductor layer in which a channel is formed is sandwiched between two gates. The two gates may be connected and the same signal may be supplied to drive the transistor. Alternatively, the threshold voltage of the transistor may be controlled by applying a potential for controlling the threshold voltage to one of the two gates and a potential for driving to the other.
[0539] The crystallinity of a semiconductor material used in a transistor is not particularly limited, and any of an amorphous semiconductor, a single crystalline semiconductor, and a semiconductor having crystallinity other than single crystal (a microcrystalline semiconductor, a polycrystalline semiconductor, or a semiconductor having a crystalline region in part) may be used. The use of a single crystalline semiconductor or a crystalline semiconductor is preferable because it can suppress deterioration of transistor characteristics.
[0540] The semiconductor layer of the transistor preferably includes a metal oxide (also referred to as an oxide semiconductor). That is, the display device of this embodiment preferably includes a transistor using a metal oxide for a channel formation region (hereinafter referred to as an OS transistor).
[0541] Examples of crystalline oxide semiconductors include c-axis-aligned crystalline (CAAC)-OS, nanocrystalline (nc)-OS, and the like.
[0542] Alternatively, a transistor using silicon for a channel formation region (Si transistor) may be used. Examples of silicon include single crystal silicon, polycrystalline silicon, and amorphous silicon. In particular, a transistor having low temperature polysilicon (LTPS) in a semiconductor layer (hereinafter also referred to as an LTPS transistor) may be used. An LTPS transistor has high field-effect mobility and favorable frequency characteristics.
[0543] By using Si transistors such as LTPS transistors, circuits that need to be driven at high frequencies (such as source driver circuits) can be built on the same substrate as the display unit, which simplifies the external circuits mounted on the display device and reduces component and mounting costs.
[0544] An OS transistor has significantly higher field-effect mobility than a transistor using amorphous silicon. Furthermore, an OS transistor has significantly lower source-drain leakage current in an off state (hereinafter also referred to as off-state current), and can hold charge accumulated in a capacitor connected in series with the transistor for a long period of time. Furthermore, the use of an OS transistor can reduce the power consumption of a display device.
[0545] Furthermore, to increase the emission luminance of a light-emitting device included in a pixel circuit, it is necessary to increase the amount of current flowing through the light-emitting device. To achieve this, it is necessary to increase the source-drain voltage of a driving transistor included in the pixel circuit. Since an OS transistor has a higher source-drain withstand voltage than a Si transistor, a high voltage can be applied between the source and drain of the OS transistor. Therefore, by using an OS transistor as the driving transistor included in a pixel circuit, it is possible to increase the amount of current flowing through the light-emitting device and increase the emission luminance of the light-emitting device.
[0546] Furthermore, when the transistor operates in the saturation region, the OS transistor can reduce the change in source-drain current with respect to a change in gate-source voltage compared to a Si transistor. Therefore, by using an OS transistor as a driving transistor included in a pixel circuit, the current flowing between the source and drain can be precisely controlled by changing the gate-source voltage, thereby controlling the amount of current flowing through the light-emitting device. This allows for a greater number of gray levels to be displayed in the pixel circuit.
[0547] Furthermore, in terms of the saturation characteristics of the current that flows when a transistor operates in the saturation region, an OS transistor can pass a more stable current (saturation current) than a Si transistor, even when the source-drain voltage gradually increases. Therefore, by using an OS transistor as a driving transistor, a stable current can be passed through a light-emitting device, even when the current-voltage characteristics of an EL device vary. In other words, when an OS transistor operates in the saturation region, the source-drain current of the OS transistor remains almost unchanged even when the source-drain voltage increases, thereby stabilizing the light-emitting luminance of the light-emitting device.
[0548] As described above, by using an OS transistor for a driving transistor included in a pixel circuit, it is possible to achieve "suppression of black floating," "increase in light emission luminance," "multiple gradations," "suppression of variations in light-emitting devices," and the like.
[0549] The metal oxide used in the semiconductor layer preferably contains, for example, indium, M (wherein M is one or more elements selected from gallium, aluminum, silicon, boron, yttrium, tin, copper, vanadium, beryllium, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, and magnesium), and zinc. In particular, M is preferably one or more elements selected from aluminum, gallium, yttrium, and tin.
[0550] In particular, it is preferable to use an oxide containing indium (In), gallium (Ga), and zinc (Zn) (also referred to as IGZO) as the semiconductor layer. Alternatively, it is preferable to use an oxide containing indium, tin, and zinc. Alternatively, it is preferable to use an oxide containing indium, gallium, tin, and zinc. Alternatively, it is preferable to use an oxide containing indium (In), aluminum (Al), and zinc (Zn) (also referred to as IAZO). Alternatively, it is preferable to use an oxide containing indium (In), aluminum (Al), gallium (Ga), and zinc (Zn) (also referred to as IAGZO).
[0551] When the semiconductor layer is an In-M-Zn oxide, the atomic ratio of In in the In-M-Zn oxide is preferably equal to or greater than the atomic ratio of M. The atomic ratio of metal elements in such an In-M-Zn oxide may be In:M:Zn=1:1:1 or a composition thereabout, In:M:Zn=1:1:1.2 or a composition thereabout, In:M:Zn=1:3:2 or a composition thereabout, In:M:Zn=1:3:4 or a composition thereabout, In:M:Zn=2:1:3 or a composition thereabout, In:M:Zn=3:1:2 or a composition thereabout, or In:M:Zn=4:2:3. or a composition in the vicinity thereof, In:M:Zn = 4:2:4.1 or a composition in the vicinity thereof, In:M:Zn = 5:1:3 or a composition in the vicinity thereof, In:M:Zn = 5:1:6 or a composition in the vicinity thereof, In:M:Zn = 5:1:7 or a composition in the vicinity thereof, In:M:Zn = 5:1:8 or a composition in the vicinity thereof, In:M:Zn = 6:1:6 or a composition in the vicinity thereof, In:M:Zn = 5:2:5 or a composition in the vicinity thereof, etc. Note that a composition in the vicinity thereof includes a range of ±30% of the desired atomic ratio.
[0552] For example, when describing a composition having an atomic ratio of In:Ga:Zn=4:2:3 or thereabout, this includes a case where, when In is taken as 4, Ga is 1 to 3 and Zn is 2 to 4. Furthermore, when describing a composition having an atomic ratio of In:Ga:Zn=5:1:6 or thereabout, this includes a case where, when In is taken as 5, Ga is more than 0.1 and 2 or less and Zn is 5 to 7. Furthermore, when describing a composition having an atomic ratio of In:Ga:Zn=1:1:1 or thereabout, this includes a case where, when In is taken as 1, Ga is more than 0.1 and 2 or less and Zn is more than 0.1 and 2 or less.
[0553] The transistors included in the circuit 164 may have the same structure as or different from the transistors included in the display portion 162. The transistors included in the circuit 164 may all have the same structure or may have two or more types. Similarly, the transistors included in the display portion 162 may all have the same structure or may have two or more types.
[0554] All the transistors included in the display portion 162 may be OS transistors, all the transistors included in the display portion 162 may be Si transistors, or some of the transistors included in the display portion 162 may be OS transistors and the rest may be Si transistors.
[0555] For example, by using both an LTPS transistor and an OS transistor in the display portion 162, a display device with low power consumption and high driving capability can be realized. A structure in which an LTPS transistor and an OS transistor are combined is sometimes referred to as LTPO. Note that a more preferable example is a structure in which an OS transistor is used as a transistor that functions as a switch for controlling conduction / non-conduction between wirings, and an LTPS transistor is used as a transistor for controlling current.
[0556] For example, one of the transistors included in the display portion 162 functions as a transistor for controlling a current flowing through a light-emitting device and can also be called a driving transistor. One of the source and drain of the driving transistor is electrically connected to a pixel electrode of the light-emitting device. It is preferable to use an LTPS transistor as the driving transistor. This allows a large current to flow through the light-emitting device in the pixel circuit.
[0557] On the other hand, another transistor included in the display portion 162 functions as a switch for controlling pixel selection / non-selection and can also be called a selection transistor. The gate of the selection transistor is electrically connected to a gate line, and one of the source and drain is electrically connected to a source line (signal line). An OS transistor is preferably used as the selection transistor. This allows the gradation of a pixel to be maintained even when the frame frequency is significantly reduced (for example, 1 fps or less). Therefore, power consumption can be reduced by stopping the driver when displaying a still image.
[0558] As described above, the display device of one embodiment of the present invention can have a high aperture ratio, high definition, high display quality, and low power consumption.
[0559] A display device according to one embodiment of the present invention includes an OS transistor and a light-emitting device with a metal maskless (MML) structure. This structure significantly reduces leakage current that may flow through the transistor and leakage current that may flow between adjacent light-emitting devices (also referred to as lateral leakage current or side leakage current). Furthermore, when an image is displayed on the display device, the viewer can observe one or more of image clarity, image sharpness, high saturation, and a high contrast ratio. The extremely low leakage current that may flow through the transistor and lateral leakage current between the light-emitting devices significantly reduces light leakage during black display (so-called floating black).
[0560] In particular, among light-emitting devices with an MML structure, by applying the SBS structure described above, the layers provided between the light-emitting devices (for example, organic layers shared between the light-emitting devices, also called common layers) are configured to be separated, thereby eliminating side leakage or making it possible to greatly reduce side leakage.
[0561] 32B and 32C show other examples of transistor configurations.
[0562] The transistor 209 and the transistor 210 each include a conductive layer 221 functioning as a gate, an insulating layer 211 functioning as a gate insulating layer, a semiconductor layer 231 including a channel formation region 231i and a pair of low-resistance regions 231n, a conductive layer 222a connected to one of the pair of low-resistance regions 231n, a conductive layer 222b connected to the other of the pair of low-resistance regions 231n, an insulating layer 225 functioning as a gate insulating layer, a conductive layer 223 functioning as a gate, and an insulating layer 215 covering the conductive layer 223. The insulating layer 211 is located between the conductive layer 221 and the channel formation region 231i. The insulating layer 225 is located at least between the conductive layer 223 and the channel formation region 231i. Furthermore, an insulating layer 218 covering the transistor may be provided.
[0563] 32B shows an example in which the insulating layer 225 covers the top surface and side surfaces of the semiconductor layer 231. The conductive layer 222a and the conductive layer 222b are connected to the low-resistance region 231n through openings provided in the insulating layer 225 and the insulating layer 215, respectively. One of the conductive layer 222a and the conductive layer 222b functions as a source, and the other functions as a drain.
[0564] 32C , the insulating layer 225 overlaps with the channel formation region 231i of the semiconductor layer 231 but does not overlap with the low-resistance region 231n. For example, the insulating layer 225 is processed using the conductive layer 223 as a mask, thereby manufacturing the structure shown in FIG. 32C . In FIG. 32C , the insulating layer 215 is provided to cover the insulating layer 225 and the conductive layer 223, and the conductive layer 222a and the conductive layer 222b are each connected to the low-resistance region 231n through openings in the insulating layer 215.
[0565] It is preferable to provide a light-shielding layer 117 on the surface of the substrate 152 facing the substrate 151. The light-shielding layer 117 can be provided between adjacent light-emitting devices, on the connection section 140, and on the circuit 164. Various optical members can be disposed on the outside of the substrate 152.
[0566] The materials that can be used for the substrate 120 can be used for the substrate 151 and the substrate 152 .
[0567] The adhesive layer 142 can be made of a material that can be used for the resin layer 122 .
[0568] The connection layer 242 may be an anisotropic conductive film (ACF), an anisotropic conductive paste (ACP), or the like.
[0569] [Display Device 100H] The display device 100H shown in FIG. 33A differs from the display device 100G mainly in that it is a bottom-emission display device.
[0570] Light emitted from the light-emitting device is emitted toward the substrate 151. A material that is highly transparent to visible light is preferably used for the substrate 151. On the other hand, the light-transmitting property of the material used for the substrate 152 does not matter.
[0571] It is preferable to form a light-shielding layer 117 between the substrate 151 and the transistor 201 and between the substrate 151 and the transistor 205. Fig. 33A shows an example in which the light-shielding layer 117 is provided over the substrate 151, the insulating layer 153 is provided over the light-shielding layer 117, and the transistors 201, 205, and the like are provided over the insulating layer 153.
[0572] Light-emitting device 130R has a conductive layer 112a, a conductive layer 126a on conductive layer 112a, and a conductive layer 129a on conductive layer 126a.
[0573] Light-emitting device 130G includes conductive layer 112b, conductive layer 126b on conductive layer 112b, and conductive layer 129b on conductive layer 126b.
[0574] The conductive layers 112a, 112b, 126a, 126b, 129a, and 129b are each made of a material that is highly transparent to visible light. The common electrode 115 is preferably made of a material that reflects visible light.
[0575] 32A and 33A show examples in which the upper surface of the layer 128 has a flat portion, but there are no particular limitations on the shape of the layer 128. Modified examples of the layer 128 are shown in FIGS.
[0576] As shown in FIGS. 33B and 33D, the upper surface of layer 128 can be configured to have a recessed shape in the center and its vicinity in cross section, that is, a shape having a concave curved surface.
[0577] Furthermore, as shown in FIG. 33C, the upper surface of layer 128 can be configured to have a shape in which the center and its vicinity bulge in cross section, that is, a shape having a convex curve.
[0578] The upper surface of layer 128 may have one or both of a convex curved surface and a concave curved surface. The number of convex curved surfaces and the number of concave curved surfaces that the upper surface of layer 128 has are not limited, and may be one or more.
[0579] Furthermore, the height of the upper surface of layer 128 and the height of the upper surface of conductive layer 112a may be the same or approximately the same, or may be different from each other. For example, the height of the upper surface of layer 128 may be lower or higher than the height of the upper surface of conductive layer 112a.
[0580] 33B can also be considered an example in which layer 128 is contained within the recess of conductive layer 112a. On the other hand, as shown in FIG. 33D, layer 128 may be present outside the recess of conductive layer 112a, that is, the width of the top surface of layer 128 may be wider than the recess.
[0581] [Display Device 100J] The display device 100J shown in FIG. 34 differs from the display device 100G mainly in that the display device 100J includes a light receiving device 150.
[0582] The light receiving device 150 includes a conductive layer 112d, a conductive layer 126d on the conductive layer 112d, and a conductive layer 129d on the conductive layer 126d.
[0583] The conductive layer 112 d is connected to a conductive layer 222 b included in the transistor 205 through an opening provided in the insulating layer 214 .
[0584] The upper and side surfaces of the conductive layer 126d and the conductive layer 129d are covered with the fourth layer 113d. The fourth layer 113d includes at least an active layer.
[0585] A portion of the top surface and side surfaces of the fourth layer 113d are covered with insulating layers 125 and 127. A mask layer 118d is located between the fourth layer 113d and the insulating layer 125. A common layer 114 is provided on the fourth layer 113d and the insulating layers 125 and 127, and a common electrode 115 is provided on the common layer 114. The common layer 114 is a continuous film provided in common to the light-receiving device and the light-emitting device.
[0586] 23A to 23K described in Embodiment 3 can be applied to the display device 100J. For details of the display device having a light receiving device, reference can be made to Embodiments 1 and 6.
[0587] This embodiment mode can be combined with other embodiment modes as appropriate.
[0588] Embodiment 5 In this embodiment, a light-emitting device that can be used for a display device according to one embodiment of the present invention will be described.
[0589] In this specification and the like, a structure that produces different luminescent colors (for example, blue (B), green (G), and red (R)) for each light-emitting device may be referred to as an SBS (Side By Side) structure.
[0590] The light emitting device can emit light of red, green, blue, cyan, magenta, yellow, white, etc. The color purity can be improved by providing the light emitting device with a microcavity structure.
[0591] 35A, the light-emitting device has an EL layer 763 between a pair of electrodes (a lower electrode 761 and an upper electrode 762). The EL layer 763 can be composed of multiple layers, such as a layer 780, a light-emitting layer 771, and a layer 790.
[0592] The light-emitting layer 771 contains at least a light-emitting substance (also referred to as a light-emitting material).
[0593] When the lower electrode 761 is an anode and the upper electrode 762 is a cathode, the layer 780 includes one or more of a layer containing a substance with high hole-injecting properties (hole-injecting layer), a layer containing a substance with high hole-transporting properties (hole-transporting layer), and a layer containing a substance with high electron-blocking properties (electron-blocking layer). The layer 790 also includes one or more of a layer containing a substance with high electron-injecting properties (electron-injecting layer), a layer containing a substance with high electron-transporting properties (electron-transporting layer), and a layer containing a substance with high hole-blocking properties (hole-blocking layer). When the lower electrode 761 is a cathode and the upper electrode 762 is an anode, the layers 780 and 790 have the opposite structures to those described above.
[0594] A structure including the layer 780, the light-emitting layer 771, and the layer 790 provided between a pair of electrodes can function as a single light-emitting unit, and the structure of FIG. 35A is referred to as a single structure in this specification.
[0595] 35B shows a modified example of the EL layer 763 included in the light-emitting device shown in Fig. 35A. Specifically, the light-emitting device shown in Fig. 35B has a layer 781 on a lower electrode 761, a layer 782 on the layer 781, a light-emitting layer 771 on the layer 782, a layer 791 on the light-emitting layer 771, a layer 792 on the layer 791, and an upper electrode 762 on the layer 792.
[0596] When the lower electrode 761 is an anode and the upper electrode 762 is a cathode, for example, the layer 781 can be a hole injection layer, the layer 782 can be a hole transport layer, the layer 791 can be an electron transport layer, and the layer 792 can be an electron injection layer. When the lower electrode 761 is a cathode and the upper electrode 762 is an anode, the layer 781 can be an electron injection layer, the layer 782 can be an electron transport layer, the layer 791 can be a hole transport layer, and the layer 792 can be a hole injection layer. Such a layer structure allows carriers to be efficiently injected into the light-emitting layer 771, and the efficiency of carrier recombination in the light-emitting layer 771 can be increased.
[0597] As shown in FIGS. 35C and 35D, a configuration in which a plurality of light-emitting layers (light-emitting layers 771, 772, 773) are provided between the layer 780 and the layer 790 is also a variation of the single structure.
[0598] 35E and 35F, a configuration in which a plurality of light-emitting units (EL layers 763a and 763b) are connected in series via a charge generation layer 785 is referred to as a tandem structure in this specification. The tandem structure may also be referred to as a stack structure. The tandem structure makes it possible to provide a light-emitting device capable of emitting light with high brightness.
[0599] 35C and 35D , light-emitting materials that emit light of the same color, or even the same light-emitting material, may be used for the light-emitting layers 771, 772, and 773. For example, a light-emitting material that emits blue light may be used for the light-emitting layers 771, 772, and 773. A color conversion layer may be provided as the layer 764 shown in FIG.
[0600] Furthermore, light-emitting materials that emit light of different colors may be used for the light-emitting layers 771, 772, and 773. When the lights emitted by the light-emitting layers 771, 772, and 773 are complementary in color, white light can be obtained. A color filter (also referred to as a colored layer) may be provided as the layer 764 shown in Figure 35D. When white light passes through the color filter, light of a desired color can be obtained.
[0601] A light-emitting device that emits white light preferably contains two or more types of light-emitting materials. To obtain white light emission, light-emitting materials can be selected so that the light emitted from each of the two or more light-emitting materials has a complementary color relationship. For example, by making the emission color of the first light-emitting layer and the emission color of the second light-emitting layer complementary to each other, a light-emitting device that emits white light as a whole can be obtained. The same applies to a light-emitting device having three or more light-emitting layers.
[0602] 35E and 35F, the light-emitting layer 771 and the light-emitting layer 772 may be made of light-emitting materials that emit light of the same color, or even the same light-emitting material. Alternatively, the light-emitting layer 771 and the light-emitting layer 772 may be made of light-emitting materials that emit light of different colors. When the light emitted by the light-emitting layer 771 and the light-emitting layer 772 are complementary colors, white light emission is obtained. FIG. 35F shows an example in which a layer 764 is further provided. The layer 764 may be a color conversion layer or a color filter (colored layer), or both.
[0603] 35C, 35D, 35E, and 35F, the layer 780 and the layer 790 may each independently have a laminated structure made up of two or more layers, as shown in FIG. 35B.
[0604] Next, materials that can be used in light-emitting devices will be described.
[0605] Of the lower electrode 761 and the upper electrode 762, a conductive film that transmits visible light is used for the electrode from which light is extracted. A conductive film that reflects visible light is preferably used for the electrode from which light is not extracted. When the display device has a light-emitting device that emits infrared light, a conductive film that transmits visible light and infrared light is preferably used for the electrode from which light is extracted, and a conductive film that reflects visible light and infrared light is preferably used for the electrode from which light is not extracted.
[0606] A conductive film that transmits visible light may also be used for the electrode on the side from which light is not extracted. In this case, the electrode is preferably disposed between the reflective layer and the EL layer 763. That is, light emitted from the EL layer 763 may be reflected by the reflective layer and extracted from the display device.
[0607] The pair of electrodes of the light-emitting device can be formed from a metal, an alloy, an electrically conductive compound, a mixture thereof, etc. Specific examples include indium tin oxide (In-Sn oxide, also referred to as ITO), In-Si-Sn oxide (also referred to as ITSO), indium zinc oxide (In-Zn oxide), In-W-Zn oxide, an aluminum-containing alloy (aluminum alloy) such as an alloy of aluminum, nickel, and lanthanum (Al-Ni-La), and an alloy of silver and magnesium, and an alloy of silver, palladium, and copper (Ag-Pd-Cu, also referred to as APC). Other examples of the metals that can be used include aluminum (Al), magnesium (Mg), titanium (Ti), chromium (Cr), manganese (Mn), iron (Fe), cobalt (Co), nickel (Ni), copper (Cu), gallium (Ga), zinc (Zn), indium (In), tin (Sn), molybdenum (Mo), tantalum (Ta), tungsten (W), palladium (Pd), gold (Au), platinum (Pt), silver (Ag), yttrium (Y), and neodymium (Nd), as well as alloys containing appropriate combinations of these metals. Other examples of the metals that can be used include elements belonging to Group 1 or Group 2 of the periodic table (e.g., lithium (Li), cesium (Cs), calcium (Ca), and strontium (Sr)), rare earth metals such as europium (Eu), and ytterbium (Yb), as well as alloys containing appropriate combinations of these metals, graphene, and the like.
[0608] The light-emitting device preferably has a micro-optical resonator (microcavity) structure. Therefore, one of a pair of electrodes of the light-emitting device preferably has a transmissive and reflective electrode for visible light, and the other preferably has a reflective electrode for visible light. By having the light-emitting device have a microcavity structure, the light emitted from the light-emitting layer can be resonated between the two electrodes, thereby intensifying the light emitted from the light-emitting device.
[0609] The semi-transmitting / semi-reflective electrode can have a laminated structure of a reflective electrode and an electrode that is transparent to visible light (also called a transparent electrode).
[0610] The light transmittance of the transparent electrode is 40% or more. For example, it is preferable to use an electrode with a visible light (light with a wavelength of 400 nm or more and less than 750 nm) transmittance of 40% or more for a light-emitting device. The visible light reflectance of the semi-transparent / semi-reflective electrode is 10% or more and 95% or less, preferably 30% or more and 80% or less. The visible light reflectance of the reflective electrode is 40% or more and 100% or less, preferably 70% or more and 100% or less. The resistivity of these electrodes is 1×10 −2 Preferably, it is Ωcm or less.
[0611] The light-emitting device can be made of either a low-molecular-weight compound or a high-molecular-weight compound, and may contain an inorganic compound. The layers constituting the light-emitting device can be formed by a method such as vapor deposition (including vacuum vapor deposition), transfer, printing, inkjet printing, or coating.
[0612] The light-emitting layer can contain one or more light-emitting materials. As the light-emitting material, a material that emits light of blue, purple, blue-purple, green, yellow-green, yellow, orange, red, or the like is appropriately used. Furthermore, as the light-emitting material, a material that emits near-infrared light can also be used.
[0613] The light-emitting material may include a fluorescent material, a phosphorescent material, a TADF material, and a quantum dot material.
[0614] Examples of fluorescent materials include pyrene derivatives, anthracene derivatives, triphenylene derivatives, fluorene derivatives, carbazole derivatives, dibenzothiophene derivatives, dibenzofuran derivatives, dibenzoquinoxaline derivatives, quinoxaline derivatives, pyridine derivatives, pyrimidine derivatives, phenanthrene derivatives, and naphthalene derivatives.
[0615] Examples of phosphorescent materials include organometallic complexes (particularly iridium complexes) having a 4H-triazole skeleton, a 1H-triazole skeleton, an imidazole skeleton, a pyrimidine skeleton, a pyrazine skeleton, or a pyridine skeleton; organometallic complexes (particularly iridium complexes) having a phenylpyridine derivative having an electron-withdrawing group as a ligand; platinum complexes; and rare earth metal complexes.
[0616] The light-emitting layer may contain one or more organic compounds (host materials, assist materials, etc.) in addition to a light-emitting substance (guest material). As the one or more organic compounds, one or both of a substance with high hole-transporting properties (hole-transporting material) and a substance with high electron-transporting properties (electron-transporting material) can be used. Furthermore, as the one or more organic compounds, a bipolar material or a TADF material may be used.
[0617] The light-emitting layer preferably includes, for example, a phosphorescent material and a hole-transporting material and an electron-transporting material that are a combination that easily forms an exciplex. This configuration allows for efficient emission using Exciplex-Triple Energy Transfer (ExTET), which is energy transfer from the exciplex to the light-emitting material (phosphorescent material). By selecting a combination that forms an exciplex that emits light that overlaps with the wavelength of the lowest-energy absorption band of the light-emitting material, energy transfer becomes smooth, allowing for efficient emission. This configuration simultaneously enables high efficiency, low-voltage operation, and long life of the light-emitting device.
[0618] The EL layer 763 may further include a layer containing a substance with high hole-injection properties, a substance with high hole-transport properties, a hole-blocking material, a substance with high electron-transport properties, a substance with high electron-injection properties, an electron-blocking material, a bipolar substance (a substance with high electron-transport properties and high hole-transport properties), or the like, as a layer other than the light-emitting layer.
[0619] The hole injection layer is a layer that injects holes from the anode into the hole transport layer and contains a substance with high hole injection properties, such as an aromatic amine compound and a composite material containing a hole transport material and an acceptor material (electron acceptor material).
[0620] As the hole transporting material, a substance with high hole transporting properties that can be used for a hole transporting layer, which will be described later, can be used.
[0621] Examples of the acceptor material include oxides of metals belonging to Groups 4 to 8 of the periodic table. Specific examples include molybdenum oxide, vanadium oxide, niobium oxide, tantalum oxide, chromium oxide, tungsten oxide, manganese oxide, and rhenium oxide. Among these, molybdenum oxide is particularly preferred because it is stable in the atmosphere, has low hygroscopicity, and is easy to handle. Alternatively, organic acceptor materials containing fluorine can be used. Other organic acceptor materials that can be used include quinodimethane derivatives, chloranil derivatives, and hexaazatriphenylene derivatives.
[0622] For example, as a substance with high hole-injection properties, a material containing a hole-transporting material and an oxide of a metal belonging to Groups 4 to 8 in the periodic table (typically, molybdenum oxide) may be used.
[0623] The hole transport layer is a layer that transports holes injected from the anode by the hole injection layer to the light emitting layer. The hole transport layer is a layer that contains a hole transporting material. The hole transporting material is a material having a concentration of 1×10 −6 cm 2 A substance having a hole mobility of 1 / Vs or more is preferred. Note that other substances can also be used as long as they have a higher hole transporting property than electron transporting property. As the hole transporting material, a substance having a high hole transporting property, such as a π-electron-rich heteroaromatic compound (e.g., a carbazole derivative, a thiophene derivative, a furan derivative, etc.) or an aromatic amine (a compound having an aromatic amine skeleton), is preferred.
[0624] The electron blocking layer is provided in contact with the light-emitting layer. The electron blocking layer is a layer containing a material that has hole transport properties and can block electrons. The electron blocking layer can be made of a material that has electron blocking properties among the hole transport materials described above.
[0625] The electron blocking layer has hole transport properties and can therefore also be called a hole transport layer. Furthermore, a layer of the hole transport layer that has electron blocking properties can also be called an electron blocking layer.
[0626] The electron transport layer is a layer that transports electrons injected from the cathode by the electron injection layer to the light emitting layer. The electron transport layer is a layer that contains an electron transporting material. The electron transporting material is a material having a concentration of 1×10 −6 cm 2 / Vs or more is preferred. Note that other substances can also be used as long as they have a higher electron transporting property than holes. Examples of electron-transporting materials that can be used include metal complexes having a quinoline skeleton, metal complexes having a benzoquinoline skeleton, metal complexes having an oxazole skeleton, and metal complexes having a thiazole skeleton, as well as oxadiazole derivatives, triazole derivatives, imidazole derivatives, oxazole derivatives, thiazole derivatives, phenanthroline derivatives, quinoline derivatives having a quinoline ligand, benzoquinoline derivatives, quinoxaline derivatives, dibenzoquinoxaline derivatives, pyridine derivatives, bipyridine derivatives, pyrimidine derivatives, and other π-electron-deficient heteroaromatic compounds including nitrogen-containing heteroaromatic compounds.
[0627] The hole-blocking layer is provided in contact with the light-emitting layer. The hole-blocking layer is a layer containing a material that has electron transport properties and can block holes. The hole-blocking layer can be made of a material that has hole-blocking properties and is selected from the ab...
Claims
1. forming a first pixel electrode and a first conductive layer; forming a first film on the first pixel electrode; forming a first mask film on the first film and the first conductive layer; processing the first film and the first mask film to form a first layer and a first mask layer on the first pixel electrode, and to form a second mask layer on the first conductive layer; forming a first insulating film on the first mask layer and the second mask layer; forming a second insulating film on the first insulating film using a photosensitive resin composition; exposing and developing the second insulating film to expose a portion of the first insulating film that overlaps with the second mask layer; performing a first etching process using the second insulating film as a mask to remove a portion of the first insulating film that overlaps with the second mask layer and to reduce the thickness of a portion of the second mask layer; exposing and developing the second insulating film to expose a portion of the first insulating film that overlaps with the first mask layer, and forming a second insulating layer that covers an end portion of the first layer; performing a second etching process using the second insulating layer as a mask to remove a portion of the first insulating film that overlaps with the first mask layer, to form a first insulating layer that overlaps with the second insulating layer, to thin a portion of the first mask layer, and to expose an upper surface of the first conductive layer; performing a heat treatment, and then performing a third etching process using the second insulating layer as a mask to remove a portion of the first mask layer and expose an upper surface of the first layer; forming a common electrode over the first layer, the first conductive layer, and the second insulating layer; A method for manufacturing a display device.
2. In claim 1, The first layer includes at least a first light-emitting layer.
3. In claim 2, the first layer has a first functional layer on the first light-emitting layer, The method for manufacturing a display device, wherein the first functional layer has at least one of a hole injection layer, an electron injection layer, a hole transport layer, an electron transport layer, a hole blocking layer, and an electron blocking layer.
4. forming a first pixel electrode, a second pixel electrode, and a first conductive layer; forming a first film on the first pixel electrode and the second pixel electrode; forming a first mask film on the first film and the first conductive layer; processing the first film and the first mask film to form a first layer and a first mask layer on the first pixel electrode, forming a second mask layer on the first conductive layer, and exposing the second pixel electrode; forming a second film on the first mask layer and the second pixel electrode; forming a second mask film on the second film; processing the second film and the second mask film to form a second layer and a third mask layer on the second pixel electrode, and exposing the first mask layer and the second mask layer; forming a first insulating film on the first mask layer to the third mask layer; forming a second insulating film on the first insulating film using a photosensitive resin composition; exposing and developing the second insulating film to expose a portion of the first insulating film that overlaps with the second mask layer; performing a first etching process using the second insulating film as a mask to remove a portion of the first insulating film that overlaps with the second mask layer and to reduce the thickness of a portion of the second mask layer; exposing and developing the second insulating film to expose a portion of the first insulating film that overlaps with the first mask layer and a portion of the first insulating film that overlaps with the third mask layer, thereby forming a second insulating layer that overlaps with a region sandwiched between the first pixel electrode and the second pixel electrode; performing a second etching process using the second insulating layer as a mask to remove a portion of the first insulating film overlapping with the first mask layer and a portion of the third mask layer, to form a first insulating layer overlapping with the second insulating layer, to reduce the film thickness of a portion of the first mask layer and a portion of the third mask layer, and to expose an upper surface of the first conductive layer; performing a heat treatment, and then performing a third etching process using the second insulating layer as a mask to remove a portion of the first mask layer and a portion of the third mask layer, thereby exposing an upper surface of the first layer and an upper surface of the second layer; forming a common electrode over the first layer, the second layer, the first conductive layer, and the second insulating layer; A method for manufacturing a display device.
5. In claim 4, The first layer includes at least a first light-emitting layer.
6. In claim 5, the first layer has a first functional layer on the first light-emitting layer, The method for manufacturing a display device, wherein the first functional layer has at least one of a hole injection layer, an electron injection layer, a hole transport layer, an electron transport layer, a hole blocking layer, and an electron blocking layer.
7. In any one of claims 1 to 6, The method for manufacturing a display device includes forming aluminum oxide films as the first mask film and the first insulating film by an ALD method.