Sputtering target, method for producing sputtering target, oxide thin film, thin film transistor, and electronic device
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Filing Date
- 2023-03-22
- Publication Date
- 2026-03-27
AI Technical Summary
The challenge lies in obtaining a uniformly amorphous indium oxide thin film on a large-area substrate during sputtering, as the existing methods struggle to maintain the amorphous state, leading to poor processability and residue formation during TFT fabrication, especially when the hydrogen concentration is limited to 4% or less.
A sputtering target with an oxide sintered body containing indium oxide as the main component, featuring a hydrogen concentration of 5×10^16 atoms/cm^3, an atomic concentration ratio of In to O elements between 1.3 and 2.5, and a density of 6.0 g/cm^3, which allows for uniform amorphization of the oxide thin film and improved TFT processability.
The proposed solution enables the formation of a uniformly amorphous oxide thin film with excellent TFT processability, reducing residue formation and enhancing the application of indium oxide thin films in thin film transistors.
Abstract
Description
Sputtering target, sputtering target manufacturing method, oxide thin film, thin film transistor, and electronic device
[0001] The present invention relates to a sputtering target, a method for manufacturing a sputtering target, an oxide thin film, a thin film transistor, and an electronic device.
[0002] 2. Description of the Related Art In recent years, research has been conducted into the application of crystalline oxide semiconductor thin films as channel layers of thin film transistors (hereinafter sometimes referred to as TFTs).
[0003] In order to apply a crystalline oxide semiconductor thin film to the channel layer of a TFT, a sputtering target having a sintered body with the same atomic composition as the crystalline oxide semiconductor thin film may be sputtered.
[0004] When a crystalline oxide semiconductor thin film crystallizes immediately after sputtering, its processability in acid solutions such as organic acids decreases, making it difficult to apply to TFTs. For this reason, the oxide thin film is formed in an amorphous state immediately after sputtering and then crystallized by annealing after film formation. For crystalline oxide semiconductor thin films with little (or no) additive elements, such as indium oxide, hydrogen gas is introduced during sputtering and the flow rate of the hydrogen gas is precisely controlled to suppress the atomic diffusion rate, resulting in an amorphous thin film.
[0005] For example, Patent Document 1 describes a thin film transistor having a source electrode, a drain electrode, a gate electrode, a gate insulating film, and a channel layer made of an oxide semiconductor. In the thin film transistor described in Patent Document 1, the average carrier concentration of the channel layer is 1×10 16 / cm 3 ~5 x 10 19 / cm 3 The thin film transistor described in Patent Document 1 also describes that the oxide semiconductor preferably has a crystalline structure, and the channel layer has a carrier concentration region higher than the average carrier concentration on the gate insulating film side of the channel layer.
[0006] Patent Document 2 describes a sputtering target made of an oxide sintered body containing indium oxide as a main component. The sputtering target described in Patent Document 2 has an Archimedes density AD (g / cm 3 ) and the theoretical density TD (g / cm) calculated from the lattice constant obtained by X-ray diffraction 3 ) and have a relationship of AD / TD>0.995.
[0007] Patent Document 3 describes an indium oxide-based sputtering target that is a sintered body consisting essentially of indium and oxygen and has a relative density of 90% or more.
[0008] Patent Document 4 describes a ceramic material that is made of In and O elements, has a relative density of 90% or more, has a residual stress x of −200≦x≦200 MPa, and has a volume of 1.0×10 4 mm 3 As described above, an indium oxide-based target made of an integrally formed indium oxide-based sintered body has been described.
[0009] Patent Document 5 describes a sputtering target for forming an oxide semiconductor film. The sputtering target has a hydrogen concentration of 1×10 16 atoms / cm 3 is less than.
[0010] In Non-Patent Document 1, amorphous In is formed by introducing hydrogen gas during sputtering. 2 O 3 A thin film of In:H was obtained, and the In:H thin film was then annealed. 2 O 3 High-mobility hydrogenated polycrystalline In:H thin films using a low-temperature solid-phase crystallization (SPC) process 2 O 3 (In 2 O 3 :H) Thin film transistors are described.
[0011] International Publication No. 2013 / 021632 JP 2005-060798 A JP 9-125236 A JP 8-013140 A JP 2015-061953 A
[0012] Magari, Y., Kataoka, T., Yeh, W., & Furuta, M. (2022). High-mobility hydrogenated polycrystalline In2O3 (In2O3: H) thin-film transistors. Nature Communications, 13(1), 1-8.
[0013] Indium oxide, a crystalline oxide semiconductor, does not contain any additive elements, and therefore, the thin film immediately after sputtering deposition is more likely to crystallize than oxide materials containing indium and additive elements. Hydrogen gas is used as a sputtering gas to suppress crystallization in the thin film immediately after sputtering deposition and obtain an amorphous thin film. When hydrogen gas is used as the sputtering gas in a large-scale mass production machine, for example, a mixture of a rare gas and hydrogen gas is used. However, it is strongly desired that the hydrogen concentration in the mixture of a rare gas and hydrogen gas be approximately 4% or less, which is the explosion limit of hydrogen, on a volume basis with respect to the entire mixture gas.
[0014] In particular, when obtaining an indium oxide thin film, it is difficult to obtain a thin film that is uniformly amorphized on a large-area substrate simply by externally introducing hydrogen at a concentration of 4% by volume or less during sputtering deposition. If an amorphous thin film is not obtained during sputtering deposition, acid processability decreases, and residues are left behind during patterning during TFT fabrication. Therefore, if an amorphous thin film is not obtained during sputtering deposition, it becomes difficult to apply the indium oxide thin film to TFTs. Thus, there has been a need for further improvement of the oxide sintered body containing indium oxide as a main component, which is used as a material for a sputtering target, so that it is possible to uniformly amorphize an oxide thin film formed on a large-area substrate.
[0015] An object of the present invention is to provide a sputtering target including an oxide sintered body containing indium oxide as a main component, which can uniformly form an oxide thin film with excellent TFT processability, a method for manufacturing the sputtering target, an oxide thin film using the sputtering target, a thin-film transistor including the oxide thin film, and an electronic device including the thin-film transistor.
[0016] [1] A sputtering target comprising an oxide sintered body containing indium oxide as a main component, wherein the oxide sintered body has a hydrogen concentration of 5×10 16 atoms / cm 3 or more, the atomic concentration ratio of In (indium) element to O (oxygen) element (O element / In element) is 1.3 or more and less than 2.5, and the density of the oxide sintered body measured by Archimedes' method is 6.0 g / cm 3 That's it, sputtering target.
[0017] [2] The hydrogen concentration is 1×10 17 atoms / cm 3 The sputtering target according to [1],
[0018] [3] The hydrogen concentration is 1×10 18 atoms / cm 3 The sputtering target according to [1] or [2],
[0019] [4] A method for producing the sputtering target according to any one of [1] to [3], comprising: a step of obtaining a sintered body raw material containing an indium compound; a step of molding the sintered body raw material to obtain a molded body; and a step of sintering the molded body and then lowering the temperature in an atmosphere containing an inert gas and hydrogen to obtain the oxide sintered body, wherein in the temperature lowering step, the temperature is maintained in a temperature range of 800°C or higher and 1000°C or lower for at least 3 hours.
[0020] [5] An oxide thin film obtained by using the sputtering target according to any one of [1] to [3].
[0021] [6] A thin film transistor comprising the oxide thin film according to [5].
[0022] [7] An electronic device comprising the thin film transistor according to [6].
[0023] According to one aspect of the present invention, there are provided a sputtering target including an oxide sintered body containing indium oxide as a main component, which can uniformly form an oxide thin film with excellent TFT processability, a method for manufacturing the sputtering target, an oxide thin film using the sputtering target, a thin film transistor including the oxide thin film, and an electronic device including the thin film transistor.
[0024] 1 is a perspective view showing the shape of a target according to one embodiment of the present invention; FIG. 2 is a perspective view showing the shape of a target according to one embodiment of the present invention; FIG. 3 is a perspective view showing the shape of a target according to one embodiment of the present invention; FIG. 4 is a longitudinal cross-sectional view showing a thin film transistor according to one embodiment of the present invention; FIG. 5 is a longitudinal cross-sectional view showing a thin film transistor according to one embodiment of the present invention; FIG. 6 is a longitudinal cross-sectional view showing a thin film transistor according to one embodiment of the present invention; FIG. 7 is a longitudinal cross-sectional view showing a quantum tunnel field effect transistor according to one embodiment of the present invention; FIG. 8 is a longitudinal cross-sectional view showing another embodiment of a quantum tunnel field effect transistor; FIG. 9 is a longitudinal cross-sectional view showing a manufacturing procedure for a quantum tunnel field effect transistor; FIG. 10 is a longitudinal cross-sectional view showing a manufacturing procedure for a quantum tunnel field effect transistor; FIG. 11 is a longitudinal cross-sectional view showing a manufacturing procedure for a quantum tunnel field effect transistor; FIG. 12 is a longitudinal cross-sectional view showing a manufacturing procedure for a quantum tunnel field effect transistor; FIG. 13 is a top view showing a display device using a thin film transistor according to one embodiment of the present invention; FIG. 14 is a diagram showing a circuit of a pixel portion that can be applied to pixels of a VA-mode liquid crystal display device; FIG. 15 is a diagram showing a circuit of a pixel portion of a display device using an organic EL element; FIG. 16 is a diagram showing a circuit of a pixel portion of a solid-state imaging device using a thin film transistor according to one embodiment of the present invention; FIG. 17 is an optical microscope image of a semiconductor pattern after resist stripping in an oxide thin film formed using a sputtering target according to one embodiment of the present invention. 1 is an optical microscope image of a semiconductor pattern after resist stripping in an oxide thin film formed using a sputtering target according to one embodiment of the comparative example.
[0025] Hereinafter, embodiments will be described with reference to the drawings, etc. However, it will be readily understood by those skilled in the art that the embodiments can be implemented in many different ways and that various changes in form and details can be made without departing from the spirit and scope of the present invention. Therefore, the present invention should not be interpreted as being limited to the following description of the embodiments.
[0026] In the drawings, sizes, layer thicknesses, regions, etc. may be exaggerated for clarity. Therefore, the present invention is not limited to the illustrated sizes, layer thicknesses, regions, etc. Note that the drawings are schematic illustrations of ideal examples, and the present invention is not limited to the shapes, values, etc. shown in the drawings.
[0027] The ordinal numbers "first," "second," and "third" used in this specification are used to avoid confusion between components, and components that are not specified numerically are not limited in number.
[0028] In this specification and the like, the terms "film" or "thin film" and "layer" can be used interchangeably in some cases.
[0029] In the sintered body and oxide thin film of this specification and the like, the terms "compound" and "crystalline phase" can be interchangeable in some cases.
[0030] In this specification, the “oxide sintered body” may be simply referred to as the “sintered body.” In this specification, the “sputtering target” may be simply referred to as the “target.”
[0031] In this specification, "electrically connected" includes connection via "something that has some kind of electrical function." Here, "something that has some kind of electrical function" is not particularly limited as long as it allows electrical signals to be transmitted and received between the connected objects. For example, "something that has some kind of electrical function" includes electrodes, wiring, switching elements (such as transistors), resistive elements, inductors, capacitors, and other elements with various functions.
[0032] In this specification, the functions of the source and drain of a transistor may be interchanged when transistors of different polarities are used or when the direction of current flow changes during circuit operation, etc. Therefore, in this specification, the terms source and drain may be used interchangeably.
[0033] In this specification, a numerical range expressed using "to" means a range that includes the numerical value written before "to" as the lower limit and the numerical value written after "to" as the upper limit.
[0034] The present inventors have invented the present invention based on the following findings. The inventors investigated ways to suppress residues generated during patterning when fabricating TFTs (hereinafter, the residues generated during patterning are referred to as patterning residues) and thereby facilitate the application of oxide thin films containing indium oxide as a primary component to TFTs. The inventors then discovered that by determining an appropriate hydrogen content in the oxide sintered body provided in the target, it is possible to uniformly amorphize an oxide thin film formed on a large-area substrate (i.e., it is possible to uniformly form an oxide thin film with excellent TFT processability), thereby achieving excellent TFT processability. Furthermore, the inventors discovered that, in addition to the appropriate hydrogen content in the target, the density of the sintered body and the atomic concentration ratio of oxygen to indium in the sintered body (O / In) are important conditions for uniformly amorphizing an oxide thin film containing indium oxide as a primary component when the oxide thin film is formed on a large-area substrate.
[0035] [Sputtering Target] The sputtering target according to this embodiment uses an oxide sintered body. The sintered body is used as a film raw material when forming a film by sputtering. That is, the sintered body provided in the target according to this embodiment is an oxide sintered body containing indium oxide as a main component. The sintered body has a hydrogen concentration of 5×10 16 atoms / cm 3 or more, the atomic concentration ratio of In (indium) element to O (oxygen) element (O element / In element) is 1.3 or more and less than 2.5, and the density of the oxide sintered body measured by Archimedes' method is 6.0 g / cm 3 That's all.
[0036] The sintered body provided in the target according to this embodiment contains indium oxide as a main component and is substantially made of indium oxide. The sintered body preferably contains 99% by mass or more, more preferably 99.9% by mass or more, of indium oxide relative to the entire sintered body. The sintered body also contains hydrogen. That is, the sintered body may be substantially composed of only In (indium), O (oxygen), and H (hydrogen). Here, "substantially" means that the sintered body according to this embodiment may contain other components as long as the effects of the present invention resulting from the combination of In and O are achieved. In this case, the sintered body provided in the target according to this embodiment may contain impurity elements.
[0037] Impurities refer to elements that are not intentionally added, but are mixed in during raw materials, manufacturing processes, etc. In other words, impurities are inevitable impurities that are inevitably included. The same applies to the following explanation. Examples of impurities include at least one element selected from the group consisting of alkali metal elements (elements such as Li (lithium), Na (sodium), K (potassium), and Rb (rubidium)), alkaline earth metal elements (elements such as Mg (magnesium), Ca (calcium), Sr (strontium), and Ba (barium)), B element (boron element), C element (carbon element), N element (nitrogen element), F element (fluorine element), Si element (silicon element), Zr element (zirconium element), Fe element (iron element), Zn element (zinc element), Sn element (tin element), Al element (aluminum element), and Cl element (chlorine element).
[0038] <Atomic Concentration Ratio (O Element / In Element)> In the sintered body provided in the target according to this embodiment, the atomic concentration ratio (O element / In element) of In (indium) to O (oxygen) is 1.3 or more and less than 2.5. When the atomic concentration ratio of oxygen element to indium element is in the range of 1.3 or more and less than 2.5, the hydrogen concentration contained in the sintered body can be changed by changing the oxygen concentration, thereby making it possible to uniformly amorphize an oxide thin film provided on a large-area substrate. The atomic concentration ratio of oxygen element to indium element is preferably 1.4 or more, more preferably 1.5 or more. The atomic concentration ratio of oxygen element to indium element is preferably 2.4 or less, more preferably 2.3 or less.
[0039] The atomic concentration ratio in the sintered body can be observed with a scanning electron microscope (SEM), and each element can be quantitatively analyzed using energy dispersive X-ray spectroscopy (EDX). Specifically, when the shape of the sputtering target is circular, a square inscribed in the circle is divided into 16 equal areas, and the center of each square is observed with an SEM at an acceleration voltage of 10 kV and a magnification of 400 times. When the shape of the sputtering target is rectangular or cylindrical, the target is divided into 16 equal areas, and the center of each square is observed with an SEM at an acceleration voltage of 10 kV and a magnification of 400 times. Next, in each observation region, the X-ray intensities of In (indium) element and O (oxygen) element are integrated by EDX and converted into atomic concentrations, and the average of each observation point is used as the element concentration ratio of indium to oxygen.
[0040] <Hydrogen Concentration> In the sintered body provided in the target according to this embodiment, the hydrogen concentration (the hydrogen concentration contained in the sintered body) is 5×10 16 atoms / cm 3 The hydrogen concentration is 5×10 or more. 16 atoms / cm 3If the hydrogen concentration is more than 7×10, the hydrogen concentration in the sintered body is increased, and it becomes possible to uniformly amorphize the oxide thin film provided on the large-area substrate. From the viewpoint of making it easier to uniformly amorphize the oxide thin film provided on the large-area substrate, the hydrogen concentration is preferably 7×10 16 atoms / cm 3 It is preferable that the ratio is 8×10 or more. 16 atoms / cm 3 More preferably, it is 1×10 or more. 17 atoms / cm 3 More preferably, it is 1×10 or more. 18 atoms / cm 3 The upper limit of the hydrogen concentration is not particularly limited, and is, for example, 1×10 20 atoms / cm 3 In this specification, the unit of the hydrogen concentration [atoms / cm 3 ]to[atoms・cm -3 ] may be written.
[0041] The hydrogen concentration can be quantitatively evaluated using secondary ion mass spectrometry (SIMS). + Using a 14.5 kV accelerating voltage, sputtering is performed to a depth of 20 μm from the surface of the sintered body to be measured. Thereafter, a 100 μm raster (100 μm x 100 μm size), a 30 μm measurement area (30 μm x 30 μm size), and a depth of at least 1 μm are sputtered with primary ions to obtain the mass spectrum intensity of the hydrogen concentration. Furthermore, to calculate the absolute value of the hydrogen concentration from the mass spectrum, hydrogen is injected into the sintered body by ion implantation at a controlled dose to prepare a standard sample (ZnO) with a known hydrogen concentration. The mass spectrum intensity of hydrogen for the standard sample is obtained by SIMS analysis, and the relationship between the absolute value of hydrogen and the mass spectrum intensity is used as a calibration curve. Finally, the mass spectrum intensity of the sintered body to be measured and the calibration curve are used to calculate the hydrogen concentration of the measurement object, which is then converted into the absolute value of the hydrogen concentration (atoms cm). -3 )
[0042] It is known that, due to its principles, SIMS analysis makes it difficult to obtain accurate data near the sample surface and near the interface between layers of different materials. Therefore, when analyzing the distribution of hydrogen concentration in the thickness direction of a sintered body or an oxide thin film using SIMS, the hydrogen concentration is taken as the average value in a region where there is no extreme fluctuation and where a nearly constant intensity is obtained within the range of the target film.
[0043] The adjustment of the hydrogen concentration contained in the sintered body is not particularly limited, and can be controlled, for example, by the gas atmosphere during the temperature drop in the sintering process of the sintered body. For example, a mixed gas of an inert gas and hydrogen is effective as the gas atmosphere during the temperature drop. The method for controlling the hydrogen concentration contained in the sintered body preferably employs the process described later in the method for producing a sputtering target.
[0044] <Density> The density of the sintered body included in the target according to this embodiment measured by Archimedes' method (hereinafter, sometimes referred to as the density of the sintered body) is 6.0 g / cm 3 The density of the sintered body is 6.0 g / cm 3 If the density is above 6.2 g / cm, it is possible to suppress the occurrence of cracks in the target and abnormal discharge during film formation, and to form a thin film of indium oxide containing hydrogen in a nearly uniform state. Furthermore, by increasing the density of the sintered body, it is possible to form the oxide thin film under high-output film formation conditions, thereby improving the film density of the thin film and making it easier to retain hydrogen within the oxide thin film. The density of the sintered body is 6.2 g / cm 3 It is preferable that the density is 6.5 g / cm or more. 3 More preferably, it is 6.7 g / cm or more. 3 The upper limit of the density of the sintered body is not particularly limited, and is, for example, 7.2 g / cm 3 The following levels are included:
[0045] The density of the sintered body measured by the Archimedes method is the actually measured density. Note that, for the density of indium oxide, the value of the specific gravity of oxides listed in "Chemical Handbook, Basics I, Revised 2nd Edition, edited by the Chemical Society of Japan (Maruzen Co., Ltd.)" can be used, since the density and specific gravity are almost equivalent.
[0046] The shape of the sputtering target is not particularly limited. The sputtering target may be, for example, a plate-like shape as shown by reference numeral 1 in FIG. 1A or a cylindrical shape as shown by reference numeral 1A in FIG. 1B. In the case of a plate-like shape, the planar shape may be a rectangle as shown by reference numeral 1 in FIG. 1A or a circle as shown by reference numeral 1B in FIG. 1C. The oxide sintered body may be integrally molded, or may be a multi-division type in which a plurality of divided oxide sintered bodies (reference numeral 1C) are each fixed to a backing plate 3 as shown in FIG. 1D.
[0047] The sintered body used as the material of the target according to this embodiment contains indium oxide as a main component, and (i) the hydrogen concentration is 5×10 16 atoms / cm 3 or more, (ii) the atomic concentration ratio of In (indium) element to O (oxygen) element (O element / In element) is 1.3 or more and less than 2.5, and (iii) the density of the oxide sintered body measured by Archimedes' method is 6.0 g / cm 3 By satisfying all of the above conditions (i) to (iii), it is possible to uniformly amorphize an oxide thin film provided on a large-area substrate, and the generation of patterning residues is suppressed.
[0048] <Other Properties of Sintered Body> In the sintered body used as the material for the target according to this embodiment, the flexural strength of the sintered body is preferably 170 MPa or more. The flexural strength of the sintered body is more preferably 180 MPa or more, and even more preferably 200 MPa or more. The upper limit of the flexural strength of the sintered body is not particularly limited. If the flexural strength of the sintered body is 170 MPa or more, for example, even when a large panel with a large area is produced using a large-scale device, sputtering is facilitated with the target cracking suppressed. The flexural strength of the sintered body is determined based on JIS R 1601:2008 by placing a rectangular columnar test piece on two supports installed 30 mm apart, applying a load to the presser with the presser in contact with the center, and calculating the average load (three-point bending strength) of 10 test pieces at which the test piece breaks.
[0049] In the sintered body used as the material for the target according to this embodiment, the average crystal grain size of the crystalline phase contained in the sintered body is preferably 10 μm or less, more preferably 5 μm or less, and even more preferably 4 μm or less. The lower limit of the average crystal grain size of the sintered body is not particularly limited, and may be, for example, about 0.5 μm or more. By setting the average crystal grain size of the crystalline phase contained in the sintered body to 10 μm or less, the uniformity and reproducibility of the TFT characteristics of the resulting thin film transistor can be improved. The average crystal grain size of the crystalline phase contained in the sintered body is measured as the average crystal grain size of the crystalline phase having a bixbyite structure composed of In and O elements.
[0050] The average crystal grain size of the sintered body can be measured using an X-ray microanalyzer (EPMA). Specifically, if the sputtering target is circular, first divide the square inscribed in the circle into 16 equal parts, and prepare a sintered body sample at the center of each square. If the sputtering target is rectangular or cylindrical, divide it into 16 equal parts, and prepare a sintered body sample at the center of each square (16 in total). Here, the sintered body sample is the measurement sample. The sintered body sample is prepared by cutting the sintered body into pieces less than 1 cm (1 cm x 1 cm in size), and embedding this sintered body sample in a 1-inch diameter epoxy-based room-temperature curing resin. The embedded sintered body sample is then polished using abrasive paper #400, #600, #800, 3 μm diamond suspension in water, and 50 nm colloidal silica (for final finishing), in that order. The polished surface is then magnified 1000 times at an acceleration voltage of 10 kV, and the maximum diameter of the crystal grains observed within a 30 μm × 30 μm square frame on the surface of the sintered body is measured. The maximum diameter of the crystal grains is measured for each of the 16 samples, and the average value of the obtained maximum diameters is taken as the average crystal grain size.
[0051] In the sintered body used as the material for the target according to this embodiment, the sintered body preferably has an electrical resistivity of 100 mΩcm or less, more preferably 50 mΩcm or less, and even more preferably 30 mΩcm or less. When the electrical resistivity is 100 mΩcm or less, the target is less likely to be charged during sputtering discharge, the occurrence of abnormal discharge is suppressed, the plasma state is more likely to be stabilized, and the occurrence of sparks is suppressed. When the electrical resistivity is high, the target may be charged during sputtering discharge, causing abnormal discharge, or the plasma state may be unstable and sparks may occur. The electrical resistivity of the sintered body is measured at any 10 points on the sintered body according to the four-probe method (JIS R 1637) using a resistivity meter, and the average value is taken as the electrical resistivity of the sintered body.
[0052] <Method for manufacturing a sputtering target> An example of a preferred method for manufacturing the target according to this embodiment will be described. The method for manufacturing a sputtering target according to this embodiment includes the steps of: obtaining a sintered body raw material containing an indium compound (hereinafter, this step may be referred to as a sintered body raw material preparation step); molding the sintered body raw material to obtain a molded body (hereinafter, this step may be referred to as a molding step); and sintering the molded body, and then lowering the temperature in an atmosphere containing an inert gas and hydrogen to obtain the sintered body (hereinafter, this step may be referred to as a sintering step). In the temperature lowering step, it is preferable to hold the temperature in a temperature range of 800°C or higher and 1000°C or lower for at least 3 hours.
[0053] A preferred manufacturing method for the target according to this embodiment may further include at least one of a step of grinding the sintered body (hereinafter, this may be referred to as the grinding step), a step of cleaning the ground sintered body (hereinafter, this may be referred to as the cleaning step), and a step of bonding the sintered body to a backing plate (hereinafter, this may be referred to as the bonding step).
[0054] (Sintered body raw material preparation process) The sintered body raw material preparation process is a process of preparing a sintered body raw material containing an indium compound. In the sintered body raw material preparation process, first, a raw material powder of an indium compound to be used as a raw material for the sintered body included in the sputtering target according to this embodiment is prepared. Examples of the indium compound include at least one of an oxide of indium and a hydroxide of indium. From the viewpoint of ease of sintering and suppression of remaining by-products, the indium compound is preferably an oxide of indium (i.e., indium oxide).
[0055] The purity of the indium compound is preferably 2N (99% by mass) or more, more preferably 3N (99.9% by mass) or more, and even more preferably 4N (99.99% by mass) or more. By making the purity of the indium compound 2N or more, it becomes easier to ensure the durability of the sintered body. Furthermore, by making the purity of the indium compound 2N or more, for example, when a TFT including an oxide thin film is used in a liquid crystal display, the possibility of impurities entering the liquid crystal side and causing burn-in can be reduced. By using a highly pure indium compound, it becomes easier to obtain oxide sintering containing indium oxide as a main component.
[0056] The average particle size of the indium compound is preferably 0.1 μm or more and 2 μm or less, and more preferably 0.5 μm or more and 1.5 μm or less. The average particle size of the indium compound can be measured using a laser diffraction particle size distribution analyzer or the like.
[0057] Next, the prepared raw material powder of the indium compound is mixed and crushed to obtain a raw material mixture. The obtained raw material mixture may be used as a sintered body raw material. A binder may be added to the raw material powder when mixing and crushing the raw material powder. The raw material powder can be mixed and crushed using known devices such as a ball mill, a bead mill, a jet mill, or an ultrasonic device. The mixing and crushing conditions may be adjusted appropriately. The mixing and crushing time varies depending on the size of the device and the amount of raw material mixture to be processed. The processing time may be adjusted, for example, so that the particle size distribution of the raw material mixture is nearly uniform, with all particles being 1 μm or less. Examples of crushing media (beads) used in the bead mill include zirconia, alumina, quartz, silicon nitride, stainless steel, mullite, glass, and silicon carbide (SiC).
[0058] The raw material mixture after mixing and crushing may be rapidly dried and granulated by a spray drying method. A raw material granulated powder is obtained by granulating the raw material mixture. Specifically, a spray dryer is used to granulate the raw material mixture after mixing and crushing. The specific drying conditions using a spray dryer are determined by various conditions such as the concentration of the raw material mixture to be dried, the hot air temperature used for drying, the rotation speed of the spray dryer, and the air volume. When performing the spray drying method, it is advisable to determine the optimal conditions in advance. The shape of the raw material granulated powder obtained by granulating the raw material mixture is not particularly limited, but a spherical shape is preferable. The obtained raw material granulated powder may be used as a sintered body raw material.
[0059] When a raw material mixture as a sintered body raw material that has not been subjected to a calcination treatment in the calcination step described below is used and the raw material mixture is granulated by a spray drying method, the raw material mixture after mixing and crushing may be used as is to prepare the raw material granulated powder. When a raw material mixture as a sintered body raw material that has been subjected to a calcination treatment in the calcination step described below is used and the raw material mixture is granulated by a spray drying method, the raw material mixture that has been subjected to the calcination treatment may be used again as a crushed raw material mixture. In the raw material mixture that has been subjected to the calcination treatment, particles are bonded to each other, so when a granulation treatment is performed, it is preferable to perform a crushing treatment before the granulation treatment.
[0060] The granulated raw granulated powder may be classified to adjust the particle size of the raw granulated powder. The raw granulated powder with the adjusted particle size may be used as a sintered raw material. Examples of classification methods include sieving the raw granulated powder that has been subjected to a granulation process to select particles belonging to a desired particle size range. The sieve used in this method is preferably a sieve having openings large enough to allow raw granulated powder of a desired particle size to pass through. The sieves used in this method are preferably a first sieve for selecting the raw granulated powder based on the lower limit of the particle size range and a second sieve for selecting the raw granulated powder based on the upper limit of the particle size range. For example, when controlling the particle size of the raw granulated powder to a range of 150 μm or less, a sieve having openings large enough to allow raw granulated powder of 150 μm or less to pass through but not raw granulated powder exceeding 150 μm is used to select raw granulated powder within the range of 150 μm or less. Furthermore, when the particle size of the raw granulated powder is controlled to, for example, a range of 25 μm or more and 150 μm or less, first, a sieve (first sieve) having openings large enough to allow raw granulated powder less than 25 μm to pass through but not allow raw granulated powder of 25 μm or more to pass through is used to select raw granulated powder having a particle size of 25 μm or more. Next, the raw granulated powder after this selection is sorted using a sieve (second sieve) having openings large enough to allow raw granulated powder of 150 μm or less to pass through but not allow raw granulated powder of more than 150 μm to pass through, to select raw granulated powder having a particle size of 25 μm or more and 150 μm or less. The second sieve may be used first, followed by the first sieve.
[0061] (Calking Step) The target manufacturing method according to this embodiment may include a step of calcining the sintered raw material obtained in the raw material preparation step (this step is referred to as the calcining step). In the calcining step, the sintered raw material as a raw material mixture obtained after mixing and crushing the raw material powder may be calcined. In the calcining step, after obtaining the sintered raw material as a raw material mixture that will be the raw material of the sputtering target, this raw material mixture (i.e., the sintered raw material) is calcined. The calcining step is a step that is provided as needed.
[0062] Since calcination makes it easy to increase the density of the sintered body obtained, the method for manufacturing a target according to this embodiment preferably includes a calcination step. On the other hand, from the viewpoint of suppressing an increase in costs, it is more preferable to increase the density of the sintered body without providing a calcination step.
[0063] In the calcination, the sintered body raw material is preferably heat-treated at a temperature ranging from 500°C to 1200°C for a treatment time ranging from 1 hour to 100 hours. The calcination is preferably carried out at a temperature ranging from 800°C to 1200°C for a treatment time ranging from 2 hours to 50 hours. By setting the heat treatment conditions to 500°C or higher and 1 hour or longer, the thermal decomposition of the indium compound is sufficient. On the other hand, by setting the heat treatment conditions to 1200°C or lower and 100 hours or shorter, particle coarsening can be suppressed. The calcined product obtained in the calcination step is preferably crushed before the molding step and firing step described below.
[0064] (Molding step) The molding step is a step in which the sintered body raw material (or the calcined product as the sintered body raw material when the calcining step is performed) is pressurized and molded into a molded body. This step molds the sintered body into a shape suitable for a target. When the calcining step is performed, the obtained fine powder of the calcined product can be granulated and then molded into a desired shape by press molding.
[0065] The average thickness of the molded body is preferably 5.5 mm or more, more preferably 6 mm or more, even more preferably 8 mm or more, and particularly preferably 12 mm or more. When the average thickness of the molded body is 5.5 mm or more, the temperature gradient in the thickness direction of the molded body is reduced, and it is expected that the combination of crystal types at the surface and in the depths is less likely to change.
[0066] Examples of molding processes that can be used in the molding step include press molding (uniaxial pressing), mold molding, casting molding, and injection molding. In order to obtain a sintered body (target) with high sintering density, molding is preferably performed by cold isostatic pressing (CIP) or the like. Furthermore, a molding process of two or more stages may be performed, such as by cold isostatic pressing (CIP) and hot isostatic pressing (HIP) after press molding (uniaxial pressing).
[0067] When using a cold isostatic or hydrostatic pressure device, the surface pressure is 78.5 MPa (800 kgf / cm 2 converted to SI units) or more, 392.4 MPa (4000 kgf / cm 2 It is preferable to hold the sintering pressure at 196.2 MPa or more and 294.3 MPa or less for 0.5 minutes or more and 60 minutes or less. It is more preferable to hold the sintering pressure at 196.2 MPa or more and 294.3 MPa or less for 2 minutes or more and 30 minutes or less. Within the above range, it is expected that compositional irregularities inside the molded body will be reduced and made uniform. By setting the sintering pressure to 78.5 MPa or more, the resistance of the sintered body after sintering can be reduced. By setting the sintering pressure to 392.4 MPa or less, molding can be performed without increasing the size of the equipment. A holding time of 0.5 minutes or more can prevent the resistance from increasing after sintering. A holding time of 60 minutes or less can prevent the process from taking too long and becoming uneconomical. Molding aids such as polyvinyl alcohol, methyl cellulose, polywax, and oleic acid may be used in the molding process.
[0068] (Sintering Step) In the sintering step, the molded body obtained in the molding step is sintered to obtain a sintered body. In the sintering step, a commonly used sintering method such as atmospheric sintering, hot press sintering, or hot isostatic pressing (HIP) sintering can be used. The obtained sintered body becomes a sputtering target material.
[0069] The sintering temperature is preferably 1200° C. or higher and 1600° C. or lower, and more preferably 1300° C. or higher and 1500° C. or lower. The sintering time is preferably 10 hours or higher and 50 hours or lower, more preferably 12 hours or higher and 40 hours or lower, and even more preferably 13 hours or higher and 30 hours or lower.
[0070] When the sintering temperature is 1200°C or higher, the density of the sintered body can be improved to 6.0 g / cm 3 A sintered body having a density of 1000°C or more can be easily obtained. Furthermore, when the sintering temperature is 1200°C or higher and the sintering time is 10 hours or longer, sintering proceeds sufficiently, the electrical resistance of the target is easily reduced, and abnormal discharge is less likely to occur. When the sintering temperature is 1600°C or lower and the sintering time is 50 hours or shorter, an increase in the average crystal grain size due to significant crystal grain growth and the occurrence of coarse voids can be suppressed, and a decrease in the strength of the sintered body and abnormal discharge are less likely to occur.
[0071] In the atmospheric sintering method, the molded body is sintered in an air atmosphere or an oxygen gas atmosphere. The oxygen gas atmosphere preferably has an oxygen concentration of, for example, 10% by volume or more and 50% by volume or less. By performing the temperature rising process in an air atmosphere, the density of the sintered body can be increased.
[0072] The heating rate during sintering is preferably 0.1°C / min or more and 2°C / min or less when heating from 800°C to the sintering temperature. In the sintered body according to this embodiment, the temperature range of 800°C or more is the temperature range in which sintering progresses most. If the heating rate within this temperature range is 0.1°C / min or more, excessive grain growth can be suppressed, and high density can be achieved. If the heating rate is 2°C / min or less, temperature distribution in the molded body can be suppressed, and warping or cracking of the sintered body can be suppressed. When heating from 800°C to the sintering temperature, the heating rate is preferably 0.5°C / min or more and 2.0°C / min or less, and more preferably 1.0°C / min or more and 1.8°C / min or less.
[0073] After sintering, the temperature-reducing atmosphere when lowering the temperature from the sintering temperature is preferably a mixed gas atmosphere containing an inert gas and hydrogen. The concentration of hydrogen contained in the mixed gas is preferably in the range of 1% by volume or more and 5% by volume or less, more preferably 3% by volume or more and 5% by volume or less, based on the total of the inert gas and hydrogen. The inert gas is not particularly limited, and argon gas is preferable, for example. The cooling during temperature reduction may be performed by leaving the material to cool. The temperature-reducing rate during temperature reduction is preferably 4°C / min or less, more preferably 2°C / min or less, even more preferably 1°C / min or less, even more preferably 0.8°C / min or less, and even more preferably 0.5°C / min or less. When the temperature-reducing rate is 4°C / min or less, cracks are less likely to occur during temperature reduction.
[0074] During the temperature reduction process in an inert gas atmosphere containing hydrogen, the atmosphere in the sintering furnace is preferably maintained at a temperature range of 800°C to 1000°C for at least 3 hours (this temperature reduction process is sometimes referred to as a temperature-reducing process). Maintaining a constant temperature during the temperature reduction process from the sintering temperature allows hydrogen to be more efficiently incorporated into the target. Here, "maintaining a constant temperature" means maintaining the temperature in the sintering furnace at a temperature in the range of 1000°C to 800°C during the temperature reduction process (e.g., if the holding temperature is 900°C, a temperature range of 880°C to 920°C, 900°C plus or minus 20°C). The treatment temperature during the temperature-reducing process is more preferably in the range of 900°C to 1000°C. The treatment time during the temperature-reducing process is more preferably 4 hours or more, even more preferably 5 hours or more, and even more preferably 7 hours or more. The treatment time may be, for example, 10 hours or less. That is, in the process of lowering the temperature in an atmosphere containing hydrogen in an inert gas, when the temperature is lowered from the sintering temperature and reaches a temperature in the vicinity of a specific temperature in the temperature range of 800°C or higher and 1000°C or lower (preferably, a temperature range of 900°C or higher and 1000°C or lower), the temperature is maintained at the temperature in the vicinity of the specific temperature (i.e., the specific temperature in the temperature range of 800°C or higher and 1000°C or lower plus or minus 20°C) for at least 3 hours, and then the temperature is lowered again, whereby the hydrogen concentration in the material is reduced to 5 x 10 16 atoms / cm 3 The above sintered body is easily obtained.
[0075] In particular, by adopting the above-described sintering conditions and temperature-reducing conditions in the sintering step, the sintered body that is the material for the target according to this embodiment has (i) a hydrogen concentration of 5×10 16 atoms / cm 3 or more, (ii) the atomic concentration ratio of In (indium) element to O (oxygen) element (O element / In element) is 1.3 or more and less than 2.5, and (iii) the density of the oxide sintered body measured by Archimedes' method is 6.0 g / cm 3 All of the above conditions can be met.
[0076] (Grinding process) The grinding process is a process of cutting the sintered body into a shape suitable for installation in a sputtering device. The surface of the sintered body often has at least one of the following phenomena: the presence of a highly oxidized sintered portion, or the surface is uneven. The sintered body is then cut to a specified size.
[0077] In the grinding step, the surface of the sintered body is preferably ground off by 0.3 mm or more, more preferably by 0.5 mm or more, and even more preferably by 2 mm or more. By grinding off the surface of the sintered body by 0.3 mm or more, it is possible to remove portions of the crystal structure near the surface that have changed.
[0078] The oxide sintered body is preferably ground, for example, by a surface grinder to obtain a material having an average surface roughness Ra of 5 μm or less. Furthermore, the sputtering surface of the sputtering target is subjected to mirror finishing to obtain a material having an average surface roughness Ra of 1000×10 -10 The polishing method may be 1 / 2 m or less. This mirror finish (polishing) can be performed using known polishing techniques such as mechanical polishing, chemical polishing, and mechanochemical polishing (a combination of mechanical polishing and chemical polishing). For example, polishing to #2000 or higher may be performed using a fixed abrasive polisher (using water as the polishing liquid), or lapping may be performed using a free abrasive lap (using SiC paste or the like as the abrasive), and then the abrasive may be replaced with diamond paste for lapping. The polishing method is not limited to these methods. Examples of the abrasive include #200, #400, and #800 abrasives.
[0079] (Cleaning step) After the grinding step, the oxide sintered body is preferably cleaned by cleaning means such as air blowing and running water washing. When removing foreign matter by air blowing, removal can be made more effective by using a dust collector to suck air from the opposite side of the nozzle. Note that there are limitations to air blowing and running water washing, so ultrasonic cleaning or the like can also be performed. An effective ultrasonic cleaning method is to use multiple oscillations at a frequency between 25 kHz and 300 kHz. For example, it is recommended to perform ultrasonic cleaning by multiple oscillations at 12 different frequencies in 25 kHz increments between 25 kHz and 300 kHz.
[0080] (Bonding Step) The bonding step is a step of bonding the sintered body after the processing step to a backing plate with a low melting point metal (for example, metallic indium, metallic gallium, etc.).
[0081] In order to maintain cooling efficiency during sputtering, the bonding rate is preferably 90% or more, more preferably 95% or more, and even more preferably 98% or more. The bonding rate here refers to the ratio of the area of the surface where the target material and the target support material are bonded via the bonding layer to the area of the overlapping surfaces of the target material and the target support.
[0082] When a film is formed by sputtering using the sputtering target according to this embodiment, it is possible to uniformly amorphize an oxide thin film provided on a large-area substrate, and excellent TFT processability can be obtained.
[0083] [Oxide Thin Film] The oxide thin film according to this embodiment is an oxide thin film formed using the sputtering target according to this embodiment. The oxide thin film according to this embodiment is obtained by deposition using the sputtering target according to this embodiment. The oxide thin film according to this embodiment is preferably obtained by a manufacturing method including, for example, a step of depositing an oxide thin film by sputtering using the sputtering target according to this embodiment (hereinafter, this may be referred to as an oxide thin film deposition step), and a step of subjecting the oxide thin film to a heat treatment (hereinafter, this may be referred to as a heat treatment step). The oxide thin film according to this embodiment is deposited using the target according to this embodiment, and therefore has excellent processability for TFTs.
[0084] The oxide thin film according to this embodiment is an amorphous oxide thin film after sputtering deposition and before heat treatment (annealing treatment), and the heat treatment after sputtering deposition improves crystallization, turning it into a crystalline oxide thin film. In other words, a crystalline oxide thin film can be obtained by the method for producing an oxide thin film according to this embodiment. In this embodiment, a crystalline oxide thin film may also be referred to as a "crystalline oxide thin film."
[0085] Whether an oxide thin film is amorphous or crystalline can be confirmed by X-ray diffraction (XRD) measurement of each oxide thin film. When no peak is observed in XRD measurement of an oxide thin film, the oxide thin film is determined to be amorphous, and when a peak is observed, the oxide thin film is determined to be crystalline. When a broad pattern is observed rather than a clear peak in XRD measurement of an oxide thin film, the oxide thin film is determined to be nanocrystalline. On the other hand, even when the oxide thin film is determined to be amorphous in XRD measurement, patterning residue may be found to have been generated when checking. For this reason, even when the oxide thin film is determined to be amorphous by XRD measurement of the oxide thin film, it is difficult to determine whether the oxide thin film is uniformly amorphized.
[0086] In the oxide thin film formation process, a gas substantially free of impurity gases is used. Specifically, in the oxide thin film formation process, one or more gases substantially free of impurity gases selected from the group consisting of argon, hydrogen, water vapor, and oxygen are used as the sputtering gas. Among these, the sputtering gas is preferably a mixed gas of argon, hydrogen, water vapor, and oxygen substantially free of impurity gases, and more preferably a mixed gas of argon, hydrogen, and oxygen substantially free of impurity gases. The phrase "substantially free of impurity gases" means that impurity gases other than argon, hydrogen, water vapor, and oxygen are not actively introduced, except for adsorbed water introduced during gas insertion, chamber leaks, and gases that cannot be eliminated (unavoidable impurity gases), such as adsorbed gases. In this embodiment, the sputtering gas may be, for example, a commercially available mixed gas of high-purity argon and high-purity oxygen, a mixed gas of high-purity hydrogen and high-purity argon, or a mixed gas of high-purity hydrogen, high-purity oxygen, and high-purity argon. The sputtering gas is preferably a mixture of high-purity hydrogen, high-purity oxygen, and high-purity argon, and impurities are preferably excluded from the sputtering gas, if possible.
[0087] The proportion of impurity gas in the sputtering gas is preferably 0.1 vol% or less, more preferably 0.05 vol% or less. If the proportion of impurity gas is 0.1 vol% or less, crystallization of the oxide thin film proceeds without problems by annealing treatment after film formation. When a mixed gas of high-purity hydrogen, high-purity oxygen, and high-purity argon is used, the purity of each of the high-purity argon, high-purity hydrogen, and high-purity oxygen is preferably 99 vol% or more, more preferably 99.9 vol% or more, and even more preferably 99.99 vol% or more.
[0088] When a mixed gas of high-purity hydrogen, high-purity oxygen, and high-purity argon is used as the sputtering gas, the oxygen partial pressure in the mixed gas of argon, hydrogen, and oxygen, which is the sputtering gas, is [O 2 ] / ([Ar]+[H 2 ]+[O 2 ]). The oxygen partial pressure is preferably in the range of 0% to 20%. If the oxygen partial pressure is in the above range, the film is easily crystallized and becomes a semiconductor by annealing after film formation. By changing the oxygen partial pressure, the degree of oxidation of the resulting thin film, i.e., the degree of crystallization, can be adjusted. The oxygen partial pressure can be selected appropriately as needed.
[0089] When a mixed gas of high-purity hydrogen, high-purity oxygen, and high-purity argon is used as the sputtering gas, the hydrogen partial pressure in the mixed gas of argon, hydrogen, and oxygen, which is the sputtering gas, is [H 2 ] / ([Ar]+[H 2 ]+[O 2 ]). The hydrogen partial pressure is preferably in the range of 0% to 10%, more preferably in the range of 0% to 5%. By changing the hydrogen partial pressure, the hydrogen content of the semiconductor thin film can be adjusted, and the degree of crystallization immediately after film formation can be controlled. The hydrogen partial pressure can be selected appropriately as needed.
[0090] In the heat treatment step, the heat treatment temperature for crystallizing the amorphous thin film after film formation is preferably in the range of 200°C to 500°C, and more preferably in the range of 250°C to 470°C. If the heat treatment temperature is 200°C or higher, the oxide thin film is easily crystallized. If the heat treatment temperature is 500°C or lower, abnormal crystal growth and enlargement of crystal grains can be suppressed, and hydrogen is less likely to be desorbed from the crystal grains, suppressing the generation of defect level density. Therefore, when applied to TFTs, electrical characteristics with good mobility and reliability can be obtained.
[0091] In the heat treatment step, the heat treatment time for crystallizing the amorphous thin film after film formation is preferably 0.1 to 5 hours, more preferably 0.3 to 3 hours, and even more preferably 0.5 to 2 hours. If the heat treatment time is 0.1 hours or more, the oxide thin film is likely to crystallize without failing to crystallize. If the heat treatment time is 5 hours or less, it is economically advantageous.
[0092] The oxide thin film (crystalline oxide thin film) according to this embodiment can be applied to various integrated circuits such as logic circuits, memory circuits, and differential amplifier circuits, and can be applied to electronic devices, etc. The oxide thin film (crystalline oxide thin film) according to this embodiment can also be applied as a part of a layer in a solar cell, and a part of a layer in a display device such as a liquid crystal element, an organic electroluminescence element, an inorganic electroluminescence element, a micro organic EL display, a micro LED (light emitting diode) display, and a mini LED display. Furthermore, the oxide thin film (crystalline oxide thin film) according to this embodiment can be applied as a part of a layer in a solid-state imaging element, an X-ray sensor, a power semiconductor element, a touch panel, an LSI (large scale integrated circuit), a resistance change type memory, a DRAM (dynamic random access memory), a ferroelectric memory, a BEOL (back end of line), and a microprocessor. The oxide thin film (crystalline oxide thin film) according to this embodiment can also be used as a semiconductor layer of a field-effect transistor, a static induction transistor, a quantum tunnel field-effect transistor, a Schottky barrier transistor, a Schottky diode, a PN diode, and a resistor element, or as a part of any of these layers.
[0093] [Thin Film Transistor and Electronic Device] The thin film transistor according to this embodiment includes a thin film transistor including the oxide thin film according to this embodiment. The oxide thin film according to this embodiment is preferably an oxide semiconductor thin film.
[0094] It is preferable to use the oxide thin film according to this embodiment as the channel layer of a thin film transistor.
[0095] When the thin film transistor according to this embodiment has the oxide thin film according to this embodiment as a channel layer, other element configurations in the thin film transistor are not particularly limited, and known element configurations can be adopted.
[0096] The thin film transistor according to this embodiment can be suitably used in electronic devices. Specifically, the thin film transistor according to this embodiment can be suitably used in display devices such as liquid crystal displays and organic EL displays.
[0097] The thickness of the channel layer in the thin film transistor according to this embodiment is usually 10 nm or more and 300 nm or less, and preferably 20 nm or more and 250 nm or less.
[0098] The channel layer in the thin film transistor according to this embodiment is usually used in an N-type region, but can also be used in various semiconductor devices such as a PN junction transistor in combination with various P-type semiconductors, such as a P-type Si-based semiconductor, a P-type oxide semiconductor, and a P-type organic semiconductor.
[0099] The thin film transistor according to this embodiment can be applied to various integrated circuits such as field-effect transistors, logic circuits, memory circuits, and differential amplifier circuits. Furthermore, in addition to field-effect transistors, the thin film transistor can also be applied to static induction transistors, Schottky barrier transistors, Schottky diodes, and resistor elements. That is, the thin film transistor according to this embodiment can be applied to the applications exemplified in the "Applications of Thin Film Transistors" section described later.
[0100] The shape of the thin film transistor according to this embodiment is not particularly limited, and is preferably a back channel etch type transistor, an etch stopper type transistor, a top gate type transistor, a double gate type transistor, etc. Each transistor may have a self-aligned structure.
[0101] Specific examples of thin film transistors are shown in Figures 2, 3, 4, and 5. As shown in Figure 2, a thin film transistor 100 includes a silicon wafer 20, a gate insulating film 30, an oxide thin film 40, a source electrode 50, a drain electrode 60, and interlayer insulating films 70 and 70A.
[0102] The silicon wafer 20 is a gate electrode. The gate insulating film 30 is an insulating film that blocks electrical conduction between the gate electrode and the oxide thin film 40, and is provided on the silicon wafer 20. The oxide thin film 40 is a channel layer and is provided on the gate insulating film 30. The oxide thin film 40 is made of the oxide thin film according to this embodiment.
[0103] The source electrode 50 and the drain electrode 60 are conductive terminals for passing source current and drain current through the oxide thin film 40, and are provided so as to be in contact with the vicinity of both ends of the oxide thin film 40. The interlayer insulating film 70 is an insulating film that blocks conduction between the source electrode 50 and the drain electrode 60 and the oxide thin film 40 except at the contact portions between the source electrode 50 and the drain electrode 60 and the oxide thin film 40. The interlayer insulating film 70A is an insulating film that blocks conduction between the source electrode 50 and the drain electrode 60 and the oxide thin film 40 except at the contact portions between the source electrode 50 and the drain electrode 60 and the oxide thin film 40. The interlayer insulating film 70A is also an insulating film that blocks conduction between the source electrode 50 and the drain electrode 60. The interlayer insulating film 70A also functions as a channel layer protective layer.
[0104] 3, the structure of the thin-film transistor 100A is similar to that of the thin-film transistor 100, except that the source electrode 50 and the drain electrode 60 are provided so as to be in contact with both the gate insulating film 30 and the oxide thin film 40. Another difference is that an interlayer insulating film 70B is provided integrally so as to cover the gate insulating film 30, the oxide thin film 40, the source electrode 50, and the drain electrode 60.
[0105] There are no particular limitations on the materials forming the drain electrode 60, the source electrode 50, and the gate electrode, and any commonly used material can be selected. In the examples shown in Figures 2 and 3, a silicon wafer is used as the substrate, and the silicon wafer also functions as the electrode, but the electrode material is not limited to silicon. For example, indium tin oxide (ITO), indium zinc oxide (IZO), ZnO, and SnO 2 2, 3, 4, and 5, a gate electrode may be formed on a substrate such as glass.
[0106] There is no particular limitation on the material for forming the interlayer insulating films 70, 70A, and 70B, and any commonly used material can be selected. x , M.N. x , and M.N. x O y (where M is a metal element, and x and y are real numbers greater than 0. The same applies to x and y in the compounds exemplified below.) Specific examples of the material include SiO 2 , SiO x , SiN x , and SiN x O y Furthermore, the material can be, for example, Al 2 O 3 , Ta 2 O 5 , TiO 2 , MgO, ZrO 2 , CeO 2 , K. 2 O, Li 2 O, Na 2 O, Rb 2 O, Sc 2 O 3 , Y 2 O 3 , HfO 2 , CaHfO 3 , PbTiO 3 ,BaTa 2 O 6 , SrTiO 3 , Sm 2 O 3 Compounds such as AlN can also be used. The valence of the anions (oxygen anions and nitrogen anions) in these oxide compounds and nitride compounds is not particularly limited as long as it is a real number greater than 0.
[0107] When the thin film transistor according to this embodiment is a back channel etch type (bottom gate type), it is preferable to provide a protective film on the drain electrode, the source electrode, and the channel layer. By providing a protective film, the durability of the TFT is likely to be improved even when the TFT is driven for a long time. In the case of a top gate type TFT, for example, a gate insulating film is formed on the channel layer.
[0108] When the thin-film transistor according to this embodiment is a top-gate TFT, for example, it has a structure in which an interlayer insulating film is formed as a buffer layer on a substrate and a gate insulating film is formed on a channel layer. As shown in FIG. 4 , the thin-film transistor 100B includes a substrate 21, a buffer layer 22, a channel layer (crystalline oxide thin film) 11, a first low-resistance region 11A-1, a second low-resistance region 11A-2 (crystalline oxide thin film), a semiconductor region 11B (crystalline oxide thin film), a gate insulating film 24, a gate electrode 25, an interlayer insulating film 26, a source electrode 27, a drain electrode 28, and a protective film 29. In the thin-film transistor 100B, the first low-resistance region 11A-1 and the second low-resistance region 11A-2 are formed, for example, by dry processes such as ion implantation and plasma treatment. An electrode layer may also be provided between the substrate 21 and the buffer layer 22 as a write shield layer.
[0109] 5, in the case where the thin-film transistor according to the present embodiment is a top-gate TFT, a thin-film transistor 100C has a similar configuration to the thin-film transistor 100B except that the interlayer insulating film 26 has a two-layer structure (a first interlayer insulating film 26-1 and a second interlayer insulating film 26-2). In the thin-film transistor 100C, the first low-resistance region 11A-1 and the second low-resistance region 11A-2 are formed by, for example, ion implantation.
[0110] The protective film or insulating film can be formed by, for example, CVD, which may require high-temperature processes. Furthermore, the protective film or insulating film often contains impurity gases immediately after deposition, so it is preferable to subject it to a heat treatment (annealing treatment). Removing the impurity gases through the heat treatment results in a stable protective film or insulating film, which facilitates the formation of highly durable TFT elements.
[0111] By using the oxide thin film according to this embodiment, the film is less susceptible to the effects of temperature in the CVD process and subsequent heat treatment, and therefore the stability of the TFT characteristics can be improved even when a protective film or an insulating film is formed.
[0112] In the characteristics of the thin film transistor according to this embodiment, the On / Off ratio is 10 6 That's it, 10 12 The following is preferred: 7 That's it, 10 11 More preferably, 10 or less 8 That's it, 10 10 More preferably, the On / Off ratio is 10 or less. 6 An On / Off ratio of 10 or more is preferable for driving liquid crystal and OLED displays. 12 If the On / Off ratio is 10 or less, an organic EL display with high contrast can be driven. 12 If the off-state current is 10 -11 A or less, and when the thin film transistor is used as a transfer transistor or reset transistor in a CMOS image sensor, it is possible to extend the image retention time and improve the sensitivity. The On / Off ratio can be calculated by determining the ratio [On current value / Off current value], where the value of Id when Vg = -10 V is the Off current value and the value of Id when Vg = 20 V is the On current value.
[0113] In the characteristics of the thin film transistor according to this embodiment, the threshold voltage (Vth) is preferably −3.0 V or more and 3.0 V or less, more preferably −2.0 V or more and 2.0 V or less, and even more preferably −1.0 V or more and 1.0 V or less. When the threshold voltage (Vth) is −3.0 V or more and 3.0 V or less, by incorporating a Vth correction circuit into the TFT, correction to Vth = 0 V becomes possible. When the TFT obtained in this way is incorporated into a panel, it is possible to drive a display without uneven brightness or burn-in. From the transfer characteristic graph, the threshold voltage (Vth) is determined by the current value Id between the source and drain = 10 -9 It can be defined as the gate voltage Vg at A.
[0114] <Quantum Tunnel Field Effect Transistor> The oxide thin film according to this embodiment can also be used in a quantum tunnel field effect transistor (FET), which may also be referred to as a quantum tunnel field effect transistor.
[0115] 6 is a schematic diagram (longitudinal cross-sectional view) of a quantum tunnel field effect transistor (FET) according to one embodiment. The quantum tunnel field effect transistor 501 includes a p-type semiconductor layer 503, an n-type semiconductor layer 507, a gate insulating film 509, a gate electrode 511, a source electrode 513, and a drain electrode 515.
[0116] A p-type semiconductor layer 503, an n-type semiconductor layer 507, a gate insulating film 509, and a gate electrode 511 are stacked in this order. A source electrode 513 is provided on the p-type semiconductor layer 503. A drain electrode 515 is provided on the n-type semiconductor layer 507. The p-type semiconductor layer 503 is a p-type Group IV semiconductor layer, and in this case is a p-type silicon layer. In this case, the n-type semiconductor layer 507 is an n-type oxide thin film according to the above embodiment. The source electrode 513 and the drain electrode 515 are conductive films.
[0117] Although not shown in Fig. 6, an insulating layer may be formed on the p-type semiconductor layer 503. In this case, the p-type semiconductor layer 503 and the n-type semiconductor layer 507 are connected via a contact hole, which is a region where the insulating layer is partially opened. Although not shown in Fig. 6, the quantum tunnel field effect transistor 501 may also have an interlayer insulating film covering its upper surface.
[0118] The quantum tunnel field effect transistor 501 is a quantum tunnel field effect transistor (FET) that switches current by controlling the current tunneling through the energy barrier formed by the p-type semiconductor layer 503 and the n-type semiconductor layer 507 using the voltage of the gate electrode 511. In this structure, the band gap of the oxide thin film that constitutes the n-type semiconductor layer 507 is large, making it possible to reduce the off-current.
[0119] FIG. 7 is a schematic diagram (longitudinal cross-sectional view) of a quantum tunnel field-effect transistor 501A according to another embodiment. The quantum tunnel field-effect transistor 501A has the same configuration as the quantum tunnel field-effect transistor 501, except that a silicon oxide layer 505 is formed between a p-type semiconductor layer 503 and an n-type semiconductor layer 507. The presence of the silicon oxide layer reduces the off-state current. The thickness of the silicon oxide layer 505 is preferably 10 nm or less. By making the thickness of the silicon oxide layer 505 10 nm or less, it is possible to prevent tunneling current from flowing, the formation of an energy barrier from being difficult, and changes in barrier height, thereby preventing a decrease or change in the tunneling current. The thickness of the silicon oxide layer 505 is preferably 8 nm or less, more preferably 5 nm or less, even more preferably 3 nm or less, and even more preferably 1 nm or less.
[0120] In the quantum tunnel field effect transistors 501 and 501A, the n-type semiconductor layer 507 is also an n-type oxide semiconductor.
[0121] The oxide thin film constituting the n-type semiconductor layer 507 may be amorphous. When the oxide thin film constituting the n-type semiconductor layer 507 is amorphous, it can be etched with an organic acid such as oxalic acid, the difference in etching rate with other layers becomes large, and etching can be performed satisfactorily without affecting metal layers such as wiring.
[0122] The oxide thin film constituting the n-type semiconductor layer 507 may be crystalline. When the oxide thin film constituting the n-type semiconductor layer 507 is crystalline, the band gap becomes larger than in the case of an amorphous material, and the off-current can be reduced. Since the work function can also be increased, it becomes easier to control the current tunneling through the energy barrier formed by the p-type Group IV semiconductor material and the n-type semiconductor layer 507.
[0123] The method for manufacturing the quantum tunnel field effect transistor 501 is not particularly limited, but the following method can be exemplified. First, as shown in Fig. 8A, an insulating film 505A is formed on a p-type semiconductor layer 503, and a part of the insulating film 505A is opened by etching or the like to form a contact hole 505B. Next, as shown in Fig. 8B, an n-type semiconductor layer 507 is formed on the p-type semiconductor layer 503 and the insulating film 505A. At this time, the p-type semiconductor layer 503 and the n-type semiconductor layer 507 are connected via the contact hole 505B.
[0124] 8C, a gate insulating film 509 and a gate electrode 511 are formed in this order on the n-type semiconductor layer 507. Next, as shown in FIG. 8D, an interlayer insulating film 519 is provided so as to cover the insulating film 505A, the n-type semiconductor layer 507, the gate insulating film 509, and the gate electrode 511.
[0125] Next, as shown in Fig. 8E, a contact hole 519A is formed by opening a portion of the insulating film 505A and interlayer insulating film 519 on the p-type semiconductor layer 503, and a source electrode 513 is provided in the contact hole 519A. Furthermore, as shown in Fig. 8E, a contact hole 519B is formed by opening a portion of the gate insulating film 509 and interlayer insulating film 519 on the n-type semiconductor layer 507, and a drain electrode 515 is formed in the contact hole 519B. Through the above procedure, the quantum tunnel field effect transistor 501 can be manufactured.
[0126] After forming n-type semiconductor layer 507 on p-type semiconductor layer 503, heat treatment is performed at a temperature of 150° C. or higher and 600° C. or lower, thereby forming silicon oxide layer 505 between p-type semiconductor layer 503 and n-type semiconductor layer 507. By adding this step, quantum tunnel field effect transistor 501A can be manufactured.
[0127] The thin film transistor according to this embodiment is preferably a channel-doped thin film transistor, which is a transistor in which carriers in the channel are appropriately controlled by n-type doping rather than by oxygen deficiency, which is susceptible to fluctuations in response to external stimuli such as atmosphere and temperature, and which has the effect of achieving both high mobility and high reliability.
[0128] <Applications of Thin Film Transistor> The thin film transistor according to this embodiment can be suitably used in solar cells, display elements (liquid crystal elements, organic electroluminescence elements, inorganic electroluminescence elements, etc.), and power semiconductor elements. The thin film transistor according to this embodiment can be suitably used as a transistor in active matrix devices such as display devices (liquid crystal displays, organic electroluminescence (EL) displays, micro organic EL displays, micro light-emitting diode (LED) displays, mini LED displays, etc.), solid-state imaging elements, and touch panels. The thin film transistor according to this embodiment can also be applied to various integrated circuits such as field-effect transistors, logic circuits, memory circuits, and differential amplifier circuits, which can be applied to electronic devices, etc. The electronic device according to this embodiment preferably includes a thin film transistor. Furthermore, the thin film transistor according to this embodiment can be applied to static induction transistors and Schottky barrier transistors in addition to field-effect transistors. The thin film transistor according to this embodiment can also be applied as a transistor for sensors such as image sensors, X-ray sensors, and biosensors.
[0129] Hereinafter, the case where the thin film transistor according to this embodiment is used in a display device and a solid-state image sensor will be described.
[0130] First, a case where the thin film transistor according to this embodiment is used in a display device will be described with reference to Figures 9A to 9C. Figure 9A is a top view of the display device according to this embodiment. Figure 9B is a circuit diagram for explaining the circuit of the pixel portion when a liquid crystal element is applied to the pixel portion of the display device according to this embodiment. Also, Figure 9C is a circuit diagram for explaining the circuit of the pixel portion when an organic EL element is applied to the pixel portion of the display device according to this embodiment.
[0131] The thin film transistor according to this embodiment can be used as a transistor disposed in a pixel portion. Since the thin film transistor according to this embodiment can be easily made into an n-channel type, part of a driver circuit that can be configured with an n-channel transistor is formed over the same substrate as the transistor in the pixel portion. By using the thin film transistor described in this embodiment for the pixel portion or the driver circuit, a highly reliable display device can be provided.
[0132] 9A shows an example of a top view of an active matrix display device. A pixel portion 301, a first scanning line driver circuit 302, a second scanning line driver circuit 303, and a signal line driver circuit 304 are formed on a substrate 300 of the display device. A plurality of signal lines are arranged in the pixel portion 301, extending from the signal line driver circuit 304, and a plurality of scanning lines are arranged in the pixel portion 301, extending from the first scanning line driver circuit 302 and the second scanning line driver circuit 303. Pixels each having a display element are arranged in a matrix at the intersections of the scanning lines and the signal lines. The substrate 300 of the display device is connected to a timing control circuit (also referred to as a controller or a control IC) via a connection portion such as an FPC (Flexible Printed Circuit).
[0133] 9A , the first scanning line driver circuit 302, the second scanning line driver circuit 303, and the signal line driver circuit 304 are formed on the same substrate 300 as the pixel portion 301. This reduces the number of components, such as driver circuits, that are provided externally, thereby reducing costs. Furthermore, if the driver circuits are provided externally to the substrate 300, it becomes necessary to extend the wiring, which increases the number of connections between the wiring. If the driver circuits are provided on the same substrate 300, the number of connections between the wiring can be reduced, thereby improving reliability and yield.
[0134] 9B shows an example of a pixel circuit configuration, which is applicable to the pixel portion of a VA-type liquid crystal display device.
[0135] This pixel circuit can be applied to a configuration in which one pixel has multiple pixel electrodes. Each pixel electrode is connected to a different transistor, and each transistor is configured to be driven by a different gate signal. This allows the signals applied to each pixel electrode of a multi-domain pixel to be controlled independently.
[0136] The gate wiring 312 of the transistor 316 and the gate wiring 313 of the transistor 317 are separated so as to receive different gate signals. On the other hand, the source or drain electrode 314 functioning as a data line is used in common by the transistors 316 and 317. The thin film transistors according to this embodiment can be used for the transistors 316 and 317. This makes it possible to provide a highly reliable liquid crystal display device.
[0137] The transistor 316 is electrically connected to a first pixel electrode, and the transistor 317 is electrically connected to a second pixel electrode. The first pixel electrode and the second pixel electrode are separated from each other. The shapes of the first pixel electrode and the second pixel electrode are not particularly limited. For example, the first pixel electrode may be V-shaped.
[0138] The gate electrode of the transistor 316 is connected to the gate wiring 312, and the gate electrode of the transistor 317 is connected to the gate wiring 313. By applying different gate signals to the gate wiring 312 and the gate wiring 313, the operation timing of the transistors 316 and 317 can be made different, thereby controlling the alignment of the liquid crystal.
[0139] Furthermore, a storage capacitor may be formed by the capacitor wiring 310, a gate insulating film that functions as a dielectric, and a capacitor electrode that is electrically connected to the first pixel electrode or the second pixel electrode.
[0140] The multi-domain structure has one pixel having a first liquid crystal element 318 and a second liquid crystal element 319. The first liquid crystal element 318 is composed of a first pixel electrode, a counter electrode, and a liquid crystal layer therebetween, and the second liquid crystal element 319 is composed of a second pixel electrode, a counter electrode, and a liquid crystal layer therebetween.
[0141] The pixel portion is not limited to the configuration shown in Fig. 9B, and may include a switch, a resistor, a capacitor, a transistor, a sensor, or a logic circuit.
[0142] Another example of the circuit configuration of a pixel is shown in Fig. 9C, which shows the structure of a pixel portion of a display device using organic EL elements.
[0143] 9C is a diagram showing an example of an applicable circuit for the pixel portion 320. Here, an example is shown in which two n-channel transistors are used in one pixel. The oxide thin film according to this embodiment can be used in the channel formation region of the n-channel transistor. Digital time grayscale driving can be applied to the circuit for the pixel portion.
[0144] The thin film transistor according to this embodiment can be used for the switching transistor 321 and the driving transistor 322. This makes it possible to provide a highly reliable organic EL display device.
[0145] The configuration of the circuit in the pixel portion is not limited to the configuration shown in Fig. 9C. A switch, a resistor, a capacitor, a sensor, a transistor, or a logic circuit may be added to the circuit in the pixel portion shown in Fig. 9C. The above is a description of the case where the thin film transistor according to this embodiment is used in a display device.
[0146] Next, a case where the thin film transistor according to this embodiment is used in a solid-state imaging device will be described with reference to FIG.
[0147] A CMOS (Complementary Metal Oxide Semiconductor) image sensor is a solid-state imaging device that holds a potential in a signal charge storage section and outputs that potential to a vertical output line via an amplification transistor. If a leak current occurs in the reset transistor and / or transfer transistor included in the CMOS image sensor, the leak current causes charging or discharging, changing the potential of the signal charge storage section. When the potential of the signal charge storage section changes, the potential of the amplification transistor also changes, resulting in a value that deviates from the original potential, degrading the captured image.
[0148] The operational effect when the thin film transistor according to this embodiment is applied to the reset transistor and transfer transistor of a CMOS image sensor will be described. Either a thin film transistor or a bulk transistor may be applied to the amplifying transistor.
[0149] 10 is a diagram showing an example of the pixel configuration of a CMOS image sensor. A pixel is composed of a photodiode 3002, which is a photoelectric conversion element, a transfer transistor 3004, a reset transistor 3006, an amplifier transistor 3008, and various wirings, and a plurality of pixels are arranged in a matrix to form a sensor. A selection transistor electrically connected to the amplifier transistor 3008 may be provided. The transistor symbols "OS" and "Si" represent oxide semiconductor and silicon, respectively, and represent materials that are preferable for use in the respective transistors. This also applies to the subsequent drawings.
[0150] The photodiode 3002 is connected to the source side of the transfer transistor 3004, and a signal charge storage region 3010 (also called FD: floating diffusion) is formed on the drain side of the transfer transistor 3004. The source of the reset transistor 3006 and the gate of the amplification transistor 3008 are connected to the signal charge storage region 3010. As an alternative configuration, the reset power supply line 3110 can be eliminated. For example, the drain of the reset transistor 3006 can be connected to the power supply line 3100 or the vertical output line 3120 instead of the reset power supply line 3110. Note that the oxide thin film according to this embodiment may be used for the photodiode 3002, and the same material as the oxide thin films used for the transfer transistor 3004 and the reset transistor 3006 may be used.
[0151] The present invention will be specifically described below based on examples, but the present invention is not limited to these examples.
[0152] [1] Preparation of sputtering targets (Examples 1 to 6) Sputtering targets each having an oxide sintered body containing indium oxide as a main component were prepared according to the following specific procedure.
[0153] First, indium oxide powder with a purity of 99.99% by mass was prepared as the raw material powder. Polyvinyl alcohol, zirconia balls with a diameter of 2 mm, and water were placed in an alumina pot for crushing, and the mixture was mixed and crushed for 2 hours using a planetary ball mill. The mixed and crushed mixture was then supplied to a spray dryer and granulated at a rotation speed of 12,000 rpm and a hot air temperature of 150°C to obtain a raw material granulated powder. The raw material granulated powder was passed through a 90-mesh sieve to remove raw material granulated powder with a particle size exceeding 150 μm, and the raw material granulated powder was classified to a particle size range of 150 μm or less to obtain a raw material granulated powder with an adjusted particle size. The shape of the obtained raw material granulated powder was spherical. This raw material granulated powder with an adjusted particle size was used as a sintered body raw material. Next, this sintered body raw material was placed in a mold and subjected to a pressure of 300 kg / cm. 2 This press-molded body was subjected to a pressure of 2600 kg / cm. 2 The mixture was densified by CIP at a pressure of 1000 kJ / cm 2 to obtain a molded body.
[0154] The obtained molded body was heated in a sintering furnace in an air atmosphere to the sintering temperature shown in Tables 1 and 2, and then maintained at this sintering temperature for 20 hours. After sintering, the molded body was heated in an air atmosphere of argon (Ar) and hydrogen (H 2 The temperature was lowered from the sintering temperature at a rate of 4°C / min in a mixed gas atmosphere containing argon and hydrogen. The hydrogen concentration in the mixed gas relative to the total of argon and hydrogen (100%) is as shown in Tables 1 and 2. During the temperature lowering process, the material was held for the holding time and at the holding temperature shown in Tables 1 and 2 to obtain a sintered body.
[0155] The obtained sintered body was subjected to surface grinding. After polishing, the surface that had been subjected to surface grinding was used as the sputtering surface, and the surface opposite to the sputtering surface was used as the bonding surface. The bonding surface side of the sintered body was bonded to a backing plate. By bonding to the backing plate, a sputtering target was obtained.
[0156] Comparative Examples 1 to 7 Sputtering targets were obtained in the same manner as in Example 1, except that the sintering conditions and temperature-lowering conditions were changed to those shown in Tables 3 and 4 to obtain sintered bodies.
[0157] [A] Evaluation of Sintered Body [A-1] Measurement of Hydrogen Concentration The hydrogen concentration in the sintered body, which is the material of the sputtering target obtained in each of the above Examples and Comparative Examples, was quantitatively evaluated by SIMS analysis using a secondary ion mass spectrometer (SIMS analysis device: (IMS-6f, manufactured by CAMECA)). First, the surface of the sintered body was polished flat using abrasive paper #600, and primary ions Cs + Using a 14.5 kV accelerating voltage, sputtering was performed to a depth of 20 μm from the surface of the sintered body to be measured. Subsequently, a 100 μm raster (100 μm × 100 μm size), a 30 μm measurement area (30 μm × 30 μm size), and a depth of at least 1 μm were sputtered with primary ions to obtain the mass spectral intensity of hydrogen concentration in the film thickness direction. Furthermore, to calculate the absolute value of hydrogen concentration from the mass spectrum, hydrogen was implanted into the sintered body by controlling the dose amount using ion implantation, and a standard sample (ZnO) with a known hydrogen concentration was prepared. The mass spectral intensity of hydrogen for the obtained standard sample was obtained by SIMS analysis, and a calibration curve was created showing the relationship between the absolute value of hydrogen and the mass spectral intensity. Finally, the mass spectral intensity of the sintered body to be measured and the calibration curve were used to calculate the hydrogen concentration in the film thickness direction of the sintered body to be measured. The absolute value of the hydrogen concentration of the measured sintered body (atoms cm -3 ) the change in hydrogen concentration was within 20% at least in the film thickness direction over 20 measurement cycles or more, and the average value of the hydrogen concentration in the region showing a constant intensity was taken as the absolute value of the hydrogen concentration. Note that the hydrogen concentration in the sintered bodies described in each Example and Comparative Example shown in Tables 1 to 4 was calculated by dividing a square inscribed in the circle of the circular target into 16 equal areas, evaluating the hydrogen concentration at the center of each square (16 locations) using the above measurement method, and the average value measured at 16 locations was reported.
[0158] [A-2] Density Measurement For the oxide sintered bodies used as the materials for the sputtering targets obtained in each of the above Examples and Comparative Examples, sintered body samples for measurement were taken, and the actual densities of the sintered bodies measured by the Archimedes method were measured. Specifically, measurements were performed using water at room temperature. Note that, for the density of indium oxide, the value of the specific gravity of the oxide listed in Chemistry Handbook, Basics I, edited by the Chemical Society of Japan, Revised 2nd Edition (Maruzen Co., Ltd.) was used, since density and specific gravity are almost equivalent.
[0159] [A-3] Measurement of atomic composition ratio The atomic concentration ratio in the sintered body, which is the material of the sputtering target obtained in each of the above examples and comparative examples, was quantitatively analyzed using a scanning electron microscope (SEM) (Hitachi High-Tech Corporation, SU8200) and an energy dispersive X-ray analyzer (EDX) (Hitachi High-Tech Corporation, S-4800). First, the square inscribed in the circle of the circular sputtering target was divided into 16 equal areas, and sintered body samples were prepared at the center of each square (16 locations). Next, each sintered body sample was observed within a frame at 400x magnification using an SEM under conditions of an accelerating voltage of 10 kV. In the observation area of each sintered body sample (each one of the sintered body samples), the mass spectra of indium and oxygen were integrated using EDX and converted into atomic concentrations, and the average of the atomic concentration ratios (O element / In element) at each observation point (16 sintered body samples) was adopted as the atomic concentration ratio of indium to oxygen (O element / In element) in the sintered body.
[0160] [A-4] Measurement of flexural strength The flexural strength of the sintered body, which was the material for the sputtering target obtained in each of the above Examples and Comparative Examples, was measured by the following procedure. First, ten test pieces in the shape of a rectangular prism, measuring 3 mm thick x 4 mm wide x 36 mm long, were cut out from the obtained sintered body. Next, based on JIS R1601:2008, the three-point bending strength was measured using a materials testing machine (Shimadzu EZ Graph), and the average value of the three-point bending strength measurements of the ten test pieces was taken as the flexural strength.
[0161] [A-5] Measurement of Average Crystal Grain Size The average crystal grain size of the sintered body, which is the material for the sputtering target obtained in each of the above Examples and Comparative Examples, was measured using an X-ray microanalyzer (EPMA) JXA-8621MX (manufactured by JEOL Ltd.). First, the square inscribed in the circle of the circular sputtering target was divided into 16 equal areas, and sintered body samples were prepared at 16 center points of each square. The sintered body samples were prepared by cutting the sintered body into pieces of 1 cm (1 cm x 1 cm) or less, and this sintered body sample was embedded in a 1-inch φ (1-inch diameter) epoxy-based room-temperature curing resin. The embedded sintered body sample was then polished using abrasive paper #400, #600, #800, 3 μm diamond suspension water, and 50 nm colloidal silica (for final finishing), in that order. The polished surface was then magnified 1000 times under the condition of an acceleration voltage of 10 kV, and the maximum diameter of the crystal grains (i.e., the crystalline phase) observed within a 30 μm × 30 μm square frame on the surface of the sintered body was measured. The maximum diameter of the crystal grains was measured for each of the sintered body samples prepared from 16 locations, and the average value of the obtained maximum diameters was taken as the average crystal grain size. The average crystal grain size of the crystalline phase contained in the sintered body was taken as the average crystal grain size of the crystalline phase having a bixbyite structure composed of In and O elements.
[0162] [A-6] Measurement of Electrical Resistivity The average crystal grain size of the sintered body, which was the material for the sputtering target obtained in each of the above Examples and Comparative Examples, was determined by measuring the electrical resistivity at any 10 points on the sintered body using a resistivity meter (Loresta AX MCP-T370, manufactured by Mitsubishi Chemical Corporation) based on the four-point probe method (JIS R 1637), and the average value was taken as the electrical resistivity of the sintered body.
[0163]
[0164]
[0165]
[0166]
[0167] [2] Preparation of Oxide Thin Films (Examples 1 to 6, Comparative Examples 1 to 7) Using the sputtering targets obtained in each of the above Examples and Comparative Examples, a 50-nm-thick oxide thin film (oxide semiconductor thin film layer) was formed by sputtering on a 4-inch silicon wafer (gate electrode) with a 100-nm-thick thermal oxide film (gate insulating film). A mixed gas of high-purity argon, high-purity oxygen, and high-purity hydrogen (specifically, a mixed gas containing (i) to (iii) (impurity gas concentration: 0.01% by volume)) was used as the sputtering gas for film formation. The film formation conditions were as follows:
[0168] <Film formation conditions> Substrate temperature: 25°C Ultimate pressure: 4×10 -4 Pa or less Atmospheric gas: Ar + O 2 +H 2 (O 2 Flow rate ratio 2% / Hydrogen flow rate ratio 3%) Sputtering pressure (total pressure): 0.5 Pa Input voltage: DC 400 W Magnetic flux density: 600 G Distance between S (substrate) and T (target): 70 mm
[0169] [B] Evaluation of Oxide Thin Film [B-1] Evaluation of Patterning Residues The oxide thin films prepared using the sputtering targets obtained in each of the above Examples and Comparative Examples were wet-etched using an organic acid, and the pattern shape after resist stripping was observed using an optical microscope to evaluate patterning residues. If no patterning residues were generated, it can be determined that the oxide thin film prepared using the sputtering target was uniformly amorphous. Specifically, a resist was applied to the oxide thin film prepared as described above, and a pattern of approximately 20 μm × 10 μm was formed by a lithography process. The resist was then etched with an organic acid (ITO-06N, manufactured by Kanto Chemical Co., Ltd.) at 25°C. The etching time was determined to be the time required to remove 1.5 times the thickness of the oxide thin film. After etching, the photoresist was stripped off to obtain a patterned oxide thin film. The patterned oxide thin film was observed at the center and edge of a 4-inch silicon wafer substrate using an optical microscope (MX51, manufactured by Olympas Corporation) to confirm the presence or absence of residues.
[0170]
[0171] As shown in Table 5, it was confirmed that the oxide thin films according to Examples 1 to 6 were free of residues and had the desired patterns formed. On the other hand, residues were observed in the oxide thin films according to Comparative Examples 1 to 7. Furthermore, as shown in FIG. 11A , it was confirmed that the oxide thin films obtained after patterning using the sputtering target according to one embodiment of the present invention were free of residues and had the desired patterns formed. On the other hand, as shown in FIG. 11B , residues were observed in the oxide thin films obtained after patterning using the sputtering target according to one embodiment of the present invention. From these results, it can be seen that the oxide thin films obtained using the sputtering target according to this embodiment did not produce patterning residues when the oxide thin films were patterned, and therefore could be uniformly amorphized, demonstrating excellent TFT processability.
[0172] 1: oxide sintered body, 1A: oxide sintered body, 1B: oxide sintered body, 1C: oxide sintered body, 3: backing plate, 20: silicon wafer, 30: gate insulating film, 40: oxide thin film, 50: source electrode, 60: drain electrode, 70: interlayer insulating film, 70A: interlayer insulating film, 70B: interlayer insulating film, 100: thin film transistor, 100A: thin film transistor, 11: channel layer (crystalline oxide thin film), 11A-1: first low resistance region, 11B: semiconductor Conductor region, 11A-2: second low resistance region, 21: substrate, 22: buffer layer, 24: gate insulating film, 25: gate electrode, 26: interlayer insulating film, 27: source electrode, 28: drain electrode, 29: protective film, 100B: thin film transistor, 100C: thin film transistor, 300: substrate, 301: pixel section, 302: first scanning line driving circuit, 303: second scanning line driving circuit, 304: signal line driving circuit, 310: capacitance wiring, 312: gate wiring, 31 3: gate wiring, 314: drain electrode, 316: transistor, 317: transistor, 318: first liquid crystal element, 319: second liquid crystal element, 320: pixel portion, 321: switching transistor, 322: driving transistor, 3002: photodiode, 3004: transfer transistor, 3006: reset transistor, 3008: amplification transistor, 3010: signal charge storage portion, 3100: power supply line, 3110: reset Power supply line, 3120: vertical output line, 501: quantum tunnel field effect transistor, 501A: quantum tunnel field effect transistor, 503: p-type semiconductor layer, 505: silicon oxide layer, 505A: insulating film, 505B: contact hole, 507: n-type semiconductor layer, 509: gate insulating film, 511: gate electrode, 513: source electrode, 515: drain electrode, 519: interlayer insulating film, 519A: contact hole, 519B: contact hole.
Claims
1. A sputtering target comprising an oxide sintered body mainly composed of indium oxide, The oxide sintered body is The hydrogen content is 5 × 10 16 atoms / cm 3 That's all. The atomic concentration ratio of indium (In) to oxygen (O) (O / In) is 1.3 or higher and less than 2.
5. The density of the oxide sintered body, as measured by the Archimedes method, is 6.0 g / cm³. 3 That's all. Sputtering target.
2. The hydrogen concentration contained is 1 × 10 17 atoms / cm 3 That's all. The sputtering target according to claim 1.
3. The hydrogen concentration contained is 1 × 10 18 atoms / cm 3 That's all. A sputtering target according to claim 1 or claim 2.
4. A method for manufacturing a sputtering target according to claim 1 or claim 2, A process to obtain a sintered body raw material containing an indium compound, The process of molding the sintered raw material to obtain a molded body, The process of obtaining the oxide sintered body by sintering the molded body and then cooling it down in an atmosphere containing an inert gas and hydrogen, It has, During the aforementioned cooling process, the temperature is maintained in a range of 800°C or higher and 1000°C or lower for at least 3 hours. A method for manufacturing a sputtering target.
5. An oxide thin film using the sputtering target described in claim 1 or claim 2.
6. A thin-film transistor comprising an oxide thin film as described in claim 5.
7. An electronic device comprising a thin-film transistor as described in claim 6.