Power supply semiconductor device and boosting converter

Abstract

This power supply semiconductor device is for use in a boosting converter which boosts an input voltage, and comprises: an output terminal; a switching circuit which has a switching transistor and is configured to generate, at the output terminal by using an inductor for receiving an input voltage, an output terminal voltage which has been boosted from the input voltage; a feedback terminal which is to receive a monitoring target voltage according to the output terminal voltage through external wiring of the power supply semiconductor device; and a control drive circuit configured to control the switching circuit on the basis of an error between a predetermined reference voltage and a comparison voltage based on a feedback voltage applied to the feedback terminal and the output terminal voltage.

Description

Power supply semiconductor device and boost converter

[0001] The present disclosure relates to a power supply semiconductor device and a boost converter.

[0002] In a boost converter that boosts an input voltage, the boost voltage is monitored and a feedback terminal is provided to receive the boost voltage as feedback. By performing switching control based on the feedback voltage applied to the feedback terminal, the boost voltage can be stabilized to a desired target voltage.

[0003] Japanese Patent Application Laid-Open No. 2019-221099

[0004] When a fault occurs that blocks the transfer of the boosted voltage to the feedback terminal, such as a break in the wiring that transfers the boosted voltage to the feedback terminal, the boost converter may mistakenly recognize that the boost is insufficient, resulting in excessive boosting, which may damage the components receiving the boosted voltage.

[0005] An object of the present disclosure is to provide a power supply semiconductor device and a boost converter that contribute to suppressing excessive boosting in the event of a failure.

[0006] The power supply semiconductor device according to the present disclosure is a power supply semiconductor device used in a boost converter that boosts an input voltage, and comprises: an output terminal; a switching circuit having a switching transistor and configured to generate an output terminal voltage at the output terminal that is a boosted version of the input voltage using an inductor that receives the input voltage; a feedback terminal that receives a monitored voltage that corresponds to the output terminal voltage through external wiring of the power supply semiconductor device; and a control drive circuit configured to control the switching circuit based on the error between a comparison voltage based on the feedback voltage applied to the feedback terminal and the output terminal voltage, and a predetermined reference voltage.

[0007] According to the present disclosure, it is possible to provide a power supply semiconductor device and a boost converter that contribute to suppressing excessive boosting in the event of a failure.

[0008] FIG. 1 is an overall configuration diagram of a boost converter according to an embodiment of the present disclosure. FIG. 2 is an external perspective view of a power supply IC according to an embodiment of the present disclosure. FIG. 3 is a diagram illustrating a state in which a break occurs in the feedback wiring (open fault state) in a boost converter according to an embodiment of the present disclosure. FIG. 4 is an overall configuration diagram of a boost converter according to a first example belonging to an embodiment of the present disclosure. FIG. 5 is a diagram illustrating a boost converter in a normal connection state according to the first example belonging to an embodiment of the present disclosure. FIG. 6 is a diagram illustrating a boost converter in an open fault state according to the first example belonging to an embodiment of the present disclosure. FIG. 7 is an overall configuration diagram of a boost converter according to a second example belonging to an embodiment of the present disclosure. FIG. 8 is a diagram illustrating a boost converter in a normal connection state according to the second example belonging to an embodiment of the present disclosure. FIG. 9 is a diagram illustrating a boost converter in an open fault state according to the second example belonging to an embodiment of the present disclosure.

[0009] Hereinafter, examples of embodiments of the present disclosure will be described in detail with reference to the drawings. In each of the drawings, the same parts are designated by the same reference numerals, and duplicate descriptions of the same parts will be omitted as a general rule. In this specification, for the sake of simplicity, symbols or signs referring to information, signals, physical quantities, functional units, circuits, elements, or components may be used, and the names of the information, signals, physical quantities, functional units, circuits, elements, or components corresponding to the symbols or signs may be omitted or abbreviated.

[0010] First, some terms used in describing the embodiments of the present disclosure will be explained. IC is an abbreviation for Integrated Circuit. Ground refers to a reference conductive part having a reference potential of 0 V (zero volts), or refers to the potential of 0 V itself. The reference conductive part may be formed using a conductor such as metal. The potential of 0 V is sometimes referred to as ground potential. In the embodiments of the present disclosure, a voltage indicated without a particular reference represents a potential seen from ground.

[0011] A level refers to the level of potential, and for any given signal or voltage, a high level has a higher potential than a low level. For any given signal or voltage, when the signal or voltage is at a high level, strictly speaking, the signal or voltage level is at a high level, and when the signal or voltage is at a low level, strictly speaking, the signal or voltage level is at a low level. A level for a signal may be expressed as a signal level, and a level for a voltage may be expressed as a voltage level.

[0012] For any transistor configured as a FET (field effect transistor), including a MOSFET, the on state refers to a state in which the drain and source of the transistor are conductive, and the off state refers to a state in which the drain and source of the transistor are non-conductive (cut-off state). The same applies to transistors not classified as FETs. Unless otherwise specified, a MOSFET is understood to be an enhancement-type MOSFET. MOSFET is an abbreviation for "metal-oxide-semiconductor field-effect transistor." Furthermore, unless otherwise specified, the back gate of any MOSFET can be considered to be short-circuited to the source.

[0013] The electrical characteristics of a MOSFET include a gate threshold voltage. For any N-channel enhancement MOSFET, when the gate potential of the transistor is higher than the source potential of the transistor and the magnitude of the gate-source voltage (gate potential viewed from the source potential) of the transistor is equal to or greater than the gate threshold voltage of the transistor, the transistor is in an on state; otherwise, the transistor is in an off state. For any P-channel enhancement MOSFET, when the gate potential of the transistor is lower than the source potential of the transistor and the magnitude of the gate-source voltage (gate potential viewed from the source potential) of the transistor is equal to or greater than the gate threshold voltage of the transistor, the transistor is in an on state; otherwise, the transistor is in an off state. For any FET, the gate threshold voltage is defined as the gate-source voltage required to pass a predetermined amount of drain current when a predetermined voltage is applied between the drain and source of the FET under a predetermined ambient temperature environment.

[0014] Any switch element can be configured with one or more FETs (field effect transistors), and when a switch element is in the on state, both ends of the switch element are conductive, while when a switch element is in the off state, both ends of the switch element are non-conductive.

[0015] Hereinafter, the on and off states of any transistor or switch element may be simply referred to as on and off. For any transistor or switch element, switching from the off state to the on state is referred to as turning on, and switching from the on state to the off state is referred to as turning off. Furthermore, for any transistor or switch element, the period during which the transistor or switch element is in the on state may be referred to as the on period, and the period during which the transistor or switch element is in the off state may be referred to as the off period.

[0016] Unless otherwise specified, the connection between a plurality of parts that form a circuit, such as any circuit element, wiring (line), node, etc., may be understood to refer to an electrical connection.

[0017] 1 is a diagram illustrating the overall configuration of a boost converter 1 according to an embodiment of the present disclosure. The boost converter 1 in FIG. 1 includes a power supply IC 2, which is a power supply semiconductor device, and a plurality of discrete components externally connected to the power supply IC 2. The plurality of discrete components provided in the boost converter 1 include an inductor L0 and an output capacitor C0. The boost converter 1 receives an externally supplied input voltage V IN Receives the input voltage V IN The power supply is a boost-type switching power supply (DC / DC converter) that generates a boosted voltage.

[0018] Figure 2 shows a perspective view of the power supply IC 2. The power supply IC 2 is an electronic component that includes a semiconductor chip having a semiconductor integrated circuit formed on a semiconductor substrate, a housing (package) that houses the semiconductor chip, and a plurality of external terminals that are exposed from the housing to the outside of the power supply IC 2. The power supply IC 2 is formed by encapsulating the semiconductor chip in a housing (package) made of resin. Note that the number of external terminals of the power supply IC 2 and the type of housing for the power supply IC 2 shown in Figure 2 are merely examples, and can be designed as desired.

[0019] 1 shows only the input terminal IN, the output terminal POUT, the switch terminal SW, the ground terminal PGND, and the feedback terminal FB as some of the external terminals provided on the power supply IC 2, but other external terminals (for example, an enable terminal or a power good terminal) are also provided on the power supply IC 2. Of the wiring provided on the boost converter 1, wiring provided outside the power supply IC 2 will be particularly referred to as external wiring, and wiring provided inside the power supply IC 2 will be particularly referred to as internal wiring.

[0020] An input voltage V is applied from a voltage source (not shown) to the input terminal IN. IN The input voltage V IN is a positive DC voltage. One end of the inductor L0 is connected to the input voltage V IN is connected to the terminal to which the input voltage V INOne end of the inductor L0 may be considered to be connected to the input terminal IN. The other end of the inductor L0 is connected to the switching terminal SW. The ground terminal PGND is connected to ground.

[0021] The boost converter 1 is provided with an output wiring WR1 as an external wiring connected to the output terminal POUT. One end of the output wiring WR1 is connected to the output terminal POUT, and the other end of the output wiring WR1 is connected to a load LD. The voltage applied to the output terminal POUT is referred to as an output terminal voltage V POUT The output terminal voltage V POUT The voltage corresponding to the load voltage V LD The load LD is supplied with a load voltage V LD The current supplied to the load LD through the output wiring WR1 is the load current I LD The load current I LD flows from the output terminal POUT to the load LD. One end of the output capacitor C0 is connected to the output wiring WR1, and the other end of the output capacitor C0 is connected to the ground.

[0022] The boost converter 1 is provided with a feedback wiring WR2 as an external wiring connected to the feedback terminal FB. One end of the feedback wiring WR2 is connected to the feedback terminal FB, and the other end of the feedback wiring WR2 is connected to a node ND0. The node ND0 is a node on the output wiring WR1, and is provided in a position on the output wiring WR1 as close as possible to the load LD. At least, the distance between the node ND0 and the load LD is shorter than the distance between the node ND0 and the output terminal POUT. In the following, the load voltage V LD is considered to be the voltage at node ND0. The load voltage V LD corresponds to the target voltage to be monitored in the power supply IC2 (the target voltage to be monitored). The voltage applied to the feedback terminal FB is the feedback voltage V FB It is called.

[0023] Output terminal voltage V POUT is the input voltage V IN Therefore, the input voltage V IN Higher than the load voltage V LD The input voltage V INTherefore, the input voltage V IN The load current I LD When is zero, the load voltage V LD The value of is the output terminal voltage V POUT The load current I LD When is not zero, the wiring resistance of the output wiring WR1 and the load current I LD A voltage drop corresponding to this occurs between the output terminal POUT and the node ND0, so the load voltage V LD is the output terminal voltage V POUT The voltage representing the voltage drop is expressed as "ΔV". LD =V POUT -ΔV”. The load current I LD does not flow into the feedback wiring WR2.

[0024] A switching circuit 10 and a control drive circuit 20 are provided in a power supply IC 2. The switching circuit 10 includes a switching transistor 11 and a rectifying element 12. Here, a synchronous rectifying transistor is used as the rectifying element 12. Specifically, in the switching circuit 10, the switching transistor 11 is configured as an N-channel MOSFET, and the synchronous rectifying transistor 12 is configured as a P-channel MOSFET. The source of the synchronous rectifying transistor 12 is connected to an output terminal POUT. The drain of the synchronous rectifying transistor 12 and the drain of the switching transistor 11 are commonly connected to a switch terminal SW. The source of the switching transistor 11 is connected to a ground terminal PGND (and therefore connected to ground via the ground terminal PGND).

[0025] The power supply IC2 is provided with an internal wiring WR11 connected to the output terminal POUT and an internal wiring WR12 connected to the feedback terminal FB. The internal wiring WR11 is connected to the output terminal voltage V POUT is applied, and the feedback voltage V FB is added.

[0026] The control drive circuit 20 is driven based on an internal power supply voltage. An internal power supply circuit (not shown) provided in the power supply IC 2 supplies an input voltage V INThe control drive circuit 20 is connected to the output terminal POUT via an internal wiring WR11 and to the feedback terminal FB via an internal wiring WR12. Therefore, the feedback voltage V FB is input and the output terminal voltage V POUT Also, a predetermined reference voltage V REF The input voltage V is generated by a reference voltage generating circuit (not shown) provided in the power supply IC2. IN Based on the reference voltage V REF The reference voltage V REF has a predetermined positive DC voltage value.

[0027] In principle, the control drive circuit 20 operates based on the feedback voltage V FB The control drive circuit 20 generates a comparison voltage based on the comparison voltage and the reference voltage V REF The switching control of the switching circuit 10 is performed so that the error between the feedback voltage V and the feedback voltage V is reduced (so that the error converges to zero). FB The comparison voltage generated based on the feedback voltage V FB Therefore, the feedback voltage V FB When the comparison voltage is generated based on FB The voltage division ratio and reference voltage V REF The target voltage V is determined by TG (not shown) at the load voltage V LD is stabilized.

[0028] The control drive circuit 20 is connected to the gates of the switching transistor 11 and the synchronous rectifier transistor 12, and controls the states of the switching transistor 11 and the synchronous rectifier transistor 12 by controlling the gate potentials of the switching transistor 11 and the synchronous rectifier transistor 12. The control drive circuit 20 alternately turns the switching transistor 11 and the synchronous rectifier transistor 12 on and off during the switching control. The synchronous rectifier transistor 12 is controlled to be off during the on period of the switching transistor 11, and the switching transistor 11 is controlled to be off during the on period of the synchronous rectifier transistor 12. A period during which both the switching transistor 11 and the synchronous rectifier transistor 12 are off (dead time) may be present between the on period of one of the switching transistor 11 and the synchronous rectifier transistor 12 and the on period of the other transistor.

[0029] During the on-period of the switching transistor 11, the input voltage V IN A current flows from the terminal to which the input voltage V is applied through the inductor L0, the switch terminal SW, and the channel of the switching transistor 11 to ground, and energy is stored in the inductor L0. After that, during the period in which the switching transistor 11 is turned off and the synchronous rectification transistor 12 is turned on, a current based on the stored energy in the inductor L0 flows in a direction perpendicular to the input voltage V. IN is applied to the output capacitor C0 and the load LD through the inductor L0, the switch terminal SW, the channel of the synchronous rectifier transistor 12, and the output terminal POUT.

[0030] The control and drive circuit 20 may perform switching control using PWM. PWM is an abbreviation for pulse width modulation. In PWM switching control, the switching transistor 11 and the synchronous rectification transistor 12 are alternately turned on and off at a predetermined PWM frequency, and the comparison voltage and the reference voltage V REFThe on-duty of the switching transistor 11 is adjusted based on the on-duty of the switching transistor 11. The on-duty of the switching transistor 11 refers to the ratio of the length of the on-period of the switching transistor 11 to one PWM period. In switching control by PWM, as the on-duty of the switching transistor 11 is increased from zero to the specified maximum duty, the input voltage V IN The amount of energy (amount of energy per unit time) transferred from the terminal to which the voltage V is applied to the output capacitor C0 and the load LD increases, and as a result, the output terminal voltage V POUT and load voltage V LD increases.

[0031] Alternatively, the control and drive circuit 20 may perform switching control using PFM. PFM is an abbreviation for pulse frequency modulation. In PFM switching control, the switching transistor 11 and the synchronous rectification transistor 12 are alternately turned on and off at a variable switching frequency, and the comparison voltage and the reference voltage V REF In the switching control by PFM, the on time (length of the on period) of the switching transistor 11 per one operation is constant. That is, in the switching control by PFM, the switching transistor 11 is turned on and the synchronous rectification transistor 12 is turned off for a fixed time, and then the unit operation of keeping the switching transistor 11 off and the synchronous rectification transistor 12 on is repeated, and the repetition frequency of the unit operation is adjusted based on the comparison voltage and the reference voltage V REF As the repetition frequency of the unit operation (i.e., the switching frequency of the PFM switching control) increases, the input voltage V IN The amount of energy (amount of energy per unit time) transferred from the terminal to which the voltage V is applied to the output capacitor C0 and the load LD increases, and as a result, the output terminal voltage V POUT and load voltage V LD increases.

[0032] The state in which the node ND0 is correctly connected to the feedback terminal FB through the feedback wiring WR2 is called a normal connection state. OUT The load voltage V LD In this state, the voltage V (i.e., the voltage to be monitored) is applied to the feedback terminal FB through the feedback wiring WR2. FIG. 1 shows the boost converter 1 in a normal connection state. In the normal connection state, the current flowing through the feedback wiring WR2 is very small, and the feedback voltage V FB is the load voltage V LD can be considered to be consistent with

[0033] When there is an abnormality in the feedback wiring WR2, or when there is a poor connection between the feedback wiring WR2 and the feedback terminal FB, the load voltage V LD is not transmitted correctly to the feedback terminal FB. A typical example of an abnormality in the feedback wiring WR2 is a break in the feedback wiring WR2. An abnormality in which the feedback terminal FB is in an open state due to an abnormality in the feedback wiring WR2 or a poor connection between the feedback wiring WR2 and the feedback terminal FB is called an open fault state (see FIG. 3). Depending on the state of the feedback wiring WR2, the state may be equivalent to a state in which the feedback terminal FB and the node ND0 are connected via a resistance component of, for example, several hundred kilohms. However, in this case, it is assumed that in an open fault state, the feedback terminal FB and the node ND0 are insulated by a sufficiently high insulation resistance. The load voltage V LD A state in which the transmission of the voltage (i.e., the monitored voltage) to the feedback terminal FB is interrupted belongs to an open fault state.

[0034] In an open fault state, the voltage applied to the feedback terminal FB (feedback voltage V FB ) when switching control is performed based on the load voltage V LD Regardless of the above, the on-duty of the switching transistor 11 in the PWM switching control increases, or the switching frequency in the PFM switching control increases, resulting in excessive boosting (i.e., the output terminal voltage V POUT and load voltage V LD(This may result in an overvoltage.) An excessive voltage boost may damage components (e.g., the synchronous rectifier transistor 12 or the load LD) connected to the output wiring WR1. The control drive circuit 20 incorporates a technology for suppressing such an excessive voltage boost.

[0035] Below, several specific configuration examples, operation examples, application techniques, modified techniques, etc. related to the boost converter 1 (particularly the control and drive circuit 20) will be described in multiple embodiments. The matters described above in this embodiment apply to each of the following embodiments unless otherwise specified and unless contradictory. If there are any matters in each embodiment that contradict the matters described above, the description in that embodiment may take precedence. Furthermore, unless contradictory, the matters described in any of the multiple embodiments shown below can also be applied to any of the other embodiments (i.e., any two or more of the multiple embodiments can be combined).

[0036] <<First Example>> A first example will be described. Fig. 4 shows the configuration of a boost converter 1 according to the first example. The boost converter 1 according to the first example includes a control drive circuit 20A as the control drive circuit 20. The configuration of the control drive circuit 20A will be described.

[0037] The control drive circuit 20A includes a comparator 210, a voltage source 220, a comparison voltage generation circuit 230, an error amplifier 240, and a circuit 250 including a logic circuit and a drive circuit.

[0038] The comparator 210 has an inverting input terminal, a non-inverting input terminal, and an output terminal. The voltage source 220 supplies a predetermined determination voltage V J The determination voltage V J has a predetermined positive DC voltage value (for example, 0.8 V). The voltage source 220 is inserted between the non-inverting input terminal of the comparator 210 and the output terminal POUT, and the positive output terminal of the voltage source 220 is connected to the internal wiring WR11. Therefore, the voltage source 220 outputs the output terminal voltage V POUT than the judgment voltage V J A voltage lower by POUT -V J) is supplied to the non-inverting input terminal of the comparator 210. The inverting input terminal of the comparator 210 is connected to the feedback terminal FB via the internal wiring WR12, and the voltage applied to the feedback terminal FB (i.e., the feedback voltage V FB The comparator 210 receives the output terminal voltage V POUT than the judgment voltage V J A voltage lower by POUT -V J ) to the feedback voltage V FB and outputs a signal S210 indicating the comparison result from its output terminal. POUT -V J ) is the feedback voltage V FB When the voltage (V POUT -V J ) is the feedback voltage V FB When the voltage V is lower than the reference voltage V, the low level signal S210 is output. POUT -V J =V FB When the condition "is satisfied," the signal S210 goes to a high level or a low level.

[0039] The comparison voltage generating circuit 230 includes resistors R1 to R3 and a switch element 231, and generates a feedback voltage V FB and output terminal voltage V POUT Based on the comparison voltage V C One end of the resistor R1 is connected to the feedback terminal FB via the internal wiring WR12, and generates a voltage (i.e., a feedback voltage V FB ) The other end of resistor R1 is connected to node 232. One end of resistor R2 is connected to node 232. The other end of resistor R2 is connected to ground. Resistors R1 and R2 are connected to a feedback voltage V FB One end of the switch element 231 is connected to the output terminal POUT via the internal wiring WR11, and outputs the output terminal voltage V POUT The other end of the switch element 231 is connected to one end of a resistor R3, and the other end of the resistor R3 is connected to a node 232. The voltage division ratio of the resistors R1 and R2 and the reference voltage V REF and the above-mentioned target voltage V TGIn the equations below, the resistance values ​​of the resistors R1, R2, and R3 are represented by "R1," "R2," and "R3," respectively.

[0040] A comparison voltage V C The switch element 231 is controlled to be on or off based on the output signal S210 of the comparator 210. The switch element 231 is controlled to be off when the signal S210 is at a low level, and is controlled to be on when the signal S210 is at a high level.

[0041] The error amplifier 240 has an inverting input terminal, a non-inverting input terminal, and an output terminal. The non-inverting input terminal of the error amplifier 240 is connected to the node 232 and outputs a comparison voltage V C The inverting input terminal of the error amplifier 240 receives a reference voltage V REF The error amplifier 240 outputs a comparison voltage V C and the reference voltage V REF Error signal V based on the error between ERR and generates an error signal V ERR The error amplifier 240 outputs a comparison voltage V C is the reference voltage V REF When the error signal V ERR The potential of the comparison voltage V C is the reference voltage V REF When the error signal V ERR This reduces the potential of the

[0042] The circuit 250 generates an error signal V ERR Based on the comparison voltage V C and the reference voltage V REF The switching control is performed on the switching circuit 10 so as to reduce the error between the switching transistors 11 and 12 (so that the error converges to zero). The circuit 250 is connected to the gates of the switching transistor 11 and the synchronous rectification transistor 12, and controls the states of the switching transistor 11 and the synchronous rectification transistor 12 by controlling the gate potentials of the switching transistor 11 and the synchronous rectification transistor 12. The circuit 250 alternately turns on and off the switching transistor 11 and the synchronous rectification transistor 12 in the switching control.

[0043] In a normal connection state, FB =V LD =V POUT -ΔV”. Here, “ΔV<V J The voltage source 210 and the boost converter 1 are configured so that "V POUT -V J <V FB " is established, and the signal S210 becomes low level. For example, when the load voltage V LD Target voltage V TG is 4.8V, the voltage ΔV is 0.1V, and the judgment voltage V J is 0.8V. Then, in a normal connection state, the load voltage V LD is the target voltage V TG Considering the situation where the output terminal voltage V POUT is 4.9V, and the feedback voltage V FB is 4.8V, and the voltage (V POUT -V J ) is 4.1 V, the signal S210 is at a low level. As a result, in the normal connection state, the switch element 231 is turned off, and the comparison voltage V C is the feedback voltage V FB This is the voltage divided by the voltage divider circuit made up of resistors R1 and R2. C =V FB ・R2 / (R1+R2)”. Here, as an example, the reference voltage V REF In this case, by setting the resistance value of resistor R1 to three times the resistance value of resistor R2, the load voltage V LD Target voltage V TG becomes 4.8V.

[0044] In an open fault state, the feedback terminal FB is in an open state, and as shown in FIG. 6, the voltage of the node 232 is transmitted to the feedback terminal FB, and the voltage applied to the feedback terminal FB (feedback voltage FB ) is the comparison voltage V C It is the same as "V C =V REF5. If it is assumed that the normal connection state of FIG. 5 suddenly transitions to the open fault state when the comparison voltage V C is 1.2V, and the voltage immediately after the transition (V POUT -V J ) is lower than 4.1V. POUT -V J >V FB ” is established, and the signal S210 becomes high level. Then, the switch element 231 is turned on, and as a result, the comparison voltage V C is the output terminal voltage V POUT is divided by a voltage divider circuit using resistors R2 and R3 (i.e., "V C =V POUT ・R2 / (R2+R3)").

[0045] Here, the resistance value of the resistor R3 is set to be larger than the resistance value of the resistor R1. Therefore, the output terminal voltage V POUT and load voltage V LD is the output terminal voltage V under normal connection conditions POUT and load voltage V LD It is higher than "V C =V POUT ・R2 / (R2+R3)=V REF ", the output terminal voltage V POUT Resistors R2 and R3 and reference voltage V REF Therefore, when the normal connection state of FIG. 5 is changed to the open fault state of FIG. 6, the output terminal voltage V POUT The output terminal voltage V POUT is stabilized at 5.8V, and at this time, the load voltage V LD is stabilized at 5.7V (assuming the voltage ΔV is fixed at 0.1V).

[0046] For convenience of explanation, it is assumed that the normal connection state of FIG. 5 suddenly transitions to an open fault state, but the same applies when the power supply IC 2 starts up in an open fault state.

[0047] In this way, the comparison voltage generating circuit 230 generates the output terminal voltage VPOUT The predetermined judgment voltage V J A voltage lower by POUT -V J ) and feedback voltage V FB Depending on the level of the feedback voltage V FB and output terminal voltage V POUT The comparison voltage V C In a normal connection state, POUT -V J <V FB ", and at this time the feedback voltage V FB Based on the comparison voltage V C In an open fault condition, "V POUT -V J >V FB ", and at this time the feedback voltage V FB Regardless of the output terminal voltage V POUT Based on the comparison voltage V C Generate.

[0048] The circuit 250 may perform PWM switching control. In PWM switching control, the switching transistor 11 and the synchronous rectification transistor 12 are alternately turned on and off at a predetermined PWM frequency, and an error signal V ERR In the PWM switching control, the circuit 250 adjusts the on-duty of the switching transistor 11 based on the comparison voltage V C and the reference voltage V REF In order to reduce the error between ERR As the error signal V ERR As the voltage drops, the on-duty of the switching transistor 11 increases.

[0049] Alternatively, the control drive circuit 20 may perform switching control using PFM. In the PFM switching control, the switching transistor 11 and the synchronous rectification transistor 12 are alternately turned on and off at a variable switching frequency, and the error signal V ERRIn the PFM switching control, the on-time (length of the on-period) of the switching transistor 11 per switching is constant. In the PFM switching control, the circuit 250 adjusts the switching frequency based on the comparison voltage V C and the reference voltage V REF In order to reduce the error between ERR As the switching frequency increases, the error signal V ERR The switching frequency increases as the voltage decreases.

[0050] <<Second Example>> A second example will now be described. Fig. 7 shows the configuration of a boost converter 1 according to the second example. The boost converter 1 according to the second example includes a control drive circuit 20B as the control drive circuit 20.

[0051] The control drive circuit 20B includes a comparison voltage generation circuit 230B, an error amplifier 240, and a circuit 250 including a logic circuit and a drive circuit. The comparator 210 and voltage source 220 shown in FIG. 4 are unnecessary in the control drive circuit 20B. That is, the control drive circuit 20B can be obtained by using the control drive circuit 20A of FIG. 4 as a reference, deleting the comparator 210 and the voltage source 220, and replacing the comparison voltage generation circuit 230 of FIG. 4 with the comparison voltage generation circuit 230B. Except for the above deletions and substitutions, the control drive circuit 20B has the same configuration as the control drive circuit 20A.

[0052] The comparison voltage generating circuit 230B includes resistors R1 to R3 and a switch element 233, and generates a feedback voltage V FB and output terminal voltage V POUT Based on the comparison voltage V C The resistors R1 to R3 are the same as those described in the first embodiment. Therefore, one end of the resistor R1 is connected to the feedback terminal FB via the internal wiring WR12, and the voltage applied to the feedback terminal FB (i.e., the feedback voltage V FB ) The other end of resistor R1 is connected to node 232. One end of resistor R2 is connected to node 232. The other end of resistor R2 is connected to ground. Resistors R1 and R2 are connected to a feedback voltage V FB A voltage divider circuit is formed to divide the voltage.

[0053] The switch element 233 is a P-channel MOSFET, and hereinafter the switch element 233 will be referred to as a transistor. The source of the transistor 233 is connected to the output terminal POUT via the internal wiring WR11, and the output terminal voltage V POUT The drain of the transistor 233 is connected to one end of a resistor R3, and the other end of the resistor R3 is connected to a node 232. The gate of the transistor 233 is connected to a feedback terminal FB via an internal wiring WR12, and receives a feedback voltage V FB receive.

[0054] A comparison voltage V C The gate threshold voltage of the transistor 233 is set to "V TH ". Voltage V TH is the magnitude (absolute value) of the gate threshold voltage of transistor 233, and therefore "V TH >0”.

[0055] In a normal connection state, FB =V LD =V POUT -ΔV”. Here, “ΔV<V TH The transistor 233 is configured and the boost converter 1 is configured so that "V POUT -V TH <V FB ” is established and the transistor 233 is turned off. For example, when the load voltage V LD Target voltage V TG is 4.8V, the voltage ΔV is 0.1V, and the gate threshold voltage V TH is 0.8V. Then, in a normal connection state, the load voltage V LD is the target voltage V TG Considering the situation where the output terminal voltage V POUT is 4.9V and the feedback voltage V FB is 4.8V, the magnitude of the gate-source voltage of transistor 233 is the gate threshold voltage V TH As a result, the transistor 233 is off. When the transistor 233 is off, the comparison voltage V C is the feedback voltage V FBis divided by a voltage divider circuit using resistors R1 and R2 (i.e., "V C =V FB ・R2 / (R1+R2)"). Here, as an example, the reference voltage V REF In this case, by setting the resistance value of resistor R1 to three times the resistance value of resistor R2, the load voltage V LD Target voltage V TG becomes 4.8V.

[0056] In an open fault state, the feedback terminal FB is in an open state, and as shown in FIG. 9, the voltage at the node 232 is transmitted to the feedback terminal FB, and the voltage applied to the feedback terminal FB (feedback voltage FB ) is the comparison voltage V C It is the same as "V C =V REF 8. If it is assumed that the normal connection state of FIG. 8 suddenly transitions to the open fault state when " C is 1.2V, and the voltage immediately after the transition (V POUT -V TH ) is lower than 4.1V. Therefore, the transistor 233 is turned on, and as a result, the comparison voltage V C is the output terminal voltage V POUT is divided by a voltage divider circuit using resistors R2 and R3 (i.e., "V C =V POUT ・R2 / (R2+R3)").

[0057] Here, as in the first embodiment, the resistance value of the resistor R3 is set to be larger than the resistance value of the resistor R1. Therefore, the output terminal voltage V POUT and load voltage V LD is the output terminal voltage V under normal connection conditions POUT and load voltage V LD It is higher than "V C =V POUT ・R2 / (R2+R3)=V REF ", the output terminal voltage V POUT Resistors R2 and R3 and reference voltage V REFTherefore, when the normal connection state of FIG. 8 is changed to the open fault state of FIG. 9, the output terminal voltage V POUT The output terminal voltage V POUT is stabilized at 5.8V, and at this time, the load voltage V LD is stabilized at 5.7V (assuming the voltage ΔV is fixed at 0.1V).

[0058] For convenience of explanation, it is assumed that the normal connection state of FIG. 8 suddenly transitions to an open fault state, but the same applies when the power supply IC 2 starts up in an open fault state.

[0059] In this way, the comparison voltage generating circuit 230B generates the output terminal voltage V POUT A predetermined gate threshold voltage V TH A voltage lower by POUT -V TH ) and feedback voltage V FB Depending on the level of the feedback voltage V FB and output terminal voltage V POUT The comparison voltage V C In a normal connection state, POUT -V TH <V FB ", and at this time the feedback voltage V FB Based on the comparison voltage V C In an open fault condition, "V POUT -V TH >V FB ", and at this time the feedback voltage V FB Regardless of the output terminal voltage V POUT Based on the comparison voltage V C The operation of the error amplifier 240 and the circuit 250 is the same as that shown in the first embodiment.

[0060] A PNP bipolar transistor may be used as the switch element 233. In this case, the emitter of the bipolar transistor is connected to the output terminal POUT via internal wiring WR11, the collector of the bipolar transistor is connected to resistor R3 (connected to node 232 via resistor R3), and the base of the bipolar transistor is connected to the feedback terminal FB via internal wiring WR12. In the PNP bipolar transistor used as the switch element 233, if the base potential is lower than the emitter potential and the magnitude of the base-emitter voltage is equal to or greater than a predetermined threshold voltage, the bipolar transistor is turned on; otherwise, the bipolar transistor is turned off. In a normal connection state, the bipolar transistor used as the switch element 233 is turned off, and in an open-circuit fault state, the bipolar transistor used as the switch element 233 is turned on.

[0061] <<Third Example>> A third example will be described. In the third example, supplementary matters or modified techniques to the above content will be described.

[0062] A power supply monitoring circuit (not shown) is provided separately from the boost converter 1, and the power supply monitoring circuit detects the output terminal voltage V POUT or load voltage V LD By setting the resistance value of resistor R3 to be larger than the resistance value of resistor R1, the output terminal voltage V POUT and load voltage V LD can be increased compared to those in a normal connection state. Therefore, the power supply monitoring circuit can determine whether an abnormality (here, an abnormality corresponding to an open fault state) has occurred in the boost converter 1. However, it is also possible to set the resistance value of resistor R3 to the same as the resistance value of resistor R1.

[0063] In the above description, an open-circuit fault state is assumed to be a state in which the feedback terminal FB and node ND0 are insulated by a sufficiently high insulation resistance. However, there are also cases in which the feedback terminal FB and node ND0 are connected via a resistance component of, for example, several hundred kilohms (hereinafter referred to as an intermediate state). In the intermediate state, the switch element 231 in FIG. 4 may be turned on or off depending on the resistance component between the feedback terminal FB and node ND0. However, as a result, if the signal S210 in FIG. 4 becomes low, the state in FIG. 5 (or a state similar thereto) occurs, and if the signal S210 in FIG. 4 becomes high, the state in FIG. 6 (or a state similar thereto) occurs. Similarly, in the intermediate state, the transistor 233 in FIG. 7 may be turned on or off depending on the resistance component between the feedback terminal FB and node ND0. However, as a result, if the transistor 233 is turned off, the state shown in FIG. 8 (or a state similar thereto) is obtained, and if the transistor 233 is turned on, the state shown in FIG. 9 (or a state similar thereto) is obtained.

[0064] Although it has been assumed that a P-channel MOSFET is used as the rectifying element 12, an N-channel MOSFET may also be used as the rectifying element 12. A rectifying diode may also be used as the rectifying element 12. In this case, the anode and cathode of the diode serving as the rectifying element 12 may be connected to the switch terminal SW and the output terminal POUT, respectively.

[0065] With respect to any signal or voltage, the relationship between the high level and the low level thereof may be reversed without prejudice to the above-mentioned gist.

[0066] The channel types of the FETs (field effect transistors) shown in each embodiment are merely examples. The channel type of any FET may be changed between P-channel and N-channel types without departing from the spirit of the above.

[0067] Any of the transistors described above may be any type of transistor, provided that no disadvantages arise. For example, any of the transistors described above as MOSFETs may be replaced with junction FETs, IGBTs (Insulated Gate Bipolar Transistors), or bipolar transistors, provided that no disadvantages arise. Any of the transistors has a first electrode, a second electrode, and a control electrode. In an FET, one of the first and second electrodes is the drain, the other is the source, and the control electrode is the gate. In an IGBT, one of the first and second electrodes is the collector, the other is the emitter, and the control electrode is the gate. In a bipolar transistor other than an IGBT, one of the first and second electrodes is the collector, the other is the emitter, and the control electrode is the base.

[0068] The embodiments of the present disclosure can be modified in various ways as appropriate within the scope of the technical ideas set forth in the claims. The above-described embodiments are merely examples of the present disclosure, and the meanings of the terms of the present disclosure and each constituent element are not limited to those described in the above-described embodiments. The specific numerical values ​​shown in the above description are merely examples, and as a matter of course, they can be changed to various numerical values.

[0069] <<Supplementary Notes>> Supplementary notes are provided for the present disclosure, the specific configuration examples of which have been shown in the above-described embodiments.

[0070] A power supply semiconductor device according to one aspect of the present disclosure is IN In a power supply semiconductor device (2) used in a boost converter (1) that boosts an input voltage, the semiconductor device (2) has an output terminal (POUT) and a switching transistor (11), and uses an inductor (L0) that receives the input voltage to generate an output terminal voltage (V POUT ) at the output terminal, and a monitored voltage (V LD ) to be applied to the feedback terminal (FB), and the feedback voltage (V FB ) and a comparison voltage (VC ) and a predetermined reference voltage (V REF ) and a control drive circuit (20, 20A, 20B) configured to control the switching circuit based on the error.

[0071] When the monitored voltage is transmitted to the feedback terminal, the switching circuit can be controlled based on the error between the reference voltage and a comparison voltage based on the feedback voltage, thereby stabilizing the monitored voltage to a target voltage based on the reference voltage. Although transmission of the monitored voltage to the feedback terminal can be interrupted due to a disconnection in the external wiring, the above configuration allows the switching circuit to be controlled using a comparison voltage based on the output terminal voltage. Therefore, even if transmission of the monitored voltage to the feedback terminal is interrupted, it is possible to prevent situations that could damage components (excessive voltage boost).

[0072] In the power supply semiconductor device according to the first configuration, the control drive circuit increases the voltage of the output terminal by a predetermined voltage (V J , V TH a comparison voltage generating circuit (230, 230B) configured to generate the comparison voltage by switching between the feedback voltage and the output terminal voltage depending on the level relationship between the feedback voltage and a voltage lower by 1 / V; ERR and an error amplifier (240) configured to generate an error signal, and control the switching circuit based on the error signal (second configuration).

[0073] This makes it possible to generate a comparison voltage based on the output terminal voltage instead of the feedback voltage when the transmission of the monitored voltage to the feedback terminal is blocked, thereby preventing the occurrence of situations that could damage components (excessive voltage boost).

[0074] In the power supply semiconductor device according to the second configuration, the comparison voltage generation circuit may be configured (third configuration) to generate the comparison voltage based on the feedback voltage when the feedback voltage is higher than the voltage that is lower than the output terminal voltage by the predetermined voltage, and to generate the comparison voltage based on the output terminal voltage when the feedback voltage is lower than the voltage that is lower than the output terminal voltage by the predetermined voltage.

[0075] When the voltage to be monitored is properly transmitted to the feedback terminal, a drop in the feedback voltage is expected when the transmission of the voltage to be monitored to the feedback terminal is interrupted. According to the third configuration, when the transmission of the voltage to be monitored to the feedback terminal is interrupted, it is possible to generate a comparison voltage based on the output terminal voltage instead of the feedback voltage, thereby preventing the occurrence of a situation that could damage components (excessive voltage increase).

[0076] In the power supply semiconductor device according to the third configuration (see FIGS. 4 to 6), the control drive circuit (20A) further includes a comparator (210) configured to compare the voltage that is lower than the output terminal voltage by the predetermined voltage with the feedback voltage, the error amplifier has a first input terminal configured to receive the comparison voltage and a second input terminal configured to receive the reference voltage, and the comparison voltage generation circuit includes a first resistor (R1) provided between the feedback terminal and the first input terminal, a second resistor (R2) provided between the first input terminal and ground, and a switch element (231) provided between the output terminal and the first input terminal. a series circuit of a first resistor (R1) and a third resistor (R2), and when the feedback voltage is higher than the voltage that is lower than the output terminal voltage by the predetermined voltage, the switch element is turned off based on an output signal of the comparator, so that a voltage obtained by dividing the feedback voltage by the first resistor and the second resistor is applied to the first input terminal as the comparison voltage, and when the feedback voltage is lower than the voltage that is lower than the output terminal voltage by the predetermined voltage, the switch element is turned on based on an output signal of the comparator, so that a voltage based on the output terminal voltage is applied to the first input terminal as the comparison voltage (fourth configuration).

[0077] In the power supply semiconductor device according to the third configuration (see FIGS. 7 to 9), the error amplifier has a first input terminal configured to receive the comparison voltage and a second input terminal configured to receive the reference voltage, and the comparison voltage generating circuit has a first resistor (R1) provided between the feedback terminal and the first input terminal, a second resistor (R2) provided between the first input terminal and ground, and a series circuit of a switch element (233) and a third resistor (R3) provided between the output terminal and the first input terminal, and the switch element has a first electrode connected to the output terminal and a second electrode connected to the third resistor. a transistor having a second electrode connected to the output terminal and a control electrode connected to the feedback terminal, wherein when the feedback voltage is higher than the voltage that is lower than the output terminal voltage by the predetermined voltage, the switch element is turned off, so that a voltage obtained by dividing the feedback voltage by the first resistor and the second resistor is applied to the first input terminal as the comparison voltage, and when the feedback voltage is lower than the voltage that is lower than the output terminal voltage by the predetermined voltage, the switch element is turned on, so that a voltage based on the output terminal voltage is applied to the first input terminal as the comparison voltage (fifth configuration).

[0078] In the power supply semiconductor device according to any of the second to fifth configurations, the control and drive circuit may be configured (sixth configuration) to control the switching circuit based on the error signal so as to reduce the error between the comparison voltage and the reference voltage, and the output terminal voltage may be higher in the second state in which the comparison voltage is generated based on the output terminal voltage than in the first state in which the comparison voltage is generated based on the feedback voltage.

[0079] This makes it possible to determine whether the boost converter is in the first state or the second state in a power supply monitoring circuit that can be provided outside the power supply semiconductor device.

[0080] In the power supply semiconductor device according to any of the first to sixth configurations, the control drive circuit may be configured (seventh configuration) such that, when the monitored voltage is applied to the feedback terminal as the feedback voltage through the external wiring, a voltage based on the feedback voltage is used as the comparison voltage to control the switching circuit, and, when transmission of the monitored voltage to the feedback terminal is cut off, a voltage based on the output terminal voltage is used as the comparison voltage to control the switching circuit.

[0081] This makes it possible to control the switching circuit using a comparison voltage based on the output terminal voltage rather than a comparison voltage based on the feedback voltage when the transmission of the monitored voltage to the feedback terminal is cut off, thereby preventing situations that could damage components (excessive voltage boost) from occurring.

[0082] The power supply semiconductor device according to any of the first to seventh configurations may further include a switch terminal (SW) and a ground terminal (PGND), the switching transistor being provided between the switch terminal and the ground terminal, the inductor being provided between the terminal to which the input voltage is applied and the switch terminal, and the switching circuit having a rectifying element (12) provided between the switch terminal and the output terminal (eighth configuration).

[0083] A boost converter according to one aspect of the present disclosure has a configuration (ninth configuration) including a power supply semiconductor device according to any one of the first to eighth configurations, the inductor (L0), and an output capacitor (C0) connected to the output terminal.

[0084] REFERENCE SIGNS LIST 1 Boost converter 2 Power supply IC (power supply semiconductor device) L0 Inductor C0 Output capacitor LD Load WR1 Output wiring WR2 Feedback wiring WR11, WR12 Internal wiring IN Input terminal FB Feedback terminal POUT Output terminal SW Switch terminal PGND Ground terminal 10 Switching circuit 11 Switching transistor 12 Rectifier element (synchronous rectifier transistor) 20 Control drive circuit V IN Input voltage V POUTOutput terminal voltage V LD Load voltage V FB Feedback voltage V REF Reference voltage I LD Load current 20A, 20B Control drive circuit 210 Comparator 220 Voltage source 230, 230B Comparison voltage generation circuit 240 Error amplifier 250 Circuit (logic / drive circuit) R1 to R3 Resistors 231, 233 Switch element

Claims

1. In a power supply semiconductor device used in a boost converter that boosts an input voltage, An output terminal; a switching circuit having a switching transistor and configured to generate, at the output terminal, an output terminal voltage that is a boosted version of the input voltage, using an inductor that receives the input voltage; a feedback terminal for receiving a voltage to be monitored according to the output terminal voltage through an external wiring of the power supply semiconductor device; a control and drive circuit configured to control the switching circuit based on an error between a comparison voltage based on a feedback voltage applied to the feedback terminal and the output terminal voltage and a predetermined reference voltage. , power supply semiconductor device.

2. The control and drive circuit includes: a comparison voltage generating circuit configured to generate the comparison voltage by switching between the feedback voltage and the output terminal voltage in response to a level relationship between a voltage lower than the output terminal voltage by a predetermined voltage and the feedback voltage; an error amplifier configured to generate an error signal between the comparison voltage and the reference voltage, and controlling the switching circuit based on the error signal.

2. The power supply semiconductor device according to claim 1.

3. The comparison voltage generating circuit includes: generating the comparison voltage based on the feedback voltage when the feedback voltage is higher than the voltage that is lower than the output terminal voltage by the predetermined voltage; When the feedback voltage is lower than the voltage that is lower than the output terminal voltage by the predetermined voltage, the comparison voltage is generated based on the output terminal voltage.

3. The power supply semiconductor device according to claim 2.

4. The control drive circuit further includes a comparator configured to compare the voltage, which is lower than the output terminal voltage by the predetermined voltage, with the feedback voltage; the error amplifier has a first input terminal configured to receive the comparison voltage and a second input terminal configured to receive the reference voltage; the comparison voltage generating circuit includes a first resistor provided between the feedback terminal and the first input terminal, a second resistor provided between the first input terminal and ground, and a series circuit of a switch element and a third resistor provided between the output terminal and the first input terminal, when the feedback voltage is higher than the voltage that is lower than the output terminal voltage by the predetermined voltage, the switch element is turned off based on an output signal of the comparator, whereby a voltage obtained by dividing the feedback voltage by the first resistor and the second resistor is applied to the first input terminal as the comparison voltage; When the feedback voltage is lower than the voltage that is lower than the output terminal voltage by the predetermined voltage, the switch element is turned on based on the output signal of the comparator, and a voltage based on the output terminal voltage is applied to the first input terminal as the comparison voltage.

4. The power supply semiconductor device according to claim 3.

5. the error amplifier has a first input terminal configured to receive the comparison voltage and a second input terminal configured to receive the reference voltage; the comparison voltage generating circuit includes a first resistor provided between the feedback terminal and the first input terminal, a second resistor provided between the first input terminal and ground, and a series circuit of a switch element and a third resistor provided between the output terminal and the first input terminal, the switch element is a transistor having a first electrode connected to the output terminal, a second electrode connected to the third resistor, and a control electrode connected to the feedback terminal, When the feedback voltage is higher than the voltage that is lower than the output terminal voltage by the predetermined voltage, the switch element is turned off, whereby a voltage obtained by dividing the feedback voltage by the first resistor and the second resistor is applied to the first input terminal as the comparison voltage, When the feedback voltage is lower than the voltage that is lower than the output terminal voltage by the predetermined voltage, the switch element is turned on, and a voltage based on the output terminal voltage is applied to the first input terminal as the comparison voltage.

4. The power supply semiconductor device according to claim 3.

6. the control and drive circuit controls the switching circuit based on the error signal so as to reduce the error between the comparison voltage and the reference voltage; The output terminal voltage is higher in a second state in which the comparison voltage is generated based on the output terminal voltage than in a first state in which the comparison voltage is generated based on the feedback voltage.

3. The power supply semiconductor device according to claim 2.

7. The control and drive circuit includes: when the monitored voltage is applied as the feedback voltage to the feedback terminal through the external wiring, a voltage based on the feedback voltage is used as the comparison voltage to control the switching circuit; When the transmission of the monitored voltage to the feedback terminal is interrupted, the switching circuit is controlled using a voltage based on the output terminal voltage as the comparison voltage.

7. A power supply semiconductor device according to claim 1.

8. Further comprising a switch terminal and a ground terminal, the switching transistor is provided between the switch terminal and the ground terminal, the inductor is provided between a terminal to which the input voltage is applied and the switch terminal; The switching circuit has a rectifying element provided between the switch terminal and the output terminal.

7. A power supply semiconductor device according to claim 1.

9. A power supply semiconductor device according to any one of claims 1 to 6, The inductor; an output capacitor connected to the output terminal; , boost converter.