Semiconductor device

Abstract

A semiconductor device according to the present invention is provided with: a first die pad; a first semiconductor element which is bonded to the first die pad; a first lead which is separated from the first die pad; a first conduction member which is conductively bonded to the first semiconductor element and the first lead; a sealing resin which covers the first semiconductor element and the first conduction member; and a pillow member which is positioned between the first die pad and the first conduction member. The pillow member is in contact with the first die pad and the first conduction member. The pillow member has an insulating layer. The thermal conductivity of the insulating layer is higher than the thermal conductivity of the sealing resin.

Description

Semiconductor Devices

[0001] The present disclosure relates to semiconductor devices.

[0002] Patent Document 1 discloses an example of a semiconductor device including a first conductive plate and a second conductive plate to which two switching elements are individually conductively bonded, a first input terminal connected to the first conductive plate, an output terminal connected to the second conductive plate, a second input terminal, a first conductive member and a second conductive member, and a sealing resin. The first conductive member is conductively bonded to the switching element conductively bonded to the first conductive plate and to the second conductive plate. The second conductive member is conductively bonded to the switching element conductively bonded to the second conductive plate and to the second input terminal. This forms a half-bridge circuit including two switching elements in the semiconductor device. Therefore, power can be converted using the semiconductor device.

[0003] The first conductive member and the second conductive member included in the semiconductor device disclosed in Patent Document 1 are each a metal clip. Therefore, the semiconductor device is capable of carrying a larger current. Here, most of the heat generated from the first conductive member due to conduction is dissipated to the outside via the second conductive plate. Meanwhile, most of the heat generated from the second conductive member due to conduction is dissipated to the outside via the second input terminal. Because the volume of the second input terminal is smaller than the volume of the second conductive plate, the heat dissipation efficiency of the second conductive member is lower than that of the first conductive member. Therefore, a method for improving the heat dissipation efficiency of the second conductive member is desired.

[0004] International Publication No. 2022 / 030244

[0005] An object of the present disclosure is to provide an improved semiconductor device compared to conventional semiconductor devices. In particular, in view of the above circumstances, an object of the present disclosure is to provide a semiconductor device that can improve heat dissipation efficiency while allowing a larger current to flow.

[0006] A semiconductor device provided by one aspect of the present disclosure includes a first die pad, a first semiconductor element bonded to the first die pad, a first lead spaced from the first die pad, a first conductive member conductively bonded to the first semiconductor element and the first lead, a sealing resin covering the first semiconductor element and the first conductive member, and a pillow member positioned between the first die pad and the first conductive member. The pillow member is in contact with the first die pad and the first conductive member. The pillow member has an insulating layer. The thermal conductivity of the insulating layer is higher than the thermal conductivity of the sealing resin.

[0007] According to the above configuration, it is possible to improve the heat dissipation efficiency while allowing a larger current to flow.

[0008] Other features and advantages of the present disclosure will become more apparent from the following detailed description taken in conjunction with the accompanying drawings.

[0009] FIG. 1 is a perspective view of a semiconductor device according to a first embodiment of the present disclosure. FIG. 2 is a plan view of the semiconductor device shown in FIG. 1. FIG. 3 is a plan view corresponding to FIG. 2, seen through the sealing resin. FIG. 4 is a bottom view of the semiconductor device shown in FIG. 1. FIG. 5 is a front view of the semiconductor device shown in FIG. 1. FIG. 6 is a right side view of the semiconductor device shown in FIG. 1. FIG. 7 is a cross-sectional view taken along line VII-VII in FIG. 3. FIG. 8 is a cross-sectional view taken along line VIII-VIII in FIG. 3. FIG. 9 is a cross-sectional view taken along line IX-IX in FIG. 3. FIG. 10 is a partial enlarged view of FIG. 7, showing the first semiconductor element and its vicinity. FIG. 11 is a partial enlarged view of FIG. 7, showing the second semiconductor element and its vicinity. FIG. 12 is a partial enlarged view of FIG. 8. FIG. 13 is a partial enlarged view of FIG. 9. FIG. 14 is a partial enlarged view of FIG. 3, showing the pillow member and its vicinity. FIG. 15 is a cross-sectional view taken along line XV-XV in FIG. 14. FIG. 16 is a partially enlarged view of FIG. 3 , showing a first conductive member and a second conductive member. FIG. 17 is a cross-sectional view of a semiconductor device according to a second embodiment of the present disclosure. FIG. 18 is a partially enlarged plan view of the semiconductor device shown in FIG. 17 , with the sealing resin omitted. FIG. 19 is a cross-sectional view taken along line XIX-XIX in FIG. 18 . FIG. 20 is a cross-sectional view of a semiconductor device according to a third embodiment of the present disclosure. FIG. 21 is a partially enlarged plan view of the semiconductor device shown in FIG. 20 , with the sealing resin omitted. FIG. 22 is a cross-sectional view taken along line XXII-XXII in FIG. 21 . FIG. 23 is a partially enlarged cross-sectional view of a semiconductor device according to a modified example of the third embodiment of the present disclosure. FIG. 24 is a cross-sectional view of a semiconductor device according to a fourth embodiment of the present disclosure. FIG. 25 is a partially enlarged cross-sectional view of FIG. 24 .

[0010] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present disclosure will be described with reference to the accompanying drawings.

[0011] First Embodiment: A semiconductor device A10 according to a first embodiment of the present disclosure will be described with reference to FIGS. 1 to 16. The semiconductor device A10 includes two die pads 10, a first lead 11, a second lead 12, a third lead 13, two fourth leads 14, two fifth leads 15, a plurality of semiconductor elements 21, a conductive bonding layer 29, a first conductive member 31, a second conductive member 32, a pillow member 33, and a sealing resin 50. The semiconductor device A10 also includes two first wires 41, two second wires 42, two first relay wires 43, and two second relay wires 44. For ease of understanding, FIG. 3 shows the sealing resin 50 in perspective. In FIG. 3, the transparent sealing resin 50 is indicated by an imaginary line (a two-dot chain line). Furthermore, in FIG. 3, line IX-IX is indicated by a dashed line.

[0012] In the description of the semiconductor device A10, for convenience, an example of the normal direction to each of the main surfaces 101 of the two die pads 10 described later will be referred to as the "first direction z." An example of a direction perpendicular to the first direction z will be referred to as the "second direction x." An example of a direction perpendicular to the first direction z and the second direction x will be referred to as the "third direction y."

[0013] The semiconductor device A10 converts a DC power supply voltage applied to the first lead 11 and the third lead 13 into AC power using a plurality of semiconductor elements 21. The converted AC power is input to a power supply target such as a motor from the second lead 12. The semiconductor device A10 is used in a power conversion circuit such as an inverter.

[0014] As shown in FIGS. 3 , 7 , and 8 , the two die pads 10 include a first die pad 10A and a second die pad 10B. The first die pad 10A and the second die pad 10B are spaced apart from each other in the second direction x. The two die pads 10, along with a first lead 11, a second lead 12, a third lead 13, two fourth leads 14, and two fifth leads 15, are obtained from the same lead frame. The lead frame contains copper (Cu) or a copper alloy. Therefore, the two die pads 10, the first lead 11, the second lead 12, the third lead 13, the two fourth leads 14, and the two fifth leads 15 each contain copper element. Each of the two die pads 10 has a main surface 101 and a back surface 102. The main surface 101 and the back surface 102 face opposite each other in the first direction z. The back surface 102 of each of the two die pads 10 is exposed from the sealing resin 50 .

[0015] 3 and 12, the first die pad 10A is provided with a first seat 103. The first seat 103 is recessed from the main surface 101 of the first die pad 10A. As a result, a step is formed between the main surface 101 and the first seat 103 in the first die pad 10A.

[0016] As shown in FIGS. 7 to 9 , the sealing resin 50 covers the semiconductor elements 21, the first conductive members 31, and the second conductive members 32. The sealing resin 50 also covers portions of the two die pads 10, the first lead 11, the second lead 12, the third lead 13, the two fourth leads 14, and the two fifth leads 15. The sealing resin 50 has electrical insulation properties. The sealing resin 50 is made of a material containing, for example, black epoxy resin. The sealing resin 50 has a top surface 51, a bottom surface 52, two first side surfaces 53, a second side surface 54, a third side surface 55, a plurality of recesses 56, and a groove 57.

[0017] 7 and 8, the top surface 51 faces the same side as the main surfaces 101 of the two die pads 10 in the first direction z. As shown in Figures 7 to 9, the bottom surface 52 faces the opposite side to the top surface 51 in the first direction z. As shown in Figure 4, the back surfaces 102 of each of the two die pads 10 are exposed from the bottom surface 52.

[0018] 2, 4, and 5, the two first side surfaces 53 are spaced apart from each other in the second direction x. The two first side surfaces 53 face the second direction x and extend in the third direction y. The two first side surfaces 53 are connected to the top surface 51 and the bottom surface 52.

[0019] 2, 4, and 6, the second side surface 54 and the third side surface 55 are spaced apart from each other in the third direction y. The second side surface 54 and the third side surface 55 face opposite each other in the third direction y and extend in the second direction x. The second side surface 54 and the third side surface 55 are connected to the top surface 51 and the bottom surface 52. As shown in FIG. 5, the first lead 11, the second lead 12, the third lead 13, two fourth leads 14, and two fifth leads 15 protrude outward from the third side surface 55.

[0020] 1, 2, and 4, the recesses 56 are recessed from the third side surface 55 in the third direction y and penetrate the sealing resin 50 in the first direction z. In the second direction x, the recesses 56 are individually provided between the third lead 13 and a second detection terminal 15B (described later), between the first lead 11 and the third lead 13, between the first lead 11 and the second lead 12, and between the second lead 12 and a first detection terminal 15A (described later).

[0021] 4 and 5 , the groove 57 is recessed from the bottom surface 52 in the first direction z and extends in the third direction y. Both sides of the groove 57 in the third direction y are connected to the second side surface 54 and the third side surface 55. When viewed in the first direction z, the groove 57 defines the back surfaces 102 of the two die pads 10.

[0022] As shown in FIGS. 3 and 7 to 9 , the multiple semiconductor elements 21 are bonded to each of the two die pads 10. In the semiconductor device A10, the multiple semiconductor elements 21 include two first semiconductor elements 21A and two second semiconductor elements 21B. The two first semiconductor elements 21A are bonded to the main surface 101 of the first die pad 10A. The two second semiconductor elements 21B are bonded to the main surface 101 of the second die pad 10B. The multiple semiconductor elements 21 are, for example, MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors). Alternatively, the multiple semiconductor elements 21 may be switching elements such as IGBTs (Insulated Gate Bipolar Transistors) or diodes. In the description of the semiconductor device A10, the multiple semiconductor elements 21 are n-channel MOSFETs with a vertical structure. The multiple semiconductor elements 21 include a compound semiconductor substrate. The compound semiconductor substrate has a composition including silicon carbide (SiC). As shown in Figures 3, 10 and 11, each of the semiconductor elements 21 has a first electrode 211, a second electrode 212, a third electrode 213, and two fourth electrodes 214.

[0023] 10 and 11 , the first electrode 211 is located on the opposite side in the first direction z from the side facing the main surface 101 of either of the two die pads 10. A current corresponding to the power converted by the semiconductor element 21 flows through the first electrode 211. In other words, the first electrode 211 corresponds to the source electrode of the semiconductor element 21.

[0024] 10 and 11 , the second electrode 212 faces the main surface 101 of one of the two die pads 10. A current corresponding to the power before being converted by the semiconductor element 21 flows through the second electrode 212. In other words, the second electrode 212 corresponds to the drain electrode of the semiconductor element 21.

[0025] 10 and 11 , the third electrode 213 is located on the same side as the first electrode 211 in the first direction z. A gate voltage for driving the semiconductor element 21 is applied to the third electrode 213. When viewed in the first direction z, the area of ​​the third electrode 213 is smaller than the area of ​​the first electrode 211.

[0026] 3 , the two fourth electrodes 214 are located on the same side as the first electrode 211 in the first direction z. The two fourth electrodes 214 are located on opposite sides of the third electrode 213 in the third direction y. A voltage having the same potential as the voltage applied to the first electrode 211 is applied to each of the two fourth electrodes 214.

[0027] As shown in FIGS. 10 and 11 , the conductive bonding layer 29 is located between the main surface 101 of the first die pad 10A and the two first semiconductor elements 21A, and between the main surface 101 of the second die pad 10B and the two second semiconductor elements 21B. The conductive bonding layer 29 is, for example, solder. Alternatively, the conductive bonding layer 29 may be sintered metal. The conductive bonding layer 29 conductively bonds the main surface 101 of the first die pad 10A to the second electrodes 212 of the two first semiconductor elements 21A. This allows the second electrodes 212 of the two first semiconductor elements 21A to be electrically connected to the first die pad 10A. The conductive bonding layer 29 also conductively bonds the main surface 101 of the second die pad 10B to the second electrodes 212 of the two second semiconductor elements 21B. As a result, the second electrodes 212 of the two second semiconductor elements 21B are electrically connected to the second die pad 10B.

[0028] 2 and 3 , the first lead 11 is located on the opposite side of the second side surface 54 of the sealing resin 50 with respect to the two die pads 10 in the third direction y. The first lead 11 is spaced apart from the two die pads 10. The first lead 11 is electrically connected to the first electrodes 211 of the two first semiconductor elements 21A. The first lead 11 is an N terminal (negative electrode) to which a DC power supply voltage to be converted into power is applied.

[0029] 3 and 9 , the first lead 11 has a mounting portion 111 and a covering portion 112. The mounting portion 111 protrudes to the outside from the third side surface 55 of the sealing resin 50. The mounting portion 111 extends in the third direction y. The covering portion 112 is connected to the mounting portion 111. The covering portion 112 is covered by the sealing resin 50.

[0030] 3 and 13 , a second seat 113 is provided in the covering portion 112 of the first lead 11. The second seat 113 is recessed in the first direction z from the side where a first intermediate portion 313 of a first conductive member 31, which will be described later, is located in the first direction z.

[0031] As shown in FIG. 3 , the second lead 12 is connected to the first die pad 10A. Therefore, the second lead 12 is electrically connected to the second electrodes 212 of the two first semiconductor elements 21A via the first die pad 10A. AC power converted by the multiple semiconductor elements 21 is output from the second lead 12. The second lead 12 is located on the opposite side of the first lead 11 from the third lead 13 and adjacent to the first lead 11. The second lead 12 has a mounting portion 121 and a covering portion 122. The mounting portion 121 protrudes outward from the third side surface 55 of the sealing resin 50. The mounting portion 121 extends in the third direction y. The covering portion 122 connects the mounting portion 121 to the first die pad 10A. The covering portion 122 is covered by the sealing resin 50. The covering portion 122 is bent in the first direction z toward the side approaching the main surface 101 of the first die pad 10A.

[0032] As shown in FIG. 3 , the third lead 13 is connected to the second die pad 10B. Therefore, the third lead 13 is electrically connected to the second electrodes 212 of the two second semiconductor elements 21B via the second die pad 10B. The third lead 13 is a P terminal (positive electrode) to which a DC power supply voltage to be converted is applied. The third lead 13 is located on the opposite side of the first lead 11 from the second lead 12 and adjacent to the first lead 11. The third lead 13 has a mounting portion 131 and a covering portion 132. The mounting portion 131 protrudes outward from the third side surface 55 of the sealing resin 50. The mounting portion 131 extends in the third direction y. The covering portion 132 connects the mounting portion 131 to the second die pad 10B. The covering portion 132 is covered by the sealing resin 50. The covering portion 132 is bent in the first direction z toward the side closer to the main surface 101 of the second die pad 10B.

[0033] 2 and 3, the two fourth leads 14 are located on the opposite side of the second side surface 54 of the sealing resin 50 in the third direction y with respect to the two die pads 10. As shown in Fig. 3, the two fourth leads 14 extend in the third direction y. The two fourth leads 14 sandwich the first lead 11, the second lead 12, the third lead 13, and the two fifth leads 15 between them in the second direction x. The two fourth leads 14 include a first gate terminal 14A and a second gate terminal 14B.

[0034] 3 , each of the two fourth leads 14 has a mounting portion 141 and a covering portion 142. The mounting portion 141 protrudes outward from the third side surface 55 of the sealing resin 50. The mounting portion 141 extends in the third direction y. The covering portion 142 is connected to the mounting portion 141. The covering portion 142 is covered by the sealing resin 50.

[0035] 3, the first gate terminal 14A is located closer to the first die pad 10A than to the second die pad 10B. The first gate terminal 14A is electrically connected to the third electrodes 213 of the two first semiconductor elements 21A. A gate voltage for driving the two first semiconductor elements 21A is applied to the first gate terminal 14A.

[0036] 3, the second gate terminal 14B is located closer to the second die pad 10B than to the first die pad 10A. The second gate terminal 14B is electrically connected to the third electrodes 213 of the two second semiconductor elements 21B. A gate voltage for driving the two second semiconductor elements 21B is applied to the second gate terminal 14B.

[0037] 2 and 3, the two fifth leads 15 are located on the opposite side of the second side surface 54 of the sealing resin 50 with respect to the two die pads 10 in the third direction y. As shown in Fig. 3, the two fifth leads 15 extend in the third direction y. The two fifth leads 15 sandwich the first lead 11, the second lead 12, and the third lead 13 between them in the second direction x. The two fifth leads 15 include a first detection terminal 15A and a second detection terminal 15B.

[0038] 3 , each of the two fifth leads 15 has a mounting portion 151 and a covering portion 152. The mounting portion 151 protrudes to the outside from the third side surface 55 of the sealing resin 50. The mounting portion 151 extends in the third direction y. The covering portion 152 is connected to the mounting portion 151. The covering portion 152 is covered by the sealing resin 50.

[0039] 2 and 3, the first detection terminal 15A is located between the second lead 12 and the first gate terminal 14A. The first detection terminal 15A is electrically connected to the two fourth electrodes 214 of each of the two first semiconductor elements 21A. A voltage having the same potential as the voltage applied to the first electrode 211 of each of the two first semiconductor elements 21A is applied to the first detection terminal 15A.

[0040] 2 and 3, the second detection terminal 15B is located between the third lead 13 and the second gate terminal 14B. The second detection terminal 15B is electrically connected to the two fourth electrodes 214 of each of the two second semiconductor elements 21B. A voltage having the same potential as the voltage applied to the first electrodes 211 of each of the two second semiconductor elements 21B is applied to the second detection terminal 15B.

[0041] 5, the heights h of the mounting portion 111 of the first lead 11, the mounting portion 121 of the second lead 12, and the mounting portion 131 of the third lead 13 are all equal. As shown in Fig. 6, when viewed in the second direction x, the mounting portion 141 of either of the two fourth leads 14 overlaps with the mounting portion 111 of the first lead 11, the mounting portion 121 of the second lead 12, and the mounting portion 131 of the third lead 13.

[0042] As shown in FIGS. 3 and 9 , the first conductive member 31 is conductively bonded to the first electrodes 211 of the two first semiconductor elements 21A and the second seat portion 113 of the first lead 11. This allows the first lead 11 to be electrically connected to the first electrodes 211 of the two first semiconductor elements 21A. The first conductive member 31 contains copper or a copper alloy. The first conductive member 31 is a metal clip. The first conductive member 31 has two first joint portions 311, a second joint portion 312, and a first intermediate portion 313.

[0043] 3 and 10 , the two first bonding portions 311 are individually conductively bonded to the first electrodes 211 of the two first semiconductor elements 21A. Each of the two first bonding portions 311 is bifurcated and spaced apart from each other in the third direction y. As shown in FIG. 3 , the two first bonding portions 311 are spaced apart from each other in the third direction y.

[0044] 3 and 13 , the second joint portion 312 is conductively joined to the second seat portion 113 of the first lead 11. The second joint portion 312 extends in the second direction x. At least a portion of the second joint portion 312 is accommodated in the second seat portion 113.

[0045] 3, the first intermediate portion 313 is bent in a hook shape when viewed in the first direction z. When viewed in the first direction z, the first intermediate portion 313 overlaps the main surface 101 of the first die pad 10A. The first intermediate portion 313 connects the two first bonding portions 311 and the second bonding portion 312. As shown in FIG. 15, the first intermediate portion 313 has a first surface 313A, a second surface 313B, and a bending portion 313C.

[0046] 15 , the first surface 313A is in contact with the pillow member 33. The second surface 313B is spaced apart from the first surface 313A and faces the main surface 101 of the first die pad 10A. The first surface 313A and the second surface 313B face the same side in the first direction z. The first surface 313A is located between the main surface 101 of the first die pad 10A and the second surface 313B in the first direction z.

[0047] 15 , the bent portion 313C is bent from the second surface 313B toward the main surface 101 of the first die pad 10A. The bent portion 313C includes the first surface 313A. The dimensions in the first direction z of the portion of the bent portion 313C that includes the first surface 313A and whose in-plane direction is a direction orthogonal to the first direction z and the portion of the first intermediate portion 313 that includes the second surface 313B and whose in-plane direction is a direction orthogonal to the first direction z are equal to each other.

[0048] As shown in FIG. 3 , the first intermediate portion 313 of the first conductive member 31 is provided with a plurality of first chamfered portions 314. As shown in FIG. 16 , when viewed in the first direction z, each of the plurality of first chamfered portions 314 has a first edge 314A, a second edge 314B, and a first connecting edge 314C. The first edge 314A extends in a direction perpendicular to the first direction z. The second edge 314B extends in a direction perpendicular to the first direction z, different from the direction in which the first edge 314A extends. The first connecting edge 314C smoothly connects the first edge 314A and the second edge 314B. When the first connecting edge 314C is an arc, each of the first edge 314A and the second edge 314B is a tangent to the first connecting edge 314C. When viewed in the first direction z, the first connecting edge 314C is spaced apart from an intersection P1 between an extension line L1 of the first edge 314A and an extension line L2 of the second edge 314B.

[0049] As shown in Fig. 7 , the pillow member 33 is located between the first die pad 10A and the first intermediate portion 313 of the first conductive member 31. As shown in Fig. 15 , the pillow member 33 is in contact with the main surface 101 of the first die pad 10A and the first surface 313A of the first intermediate portion 313 of the first conductive member 31. As shown in Fig. 14 , when viewed in the first direction z, the pillow member 33 includes a portion that protrudes outward from the first intermediate portion 313. As shown in Fig. 15 , the pillow member 33 has an insulating layer 331, a first metal layer 332, a second metal layer 333, a first bonding layer 334, and a second bonding layer 335.

[0050] The insulating layer 331 electrically insulates the first die pad 10A and the first conductive member 31 from each other. The thermal conductivity of the insulating layer 331 is higher than that of the sealing resin 50. In the semiconductor device A10, the insulating layer 331 includes ceramics. The ceramics contain, for example, aluminum nitride (AlN) or aluminum oxide (AlO). Alternatively, the insulating layer 331 may include a resin that has a higher thermal conductivity than the sealing resin 50 and is electrically insulating.

[0051] As shown in FIG. 15 , the first metal layer 332 is located between the first die pad 10A and the insulating layer 331. The first metal layer 332 is in contact with the insulating layer 331. The first metal layer 332 contains copper. The second metal layer 333 is located between the insulating layer 331 and the first intermediate portion 313 of the first conductive member 31. Therefore, the first metal layer 332 and the second metal layer 333 are located on opposite sides of the insulating layer 331. The second metal layer 333 is in contact with the insulating layer 331. The second metal layer 333 contains copper. The thermal conductivity of the first metal layer 332 and the second metal layer 333 is higher than the thermal conductivity of the insulating layer 331. Furthermore, the thickness of each of the first metal layer 332 and the second metal layer 333 is greater than the thickness of the insulating layer 331. The insulating layer 331, the first metal layer 332 and the second metal layer 333 are obtained, for example, from a DBC (Direct Bonded Copper) substrate.

[0052] In addition to the above, each of the first metal layer 332 and the second metal layer 333 may contain silver. As a result, the thermal conductivity of each of the first metal layer 332 and the second metal layer 333 is higher than the thermal conductivity of the first conductive member 31. One example of a method for achieving this configuration is to print a resinate paste containing silver on both sides of a ceramic plate that will become the insulating layer 331, and then bake the resinate paste. The baked resinate paste becomes the first metal layer 332 and the second metal layer 333.

[0053] 15 , first bonding layer 334 bonds main surface 101 of first die pad 10A to first metal layer 332. Second bonding layer 335 bonds second metal layer 333 to first surface 313A of first intermediate portion 313 of first conductive member 31. First bonding layer 334 and second bonding layer 335 each contain a metal element. The metal element is tin (Sn). As a result, the melting points of first bonding layer 334 and second bonding layer 335 are set lower than the melting points of first metal layer 332 and second metal layer 333. First bonding layer 334 and second bonding layer 335 are, for example, solder.

[0054] 7 to 10, the semiconductor device A10 further includes a first conductive bonding layer 34. The first conductive bonding layer 34 conductively bonds the first electrodes 211 of the two first semiconductor elements 21A to the two first bonding portions 311. The first conductive bonding layer 34 is, for example, solder. Alternatively, the first conductive bonding layer 34 may be a sintered metal.

[0055] 9 and 13, the semiconductor device A10 further includes a second conductive bonding layer 35. The second conductive bonding layer 35 conductively bonds the second seat portion 113 of the first lead 11 to the second bonding portion 312. The second conductive bonding layer 35 is, for example, solder. Alternatively, the second conductive bonding layer 35 may be a sintered metal.

[0056] As shown in FIGS. 3 and 8 , the second conductive member 32 is conductively bonded to the first electrodes 211 of the two second semiconductor elements 21B and the first seat portion 103 of the first die pad 10A. This electrically connects the first electrode 211 of each of the two second semiconductor elements 21B to the first die pad 10A and the second electrode 212 of each of the two first semiconductor elements 21A. The second conductive member 32 contains copper or a copper alloy. The second conductive member 32 is a metal clip. The second conductive member 32 has two third bonding portions 321, a fourth bonding portion 322, and a second intermediate portion 323.

[0057] 3 and 11 , the two third bonding portions 321 are individually conductively bonded to the first electrodes 211 of the two second semiconductor elements 21B. Each of the two third bonding portions 321 is bifurcated and spaced apart from each other in the third direction y. As shown in FIG. 3 , the two third bonding portions 321 are spaced apart from each other in the third direction y.

[0058] 3 and 12 , the fourth bonding portion 322 is conductively bonded to the first seat portion 103 of the first die pad 10A. The fourth bonding portion 322 extends in the third direction y. At least a portion of the fourth bonding portion 322 is accommodated in the first seat portion 103.

[0059] 3, the second intermediate portion 323 connects the two third bonding portions 321 and the fourth bonding portion 322. The second intermediate portion 323 straddles the gap between the first die pad 10A and the second die pad 10B.

[0060] 7, 8, and 11, the semiconductor device A10 further includes a third conductive bonding layer 36. The third conductive bonding layer 36 conductively bonds the first electrodes 211 of the two second semiconductor elements 21B to the two third bonding portions 321. The third conductive bonding layer 36 is, for example, solder. Alternatively, the third conductive bonding layer 36 may be a sintered metal.

[0061] 8 and 12, the semiconductor device A10 further includes a fourth conductive bonding layer 37. The fourth conductive bonding layer 37 conductively bonds the first seat portion 103 of the first die pad 10A to the fourth bonding portion 322. The fourth conductive bonding layer 37 is, for example, solder. Alternatively, the fourth conductive bonding layer 37 may be a sintered metal.

[0062] As shown in FIG. 3 , the second intermediate portion 323 of the second conductive member 32 is provided with a plurality of second chamfered portions 324. As shown in FIG. 16 , when viewed in the first direction z, each of the plurality of second chamfered portions 324 has a third edge 324A, a fourth edge 324B, and a second connecting edge 324C. The third edge 324A extends in a direction perpendicular to the first direction z. The fourth edge 324B extends in a direction perpendicular to the first direction z, which is different from the direction in which the third edge 324A extends. The second connecting edge 324C smoothly connects the third edge 324A and the fourth edge 324B. When the second connecting edge 324C is an arc, each of the third edge 324A and the fourth edge 324B is a tangent to the second connecting edge 324C. When viewed in the first direction z, the second connecting edge 324C is spaced apart from an intersection P2 between an extension line L3 of the third edge 324A and an extension line L4 of the fourth edge 324B.

[0063] 3, one of the two first wires 41 is conductively bonded to the third electrode 213 of the first semiconductor element 21A that is located closest to the first gate terminal 14A, and to the covering portion 142 of the first gate terminal 14A. As shown in FIG. 3, the other of the two first wires 41 is conductively bonded to the third electrode 213 of the second semiconductor element 21B that is located closest to the second gate terminal 14B, and to the covering portion 142 of the second gate terminal 14B.

[0064] As shown in FIG. 3 , one of the two first relay wires 43 is conductively bonded to the third electrode 213 of one first semiconductor element 21A and the third electrode 213 of the other first semiconductor element 21A. As shown in FIG. 3 , the other of the two first relay wires 43 is conductively bonded to the third electrode 213 of one second semiconductor element 21B and the third electrode 213 of the other second semiconductor element 21B. The two first wires 41 and the two first relay wires 43 electrically connect the first gate terminal 14A to the third electrodes 213 of the two first semiconductor elements 21A. In addition, the second gate terminal 14B is electrically connected to the third electrodes 213 of the two second semiconductor elements 21B.

[0065] 3, one of the two second wires 42 is conductively joined to one of the two fourth electrodes 214 of the first semiconductor element 21A that is located closest to the first detection terminal 15A, and to the covering portion 152 of the first detection terminal 15A. As shown in FIG. 3, the other of the two second wires 42 is conductively joined to one of the two fourth electrodes 214 of the second semiconductor element 21B that is located closest to the second detection terminal 15B, and to the covering portion 152 of the second detection terminal 15B.

[0066] As shown in FIG. 3 , one of the two second relay wires 44 is conductively bonded to one of the two fourth electrodes 214 of one first semiconductor element 21A and one of the two fourth electrodes 214 of the other first semiconductor element 21A. As shown in FIG. 3 , one of the two second relay wires 44 is conductively bonded to one of the two fourth electrodes 214 of one second semiconductor element 21B and one of the two fourth electrodes 214 of the other second semiconductor element 21B. Through the two second wires 42 and the two second relay wires 44, the first detection terminal 15A is electrically connected to the two fourth electrodes 214 of each of the two first semiconductor elements 21A. In addition, the second detection terminal 15B is electrically connected to the two fourth electrodes 214 of each of the two second semiconductor elements 21B.

[0067] Next, the effects of the semiconductor device A10 will be described.

[0068] The semiconductor device A10 includes a first die pad 10A to which a first semiconductor element 21A is bonded, a first conductive member 31 conductively bonded to the first semiconductor element 21A and the first lead 11, and a pillow member 33 located between the first die pad 10A and the first conductive member 31. The pillow member 33 is in contact with the first die pad 10A and the first conductive member 31. The pillow member 33 has an insulating layer 331. The thermal conductivity of the insulating layer 331 is higher than the thermal conductivity of the material covering the first conductive member 31. This configuration electrically insulates the first die pad 10A and the first conductive member 31 from each other. Furthermore, heat generated from the first conductive member 31 due to electrical conduction between the first semiconductor element 21A and the first lead 11 is more easily conducted to the first die pad 10A than to the sealing resin 50. This makes it possible to improve the heat dissipation efficiency of the first conductive member 31 even when a larger current flows through the first conductive member 31. Therefore, with this configuration, the semiconductor device A10 can improve the heat dissipation efficiency while allowing a larger current to flow.

[0069] The pillow member 33 has a first metal layer 332, a second metal layer 333, a first bonding layer 334, and a second bonding layer 335. Each of the first bonding layer 334 and the second bonding layer 335 contains a metal element. By adopting this configuration, the heat dissipation properties of the pillow member 33 can be improved.

[0070] In the above case, the melting points of the first bonding layer 334 and the second bonding layer 335 are lower than the melting points of the first metal layer 332 and the second metal layer 333. By adopting this configuration, the pillow member 33 can be bonded to the first die pad 10A and the first conductive member 31 at the same time that the pillow member 33 is conductively bonded to the first semiconductor element 21A and the first lead 11 by reflow.

[0071] The thickness of each of the first metal layer 332 and the second metal layer 333 is greater than the thickness of the insulating layer 331. By adopting this configuration, heat is more likely to be conducted in the direction perpendicular to the first direction z in each of the first metal layer 332 and the second metal layer 333. This reduces the thermal resistance at the interface between the insulating layer 331 and the first metal layer 332 and at the interface between the insulating layer 331 and the second metal layer 333, thereby further improving the heat dissipation performance of the pillow member 33.

[0072] Furthermore, when the first metal layer 332 and the second metal layer 333 each contain silver, the thermal conductivity of the first metal layer 332 and the second metal layer 333 is higher than the thermal conductivity of the first conductive member 31. This makes it possible to improve the heat dissipation performance of the pillow member 33 compared to when the first metal layer 332 and the second metal layer 333 each contain copper.

[0073] The first conductive member 31 has a first bonding portion 311, a second bonding portion 312, and a first intermediate portion 313. The first intermediate portion 313 has a first surface 313A that contacts the pillow member 33, and a second surface 313B that is spaced apart from the first surface 313A and faces the main surface 101 of the first die pad 10A. The first surface 313A is located between the main surface 101 and the second surface 313B in the first direction z. This configuration makes it possible to reduce the dimension of the pillow member 33 in the first direction z.

[0074] When viewed in the first direction z, the pillow member 33 includes a portion that protrudes outward from the first intermediate portion 313 of the first conductive member 31. With this configuration, heat is more easily conducted in the pillow member 33 in a direction perpendicular to the first direction z. This reduces the thermal resistance at the interface between the pillow member 33 and the first intermediate portion 313, thereby further improving the heat dissipation efficiency of the first conductive member 31.

[0075] As viewed in the first direction z, the first intermediate portion 313 of the first conductive member 31 includes a first chamfered portion 314 having a first edge 314A, a second edge 314B, and a first connecting edge 314C. The first connecting edge 314C smoothly connects the first surface 313A and the second surface 313B. As shown in FIG. 16 , as viewed in the first direction z, the first connecting edge 314C is spaced apart from an intersection P2 between an extension line L1 of the first edge 314A and an extension line L2 of the second edge 314B. This configuration allows for smoother current flow in the first intermediate portion 313. This reduces heat generated from the first conductive member 31 due to electrical conduction between the first semiconductor element 21A and the first lead 11. Additionally, the shorter conductive path length of the first conductive member 31 reduces parasitic inductance of the semiconductor device A10.

[0076] The first die pad 10A is provided with a first seat 103 recessed from the main surface 101. A portion of the second conductive member 32 is housed in the first seat 103. With this configuration, when the second conductive member 32 is conductively joined to the second semiconductor element 21B and the first die pad 10A, the first seat 103 restricts rotation of the second conductive member 32 about the first direction z. This makes it possible to suppress misalignment of the second conductive member 32 with respect to the second semiconductor element 21B.

[0077] The first lead 11 is provided with a second seat portion 113 that is recessed in the first direction z from the side where the first intermediate portion 313 of the first conductive member 31 is located in the first direction z. A portion of the second joint portion 312 of the first conductive member 31 is housed in the second seat portion 113. With this configuration, when the first conductive member 31 is conductively joined to the first semiconductor element 21A and the first lead 11, the second seat portion 113 restricts rotation of the first conductive member 31 about the first direction z. This makes it possible to suppress misalignment of the first conductive member 31 with respect to each of the first semiconductor element 21A and the pillow member 33.

[0078] The second lead 12 is connected to the first die pad 10 A. The third lead 13 is connected to the second die pad 10 B. This configuration makes it possible to utilize the two die pads 10 as conductive paths for the semiconductor device A10 while suppressing an increase in the size of the semiconductor device A10.

[0079] The rear surface 102 of each of the two die pads 10 is exposed from the sealing resin 50. By adopting this configuration, the heat dissipation performance of the semiconductor device A10 can be improved.

[0080] The sealing resin 50 has a plurality of recesses 56 recessed in the third direction y from the third side surface 55. This configuration ensures a longer creepage distance of the sealing resin 50 between any two adjacent leads among the first lead 11, the second lead 12, and the third lead 13. This improves the dielectric strength of the semiconductor device A10.

[0081] The sealing resin 50 has a groove 57 recessed from the bottom surface 52 and dividing the back surfaces 102 of the two die pads 10 as viewed in the first direction z. This configuration ensures a longer creepage distance of the sealing resin 50 between the two die pads 10. This allows for a further improvement in the dielectric strength of the semiconductor device A10. Furthermore, thermal strain in the sealing resin 50 in the second direction x is dispersed. This allows for the concentration of thermal strain on the two first side surfaces 53 of the sealing resin 50 to be alleviated.

[0082] Second Embodiment: A semiconductor device A20 according to a second embodiment of the present disclosure will be described with reference to Figures 17 to 19. In these figures, elements that are the same as or similar to those in the semiconductor device A10 described above are designated by the same reference numerals, and duplicated descriptions will be omitted. Here, Figure 17 corresponds to Figure 7, which shows the semiconductor device A10. Figure 18 corresponds to Figure 14, which shows the semiconductor device A10.

[0083] In the semiconductor device A20, the configuration of the first conductive member 31 is different from that of the semiconductor device A10.

[0084] 17 and 18 , first intermediate portion 313 of first conductive member 31 has first portion 313D and second portion 313E instead of bent portion 313C. As shown in FIG. 19 , first portion 313D includes first surface 313A. Second portion 313E includes second surface 313B and is connected to first portion 313D. Dimension t1 of first portion 313D in the first direction z is larger than dimension t2 of second portion 313E in the first direction z.

[0085] Next, the effects of the semiconductor device A20 will be described.

[0086] The semiconductor device A20 includes a first die pad 10A to which a first semiconductor element 21A is bonded, a first conductive member 31 conductively bonded to the first semiconductor element 21A and the first lead 11, and a pillow member 33 located between the first die pad 10A and the first conductive member 31. The pillow member 33 is in contact with the first die pad 10A and the first conductive member 31. The pillow member 33 has an insulating layer 331. The thermal conductivity of the insulating layer 331 is higher than the thermal conductivity of the layer covering the first conductive member 31. Therefore, with this configuration, the semiconductor device A20 can also improve heat dissipation efficiency while allowing a larger current to flow. Furthermore, by having a configuration common to the semiconductor device A10, the semiconductor device A20 achieves the same effects as the semiconductor device A10.

[0087] In the semiconductor device A20, the first intermediate portion 313 of the first conductive member 31 has a first portion 313D and a second portion 313E instead of the bent portion 313C. As shown in FIG. 19 , the dimension t1 of the first portion 313D in the first direction z is larger than the dimension t2 of the second portion 313E in the first direction z. This configuration shortens the conductive path length of the first conductive member 31 compared to the conductive path length of the first conductive member 31 included in the semiconductor device A10. This reduces the parasitic inductance of the semiconductor device A20. Additionally, heat generated from the first conductive member 31 due to electrical conduction between the first semiconductor element 21A and the first lead 11 can be suppressed.

[0088] Third Embodiment: A semiconductor device A30 according to a third embodiment of the present disclosure will be described with reference to Figures 20 to 22. In these figures, elements that are the same as or similar to those in the semiconductor device A10 described above are designated by the same reference numerals, and duplicated descriptions will be omitted. Here, Figure 20 corresponds to Figure 7, which shows the semiconductor device A10. Figure 21 corresponds to Figure 14, which shows the semiconductor device A10.

[0089] In the semiconductor device A30, the configuration of the first die pad 10A is different from that of the semiconductor device A10.

[0090] 20 and 21 , the first die pad 10A has a bulky portion 104 that protrudes from the main surface 101. As shown in FIG. 22 , the bulky portion 104 has a seating surface 104A that faces the same side as the main surface 101 in the first direction z. The first bonding layer 334 of the pillow member 33 bonds the seating surface 104A to the first metal layer 332 of the pillow member 33. Therefore, the pillow member 33 is in contact with the seating surface 104A. As shown in FIG. 21 , the area of ​​the seating surface 104A is larger than the area of ​​the pillow member 33 when viewed in the first direction z. Therefore, the bulky portion 104 includes a portion that protrudes outward from the pillow member 33 when viewed in the first direction z.

[0091] Next, a semiconductor device A31, which is a modified example of the semiconductor device A30, will be described with reference to Fig. 23. Here, Fig. 23 corresponds to Fig. 22 showing the semiconductor device A30. As shown in Fig. 23, the first conductive member 31 provided in the semiconductor device A31 is similar to the first conductive member 31 provided in the semiconductor device A20.

[0092] Next, the effects of the semiconductor device A30 will be described.

[0093] The semiconductor device A30 includes a first die pad 10A to which a first semiconductor element 21A is bonded, a first conductive member 31 conductively bonded to the first semiconductor element 21A and the first lead 11, and a pillow member 33 located between the first die pad 10A and the first conductive member 31. The pillow member 33 is in contact with the first die pad 10A and the first conductive member 31. The pillow member 33 has an insulating layer 331. The thermal conductivity of the insulating layer 331 is higher than the thermal conductivity of the layer covering the first conductive member 31. Therefore, with this configuration, the semiconductor device A30 can also improve heat dissipation efficiency while allowing a larger current to flow. Furthermore, by having a configuration common to the semiconductor device A10, the semiconductor device A30 achieves the same effects as the semiconductor device A10.

[0094] In the semiconductor device A30, the first die pad 10A has a raised portion 104 protruding from the main surface 101. The pillow member 33 is in contact with the raised portion 104. This configuration allows the dimension of the bent portion 313C of the first intermediate portion 313 of the first conductive member 31 in the first direction z to be reduced, so that the conductive path length of the first conductive member 31 is shorter than the conductive path length of the first conductive member 31 included in the semiconductor device A10. This reduces the parasitic inductance of the semiconductor device A30. Additionally, heat generated from the first conductive member 31 due to electrical conduction between the first semiconductor element 21A and the first lead 11 can be suppressed.

[0095] When the pillow member 33 is conductively bonded to the first semiconductor element 21A and the first lead 11 by reflow, the bulky portion 104 of the first die pad 10A serves as a positioning means for the pillow member 33. Furthermore, the molten first bonding layer 334 comes into contact with the periphery of the seating surface 104A of the bulky portion 104, thereby increasing the surface tension acting on the first bonding layer 334. This causes self-alignment in the first bonding layer 334, making it possible to suppress misalignment of the pillow member 33 with respect to the bulky portion 104.

[0096] When viewed in the first direction z, the bulky portion 104 of the first die pad 10A includes a portion that protrudes outward from the pillow member 33. With this configuration, heat is more easily conducted in the bulky portion 104 in a direction perpendicular to the first direction z. This reduces the thermal resistance at the interface between the bulky portion 104 and the pillow member 33, thereby improving the heat dissipation performance of the pillow member 33.

[0097] Fourth Embodiment: A semiconductor device A40 according to a fourth embodiment of the present disclosure will be described with reference to Figures 24 and 25. In these figures, elements that are the same as or similar to those in the semiconductor device A10 described above are designated by the same reference numerals, and duplicated descriptions will be omitted. Here, Figure 24 corresponds to Figure 7 showing the semiconductor device A10. Figure 25 corresponds to Figure 15 showing the semiconductor device A10.

[0098] In the semiconductor device A40, the configuration of the first conductive member 31 is different from that of the semiconductor device A30 described above.

[0099] 24 and 25 , the first intermediate portion 313 of the first conductive member 31 does not include the second surface 313B, the bent portion 313C, the first portion 313D, or the second portion 313E. The first conductive member 31 is a flat plate including a first surface 313A. The first surface 313A faces the main surface 101 of the first die pad 10A.

[0100] Next, the effects of the semiconductor device A40 will be described.

[0101] The semiconductor device A40 includes a first die pad 10A to which a first semiconductor element 21A is bonded, a first conductive member 31 conductively bonded to the first semiconductor element 21A and the first lead 11, and a pillow member 33 located between the first die pad 10A and the first conductive member 31. The pillow member 33 is in contact with the first die pad 10A and the first conductive member 31. The pillow member 33 has an insulating layer 331. The thermal conductivity of the insulating layer 331 is higher than the thermal conductivity of the layer covering the first conductive member 31. Therefore, with this configuration, the semiconductor device A40 can also improve heat dissipation efficiency while allowing a larger current to flow. Furthermore, by having a configuration common to the semiconductor device A10, the semiconductor device A40 achieves the same effects as the semiconductor device A10.

[0102] In the semiconductor device A40, the first die pad 10A has a raised portion 104 protruding from the main surface 101. The pillow member 33 is in contact with the raised portion 104. The first intermediate portion 313 of the first conductive member 31 is a flat plate including a first surface 313A. By adopting this configuration, the conductive path length of the first conductive member 31 is shorter than the conductive path length of the first conductive member 31 included in the semiconductor device A30. This makes it possible to reduce the parasitic inductance of the semiconductor device A40. In addition, it is possible to suppress heat generated from the first conductive member 31 due to conductivity between the first semiconductor element 21A and the first lead 11.

[0103] The present disclosure is not limited to the above-described embodiment, and the specific configuration of each part of the present disclosure can be freely modified in various ways.

[0104] The present disclosure includes embodiments described in the following appendices. Appendix 1. A semiconductor device comprising: a first die pad; a first semiconductor element bonded to the first die pad; a first lead spaced from the first die pad; a first conductive member conductively bonded to the first semiconductor element and the first lead; a sealing resin covering the first semiconductor element and the first conductive member; and a pillow member located between the first die pad and the first conductive member, the pillow member being in contact with the first die pad and the first conductive member, the pillow member having an insulating layer, and the thermal conductivity of the insulating layer being higher than the thermal conductivity of the sealing resin. Appendix 2. The semiconductor device according to Supplementary Note 1, wherein the pillow member has a first metal layer, a second metal layer, a first bonding layer, and a second bonding layer, the first metal layer being located between the first die pad and the insulating layer, the second metal layer being located between the insulating layer and the first conductive member, the first bonding layer bonding the first die pad and the first metal layer, and the second bonding layer bonding the second metal layer and the first conductive member, and each of the first bonding layer and the second bonding layer contains a metal element. Supplementary Note 3. The semiconductor device according to Supplementary Note 2, wherein the melting points of the first bonding layer and the second bonding layer are lower than the melting points of the first metal layer and the second metal layer, respectively. Supplementary Note 4. The semiconductor device according to Supplementary Note 3, wherein the thickness of each of the first metal layer and the second metal layer is greater than the thickness of the insulating layer. Supplementary Note 5. The semiconductor device according to Supplementary Note 3, wherein the thermal conductivity of each of the first metal layer and the second metal layer is higher than the thermal conductivity of the first conductive member. Supplementary Note 6. The semiconductor device according to Supplementary Note 5, wherein the first metal layer and the second metal layer each contain silver. Supplementary Note 7. The semiconductor device according to any one of Supplementary Notes 1 to 6, wherein the insulating layer includes ceramics.Supplementary Note 8. The semiconductor device according to any one of Supplementary Notes 1 to 7, wherein the first die pad faces a first direction and has a main surface to which the first semiconductor element is bonded, the first conductive member has a first bonding portion conductively bonded to the first semiconductor element, a second bonding portion conductively bonded to the first lead, and an intermediate portion connecting the first bonding portion and the second bonding portion, the intermediate portion having a first surface in contact with the pillow member and a second surface spaced from the first surface and facing the main surface, and the first surface is located between the main surface and the second surface in the first direction. Supplementary Note 9. The semiconductor device according to Supplementary Note 8, wherein the intermediate portion has a bent portion bent from the second surface toward the main surface, and the bent portion includes the first surface. Supplementary Note 10. The semiconductor device according to Supplementary Note 8, wherein the intermediate portion has a first portion including the first surface and a second portion including the second surface and connected to the first portion, and a dimension of the first portion in the first direction is larger than a dimension of the second portion in the first direction. Supplementary Note 11. The semiconductor device according to any of Supplementary Notes 8 to 10, wherein the pillow member is in contact with the main surface. Supplementary Note 12. The semiconductor device according to any of Supplementary Notes 8 to 11, wherein the first die pad has a raised portion protruding from the main surface, and the pillow member is in contact with the raised portion. Supplementary Note 13. The semiconductor device according to any one of appendices 8 to 12, wherein, as viewed in the first direction, the intermediate portion has a first edge, a second edge, and a connecting edge, the first edge extending in a direction perpendicular to the first direction, the second edge extending in a direction perpendicular to the first direction and different from the direction in which the first edge extends, the connecting edge smoothly connecting the first edge and the second edge, as viewed in the first direction, the connecting edge is spaced apart from an intersection of an extension line of the first edge and an extension line of the second edge.Appendix 14. The semiconductor device according to any one of appendices 8 to 13, wherein the first die pad has a back surface facing opposite to the main surface in the first direction, the first semiconductor element is conductively bonded to the main surface, and the back surface is exposed from the sealing resin.Appendix 15. The semiconductor device according to Appendix 14, further comprising: a second die pad; a second semiconductor element conductively bonded to the second die pad; and a second conductive member conductively bonded to the second semiconductor element and the first die pad, wherein the second semiconductor element and the second conductive member are covered with the sealing resin, and the second die pad is exposed from the sealing resin. Appendix 16. The semiconductor device according to Appendix 15, wherein the first die pad is provided with a first seat recessed from the main surface, and a portion of the second conductive member is housed in the first seat. Appendix 17. The semiconductor device according to Appendix 15 or 16, further comprising: a second lead connected to the first die pad; and a third lead connected to the second die pad, wherein the third lead is located on the opposite side of the first lead from the second lead, and portions of each of the first lead, the second lead, and the third lead protrude to the outside from the sealing resin.

[0105] A10, A20, A30, A40: semiconductor device 10: die pad 10A: first die pad 10B: second die pad 101: main surface 102: back surface 103: first seat 104: bulk portion 104A: seat surface 11: first lead 111: mounting portion 112: covering portion 113: second seat 12: second lead 121: mounting portion 122: covering portion 13: third lead 131: mounting portion 132: covering portion 14: fourth lead 14A: first gate terminal 14B: second gate terminal 141: mounting portion 142: covering portion 15: fifth lead 15A: first detection terminal 15B: second detection terminal 151: mounting portion 152: covering portion 21: semiconductor element 21A: first semiconductor element 21B: Second semiconductor element 211: First electrode 212: Second electrode 213: Gate electrode 214: Detection electrode 29: Conductive bonding layer 31: First conductive member 311: First bonding portion 312: Second bonding portion 313: First intermediate portion 313A: First surface 313B: Second surface 313C: Bent portion 313D: First portion 313E: Second portion 314: First chamfered portion 314A: First edge 314B: Second edge 314C: First connecting edge 32: Second conductive member 321: Third bonding portion 322: Fourth bonding portion 323: Second intermediate portion 324: Second chamfered portion 324A: Third edge 324B: Fourth edge 324C: Second connecting edge 33: Pad member 331: Insulating layer 332: First metal layer 333: Second metal layer 334: First bonding layer 335: Second bonding layer 34: First conductive bonding layer 35: Second conductive bonding layer 36: Third conductive bonding layer 37: Fourth conductive bonding layer 41: First wire 42: Second wire 43: First relay wire 44: Second relay wire 50: Sealing resin 51: Top surface 52: Bottom surface 53: First side surface 54: Second side surface 55: Third side surface 56: Recess 57: Groove z: First direction x: Second direction y: Third direction

Claims

1. A first die pad; a first semiconductor element bonded to the first die pad; a first lead spaced from the first die pad; a first conductive member conductively connected to the first semiconductor element and the first lead; a sealing resin that covers the first semiconductor element and the first conductive member; a pillow member located between the first die pad and the first conductive member, the pillow member is in contact with the first die pad and the first conductive member, The pillow member has an insulating layer, The insulating layer has a thermal conductivity higher than that of the sealing resin.

2. The pillow member has a first metal layer, a second metal layer, a first bonding layer and a second bonding layer, the first metal layer is located between the first die pad and the insulating layer; the second metal layer is located between the insulating layer and the first conductive member, the first bonding layer bonds the first die pad and the first metal layer; the second bonding layer bonds the second metal layer and the first conductive member, The semiconductor device according to claim 1 , wherein each of the first bonding layer and the second bonding layer contains a metal element.

3. The semiconductor device according to claim 2 , wherein the melting point of each of the first and second bonding layers is lower than the melting point of each of the first and second metal layers.

4. The semiconductor device according to claim 3 , wherein the first metal layer and the second metal layer each have a thickness greater than a thickness of the insulating layer.

5. The semiconductor device according to claim 3 , wherein the first metal layer and the second metal layer each have a thermal conductivity higher than a thermal conductivity of the first conductive member.

6. The semiconductor device according to claim 5 , wherein each of the first metal layer and the second metal layer contains silver.

7. The semiconductor device according to claim 1 , wherein the insulating layer includes a ceramic.

8. the first die pad has a main surface facing a first direction and to which the first semiconductor element is bonded; the first conductive member has a first joint portion conductively joined to the first semiconductor element, a second joint portion conductively joined to the first lead, and an intermediate portion connecting the first joint portion and the second joint portion, The intermediate portion has a first surface in contact with the pillow member and a second surface separated from the first surface and facing the main surface, 8. The semiconductor device according to claim 1, wherein the first surface is located between the main surface and the second surface in the first direction.

9. the intermediate portion has a bent portion bent from the second surface toward the main surface, The semiconductor device according to claim 8 , wherein the bent portion includes the first surface.

10. the intermediate portion has a first portion including the first surface and a second portion including the second surface and connected to the first portion, The semiconductor device according to claim 8 , wherein a dimension of said first portion in said first direction is larger than a dimension of said second portion in said first direction.

11. The semiconductor device according to claim 8 , wherein the pad member is in contact with the main surface.

12. the first die pad has a raised portion protruding from the main surface, The semiconductor device according to claim 8 , wherein the pillow member is in contact with the bulky portion.

13. When viewed in the first direction, the intermediate portion has a first edge, a second edge, and a connecting edge, The first edge extends in a direction perpendicular to the first direction, The second edge extends in a direction perpendicular to the first direction and different from a direction in which the first edge extends, The connecting edge smoothly connects the first edge and the second edge, The semiconductor device according to claim 8 , wherein the connecting edge is spaced apart from an intersection between an extension line of the first edge and an extension line of the second edge when viewed in the first direction.

14. the first die pad has a back surface facing a side opposite to the main surface in the first direction, the first semiconductor element is conductively bonded to the main surface; The semiconductor device according to claim 8 , wherein the back surface is exposed from the sealing resin.

15. A second die pad; a second semiconductor element conductively bonded to the second die pad; a second conductive member conductively connected to the second semiconductor element and the first die pad, the second semiconductor element and the second conductive member are covered with the sealing resin, The semiconductor device according to claim 14 , wherein the second die pad is exposed from the sealing resin.

16. the first die pad is provided with a first seat recessed from the main surface, The semiconductor device according to claim 15 , wherein a portion of the second conductive member is accommodated in the first seat portion.

17. a second lead connected to the first die pad; a third lead connected to the second die pad; the third lead is located on an opposite side of the first lead to the second lead, 16. The semiconductor device according to claim 15, wherein a portion of each of the first lead, the second lead and the third lead protrudes to the outside from the sealing resin.