Resist pattern inspection method, resist pattern manufacturing method, substrate selection method, and manufacturing method for semiconductor package substrate or printed circuit board

Abstract

This resist pattern inspection method comprises an appearance inspection step for inspecting the appearance of a resist pattern on the basis of light emitted from a substrate whereon the resist pattern is formed. This resist pattern manufacturing method comprises: a resist pattern formation step for forming a resist pattern on a substrate; and a light-emitting material adhering step for adhering a light-emitting material to a surface of a conductor of the substrate. This substrate selection method comprises: the appearance inspection step for inspecting the appearance of the resist pattern on the basis of the light emitted from the substrate whereon the resist pattern is formed; and an evaluation step for evaluating the resist pattern on the basis of the appearance inspection in the appearance inspection step. This manufacturing method for a semiconductor package substrate or a printed circuit board comprises a conductor pattern formation step for forming a conductor pattern by etching or plating the substrate, the resist pattern of the substrate having been evaluated in the substrate selection method as meeting a standard.

Description

Resist pattern inspection method, resist pattern manufacturing method, substrate selection method, and semiconductor package substrate or printed wiring board manufacturing method

[0001] The present disclosure relates to a resist pattern inspection method, a resist pattern manufacturing method, a substrate selection method, and a semiconductor package substrate or printed wiring board manufacturing method.

[0002] When manufacturing a semiconductor package substrate or a printed wiring board, a photosensitive layer is first laminated onto a substrate. Next, actinic rays are irradiated through a photomask onto predetermined portions of the photosensitive layer to harden the exposed portions. Next, the support is peeled off, and the unexposed portions of the photosensitive layer are removed with a developer to form a resist pattern on the substrate. Next, using the formed resist pattern as a mask, the substrate on which the resist pattern is formed is subjected to an etching process or plating process to form a conductor pattern on the substrate, and finally, the hardened portions of the photosensitive layer (resist pattern) are peeled off and removed from the substrate.

[0003] In such a manufacturing process for a semiconductor package substrate or a printed wiring board, if a foreign substance or the like adhering to the photomask or the photosensitive layer interferes with exposure to actinic rays, defects may occur in the resist pattern, and defects such as disconnections or short circuits may occur in the conductor pattern. Therefore, conventionally, defects such as disconnections or short circuits in the conductor pattern have been inspected by visual inspection of the conductor pattern.

[0004] Japanese Patent Application Laid-Open No. 2005-207802

[0005] By visually inspecting a resist pattern before forming a conductor pattern, defects can be found at an earlier stage in the manufacture of a semiconductor package substrate or a printed wiring board. Furthermore, evaluating the yield of resist pattern formation can lead to improvements in resist pattern formation. Visual inspection of resist patterns has traditionally been performed using a scanning electron microscope (hereinafter also referred to as "SEM") (see, for example, Patent Document 1).

[0006] However, SEM inspection is difficult at 1 mm ２Therefore, inspecting the resist pattern of the entire semiconductor package substrate or printed wiring board using an SEM takes an enormous amount of time. Moreover, there is a large variation in inspection accuracy depending on the inspector and the SEM used for the inspection.

[0007] Therefore, an object of the present disclosure is to provide a resist pattern inspection method, a resist pattern manufacturing method, a substrate selection method, and a semiconductor package substrate or printed wiring board manufacturing method that can evaluate a resist pattern with high accuracy in a short time.

[0008] [1] The resist pattern inspection method of the present disclosure includes an appearance inspection step of inspecting the appearance of the resist pattern based on light emitted from a substrate on which the resist pattern is formed.

[0009] This resist pattern inspection method visually inspects the resist pattern based on light emitted from the substrate on which the resist pattern is formed, and therefore can detect defects in the resist pattern with high accuracy and in a short time compared to visual inspection using an SEM.

[0010] [2] In the resist pattern inspection method according to [1], the appearance inspection step may include detecting a contour of the resist pattern based on light emitted from the substrate, and visually inspecting the resist pattern based on the detected contour. In this resist pattern inspection method, the resist pattern can be appropriately visually inspected by utilizing the contour of the resist pattern detected based on light emitted from the substrate.

[0011] [3] In the resist pattern inspection method according to [2], the visual inspection step may compare the detected contour with pattern data for forming the resist pattern. In this resist pattern inspection method, by comparing the detected contour with the pattern data for forming the resist pattern as the visual inspection of the resist pattern, defects in the resist pattern can be detected with high accuracy.

[0012] [4] In the resist pattern inspection method according to [2], the appearance inspection step may include measuring the line width of the resist pattern based on the detected contour. In this resist pattern inspection method, the appearance inspection of the resist pattern includes measuring the line width of the resist pattern based on the detected contour, thereby enabling evaluation of the formation state of the resist pattern.

[0013] [5] The resist pattern inspection method according to any one of [1] to [4] may further include a resist pattern forming step of forming a resist pattern on a substrate, and a light-emitting material applying step of applying a light-emitting material to the conductor surface of the substrate. In this resist pattern inspection method, applying the light-emitting material to the conductor surface of the substrate increases the intensity of light emitted from the conductor surface of the substrate, thereby increasing the contrast between light emitted from regions of the conductor surface of the substrate where the resist pattern is not formed and light emitted from regions of the conductor surface of the substrate where the resist pattern is formed. This improves the accuracy of detecting the contour of the resist pattern based on the light emitted from the substrate.

[0014] [6] In the resist pattern inspection method according to [5], the resist pattern formation step may form a resist pattern having a thickness of 0.05 μm or more and 500 μm or less. In this resist pattern inspection method, by forming a resist pattern having a thickness of 0.05 μm or more and 500 μm or less, it is possible to prevent the resist pattern from becoming too thick, while increasing the contrast between light emitted from regions of the conductor surface of the substrate where the resist pattern is not formed and light emitted from regions of the conductor surface of the substrate where the resist pattern is formed. This improves the accuracy of detecting the contour of the resist pattern based on the light emitted from the substrate.

[0015] [7] A method for producing a resist pattern according to the present disclosure includes a resist pattern forming step of forming a resist pattern on a substrate, and a light emitting material depositing step of depositing a light emitting material onto a conductor surface of the substrate.

[0016] In this resist pattern manufacturing method, by attaching a light-emitting material to the conductor surface of the substrate, the intensity of light emitted from the conductor surface of the substrate is increased, thereby increasing the contrast between light emitted from areas of the conductor surface of the substrate where the resist pattern is not formed and light emitted from areas of the conductor surface of the substrate where the resist pattern is formed. This allows for improved detection accuracy, for example, when detecting the contour of a resist pattern based on light emitted from the substrate on which the resist pattern is formed. Furthermore, when measuring the line width of the resist pattern, it becomes easier to focus on the surface or contour of the resist pattern.

[0017] [8] In the resist pattern manufacturing method according to [7], the resist pattern forming step may form a resist pattern having a thickness of 0.05 μm or more and 500 μm or less. In this resist pattern manufacturing method, by forming a resist pattern having a thickness of 0.05 μm or more and 500 μm or less, it is possible to prevent the resist pattern from becoming too thick, while increasing the contrast between light emitted from regions of the conductor surface of the substrate where the resist pattern is not formed and light emitted from regions of the conductor surface of the substrate where the resist pattern is formed. This makes it possible to improve, for example, the accuracy of detecting the contour of the resist pattern based on light emitted from the substrate.

[0018] [9] The substrate selection method according to the present disclosure includes an appearance inspection step of visually inspecting the resist pattern based on light emitted from the substrate on which the resist pattern is formed, and an evaluation step of evaluating the resist pattern based on the appearance inspection in the appearance inspection step.

[0019] In this substrate selection method, the resist pattern is evaluated by visual inspection of the resist pattern based on light emitted from the substrate, and therefore substrates can be selected with high accuracy in a short time compared to visual inspection using an SEM.

[0020]

[10] In the substrate selection method according to [9], the evaluation step may include evaluating the resist pattern based on the number or shape of defects in the resist pattern. In this substrate selection method, the resist pattern is evaluated based on the number or shape of defects in the resist pattern, thereby enabling appropriate evaluation of the substrate.

[0021]

[11] In the substrate selection method according to [9] or

[10] , a luminescent material may be attached to the conductor surface of the substrate to be visually inspected in the visual inspection step. In this substrate selection method, since the luminescent material is attached to the conductor surface of the substrate to be visually inspected in the visual inspection step, the contrast between the light emitted from the region of the conductor surface of the substrate where the resist pattern is not formed and the light emitted from the region of the conductor surface of the substrate where the resist pattern is formed is increased. This allows the visual inspection of the resist pattern to be performed with high accuracy.

[0022]

[12] A method for manufacturing a semiconductor package substrate or a printed wiring board according to the present disclosure includes a conductor pattern forming step of etching or plating a substrate whose resist pattern evaluation in the substrate selection method according to any one of [9] to

[11] satisfies a standard to form a conductor pattern.

[0023] In this method of manufacturing a semiconductor package substrate or a printed wiring board, a substrate whose resist pattern evaluation in the above-mentioned substrate selection method satisfies the criteria is subjected to an etching process or plating process to form a conductor pattern, thereby suppressing the occurrence of defects such as breaks or shorts in the conductor pattern.

[0024] According to the present disclosure, a resist pattern can be evaluated with high accuracy in a short time.

[0025] Fig. 1(a) is a schematic perspective view illustrating a photosensitive layer forming step in the resist pattern forming step, Fig. 1(b) is a schematic perspective view illustrating an exposure step in the resist pattern forming step, and Fig. 1(c) is a schematic perspective view illustrating a development step in the resist pattern forming step. Figs. 2(a), 2(b), and 2(c) are schematic perspective views illustrating the formation of a conductive pattern based on a defective resist pattern. Fig. 3 is a schematic perspective view illustrating an appearance inspection step. Fig. 4 is a schematic view illustrating light emission from a substrate. Fig. 5 is a schematic view illustrating pattern data. Figs. 6(a), 6(b), and 6(c) are schematic perspective views illustrating the formation of a conductive pattern.

[0026] Hereinafter, embodiments of the resist pattern inspection method, resist pattern manufacturing method, substrate selection method, and semiconductor package substrate or printed wiring board manufacturing method of the present disclosure will be described with reference to the drawings. Note that the same or corresponding parts will be assigned the same reference numerals throughout the drawings. Furthermore, "A or B" may include either A or B, or may include both.

[0027] [Method for Inspecting Resist Pattern] The method for inspecting a resist pattern according to an embodiment includes an appearance inspection step of visually inspecting the resist pattern based on light emitted from a substrate on which the resist pattern is formed. The method for inspecting a resist pattern may include a resist pattern formation step of forming a resist pattern on a substrate before the appearance inspection step. The method for inspecting a resist pattern may also include a light-emitting material attachment step of attaching a light-emitting material to a conductor surface of the substrate. The method for inspecting a resist pattern may also include other steps. In this specification, the term "step" includes not only an independent step, but also a step that cannot be clearly distinguished from other steps, as long as the intended effect of the step is achieved. A resist pattern can also be referred to as a photocured product pattern of a photosensitive resin composition or a relief pattern.

[0028] 1, the resist pattern forming process includes a photosensitive layer forming process (see FIG. 1(a)) of laminating a photosensitive layer on a substrate, an exposure process (see FIG. 1(b)) of irradiating predetermined portions of the photosensitive layer with actinic rays to form photocured portions, and a development process (see FIG. 1(c)) of removing regions of the photosensitive layer other than the predetermined portions from the substrate. The resist pattern forming process may include other processes as necessary.

[0029] 1(a), in the photosensitive layer forming step, a photosensitive layer 2 and a support 3 are formed on a substrate 1. The substrate 1 includes, for example, an insulating layer 1a and a conductor layer 1b formed on the insulating layer 1a. The photosensitive layer 2 is formed on the conductor layer 1b of the substrate 1. The conductor layer 1b is, for example, electroless copper plating.

[0030] The photosensitive layer 2 is a layer formed using a photosensitive resin composition whose properties change when irradiated with light (e.g., photocured). The photosensitive resin composition forming the photosensitive layer 2 contains, for example, a binder polymer, a photopolymerizable compound, and a photopolymerization initiator. The photosensitive resin composition forming the photosensitive layer 2 may contain, as necessary, a photosensitizer, a polymerization inhibitor, or other components. The photosensitive resin composition forming the photosensitive layer 2 may contain additives such as dyes such as malachite green, Victoria Pure Blue, brilliant green, and methyl violet; photocoloring agents such as tribromophenyl sulfone, leuco crystal violet, diphenylamine, benzylamine, triphenylamine, diethylaniline, and o-chloroaniline; thermal color-developing inhibitors; plasticizers such as p-toluenesulfonamide; pigments; fillers; antifoaming agents; flame retardants; adhesion promoters; leveling agents; release promoters; antioxidants; fragrances; imaging agents; and thermal crosslinking agents.

[0031] The support 3 may be a polymer film (support film) having heat resistance and solvent resistance, such as polyester such as polyethylene terephthalate (PET), or polyolefin such as polypropylene or polyethylene.

[0032] One method for forming the photosensitive layer 2 and the support 3 on the substrate 1 is to use a photosensitive element (not shown), for example. The photosensitive element includes, for example, a support, a photosensitive layer, and a protective layer, in this order. After removing the protective layer, the photosensitive layer of the photosensitive element is pressed onto the substrate 1 while being heated, thereby forming the photosensitive layer 2 and the support 3 on the substrate 1. This results in a laminate 4 including, in this order, the substrate 1, the photosensitive layer 2, the support 3, and a support film (not shown). Note that an intermediate layer or the like may be disposed between the support 3 and the photosensitive layer 2.

[0033] 1(b), in the exposure step, the photosensitive layer 2 is exposed to actinic rays through the support 3. As a result, the exposed portions irradiated with actinic rays are photocured to form photocured portions 2a (latent images). As the exposure method, a known exposure method can be applied, and examples thereof include a method of irradiating actinic rays in an imagewise manner through a photomask 5 called artwork (mask exposure method), an LDI (laser direct imaging) exposure method, and a method of irradiating actinic rays projected from an image of a photomask through a lens in an imagewise manner (projection exposure method).

[0034] (Developing Step) As shown in Fig. 1(c), in the developing step, the uncured portions 2b of the photosensitive layer 2 are removed from the substrate 1. By the developing step, a resist pattern 6 consisting of photocured portions 2a of the photosensitive layer 2 is formed on the substrate 1. Furthermore, on the surface of the conductor layer 1b of the substrate 1, there are formed a region 1c where the resist pattern 6 is not formed, and a region 1d where the resist pattern 6 is formed on the conductor surface of the substrate 1. The region 1c is also a region on the surface of the conductor layer 1b that is not covered with the resist pattern 6. The region 1d is also a region on the surface of the conductor layer 1b that is covered with the resist pattern 6.

[0035] The thickness of the resist pattern 6 formed on the substrate 1 may be, for example, 0.05 μm or more, 0.1 μm or more, 1 μm or more, or 5 μm or more. The thickness of the resist pattern 6 formed on the substrate 1 may be, for example, 500 μm or less, 300 μm or less, 100 μm or less, or 60 μm or less. These minimum and maximum thickness values ​​of the resist pattern 6 can be appropriately combined. For example, the thickness of the resist pattern 6 formed on the substrate 1 may be 0.05 μm or more and 500 μm or less, 0.1 μm or more and 300 μm or less, 1 μm or more and 100 μm or less, or 5 μm or more and 60 μm or less. The thickness of the resist pattern 6 is the height relative to the substrate 1 in a direction perpendicular to the main surface of the substrate 1.

[0036] The resist pattern 6 formed on the substrate 1 has, for example, light-emitting properties. Light emission is also called luminescence (cold light), and refers to the emission of light by, for example, absorbing excitation light when irradiated with excitation light such as inspection light. Furthermore, light emission refers to the light emitted in this manner. Examples of light emission include fluorescence and phosphorescence. Fluorescence is light emission that stops immediately when irradiation with excitation light is stopped. Phosphorescence is light emission that continues even after irradiation with light such as inspection light is stopped. Having light-emitting properties means having such light-emitting properties, that is, having the property of emitting light by, for example, absorbing excitation light when irradiated with excitation light. Note that the resist pattern 6 does not have to have light-emitting properties.

[0037] <Light-Emitting Material Adhesion Process> In the light-emitting material adhesion process, a light-emitting material is adhered to the conductor surface of the substrate 1 to increase the luminescence intensity of the substrate 1. The conductor surface of the substrate 1 is, for example, the surface of the conductor layer 1b opposite the insulating layer 1a, that is, the surface of the conductor layer 1b on which the resist pattern 6 is formed. Therefore, in the light-emitting material adhesion process, a light-emitting material is adhered to the surface of the conductor layer 1b of the substrate 1. The light-emitting material is a material that emits light when irradiated with excitation light. If the light-emitting material is a fluorescent material, this emission is fluorescence. If the light-emitting material is a phosphorescent material, this emission is phosphorescence. As the light-emitting material (fluorescent material or phosphorescent material), for example, a light-emitting dye (fluorescent dye or phosphorescent dye) that emits light when irradiated with excitation light may be used. As the light-emitting dye, for example, a xanthene dye, a coumarin dye, a pyrazoline dye, a dipyrromethene dipromethene dye, an anthracene dye, a pyrene dye, a perylene dye, a lophine dye (also called a lophine or a lophine compound), etc. may be used. The luminescent material may be, for example, a fluorescent dye solution containing a luminescent dye. The luminescent material application step may be performed at any timing, for example, before the resist pattern formation step, during the resist pattern formation step, or after the resist pattern formation step.

[0038] In the light-emitting material deposition step, the substrate 1 can be immersed in a fluorescent dye solution serving as the light-emitting material. Examples of fluorescent dye solutions include saturated solutions of xanthene dyes, coumarin dyes, pyrazoline dyes, dipyrromethene dipromethene dyes, anthracene dyes, pyrene dyes, perylene dyes, and lophine dyes, as well as mixtures thereof. The dyes may contain, for example, imidazole, pyridine, oxazole, pyrazole, thiazole, triazine, triazole, benzotriazole, 5-carboxybenzotriazole, tetrazole, 5-aminotetrazole, thiol, thiophene, or benzoxazolylthiophene as a substituent. These substituents may be used alone or in combination. For example, a saturated aqueous solution of rhodamine B (Fujifilm Wako Pure Chemical Industries, Ltd.), a xanthene dye, can be used. Examples of solvents include water, methanol, ethanol, acetone, methyl ethyl ketone, methyl cellosolve, ethyl cellosolve, toluene, N,N-dimethylformamide, propylene glycol monomethyl ether, and mixed solvents thereof. In this case, the entire substrate 1 may be immersed in the fluorescent dye solution, or a portion of the substrate 1 may be immersed in the fluorescent dye solution so that the entire substrate 1 is immersed in the fluorescent dye solution. Alternatively, for example, the fluorescent dye solution may be dropped onto the substrate 1 on which the resist pattern 6 has been formed. In this case, the fluorescent dye solution may be dropped onto the entire substrate 1, or onto a portion of the substrate 1 on which the resist pattern 6 has been formed so that the fluorescent dye solution is dropped onto the entire substrate 1. Furthermore, for example, in the development step of the resist pattern formation process, a luminescent material may be added to the developer and rinse used to remove the uncured portion 2b of the photosensitive layer 2 from the substrate 1. After the fluorescent dye is attached to the conductor surface of the substrate 1, the fluorescent dye solution is removed from areas of the substrate 1 other than the conductor surface. As a method for removing the fluorescent dye solution, for example, after the fluorescent dye has been attached to the conductor surface of the substrate 1, the surface may be thoroughly washed with water and then air-dried.

[0039] Before immersing the substrate 1 in a fluorescent dye solution serving as a luminescent material, the conductor surface of the substrate 1 may be treated with a rust inhibitor. That is, before the luminescent material application step, a rust inhibitor application step may be performed in which a rust inhibitor is applied to the conductor surface of the substrate 1. Examples of rust inhibitors include imidazole, imidazole derivatives, pyridine, pyridine derivatives, oxazole, oxazole derivatives, pyrazole, pyrazole derivatives, thiazole, thiazole derivatives, triazine, triazine derivatives, triazole, triazole derivatives, benzotriazole, benzotriazole derivatives, 5-carboxybenzotriazole, 5-carboxybenzotriazole derivatives, tetrazole, tetrazole derivatives, 5-aminotetrazole, 5-aminotetrazole derivatives, thiol, thiol derivatives, thiophene, thiophene derivatives, benzoxazolylthiophene, and benzoxazolylthiophene derivatives. The rust inhibitor may be diluted with a solvent. These rust inhibitors may be used alone or in combination of two or more. Examples of solvents include water, methanol, ethanol, acetone, methyl ethyl ketone, methyl cellosolve, ethyl cellosolve, toluene, N,N-dimethylformamide, propylene glycol monomethyl ether, and mixed solvents thereof. In this case, the entire substrate 1 may be immersed in the rust inhibitor, or a portion of the substrate 1 may be immersed in the rust inhibitor so that the entire substrate 1 is immersed in the rust inhibitor. Furthermore, for example, the rust inhibitor may be dripped onto the substrate 1 on which the resist pattern 6 is formed. In this case, the rust inhibitor may be dripped onto the entire substrate 1, or onto a portion of the substrate 1 on which the resist pattern 6 is formed so that the rust inhibitor is dripped onto the entire substrate 1. Furthermore, for example, in the development step of the resist pattern formation process, the rust inhibitor may be added to the developer and rinse used to remove the uncured portion 2b of the photosensitive layer 2 from the substrate 1. After the rust inhibitor is applied to the conductor surface of the substrate 1, the rust inhibitor is removed from areas other than the substrate 1. As a method for removing the rust inhibitor, for example, after the rust inhibitor has been applied to the conductor surface of the substrate 1, the surface may be thoroughly washed with water and then air-dried.

[0040] The luminescent material and the rust inhibitor may be mixed, and the treatment of the conductor surface of the substrate 1 with the rust inhibitor and the treatment of the conductor surface of the substrate 1 with the luminescent material may be carried out simultaneously. That is, the luminescent material attachment step and the rust inhibitor attachment step may be carried out together. Only one of the treatment of the conductor surface of the substrate 1 with the rust inhibitor or the treatment of the conductor surface of the substrate 1 with the luminescent material may be carried out.

[0041] <Visual Inspection Step> In the visual inspection step, the resist pattern 6 is visually inspected based on light emitted (fluorescence or phosphorescence) from the substrate 1 on which the resist pattern 6 is formed. That is, in the visual inspection step, the resist pattern 6 is visually inspected based on light emitted from the substrate 1.

[0042] In the above-described exposure step, if exposure to actinic rays is hindered by foreign matter 7 (see FIG. 1 ) adhering to the photomask 5, support 3, or photosensitive layer 2, defects 8 may occur in the resist pattern 6. More specifically, as shown in FIGS. 2( a), 2(b), and 2(c), in the manufacture of a semiconductor package substrate or a printed wiring board, a substrate 1 on which a resist pattern 6 has been formed is subjected to an etching or plating process to form a conductor pattern 9. Therefore, if defects 8 exist in the resist pattern 6, defects such as breaks or shorts may occur in the conductor pattern 9 formed by the etching or plating process. Furthermore, in the exposure step, depending on the exposure state of the actinic rays, the line width of the resist pattern 6 may become thicker or thinner.

[0043] Therefore, in the appearance inspection process, in order to find defects before forming the conductor pattern, the resist pattern 6 is visually inspected. In the appearance inspection process, for example, the outline of the resist pattern 6 is detected based on light emitted from the substrate 1, and the resist pattern 6 is visually inspected based on the detected outline.

[0044] As shown in FIG. 3 , first, inspection light as excitation light is emitted to the substrate 1 on which the resist pattern 6 is formed, and light emitted from the substrate 1 is received. That is, light emitted from the substrate 1 is received. The wavelength of the inspection light may be, for example, 390 nm or less, 380 nm or less, or 370 nm or less. The wavelength of the inspection light may also be, for example, 190 nm or more, 250 nm or more, or 300 nm or more. The minimum and maximum values ​​of these wavelengths may be appropriately combined. For example, the wavelength of the inspection light may be 190 nm or more and 390 nm or less, 250 nm or more and 380 nm or less, or 300 nm or more and 370 nm or less. The light source for the inspection light may be a carbon arc lamp, a mercury vapor arc lamp, a high-pressure mercury lamp, an ultra-high-pressure mercury lamp, a xenon lamp, a gas laser such as an argon laser, a solid-state laser such as a YAG laser, a semiconductor laser, an excitation light source such as an LED, or the like. An optical filter may be used to select only light of the above wavelengths of the inspection light. The wavelength range for detecting the emitted light can be changed arbitrarily, and may be, for example, visible light of 400 nm to 800 nm. The wavelength range for detecting the emitted light may be blue light of 400 nm to 500 nm, green light of 500 nm to 600 nm, or red light of 600 nm to 800 nm, and one wavelength range may be used alone or two or more wavelength ranges may be used in combination. The light receiving area of ​​the substrate 1 that receives the emitted light in the appearance inspection process may be, for example, 1 cm ２ More than 2500cm ２ Below, 5cm ２ More than 1200cm ２ Below, 25cm ２ More than 600cm ２ The following may also be used.

[0045] 3 and 4, the contour 10 of the resist pattern 6 is identified based on the contrast between light emitted from a region 1c on the conductor surface of the substrate 1 where the resist pattern 6 is not formed and light emitted from a region 1d on the conductor surface of the substrate 1 where the resist pattern 6 is formed. For example, in a received light image of the emitted light, a boundary where the contrast in brightness, chromaticity, or the like increases is detected. Then, this detected boundary is identified as the contour 10 of the resist pattern 6. To detect the contour 10 of the resist pattern 6 based on the light emitted from the substrate 1, an automatic optical appearance inspection device such as AOI Orbotech Ultra Dimension 800 (trade name, manufactured by Orbotech Japan Co., Ltd.) is used.

[0046] Examples of visual inspections of the resist pattern 6 include an inspection to check for the presence or absence of defects 8 in the resist pattern 6, an inspection to check the shape, position, size, etc. (hereinafter also referred to as "shape, etc.") of defects 8 in the resist pattern 6, an inspection to check the shape of the resist pattern 6, or an inspection to measure the line width of the resist pattern 6.

[0047] 4 and 5, in an inspection to check for the presence or absence of defects 8 in the resist pattern 6, a contour 10 of the resist pattern 6 detected based on light emitted from the substrate 1 is compared with pattern data 11 for forming the resist pattern 6 in the resist pattern forming process. For example, CAD data of the resist pattern 6 is used as the pattern data 11. Then, portions 10a where the detected contour 10 differs from the pattern data 11 are detected as defects 8 in the resist pattern 6. Then, the number of detected defects 8 is calculated.

[0048] 4 and 5, in an inspection for examining the shape and the like of a defect 8 in a resist pattern 6, a contour 10 of the resist pattern 6 detected based on light emitted from the substrate 1 is compared with pattern data 11 for forming the resist pattern 6 in the resist pattern forming process. Then, a portion 10a where the detected contour 10 differs from the pattern data 11 is detected as a defect 8 in the resist pattern 6. Then, the shape and the like of the detected defect 8 are examined based on the contour of the detected defect 8.

[0049] 4 and 5, in the inspection for examining the shape of the resist pattern 6, a contour 10 of the resist pattern 6 detected based on light emitted from the substrate 1 is compared with pattern data 11 for forming the resist pattern 6 in the resist pattern forming process. Then, the degree of difference between the shape of the resist pattern 6 and the pattern data 11 is examined.

[0050] In an inspection for measuring the line width of the resist pattern 6, for example, the line width of the resist pattern 6 is measured by measuring the interval between contours 10 of the resist pattern 6 detected based on light emitted from the substrate 1.

[0051] [Method for Manufacturing Resist Pattern] The method for manufacturing a resist pattern according to the embodiment includes a resist pattern forming step of forming a resist pattern 6 on a substrate 1, and a luminescent material adhering step of adhering a luminescent material onto the conductor surface of the substrate 1. The resist pattern forming step of the method for manufacturing a resist pattern may be, for example, the same as the resist pattern forming step of the above-described method for inspecting a resist pattern. Furthermore, the luminescent material adhering step of the method for manufacturing a resist pattern may be, for example, the same as the luminescent material adhering step of the above-described method for inspecting a resist pattern. The method for manufacturing a resist pattern may include other steps.

[0052] [Substrate Selection Method] The substrate selection method according to this embodiment includes an appearance inspection step of visually inspecting the resist pattern 6 based on light emitted from the substrate 1 on which the resist pattern 6 is formed, and an evaluation step of evaluating the resist pattern 6 based on the appearance inspection in the appearance inspection step. The appearance inspection step of the substrate selection method may be, for example, the same as the appearance inspection step of the resist pattern inspection method described above. For example, a luminescent material may be attached to the conductor surface of the substrate to be visually inspected in the appearance inspection step of the substrate selection method. The substrate selection method may include other steps.

[0053] <Evaluation Step> In the evaluation step, the resist pattern 6 is evaluated according to a predetermined standard.

[0054] For example, when a visual inspection is performed in the visual inspection step to check for the presence or absence of defects 8 in the resist pattern 6, the evaluation step evaluates the resist pattern 6 based on the number of defects 8 in the resist pattern 6. For example, in the evaluation step, if the number of defects 8 in the resist pattern 6 is below a predetermined reference number, the resist pattern 6 is evaluated as good, and if the number of defects 8 in the resist pattern 6 is above the predetermined reference number, the resist pattern 6 is evaluated as bad.

[0055] Furthermore, for example, when an inspection is performed in the appearance inspection step to examine the shape, etc., of the defect 8 in the resist pattern 6, the evaluation step evaluates the resist pattern 6 based on the size of the defect 8 in the resist pattern 6. For example, in the evaluation step, if the shape, etc. of the defect 8 in the resist pattern 6 is within a predetermined tolerance range, the resist pattern 6 is evaluated as good, and if the shape of the defect 8 in the resist pattern 6 is outside the predetermined tolerance range, the resist pattern 6 is evaluated as bad.

[0056] Furthermore, for example, when an inspection is performed in the appearance inspection process to check the shape of the resist pattern 6, the evaluation process evaluates the resist pattern 6 based on the shape of the resist pattern 6. For example, in the evaluation process, if the degree of difference in the shape of the resist pattern 6 from the pattern data 11 is within a predetermined tolerance range, it is determined to be good, and if the degree of difference in the shape of the resist pattern 6 from the pattern data 11 is outside the predetermined tolerance range, it is determined to be bad.

[0057] Furthermore, for example, when a visual inspection is performed in the visual inspection step to measure the line width of the resist pattern 6, the evaluation step evaluates the resist pattern 6 based on the line width of the resist pattern 6. For example, in the evaluation step, if the line width of the resist pattern 6 is within a predetermined reference range, the resist pattern 6 is evaluated as good, and if the line width of the resist pattern 6 is outside the predetermined reference range, the resist pattern 6 is evaluated as bad.

[0058] [Method for Manufacturing a Semiconductor Package Substrate or a Printed Wiring Board] The method for manufacturing a semiconductor package substrate or a printed wiring board according to this embodiment includes a conductor pattern formation step of etching or plating a substrate whose resist pattern evaluation in the above-described substrate selection method satisfies the criteria to form a conductor pattern. In other words, in the conductor pattern formation step, a substrate whose resist pattern evaluation in the substrate selection method does not satisfy the criteria is not etched or plated to form a conductor pattern. The method for manufacturing a semiconductor package substrate or a printed wiring board according to this embodiment may include other steps, such as a resist pattern removal step, as necessary. The method for manufacturing a semiconductor package substrate or a printed wiring board is a method for manufacturing a semiconductor package substrate or a printed wiring board, and is a method for manufacturing a semiconductor package substrate or a printed wiring board. A semiconductor package substrate or a printed wiring board is manufactured by this manufacturing method.

[0059] In the etching process, the resist pattern formed on the substrate having the conductor layer is used as a mask to etch away the conductor layer of the substrate that is not covered with the resist. After the etching process, the resist is removed by removing the resist pattern 6, thereby forming the conductor pattern.

[0060] As shown in Fig. 6(a), in the plating process, copper, solder, or the like is plated onto the conductor layer 1b of the substrate 1 that is not covered with the resist, using a resist pattern 6 formed on the substrate 1 with the conductor layer 1b as a mask. After the plating process, the resist is removed by removing the resist pattern 6 as shown in Fig. 6(b), and the conductor layer 1b that was covered with the resist is etched as shown in Fig. 6(c), forming the conductor pattern 9. The plating method may be electrolytic plating or electroless plating, but electrolytic plating is particularly preferred.

[0061] As described above, in the resist pattern inspection method according to this embodiment, the resist pattern 6 is visually inspected based on light emitted from the substrate 1 on which the resist pattern 6 is formed, and therefore defects 8 in the resist pattern 6 can be detected with high accuracy in a short time compared to visual inspection using an SEM.

[0062] Furthermore, in this resist pattern inspection method, the resist pattern 6 can be visually inspected appropriately by utilizing the contour 10 of the resist pattern 6, which is detected based on light emitted from the substrate 1 on which the resist pattern 6 is formed.

[0063] Furthermore, in this resist pattern inspection method, defects 8 in the resist pattern 6 can be detected with high accuracy by comparing the detected contour 10 with pattern data 11 for forming the resist pattern 6 as an appearance inspection of the resist pattern 6.

[0064] Furthermore, in this resist pattern inspection method, the state of formation of the resist pattern 6 can be evaluated by measuring the line width of the resist pattern 6 based on the detected contour 10 as an appearance inspection of the resist pattern 6.

[0065] Furthermore, in this resist pattern inspection method, the intensity of light emitted from the conductor surface of the substrate is increased by attaching a light-emitting material to the conductor surface of the substrate 1, thereby increasing the contrast between light emitted from region 1c on the conductor surface of the substrate 1 where the resist pattern 6 is not formed and light emitted from region 1d on the conductor surface of the substrate 1 where the resist pattern 6 is formed. This makes it possible to improve the accuracy of detecting the outline 10 of the resist pattern 6 based on the light emitted from the substrate 1.

[0066] Incidentally, the thinner the resist pattern 6, the darker the light emitted from the resist pattern 6 tends to be. Therefore, the thinner the resist pattern 6, the greater the contrast between the light emitted from the region 1c on the conductor surface of the substrate 1 where the resist pattern 6 is not formed and the light emitted from the region 1d on the conductor surface of the substrate 1 where the resist pattern 6 is formed. From the viewpoint of increasing the contrast between the light emitted from the region 1c on the conductor surface of the substrate 1 where the resist pattern 6 is not formed and the light emitted from the region 1d on the conductor surface of the substrate 1 where the resist pattern 6 is formed, the thickness of the resist pattern 6 formed on the substrate 1 may be, for example, 500 μm or less, 300 μm or less, 100 μm or less, or 60 μm or less. Furthermore, the thickness of the resist pattern 6 formed on the substrate 1 may be, for example, 0.05 μm or more, 0.1 μm or more, 1 μm or more, or 5 μm or more. These minimum and maximum thickness values ​​of the resist pattern 6 can be appropriately combined. For example, the thickness of the resist pattern 6 formed on the substrate 1 may be 0.05 μm to 500 μm, 0.1 μm to 300 μm, 1 μm to 100 μm, or 5 μm to 60 μm.

[0067] In this resist pattern inspection method, by forming the resist pattern 6 to a thickness of 0.05 μm to 500 μm, 0.1 μm to 300 μm, 1 μm to 100 μm, or 5 μm to 60 μm, it is possible to prevent the resist pattern 6 from becoming too thick, while increasing the contrast between the light emitted from the region 1c on the conductor surface of the substrate 1 where the resist pattern 6 is not formed and the light emitted from the region 1d on the conductor surface of the substrate 1 where the resist pattern 6 is formed. This makes it possible to improve the accuracy of detecting the outline 10 of the resist pattern 6 based on the light emitted from the substrate 1.

[0068] In the resist pattern manufacturing method according to this embodiment, by attaching a light-emitting material to the conductor surface of the substrate 1, the contrast between light emitted from an area 1c on the conductor surface of the substrate 1 where the resist pattern 6 is not formed and light emitted from an area 1d on the conductor surface of the substrate 1 where the resist pattern 6 is formed is increased. Therefore, for example, when detecting the outline 10 of the resist pattern 6 based on the light emitted from the substrate 1 on which the resist pattern 6 is formed, the detection accuracy can be improved. Furthermore, when measuring the line width of the resist pattern 6, it becomes easier to focus on the surface of the resist pattern 6 or the outline of the resist pattern 6.

[0069] Furthermore, in this resist pattern manufacturing method, by forming the resist pattern 6 with a thickness of 0.05 μm to 500 μm, 0.1 μm to 300 μm, 1 μm to 100 μm, or 5 μm to 60 μm, it is possible to prevent the resist pattern 6 from becoming too thick, while increasing the contrast between light emitted from a region 1c on the conductor surface of the substrate 1 where the resist pattern 6 is not formed and light emitted from a region 1d on the conductor surface of the substrate 1 where the resist pattern 6 is formed. Therefore, for example, it is possible to improve the accuracy of detecting the outline 10 of the resist pattern 6 based on the light emitted from the substrate 1.

[0070] In the substrate selection method according to this embodiment, the resist pattern 6 is evaluated by visual inspection of the resist pattern 6 based on the light emitted from the substrate 1, and therefore the substrate 1 can be selected with high accuracy in a short time compared to visual inspection using an SEM.

[0071] Furthermore, in this substrate selection method, the substrate 1 can be evaluated appropriately by evaluating the substrate 1 based on the number or shape of defects in the resist pattern 6.

[0072] Furthermore, in this substrate selection method, since a luminescent material is attached to the conductor surface of the substrate 1 to be visually inspected in the visual inspection step, there is a large contrast between the light emitted from the region 1c on the conductor surface of the substrate 1 where the resist pattern 6 is not formed and the light emitted from the region 1d on the conductor surface of the substrate 1 where the resist pattern is formed. This allows the visual inspection of the resist pattern 6 to be performed with high precision.

[0073] In the manufacturing method for a semiconductor package substrate or a printed wiring board according to this embodiment, a substrate 1 whose resist pattern 6 satisfies the evaluation criteria in the substrate selection method described above is subjected to an etching process or plating process to form a conductor pattern 9, thereby suppressing the occurrence of defects such as breaks or short circuits in the conductor pattern 9.

[0074] The present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the spirit of the present invention.

[0075] Next, examples of the present disclosure will be described, but the present disclosure is not limited to the following examples.

[0076] 1. Photosensitive elements and substrates The photosensitive elements and substrates shown in Table 1 and below were used in Examples 1 to 5 and Comparative Example 1. The last two digits of the number in the product name of the photosensitive element indicate the film thickness (unit: μm) of the photosensitive layer. (Photosensitive elements) F-1: A photosensitive element produced by using ME-3606SG (product name, manufactured by Showa Denko Materials Co., Ltd.) with 0.5 times the amount of photopolymerization initiator and 0.3 times the amount of sensitizer. F-2: A photosensitive element produced by using RY-5115 (product name, manufactured by Showa Denko Materials Co., Ltd.) with MKG (Malachite Green) omitted and with 0.5 times the amount of photopolymerization initiator and 0.3 times the amount of sensitizer. F-3: A photosensitive element produced by using RY-5125 (product name, manufactured by Showa Denko Materials Co., Ltd.; photosensitive layer composition is the same as (F-2)) with MKG (Malachite Green) omitted and with 0.5 times the amount of photopolymerization initiator and 0.3 times the amount of sensitizer. F-4: FL-7225 (product name, manufactured by Showa Denko Materials Co., Ltd.) (Substrate) S-1: Cu-sputtered PET film (manufactured by Geomatec Co., Ltd., thickness: 125 μm, Ra<50 nm) S-2: GL-102 (manufactured by Ajinomoto Fine-Techno Co., Ltd., trade name, Ra: approximately 100 nm) S-3: MCL-E67 (manufactured by Showa Denko Materials Co., Ltd., trade name, Ra: approximately 300 nm)

[0077] 2. Preparation of Laminates In Examples 1, 3-4, and Comparative Example 1, S-1, which had been stored under moisture-proof conditions, was used as a substrate having a copper layer as a conductive layer. In Examples 2 and 5, the substrate having a copper layer as a conductive layer was pickled, washed with water, and dried with an air flow, and then heated to 80°C. Substrates S-1, S-2, and S-3 were then immersed in a saturated aqueous solution of 1H-benzotriazole-5-carboxylic acid (FUJIFILM Wako Pure Chemical Industries, Ltd.) at 23°C for 60 minutes, washed with water, dried with an air flow, and then further immersed in a saturated aqueous solution of rhodamine B (FUJIFILM Wako Pure Chemical Industries, Ltd.) at 23°C for 10 minutes, thereby attaching a fluorescent dye to the copper surface of substrates S-1, S-2, and S-3. After washing with water and drying with an air flow, the substrate was heated to 80°C. In Examples 1 to 5 and Comparative Example 1, a photosensitive element was then laminated (laminated) onto the surface of the copper layer of the substrate. The lamination was performed using a heat roll at 110°C under a pressure of 0.4 MPa and a roll speed of 1.0 m / min, with the photosensitive layer of the photosensitive element in contact with the surface of the copper layer of the substrate while peeling off the protective layer of the photosensitive element. In this way, laminates of Examples 1 to 5 and Comparative Example 1, in which the substrate, photosensitive layer, and support were laminated in this order, were obtained. The obtained laminates were used as test pieces for the tests described below.

[0078] 3. Preparation of Patterned Substrates [Examples 1 to 4 and Comparative Example 1] Using a glass chrome type photomask (for resolution evaluation or pattern inspection), the photosensitive layer was exposed to a predetermined amount of light using a projection exposure apparatus (manufactured by Ushio Inc., product name "UX-2240SM") with an ultra-high pressure mercury lamp (365 nm) as a light source (exposure treatment). The photomask used for resolution evaluation had a wiring pattern with a line width / space width of x / x (x: 1 to 30, unit: μm), and the photomask used for pattern inspection had a wiring pattern with a line width / space width of x / x (x: 20, 30, 40, unit: μm) (pattern area: 90 mm × 90 mm).

[0079] After exposure, the support was peeled off to expose the photosensitive layer, and a 1% by mass aqueous sodium carbonate solution at 30°C was sprayed on the photosensitive layer for twice the shortest development time (the shortest time required to remove the unexposed portions) to remove the unexposed portions (development treatment). The substrate exposed using the resolution evaluation photomask and developed is referred to as a resolution evaluation pattern substrate, and the substrate exposed using the pattern inspection photomask and developed is referred to as an inspection pattern substrate. The resolution of the resolution evaluation pattern substrate was evaluated based on the smallest line width / space width value among the resist patterns formed without the space portions (unexposed portions) being cleanly removed and the line portions (exposed portions) being free of distortion, meandering, or chipping. When a resist pattern was formed using a resolution evaluation photomask that produced a wiring pattern with a line width / space width of 30 μm / 30 μm, the exposure dose resulting in a line width of 30.0 μm was defined as the predetermined energy amount.

[0080] [Example 5] The photosensitive layer was exposed to light with a predetermined energy amount using a direct imaging exposure device (manufactured by Orbotech Japan Co., Ltd., product name "Nuvogo Fine 8") that uses a semiconductor laser (375 nm and 405 nm crosstalk, wavelength ratio can be changed as desired (375 nm:405 nm = 0:100 to 100:0)) as a light source. After exposure, development was carried out in the same manner as in Examples 1 to 4 and Comparative Example 1 to prepare patterned substrates for resolution evaluation and patterned substrates for inspection.

[0081] 4. Visual Inspection of Resist Patterns In Examples 1 to 5, the visual inspection of the resist patterns was performed using an AOI Orbotech Ultra Dimension 800 (trade name, manufactured by Orbotech Japan Co., Ltd.) by irradiating the inspection pattern substrate with UV light to cause the copper surfaces of the substrates S-1, S-2, and S-3 to fluoresce, thereby detecting defects in the resist patterns. In Comparative Example 1, the visual inspection of the resist patterns was performed using an SEM SU-1500 (trade name, manufactured by Hitachi High-Technologies Corporation). The acceleration voltage was 15 kV and the current value was 80 μA. The visual inspection time was evaluated for Examples 1 to 5 and Comparative Example 1, and the pattern detection rate of defects in the resist patterns was also evaluated as inspection accuracy for Examples 1 to 5. The pattern detection rate (inspection accuracy) refers to the probability that the inspection device was able to identify the contour of the resist pattern and recognize the pattern when performing the visual inspection. That is, before the visual inspection, an appropriate gray level (threshold value for light and dark binarization) was set using the inspection device according to each of Examples 1 to 5, and if this setting was completed, it was judged as OK, and if this setting was not completed and an error occurred, it was judged as NG. In evaluating the pattern detection rate of defects in the resist pattern, if it was OK every time, it was judged as A, if it was not OK every time but the probability of it being NG was low, it was judged as B, and if the probability of it being NG was high, it was judged as C. In evaluating the time for the visual inspection, it was judged as 10 minutes / cm ２ A is less than 10 min / cm ２ More than 5000 minutes / 100cm ２ Less than B: 5000 min / 100 cm ２ The above was designated as C.

[0082]

[0083] 5. Evaluation As shown in Table 1, in Examples 1 to 5, the inspection time was significantly reduced compared to Comparative Example 1. From these results, it was confirmed that by visually inspecting the resist pattern based on the fluorescence from the substrate on which the resist pattern is formed, defects in the resist pattern can be detected in a shorter time than in visual inspection using an SEM.

[0084] Furthermore, the pattern detection rate was high in Examples 1 to 5. These results confirmed that in the visual inspection of a resist pattern performed based on the fluorescence from a substrate on which a resist pattern is formed, the contour of the resist pattern is easy to detect and the inspection accuracy is high.

[0085] 1...substrate, 1a...insulating layer, 1b...conductor layer, 1c...region on the conductor surface of the substrate where the resist pattern is not formed, 1d...region on the conductor surface of the substrate where the resist pattern is formed, 2...photosensitive layer, 2a...photocured portion, 2b...uncured portion, 3...support, 4...laminated body, 5...photomask, 6...resist pattern, 7...foreign matter, 8...defect, 9...conductor pattern, 10...contour, 11...pattern data

Claims

1. a visual inspection step of visually inspecting the resist pattern based on light emitted from a substrate on which the resist pattern is formed; A method for inspecting a resist pattern.

2. In the appearance inspection step, a contour of the resist pattern is detected based on light emitted from the substrate, and the resist pattern is appearance inspected based on the detected contour.

2. The method for inspecting a resist pattern according to claim 1.

3. In the appearance inspection step, the detected contour is compared with pattern data for forming the resist pattern.

3. The method for inspecting a resist pattern according to claim 2.

4. In the appearance inspection step, a line width of the resist pattern is measured based on the detected contour.

3. The method for inspecting a resist pattern according to claim 2.

5. a resist pattern forming step of forming the resist pattern on the substrate; and a luminescent material deposition step of depositing a luminescent material on the conductor surface of the substrate.

3. The method for inspecting a resist pattern according to claim 1 or 2.

6. In the resist pattern forming step, the resist pattern is formed to a thickness of 0.05 μm or more and 500 μm or less.

6. The method for inspecting a resist pattern according to claim 5.

7. a resist pattern forming step of forming a resist pattern on a substrate; and a luminescent material deposition step of depositing a luminescent material on the conductor surface of the substrate. A method for producing a resist pattern.

8. In the resist pattern forming step, the resist pattern is formed to a thickness of 0.05 μm or more and 500 μm or less. The method for producing a resist pattern according to claim 7 .

9. an appearance inspection step of inspecting the appearance of the resist pattern based on light emitted from a substrate on which the resist pattern is formed; and an evaluation step of evaluating the resist pattern based on the appearance inspection in the appearance inspection step. Board selection method.

10. In the evaluation step, the resist pattern is evaluated based on the number of defects in the resist pattern. The substrate selection method according to claim 9 .

11. A light-emitting material is attached to the conductor surface of the substrate to be visually inspected in the visual inspection step. The substrate selection method according to claim 9 or 10.

12. a conductive pattern forming step of forming a conductive pattern by etching or plating the substrate in which the evaluation of the resist pattern in the substrate selection method according to claim 9 or 10 satisfies a criterion. A method for manufacturing a semiconductor package substrate or a printed wiring board.