Joining structure and semiconductor device

JPWO2024075514A5Pending Publication Date: 2025-06-19
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Patent Information

Application Number
JP2024555701
Authority / Receiving Office
JP · JP
Patent Type
Applications
Priority Date
2023-09-19
Filing Date
2023-09-19
Publication Date
2025-06-19

AI Technical Summary

Technical Problem

Conventional semiconductor devices face challenges in efficiently conducting heat, which affects their performance and reliability, particularly in high-power applications where thermal management is crucial.

Method used

A bonded structure is introduced, featuring a first bonding object with a first bonding layer and a second bonding object with a second bonding layer, both bonded via an intermediate material with a base layer and surface layers. The base layer is primarily composed of copper, and the surface layers are made of silver, utilizing solid-phase bonding to enhance thermal conductivity.

Benefits of technology

This configuration enables improved heat conduction and thermal management in semiconductor devices, allowing for more efficient heat transfer and dissipation, thereby enhancing their performance and reliability.

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Abstract

This joining structure comprises a first joining target that has a first joining layer, a second joining target that has a second joining layer, and an intermediate joining material that is between the first joining target and the second joining target. The intermediate joining material has a base material layer and a first surface layer and second surface layer that are disposed on either side of the base material layer. The first joining layer and the first surface layer are joined by solid phase bonding. The second joining layer and the second surface layer are joined by solid phase bonding. The main component of the base material layer is Cu.
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Description

Bonded structure and semiconductor device

[0001] The present disclosure relates to a bonded structure and a semiconductor device.

[0002] Conventionally, semiconductor devices including power switching elements such as MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) or IGBTs (Insulated Gate Bipolar Transistors) have been known. Such semiconductor devices are mounted in a variety of electronic devices, from industrial equipment to home appliances, information terminals, and automotive equipment. Patent Document 1 discloses a conventional semiconductor device (power module). The power module described in Patent Document 1 includes multiple transistors, a main substrate, a signal substrate, and signal terminals. The multiple transistors are mounted on the main substrate.

[0003] JP 2015-126342 A

[0004] A power module such as that disclosed in Patent Document 1 employs a joining structure for joining two objects to be joined. It is preferable that the joining structure achieves a reliable joining while also being able to easily conduct heat.

[0005] An object of the present disclosure is to provide a bonded structure that is improved over conventional structures, and further, a semiconductor device including such a bonded structure. In particular, in view of the above-mentioned circumstances, an object of the present disclosure is to provide a bonded structure (and further, a semiconductor device) that is more easily heat-transferable.

[0006] A first aspect of the present disclosure provides a bonded structure comprising a first object to be bonded having a first bonding layer, a second object to be bonded having a second bonding layer, and an intermediate bonding material interposed between the first object to be bonded and the second object to be bonded. The intermediate bonding material has a base layer and a first surface layer and a second surface layer disposed on either side of the base layer. The first bonding layer and the first surface layer are bonded by solid-state bonding. The second bonding layer and the second surface layer are bonded by solid-state bonding. The base layer is primarily composed of Cu.

[0007] According to the above configuration, it is possible to provide a joint structure that is more likely to conduct heat, and further to provide a semiconductor device including such a joint structure.

[0008] FIG. 1 is a perspective view showing a semiconductor device according to a first embodiment of the present disclosure. FIG. 2 is a partial perspective view showing a semiconductor device according to the first embodiment of the present disclosure. FIG. 3 is a partial perspective view showing a semiconductor device according to the first embodiment of the present disclosure. FIG. 4 is a plan view showing a semiconductor device according to the first embodiment of the present disclosure. FIG. 5 is a partial plan view showing a semiconductor device according to the first embodiment of the present disclosure. FIG. 6 is a partial right side view showing a semiconductor device according to the first embodiment of the present disclosure. FIG. 7 is a partial left side view showing a semiconductor device according to the first embodiment of the present disclosure. FIG. 8 is a partial plan view showing a semiconductor device according to the first embodiment of the present disclosure. FIG. 9 is a right side view showing a semiconductor device according to the first embodiment of the present disclosure. FIG. 10 is a bottom view showing a semiconductor device according to the first embodiment of the present disclosure. FIG. 11 is a cross-sectional view taken along line XI-XI in FIG. 5. FIG. 12 is a cross-sectional view taken along line XII-XII in FIG. 5. FIG. 13 is a partial enlarged cross-sectional view of a portion of FIG. 12. FIG. 14 is a partial enlarged cross-sectional view showing an example of a mounting structure according to the first embodiment of the present disclosure. FIG. 15 is a partially enlarged cross-sectional view showing another example of the mounting structure according to the first embodiment of the present disclosure. FIG. 16 is a partially enlarged cross-sectional view enlarging a portion of FIG. 12 . FIG. 17 is a partially enlarged cross-sectional view showing another example of the mounting structure according to the first embodiment of the present disclosure. FIG. 18 is a partially enlarged cross-sectional view showing another example of the mounting structure according to the first embodiment of the present disclosure. FIG. 19 is a cross-sectional view taken along line XIX-XIX in FIG. 5 . FIG. 20 is a cross-sectional view taken along line XX-XX in FIG. 5 . FIG. 21 is a cross-sectional view taken along line XXI-XXI in FIG. 5 . FIG. 22 is a cross-sectional view taken along line XXII-XXII in FIG. 5 . FIG. 23 is a partial right side view showing a first modified example of the semiconductor device according to the first embodiment of the present disclosure. FIG. 24 is a partially enlarged cross-sectional view showing another example of the mounting structure according to the first embodiment of the present disclosure. FIG. 25 is a partially enlarged cross-sectional view showing a mounting structure according to a second embodiment of the present disclosure.

[0009] Preferred embodiments of the semiconductor device of the present disclosure will be described below with reference to the drawings. Hereinafter, identical or similar components will be designated by the same reference numerals, and redundant explanations will be omitted. Terms such as "first," "second," and "third" in this disclosure are used merely for identification purposes and are not intended to necessarily assign any rank to the objects.

[0010] In this disclosure, unless otherwise specified, "a certain object A is formed on a certain object B" and "a certain object A is formed on (an) object B" include "a certain object A is formed directly on a certain object B" and "a certain object A is formed on a certain object B with another object interposed between the certain object A and the certain object B." Similarly, "a certain object A is disposed on a certain object B" and "a certain object A is disposed on (an) object B" include "a certain object A is disposed directly on a certain object B" and "a certain object A is disposed on (an) object B with another object interposed between the certain object A and the certain object B" unless otherwise specified. Similarly, "a certain object A is located on (an) object B" includes "a certain object A is in contact with a certain object B and is located on (an) object B" and "a certain object A is located on (an) object B with another object interposed between the certain object A and the certain object B." Furthermore, unless otherwise specified, the phrase "when viewed from a certain direction, an object A overlaps an object B" includes "an object A overlaps the entire object B" and "an object A overlaps a part of an object B."

[0011] 1 to 22 show a semiconductor device A1 according to one embodiment of the present disclosure. The semiconductor device A1 includes a plurality of semiconductor elements 1, a support conductor 2, a support substrate 3, a plurality of power terminals 41 to 43, a plurality of control terminals 44, a signal substrate 5, an adhesive layer 6, a first conductive member 71, a second conductive member 72, a plurality of wires 73 to 76, a resin member 8, and a resin filling portion 88. The semiconductor device A1 also includes joining structures B1 to B4.

[0012] The supporting conductor 2 includes a first conductive portion 2A and a second conductive portion 2B. The plurality of control terminals 44 include a plurality of first control terminals 45 and a plurality of second control terminals 46. The signal substrate 5 includes a first signal substrate 5A and a second signal substrate 5B. The adhesive layer 6 includes a first adhesive body 6A and a second adhesive body 6B.

[0013] For convenience of explanation, the three mutually orthogonal directions are referred to as the x-direction, y-direction, and z-direction. As an example, the z-direction is the thickness direction of the semiconductor device A1. The x-direction is the left-right direction in the plan view of the semiconductor device A1 (see FIG. 4). The y-direction is the up-down direction in the plan view of the semiconductor device A1 (see FIG. 4). In the following explanation, "plan view" refers to the view in the z-direction. Note that terms such as "upper," "lower," "upper side," "lower side," "top surface," and "bottom surface" indicate the relative positional relationship of each component, etc. in the z-direction, and do not necessarily define the relationship with the direction of gravity. The x-direction is an example of a "first direction" in the present disclosure.

[0014] Multiple semiconductor elements 1: Each of the multiple semiconductor elements 1 is an electronic component that functions as the core of the semiconductor device A1. The constituent material of each of the multiple semiconductor elements 1 is a semiconductor material primarily composed of, for example, SiC (silicon carbide). This semiconductor material is not limited to SiC and may be Si (silicon), GaN (gallium nitride), or C (diamond). Each semiconductor element 1 is, for example, a power semiconductor chip with switching function, such as a MOSFET (metal oxide semiconductor field effect transistor). In this embodiment, each semiconductor element 1 is a MOSFET, but is not limited thereto and may be other transistors such as an IGBT (insulated gate bipolar transistor). Each semiconductor element 1 is the same element. Each semiconductor element 1 is, for example, an n-channel MOSFET, but may also be a p-channel MOSFET.

[0015] The multiple semiconductor elements 1 include multiple first switching elements 1A and multiple second switching elements 1B. As shown in FIG. 8 , the semiconductor device A1 includes four first switching elements 1A and four second switching elements 1B, but the number of first switching elements 1A and the number of second switching elements 1B are not limited to this configuration. The number of first switching elements 1A and the number of second switching elements 1B can be changed as appropriate depending on the performance required of the semiconductor device A1. The number of first switching elements 1A and the number of second switching elements 1B may be equal to or different from each other. The number of first switching elements 1A and the number of second switching elements 1B is determined by the current capacity handled by the semiconductor device A1.

[0016] The semiconductor device A1 is configured as, for example, a half-bridge switching circuit. In this case, a plurality of first switching elements 1A form an upper arm circuit of the semiconductor device A1, and a plurality of second switching elements 1B form a lower arm circuit of the semiconductor device A1. In the upper arm circuit, the plurality of first switching elements 1A are connected in parallel with each other, and in the lower arm circuit, the plurality of second switching elements 1B are connected in parallel with each other. Furthermore, each first switching element 1A and each second switching element 1B are connected in series.

[0017] 13 and 16, each of the semiconductor elements 1 (the first switching elements 1A and the second switching elements 1B) has a main surface 10a and a back surface 10b. In each semiconductor element 1, the main surface 10a and the back surface 10b are spaced apart in the z direction. The main surface 10a faces the z2 side, and the back surface 10b faces the z1 side.

[0018] As shown in Figures 8, 12, 13, and 21, each of the multiple first switching elements 1A is mounted on a support conductor 2 (first conductive portion 2A). In the example shown in Figure 8, the multiple first switching elements 1A are arranged, for example, in the y direction and spaced apart from one another. Each of the multiple first switching elements 1A is conductively joined to the support conductor 2 (first conductive portion 2A) via an intermediate bonding material 19a. When each first switching element 1A is joined to the first conductive portion 2A, the element back surface 10b faces the support conductor 2 (first conductive portion 2A).

[0019] As shown in FIGS. 8 , 12 , 16 , and 20 , the multiple second switching elements 1B are mounted on a support conductor 2 (second conductive portion 2B). In the example shown in FIG. 8 , the multiple second switching elements 1B are arranged, for example, in the y direction and spaced apart from one another. Each of the multiple second switching elements 1B is conductively joined to the support conductor 2 (second conductive portion 2B) via an intermediate bonding material 19b. When each second switching element 1B is joined to the second conductive portion 2B, the element back surface 10b faces the support conductor 2 (second conductive portion 2B). As can be seen from FIG. 8 , the multiple first switching elements 1A and the multiple second switching elements 1B overlap when viewed in the x direction. However, the multiple first switching elements 1A and the multiple second switching elements 1B do not necessarily have to overlap when viewed in the x direction.

[0020] As shown in FIGS. 8 , 13 , and 16 , each of the semiconductor elements 1 (the first switching elements 1A and the second switching elements 1B) includes a first principal surface electrode 11, a second principal surface electrode 12, a third principal surface electrode 13, and a back surface electrode 15. The configurations of the first principal surface electrode 11, the second principal surface electrode 12, the third principal surface electrode 13, and the back surface electrode 15, which will be described below, are common to all of the semiconductor elements 1. The first principal surface electrode 11, the second principal surface electrode 12, and the third principal surface electrode 13 are provided on the element's main surface 10 a. The first principal surface electrode 11, the second principal surface electrode 12, and the third principal surface electrode 13 are insulated by an insulating film (not shown). The back surface electrode 15 is provided on the element's back surface 10 b. The back surface electrode 15 covers the entire area (or substantially the entire area) of the element's back surface 10 b. The back surface electrode 15 is formed, for example, by Ag (silver) plating.

[0021] In an example in which each semiconductor element 1 is configured as a MOSFET, the first principal surface electrode 11 is, for example, a gate electrode to which a drive signal (e.g., gate voltage) for driving each semiconductor element 1 is input. The second principal surface electrode 12 is, for example, a source electrode through which a source current flows. The third principal surface electrode 13 is, for example, a source sense electrode, and is at the same potential as the second principal surface electrode 12. The third principal surface electrode 13 passes the same source current as the second principal surface electrode 12. The back surface electrode 15 is, for example, a drain electrode through which a drain current flows.

[0022] When a drive signal (gate voltage) is input to the first principal surface electrode 11 (gate electrode), each semiconductor element 1 switches between a conductive state and a cutoff state in response to the drive signal. This switching between the conductive state and the cutoff state is called a switching operation. In the conductive state, a forward current flows from the back surface electrode 15 (drain electrode) to the second principal surface electrode 12 (source electrode), and in the cutoff state, this forward current does not flow. The semiconductor device A1 converts a first power supply voltage (e.g., a DC voltage) into a second power supply voltage (e.g., an AC voltage) using the function of each semiconductor element 1. The first power supply voltage is input (applied) between a power terminal 41 and two power terminals 42, and the second power supply voltage is input (applied) to two power terminals 43.

[0023] 5 and 8, the semiconductor device A1 includes two thermistors 17. Each thermistor 17 is used as a sensor for detecting temperature.

[0024] Support conductor 2: The support conductor 2 supports the multiple semiconductor elements 1 (the multiple first switching elements 1A and the multiple second switching elements 1B). The support conductor 2 is bonded onto the support substrate 3. The support conductor 2 has, for example, a rectangular shape in a plan view. Together with the first conductive member 71 and the second conductive member 72, the support conductor 2 constitutes a path for the main circuit current switched by the multiple first switching elements 1A and the multiple second switching elements 1B.

[0025] The support conductor 2 includes a first conductive portion 2A and a second conductive portion 2B. As shown in FIGS. 14 and 15 , the first conductive portion 2A has a main body layer 20A, a bonding layer 21A, and a bonding layer 22A. As shown in FIGS. 17 and 18 , the second conductive portion 2B has a main body layer 20B, a bonding layer 21B, and a bonding layer 22B. The main body layer 20A and the main body layer 20B are each a plate-shaped member made of metal. This metal is Cu (copper) or a Cu alloy. Specific configurations of the bonding layer 21A, the bonding layer 22A, the bonding layer 21B, and the bonding layer 22B will be described later. The first conductive portion 2A and the second conductive portion 2B, together with a plurality of power terminals 41 to 43, form conduction paths to a plurality of first switching elements 1A and a plurality of second switching elements 1B. The first conductive portion 2A and the second conductive portion 2B each have, for example, a rectangular shape in a plan view. The first conductive portion 2A and the second conductive portion 2B each have, for example, a dimension in the x direction of 15 mm to 25 mm, a dimension in the y direction of 30 mm to 40 mm, and a dimension in the z direction of 1.0 mm to 5.0 mm (preferably about 2.0 mm). These dimensions of the first conductive portion 2A and the second conductive portion 2B are not limited to the above-mentioned numerical examples and can be changed as appropriate depending on the specifications of the semiconductor device A1.

[0026] As shown in FIGS. 11 to 22 , the first conductive portion 2A is bonded to the support substrate 3 via an intermediate bonding material 29a, and the second conductive portion 2B is bonded to the support substrate 3 via an intermediate bonding material 29b. A plurality of first switching elements 1A are bonded to the first conductive portion 2A via intermediate bonding materials 19a. A plurality of second switching elements 1B are bonded to the second conductive portion 2B via intermediate bonding materials 19b. The first conductive portion 2A and the second conductive portion 2B are spaced apart in the x-direction as shown in FIGS. 3 , 8 , 11 , 12 , and 19 . In the examples shown in these figures, the first conductive portion 2A is located closer to the x1 side than the second conductive portion 2B. The first conductive portion 2A and the second conductive portion 2B overlap when viewed in the x-direction.

[0027] The supporting conductor 2 (each of the first conductive portion 2A and the second conductive portion 2B) has a main surface 201 and a back surface 202. The main surface 201 and the back surface 202 are spaced apart in the z direction, as shown in FIGS. 11 to 22 . The main surface 201 faces the z2 side, and the back surface 202 faces the z1 side. The back surface 202 faces the supporting substrate 3.

[0028] 14, the semiconductor device A1 has a joint structure B11. The joint structure B11 is a structure in which a first switching element 1A as a first object to be joined and a first conductive portion 2A as a second object to be joined are joined via an intermediate joining material 19a.

[0029] The intermediate bonding material 19a has a base layer 190a, a first surface layer 191a, and a second surface layer 192a.

[0030] The base layer 190a is primarily composed of copper (Cu). Examples of base layer 190a primarily composed of copper include a configuration consisting solely of copper (Cu), a configuration in which copper is mixed with an additive metal, and various copper alloys. The same applies to configurations in the following description in which "a certain member is primarily composed of a certain metal." The thickness of base layer 190a is not limited in any way, and in this embodiment, base layer 190a is thicker than first surface layer 191a and second surface layer 192a. The thickness of base layer 190a is, for example, 50 μm or more and 300 μm or less.

[0031] The first surface layer 191a is disposed on the z2 side of the base layer 190a in the z direction. The first surface layer 191a is solid-state bonded to the first switching element 1A. Solid-state bonding is a bonding technique achieved by applying a predetermined pressure and temperature to two layers primarily composed of the same metal in direct contact with each other, and includes, for example, solid-state diffusion bonding and solid-state deformation bonding. In this embodiment, the first surface layer 191a is primarily composed of Ag (silver). The thickness of the first surface layer 191a is not limited in any way, and in this embodiment, the first surface layer 191a is thinner than the base layer 190a. The thickness of the first surface layer 191a is, for example, 0.1 μm or more and 15 μm or less.

[0032] In this embodiment, the first switching element 1A further includes a bonding layer 151. The bonding layer 151 corresponds to the first bonding layer in the bonded structure B11. The bonding layer 151 is disposed on the z1 side of the back electrode 15 in the z direction. The bonding layer 151 is solid-state bonded to the first surface layer 191a. In this embodiment, the bonding layer 151 is mainly composed of Ag (silver). There are no particular limitations on the thickness of the bonding layer 151, and it is, for example, 0.01 μm or more and 5 μm or less.

[0033] The metal that is the main component of the first surface layer 191a and the bonding layer 151 is not particularly limited as long as they are configured to be solid-state bonded to each other.

[0034] The boundary between the first surface layer 191a and the bonding layer 151, which are solid-state bonded to each other, is less clear than the boundary between the base material layer 190a and the first surface layer 191a, which is the boundary between dissimilar metals. Generally, the boundary between the first surface layer 191a and the bonding layer 151 is barely discernible, or is only discernible due to the presence of a small gap or the like that occurs during solid-state bonding. These points are similar to those of other solid-state bonded portions in this disclosure.

[0035] The second surface layer 192a is disposed on the z1 side of the base layer 190a in the z direction. The second surface layer 192a is solid-state bonded to the first conductive portion 2A. In this embodiment, the second surface layer 192a is primarily composed of Ag (silver). There are no limitations on the thickness of the second surface layer 192a, and in this embodiment, the second surface layer 192a is thinner than the base layer 190a. The thickness of the second surface layer 192a is, for example, not less than 0.1 μm and not more than 15 μm.

[0036] The bonding layer 21A of the first conductive portion 2A corresponds to the second bonding layer in the bonded structure B11. The bonding layer 21A is disposed on the z2 side of the main body layer 20A in the z direction. The bonding layer 21A is solid-state bonded to the second surface layer 192a. In this embodiment, the bonding layer 21A is primarily composed of Ag (silver). The thickness of the bonding layer 21A is not limited in any way and is, for example, 0.1 μm or more and 15 μm or less.

[0037] The metal that is the main component of the second surface layer 192a and the bonding layer 21A is not particularly limited as long as they are configured to be solid-state bonded to each other.

[0038] 17, the semiconductor device A1 has a joint structure B12. The joint structure B12 is a structure in which a second switching element 1B as a first object to be joined and a second conductive part 2B as a second object to be joined are joined via an intermediate joining material 19b.

[0039] The intermediate bonding material 19b has a base layer 190b, a first surface layer 191b, and a second surface layer 192b.

[0040] The base layer 190b is primarily composed of Cu (copper). There are no limitations on the thickness of the base layer 190b, and in this embodiment, the base layer 190b is thicker than the first surface layer 191b and the second surface layer 192b. The thickness of the base layer 190b is, for example, not less than 50 μm and not more than 300 μm.

[0041] The first surface layer 191b is disposed on the z2 side of the base layer 190b in the z direction. The first surface layer 191b is solid-state bonded to the second switching element 1B. In this embodiment, the first surface layer 191b is mainly composed of Ag (silver). There are no limitations on the thickness of the first surface layer 191b, and in this embodiment, the first surface layer 191b is thinner than the base layer 190b. The thickness of the first surface layer 191b is, for example, not less than 0.1 μm and not more than 15 μm.

[0042] In this embodiment, the second switching element 1B further includes a bonding layer 151 similar to that of the first switching element 1A. The bonding layer 151 of the second switching element 1B is solid-state bonded to the first surface layer 191b.

[0043] The metal that is the main component of the first surface layer 191b and the bonding layer 151 is not particularly limited as long as they are configured to be solid-state bonded to each other.

[0044] The second surface layer 192b is disposed on the z1 side of the base layer 190b in the z direction. The second surface layer 192b is solid-state bonded to the second conductive portion 2B. In this embodiment, the second surface layer 192b is primarily composed of Ag (silver). There are no limitations on the thickness of the second surface layer 192b, and in this embodiment, the second surface layer 192b is thinner than the base layer 190b. The thickness of the second surface layer 192b is, for example, not less than 0.1 μm and not more than 15 μm.

[0045] The bonding layer 21B of the second conductive portion 2B corresponds to the second bonding layer in the bonded structure B12. The bonding layer 21B is disposed on the z2 side of the main body layer 20B in the z direction. The bonding layer 21B is solid-state bonded to the second surface layer 192b. In this embodiment, the bonding layer 21B is primarily composed of Ag (silver). The thickness of the bonding layer 21B is not particularly limited and is, for example, 0.1 μm or more and 15 μm or less.

[0046] The metal that is the main component of the second surface layer 192b and the bonding layer 21B is not particularly limited as long as they are configured to be solid-state bonded to each other.

[0047] Support substrate 3: The support substrate 3 supports the support conductors 2. The support substrate 3 is formed, for example, of a DBC (Direct Bonded Copper) substrate. Alternatively, the support substrate 3 may be formed, for example, of a DBA (Direct Bonded Aluminum) substrate. The support substrate 3 includes an insulating layer 31, a first metal layer 32, and a second metal layer 33.

[0048] The insulating layer 31 is made of, for example, a ceramic having excellent thermal conductivity. Examples of such ceramic include AlN (aluminum nitride), SiN (silicon nitride), Al2O3 (aluminum oxide), and ZTA (zirconia-reinforced alumina). The insulating layer 31 may be made of an insulating resin instead of ceramic. The insulating layer 31 has, for example, a rectangular shape in a plan view.

[0049] The first metal layer 32 is formed on the upper surface (surface facing the z2 side) of the insulating layer 31. The constituent material of the first metal layer 32 includes, for example, Cu. The constituent material may include Al (aluminum) instead of Cu. The first metal layer 32 includes a first portion 32A and a second portion 32B. The first portion 32A and the second portion 32B are spaced apart in the x direction. The first portion 32A is located on the x1 side of the second portion 32B. The first conductive portion 2A is joined to the first portion 32A and supports the first conductive portion 2A. The second portion 32B is joined to the second conductive portion 2B and supports the second conductive portion 2B. The first portion 32A and the second portion 32B are each, for example, rectangular in plan view.

[0050] The second metal layer 33 is formed on the lower surface (surface facing the z1 side) of the insulating layer 31. The constituent material of the second metal layer 33 is the same as the constituent material of the first metal layer 32. The lower surface (surface facing the z1 side) of the second metal layer 33 is exposed from the resin member 8, as shown in FIGS. 10 to 22 . Alternatively, the lower surface of the second metal layer 33 may be covered with the resin member 8. In a configuration in which the lower surface of the second metal layer 33 is exposed from the resin member 8, a heat dissipation member (e.g., a heat sink) (not shown) or the like can be attached to the lower surface. In a plan view, the second metal layer 33 overlaps both the first portion 32A and the second portion 32B.

[0051] 15, the semiconductor device A1 has a bonded structure B13. The bonded structure B13 is a structure in which a first conductive part 2A as a first object to be bonded and a supporting substrate 3 as a second object to be bonded are bonded via an intermediate bonding material 29a.

[0052] The intermediate bonding material 29a has a base layer 290a, a first surface layer 291a, and a second surface layer 292a.

[0053] The base layer 290a is primarily composed of Cu (copper). There are no limitations on the thickness of the base layer 290a, and in this embodiment, the base layer 290a is thicker than the first surface layer 291a and the second surface layer 292a. The thickness of the base layer 290a is, for example, not less than 50 μm and not more than 300 μm.

[0054] The first surface layer 291a is disposed on the z2 side of the base layer 290a in the z direction. In this embodiment, the first surface layer 291a is solid-state bonded to the first conductive portion 2A. The first surface layer 291a is primarily composed of Ag (silver). There are no limitations on the thickness of the first surface layer 291a, and in this embodiment, the first surface layer 291a is thinner than the base layer 290a. The thickness of the first surface layer 291a is, for example, not less than 0.1 μm and not more than 15 μm.

[0055] The bonding layer 22A of the first conductive portion 2A corresponds to the first bonding layer in the bonded structure B13. The bonding layer 22A is disposed on the z1 side of the main body layer 20A in the z direction. The bonding layer 22A is solid-state bonded to the first surface layer 291a. In this embodiment, the bonding layer 22A is primarily composed of Ag (silver). The thickness of the bonding layer 22A is not particularly limited and is, for example, 0.1 μm or more and 15 μm or less.

[0056] The metal that is the main component of the first surface layer 291a and the bonding layer 22A is not particularly limited as long as they are configured to be solid-state bonded to each other.

[0057] The second surface layer 292a is disposed on the z1 side of the base layer 290a in the z direction. The second surface layer 292a is solid-state bonded to the support substrate 3. In this embodiment, the second surface layer 292a is mainly composed of Ag (silver). There are no limitations on the thickness of the second surface layer 292a, and in this embodiment, the second surface layer 292a is thinner than the base layer 290a. The thickness of the second surface layer 292a is, for example, not less than 0.1 μm and not more than 15 μm.

[0058] The support substrate 3 of this embodiment further includes a bonding layer 321A. The bonding layer 321A corresponds to the second bonding layer in the bonded structure B13. The bonding layer 321A is disposed on the z2 side of the first portion 32A in the z direction. The bonding layer 321A is solid-state bonded to the second surface layer 292a. In this embodiment, the bonding layer 321A is primarily composed of Ag (silver). The thickness of the bonding layer 321A is not particularly limited and is, for example, 0.1 μm or more and 15 μm or less.

[0059] The metal that is the main component of the second surface layer 292a and the bonding layer 321A is not particularly limited as long as they are configured to be solid-state bonded to each other.

[0060] 18, the semiconductor device A1 has a joint structure B14. The joint structure B14 is a structure in which a second conductive part 2B as a first object to be joined and a supporting substrate 3 as a second object to be joined are joined via an intermediate joining material 29b.

[0061] The intermediate bonding material 29b has a base layer 290b, a first surface layer 291b, and a second surface layer 292b.

[0062] The base layer 290b is primarily composed of Cu (copper). There are no limitations on the thickness of the base layer 290b, and in this embodiment, the base layer 290b is thicker than the first surface layer 291b and the second surface layer 292b. The thickness of the base layer 290b is, for example, not less than 50 μm and not more than 300 μm.

[0063] The first surface layer 291b is disposed on the z2 side of the base layer 290b in the z direction. The first surface layer 291b is solid-state bonded to the second switching element 1B. In the present embodiment, the first surface layer 291b is primarily composed of Ag (silver). There are no limitations on the thickness of the first surface layer 291b, and in the present embodiment, the first surface layer 291b is thinner than the base layer 290b. The thickness of the first surface layer 291b is, for example, not less than 0.1 μm and not more than 15 μm.

[0064] The bonding layer 22B of the second conductive portion 2B corresponds to the first bonding layer in the bonded structure B14. The bonding layer 22B is disposed on the z1 side of the main body layer 20B in the z direction. The bonding layer 22B is solid-state bonded to the first surface layer 291b. In this embodiment, the bonding layer 22B is primarily composed of Ag (silver). The thickness of the bonding layer 22B is not particularly limited and is, for example, 0.1 μm or more and 15 μm or less.

[0065] The metal that is the main component of the first surface layer 291b and the bonding layer 22B is not particularly limited as long as they are configured to be solid-state bonded to each other.

[0066] The second surface layer 292b is disposed on the z1 side of the base layer 290b in the z direction. The second surface layer 292b is solid-state bonded to the support substrate 3. In this embodiment, the second surface layer 292b is mainly composed of Ag (silver). There are no limitations on the thickness of the second surface layer 292b, and in this embodiment, the second surface layer 292b is thinner than the base layer 290b. The thickness of the second surface layer 292b is, for example, not less than 0.1 μm and not more than 15 μm.

[0067] The support substrate 3 of this embodiment further includes a bonding layer 321B. The bonding layer 321B corresponds to the second bonding layer in the bonded structure B14. The bonding layer 321B is disposed on the z2 side of the second portion 32B in the z direction. The bonding layer 321B is solid-state bonded to the second surface layer 292b. In this embodiment, the bonding layer 321B is primarily composed of Ag (silver). The thickness of the bonding layer 321B is not particularly limited and is, for example, 0.1 μm or more and 15 μm or less.

[0068] The metal that is the main component of the second surface layer 292b and the bonding layer 321B is not particularly limited as long as they are configured to be solid-state bonded to each other.

[0069] Multiple power terminals 41-43: Each of the multiple power terminals 41-43 is made of a plate-shaped metal plate. The metal plate is made of, for example, Cu or a Cu alloy. In the example shown in Figures 1 to 5, 8 and 10, the semiconductor device A1 includes one power terminal 41, two power terminals 42, and two power terminals 43.

[0070] The first power supply voltage is applied between the power terminal 41 and the two power terminals 42. The power terminal 41 is, for example, a terminal (P terminal) connected to the positive pole of a DC power supply, and the two power terminals 42 are, for example, terminals (N terminals) connected to the negative pole of the DC power supply. Alternatively, the power terminal 41 may be an N terminal and the two power terminals 42 may each be a P terminal. In this case, the wiring inside the package may be appropriately changed in accordance with the change in terminal polarity. The second power supply voltage is applied to the two power terminals 43. The two power terminals 43 are output terminals that output voltages (the second power supply voltages) converted by the switching operations of the multiple first switching elements 1A and the multiple second switching elements 1B. Each of the multiple power terminals 41 to 43 includes a portion covered by the resin member 8 and a portion exposed from the resin member 8.

[0071] As shown in Figures 8, 12, and 19, the power terminal 41 is formed integrally with the first conductive portion 2A. Alternatively, the power terminal 41 may be separated from the first conductive portion 2A and conductively joined to the first conductive portion 2A. As shown in Figure 8, the power terminal 41 is located on the x2 side of the multiple semiconductor elements 1 and the first conductive portion 2A (support conductor 2). The insulating layer 31 is electrically connected to the first conductive portion 2A and, via the first conductive portion 2A, is electrically connected to the back electrodes 15 (drain electrodes) of the multiple first switching elements 1A. The power terminal 41 is an example of a "first power terminal."

[0072] As shown in Figures 8 and 11 , each of the two power terminals 42 is spaced apart from the first conductive portion 2A. A second conductive member 72 is joined to each of the two power terminals 42. As shown in Figure 8 , each of the two power terminals 42 is located on the x2 side of the multiple semiconductor elements 1 and the first conductive portion 2A (support conductor 2). Each of the two power terminals 42 is electrically connected to the second conductive member 72 and, via the second conductive member 72, is electrically connected to the second main surface electrodes 12 (source electrodes) of the multiple second switching elements 1B. Each power terminal 42 is an example of a "second power terminal."

[0073] The power terminal 41 and the two power terminals 42 each protrude from the resin member 8 toward the x2 side. The power terminal 41 and the two power terminals 42 are spaced apart from each other. The two power terminals 42 are located on opposite sides of the power terminal 41 in the y direction. As can be seen from FIGS. 6, 7, and 9, the power terminal 41 and the two power terminals 42 overlap each other when viewed in the y direction.

[0074] As shown in FIGS. 8 and 11 , the two power terminals 43 are each formed integrally with, for example, the second conductive portion 2B. Alternatively, the two power terminals 43 may be separated from the second conductive portion 2B and conductively joined to the second conductive portion 2B. As shown in FIG. 8 , the two power terminals 43 are each located on the x1 side of the semiconductor elements 1 and the second conductive portion 2B (support conductor 2). Each power terminal 43 is electrically connected to the first conductive portion 2A and, via the first conductive portion 2A, to the back electrode 15 (drain) of each second switching element 1B. The number of power terminals 43 is not limited to two and may be, for example, one or three or more. For example, when there is one power terminal 43, it is preferably connected to the center portion of the second conductive portion 2B in the y direction. Each power terminal 43 is an example of a “third power terminal.”

[0075] Multiple control terminals 44: The multiple control terminals 44 are pin-shaped terminals for controlling the driving of the multiple semiconductor elements 1 (the multiple first switching elements 1A and the multiple second switching elements 1B). Each of the multiple control terminals 44 is, for example, a press-fit terminal. The z-direction dimension of each of the multiple control terminals 44 is, for example, 10 mm to 30 mm (15.8 mm in one example). The z-direction dimension of the control terminal 44 is the length from the lower end (the end on the z1 side) of a holder 441 (described below) to the upper end (the end on the z2 side) of a metal pin 442 (described below). As shown in FIGS. 1 and 4 , the multiple control terminals 44 include multiple first control terminals 45 and multiple second control terminals 46. The multiple first control terminals 45 are used to control the multiple first switching elements 1A. The multiple second control terminals 46 are used to control the multiple second switching elements 1B.

[0076] Multiple first control terminals 45: As shown in Fig. 4, the multiple first control terminals 45 are arranged at intervals in the y direction. The multiple first control terminals 45 are fixed to the signal board 5 (first signal board 5A). As shown in Figs. 5 to 7 and 12, the multiple first control terminals 45 are located in the x direction between the multiple first switching elements 1A and the multiple power terminals 41, 42. As shown in Figs. 1 and 4, the multiple first control terminals 45 include a first drive terminal 45A and multiple first detection terminals 45B to 45E.

[0077] The first drive terminal 45A is a terminal (gate terminal) for inputting a drive signal for the plurality of first switching elements 1A. A first drive signal for driving the plurality of first switching elements 1A is input to the first drive terminal 45A (for example, a gate voltage is applied).

[0078] The first detection terminal 45B is a terminal (source sense terminal) for detecting source signals of the multiple first switching elements 1A. The first detection terminal 45B outputs a first detection signal for detecting the conduction state of the multiple first switching elements 1A. For example, the first detection terminal 45B detects, as the first detection signal, a voltage (a voltage corresponding to a source current) applied to the second principal surface electrode 12 (source electrode) of the first switching element 1A.

[0079] The first detection terminal 45C and the first detection terminal 45D are terminals that are each electrically connected to one of the two thermistors 17. The one thermistor 17 is mounted on a first signal board 5A, which will be described later.

[0080] The first detection terminal 45E is a terminal (drain sense terminal) for detecting drain signals of the first switching elements 1A. The first detection terminal 45E detects a voltage (a voltage corresponding to a drain current) applied to each back electrode 15 (drain electrode) of the first switching elements 1A.

[0081] Multiple second control terminals 46: As shown in FIG. 4, the multiple second control terminals 46 are arranged at intervals in the y direction. The multiple second control terminals 46 are fixed to the signal board 5 (second signal board 5B). As shown in FIGS. 5 to 7 and 12, the multiple second control terminals 46 are located between the multiple second switching elements 1B and the multiple power terminals 43 in the x direction. As shown in FIGS. 1 and 4, the multiple second control terminals 46 include a second drive terminal 46A and multiple second detection terminals 46B to 46E.

[0082] The second drive terminal 46A is a terminal (gate terminal) for inputting a drive signal for the plurality of second switching elements 1B. A second drive signal for driving the plurality of second switching elements 1B is input to the second drive terminal 46A (for example, a gate voltage is applied).

[0083] The second detection terminals 46B are terminals (source sense terminals) for detecting source signals of the plurality of second switching elements 1B. The plurality of second detection terminals 46B output second detection signals for detecting the conduction states of the plurality of second switching elements 1B. For example, the second detection terminals 46B detect, as the second detection signal, a voltage (a voltage corresponding to a source current) applied to the second principal surface electrode 12 (source electrode) of the second switching element 1B.

[0084] The second detection terminal 46C and the second detection terminal 46D are terminals that are respectively electrically connected to the other of the two thermistors 17. The other thermistor 17 is mounted on a second signal board 5B, which will be described later.

[0085] The second detection terminal 46E is a terminal (drain sense terminal) for detecting drain signals of the second switching elements 1B. The second detection terminal 46E detects a voltage (a voltage corresponding to a drain current) applied to each back electrode 15 (drain electrode) of the second switching elements 1B.

[0086] Plural Control Terminals 44: Each of the plural control terminals 44 (plurality of first control terminals 45 and plural number of second control terminals 46) includes a holder 441 and a metal pin 442.

[0087] The holder 441 is made of a conductive material. As shown in FIGS. 13 and 16 , the holder 441 is bonded to the signal board 5 (first metal layer 52 described below) via a conductive bonding material 449. The holder 441 includes a cylindrical portion, an upper flange, and a lower flange. The upper flange is connected to the upper end of the cylindrical portion in the z direction (the z2 side), and the lower flange is connected to the lower end of the cylindrical portion in the z direction (the z1 side). A metal pin 442 is inserted through at least the upper flange and the cylindrical portion of the holder 441. The holder 441 is covered with a resin member 8.

[0088] The metal pin 442 is a rod-shaped member extending in the z direction. The metal pin 442 is supported by being press-fitted into the holder 441. The metal pin 442 is electrically connected to the signal board 5 (a first metal layer 52 described below) at least via the holder 441. As shown in FIGS. 13 and 16 , when the lower end (the end on the z1 side) of the metal pin 442 is in contact with the conductive bonding material 449 inside the insertion hole of the holder 441, the metal pin 442 is electrically connected to the signal board 5 also via the conductive bonding material 449.

[0089] Signal board 5: The signal board 5 supports a plurality of control terminals 44. The signal board 5 is interposed between the support conductor 2 and each control terminal 44 in the z direction. The thickness of the signal board 5 (dimension in the thickness direction z) is, for example, 0.5 mm or more and 1.0 mm or less. The dimension in the thickness direction z of each control terminal 44 is 20 times or more and 30 times or less the thickness of the signal board 5 (dimension in the thickness direction z). The signal board 5 includes a first signal board 5A and a second signal board 5B.

[0090] 5, 12, and 13, the first signal substrate 5A is disposed on the first conductive portion 2A and supports a plurality of first control terminals 45. As shown in FIGS. 12, 13, and 19, the first signal substrate 5A is adhered to the first conductive portion 2A via an adhesive layer 6 (first adhesive body 6A).

[0091] 5, 12, and 16, the second signal substrate 5B is disposed on the second conductive portion 2B and supports a plurality of second control terminals 46. As shown in FIGS. 12, 16, and 19, the second signal substrate 5B is adhered to the second conductive portion 2B via an adhesive layer 6 (second adhesive body 6B).

[0092] The signal substrates 5 (each of the first signal substrate 5A and the second signal substrate 5B) are formed of, for example, a DBC substrate. The signal substrate 5 has an insulating substrate 51, a first metal layer 52, and a second metal layer 53 stacked on top of each other. Unless otherwise specified, the insulating substrate 51, the first metal layer 52, and the second metal layer 53 described below are common to the first signal substrate 5A and the second signal substrate 5B.

[0093] The insulating substrate 51 is made of, for example, ceramic. Examples of such ceramics include AlN, SiN, and Al2O3. The insulating substrate 51 has, for example, a rectangular shape in a plan view. As shown in FIGS. 13 and 16, the insulating substrate 51 has a main surface 51a and a back surface 51b. The main surface 51a and the back surface 51b are spaced apart in the z direction. The main surface 51a faces the z2 side, and the back surface 51b faces the z1 side. The back surface 51b faces the supporting conductor 2.

[0094] As shown in Figures 13 and 16, the second metal layer 53 is formed on the back surface 51b of the insulating substrate 51. The second metal layer 53 is adhered to the support conductor 2 via an adhesive layer 6. The second metal layer 53 of the first signal substrate 5A is adhered to the first conductive portion 2A via a first adhesive 6A described below, and the second metal layer 53 of the second signal substrate 5B is adhered to the second conductive portion 2B via a second adhesive 6B. The second metal layer 53 is made of, for example, Cu or a Cu alloy. The second metal layer 53 is an example of a "metal layer".

[0095] As shown in FIGS. 13 and 16 , the first metal layer 52 is formed on the main surface 51 a of the insulating substrate 51. The plurality of control terminals 44 are provided upright on the first metal layer 52. The first metal layer 52 of the first signal substrate 5A has a plurality of first control terminals 45 provided upright, and the first metal layer 52 of the second signal substrate 5B has a plurality of second control terminals 46 provided upright. The first metal layer 52 is made of, for example, Cu or a Cu alloy. As shown in FIG. 8 , the first metal layer 52 includes a plurality of wiring layers 521 to 526. The plurality of wiring layers 521 to 526 are spaced apart and insulated from one another.

[0096] 8 , a plurality of wires 73 are bonded to the wiring layer 521, and the wiring layer 521 is electrically connected to the first principal surface electrodes 11 (gate electrodes) of the semiconductor elements 1 via the respective wires 73. The wiring layer 521 of the first signal substrate 5A is electrically connected to the first principal surface electrodes 11 of the respective first switching elements 1A via the respective wires 73. The wiring layer 521 of the second signal substrate 5B is electrically connected to the first principal surface electrodes 11 of the respective second switching elements 1B via the respective wires 73.

[0097] 8 , a plurality of wires 75 are joined to the wiring layer 526, and the wiring layer 526 is electrically connected to the wiring layer 521 via the wires 75. The wiring layer 526 of the first signal substrate 5A is electrically connected to the first principal surface electrodes 11 (gate electrodes) of the first switching elements 1A via the wires 75, the wiring layer 521 of the first signal substrate 5A, and the wires 73. The wiring layer 526 of the second signal substrate 5B is electrically connected to the first principal surface electrodes 11 (gate electrodes) of the second switching elements 1B via the wires 75, the wiring layer 521 of the second signal substrate 5B, and the wires 73. A first drive terminal 45A is joined to the wiring layer 526 of the first signal substrate 5A, and a second drive terminal 46A is joined to the wiring layer 526 of the second signal substrate 5B.

[0098] 8 , a plurality of wires 74 are bonded to the wiring layer 522, and the wiring layer 522 is electrically connected to the third principal surface electrode 13 (source sense electrode) of each semiconductor element 1 via the respective wires 74. The wiring layer 522 of the first signal substrate 5A is electrically connected to the third principal surface electrode 13 (source sense electrode) of each first switching element 1A via the respective wires 74. The wiring layer 522 of the second signal substrate 5B is electrically connected to the third principal surface electrode 13 (source sense electrode) of each second switching element 1B via the respective wires 74. The first detection terminal 45B is bonded to the wiring layer 522 of the first signal substrate 5A, and the second detection terminal 46B is bonded to the wiring layer 522 of the second signal substrate 5B.

[0099] As shown in Fig. 8, the thermistor 17 is bonded to the wiring layer 523 and the wiring layer 524. As shown in Fig. 8, the first detection terminal 45C and the first detection terminal 45D are bonded to the wiring layer 523 and the wiring layer 524 of the first signal substrate 5A, respectively. The second detection terminal 46C and the second detection terminal 46D are bonded to the wiring layer 523 and the wiring layer 524 of the second signal substrate 5B, respectively.

[0100] Wires 76 are bonded to the wiring layer 525, and the wiring layer 525 is electrically connected to the support conductors 2 via the wires 76. As shown in Fig. 8 , the wiring layer 525 of the first signal substrate 5A is electrically connected to the first conductive portion 2A via the wires 76. The wiring layer 525 of the second signal substrate 5B is electrically connected to the second conductive portion 2B via the wires 76. A first detection terminal 45E is bonded to the wiring layer 525 of the first signal substrate 5A. A second detection terminal 46E is bonded to the wiring layer 525 of the second signal substrate 5B.

[0101] The signal board 5 may be a printed circuit board such as a glass epoxy board instead of a DBC board, and at least the wiring layers 521 to 526 are formed on the printed circuit board.

[0102] Adhesive layer 6: The adhesive layer 6 bonds the signal substrate 5 and the support conductor 2. The adhesive layer 6 is interposed between the signal substrate 5 and the support conductor 2 in the z direction. The adhesive layer 6 overlaps the signal substrate 5 in plan view. The thickness (dimension in the z direction) of the adhesive layer 6 is, for example, not less than 20 μm and not more than 200 μm (85 μm in one example).

[0103] As shown in Figures 12 to 16, the adhesive layer 6 includes a first adhesive body 6A and a second adhesive body 6B. The first adhesive body 6A bonds the first signal substrate 5A and the first conductive portion 2A together. The first adhesive body 6A is interposed between the first signal substrate 5A and the first conductive portion 2A and overlaps the first signal substrate 5A in a planar view. The second adhesive body 6B bonds the second signal substrate 5B and the second conductive portion 2B together. The second adhesive body 6B is interposed between the second signal substrate 5B and the second conductive portion 2B and overlaps the second signal substrate 5B in a planar view.

[0104] 13 and 16, the adhesive layer 6 (each of the first adhesive body 6A and the second adhesive body 6B) includes an insulating layer 61 and a pair of adhesive layers 62, 63. Unless otherwise specified, the insulating layer 61 and the pair of adhesive layers 62, 63 described below are common to both the first adhesive body 6A and the second adhesive body 6B.

[0105] The insulating layer 61 is made of a resin material. Considering its heat resistance and insulating properties, polyimide is a preferable resin material. The insulating layer 61 of the first adhesive body 6A electrically insulates the first signal substrate 5A from the first conductive portion 2A, and the insulating layer 61 of the second adhesive body 6B electrically insulates the second signal substrate 5B from the second conductive portion 2B. The insulating layer 61 is, for example, a film. The insulating layer 61 may be a sheet or plate instead of a film. In this disclosure, a sheet refers to a material that is as soft as a film but thicker than a film. A plate refers to a material that is harder, less flexible, and thicker than a film or sheet. The definitions of film, sheet, and plate are not limited to these and may be modified as appropriate according to conventional classifications. The thickness of the insulating layer 61 (dimension in the thickness direction z) is 0.1% to 1.0% of the dimension in the thickness direction z of each control terminal 44. The thickness (dimension in thickness direction z) of insulating layer 61 is 20% to 75% of the thickness (dimension in thickness direction z) of adhesive layer 6. The thickness (dimension in z direction) of insulating layer 61 is, for example, 10 μm to 150 μm (25 μm in one example).

[0106] 13 and 16, the insulating layer 61 includes a principal surface 61a and a rear surface 61b. The principal surface 61a and the rear surface 61b are spaced apart in the z direction. The principal surface 61a faces the z2 side (upward in the z direction), and the rear surface 61b faces the z1 side (downward in the z direction).

[0107] The pair of adhesive layers 62, 63 are formed on both sides of the insulating layer 61 in the z direction. Each of the pair of adhesive layers 62, 63 is made of, for example, a silicone-based adhesive or an acrylic-based adhesive. The thickness (dimension in the thickness direction z) of each of the pair of adhesive layers 62, 63 is 10% to 150% of the thickness (dimension in the thickness direction z) of the insulating layer 61. The thickness (dimension in the z direction) of each of the pair of adhesive layers 62, 63 is, for example, 5 μm to 50 μm (30 μm in one example).

[0108] 13 and 16 , the adhesive layer 62 is formed on the main surface 61 a. The adhesive layer 62 is interposed between the insulating layer 61 and the signal substrate 5 in the z direction. The adhesive layer 62 of the first adhesive body 6A is interposed between the insulating layer 61 of the first adhesive body 6A and the first signal substrate 5A in the z direction, and the adhesive layer 62 of the second adhesive body 6B is interposed between the insulating layer 61 of the second adhesive body 6B and the second signal substrate 5B in the z direction.

[0109] 13 and 16 , the adhesive layer 63 is formed on the back surface 61b. The adhesive layer 63 is interposed between the insulating layer 61 and the supporting conductor 2 in the z direction. The adhesive layer 63 of the first adhesive body 6A is interposed between the insulating layer 61 of the first adhesive body 6A and the first conductive portion 2A in the z direction, and the adhesive layer 63 of the second adhesive body 6B is interposed between the insulating layer 61 of the second adhesive body 6B and the second conductive portion 2B.

[0110] As can be understood from the above configuration, the adhesive layer 6 of the present disclosure is, for example, a double-sided adhesive tape. In the manufacturing process of the semiconductor device A1, the adhesive layer 6 is attached to, for example, a signal substrate 5 to which a plurality of control terminals 44 are bonded, and then attached to the support conductors 2. Note that the adhesive layer 6 does not have to be a double-sided adhesive tape, and any adhesive that temporarily melts, such as solder, when bonding two components together may be used. In other words, the adhesive layer 6 may be any adhesive that can bond two components together without melting.

[0111] First conductive member 71 and second conductive member 72: The first conductive member 71 and the second conductive member 72, together with the support conductor 2, constitute a path for a main circuit current switched by the plurality of semiconductor elements 1 (the plurality of first switching elements 1A and the plurality of second switching elements 1B). The first conductive member 71 and the second conductive member 72 are spaced apart from the respective main surfaces 201 of the first conductive portion 2A and the second conductive portion 2B on the z2 side and overlap the respective main surfaces 201 in a plan view. The first conductive member 71 and the second conductive member 72 are each made of, for example, a metal plate material. The metal is, for example, Cu or a Cu alloy. The first conductive member 71 and the second conductive member 72 are appropriately bent.

[0112] The first conductive member 71 electrically connects the plurality of first switching elements 1A to the second conductive portion 2B. As shown in FIGS. 5 and 8 , the first conductive member 71 is connected to the second main surface electrode 12 (source electrode) of each first switching element 1A and the second conductive portion 2B, thereby electrically connecting the second main surface electrode 12 of each first switching element 1A to the second conductive portion 2B. The first conductive member 71 forms a path for a main circuit current switched by the plurality of first switching elements 1A. As shown in FIGS. 5 , 8 , and 12 , the first conductive member 71 includes a main portion 711, a plurality of first connection ends 712, and a plurality of second connection ends 713.

[0113] The main portion 711 is located between the multiple first switching elements 1A and the second conductive portion 2B in the x direction. The main portion 711 is a strip-shaped portion extending in the y direction. As shown in FIG. 12 , the main portion 711 is located closer to the z2 side than the multiple first connection ends 712 and the multiple second connection ends 713. In this embodiment, as shown in FIGS. 5 , 8 , and 12 , the main portion 711 has multiple openings 711 a formed therein. Each of the multiple openings 711 a is a through-hole that penetrates the first conductive member 71 (main portion 711) in the z direction. The multiple openings 711 a are arranged at intervals in the y direction. The multiple openings 711 a do not overlap the second conductive member 72 in a plan view. The plurality of openings 711a are formed to facilitate the flow of the resin material between the upper side (z2 side) and the lower side (z1 side) near the main portion 711 (first conductive member 71) when injecting the fluid resin material to form the resin member 8. The shape of the main portion 711 is not limited to this configuration, and for example, the openings 711a do not have to be formed.

[0114] The first connection ends 712 and the second connection ends 713 are each connected to the main portion 711 and are disposed opposite the first switching elements 1A. As shown in FIG. 12 , the first connection ends 712 are each bonded to the second principal surface electrodes 12 of the first switching elements 1A via a conductive bonding material 719. The second connection ends 713 are each bonded to the second conductive portion 2B via a conductive bonding material 719. The conductive bonding material 719 may be, for example, solder, a metal paste material, or a sintered metal. In the examples shown in FIGS. 8 , 12 , 13 , and 21 , an opening 712 a is formed in each first connection end 712. Preferably, each opening 712 a is formed so as to overlap the center of the corresponding first switching element 1A in a plan view. As shown in FIGS. 12 , 13 , and 21 , the openings 712 a are, for example, through-holes that penetrate each first connection end 712 in the z-direction. The opening 712 a is used, for example, when positioning the first conductive member 71 with respect to the supporting conductor 2 .

[0115] In the illustrated example, the plurality of first connection ends 712 and the plurality of second connection ends 713 are connected to one another by the main portion 711, but instead of this configuration, the main portion 711 may be divided into a plurality of portions, and the divided portions may connect each of the plurality of first connection ends 712 and each of the plurality of second connection ends 713. In other words, a configuration may be provided in which one first conducting member 71 is provided for each of the plurality of first switching elements 1A.

[0116] As shown in FIG. 5 , the second conductive member 72 is connected to the second main surface electrode 12 (source electrode) of each second switching element 1B and the multiple power terminals 42, thereby electrically connecting the second main surface electrode 12 of each second switching element 1B and each power terminal 42. The second conductive member 72 forms a path for a main circuit current switched by the multiple second switching elements 1B. The second conductive member 72 has a maximum dimension in the x direction of, for example, 25 mm to 40 mm, and a maximum dimension in the y direction of, for example, 30 mm to 45 mm. As shown in FIG. 5 and other figures, the second conductive member 72 includes a pair of first wiring portions 721, second wiring portions 722, third wiring portions 723, and fourth wiring portions 724.

[0117] One of the pair of first wiring portions 721 is connected to one of the pair of power terminals 42, and the other of the pair of first wiring portions 721 is connected to the other of the pair of power terminals 42. As shown in FIG. 5 , each of the pair of first wiring portions 721 has a strip shape extending in the x direction in a plan view. The pair of first wiring portions 721 are spaced apart in the y direction and arranged parallel (or approximately parallel). As shown in FIGS. 5 and 11 , each of the pair of first wiring portions 721 includes a first end portion 721 a. Each first end portion 721 a is an end portion of each first wiring portion 721 on the x2 side. As shown in FIG. 11 , each first end portion 721 a is located closer to the z1 side than other portions of each first wiring portion 721. As shown in FIG. 11 , each first end portion 721 a is bonded to each of the pair of power terminals 42 via a conductive bonding material 729. The conductive bonding material 729 is, for example, solder, metal paste, or sintered metal. 5, a plurality of notches are formed in each first wiring portion 721. The plurality of notches formed in each first wiring portion 721 are, for example, semicircular in plan view, and overlap the supporting conductor 2 in plan view.

[0118] As shown in FIG. 5 , the second wiring portion 722 is connected to both of the pair of first wiring portions 721. The second wiring portion 722 is sandwiched between the pair of first wiring portions 721 in the y direction. The second wiring portion 722 has a strip shape extending in the y direction in a plan view. As shown in FIG. 5 , the second wiring portion 722 overlaps with the plurality of second switching elements 1B. The second wiring portion 722 is connected to each of the second switching elements 1B. The second wiring portion 722 has a plurality of recessed regions 722a. As shown in FIG. 20 , each of the recessed regions 722a protrudes downward in the z direction (toward the z1 side) relative to other portions of the second wiring portion 722. As shown in FIG. 20 , each recessed region 722a of the second wiring portion 722 and each second principal surface electrode 12 (source electrode) of each of the plurality of second switching elements 1B are joined via a conductive bonding material 729. 5 and 20, a slit is formed in each recessed region 722a. The slit is located at the center of each recessed region 722a in the y direction and extends in the x direction. Each recessed region 722a is made up of two parts separated in the y direction by the slit. Note that each recessed region 722a does not necessarily have to have a slit.

[0119] As shown in FIG. 5 , the third wiring portion 723 is connected to both of the pair of first wiring portions 721. The first wiring portion 721 is sandwiched between the pair of first wiring portions 721 in the y direction. The third wiring portion 723 has a strip shape extending in the y direction in plan view. The third wiring portion 723 is spaced apart from the second wiring portion 722 in the x direction. The third wiring portion 723 is disposed parallel (or approximately parallel) to the second wiring portion 722. As shown in FIG. 5 , the third wiring portion 723 overlaps the multiple first switching elements 1A in plan view. The third wiring portion 723 is located above (on the z2 side of) each first connection end portion 712 of the first conductive member 71 in the z direction. The third wiring portion 723 overlaps the first connection end portion 712 in plan view.

[0120] As shown in FIG. 5 , each of the multiple fourth wiring portions 724 is connected to both the second wiring portion 722 and the third wiring portion 723. Each fourth wiring portion 724 is sandwiched between the second wiring portion 722 and the third wiring portion 723 in the x direction. Each fourth wiring portion 724 has a strip shape extending in the x direction in a plan view. The multiple fourth wiring portions 724 are spaced apart in the y direction and arranged parallel (or approximately parallel) in a plan view. Furthermore, the multiple fourth wiring portions 724 are arranged parallel (or approximately parallel) to the pair of first wiring portions 721. One end in the x direction of each of the multiple fourth wiring portions 724 is connected to a portion of the third wiring portion 723 that overlaps between two first switching elements 1A adjacent in the y direction in a plan view. The other end in the x direction of each of the plurality of fourth wiring portions 724 is connected to a portion of the second wiring portion 722 that overlaps between two second switching elements 1B adjacent in the y direction in plan view. Each of the plurality of fourth wiring portions 724 overlaps, for example, the first conductive member 71 (main portion 711).

[0121] The wires 73 to 76 are, for example, bonding wires, and each wire connects two separate portions. The material of each wire 73 to 76 includes, for example, gold (Au), aluminum, or copper.

[0122] The plurality of wires 73 are bonded to the wiring layer 521 and the first principal surface electrodes 11 (gate electrodes) of each semiconductor element 1, thereby providing electrical continuity therebetween. As shown in Fig. 8 , the plurality of wires 73 include wires bonded to the wiring layer 521 of the first signal substrate 5A and the first principal surface electrodes 11 of each first switching element 1A, and wires bonded to the wiring layer 521 of the second signal substrate 5B and the first principal surface electrodes 11 of each second switching element 1B.

[0123] The plurality of wires 74 are bonded to the wiring layer 522 and the third principal surface electrodes 13 (source sense electrodes) of each semiconductor element 1, thereby providing electrical continuity therebetween. As shown in Fig. 8 , the plurality of wires 74 include wires bonded to the wiring layer 522 of the first signal substrate 5A and the third principal surface electrodes 13 of each first switching element 1A, and wires bonded to the wiring layer 522 of the second signal substrate 5B and the third principal surface electrodes 13 of each second switching element 1B. In a configuration in which each semiconductor element 1 does not have a third principal surface electrode 13, the plurality of wires 74 are bonded to each second principal surface electrode 12 instead of each third principal surface electrode 13.

[0124] The plurality of wires 75 are bonded to the wiring layer 521 and the wiring layer 526 to provide electrical continuity therebetween. As shown in Fig. 8 , the plurality of wires 75 include wires bonded to the wiring layer 521 of the first signal substrate 5A and the wiring layer 526 of the first signal substrate 5A, and wires bonded to the wiring layer 521 of the second signal substrate 5B and the wiring layer 526 of the second signal substrate 5B.

[0125] The plurality of wires 76 are joined to the wiring layer 525 and the support conductor 2, and provide electrical continuity therebetween. As shown in Fig. 8 , the plurality of wires 76 include wires joined to the wiring layer 525 and the first conductive portion 2A of the first signal substrate 5A and wires joined to the wiring layer 525 and the second conductive portion 2B of the second signal substrate 5B.

[0126] Resin member 8: The resin member 8 is a sealing material that protects the multiple semiconductor elements 1 (the multiple first switching elements 1A and the multiple second switching elements 1B). The resin member 8 covers the multiple semiconductor elements 1 (the multiple first switching elements 1A and the multiple second switching elements 1B), the support conductor 2 (the first conductive portion 2A and the second conductive portion 2B), the support substrate 3 (excluding the lower surface of the second metal layer 33), a portion of each of the multiple power terminals 41 to 43, a portion of each of the multiple control terminals 44, the signal substrate 5 (the first signal substrate 5A and the second signal substrate 5B), the adhesive layer 6 (the first adhesive body 6A and the second adhesive body 6B), the first conductive member 71, the second conductive member 72, and the multiple wires 73 to 76. The resin member 8 is made of, for example, black epoxy resin. The resin member 8 is formed, for example, by molding. The resin member 8 has, for example, a dimension in the x direction of about 35 mm to 60 mm, a dimension in the y direction of about 35 mm to 50 mm, and a dimension in the z direction of about 4 mm to 15 mm. These dimensions are the maximum sizes along each direction. The resin member 8 has a resin main surface 81, a resin back surface 82, and multiple resin side surfaces 831 to 834.

[0127] As shown in FIGS. 6 , 7 , 9 , 11 , 12 , and 19 to 22 , the resin main surface 81 and the resin back surface 82 are spaced apart in the z direction. The resin main surface 81 faces the z2 side, and the resin back surface 82 faces the z1 side. Multiple control terminals 44 (multiple first control terminals 45 and multiple second control terminals 46) protrude from the resin main surface 81. As shown in FIG. 10 , the resin back surface 82 has a frame shape surrounding the lower surface of the second metal layer 33 of the support substrate 3 in a plan view. The lower surface of the second metal layer 33 is exposed from the resin back surface 82 and is, for example, flush with the resin back surface 82. Multiple resin side surfaces 831 to 834 are each connected to both the resin main surface 81 and the resin back surface 82 and are sandwiched between them in the z direction. As shown in FIG. 4 and other figures, the resin side surface 831 and the resin side surface 832 are spaced apart in the x direction. Resin side surface 831 faces the x1 side, and resin side surface 832 faces the x2 side. Two power terminals 43 protrude from resin side surface 831, and multiple power terminals 41 and 42 protrude from resin side surface 832. As shown in Figure 4 and other figures, resin side surface 833 and resin side surface 834 are spaced apart in the y direction. Resin side surface 833 faces the y1 side, and resin side surface 834 faces the y2 side.

[0128] As shown in FIG. 4 , a plurality of recesses 832 a are formed on the resin side surface 832. Each recess 832 a is a portion recessed in the x direction in plan view. In plan view, the plurality of recesses 832 a include one formed between the power terminal 41 and one of the two power terminals 42 and one formed between the power terminal 41 and the other of the two power terminals 42. The plurality of recesses 832 a are provided to increase the creepage distance along the resin side surface 832 between the power terminal 41 and one of the two power terminals 42 and the creepage distance along the resin side surface 832 between the power terminal 41 and the other of the two power terminals 42.

[0129] As shown in FIGS. 11 and 12 , the resin member 8 has a plurality of first protrusions 851 , a plurality of second protrusions 852 , and a resin cavity 86 .

[0130] Each of the multiple first protrusions 851 protrudes in the z direction from the resin main surface 81. The multiple first protrusions 851 are arranged near the four corners of the resin member 8 in a plan view. A first protrusion end surface 851a is formed at the tip (the end on the z2 side) of each of the first protrusions 851. Each of the multiple first protrusions 851 has a first protrusion end surface 851a that is parallel (or substantially parallel) to the resin main surface 81. The multiple first protrusion end surfaces 851a are arranged on the same plane (x-y plane). Each of the first protrusions 851 has, for example, a bottomed, hollow truncated cone shape. The multiple first protrusions 851 are used as spacers when the semiconductor device A1 is mounted on a control circuit board or the like. The control circuit board is included in a device that uses power generated by the semiconductor device A1. 11 , each of the plurality of first protrusions 851 has a recess 851b and an inner wall surface 851c formed in the recess 851b. The shape of each of the first protrusions 851 may be columnar, and is preferably cylindrical. It is preferable that the shape of the recess 851b is cylindrical, and that the inner wall surface 851c is a single perfect circle in plan view.

[0131] The semiconductor device A1 may be fixed to the control circuit board or the like by a method such as screwing. In this case, a female screw thread may be formed on the inner wall surface 851c of the recess 851b of each first protrusion 851. An insert nut or the like may be embedded in the recess 851b of each first protrusion 851.

[0132] As shown in FIG. 12 and other figures, the multiple second protrusions 852 protrude in the z direction from the resin main surface 81. The multiple second protrusions 852 overlap the multiple control terminals 44 in a plan view. Each metal pin 442 of the multiple control terminals 44 protrudes from each second protrusion 852. Each second protrusion 852 has a truncated cone shape. Each second protrusion 852 covers the holder 441 and a portion of the metal pin 442 of each control terminal 44.

[0133] 11 , resin voids 86 extend in the z direction from resin main surface 81 to each main surface 201 of first conductive portion 2A and second conductive portion 2B. Resin voids 86 are tapered, and the cross-sectional area in a plane perpendicular to the z direction decreases from resin main surface 81 toward each main surface 201 in the z direction. Resin voids 86 are formed during molding of resin member 8, and are portions where resin member 8 is not formed during molding.

[0134] Resin voids 86 are formed, for example, when a presser member is present during molding of resin member 8 and prevents fluid resin material from filling the voids. The presser member applies a pressing force to each main surface 201 during molding, and is inserted into the notches formed in each first wiring portion 721 of second conductive member 72. This allows the presser member to press support conductor 2 (first conductive portion 2A and second conductive portion 2B) without interfering with second conductive member 72, thereby suppressing warping of support substrate 3 to which support conductor 2 is bonded.

[0135] 11 , the semiconductor device A1 includes a resin filling portion 88. The resin filling portion 88 is filled into the resin void portion 86 so as to fill the resin void portion 86. The resin filling portion 88 is made of, for example, an epoxy resin like the resin member 8, but may also be made of a resin material different from that of the resin member 8.

[0136] Next, the functions of the joined structures B11 to B14 and the semiconductor device A1 will be described.

[0137] The bonded structures B11 to B14 each include intermediate bonding materials 19a, 19b, 29a, and 20b. The intermediate bonding materials 19a, 19b, 29a, and 20b each include base material layers 190a, 190b, 290a, and 290b. The base material layers 190a, 190b, 290a, and 290b are primarily composed of copper (Cu). Therefore, compared to a case where the members corresponding to the base material layers 190a, 190b, 290a, and 290b are primarily composed of aluminum (Al), the bonded structures B11 to B14 and the semiconductor device A1 can be provided with higher heat transfer efficiency.

[0138] The first surface layers 191a, 191b, 291a, and 291b and the member corresponding to the first bonding layer are primarily composed of Ag (silver). The second surface layers 192a, 192b, 292a, and 292b and the member corresponding to the second bonding layer are primarily composed of Ag (silver). This allows for more reliable solid-state bonding, improving the bonded structures B11 to B14.

[0139] Semiconductor device A1 has a configuration in which a plurality of first switching elements 1A and a plurality of second switching elements 1B are joined via joint structures B11 to B14 to a support conductor 2 and a support substrate 3. This allows heat from the plurality of first switching elements 1A and the plurality of second switching elements 1B to be efficiently dissipated to the outside of semiconductor device A1 via joint structures B11 and B12, the support conductor 2, joint structures B13 and B14, and the support substrate 3.

[0140] 23 to 25 show modified examples and other embodiments of the present disclosure. In these figures, elements that are the same as or similar to those in the above-described embodiment are given the same reference numerals. Furthermore, the configurations of the various parts in each modified example and each embodiment can be combined with each other as appropriate within the scope of not causing technical contradictions.

[0141] Semiconductor device A11: FIG. 23 shows a first modified example of the semiconductor device A1. The semiconductor device A11 of this modified example further includes a heat sink 9. The heat sink 9 is intended to more efficiently dissipate heat from the plurality of first switching elements 1A and second switching elements 1B. The specific configuration of the heat sink 9 is not limited in any way. As shown in FIG. 24, the heat sink 9 of this embodiment has a main body 90 and a bonding layer 91.

[0142] The main body 90 is made of a metal such as aluminum (Al). In the illustrated example, the main body 90 has a portion located on the z2 side in the z direction and a plurality of fins each extending from the portion on the z1 side in the z direction.

[0143] 23, the heat sink 9 is bonded to the support substrate 3 via an intermediate bonding material 39. As shown in Fig. 24, the semiconductor device A11 has a bonded structure B15. The bonded structure B15 is a structure in which the support substrate 3 as a first object to be bonded and the heat sink 9 as a second object to be bonded are bonded via the intermediate bonding material 39.

[0144] The intermediate bonding material 39 has a base layer 390 , a first surface layer 391 , and a second surface layer 392 .

[0145] Base material layer 390 is primarily composed of Cu (copper). There are no limitations on the thickness of base material layer 390, and in this embodiment, base material layer 390 is thicker than first surface layer 391 and second surface layer 392. The thickness of base material layer 390 is, for example, not less than 50 μm and not more than 300 μm.

[0146] The first surface layer 391 is disposed on the z2 side of the base layer 390 in the z direction. In this embodiment, the first surface layer 391 is solid-state bonded to the support substrate 3, and the first surface layer 391 is mainly composed of Ag (silver). There are no limitations on the thickness of the first surface layer 391, and in this embodiment, the first surface layer 391 is thinner than the base layer 390. The thickness of the first surface layer 391 is, for example, not less than 0.1 μm and not more than 15 μm.

[0147] The support substrate 3 further includes a bonding layer 331. The bonding layer 331 corresponds to the first bonding layer in the bonded structure B15. The bonding layer 331 is disposed on the z1 side of the second metal layer 33 in the z direction. The bonding layer 331 is solid-state bonded to the first surface layer 391. In this embodiment, the bonding layer 331 is mainly composed of Ag (silver). The thickness of the bonding layer 331 is not particularly limited and is, for example, 0.1 μm or more and 15 μm or less.

[0148] The metal that is the main component of the first surface layer 391 and the bonding layer 331 is not particularly limited as long as they are configured to be solid-state bonded to each other.

[0149] The second surface layer 392 is disposed on the z1 side of the base layer 390 in the z direction. The second surface layer 392 is solid-state bonded to the heat sink 9. In this embodiment, the second surface layer 392 is mainly composed of Ag (silver). There are no limitations on the thickness of the second surface layer 392, and in this embodiment, the second surface layer 392 is thinner than the base layer 390. The thickness of the second surface layer 392 is, for example, not less than 0.1 μm and not more than 15 μm.

[0150] The bonding layer 91 of the heat sink 9 corresponds to the second bonding layer in the bonded structure B15. The bonding layer 91 is disposed on the z2 side of the main body 90 in the z direction. The bonding layer 91 is solid-state bonded to the second surface layer 392. In this embodiment, the bonding layer 91 is mainly composed of Ag (silver). There are no particular limitations on the thickness of the bonding layer 91, and it is, for example, 0.1 μm or more and 15 μm or less.

[0151] The metal that is the main component of the second surface layer 392 and the bonding layer 91 is not particularly limited as long as they are configured to be solid-state bonded to each other.

[0152] This modification also makes it possible to provide joined structures B11 to B15 and semiconductor device A11 that more easily transfer heat. Furthermore, the support substrate 3 and the heat sink 9 are joined by solid-state bonding via an intermediate bonding material 39. This allows heat from the multiple first switching elements 1A and the multiple second switching elements 1B to be dissipated to the heat sink 9 more efficiently.

[0153] 25 shows a joint structure according to a second embodiment of the present disclosure. The joint structure B2 of this embodiment has a first switching element 1A as a first object to be joined, a first conductive part 2A as a second object to be joined, and an intermediate joining material 19a.

[0154] The intermediate bonding material 19a of this embodiment has a base layer 190a, a first surface layer 191a, a second surface layer 192a, a first intermediate layer 193a, a second intermediate layer 194a, a third intermediate layer 195a, and a fourth intermediate layer 196a.

[0155] The first intermediate layer 193a is interposed between the base layer 190a and the first surface layer 191a. The second intermediate layer 194a is interposed between the base layer 190a and the second surface layer 192a. The first intermediate layer 193a and the second intermediate layer 194a are mainly composed of, for example, Ni (nickel). The thicknesses of the first intermediate layer 193a and the second intermediate layer 194a are, for example, not less than 0.1 μm and not more than 15 μm.

[0156] The third intermediate layer 195a is interposed between the first surface layer 191a and the first intermediate layer 193a. The fourth intermediate layer 196a is interposed between the second surface layer 192a and the second intermediate layer 194a. The third intermediate layer 195a and the fourth intermediate layer 196a are mainly composed of, for example, Cu (copper). The thicknesses of the third intermediate layer 195a and the fourth intermediate layer 196a are, for example, not less than 0.01 μm and not more than 10 μm.

[0157] The configuration of the intermediate bonding material 19a in the bonded structure B2 may be applied to the intermediate bonding material 19b, the intermediate bonding material 29a, the intermediate bonding material 29b, and the intermediate bonding material 39 described above.

[0158] According to this embodiment, it is also possible to provide a joint structure B2 that is more likely to conduct heat. As can be understood from this embodiment, the specific configuration of the joint structure of the present disclosure is not limited in any way.

[0159] The bonded structure and semiconductor device according to the present disclosure are not limited to the above-described embodiments. The specific configurations of the components of the bonded structure and semiconductor device according to the present disclosure can be freely modified in various ways. The present disclosure includes the embodiments described in the following appendices.

[0160] Supplementary Note 1. A bonded structure comprising: a first object to be bonded having a first bonding layer; a second object to be bonded having a second bonding layer; and an intermediate bonding material interposed between the first object to be bonded and the second object to be bonded, wherein the intermediate bonding material has a base layer and a first surface layer and a second surface layer disposed on either side of the base layer, wherein the first bonding layer and the first surface layer are bonded by solid-state bonding, and the second bonding layer and the second surface layer are bonded by solid-state bonding, and the base layer is mainly composed of Cu. Supplementary Note 2. The bonded structure according to Supplementary Note 1, wherein the first bonding layer and the first surface layer are mainly composed of Ag. Supplementary Note 3. The bonded structure according to Supplementary Note 1 or 2, wherein the second bonding layer and the second surface layer are mainly composed of Ag. Supplementary Note 4. The bonded structure according to any of Supplements 1 to 3, wherein the base layer is thicker than the first surface layer. Supplementary Note 5. The bonded structure according to any one of Supplements 1 to 4, wherein the base material layer is thicker than the second surface layer. Supplementary Note 6. The bonded structure according to any one of Supplements 1 to 5, wherein the first object to be bonded further has a first body portion mainly composed of Cu. Supplementary Note 7. The bonded structure according to any one of Supplements 1 to 6, wherein the second object to be bonded further has a second body portion mainly composed of Cu. Supplementary Note 8. The bonded structure according to any one of Supplements 1 to 7, wherein the intermediate bonding material further has a first intermediate layer interposed between the base material layer and the first surface layer. Supplementary Note 9. The bonded structure according to Supplementary Note 8, wherein the intermediate bonding material further has a second intermediate layer interposed between the base material layer and the second surface layer. Supplementary Note 10. The bonded structure according to Supplementary Note 9, wherein the intermediate bonding material further has a third intermediate layer interposed between the first surface layer and the first intermediate layer. Supplementary Note 11. The bonded structure according to claim 10, wherein the intermediate bonding material further has a fourth intermediate layer interposed between the second surface layer and the second intermediate layer. Appendix 12. The bonded structure according to claim 11, wherein the first intermediate layer and the second intermediate layer are primarily composed of Ni. Appendix 13. The bonded structure according to claim 12, wherein the third intermediate layer and the fourth intermediate layer are primarily composed of Cu.Appendix 14. A semiconductor device comprising a semiconductor element, a conductive part, and a support substrate, and having the bonded structure according to any one of Appendixes 1 to 13. Appendix 15. The semiconductor device according to Appendix 14, comprising the bonded structure in which the semiconductor element forms the first bonding object and the conductive part forms the second bonding object. Appendix 16. The semiconductor device according to Appendix 14 or 15, comprising the bonded structure in which the conductive part forms the first bonding object and the support substrate forms the second bonding object. Appendix 17. The semiconductor device according to any one of Appendixes 14 to 16, further comprising a heat sink, comprising the bonded structure in which the support substrate forms the first bonding object and the heat sink forms the second bonding object.

[0161] A1, A11: semiconductor device B1, B11, B12, B13, B14, B15: bonded structure B2, B3, B4: bonded structure 1: semiconductor element 1A: first switching element 1B: second switching element 2: support conductor 2A: first conductive portion 2B: second conductive portion 3: support substrate 5: signal substrate 5A: first signal substrate 5B: second signal substrate 6: adhesive layer 6A: first adhesive body 6B: second adhesive body 8: resin member 9: heat sink 10a: element main surface 10b: element back surface 11: first main surface electrode 12: second main surface electrode 13: third main surface electrode 15: back surface electrode 17: thermistor 19a: intermediate bonding material 19b: intermediate bonding material 20A, 20B: main body layer 20b: intermediate bonding material 21A, 21B, 22A, 22B: Bonding layers 29a, 29b: Intermediate bonding material 31: Insulating layer 32: First metal layer 32A: First portion 32B: Second portion 33: Second metal layer 39: Intermediate bonding material 41, 42, 43: Power terminal 44: Control terminal 45: First control terminal 45A: First drive terminal 45B, 45C, 45D, 45E: First detection terminal 46: Second control terminal 46A: Second drive terminal 46B, 46C, 46D, 46E: Second detection terminal 51: Insulating substrate 51a: Main surface 51b: Back surface 52: First metal layer 53: Second metal layer 61: Insulating layer 61a: Main surface 61b: Back surface 62, 63: Adhesive layers 71: First conductive member 72: Second conductive member 73, 74, 75, 76: Wire 81: Resin main surface 82: Resin back surface 86: Resin void portion 88: Resin filling portion 90: Main body portion 91: Bonding layer 151: Bonding layer 190a, 190b: Base material layer 191a, 191b: First surface layer 192a, 192b: Second surface layer 193a: First intermediate layer 194a: Second intermediate layer 195a: Third intermediate layer 196a: Fourth intermediate layer 201: Main surface 202: Back surface 290a, 290b: Base material layer 291a, 291b: First surface layer 292a, 292b: Second surface layer 321A, 321B,331: Bonding layer 390: Base material layer 391: First surface layer 392: Second surface layer 441: Holder 442: Metal pin 449: Conductive bonding material 521 to 526: Wiring layers 711: Main portion 711a: Opening 712: First connection end portion 712a: Opening 713: Second connection end portion 719: Conductive bonding material 721: First wiring portion 721a: First end portion 722: Second wiring portion 722a: Recessed region 723: Third wiring portion 724: Fourth wiring portion 729: Conductive bonding material 831: Resin side surface 832: Resin side surface 832a: Recessed portion 833, 834: Resin side surface 851: First protruding portion 851a: First protruding end surface 851b: Recessed portion 851c: Inner wall surface 852: second protrusion,

Claims

1. A first object to be joined having a first joining layer, A second object to be joined having a second joining layer, and an intermediate joining material interposed between the first object to be joined and the second object to be joined, wherein the intermediate joining material has a base material layer, and a first surface layer and a second surface layer disposed on both sides of the base material layer, the first joining layer and the first surface layer are joined by solid-phase joining, the second joining layer and the second surface layer are joined by solid-phase joining, and the base material layer is made mainly of Cu, a joining structure.

2. The joining structure according to claim 1, wherein the first joining layer and the first surface layer are made mainly of Ag.

3. The joining structure according to claim 1 or 2, wherein the second joining layer and the second surface layer are made mainly of Ag.

4. The joining structure according to claim 1 or 2, wherein the base material layer is thicker than the first surface layer.

5. The joining structure according to claim 1 or 2, wherein the base material layer is thicker than the second surface layer.

6. The joining structure according to claim 1 or 2, wherein the first object to be joined further has a first main body portion made mainly of Cu.

7. The joining structure according to claim 1 or 2, wherein the second object to be joined further has a second main body portion made mainly of Cu.

8. The joining structure according to claim 1 or 2, wherein the intermediate joining material further has a first intermediate layer interposed between the base material layer and the first surface layer.

9. The joining structure according to claim 8, wherein the intermediate joining material further has a second intermediate layer interposed between the base material layer and the second surface layer.

10. The intermediate bonding material further has a third intermediate layer interposed between the first surface layer and the first intermediate layer, and the bonding structure according to claim 9.

11. The intermediate bonding material further has a fourth intermediate layer interposed between the second surface layer and the second intermediate layer, and the bonding structure according to claim 10.

12. The first intermediate layer and the second intermediate layer are mainly composed of Ni, and the bonding structure according to claim 11.

13. The third intermediate layer and the fourth intermediate layer are mainly composed of Cu, and the bonding structure according to claim 12.

14. A semiconductor element, A conductive portion, A support substrate, and includes A semiconductor device having the bonding structure according to claim 1 or 2.

15. The semiconductor device according to claim 14, wherein the semiconductor element forms the first bonding object and the conductive portion forms the second bonding object of the bonding structure.

16. The semiconductor device according to claim 14, wherein the conductive portion forms the first bonding object and the support substrate forms the second bonding object of the bonding structure.

17. Further includes a heat sink, The semiconductor device according to claim 14, wherein the support substrate forms the first bonding object and the heat sink forms the second bonding object of the bonding structure.