High-frequency electric power amplification device

Abstract

This high-frequency electric power amplification device (100) comprises: a sub-mount substrate (1); a semiconductor substrate (4) that is mounted on the sub-mount substrate (1); a plurality of unit amplifiers (5) that are mounted on the semiconductor substrate (4); and a plurality of input wires (18). Each of the plurality of unit amplifiers (5) has an RF transistor (10), a gate bus line (11), an input bonding pad (12), and a shunt circuit (14) that has one end connected to the input bonding pad (12) and the other end connected to a ground potential. The plurality of input wires (18) include, for each of the plurality of unit amplifiers (5), a plurality of input wires that connect a first wiring pattern (2) and the input bonding pad (12) of the unit amplifier (5). The shunt circuit (14) that is included in each of the plurality of unit amplifiers (5) includes a semiconductor inductor (15) and an MIM capacitor (16) that are connected in series.

Description

High frequency power amplifier

[0001] The present disclosure relates to a high frequency power amplifier device used in a device that transmits a high frequency signal.

[0002] In recent years, in wireless communication base stations and the like used in microwave and millimeter wave bands, in addition to the conventional demands for high output and high efficiency, there has been a demand for high frequency power amplifiers that have consistent characteristics across a wide frequency band. For example, the frequency band called n78 specified for 5G NR in 3GPP (registered trademark) has a bandwidth of 3.3 GHz to 3.8 GHz, or 500 MHz, and it is required that this band be covered by a single high frequency power amplifier.

[0003] Gallium nitride (GaN) transistors, which have excellent efficiency, are primarily used in microwave and millimeter wave bands. However, because GaN transistors have low impedance, an impedance matching circuit is usually provided inside the high frequency power amplifier.

[0004] For example, Patent Document 1 discloses a radio frequency power amplifier in which a plurality of unit transistors are arranged on a semiconductor substrate, and a series resonant circuit is shunt-connected to the control terminal of each unit transistor.

[0005] Furthermore, Patent Document 2 discloses a high-frequency semiconductor device as a microwave monolithic integrated circuit (MMIC) in which a plurality of unit transistors connected in parallel and a series resonant circuit shunt-connected to the control terminal of each unit transistor are integrated on a single semiconductor substrate. Compared to Patent Document 1, the configuration of Patent Document 2 has a smaller inductance component because the control terminal and the series resonant circuit, and the series resonant circuit and the via hole are directly connected by wiring on the semiconductor substrate, and the higher the frequency, the less the impact of characteristic degradation, making it more effective. Furthermore, because no wires are used, the risk of characteristic fluctuations due to variations in wire length during assembly is reduced.

[0006] JP 2008-109227 A International Publication No. 2021 / 140563

[0007] However, in the technology of Patent Document 1, only one wire is used to connect the gate connection wiring to the control terminal of the unit transistor, so variations in the length of the wire cause variations in the phase of the input signal to each unit transistor, resulting in an improper combination of signals at the output side, resulting in losses.

[0008] Furthermore, although not explicitly stated, the technology of Patent Document 2 also assumes that there is only one wire extending from the gate connection wiring to the control terminal of the unit transistor, and has the same problem as Patent Document 1.

[0009] Therefore, an object of the present disclosure is to provide a high frequency power amplifier device that can reduce the influence of variations in wire length and suppress variations in high frequency characteristics such as gain within a semiconductor substrate and variations between high frequency power amplifier devices.

[0010] In order to achieve the above object, a radio frequency power amplifier device according to an embodiment of the present disclosure includes: a submount substrate having a wiring pattern; a semiconductor substrate mounted on the submount substrate; a plurality of unit amplifiers mounted on the semiconductor substrate; and a plurality of input wires for transmitting RF signals input to the plurality of unit amplifiers, each of the plurality of unit amplifiers having a radio frequency transistor having a plurality of gate fingers, a gate bus line connecting the plurality of gate fingers of the radio frequency transistor, an input bonding pad connected to the gate bus line, and a shunt circuit having one end connected to the input bonding pad and the other end connected to a ground potential, the plurality of input wires including, for each of the plurality of unit amplifiers, a plurality of input wires connecting the wiring pattern to the input bonding pad of the unit amplifier, the gate bus lines of each of the plurality of unit amplifiers are all arranged physically separated from each other, and the shunt circuit of each of the plurality of unit amplifiers includes a semiconductor inductor and a MIM capacitor connected in series.

[0011] According to the radio frequency power amplifier device according to the present disclosure, it is possible to suppress variations in radio frequency characteristics such as gain within a semiconductor substrate and variations between radio frequency power amplifier devices.

[0012] FIG. 1A is a diagram showing an example of a plan view of a radio frequency power amplifier apparatus according to a first embodiment. FIG. 1B is a diagram showing an example of an equivalent circuit diagram of the radio frequency power amplifier apparatus according to the first embodiment. FIG. 2A is a diagram showing an example of a plan view of a radio frequency power amplifier apparatus according to a second embodiment. FIG. 2B is a diagram showing an example of an equivalent circuit diagram of a radio frequency power amplifier apparatus according to the second embodiment. FIG. 3A is a diagram showing an example of a plan view of a radio frequency power amplifier apparatus according to a third embodiment. FIG. 3B is a diagram showing an example of an equivalent circuit diagram of a radio frequency power amplifier apparatus according to the third embodiment. FIG. 4A is a diagram showing an example of a plan view of a radio frequency power amplifier apparatus according to a fourth embodiment. FIG. 4B is a diagram showing an example of an equivalent circuit diagram of a radio frequency power amplifier apparatus according to the fourth embodiment. FIG. 4C is a diagram showing another example of a plan view of a radio frequency power amplifier apparatus according to the fourth embodiment. FIG. 4D is a diagram showing another example of an equivalent circuit diagram of a radio frequency power amplifier apparatus according to the fourth embodiment. FIG. 4E is a diagram showing another example of a plan view of a radio frequency power amplifier apparatus according to the fourth embodiment. FIG. 4F is a diagram showing another example of an equivalent circuit diagram of a radio frequency power amplifier apparatus according to the fourth embodiment. FIG. 5A is a diagram showing another example of a plan view of a radio frequency power amplifier apparatus according to the fourth embodiment. FIG. 5B is a diagram showing another example of an equivalent circuit diagram of a radio frequency power amplifier device according to embodiment 4. FIG. 6 is an example of an enlarged plan view of the gate side of an RF transistor of a radio frequency power amplifier device according to embodiment 5. FIG. 7A is a diagram showing another example of an equivalent circuit diagram of a shunt circuit of a radio frequency power amplifier device according to embodiment 1. FIG. 7B is a diagram showing an example of a plan view of the shunt circuit of FIG. 7A. FIG. 7C is a diagram showing an example of a cross-sectional structure taken along the D-D' section line of FIG. 7B. FIG. 7D is a diagram showing another example of a plan view of the shunt circuit of FIG. 7A. FIG. 7E is a diagram showing an example of a cross-sectional structure taken along the D-D' section line of FIG. 7D. FIG. 7F is a diagram showing another example of a cross-sectional structure taken along the D-D' section line of FIG. 7D. FIG. 8A is a diagram showing an example of a plan view of a radio frequency power amplifier device according to embodiment 7. FIG. 8B is a diagram showing an example of a cross-sectional structure of a radio frequency power amplifier device according to embodiment 7 taken along the C-C' section line of FIG. 8A. FIG. 8C is a diagram showing another example of a cross-sectional structure diagram of the high frequency power amplifier device according to the seventh embodiment taken along the line CC' in FIG. 8A.FIG. 9 is a diagram showing an example of a plan view of a high frequency power amplifier device according to the eighth and ninth embodiments.

[0013] Hereinafter, high frequency power amplifier devices according to embodiments will be described in detail with reference to the drawings. Note that each of the embodiments described below represents a specific example of the present disclosure. The numerical values, shapes, materials, components, component placement positions, and connection configurations shown in the following embodiments are merely examples and are not intended to limit the present disclosure. Furthermore, each drawing is not necessarily an exact illustration. In each drawing, substantially identical components are assigned the same reference numerals, and duplicated descriptions may be omitted or simplified.

[0014] Furthermore, unless otherwise specified, in the stacking direction of the stacked structure of the submount substrate and semiconductor substrate that constitute the high frequency power amplifier device, the direction from the submount substrate toward the semiconductor substrate is "up," and conversely, the direction from the semiconductor substrate toward the submount substrate is "down." Furthermore, a "top view" or a "top view of the high frequency power amplifier device" refers to the direction in which the high frequency power amplifier device is viewed from above. A "plan view" refers to a view of the high frequency power amplifier device viewed from above. Furthermore, a "cross-sectional view" or a "cross-sectional view of the high frequency power amplifier device" refers to the direction in which a cross section obtained by cutting the high frequency power amplifier device along a plane parallel to the stacking direction is viewed.

[0015] First Embodiment A high frequency power amplifier according to a first embodiment will be described with reference to FIGS. 1A and 1B.

[0016] 1A is a diagram showing an example of a plan view of a radio frequency power amplifier 100 according to embodiment 1. The radio frequency power amplifier 100 includes a submount substrate 1, a semiconductor substrate 4 mounted on the submount substrate 1, and a plurality of unit amplifiers 5 mounted on the semiconductor substrate 4.

[0017] The submount substrate 1 is a substrate made of, for example, an epoxy resin.

[0018] The submount substrate 1 has a first wiring pattern 2 and a second wiring pattern 3 .

[0019] A semiconductor substrate 4 is mounted on the submount substrate 1 .

[0020] The semiconductor substrate 4 is a substrate on which an amplifier for amplifying a high-frequency signal is mounted, and in this embodiment, a plurality of unit amplifiers 5 (two in FIG. 1A) are formed on the semiconductor substrate 4.

[0021] Each of the multiple unit amplifiers 5 is composed of an RF (radio frequency) transistor 10 with a multi-finger configuration consisting of one or more source fingers 6, one or more gate fingers 7, and one or more drain fingers 8, a gate bus line 11 that commonly connects the one or more gate fingers 7, one or more input bonding pads 12, a drain bus line 17 that commonly connects the one or more drain fingers 8, and a shunt circuit 14.

[0022] The source fingers 6 of the RF transistor 10 are connected to one or more ground vias 9. The ground vias 9 penetrate the semiconductor substrate 4 and provide electrical continuity between the ground terminals on the top and bottom surfaces of the semiconductor substrate 4.

[0023] The input bonding pad 12 is connected to the gate bus line 11 .

[0024] One end of the shunt circuit 14 is connected to the input bonding pad 12, and the other end is connected to the ground potential through the ground via 9. In the shunt circuit 14, a semiconductor inductor 15 and a MIM (Metal-Insulator-Metal) capacitor 16 are connected in series.

[0025] The plurality of input wires 18 have one end connected to the input bonding pad 12 and the other end connected to the first wiring pattern 2. In other words, the plurality of input wires 18 are wires that transmit RF signals input to the plurality of unit amplifiers 5, and each of the plurality of unit amplifiers 5 includes a plurality of input wires that connect the first wiring pattern 2 to the input bonding pad 12 of the unit amplifier 5.

[0026] The plurality of output wires 19 have one end connected to the drain bus line 17 and the other end connected to the second wiring pattern 3. Here, the drain bus line 17 also serves as an output bonding pad.

[0027] A plurality of unit amplifiers 5 (two in FIG. 1A ) are present on the semiconductor substrate 4, and the gate bus lines 11 of the plurality of unit amplifiers 5 are all physically separated from one another. In addition, the drain bus lines 17 of the plurality of unit amplifiers 5 are connected by drain connection wiring 20.

[0028] The high frequency signal is split into two (for two unit amplifiers 5) on the first wiring pattern 2, and then each is input to the unit amplifiers 5 via multiple input wires 18. Each of the input high frequency signals is amplified by the unit amplifiers 5, and then transmitted to the second wiring pattern 3 via multiple output wires 19, and then combined on the second wiring pattern 3.

[0029] The drain bus line 17, the plurality of output wires 19, and the second wiring pattern 3 are not essential components.

[0030] 1B is a diagram showing an example of an equivalent circuit diagram of the high frequency power amplifier device 100 according to embodiment 1. Note that parts that are not important for the explanation of this figure, such as the submount substrate 1 and the semiconductor substrate 4, are omitted in FIG.

[0031] Each of the two unit amplifiers 5 is composed of an RF transistor 10, a gate bus line 11 that commonly connects the gates of the RF transistors 10, an input bonding pad 12, an input wire 18, a drain bus line 17 that commonly connects the drains of the RF transistors 10, an output wire 19, and a shunt circuit 14. For simplicity, the input bonding pad 12, the input wire 18, and the output wire 19 that are shown as multiple wires in FIG. 1A are combined into one wire each.

[0032] The input bonding pad 12 is connected to the gate bus line 11 .

[0033] There are a plurality of unit amplifiers 5 (two in FIG. 1B ), and the gate bus lines 11 of the plurality of unit amplifiers 5 are physically separated from each other. The drain bus lines 17 of the plurality of unit amplifiers 5 are connected by drain connection wiring 20.

[0034] The input wire 18 has one end connected to the input bonding pad 12 and the other end connected to the first wiring pattern 2 .

[0035] One end of the output wire 19 is connected to the drain bus line 17, and the other end is connected to the second wiring pattern 3. Here, the drain bus line 17 also serves as an output bonding pad.

[0036] One end of the shunt circuit 14 is connected to the input bonding pad 12, and the other end is connected to the ground potential via the ground via 9. The shunt circuit 14 also has a semiconductor inductor 15 and an MIM capacitor 16 connected in series. Since Fig. 1B is an equivalent circuit diagram, the semiconductor inductor 15, input wire 18, and output wire 19 are depicted as inductors. The semiconductor inductor is an inductor formed on the semiconductor substrate 4 by a semiconductor manufacturing process such as lithography for forming metal wiring.

[0037] The high frequency signal is split into two on the first wiring pattern 2, and each of the split high frequency signals is input to the unit amplifier 5 via the input wire 18. Each of the input high frequency signals is amplified by the unit amplifier 5, and then transmitted to the second wiring pattern 3 via the output wire 19, and combined on the second wiring pattern 3.

[0038] When laying out RF transistors with large gate widths on a semiconductor substrate, it is common to subdivide the RF transistor and set up unit units to a degree that does not cause instability due to characteristic variations or oscillation, and configure multiple units. Here, such units are defined as unit amplifiers 5.

[0039] In FIGS. 1A and 1B, six gate fingers 7 with a finger length of 350 μm are defined as one unit, and two units are arranged in parallel to achieve a total gate width of 4.2 mm for the RF transistor 10.

[0040] The resonant frequency of the shunt circuit 14 is determined by the inductance of the semiconductor inductor 15 and the capacitance of the MIM capacitor 16. When the amplification operating frequency of the RF transistor 10 is 3.5 GHz to 4.0 GHz, the resonant frequency of the shunt circuit 14 may be set to 2 GHz or lower (approximately 40% or more lower than the lower limit frequency of the amplification operating frequency).

[0041] The RF transistor 10 may be made of GaN, GaAs, LDMOS (Laterally Diffused Metal Oxide Semiconductor), etc. When the RF transistor 10 is a GaN transistor, the inductance of the semiconductor inductor 15 is preferably in the range of 0.1 nH to 2.0 nH.

[0042] The capacitance of the MIM capacitor 16 may be set to a large value (for example, 20 pF or more) for DC blocking.

[0043] As a layout method for arranging a plurality of unit amplifiers 5, the plurality of unit amplifiers 5 may be arranged so that they are positioned in a positional relationship in which one unit amplifier 5 is shifted in parallel at a certain interval, as shown in FIG. 1A, or the plurality of unit amplifiers 5 may be arranged so that they are positioned in a positional relationship in which one unit amplifier 5 is upside down in top view with the center of the gate bus line 11 of the unit amplifier 5 as the center.

[0044] The multiple input wires 18 are used as part of an input matching circuit, and the shunt circuit 14 is used to secure bandwidth and power.

[0045] The input wire 18 is required to be inductive and have low resistance, whereas the semiconductor inductor 15 of the shunt circuit 14 is required to have small variations in inductance.

[0046] The inductance of the input wire 18 is set by selecting the length and number of wires, and when the inductance is to be reduced, multiple wires are provided.

[0047] As described above, the radio frequency power amplifier 100 according to the first embodiment includes the submount substrate 1 having the first wiring pattern 2, the semiconductor substrate 4 mounted on the submount substrate 1, a plurality of unit amplifiers 5 mounted on the semiconductor substrate 4, and a plurality of input wires 18 for transmitting RF signals input to the plurality of unit amplifiers 5. Each of the plurality of unit amplifiers 5 includes an RF transistor 10 having a plurality of gate fingers 7, a gate bus line 11 connecting the plurality of gate fingers 7 of the RF transistor 10, and an input bonder 12 connected to the gate bus line 11. The input wiring pattern 2 includes a first wiring pattern 2 and a shunt circuit 14 having one end connected to the input bonding pad 12 and the other end connected to a ground potential, and the plurality of input wires 18 include, for each of the plurality of unit amplifiers 5, a plurality of input wires connecting the first wiring pattern 2 and the input bonding pad 12 of the unit amplifier 5, the gate bus lines 11 of each of the plurality of unit amplifiers 5 are all arranged physically separated from each other, and the shunt circuit 14 of each of the plurality of unit amplifiers 5 includes a semiconductor inductor 15 and an MIM capacitor 16 connected in series.

[0048] When using input wires 18, it is possible to average out variations in wire length and reduce the effects of variations by increasing the number of wires per unit amplifier 5 and per high frequency power amplifier device 100. This increases the degree of freedom in designing wire length, making design easier.

[0049] The semiconductor inductor 15 of the shunt circuit 14 is formed not by a wire but by wiring placed on the semiconductor substrate 4, and the parasitic resistance that is a characteristic of the semiconductor inductor 15 makes it possible to increase the input impedance, i.e., to realize a wide bandwidth of the matching circuit.

[0050] This realizes a high frequency power amplifier 100 that can reduce the influence of variations in wire length and suppress variations in high frequency characteristics such as gain within a semiconductor substrate and variations between high frequency power amplifiers.

[0051] In FIG. 1A, the RF transistor 10 is shown as having four source fingers 6, six gate fingers 7, and three drain fingers 8, but the number of fingers is not limited to these.

[0052] In addition, in FIG. 1A, the input bonding pad 12 is divided into three parts, and one input wire 18 is connected to each of them, but multiple input wires 18 may be connected.

[0053] Furthermore, resistors may be inserted between the gate bus lines 11 and / or between the drain bus lines 17 of the unit amplifiers 5 to prevent loop oscillation.

[0054] Furthermore, the shunt circuit 14 is connected in series from the input bonding pad 12 to the semiconductor inductor 15, the MIM capacitor 16, and the ground via 9 in this order, but the order may also be MIM capacitor 16, semiconductor inductor 15, and ground via 9.

[0055] The submount substrate 1 may also be a laminated substrate in which multiple resin layers are stacked. Alternatively, the submount substrate 1 may be a lead frame or a package with a cavity structure, instead of a substrate made of resin.

[0056] Furthermore, the input wires 18 may have different lengths.

[0057] The MIM capacitor 16 may also be a parallel plate capacitor.

[0058] Furthermore, although the semiconductor inductor 15 is shown in a spiral shape in the layout of the plan view, it may also be in a meander shape.

[0059] Second Embodiment A high frequency power amplifier according to a second embodiment will be described with reference to FIGS. 2A and 2B.

[0060] Fig. 2A is a diagram showing an example of a plan view of a radio frequency power amplifier apparatus 200 according to embodiment 2. Fig. 2B is a diagram showing an example of an equivalent circuit diagram of the radio frequency power amplifier apparatus 200 according to embodiment 2.

[0061] Hereinafter, a radio frequency power amplifier 200 according to the second embodiment will be described, focusing on the differences from the radio frequency power amplifier 100 according to the first embodiment.

[0062] In the first embodiment, there are multiple unit amplifiers 5 (two in FIGS. 1A and 1B), but in the second embodiment, there is only one unit amplifier 5. Therefore, in the cases of FIGS. 2A and 2B, six gate fingers 7, each having a finger length of 350 μm, form one unit, thereby achieving a total gate width of 2.1 mm for the RF transistor 10.

[0063] As shown in FIG. 2A, the shunt circuit 14 is arranged inside the width determined by two auxiliary lines 21 drawn perpendicular to the gate bus line 11 from both ends of the gate bus line 11 toward the shunt circuit 14 (i.e., in the region sandwiched between the two auxiliary lines 21).

[0064] Most of the high frequency signal transmitted through the multiple input wires 18 is transmitted to the entire RF transistor 10 via the gate bus lines 11, but a portion leaks toward the shunt circuit 14. In this case, by narrowing the distribution of the high frequency signal in the shunt circuit 14 compared to the gate bus lines 11, the loss toward the back surface of the semiconductor substrate 4 can be reduced.

[0065] As described above, the radio frequency power amplifier 200 according to the second embodiment comprises the submount substrate 1 having the first wiring pattern 2, the semiconductor substrate 4 mounted on the submount substrate 1, one unit amplifier 5 mounted on the semiconductor substrate 4, and a plurality of input wires 18 for transmitting an RF signal input to the one unit amplifier 5. Each unit amplifier 5 comprises an RF transistor 10 having a plurality of gate fingers 7, a gate bus line 11 connecting the plurality of gate fingers 7 of the RF transistor 10, an input bonding pad 12 connected to the gate bus line 11, and a shunt circuit 14 having one end connected to the input bonding pad 12 and the other end connected to ground potential. The shunt circuit 14 includes a semiconductor inductor 15 and an MIM capacitor 16 connected in series. When two auxiliary lines 21 are drawn from each end of the gate bus line 11 toward the shunt circuit 14, the shunt circuit 14 is disposed in a region sandwiched between the two auxiliary lines 21.

[0066] By adopting such a configuration as described in the first embodiment, in addition to the effect of reducing the influence of variations, the shunt circuit 14 is disposed in a region sandwiched between two auxiliary lines 21 that are drawn from each end of the gate bus line 11 toward the shunt circuit 14 in a direction perpendicular to the gate bus line 11. This reduces dispersion of the high-frequency signal toward the back surface of the semiconductor substrate 4, thereby reducing losses, that is, suppressing deterioration of gain and efficiency.

[0067] Third Embodiment A high frequency power amplifier according to a third embodiment will be described with reference to FIGS. 3A and 3B.

[0068] Fig. 3A is a diagram showing an example of a plan view of a radio frequency power amplifier apparatus 300 according to embodiment 3. Fig. 3B is a diagram showing an example of an equivalent circuit diagram of the radio frequency power amplifier apparatus 300 according to embodiment 3. The radio frequency power amplifier apparatus 300 according to embodiment 3 has a configuration in which a plurality of shunt circuits 14 are provided per unit amplifier 5 in the radio frequency power amplifier apparatus 100 according to embodiment 1, or a configuration in which a plurality of shunt circuits 14 are provided per unit amplifier 5 in the radio frequency power amplifier apparatus 200 according to embodiment 2.

[0069] The following describes a radio frequency power amplifier apparatus 300 according to the third embodiment, taking as an example a configuration based on the radio frequency power amplifier apparatus 100 according to the first embodiment, focusing on the differences from the radio frequency power amplifier apparatus 100 according to the first embodiment.

[0070] In the first embodiment, there are multiple unit amplifiers 5 (two in FIGS. 1A and 1B), but in the third embodiment, there is only one unit amplifier 5. Therefore, in the cases of FIGS. 3A and 3B, twelve gate fingers 7, each having a finger length of 350 μm, form one unit, thereby achieving a total gate width of 4.2 mm for the unit amplifier 5.

[0071] There are multiple shunt circuits 14 (two in FIGS. 3A and 3B ) per unit amplifier 5. When there are multiple shunt circuits 14, it is desirable that the inductance of the semiconductor inductor 15 and the capacitance of the MIM capacitor 16 are the same in the multiple shunt circuits 14. This means that the resonant frequencies of the multiple shunt circuits 14 are the same.

[0072] In this embodiment, there are six input wires 18 and four output wires 19 per unit amplifier 5, which is the same total number as in the high frequency power amplifier 100 of the first embodiment.

[0073] When the total gate width of the RF transistor 10 is large, the input impedance on the gate side becomes small. Because the shunt circuit 14 is connected to the gate side of the RF transistor 10, the impedance of the shunt circuit 14 also needs to be small to reduce loss. Therefore, by providing multiple shunt circuits 14 for each unit amplifier 5 as in this embodiment, it is possible to reduce the impedance while maintaining a constant resonant frequency.

[0074] As described above, the radio frequency power amplifier device 300 according to the third embodiment has a plurality of shunt circuits 14 per unit amplifier 5 in the radio frequency power amplifier device 100 according to the first embodiment or the radio frequency power amplifier device 200 according to the second embodiment, and the resonant frequencies of the plurality of shunt circuits 14 are equal.

[0075] By adopting such a configuration of the third embodiment, in addition to the effect of reducing the influence of variations described in the first or second embodiment, it is possible to reduce losses in the high frequency power amplifier device 300, that is, to suppress deterioration of gain and efficiency, by lowering the input impedance of the RF transistor 10. This is particularly effective when the total gate width of the unit amplifiers 5 is large.

[0076] 3A and 3B show the case where there is one unit amplifier 5, there may be multiple unit amplifiers 5. In other words, there may be multiple unit amplifiers 5, and multiple shunt circuits 14 may be provided for each of the multiple unit amplifiers 5.

[0077] Furthermore, when there are a plurality of shunt circuits 14, the inductance of the semiconductor inductor 15 and the capacitance of the MIM capacitor 16 may be different as long as they have the same resonant frequency.

[0078] Fourth Embodiment A high frequency power amplifier device according to a fourth embodiment will be described with reference to FIGS. 4A to 4F, 5A, and 5B.

[0079] 4A is a diagram showing an example of a plan view of a radio frequency power amplifier apparatus 400 according to embodiment 4. FIG. 4B is a diagram showing an example of an equivalent circuit diagram of the radio frequency power amplifier apparatus 400 according to embodiment 4. The radio frequency power amplifier apparatus 400 according to embodiment 4 has a configuration in which a resistive element 22, which is an example of an impedance element including a resistive component that connects two shunt circuits 14, is added to the radio frequency power amplifier apparatus 300 according to embodiment 3. Note that the example shown in FIGS. 4A and 4B will be described assuming that there is one unit amplifier 5 and a plurality of shunt circuits 14 in the unit amplifier 5.

[0080] Hereinafter, a radio frequency power amplifier 400 according to the fourth embodiment will be described, focusing on the differences from the radio frequency power amplifier 300 according to the third embodiment.

[0081] When there is one unit amplifier 5 and a plurality of shunt circuits 14 in the unit amplifier 5, the configuration is basically the same as that described in the third embodiment.

[0082] However, in this embodiment, a connection point between the semiconductor inductor 15 and the MIM capacitor 16 in one shunt circuit 14 and a connection point between the semiconductor inductor 15 and the MIM capacitor 16 in another shunt circuit 14 are electrically connected to each other using a resistive element 22, which is an example of an impedance element including a resistive component. Note that although the resistive element 22 is used as the impedance element including a resistive component in Figures 4A and 4B, another impedance element including a resistive component may also be used.

[0083] 4C is a diagram showing another example of a plan view of the radio frequency power amplifier apparatus 400 according to embodiment 4 (i.e., an example of a plan view of the radio frequency power amplifier apparatus 400a), and FIG. 4D is a diagram showing another example of an equivalent circuit diagram of the radio frequency power amplifier apparatus 400 according to embodiment 4 (i.e., an example of an equivalent circuit diagram of the radio frequency power amplifier apparatus 400a).

[0084] In this high frequency power amplifier device 400a, a connection point between the semiconductor inductor 15 and the MIM capacitor 16 in one shunt circuit 14 and a connection point between the semiconductor inductor 15 and the MIM capacitor 16 in another shunt circuit 14 are electrically connected using a resistive element 22, which is an example of an impedance element including a resistance component, and a capacitor 23, which is an example of a DC blocking element, connected in series with the resistive element 22. According to this configuration, the capacitor 23 blocks the connection points of the two shunt circuits 14 from each other in terms of DC.

[0085] 4E is a diagram showing another example of a plan view of the radio frequency power amplifier apparatus 400 according to embodiment 4 (i.e., an example of a plan view of the radio frequency power amplifier apparatus 400b), and FIG. 4F is a diagram showing another example of an equivalent circuit diagram of the radio frequency power amplifier apparatus 400 according to embodiment 4 (i.e., an example of an equivalent circuit diagram of the radio frequency power amplifier apparatus 400b).

[0086] In this high frequency power amplifier device 400b, the connection point between the semiconductor inductor 15 and the MIM capacitor 16 in one shunt circuit 14 and the connection point between the semiconductor inductor 15 and the MIM capacitor 16 in another shunt circuit 14 are short-circuited by a short-circuiting wire 24 on the semiconductor substrate 4, and further, a resistive element 22, which is an example of an impedance element including a resistance component, and a capacitor 23, which is an example of a DC blocking element connected in series with the resistive element 22, are connected between the short-circuiting wire 24 and the ground via 9. According to this configuration, the connection points of the two shunt circuits 14 are short-circuited, but these connection points have an impedance with respect to the ground potential that corresponds to the series connection of the resistive element 22 and the capacitor 23.

[0087] 5A is a diagram showing another example of a plan view of the radio frequency power amplifier apparatus 400 according to embodiment 4 (i.e., an example of a plan view of the radio frequency power amplifier apparatus 400c). FIG. 5B is a diagram showing another example of an equivalent circuit diagram of the radio frequency power amplifier apparatus 400 according to embodiment 4 (i.e., an example of an equivalent circuit diagram of the radio frequency power amplifier apparatus 400c). The radio frequency power amplifier apparatus 400c includes a plurality of unit amplifiers 5 and one shunt circuit 14 within the unit amplifier 5.

[0088] The following description of the high frequency power amplifier device 400c will focus on the differences from the high frequency power amplifier device 100 according to the first embodiment.

[0089] When there are a plurality of unit amplifiers 5 and one shunt circuit 14 in each unit amplifier 5, the configuration is basically the same as that described in the first embodiment.

[0090] However, a connection point between the semiconductor inductor 15 and the MIM capacitor 16 in one shunt circuit 14 and a connection point between the semiconductor inductor 15 and the MIM capacitor 16 in another shunt circuit 14 are electrically connected to each other. Note that, although the examples of Figures 5A and 5B use the resistor element 22 as an impedance element including a resistance component, other impedance elements including a resistance component may also be used.

[0091] When there are multiple shunt circuits 14, ideally they would have exactly the same characteristics, but there are manufacturing variations in the inductance of the semiconductor inductor 15 and the capacitance of the MIM capacitor 16. Therefore, in reality, the resonant frequencies of the multiple shunt circuits are different from each other.

[0092] As a result, the impedance of the unit amplifier as seen from the first wiring pattern becomes high at a specific frequency due to variations in the resonant frequency of the shunt circuit. Therefore, in this embodiment, the connection point between the semiconductor inductor 15 and the MIM capacitor 16 in one shunt circuit 14 and the connection point between the semiconductor inductor 15 and the MIM capacitor 16 in another shunt circuit 14 are connected by an impedance element, thereby averaging out the variations in the resonant frequency due to manufacturing variations and preventing the impedance from becoming high at a specific frequency. A typical value of the resistor element 22, which is an example of an impedance element, is approximately 5 Ω to 50 Ω.

[0093] As described above, the radio frequency power amplifier devices 400 to 400c according to the fourth embodiment include, in addition to the configuration of the radio frequency power amplifier device 300 according to the third embodiment, an impedance element including a resistance component that electrically connects the connection point between the semiconductor inductor 15 and the MIM capacitance 16 included in one of the plurality of shunt circuits 14 and the connection point between the semiconductor inductor 15 and the MIM capacitance 16 included in another of the plurality of shunt circuits 14.

[0094] By adopting such a configuration as in embodiment 4, in addition to the effect of reducing the influence of variations as described in embodiment 1, it is possible to stabilize impedance variations in multiple shunt circuits by averaging the variations in resonant frequency.

[0095] The impedance element may also serve to prevent loop oscillation, similar to the resistors connected between the gate bus lines 11 and / or between the drain bus lines 17 of the plurality of unit amplifiers 5 described in the first embodiment.

[0096] Fifth Embodiment A radio frequency power amplifier according to a fifth embodiment will be described with reference to Fig. 6. The radio frequency power amplifier according to the fifth embodiment corresponds to an example characterized by the layout of the gate side of the RF transistor 10 in the radio frequency power amplifier 100 according to the first embodiment or the radio frequency power amplifier 200 according to the second embodiment.

[0097] FIG. 6 is an example of an enlarged plan view showing the gate side of the RF transistor 10 of the high frequency power amplifier device 100 according to the fifth embodiment.

[0098] Each of the plurality of input bonding pads 12 is connected to a gate bus line 11. There are a plurality of input bonding pads 12 (three in FIG. 6), and they are arranged at regular intervals.

[0099] Each of the two connection portions 13 connects adjacent input bonding pads 12 together.

[0100] The two connection portions 13 are formed in the same metal layer as the input bonding pads 12 (i.e., made of the same material and in the same manufacturing process), so that the two connection portions 13 are the same as the input bonding pads 12 in at least one of thickness, material, and height position from the bottom surface of the semiconductor substrate 4.

[0101] In a direction perpendicular to the gate bus line 11 on the semiconductor substrate 4 (i.e., in the direction in which the input bonding pads 12 extend), the width (shown as A in FIG. 6) of each of the two connection portions 13 is shorter than the length (shown as B in FIG. 6) of the input bonding pads 12. The minimum dimension of the width A of the connection portion 13 is the minimum value of the semiconductor process design rule (e.g., about 5 μm), and the maximum dimension is the length B of the input bonding pad 12 (e.g., about 100 μm).

[0102] Generally, input bonding pads are sometimes combined into one without being divided into multiple pads as shown in FIG. 6, but in the method of dividing into multiple pads as in this embodiment, the area of ​​each bonding pad can be made smaller than when combined into one pad, thereby reducing parasitic capacitance.

[0103] Furthermore, if the connection portions 13 were not present, the potential of the radio frequency signal input to the three input bonding pads 12 via the input wires (not shown) would vary from one input bonding pad 12 to another, and the non-constant potential would cause non-uniform operation of the RF transistor 10. Therefore, in this embodiment, the three input bonding pads 12 are connected by two connection portions 13, and the potential of the radio frequency signal is made uniform on the three input bonding pads 12, and then the DC voltage and radio frequency voltage to each finger of the RF transistor 10 are made uniform, thereby enabling uniform amplification operation.

[0104] As described above, in the radio frequency power amplifier device according to the fifth embodiment, in the radio frequency power amplifier device 100 according to the first embodiment or the radio frequency power amplifier device 200 according to the second embodiment, the unit amplifier 5 has a plurality of input bonding pads 12, and the unit amplifier 5 further has a connection portion 13 that connects two adjacent input bonding pads 12 out of the plurality of input bonding pads 12, and the connection portion 13 is the same as the plurality of input bonding pads 12 in at least one of the thickness, material, and height position from the bottom surface of the semiconductor substrate 4, and the width of the connection portion 13 in the direction perpendicular to the gate bus line 11 is shorter than the length of the plurality of input bonding pads 12.

[0105] By adopting such a configuration of the fifth embodiment, the area of ​​each input bonding pad 12 can be made smaller than when the individual input bonding pads 12 are combined into one, thereby reducing the associated parasitic capacitance and reducing input-side loss, i.e., making it possible to suppress deterioration in the gain and efficiency of the high frequency power amplifier device 100. This is particularly effective when the operating frequency is high.

[0106] The metal used for the connection portion 13 is gold, aluminum, or copper, but is not limited to these.

[0107] 7A to 7F, a radio frequency power amplifier according to the sixth embodiment will be described. The radio frequency power amplifier according to the sixth embodiment corresponds to an example in which the layout of the shunt circuit 14 in the radio frequency power amplifier 100 according to the first embodiment or the radio frequency power amplifier 200 according to the second embodiment is modified.

[0108] FIG. 7A is a diagram showing another example of an equivalent circuit diagram of the shunt circuit 14 of the high frequency power amplifier device 100 according to the first embodiment, as an example of the sixth embodiment.

[0109] The shunt circuit 14 shown in Figure 1B is connected in series from the input bonding pad 12 to the semiconductor inductor 15, the MIM capacitor 16, and the ground via 9 in this order, whereas in this embodiment, as shown in Figure 7A, the shunt circuit 14 is connected in series from the input bonding pad 12 to the MIM capacitor 16, the semiconductor inductor 15, and the ground via 9 in this order.

[0110] FIG. 7B is a diagram showing an example of a plan view of the shunt circuit 14 of FIG. 7A.

[0111] The input bonding pad 12 and the connection portion 13 are arranged so as to overlap the MIM capacitor 16 in a top view. That is, the MIM capacitor 16 is arranged below the input bonding pad 12 in a cross-sectional view of the high-frequency power amplifier device 100. The input bonding pad 12 and / or the connection portion 13 are electrically connected to the upper electrode of the MIM capacitor 16.

[0112] One end of the semiconductor inductor 15 is connected to the lower electrode of the MIM capacitor 16 , and the other end is connected to the ground via 9 through a semiconductor inductor lead-out wiring 49 .

[0113] The ground via 9 penetrates the semiconductor substrate 4 and electrically connects the ground terminals on the upper and lower surfaces of the semiconductor substrate 4 .

[0114] FIG. 7C is a diagram showing an example of a cross-sectional structure diagram taken along the line DD' in FIG. 7B.

[0115] The input bonding pad 12 and the semiconductor inductor 15 are formed of the same metal layer (i.e., the same material and the same manufacturing process). The MIM capacitor lower electrode 43 is directly connected to one end of the semiconductor inductor 15 through an opening in the interlayer film 42. The MIM capacitor upper electrode 44 is directly connected to the input bonding pad 12 through an opening in the interlayer film 42. The other end of the semiconductor inductor 15 is connected to the ground via 9 through a semiconductor inductor lead-out wiring 49 (not shown). The semiconductor inductor lead-out wiring 49 is formed of a different metal layer (i.e., a different manufacturing process) from the semiconductor inductor 15. For example, the same metal layer as the MIM capacitor lower electrode 43 may be used.

[0116] The ground via 9 penetrates the semiconductor substrate 4 and electrically connects the upper surface of the semiconductor substrate 4 to the ground terminal on the lower surface (not shown).

[0117] 7D is a diagram showing another example of a plan view (i.e., FIG. 7B) of the shunt circuit 14 of FIG. 7A. The difference from FIG. 7B is that not only the input bonding pad 12 and the connection portion 13 but also the semiconductor inductor 15 overlaps with the MIM capacitor 16 in top view.

[0118] That is, the input bonding pad 12 and the connection portion 13 are arranged so as to overlap the MIM capacitor 16 in a top view. The input bonding pad 12 and / or the connection portion 13 are electrically connected to the lower electrode of the MIM capacitor 16. In addition, the semiconductor inductor 15 is arranged so as to overlap the MIM capacitor 16 in a top view. One end is connected to the upper electrode of the MIM capacitor 16, and the other end is connected to the ground via 9.

[0119] The ground via 9 penetrates the semiconductor substrate 4 and electrically connects the ground terminals on the upper and lower surfaces of the semiconductor substrate 4 .

[0120] 7E is a diagram showing an example of a cross-sectional structure diagram taken along the line DD' in FIG. 7D. The input bonding pad 12 and the semiconductor inductor 15 are formed of different metal layers. The MIM capacitor lower electrode 43 is directly connected to the input bonding pad 12 through openings in the interlayer film 42 and the first protective film 46. The MIM capacitor upper electrode 44 is directly connected to one end of the semiconductor inductor 15 through an opening in the interlayer film 42. The other end of the semiconductor inductor 15 is connected to the ground via 9.

[0121] The ground via 9 penetrates the semiconductor substrate 4 and electrically connects the ground terminals on the upper and lower surfaces of the semiconductor substrate 4 .

[0122] Fig. 7F is a diagram showing another example of a cross-sectional structure diagram taken along the line DD' in Fig. 7D. The difference from Fig. 7E is that the semiconductor inductor 15 is formed lower than the MIM capacitor lower electrode 43 of the MIM capacitor 16 in the cross-sectional view.

[0123] The input bonding pad 12 and the semiconductor inductor 15 are formed of different metal layers. The MIM capacitor lower electrode 43 is directly connected to one end of the semiconductor inductor 15 through an opening in the interlayer film 42. The MIM capacitor upper electrode 44 is directly connected to the input bonding pad 12 through an opening in the interlayer film 42. The other end of the semiconductor inductor 15 is connected to the ground via 9.

[0124] The ground via 9 penetrates the semiconductor substrate 4 and electrically connects the ground terminals on the upper and lower surfaces of the semiconductor substrate 4 .

[0125] The connection order of the semiconductor inductor 15 and MIM capacitor 16 of the shunt circuit 14 from the input bonding pad 12 has the same characteristics in both DC and high frequency.

[0126] On the other hand, when the layout is viewed from above, the input bonding pad 12 and the MIM capacitor 16 overlap, so the area occupied by them on the semiconductor substrate 4 can be made smaller than when they do not overlap.

[0127] As described above, in the radio frequency power amplifier device according to the sixth embodiment, in the radio frequency power amplifier device 100 according to the first embodiment or the radio frequency power amplifier device 200 according to the second embodiment, in shunt circuit 14, MIM capacitor 16 and semiconductor inductor 15 are connected in that order from the side closest to input bonding pad 12, and MIM capacitor 16 overlaps with input bonding pad 12 in a top view of radio frequency power amplifier device 100, and MIM capacitor 16 is disposed below input bonding pad 12 in a cross-sectional view of radio frequency power amplifier device 100.

[0128] By adopting such a configuration as in the sixth embodiment, the MIM capacitor 16 is arranged so as to overlap under the input bonding pad 12, and compared to the case where they do not overlap, the chip area of ​​the radio frequency power amplifier device can be reduced, which can consequently contribute to reducing the cost of the semiconductor chip as the radio frequency power amplifier device.

[0129] In this embodiment, the input bonding pad 12 does not protrude from the MIM capacitor 16 when viewed from above, but it may protrude partially.

[0130] Seventh Embodiment A high frequency power amplifier device according to a seventh embodiment will be described with reference to FIGS. 8A, 8B, and 8C.

[0131] 8A is a diagram showing an example of a plan view of a radio frequency power amplifier 500 according to embodiment 7. The radio frequency power amplifier 500 according to embodiment 7 has a configuration in which a shield metal layer 47 and the like are added to the radio frequency power amplifier 100 according to embodiment 1 or the radio frequency power amplifier 200 according to embodiment 2.

[0132] The following description will focus on the differences between the radio frequency power amplifier apparatus 500 according to the seventh embodiment and the radio frequency power amplifier apparatus 100 according to the first embodiment, taking as an example a case where the radio frequency power amplifier apparatus 500 according to the seventh embodiment is configured based on the radio frequency power amplifier apparatus 100 according to the first embodiment.

[0133] In this embodiment, there is an overlapping area between the multiple input wires 18 and the shunt circuit 14 when viewed from above, and a shield metal layer 47 is formed in an area that includes the semiconductor inductor 15 and the MIM capacitor 16 when viewed from above.

[0134] 8B is a diagram showing an example of a cross-sectional structure diagram of the high-frequency power amplifier device 500 according to the seventh embodiment, cut along an extension line (shown as CC') of the portion where the input wire 18 and the semiconductor inductor 15 overlap in FIG. 8A.

[0135] A first wiring pattern 2 and a semiconductor substrate 4 are mounted on the main surface of a submount substrate 1 .

[0136] The semiconductor substrate 4 is composed of a silicon substrate 41 , an interlayer film 42 , a first protective film 46 , and a second protective film 48 .

[0137] One end of the semiconductor inductor 15 is connected to the input bonding pad 12 , and the other end is connected to the semiconductor inductor lead wire 49 .

[0138] The MIM capacitor 16 is made up of an MIM capacitor lower electrode 43 and an MIM capacitor upper electrode 44, and is formed between interlayer films 42. A wiring 45 connects the MIM capacitor upper electrode 44 and a semiconductor inductor lead wiring 49. The MIM capacitor lower electrode 43 is connected to a ground via 9 (not shown in FIG. 8B ).

[0139] The input bonding pad 12, the semiconductor inductor 15, the drain finger 8, and the wiring 45 are formed on the interlayer film 42. As an example, the input bonding pad 12, the semiconductor inductor 15, the drain finger 8, and the wiring 45 are formed from the same metal layer.

[0140] The shield metal layer 47 is disposed in contact with the first protective film 46 and is disposed between the semiconductor inductor 15 and the MIM capacitor 16 and the input wire 18 in a cross-sectional view.

[0141] A second protective film 48 made of polyimide or the like is disposed on the shield metal layer 47 to protect the shield metal layer.

[0142] The shield metal layer 47 is formed of a metal layer different from that of the input bonding pad 12. Therefore, the shield metal layer 47 differs from the input bonding pad 12 in at least one of the thickness, material, and height position from the lower surface of the semiconductor substrate 4.

[0143] The shield metal layer 47 is connected to the ground potential through a ground via (not shown) on the semiconductor substrate 4 .

[0144] 8C is a diagram showing another example of a cross-sectional structure diagram of the high-frequency power amplifier device 500 according to embodiment 7 taken along the CC' cutting line in FIG. 8A (i.e., an example of a cross-sectional structure diagram of the high-frequency power amplifier device 500a).

[0145] 8B and 8C is that in Fig. 8C, the shield metal layer 47 is formed of the same metal layer as the input bonding pad 12, and the first protective film 46 also serves as a protective film for the shield metal layer 47. For this reason, the shield metal layer 47 is the same as the input bonding pad 12 in at least one of the thickness, material, and height position from the lower surface of the semiconductor substrate 4. In addition, the MIM capacitor upper electrode 44 is connected to the ground via 9 (not shown), and the MIM capacitor lower electrode 43 is connected to one end of the semiconductor inductor 15.

[0146] The semiconductor inductor 15 and the input wire 18 are each equivalent to an inductor, and possible means of suppressing interference between inductors include 1) making sure they do not overlap when viewed from above, 2) keeping them apart when viewed from above, and 3) placing a shield between them. However, when there are multiple input wires 18, as in this embodiment, 1) and 2) are difficult to achieve, and 3) placing a shield between them is the most effective and efficient method.

[0147] As described above, the radio frequency power amplifier device 500 according to the seventh embodiment further includes a shield metal layer 47 mounted on the semiconductor substrate 4 in the radio frequency power amplifier device 100 according to the first embodiment or the radio frequency power amplifier device 200 according to the second embodiment. The shield metal layer 47 (1) is formed in a region that includes the semiconductor inductor 15 and the MIM capacitor 16 when viewed from above the radio frequency power amplifier device 100, (2) is disposed between the multiple input wires 18 and the shunt circuit 14 and is grounded when viewed from a cross section of the radio frequency power amplifier device 100, (3) differs from the input bonding pad 12 in at least one of thickness, material, and height position from the bottom surface of the semiconductor substrate 4, and (4) has a second protective film 48 that covers the upper part of the shield metal layer 47, and the multiple input wires 18 overlap with the shunt circuit 14 when viewed from above.

[0148] In another example, a radio frequency power amplifier 500 a according to the seventh embodiment is the radio frequency power amplifier 100 according to the first embodiment or the radio frequency power amplifier 200 according to the second embodiment, further comprising a shield metal layer 47 mounted on the semiconductor substrate 4, wherein the shield metal layer 47 (1) is formed in a region that includes the semiconductor inductor 15 and the MIM capacitor 16 in a top view of the radio frequency power amplifier 100, (2) is disposed between the multiple input wires 18 and the shunt circuit 14 and is grounded in a cross-sectional view of the radio frequency power amplifier 100, (3) has the same thickness, material, and / or height position from the bottom surface of the semiconductor substrate 4 as the input bonding pad 12, and (4) has a second protective film 48 that covers the upper part of the shield metal layer 47, and the multiple input wires 18 overlap with the shunt circuit 14 in a top view.

[0149] As in the configuration of embodiment 7, by placing a shield metal layer 47 between the semiconductor inductor 15 and the input wire 18 and suppressing interference between the inductors, parasitic oscillation can be prevented and stable operation can be achieved.

[0150] The shield metal layer 47 may be floating rather than being fixed at a fixed potential.

[0151] In addition, in FIG. 8B, the MIM capacitor upper electrode 44 is connected to the wiring 45 and the MIM capacitor lower electrode 43 is connected to the ground via 9, but the connections may be reversed.

[0152] In addition, in FIG. 8C, the MIM capacitor upper electrode 44 is connected to the ground via 9 and the MIM capacitor lower electrode 43 is connected to the semiconductor inductor 15, but the connections may be reversed.

[0153] Eighth Embodiment A high frequency power amplifier according to an eighth embodiment will be described with reference to FIG.

[0154] 9 is a diagram showing an example of a plan view of a radio frequency power amplifier 600 according to embodiment 8. The radio frequency power amplifier 600 according to embodiment 8 corresponds to an example in which the resonant frequency of the shunt circuit 14 in the radio frequency power amplifier 100 according to embodiment 1 or the radio frequency power amplifier 200 according to embodiment 2 is limited to a specific value.

[0155] Hereinafter, the radio frequency power amplifier device 600 according to the eighth embodiment will be described, taking as an example a case where it is configured based on the radio frequency power amplifier device 200 according to the second embodiment, focusing on the differences from the radio frequency power amplifier device 200 according to the second embodiment.

[0156] The submount substrate 1, the drain bus line 17, the plurality of input wires 18, and the plurality of output wires 19 are not essential components.

[0157] A high frequency signal is input to the unit amplifier 5 from the first wiring pattern 2 via three input wires 18. After being amplified by the unit amplifier 5, the high frequency signal is output from the second wiring pattern 3 via two output wires 19.

[0158] During operation of the high frequency power amplifier 600, a closed loop signal flow exists as indicated by the dotted arrow. When an external interference signal having a frequency equal to half the frequency (f0) of the fundamental signal (f0 / 2) is input to the high frequency power amplifier 600, harmonics of the interference signal are generated due to the nonlinearity of the high frequency power amplifier 600. Among these, the second harmonic of the interference signal has the same frequency as the fundamental signal, and therefore the interference signal adversely affects the fundamental signal. This is generally referred to as odd-mode loop oscillation. The frequency (f0) of the fundamental signal is a frequency within the band of the fundamental signal amplified by the high frequency power amplifier 600 (e.g., 3.3 GHz to 3.8 GHz).

[0159] In this embodiment, the resonant frequency fr of the shunt circuit 14 is set equal to half the frequency f0 / 2 of the fundamental signal, and at f0 / 2, the shunt circuit 14 is shorted in terms of impedance (i.e., in a short-circuit state), thereby reducing the effect on the fundamental signal.

[0160] 9, the resonant frequency fr (Hz) of the shunt circuit 14 is given by fr = 1 / (2 * π * √(L * C)), where L (H) is the inductance of the semiconductor inductor 15 and C (F) is the capacitance of the MIM capacitor 16. Note that in this specification, "*" means "x" and "√" means the square root of the subsequent term. Therefore, the inductance of the semiconductor inductor 15 and the capacitance of the MIM capacitor 16 should be designed to satisfy the above relational expression.

[0161] For example, if f0 is 3.55 GHz, then f0 / 2 is 1.775 GHz. If the capacitance of the MIM capacitor 16 is 20 pF, then the inductance of the semiconductor inductor 15 is about 0.40 nH.

[0162] As described above, in the radio frequency power amplifier device 600 according to the eighth embodiment, the resonant frequency fr of the shunt circuit 14 in the radio frequency power amplifier device 100 according to the first embodiment or the radio frequency power amplifier device 200 according to the second embodiment satisfies fr = fo / 2, where fo is a frequency within the band of the fundamental signal amplified by the radio frequency power amplifier device 600.

[0163] By determining the inductance of the semiconductor inductor 15 and the capacitance of the MIM capacitor 16 so as to satisfy the relational expressions shown in the eighth embodiment, odd-mode loop oscillation can be suppressed, thereby preventing excessive amplification.

[0164] Although the present embodiment has been described as being based on the high frequency power amplifier 200 according to the second embodiment (i.e., having one unit amplifier 5), it may also be based on the high frequency power amplifier 100 according to the first embodiment (i.e., having a plurality of unit amplifiers 5). In this case, a closed loop can be formed between the plurality of unit amplifiers, and similar effects can be expected.

[0165] Ninth Embodiment The ninth embodiment corresponds to another design example of the shunt circuit 14 in the eighth embodiment. Therefore, the configuration of the radio frequency power amplifier device according to the ninth embodiment is similar to that of the radio frequency power amplifier device 600 according to the eighth embodiment shown in FIG.

[0166] The radio frequency power amplifier device according to the ninth embodiment will be described below, focusing on the differences from the radio frequency power amplifier device 600 according to the eighth embodiment.

[0167] In circuit design, the resonant frequency of the shunt circuit must be designed to be outside the band of the fundamental signal amplified by the high-frequency power amplifier. This is because the shunt circuit's resonant frequency creates an impedance short (i.e., a short-circuit state), preventing the signal from passing through. Specifically, the resonant frequency fr of the shunt circuit should be set at least n times the signal bandwidth BW (n is a real number) away from the lower limit frequency fl or upper limit frequency fu within the band of the fundamental signal. Here, BW is expressed as BW = fu - fl.

[0168] The lower limit value frl of the resonant frequency and the upper limit value fru of the resonant frequency can be given as a function of the real number n as follows: frl<=frl-n*BW=(n+1)*fl-n*fu fru>=fru+n*BW=(n+1)*fu-n*fl. Experiments have shown that n can be any number greater than or equal to 1. For example, n may be 2 or greater.

[0169] In the high frequency power amplifier device of FIG. 9, the shunt circuit 14 is designed to satisfy the above conditions.

[0170] The resonant frequency fr (Hz) of the shunt circuit 14 is given by fr = 1 / (2 * π * √(L * C)), where L (H) is the inductance of the semiconductor inductor 15 and C (F) is the capacitance of the MIM capacitor 16. Therefore, the inductance of the semiconductor inductor 15 and the capacitance of the MIM capacitor 16 should be designed to satisfy the above relational expression.

[0171] For example, if fl is 3.3 GHz, fu is 3.8 GHz, and n is 2, then frl is 2.3 GHz or less and fru is 4.8 GHz or more. If the capacitance of MIM capacitor 16 is 20 pF, then the inductance of semiconductor inductor 15 is approximately 0.24 nH or more or 0.06 nH or less.

[0172] As described above, the radio frequency power amplifier device according to the ninth embodiment is the same as the radio frequency power amplifier device 100 according to the first embodiment or the radio frequency power amplifier device 200 according to the second embodiment, in that the resonant frequency fr of the shunt circuit 14 satisfies frl<=(n+1)*fl-n*fu and fru>=(n+1)*fu-n*fl, where frl and fru are the lower and upper limit values ​​of the resonant frequency, respectively, and fl and fu are the lower and upper limit frequencies within the band of the fundamental signal amplified by the radio frequency power amplifier device 100, and n is a real number.

[0173] In this way, by determining the inductance of semiconductor inductor 15 and the capacitance of MIM capacitor 16 so as to satisfy the relational expressions shown in embodiment 9, it becomes possible to realize a wideband RF characteristic (for example, gain) of the high frequency power amplifier device. Furthermore, in the case of a wireless communication base station, it becomes possible to realize a wideband DPD (Digital Pre-Distortion).

[0174] As described above, the submount substrate 1, the drain bus line 17, the plurality of input wires 18, and the plurality of output wires 19 are not essential components of the high frequency power amplifier device. Therefore, the radio frequency power amplifier device according to the ninth embodiment may be configured to include a semiconductor substrate 4, a unit amplifier 5 mounted on the semiconductor substrate 4, the unit amplifier 5 including an RF transistor 10 having a plurality of gate fingers 7, a gate bus line 11 connecting the plurality of gate fingers 7 of the RF transistor 10, an input bonding pad 12 connected to the gate bus line 11, and a shunt circuit 14 having one end connected to the input bonding pad 12 and the other end connected to a ground potential, the shunt circuit 14 including a semiconductor inductor 15 and an MIM capacitor 16 connected in series, and the resonant frequency fr of the shunt circuit 14 may be configured to satisfy frl<=(n+1)*fl-n*fu and fru>=(n+1)*fu-n*fl, where frl and fru are the lower and upper limit values ​​of the resonant frequency, respectively, and fl and fu are the lower and upper limit frequencies within the band of the fundamental signal amplified by the radio frequency power amplifier device 100, and n is a real number. In this case, n may be equal to or greater than 1. This makes it possible to achieve a wide bandwidth for the RF characteristics (for example, gain) of the high frequency power amplifier device.

[0175] Furthermore, the features of the high frequency power amplifier device according to the eighth embodiment may be added to the configuration of the high frequency power amplifier device according to the ninth embodiment. That is, the resonant frequency fr of the shunt circuit 14 may satisfy fr=fo / 2, where fo is a frequency within the band of the fundamental signal amplified by the high frequency power amplifier device 100. This makes it possible to suppress odd-mode loop oscillation and prevent excessive amplification.

[0176] While the high frequency power amplifier device according to the present disclosure has been described above based on the embodiments, the present disclosure is not limited to these embodiments. As long as they do not deviate from the gist of the present disclosure, various modifications conceivable by those skilled in the art to the present embodiments and other forms constructed by combining some of the components of the embodiments are also included within the scope of the present disclosure.

[0177] For example, the radio frequency power amplifier device may be a radio frequency power amplifier device that combines the features of two or more aspects selected from the embodiments 3 to 9 with the radio frequency power amplifier device according to the first or second embodiment. Even in such an aspect, since it has at least the features of the radio frequency power amplifier device according to the first or second embodiment, it is possible to realize a radio frequency power amplifier device that can reduce the influence of variations in wire length by using multiple input wires and suppress variations in radio frequency characteristics such as gain within a semiconductor substrate and variations between radio frequency power amplifier devices.

[0178] The high frequency power amplifier according to the present disclosure can be used as an amplifier provided in a wireless communication base station used in the microwave band or millimeter wave band.

[0179] REFERENCE SIGNS LIST 1 submount substrate 2 first wiring pattern 3 second wiring pattern 4 semiconductor substrate 5 unit amplifier 6 source finger 7 gate finger 8 drain finger 9 ground via 10 RF transistor 11 gate bus line 12 input bonding pad 13 connection portion 14 shunt circuit 15 semiconductor inductor 16 MIM capacitance 17 drain bus line 18 input wire 19 output wire 20 drain connection wiring 21 auxiliary lines drawn perpendicularly from both ends of gate bus line to the shunt circuit side 22 resistive element 23 capacitor 24 short-circuit wiring 41 silicon substrate 42 interlayer film 43 MIM capacitance lower electrode 44 MIM capacitance upper electrode 45 wiring 46 first protective film 47 shield metal layer 48 second protective film 49 semiconductor inductor lead-out wiring 100, 200, 300, 400, 400a to 400c, 500, 500a, 600 High frequency power amplifier

Claims

1. A high frequency power amplifier device, a submount substrate having a wiring pattern; a semiconductor substrate mounted on the submount substrate; a plurality of unit amplifiers mounted on the semiconductor substrate; a plurality of input wires for transmitting RF signals input to the plurality of unit amplifiers; Each of the plurality of unit amplifiers a high frequency transistor having a plurality of gate fingers; a gate bus line connecting the plurality of gate fingers of the high-frequency transistor; a plurality of input bonding pads connected to the gate bus lines; a shunt circuit having one end connected to at least one of the plurality of input bonding pads and the other end connected to a ground potential; the plurality of input wires include, for each of the plurality of unit amplifiers, a plurality of input wires connecting the wiring pattern to each of the plurality of input bonding pads of the unit amplifier; the gate bus lines of each of the plurality of unit amplifiers are physically spaced apart from one another; the shunt circuit included in each of the plurality of unit amplifiers includes a semiconductor inductor and a MIM (Metal-Insulator-Metal) capacitor connected in series; High frequency power amplifier.

2. A high frequency power amplifier device, a submount substrate having a wiring pattern; a semiconductor substrate mounted on the submount substrate; one unit amplifier mounted on the semiconductor substrate; a plurality of input wires for transmitting RF signals input to the one unit amplifier; The one unit amplifier includes: a high frequency transistor having a plurality of gate fingers; a gate bus line connecting the plurality of gate fingers of the high-frequency transistor; an input bonding pad connected to the gate bus line; a shunt circuit having one end connected to the input bonding pad and the other end connected to a ground potential; the shunt circuit includes a semiconductor inductor and a metal-insulator-metal (MIM) capacitor connected in series; the shunt circuit is disposed in a region sandwiched between two lines drawn from both ends of the gate bus line toward the shunt circuit in a direction perpendicular to the gate bus line; High frequency power amplifier.

3. the unit amplifier includes a plurality of the shunt circuits, The resonant frequencies of the plurality of shunt circuits are equal.

3. The high frequency power amplifier according to claim 1.

4. The high frequency power amplifier device further includes an impedance element including a resistance component that electrically connects a connection point between the semiconductor inductor and the MIM capacitance included in one of the shunt circuits and a connection point between the semiconductor inductor and the MIM capacitance included in another of the shunt circuits.

4. The high frequency power amplifier according to claim 3.

5. the unit amplifier has a plurality of the input bonding pads, the unit amplifier further has a connection portion that connects two adjacent input bonding pads among the plurality of input bonding pads, the connection portion has the same thickness, material, and height position from the lower surface of the semiconductor substrate as the plurality of input bonding pads; a width of the connection portion in a direction perpendicular to the gate bus line is shorter than a length of the plurality of input bonding pads; 3. The high frequency power amplifier according to claim 1.

6. In the shunt circuit, the MIM capacitor and the semiconductor inductor are connected in order from the one closest to the input bonding pad, the MIM capacitor overlaps the input bonding pad when viewed from above the high frequency power amplifier device, the MIM capacitor is disposed below the input bonding pad in a cross-sectional view of the high frequency power amplifier device; 3. The high frequency power amplifier according to claim 1.

7. further comprising a shield metal layer mounted on the semiconductor substrate; The shield metal layer (1) is formed in a region that includes the semiconductor inductor and the MIM capacitor when viewed from above the high frequency power amplifier device, (2) is disposed between the plurality of input wires and the shunt circuit when viewed from a cross section of the high frequency power amplifier device and is grounded, (3) is different from the input bonding pad in at least one of thickness, material, and height position from the bottom surface of the semiconductor substrate, and (4) has a protective film that covers an upper portion of the shield metal layer, the plurality of input wires overlap with the shunt circuit in the top view; 3. The high frequency power amplifier according to claim 1.

8. further comprising a shield metal layer mounted on the semiconductor substrate; The shield metal layer (1) is formed in a region that includes the semiconductor inductor and the MIM capacitor when viewed from above the high frequency power amplifier device, (2) is disposed between the plurality of input wires and the shunt circuit when viewed from a cross section of the high frequency power amplifier device and is grounded, (3) has the same thickness, material, and height position from the bottom surface of the semiconductor substrate as the input bonding pad, and (4) has a protective film that covers an upper portion of the shield metal layer, the plurality of input wires overlap with the shunt circuit in the top view; 3. The high frequency power amplifier according to claim 1.

9. The resonant frequency fr of the shunt circuit satisfies frl<=(n+1)*fl-n*fu and fru>=(n+1)*fu-n*fl, where frl and fru are the lower and upper limit values ​​of the resonant frequency, respectively, fl and fu are the lower and upper limit frequencies within the band of the fundamental signal amplified by the high frequency power amplifier device, and n is a real number.

3. The high frequency power amplifier according to claim 1.

10. wherein n is 1 or more; 10. The high frequency power amplifier according to claim 9.

11. The resonant frequency fr of the shunt circuit satisfies fr=fo / 2, where fo is a frequency within the band of the fundamental signal amplified by the high frequency power amplifier device.

3. The high frequency power amplifier according to claim 1.

12. A high frequency power amplifier device, a semiconductor substrate; a unit amplifier mounted on the semiconductor substrate; The unit amplifier includes: a high frequency transistor having a plurality of gate fingers; a gate bus line connecting the plurality of gate fingers of the high-frequency transistor; an input bonding pad connected to the gate bus line; a shunt circuit having one end connected to the input bonding pad and the other end connected to a ground potential; the shunt circuit includes a semiconductor inductor and a metal-insulator-metal (MIM) capacitor connected in series; The resonant frequency fr of the shunt circuit satisfies frl<=(n+1)*fl-n*fu and fru>=(n+1)*fu-n*fl, where frl and fru are the lower and upper limit values ​​of the resonant frequency, respectively, fl and fu are the lower and upper limit frequencies within the band of the fundamental signal amplified by the high frequency power amplifier device, and n is a real number. High frequency power amplifier.

13. wherein n is 1 or more; 13. The high frequency power amplifier according to claim 12.

14. The resonant frequency fr of the shunt circuit satisfies fr=fo / 2, where fo is a frequency within the band of the fundamental signal amplified by the high frequency power amplifier device.

13. The high frequency power amplifier according to claim 12.

15. The high frequency power amplifier further includes a DC blocking element connected in series with the impedance element.

5. The high frequency power amplifier according to claim 4.

16. The high frequency power amplifier further comprises: a short-circuiting wire on the semiconductor substrate that short-circuits a connection point between the semiconductor inductor and the MIM capacitor included in one of the plurality of shunt circuits and a connection point between the semiconductor inductor and the MIM capacitor included in another of the plurality of shunt circuits; an impedance element including a resistance component and a DC blocking element connected in series to the impedance element are provided between the short-circuiting wire and the ground potential; 4. The high frequency power amplifier according to claim 3.

17. the impedance element is a resistive element; 5. The high frequency power amplifier according to claim 4.