Doherty Amplifier

Abstract

A Doherty amplifier is provided that can generate individually adjustable control biases for a first stage amplifying element and a second stage amplifying element from a terminal voltage of a single bias terminal. The Doherty amplifier of the present disclosure includes a main amplifier and an auxiliary amplifier that are connected in parallel to an input terminal. The main amplifier and the auxiliary amplifier each have a driver amplifier and a final stage amplifier that is connected to the output of the driver amplifier. At least one of the driver amplifiers of the main amplifier and the auxiliary amplifier has a first stage amplifying element, a second stage amplifying element, a bias terminal that receives a bias to be supplied to a control electrode of the first stage amplifying element and a control electrode of the second stage amplifying element, respectively, a first resistor having one end connected to the control electrode of the first stage amplifying element and the other end connected to the bias terminal, a second resistor having one end connected to the control electrode of the second stage amplifying element and the other end connected to the bias terminal in parallel with the first resistor, and a constant current power supply that draws a current from a connection point between the second resistor and the control electrode of the second stage amplifying element.

Description

[Technical field]

[0001] The present disclosure relates to Doherty amplifiers. [Background technology]

[0002] Doherty amplifiers, which efficiently amplify signals with a large difference between average power and peak power, are widely used in applications such as mobile phone base stations. A Doherty amplifier has a main amplifier and an auxiliary amplifier connected in parallel to an input terminal, and outputs a composite output of the main amplifier and the auxiliary amplifier.

[0003] Patent Document 1 discloses a Doherty amplifier that generates a control bias for an auxiliary amplifier from a control bias for a main amplifier and a predetermined offset voltage. This makes it possible to optimally set the control bias for the auxiliary amplifier even when there is variation in the characteristics of the amplifying element that amplifies the input signal. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2012-199746 A [Non-patent literature]

[0005] [Non-Patent Document 1] Akio Matsushita et al., "High-power GaN power amplifier module for 5G mobile phone base stations," 2023 Conference of the Institute of Electrical Engineers of Japan, Electronics, Information and Systems Division, TC7-1, pp.289-pp.294, 2023 Summary of the Invention [Problem to be solved by the invention]

[0006] By the way, there are known two types of Doherty amplifiers: Single Driver type (hereinafter referred to as SD type) and Dual Driver type (hereinafter referred to as DD type). In an SD type Doherty amplifier, the main amplifier and the auxiliary amplifier each have only a final stage amplifier. On the other hand, in a DD type Doherty amplifier, the main amplifier and the auxiliary amplifier each have a driver amplifier in the stage before the final stage amplifier. The DD type is more advantageous than the SD type because it can suppress the distribution loss that occurs when the input signal is distributed to the auxiliary amplifier that does not amplify the signal at an average power of P_ave or less (see Non-Patent Document 1).

[0007] Here, when a GaN HEMT (High Electron Mobility Transistor), which features a wide band gap and can be driven at high voltage, is used as the amplifying element of the driver amplifier, a single amplifying element can ensure the necessary gain for the driver amplifier. On the other hand, when using non-GaN devices such as GaAs, Si, or InP devices, which have a narrower band gap than GaN, it is necessary to configure the amplifying elements in two stages to ensure the gain of the driver amplifier.

[0008] Although it has a two-stage configuration, the driving voltage of the amplifying element in non-GaN devices is lower than that of GaN HEMTs. Therefore, the area of ​​the control electrode and emitter electrode of the second stage amplifying element can be increased, and the output impedance of the driver amplifier can be reduced. This makes it possible to lower the transformation ratio of the impedance matching between the driver amplifier and the final stage amplifier, thereby reducing the matching loss. In addition, non-GaN devices can be manufactured more cheaply than GaN HEMTs.

[0009] When non-GaN devices are used as the amplifying elements in the driver amplifier, the DD Doherty amplifier has a total of six amplifying elements. However, the control IC that supplies the control bias to the amplifying elements usually has four DAC (Digital Analog Converter) outputs, which creates a problem of insufficient DAC outputs. This creates a need for the first and second stage amplifying elements in the driver amplifier to share one DAC output.

[0010] It is also possible to uniformly adjust the control bias of the first and second stage amplifying elements using one DAC output. However, if the control bias of the first stage amplifying element is changed in the same way as that of the second stage, the bias current in the first stage amplifying element will fluctuate, causing the reflection characteristics at the input terminal to fluctuate. For this reason, even when one DAC output is shared, it is desirable to adjust the control bias for the first and second stage amplifying elements of the driver amplifier separately.

[0011] In order to solve the above-mentioned problems, the present disclosure aims to provide a Doherty amplifier that can generate individually adjustable control biases for a first-stage amplifying element that performs first-stage amplification of an input signal and a second-stage amplifying element that performs second-stage amplification, from the terminal voltage of a single bias terminal. [Means for solving the problem]

[0012] An aspect of the present disclosure is A Doherty amplifier comprising a main amplifier and an auxiliary amplifier connected in parallel to an input terminal, Each of the main amplifier and the auxiliary amplifier has a driver amplifier connected to the input terminal and a final stage amplifier connected to an output of the driver amplifier, The driver amplifier of at least one of the main amplifier and the auxiliary amplifier is a first-stage amplifying element that performs a first-stage amplification; and a second-stage amplifying element that performs a second-stage amplification for amplifying an output signal of the first-stage amplifying element; a bias terminal for receiving a bias to be supplied to each of the control electrodes of the first stage amplifying element and the second stage amplifying element; a first resistor having one end connected to the control electrode of the first stage amplifying element and the other end connected to the bias terminal; a second resistor having one end connected to the control electrode of the second stage amplifying element and the other end connected in parallel to the first resistor to the bias terminal; a constant current power supply that draws a current from a connection point between the second resistor and the control electrode of the second stage amplifying element; It is preferred that the compound has the formula: Effect of the Invention

[0013] In the driver amplifier of the present disclosure, a first resistor is connected between the control electrode of the first stage amplifier element and the bias terminal, and a second resistor is connected between the control electrode of the second stage amplifier element and the bias terminal. The first resistor and the second resistor are connected in parallel to the bias terminal. The control bias of the second stage amplifier element is adjusted by a constant current power supply that draws in a current from the connection point between the second resistor and the control electrode of the second stage amplifier element. Meanwhile, since the control electrode of the first stage amplifier element is separated from the constant current power supply by the first resistor and the second resistor, the control bias of the first stage amplifier element is not affected by the increase or decrease in the current and is adjusted only by the terminal voltage of the bias terminal. Therefore, it is possible to generate individually adjustable control biases for the first stage amplifier element that performs the first stage amplification of the input signal and the second stage amplifier element that performs the second stage amplification from the terminal voltage of one bias terminal. [Brief description of the drawings]

[0014] [Figure 1] 2 is a circuit configuration example of a DD type Doherty amplifier according to the first embodiment. [Diagram 2] 1 is a composite Doherty amplifier incorporating a control IC according to a first embodiment. [Diagram 3] 4 is a detailed circuit configuration example of a main driver amplifier and an auxiliary driver amplifier of the Doherty amplifier according to the first embodiment. [Figure 4] 1 is an example of a circuit configuration of a DD type Doherty amplifier according to a comparative example. [Diagram 5] 13 is an example of threshold voltage variation of an amplifying element according to a comparative example. [Figure 6] FIG. 13 is a diagram showing the drain current-control bias characteristics of an amplifying element according to a comparative example. [Figure 7] FIG. 11 is a diagram showing the drain current-output power characteristics of an amplifying element in a Doherty amplifier according to a comparative example. [Figure 8] FIG. 11 is a diagram showing gain-output power characteristics of a Doherty amplifier according to a comparative example. [Figure 9] 11 is a table showing the relationship between the threshold voltage variation and various characteristics of an amplifying element of a main final stage amplifier in a Doherty amplifier according to a comparative example. [Figure 10] 1 is a table showing a method for improving degradation of power added efficiency and linearity in a Doherty amplifier according to a comparative example. [Figure 11] FIG. 11 is a diagram showing the drain current-output power characteristics of an amplifying element in a Doherty amplifier according to a comparative example. [Figure 12] 4 is a table showing a method for improving degradation of power added efficiency and linearity in the Doherty amplifier according to the first embodiment. [Figure 13] 4 is a table showing a method for improving degradation of power added efficiency and linearity in the Doherty amplifier according to the first embodiment. [Figure 14] 4 is a detailed circuit configuration example of a constant current power supply of the auxiliary driver amplifier according to the first embodiment. [Figure 15] 4 is a detailed circuit configuration example of a constant current power supply of a main driver amplifier according to the first embodiment. [Figure 16] 11 is a detailed example of a circuit configuration of a main driver amplifier and an auxiliary driver amplifier of a Doherty amplifier according to a second embodiment. [Figure 17] 11 is a table showing a method for improving degradation of power added efficiency and linearity in a Doherty amplifier according to the second embodiment. [Figure 18] 11 is a table showing a method for improving degradation of power added efficiency and linearity in a Doherty amplifier according to the second embodiment. [Figure 19] 13 is a detailed circuit configuration example of a constant current power supply of an auxiliary driver amplifier according to the second embodiment. [Figure 20]13 is a detailed circuit configuration example of a constant current power supply of a main driver amplifier according to the second embodiment. [Figure 21] 13 is a detailed circuit configuration example of a main driver amplifier and an auxiliary driver amplifier of a Doherty amplifier according to a third embodiment. [Figure 22] 13 is a table showing a method for improving degradation of power added efficiency and linearity in a Doherty amplifier according to the third embodiment. [Figure 23] 13 is a table showing a method for improving degradation of power added efficiency and linearity in a Doherty amplifier according to the third embodiment. [Figure 24] 13 is a detailed circuit configuration example of a constant current power supply of an auxiliary driver amplifier according to the third embodiment. [Diagram 25] 13 is a detailed circuit configuration example of a constant current power supply of a main driver amplifier according to the third embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0015] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present disclosure will be described with reference to the drawings. The same or corresponding components are designated by the same reference numerals, and repeated description may be omitted.

[0016] First embodiment 1 shows an example of a circuit configuration of a DD type Doherty amplifier 300 according to the first embodiment. A main amplifier 100 and an auxiliary amplifier 200 are connected in parallel to an input terminal IN. The input terminal IN receives an RF (Radio Frequency) input signal.

[0017] A quarter-wave transmission line 130 is connected to the output of the main amplifier 100. A quarter-wave transmission line 230 is connected to the input of the auxiliary amplifier 200.

[0018] The main amplifier 100 includes a main driver amplifier (also referred to as md) 110 connected to an input terminal IN, and a main final amplifier (also referred to as mf) 120 connected to the output of the main driver amplifier 110. The auxiliary amplifier 200 includes an auxiliary driver amplifier (also referred to as ad) 210 connected to the input terminal IN via a quarter-wave transmission line 230, and an auxiliary final amplifier (also referred to as af) 220 connected to the output of the auxiliary driver amplifier 210.

[0019] The control bias V_gs of the main amplifier 100 is set to class AB, and the control bias V_gs of the auxiliary amplifier 200 is set to class C. In the class AB main amplifier 100, a drain current flows even during idle time when there is no RF input signal, so the RF input signal is always amplified. On the other hand, the class C auxiliary amplifier 200 only operates during high power output, and at average power P_ave or less, almost no idle current flows and the input signal is not amplified.

[0020] In the case of class AB bias, the control bias V_gs of the amplifier element is set to a value slightly higher than the threshold voltage V_th. On the other hand, in the case of class C bias, the control bias V_gs of the amplifier element is set to a value lower than the threshold voltage V_th. Note that the control bias V_gs here refers to the gate-source voltage.

[0021] Each of the main driver amplifier 110 and the auxiliary driver amplifier 210 has a first-stage amplifying element 13 and a second-stage amplifying element 14 (not shown). The first-stage amplifying element 13 is responsible for the first-stage amplification of an RF input signal. The second-stage amplifying element 14 is responsible for the second-stage amplification that amplifies the output signal of the first-stage amplifying element 13. The first-stage amplifying element 13 and the second-stage amplifying element 14 are non-GaN-based devices such as GaAs-based devices, Si-based devices, or InP-based devices.

[0022] Specifically, GaAs-based devices include GaAs HBTs (Heterojunction Bipolar Transistors), GaAs D-mode pHEMTs (Pseudomorphic High Electron Mobility Transistors), and GaAs E-mode pHEMTs. Si-based devices include Si bipolar transistors and Si-nMOSs (N-type Metal Oxide Semiconductors). InP-based devices include InP HBTs. Non-GaN-based devices are semiconductor devices with a narrower band gap than GaN.

[0023] In this embodiment, a bipolar transistor device is assumed as the amplifying element of the driver amplifier. Therefore, the control electrode of the amplifying element is the base electrode, and the two main electrodes of the amplifying element are the collector electrode and the emitter electrode. However, if the amplifying element is a FET device, the base should be appropriately replaced with the gate, the collector with the drain, and the emitter with the source in the description of this embodiment.

[0024] The main final stage amplifier 120 has one amplifying element (not shown) that amplifies the input signal received from the main driver amplifier 110. Similarly, the auxiliary final stage amplifier 220 has one amplifying element (not shown) that amplifies the input signal received from the auxiliary driver amplifier 210. The amplifying element is, for example, a GaN HEMT.

[0025] Thus, in the Doherty amplifier 300 of the present disclosure, the main driver amplifier 110 and the auxiliary driver amplifier 210 each have a first stage amplifying element 13 and a second stage amplifying element 14. Furthermore, the main final stage amplifier 120 and the auxiliary final stage amplifier 220 each have one amplifying element. Thus, the Doherty amplifier 300 has a total of six amplifying elements.

[0026] 2 shows a composite Doherty amplifier 300 incorporating a control IC 400 according to the first embodiment. The control IC 400 is an MMIC (Monolithic Microwave Integrated Circuit) or the like.

[0027] The terminal I / O inputs and outputs a multi-bit digital signal. The logic circuit 410 transmits and receives a digital signal to and from the terminal I / O. The storage device 420 has a volatile or non-volatile memory and stores bias values ​​to be supplied to each of the four amplifiers (i.e., md, mf, ad, and af) of the Doherty amplifier 300. The negative voltage terminal V_ss is connected to an external negative power supply, and the positive voltage terminal V_dd is connected to an external positive power supply.

[0028] The four DACs 430-1 to 430-4 supply control biases to the amplifiers connected to their outputs based on the bias values ​​stored in the storage device 420.

[0029] V_refmd is the bias that the main driver amplifier 110 receives from the DAC 430-1. Similarly, V_refad is the bias that the auxiliary driver amplifier 210 receives from the DAC 430-4. Furthermore, V_gsmf is the bias that the main final amplifier 120 receives from the DAC 430-2. Furthermore, V_gsaf is the bias that the auxiliary final amplifier 220 receives from the DAC 430-3.

[0030] However, from here on, the symbol for the terminal itself that receives the bias V may be written as "terminal V".

[0031] 3 is a detailed circuit configuration example of the main driver amplifier 110 and the auxiliary driver amplifier 210 of the Doherty amplifier 300 according to the first embodiment. Since the main driver amplifier 110 and the auxiliary driver amplifier 210 have the same circuit configuration, the main driver amplifier 110 will be mainly described here. However, the description of the auxiliary driver amplifier 210 may be supplemented as appropriate.

[0032] A bias terminal V_refmd (V_refad in the case of the auxiliary driver amplifier 210) receives the output of the DAC 430. Resistor 1 and resistor 2 are connected in parallel to the bias terminal V_refmd. A control electrode of the bias amplification element 11 is connected to the bias terminal V_refmd via resistor 1. A control electrode of the bias amplification element 12 is connected to the bias terminal V_refmd via resistor 2.

[0033] A collector electrode of the bias amplifying element 11 is connected to a power supply terminal V_cb. An emitter electrode of the bias amplifying element 11 is grounded via a resistor 3 and is also connected to a control electrode of the first-stage amplifying element 13 via a resistor 5 connected in parallel with the resistor 3.

[0034] The collector electrode of the bias amplifier element 12 is connected to a power supply terminal V_cb. The emitter electrode of the bias amplifier element 12 is grounded via a resistor 4 and is also connected to the control electrode of the second-stage amplifier element 14 via a resistor 6 connected in parallel with the resistor 4.

[0035] The bias amplifying element 11 generates a control bias current to be supplied from the power supply terminal V_cb to the first-stage amplifying element 13. Similarly, the bias amplifying element 12 generates a control bias current to be supplied from the power supply terminal V_cb to the second-stage amplifying element 14. As a result, a predetermined idle current flows through the first-stage amplifying element 13 and the second-stage amplifying element 14.

[0036] The bias amplifier elements 11 and 12 are non-GaN devices such as GaAs HBTs, etc. However, the type of device is not limited, and may be a GaN HEMT.

[0037] A constant current power supply 15 is branch-connected to the connection point between the resistor 2 and the control electrode of the bias amplifying element 12. The constant current power supply 15 adjusts the current I_pull drawn from the connection point in accordance with the control bias V_gsmf of the amplifying element of the main final stage amplifier 120.

[0038] An input terminal IN receives an RF input signal. An input matching circuit 7 performs impedance matching for the input signal. An output of the input matching circuit 7 is input to a control electrode of a first-stage amplifying element 13 so as to be in parallel with a resistor 5.

[0039] The emitter electrode of the first-stage amplifying element 13 is grounded. The first-stage amplifying element 13 amplifies an input signal received from the input matching circuit 7 and outputs it to a collector electrode. The interstage matching circuit 8 is connected to the collector electrode of the first-stage amplifying element 13 and performs impedance matching of the signal between the first-stage amplifying element 13 and the second-stage amplifying element 14. The output of the interstage matching circuit 8 is input to the control electrode of the second-stage amplifying element 14 so as to be in parallel with the resistor 6. The power supply terminal V_c1 supplies a voltage to the collector electrode of the first-stage amplifying element 13 via the interstage matching circuit 8.

[0040] The emitter electrode of the second-stage amplifying element 14 is grounded. The second-stage amplifying element 14 amplifies the signal received from the inter-stage matching circuit 8 and outputs it to the collector electrode. The collector electrode of the second-stage amplifying element 13 is connected to an output matching circuit 9. The output matching circuit 9 performs impedance matching on the signal amplified by the second-stage amplifying element 13 and sends it to the output terminal OUT. The output terminal OUT is connected to the amplifying element of the main final stage amplifier 120 (the auxiliary final stage amplifier 220 in the case of the auxiliary driver amplifier 210). The power supply terminal V_c2 supplies a voltage to the collector electrode of the second-stage amplifying element 14 via the output matching circuit 9.

[0041] <Control Bias Adjustment Method in Comparative Example> Before describing the control bias adjustment method in the present disclosure, a comparative example will be described. The same reference numerals are used for components common to or corresponding to the present disclosure. Here, differences from the present disclosure will be mainly described, and descriptions of components common to or corresponding to the present disclosure will be omitted.

[0042] 4 is an example of a circuit configuration of a DD type Doherty amplifier 900 according to a comparative example. The Doherty amplifier 900 differs from the present disclosure in that the first stage amplifying element 13 and the second stage amplifying element 14 are GaN HEMTs. The Doherty amplifier 900 has a total of four amplifying elements.

[0043] V_gsmd is the bias that the main driver amplifier 110 receives from the DAC 430-1. Similarly, V_gsad is the bias that the auxiliary driver amplifier 210 receives from the DAC 430-4. Furthermore, V_gsmf is the bias that the main final amplifier 120 receives from the DAC 430-2. Furthermore, V_gsaf is the bias that the auxiliary final amplifier 220 receives from the DAC 430-3.

[0044] First, the relationship between the variation in threshold voltage V_th of the amplifying element and various characteristics in a Doherty amplifier 900 of a comparative example will be described with reference to FIGS.

[0045] 5 is an example of the variation in threshold voltage V_th of an amplifier element according to a comparative example. The leftmost column shows three patterns of the magnitude of the threshold voltage V_th of the amplifier element, A, B, and C. Patterns A, B, and C indicate that the threshold voltage V_th is Typical, Deep (slightly large in the negative direction), and Shallow (slightly large in the positive direction), respectively. The threshold voltages V_th in patterns A, B, and C are -3.0V, -3.3V, and -2.7V, respectively, but these numerical values ​​are merely examples and are not limiting.

[0046] The center and rightmost columns show the mutual conductance gm and maximum drain current I_max corresponding to the threshold voltage V_th of patterns A, B, and C, respectively. When the threshold voltage V_th is pattern B, the mutual conductance gm is lower (Low) and the maximum drain current I_max is slightly higher (A bit high) than when the threshold voltage V_th is pattern A. On the other hand, when the threshold voltage V_th is pattern C, the mutual conductance gm is higher (High) and the maximum drain current I_max is slightly lower (A bit low) than when the threshold voltage V_th is pattern A.

[0047] Fig. 6 is a diagram showing the drain current-control bias characteristics of an amplifier element according to a comparative example. Here, I_d is the drain current, and V_gs is the control bias. In the figure, A, B, and C correspond to the above-mentioned threshold voltage V_th patterns. The threshold voltage V_th and maximum drain current I_max are shown for each of the patterns A, B, and C, and the relationship shown in Fig. 5 can be read.

[0048] In this comparative example, for simplicity of explanation, it is assumed that all four amplifying elements of the Doherty amplifier 900 have the same threshold voltage V_th.

[0049] 7 is a diagram showing the drain current-output power characteristics of the amplifying elements in a Doherty amplifier 900 according to a comparative example. Here, I_dmf is the drain current in the amplifying elements of the main final stage amplifier 120, and I_daf is the drain current in the amplifying elements of the auxiliary final stage amplifier 220. Also, P_out is the output power of the Doherty amplifier 900. In the figure, A_m, B_m, and C_m are the drain currents I_dmf when the threshold voltages V_th in the amplifying elements of the main final stage amplifier 120 are patterns A, B, and C, respectively. Also, A_a, B_a, and C_a are the drain currents I_daf when the threshold voltages V_th in the amplifying elements of the auxiliary final stage amplifier 220 are patterns A, B, and C, respectively.

[0050] The average power P_ave is the target output power. When the average power P_ave is output, the smaller the operating current (I_dmf+I_daf) is, the higher the power added efficiency PAE of the Doherty amplifier is.

[0051] In the amplifying element of the main final stage amplifier 120 set to class AB, the drain current I_dmf flows even in the region where the output power P_out is low. On the other hand, in the amplifying element of the auxiliary final stage amplifier 220 set to class C, the drain current I_daf hardly flows below the average power P_ave, and no amplification is performed. The auxiliary final stage amplifier 220 begins signal amplification above the average power P_ave, and outputs a drain current I_daf larger than that of the main final stage amplifier 120 when the output power P_out is near its maximum.

[0052] 8 is a diagram showing the gain-output power characteristics of the Doherty amplifier 900 according to the comparative example. Here, G_p is the gain, and P_out is the output power of the Doherty amplifier 900. Here, the gain G_p is shown for patterns A and C. When the threshold voltage V_th is pattern C, the gain G_p is not uniform with respect to the output power P_out, and a drop occurs near the average power P_ave. Therefore, the linearity is deteriorated in pattern C compared to pattern A.

[0053] This drop is due to the fact that C_a is shifted in the direction toward a larger P_out compared to A_a in Fig. 7. That is, in the amplifying element of the auxiliary final stage amplifier 220 set to a C-class bias, the overdrive voltage |Vgs-Vth| is larger in the case of pattern C than in the case of pattern A.

[0054] If the drop in gain G_p becomes too large, the accuracy of the digital predistortion (DPD) by the compensation device inserted in the front stage of the Doherty amplifier 900 decreases, which deteriorates the error vector magnitude (EVM) and adjacent channel leakage ratio (ACLR) of the output signal of the Doherty amplifier 900.

[0055] FIG. 9 is a table showing the relationship between the threshold voltage V_th variation and various characteristics of the amplifying element of the main final stage amplifier 120 in the Doherty amplifier 900 according to the comparative example.

[0056] Numerical examples are shown in parentheses in the figures, but these are merely examples and are not limiting. In order to match the explanations with the positions in the tables, the positions in the tables may be indicated with <numbers>. This is common to all the following tables.

[0057] When the threshold voltage V_th of the amplifying element of the main final stage amplifier 120 is pattern B, the mutual conductance gm of the amplifying element of the main final stage amplifier 120 becomes relatively low ( <91> Low). Therefore, the gain of the amplifying element in the main final stage amplifier 120 is slightly reduced. Therefore, when the average power P_ave is output, the contribution ratio of the output power of the auxiliary final stage amplifier 220 to the output power of the main final stage amplifier 120 is larger than in the case of pattern A. Therefore, as shown in FIG. 7, in the case of pattern B, the operating current (I_dmf+I_daf) when the average power P_ave is output is higher than in the case of pattern A. As a result, as shown in FIG. 9, in the case of pattern B, the power added efficiency PAE when the average power P_ave is output is lower ( <92> Low).

[0058] On the other hand, when the threshold voltage V_th of the amplifying element of the main final stage amplifier 120 is pattern C, the linearity of the gain G_p is deteriorated compared to pattern A ( <94> Bad).

[0059] In this way, the power added efficiency PAE and linearity of the Doherty amplifier 900 as a whole deteriorate due to the variation in the threshold voltage V_th of the amplifying element of the main final stage amplifier 120.

[0060] FIG. 10 is a table showing a method for improving the power added efficiency PAE and degradation of linearity in the Doherty amplifier 900 according to the comparative example.

[0061] Here, a method for improving the power added efficiency PAE will be described first. Consider the case where the threshold voltage V_th of the amplifying element of the main final stage amplifier 120 is pattern B. In this case, the cause of degradation is the decrease in the gain of the amplifying element in the main final stage amplifier 120 as described above.

[0062] Here, a method of increasing the bias V_gsmf to increase the idle current of the amplifying element of the main final stage amplifier 120 and directly recovering the gain is also conceivable. However, increasing the idle current means increasing the drain current I_dmf when the average power P_ave is output. In other words, this means lowering the power added efficiency PAE of the Doherty amplifier 900 as a whole. For this reason, it is necessary to increase the bias V_gsmd supplied to the amplifying element of the main driver amplifier 110 ( <102> It is better to increase the gain of the main driver amplifier 110 by using a gain equalizer (Shallow) to restore the overall gain of the main amplifier 100.

[0063] In terms of a specific numerical example, the bias V_gsmd, which was -3.0 V in Fig. 9, is increased to -2.8 V in Fig. 10. When the gain of the amplifying element of the main driver amplifier 110 increases and the gain of the main amplifier 100 as a whole is restored, the drain current I_daf of the auxiliary final stage amplifier 220 decreases and approaches the case of pattern A. Accordingly, the output power of the auxiliary final stage amplifier 220 also decreases and becomes equivalent to that of pattern A, so that the power added efficiency PAE of the Doherty amplifier 900 as a whole improves ( <103> Improved).

[0064] 11 is a diagram showing the drain current-output power characteristics of the amplifying element in the Doherty amplifier 900 according to the comparative example. This shows the drain current I_daf of the auxiliary final stage amplifier 220 when the bias V_gsmd supplied to the amplifying element of the main driver amplifier 110 is increased. The drain current B_a of the auxiliary final stage amplifier 220 in pattern B is closer to A_a than in FIG.

[0065] Next, a method for improving linearity will be described with reference to Fig. 10. Consider the case where the threshold voltage V_th of the amplifying element of the main final stage amplifier 120 is pattern C. In this case, as described above, the cause of degradation is that the overdrive voltage |Vgs-Vth| of the amplifying element of the auxiliary final stage amplifier 220 is larger than that in pattern A.

[0066] Therefore, the bias V_gsad supplied to the amplifying element of the auxiliary driver amplifier 210 is increased ( <104> Shallow), and reduce the overdrive voltage |Vgs-Vth|. In terms of a specific numerical example, the control bias V_gsad, which was -3.0V in FIG. 9, is increased to -2.8V.

[0067] 11 shows the drain current I_daf of the auxiliary final amplifier 220 when the bias V_gsad supplied to the auxiliary driver amplifier 210 is increased. The drain current C_a of the auxiliary final amplifier 220 in pattern C increases compared to FIG. 7 and approaches A_a.

[0068] Returning to FIG. 10, when the drain current I_daf of the auxiliary final amplifier 220 increases due to an increase in the bias V_gsad, the output power of the auxiliary final amplifier 220 when the average power P_ave is output increases and becomes equivalent to pattern A. As a result, the power added efficiency PAE of the Doherty amplifier 900 as a whole decreases slightly and becomes equivalent to pattern A ( <105> Typical). This improves linearity ( <106> Improved), which is equivalent to pattern A.

[0069] In this way, in the DD Doherty amplifier 900, the power added efficiency PAE and degradation of linearity are improved by adjusting the bias V_gsmd supplied to the amplifying element of the main driver amplifier 110 and the bias V_gsad supplied to the amplifying element of the auxiliary driver amplifier 210.

[0070] <Control bias adjustment method in the present disclosure> In the present disclosure, the control bias of the second stage amplifying element 14 of the driver amplifier is adjusted to improve the power added efficiency PAE and linearity degradation of the Doherty amplifier 300.

[0071] 12 is a table showing a method for improving degradation of power added efficiency PAE and linearity in the Doherty amplifier 300 according to the first embodiment. However, in V_refmd in the second column from the right, the left numerical value in the ( ) separated by the and symbol is the control bias of the bias amplification element 11 of the main driver amplifier 110, and the right numerical value is the control bias of the bias amplification element 12. Similarly, in V_refad in the rightmost column, the left numerical value in the ( ) separated by the and symbol is the control bias of the bias amplification element 11 of the auxiliary driver amplifier 210, and the right numerical value is the control bias of the bias amplification element 12. This is also common to FIG. 13 below.

[0072] First, a method for improving the power added efficiency PAE will be described. When the threshold voltage V_th of the amplifying element of the main final stage amplifier 120 is in pattern B, the constant current power supply 15 of the main driver amplifier 110 reduces the current I_pull drawn from the connection point between the resistor 2 and the control electrode of the bias amplifying element 12 ( <107> As a result, the control bias of the bias amplifier element 12 increases, and the current output from the bias amplifier element 12 increases. As a result, the control bias of the second-stage amplifier element 14 increases, and the idle current increases, so the gain of the second-stage amplifier element 14 increases. As a result, the power added efficiency PAE improves for the same reason as in the comparative example ( <108> Improved).

[0073] On the other hand, the control electrode of the bias amplifier element 11 is separated from the constant current power supply 15 by resistors 1 and 2. Therefore, the control bias of the bias amplifier element 11 is determined by the terminal voltage of the bias terminal V_refmd and is not affected by an increase or decrease in the current I_pull. As a result, the control bias of the first stage amplifier element 14 does not change and the idle current does not change, so there is no fluctuation in the reflection characteristics at the input terminal IN.

[0074] Next, a method for improving linearity will be described. When the threshold voltage V_th of the amplifying element of the main final stage amplifier 120 is in pattern C, the constant current power supply 15 of the main driver amplifier 110 increases the current I_pull drawn from the connection point between the resistor 2 and the control electrode of the bias amplifying element 12 ( <110> As a result, the control bias of the bias amplifying element 12 decreases, and the current output from the bias amplifying element 12 decreases. Accordingly, the control bias of the second-stage amplifying element 14 decreases, and the idle current decreases, so the gain of the second-stage amplifying element 14 decreases. As a result, the increase in gain of the main amplifier 100 as a whole is suppressed, and the power added efficiency PAE of the Doherty amplifier 900 as a whole decreases slightly, becoming equivalent to that of pattern A ( <114> On the other hand, the linearity improves ( <113> Improved).

[0075] 13 is a table showing a method for improving degradation of the power added efficiency PAE and linearity in the Doherty amplifier 300 according to the first embodiment. When the threshold voltage V_th of the amplifying element of the main final stage amplifier 120 is in pattern C, the constant current power supply 15 of the auxiliary driver amplifier 210 reduces the current I_pull drawn from the connection point between the resistor 2 and the control electrode of the bias amplifying element 12 ( <112> Ipull decreases). This allows the control bias of the second stage amplifier element 14 to be increased, and the overdrive voltage |Vgs-Vth| of the amplifier element of the auxiliary final stage amplifier 220 to be reduced. This improves linearity for the same reason as in the comparative example ( <113> Improved).

[0076] 14 is a detailed circuit configuration example of the constant current power supply 15 of the auxiliary driver amplifier 210 according to the first embodiment. One end of a resistor 30 is grounded, and the other end of the resistor 30 is connected in parallel to the collector electrodes of the amplifying element 24 and the amplifying element 23, which form a differential pair. The control electrode of the amplifying element 24 is connected to the input terminal V_gsmf via a resistor 22. The input terminal V_gsmf receives a control bias for the amplifying element of the main final stage amplifier 120. A resistor 19 and the collector electrode of the amplifying element 27 are connected in series to the emitter electrode of the amplifying element 24, in this order.

[0077] The control electrode of the amplifying element 27 is connected to the control electrode of the amplifying element 29, which is a current mirror pair, and is also connected to the collector electrode of the amplifying element 27. The emitter electrode of the amplifying element 27 is connected to a negative voltage terminal V_ss. The negative voltage terminal V_ss is connected to an external negative power supply.

[0078] Resistors 16 and 17 are connected in parallel to the control electrode of amplifying element 23. The other end of resistor 16 is grounded. The other end of resistor 17 is connected to the negative voltage terminal V_ss. Resistor 18 and the collector electrode of amplifying element 26 are connected in series to the emitter electrode of amplifying element 23 in this order.

[0079] The control electrode of the amplifying element 26 is connected to the control electrode of the amplifying element 28 which is a current mirror pair, and is also connected to the collector electrode of the amplifying element 26. The emitter electrode of the amplifying element 26 is connected to the negative voltage terminal V_ss.

[0080] The collector electrode of the amplifying element 29 is grounded via a resistor 21. The emitter electrode of the amplifying element 29 is connected to the negative voltage terminal V_ss.

[0081] The collector electrode of amplifying element 28 is connected via resistor 20 to resistor 2 of auxiliary driver amplifier 210. The emitter electrode of amplifying element 28 is connected to negative voltage terminal V_ss.

[0082] The amplifying elements 23 to 29 are non-GaN devices such as GaAs HBTs, but are not limited thereto, and may be GaN HEMTs.

[0083] The collector electrodes of amplifying element 23 and amplifying element 24, which are a differential pair, are both connected to resistor 19, and the sum of the collector currents of amplifying element 23 and amplifying element 24 can be regarded as being approximately constant.

[0084] The control bias of the amplifying element 23 is set to a default value V_gsset (default voltage) of the control bias applied when the threshold voltage V_th of the amplifying element of the main final stage amplifier 120 is pattern A. Since the main final stage amplifier 120 is class AB, the default value V_gsset is a value slightly higher than the threshold voltage V_th.

[0085] A case where the bias V_gsmf is lower than the default value V_gsset means that the threshold voltage V_th of the amplifying element of the main final stage amplifier 120 is in pattern B. In this case, the emitter current output by the amplifying element 23 increases. This current flows from the emitter electrode to the resistor 18 and the amplifying element 26, but the same current also flows through the resistor 20 and the amplifying element 28 that form a current mirror, and as a result, the current I_pull that flows through the resistor 20 in the direction of the negative voltage terminal V_ss increases. The increase in I_pull lowers the control bias of the second stage amplifying element 14.

[0086] Conversely, when the bias V_gsmf is higher than the default value V_gsset, this means that the threshold voltage V_th of the amplifying element of the main final stage amplifier 120 is in pattern C. In this case, the emitter current output by the amplifying element 24 increases and I_pull decreases, so the control bias of the second stage amplifying element 14 becomes higher. This improves linearity as described above ( <113> Improved).

[0087] 15 is a detailed circuit configuration example of the constant current power supply 15 of the main driver amplifier 110 according to the first embodiment. One end of a resistor 30 is grounded, and the other end of the resistor 30 is connected to the collector electrode of the amplifying element 23. The control electrode of the amplifying element 23 is connected to an input terminal V_gsmf via a resistor 32. The input terminal V_gsmf receives a control bias for the amplifying element of the main final stage amplifier 120. A resistor 18 and a collector electrode of the amplifying element 26 are connected in series to the emitter electrode of the amplifying element 23, in this order.

[0088] The control electrode of the amplifying element 26 is connected to the control electrode of the amplifying element 28, which is a current mirror pair, and is also connected to the collector electrode of the amplifying element 26. The emitter electrode of the amplifying element 26 is connected to a negative voltage terminal V_ss. The negative voltage terminal V_ss is connected to an external negative power supply.

[0089] The collector electrode of amplifying element 28 is connected to resistor 2 of main driver amplifier 110 via resistor 20. The emitter electrode of amplifying element 28 is connected to negative voltage terminal V_ss.

[0090] In the case of pattern B, in which the bias V_gsmf is lower than the default value V_gsset, the emitter current output by the amplifying element 23 decreases. This current flows from the emitter electrode to the resistor 18 and amplifying element 26, but the same current also flows through the resistor 20 and amplifying element 28 that form a current mirror, resulting in a decrease in the current I_pull flowing through the resistor 20. The decrease in I_pull increases the gain of the second-stage amplifying element 14. This improves the power added efficiency PAE, as described above ( <108> Improved).

[0091] Conversely, in the case of pattern C in which the bias V_gsmf is higher than the default value V_gsset, the emitter current output by the amplifier element 23 increases. This increases the current I_pull flowing through the resistor 20 in the current mirror relationship. The increase in I_pull reduces the gain of the second-stage amplifier element 14. This improves the linearity as described above ( <113> Improved).

[0092] As described above, in the driver amplifier of the present disclosure, the resistor 1 is connected between the control electrode of the first-stage amplifying element 13 and the bias terminal, and the resistor 2 is connected between the control electrode of the second-stage amplifying element 14 and the bias terminal. The resistors 1 and 2 are connected in parallel to the bias terminal. The control bias of the second-stage amplifying element 14 is adjusted by the constant current power supply 15 that draws in the current I_pull from the connection point between the resistor 2 and the control electrode of the second-stage amplifying element 14. Meanwhile, since the control electrode of the first-stage amplifying element 13 is separated from the constant current power supply 15 by the resistors 1 and 2, the control bias of the first-stage amplifying element 13 is not affected by the increase or decrease in the current I_pull, and is adjusted only by the terminal voltage of the bias terminal. Therefore, it is possible to generate individually adjustable control biases for the first-stage amplifying element that performs the first-stage amplification of the input signal and the second-stage amplifying element that performs the second-stage amplification from the terminal voltage of one bias terminal.

[0093] In the above description, the first stage amplifying element 13 and the second stage amplifying element 14 are non-GaN devices such as GaAs devices, Si devices, or InP devices. However, the effects of the present disclosure can be obtained regardless of the type of device of the first stage amplifying element 13 and the second stage amplifying element 14. Therefore, the first stage amplifying element 13 and the second stage amplifying element 14 are not necessarily limited to non-GaN devices and may be, for example, a GaN HEMT.

[0094] Although it has been described above that both the main driver amplifier 110 and the auxiliary driver amplifier 210 have the circuit configuration shown in FIG. 3, it is sufficient that at least one of the main driver amplifier 110 and the auxiliary driver amplifier 210 has the circuit configuration shown in FIG.

[0095] As described above, the constant current power supply 15 adjusts the current I_pull pulled in from the connection point in response to the control bias V_gsmf of the amplifying element of the main final stage amplifier 120. As described above, this control bias V_gsmf is a value that is set based on the threshold voltage V_th of the amplifying element of the main final stage amplifier 120. However, instead of the control bias V_g, the current I_pull may be adjusted in response to the threshold voltage V_th itself of the amplifying element of the main final stage amplifier 120. In this case as well, the effects described in the present embodiment can be obtained.

[0096] Embodiment 2 In the second embodiment, GaAs D-mode pHEMTs (Depletion-mode Pseudomorphic High Electron Mobility Transistors), which are GaAs-based devices, are used as the first-stage amplifying element and the second-stage amplifying element. The following describes changes from the first embodiment.

[0097] 16 shows a detailed example of the circuit configuration of main driver amplifier 110 and auxiliary driver amplifier 210 of Doherty amplifier 300 according to embodiment 2. Note that while the main driver amplifier 110 will be mainly described here, the auxiliary driver amplifier 210 also has a similar circuit configuration.

[0098] The bias terminal V_ggmd (V_ggad in the case of the auxiliary driver amplifier 210) receives the output of the DAC 430. Resistors 1 and 2 are connected in parallel to the bias terminal V_ggmd. The control electrode of the first stage amplifying element 43 is connected to the bias terminal V_ggmd via resistor 1. The control electrode of the second stage amplifying element 44 is connected to the bias terminal V_ggmd via resistor 2. This allows a predetermined idle current to flow through the first stage amplifying element 43 and the second stage amplifying element 44.

[0099] A constant current power supply 15 is branched and connected to the connection point between the resistor 2 and the control electrode of the second-stage amplifying element 44. As in the first embodiment, the constant current power supply 15 adjusts the current I_pull pulled in from the connection point in response to the control bias V_gsmf of the amplifying element of the main final stage amplifier 120.

[0100] The circuit configuration in which an input signal from an input terminal IN is amplified in two stages by a first-stage amplifying element 43 and a second-stage amplifying element 44 and then output from an output terminal OUT is the same as that in Fig. 3 of the first embodiment. Therefore, in the explanation of Fig. 3 of the first embodiment, the first-stage amplifying element 13 should be interpreted as the first-stage amplifying element 43, and the second-stage amplifying element 14 as the second-stage amplifying element 44, as appropriate. However, since the first-stage amplifying element 43 and the second-stage amplifying element 44 are GaAs D-mode pHEMTs and can be regarded as FET devices, in the explanation of Fig. 3 of the first embodiment, the gate should be interpreted as the base, the collector as the drain, and the emitter as the source, as appropriate.

[0101] In addition, in the GaAs D-mode pHEMT, a drain current flows even when the control bias V_gs=0. In other words, the GaAs D-mode pHEMT has a negative threshold voltage V_th. Therefore, in this embodiment, the bias amplifier elements 11 and 12 are not required.

[0102] 17 is a table showing a method for improving degradation of power added efficiency PAE and linearity in the Doherty amplifier 300 according to the second embodiment. However, in V_ggmd in the second column from the right, the left numerical value in the ( ) separated by the and symbol is the control bias of the first-stage amplifying element 43 of the main driver amplifier 110, and the right numerical value is the control bias of the second-stage amplifying element 44. Similarly, in V_ggad in the rightmost column, the left numerical value in the ( ) separated by the and symbol is the control bias of the first-stage amplifying element 43 of the auxiliary driver amplifier 210, and the right numerical value is the control bias of the second-stage amplifying element 44. This is also common to FIG. 18 below.

[0103] First, a method for improving the power added efficiency PAE will be described. When the threshold voltage V_th of the amplifying element of the main final stage amplifier 120 is in pattern B, the constant current power supply 15 of the main driver amplifier 110 reduces the current I_pull drawn from the connection point between the resistor 2 and the control electrode of the second stage amplifying element 44 ( <157> As a result, the control bias of the second-stage amplifying element 44 increases, and the idle current increases, so that the gain of the second-stage amplifying element 14 increases. As a result, the power added efficiency PAE improves, as in the first embodiment. <158> Improved).

[0104] Moreover, similarly to the first embodiment, the control bias of the first-stage amplifying element 43 is determined by the terminal voltage of the bias terminal V_ggmd, and is not affected by an increase or decrease in the current I_pull.

[0105] Next, a method for improving linearity will be described. When the threshold voltage V_th of the amplifying element of the main final stage amplifier 120 is in pattern C, the constant current power supply 15 of the main driver amplifier 110 increases the current I_pull drawn from the connection point between the resistor 2 and the control electrode of the second stage amplifying element 44 ( <160> As a result, the control bias of the second-stage amplifying element 44 decreases, and the gain decreases. As a result, the power added efficiency PAE becomes equal to that of pattern A, as in the first embodiment ( <164> Typical), linearity improves ( <163> Improved).

[0106] 18 is a table showing a method for improving degradation of the power added efficiency PAE and linearity in the Doherty amplifier 300 according to the second embodiment. When the threshold voltage V_th of the amplifying element of the main final stage amplifier 120 is in pattern C, the constant current power supply 15 of the auxiliary driver amplifier 210 reduces the current I_pull drawn from the connection point between the resistor 2 and the control electrode of the second stage amplifying element 44 ( <162> This allows the control bias of the second-stage amplifier element 44 to be increased, improving linearity in the same way as in the first embodiment. <163> Improved).

[0107] FIG. 19 is a detailed circuit configuration example of the constant current power supply 15 of the auxiliary driver amplifier 210 according to the second embodiment. FIG. 20 is a detailed circuit configuration example of the constant current power supply 15 of the main driver amplifier 110 according to the second embodiment. The circuit configurations of FIG. 19 and FIG. 20 are basically the same as the circuit configurations of FIG. 14 and FIG. 15 of the first embodiment. However, the amplifying elements 23 to 29 of the first embodiment are changed to amplifying elements 53 to 59, respectively. The amplifying elements 53 to 59 are GaAs E-mode pHEMTs (Enhancement-mode Pseudomorphic High Electron Mobility Transistors). The explanation of the circuits of FIG. 19 and FIG. 20 is the same as the explanation of FIG. 14 and FIG. 15 of the first embodiment. Therefore, in the explanation of FIG. 14 and FIG. 15 of the first embodiment, the amplifying elements 23 to 29 should be appropriately read as the amplifying elements 53 to 59, respectively. However, since the GaAs E-mode pHEMT can be regarded as a FET device, in the explanation of Figures 14 and 15, the gate should be interpreted as the base, the collector as the drain, and the emitter as the source, as appropriate.

[0108] It should be noted that no drain current flows in the GaAs E-mode pHEMT when the control bias V_gs = 0. In other words, the GaAs E-mode pHEMT has a positive threshold voltage V_th.

[0109] In this way, even when GaAs D-mode pHEMTs are used as first-stage amplifying element 43 and second-stage amplifying element 44, the same effects as those of the first embodiment can be obtained.

[0110] Third embodiment In the third embodiment, a Si-LDMOS (Laterally Diffusion Metal Oxide Semiconductor), which is a Si-based device, is used as the first stage amplifying element and the second stage amplifying element. The following describes changes from the second embodiment.

[0111] Fig. 21 is a detailed circuit configuration example of the main driver amplifier 110 and the auxiliary driver amplifier 210 of the Doherty amplifier 300 according to the third embodiment. In the circuit configuration of Fig. 21, the first stage amplifying element 43 and the second stage amplifying element 44 in Fig. 16 of the second embodiment are changed to a first stage amplifying element 63 and a second stage amplifying element 64, respectively. The first stage amplifying element 63 and the second stage amplifying element 64 are Si-LDMOS. When used for power amplifier applications, Si-LDMOS is usually E-mode and has a positive threshold voltage V_th. Note that this is similar to the second embodiment, and therefore a description thereof will be omitted.

[0112] 22 and 23 are tables showing a method for improving degradation of power added efficiency PAE and linearity in Doherty amplifier 300 according to embodiment 3. How to read and the explanation of the tables in Figs. 22 and 23 are the same as those in Figs. 17 and 18 of embodiment 2, respectively, and therefore the explanation will be omitted.

[0113] Fig. 24 shows a detailed circuit configuration example of the constant current power supply 15 of the auxiliary driver amplifier 210 according to the third embodiment. Fig. 25 shows a detailed circuit configuration example of the constant current power supply 15 of the main driver amplifier 110 according to the third embodiment. The circuit configurations in Figs. 24 and 25 are basically the same as the circuit configurations in Figs. 19 and 20 of the second embodiment, respectively. However, in Fig. 24, the amplifying elements 53 to 59 in Fig. 19 of the second embodiment are changed to amplifying elements 73 to 79, respectively. The amplifying elements 73 to 79 are Si-LDMOS. Note that as this is the same as in the second embodiment, a description thereof will be omitted.

[0114] In this way, even when Si-LDMOS is used as the first stage amplifying element 63 and the second stage amplifying element 64, the same effects as those of the first embodiment can be obtained.

[0115] The present disclosure is not limited to the above-described embodiment, and various modifications can be made in the implementation stage without departing from the spirit of the present disclosure. Furthermore, the embodiments and modifications may be implemented in appropriate combination, and in that case, the combined effects can be obtained.

[0116] <Correspondence to terms used in claims> Resistor 1 is referred to as the first resistor in the claims, and resistor 2 is referred to as the second resistor in the claims. [Explanation of symbols]

[0117] 1-6 resistors, 7 input matching circuit, 8 interstage matching circuit, 9 output matching circuit, 11, 12 bias amplifier, 13 first stage amplifier, 14 second stage amplifier, 15 constant current power supply, 16-22 resistors, 23, 24 amplifier, 26-29 amplifier, 30, 32 resistors, 43 first stage amplifier, 44 second stage amplifier, 53, 54 amplifier, 56-59 amplifier, 63 first stage amplifier, 64 second stage amplifier, 73, 74 amplifier, 76-79 amplifier, 100 main amplifier, 110 main driver amplifier (MD), 120 main final amplifier (MF), 130 wavelength transmission line, 200 auxiliary amplifier, 210 auxiliary driver amplifier (AD), 220 auxiliary final amplifier (AF), 230 Wavelength transmission line, 300 Doherty amplifier, 400 Control IC, 410 Logic circuit, 420 Memory device, 430 DAC, 900 Doherty amplifier

Claims

1. A Doherty amplifier comprising a main amplifier and an auxiliary amplifier connected in parallel to the input terminals, Each of the main amplifier and the auxiliary amplifier has a driver amplifier connected to the input terminal and a final stage amplifier connected to the output of the driver amplifier. The driver amplifier, which is at least one of the main amplifier and the auxiliary amplifier, A first-stage amplifier element that performs initial amplification, and a second-stage amplifier element that performs second-stage amplification to amplify the output signal of the first-stage amplifier element, A bias terminal that receives the bias supplied to the control electrode of the first-stage amplifier element and the control electrode of the second-stage amplifier element, A first resistor, one end of which is connected to the control electrode of the first stage amplification element and the other end of which is connected to the bias terminal, A second resistor, one end of which is connected to the control electrode of the second stage amplification element, and the other end of which is connected to the bias terminal in parallel with the first resistor, A constant current power supply that draws current from the connection point between the second resistor and the control electrode of the second stage amplifier element, A Doherty amplifier having a [specific feature].

2. The Doherty amplifier according to claim 1, wherein the constant current power supply adjusts the current according to the threshold voltage of the amplifying element of the final stage amplifier of the main amplifier or the Class A-B control bias of the amplifying element set based on the threshold voltage.

3. The Doherty amplifier according to claim 2, wherein the constant current power supply of the driver amplifier of the main amplifier reduces the current when the threshold voltage or the Class A-B control bias is lower than a predetermined voltage.

4. The Doherty amplifier according to claim 2 or 3, wherein the constant current power supply of the driver amplifier of the main amplifier increases the current when the threshold voltage or the Class A-B control bias is higher than a predetermined voltage.

5. The Doherty amplifier according to claim 2 or 3, wherein the constant current power supply of the driver amplifier of the auxiliary amplifier reduces the current when the threshold voltage or the Class A-B control bias is higher than a predetermined voltage.

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