Method for hashing message using neural network model

Abstract

The present invention relates to a method for implementing hashing with high preimage resistance, collision resistance, and avalanche effect using a neural network model. A message hashing method according to an embodiment of the present invention comprises the steps of: generating a first random number dataset by setting each element of a vector having a first length as a random number, and generating a second random number dataset by setting each element of a vector having a second length shorter than the first length as a random number; supervised learning of a merge block using a first training dataset in which input / output data is composed of the first random number dataset; supervised learning of a hash block using a second training dataset in which input / output data is composed of the first and second random number datasets, respectively; generating a plurality of units by dividing a target message by the first length and sequentially inputting the plurality of units into the merge block serially connected by the number of units; and determining a digest having the second length by inputting the output of the serially connected merge block into the hash block.

Description

Technology Field

[0001] The present invention relates to a method for implementing hashing with high preimage resistance, collision resistance, and avalanche effect using a neural network model. Background Technology

[0003] A hash function is a one-way function that takes a message of arbitrary length as input and outputs a digest of fixed length. Such hash functions have the advantage that the original message cannot be inferred from a specific digest alone, and that a flood effect can be achieved, where a completely different digest is output even if only a single bit of the input message is changed. Due to these characteristics, hash functions are widely used in various security-related fields, such as verifying the integrity of files and data, detecting tampering, and digital transactions.

[0004] Meanwhile, various attack techniques have emerged to undermine the security of hash functions. For example, brute-force attacks that indiscriminately input data into a hash function to find the message corresponding to the digest, rainbow table attacks that use a database of mappings between messages and digests to quickly reverse-engineer the digest into a message, attacks that analyze the algorithm of the hash function itself, and attacks that cause hash collisions have been threatening the security of hash functions.

[0005] Nevertheless, the reason hash functions can still be used in various security systems is that the resources involved in hash function attacks are very large. For example, in the case of SHA-1 (Secure Hash Algorithm 1), one of the widely known hash functions, the number of possible cases is about 900 quadrillion, and it is known that it would take about 6,000 years to consider all possible cases with today's CPUs.

[0006] However, due to the pigeonhole principle and the birthday paradox, hash functions are fundamentally bound to cause hash collisions if the input is smaller than the output, so there is a risk that their stability will eventually be compromised. In fact, cases of hash collisions in SHA-1 are being discovered, and rainbow tables are also gradually being perfected.

[0007] Accordingly, there is a need for a hash function generation method that can be easily applied to systems using hash functions while having high preimage resistance, collision resistance, and swarm effect. The problem to be solved

[0009] The present invention aims to flexibly generate a digest by utilizing the characteristics of a neural network model to solve various security problems that may arise from the fixed operation algorithm of existing hash functions.

[0010] The objects of the present invention are not limited to those mentioned above, and other unmentioned objects and advantages of the present invention may be understood from the following description and will be more clearly understood by the embodiments of the present invention. Furthermore, it will be readily apparent that the objects and advantages of the present invention can be realized by the means and combinations thereof set forth in the claims. means of solving the problem

[0012] A message hashing method according to an embodiment of the present invention for achieving the aforementioned purpose comprises the steps of: generating a first random number dataset by setting each element of a vector having a first length as a random number, and generating a second random number dataset by setting each element of a vector having a second length shorter than the first length as a random number; supervised learning of a merge block using a first training dataset in which input / output data is composed of the first random number dataset; supervised learning of a hash block using a second training dataset in which input / output data is composed of the first and second random number datasets, respectively; generating a plurality of units by dividing a target message by the first length and sequentially inputting the plurality of units into the merge block serially connected by the number of units; and determining a digest having the second length by inputting the output of the serially connected merge block into the hash block.

[0013] In one embodiment, the step of generating a first random number dataset is characterized by including the step of generating first random number data by randomly determining each element of a vector having a first length as a real value having a uniform distribution between 0 and 1.

[0014] In one embodiment, the step of generating the second random number dataset is characterized by including the step of generating second random number data by randomly determining each element of the vector having the second length as a real value having a uniform distribution between 0 and 1.

[0015] In one embodiment, the step of supervising the merge block comprises extracting first-1 random data and first-2 random data from the first random data dataset, setting the first-1 random data as the input to the merge block, and setting the first-2 random data as the output to the merge block to supervise the merge block.

[0016] In one embodiment, the step of supervising the hash block is characterized by including the step of setting a first random number data extracted from the first random number dataset as the input of the hash block and setting a second random number data extracted from the second random number dataset as the output of the hash block to supervise the hash block.

[0017] In one embodiment, the merge block and hash block are characterized by being supervised learning over a preset epoch.

[0018] In one embodiment, the step of sequentially inputting into the merge block is characterized by including the step of inputting into the first merge block by combining the first unit with a reference vector set as an initial value, and the step of inputting into the second merge block by combining the second unit with the output of the first merge block.

[0019] In one embodiment, the step of generating the plurality of units comprises dividing the target message into a first length to generate a plurality of complete units, and padding a pre-set bit sequence into the remaining message among the target message after the generation of the complete units to generate the remaining units of the first length.

[0020] In one embodiment, the step of generating the plurality of units is characterized by further including the step of generating the first length unit representing the length of the target message.

[0021] In one embodiment, the step of sequentially inputting into the merge block is characterized by including the step of sequentially inputting the plurality of complete units, the remainder units, and the length units into the serially connected merge block.

[0022] In one embodiment, the step of inputting the output of the merge block into the hash block comprises a step of amplifying the output of the serially connected merge block, a step of applying a modulo-2 operation to the amplified output, and a step of inputting the applied value of the modulo-2 operation into the hash block.

[0023] In one embodiment, the step of determining the digest is characterized by including the step of determining the vector of the second length output from the hash block as the digest.

[0024] In one embodiment, the step of determining the digest comprises a step of amplifying the output of the hash block, a step of applying a modulo-2 operation to the amplified output, and a step of determining the applied value of the modulo-2 operation as the digest.

[0025] In one embodiment, the step of determining the digest comprises: determining a candidate digest for the target message and a verification digest for a test message that differs from the target message by only one bit; determining a first SAC (Strict Avalanche Criterion) and a first BIC (Bit Independence Criterion) based on the candidate digest and the verification digest; determining a second SAC and a second BIC based on a first sample digest in which each bit has a value of 0 or 1 with a probability of 1 / 2 and a second sample digest that differs from the first sample digest by only one bit; and determining the candidate digest as the digest for the target message if the first SAC is greater than the second SAC and the first BIC is smaller than the second BIC. Effects of the invention

[0027] The present invention has the advantage of being able to implement hashing with high inverse image resistance, collision resistance, and swarm effect by dynamically generating a digest using the characteristics of a neural network model, and can quickly solve security problems by rapidly changing the operation algorithm even if an external attack occurs.

[0028] In addition to the effects described above, the specific effects of the present invention are described together with the specific details for implementing the invention below. Brief explanation of the drawing

[0030] FIG. 1 is a diagram illustrating a method for hashing a message according to an embodiment of the present invention. FIG. 2 is a flowchart illustrating a message hashing method according to an embodiment of the present invention. FIG. 3 is a diagram illustrating the first and second random number datasets. Figure 4 is a diagram illustrating supervised learning of merge blocks. FIG. 5 is a drawing illustrating an example of a merged block. Figure 6 is a diagram illustrating supervised learning of hash blocks. FIG. 7 is a drawing illustrating an example of a hash block. FIG. 8 is a diagram illustrating the structure of a neural network model for digest generation. FIGS. 9 and FIGS. 10 are drawings illustrating a target message divided into multiple units. FIG. 11 is a diagram illustrating the process of processing the output of a merge block. FIG. 12 is a diagram illustrating the process of generating a digest by processing the output of a hash block. Figure 13 is a diagram illustrating the verification process of a neural network model. Specific details for implementing the invention

[0031] The aforementioned objectives, features, and advantages are described in detail below with reference to the attached drawings, thereby enabling those skilled in the art to easily implement the technical concept of the present invention. In describing the present invention, detailed descriptions of known technologies related to the present invention are omitted if it is determined that such descriptions would unnecessarily obscure the essence of the invention. Hereinafter, preferred embodiments according to the present invention will be described in detail with reference to the attached drawings. In the drawings, the same reference numerals are used to indicate the same or similar components.

[0032] In this specification, terms such as "first," "second," etc. are used to describe various components, but these components are not limited by these terms. These terms are used merely to distinguish one component from another, and unless specifically stated otherwise, the first component may be the second component.

[0033] Additionally, in this specification, the statement that any configuration is disposed on the "upper (or lower)" or "upper (or lower)" of a component may mean not only that any configuration is disposed in contact with the upper (or lower) surface of said component, but also that another configuration may be interposed between said component and any configuration disposed on (or below) said component.

[0034] Furthermore, where it is stated in this specification that one component is "connected," "coupled," or "connected" to another component, it should be understood that while the components may be directly connected or connected to each other, another component may be "interposed" between each component, or each component may be "connected," "coupled," or "connected" through another component.

[0035] Additionally, singular expressions used in this specification include plural expressions unless the context clearly indicates otherwise. In this application, terms such as "composed of" or "comprising" should not be interpreted as necessarily including all of the various components or steps described in the specification, and should be interpreted as meaning that some of the components or steps may not be included, or that additional components or steps may be included.

[0036] Additionally, in this specification, "A and / or B" means A, B, or A and B unless specifically stated otherwise, and "C to D" means C or more and D or less, unless specifically stated otherwise.

[0037] The present invention relates to a method for implementing hashing with high preimage resistance, collision resistance, and avalanche effect using a neural network model. Hereinafter, a message hashing method using a neural network model according to an embodiment of the present invention will be described in detail with reference to FIGS. 1 to 13.

[0038] FIG. 1 is a diagram illustrating a method for hashing a message according to an embodiment of the present invention, and FIG. 2 is a flowchart illustrating a message hashing method according to an embodiment of the present invention.

[0039] Figure 3 is a diagram illustrating the first and second random number datasets.

[0040] FIG. 4 is a diagram illustrating supervised learning of merged blocks, and FIG. 5 is a diagram illustrating an example of merged blocks. Also, FIG. 6 is a diagram illustrating supervised learning of hash blocks, and FIG. 7 is a diagram illustrating an example of hash blocks.

[0041] Figure 8 is a diagram illustrating the structure of a neural network model for digest generation.

[0042] Figures 9 and 10 illustrate a target message divided into multiple units.

[0043] FIG. 11 is a diagram illustrating the process of processing the output of a merged block, and FIG. 12 is a diagram illustrating the process of processing the output of a hash block to generate a digest.

[0044] Figure 13 is a diagram illustrating the verification process of a neural network model.

[0045] The message hashing method using a neural network model of the present invention (hereinafter, message hashing method) is performed by a computing device, and the computing device may include at least one physical element among ASICs (application specific integrated circuits), DSPs (digital signal processors), DSPDs (digital signal processing devices), PLDs (programmable logic devices), FPGAs (field programmable gate arrays), microcontrollers, controllers, processors, and microprocessors to perform each operation described below. However, for the convenience of explanation, the operation of the present invention will be described below as being performed by a processor.

[0046] First, the operation of the present invention will be outlined with reference to FIG. 1.

[0047] The processor can set hyperparameters of the neural network model (S1). At this time, the hyperparameters may include the digest length to be generated through the neural network model, the amplifier strength described later, and the structure of the neural network model (NN structure).

[0048] Next, the processor can build a training dataset for training a neural network model (S2), and can use the training dataset to train merge blocks and hash blocks included in the neural network model.

[0049] Once the training of the neural network model is complete, the processor can preprocess the target message and then input it into the neural network model to run the hash function generator (S3).

[0050] Additionally, the processor can generate a random vector with random bits to verify the performance of the hash function generator (S4), and calculate the Strict Avalanche Criterion (SAC) and Bit Independence Criterion (BIC) thresholds for it.

[0051] Next, the processor can compare the SAC and BIC calculated based on the output of step (S3) with the SAC and BIC thresholds calculated in step (S4), respectively, to finally output a digest for the target message (S6), or rebuild the training dataset of the neural network model (S2) to retrain the neural network model.

[0052] The operation of the present invention, which was previously outlined, will be described in detail below.

[0053] Referring to FIG. 2, a message hashing method according to one embodiment of the present invention may include the steps of: generating a first random number dataset of a first length and a second random number dataset of a second length (S10); supervised learning of a merge block based on a training dataset composed of the first random number dataset (S20); supervised learning of a hash block based on a training dataset composed of the first and second random number datasets (S30); sequentially inputting a plurality of units in which a target message is divided by a first length into serially connected merge blocks (S40); and inputting the output of the serially connected merge blocks into a hash block to determine a digest of a second length (S50).

[0054] However, the message hashing method illustrated in FIG. 2 is according to one embodiment, and the steps constituting the invention are not limited to the embodiment illustrated in FIG. 2, and some steps may be added, changed, or deleted as needed.

[0055] Below, each step illustrated in FIG. 2 will be explained in detail.

[0056] The processor can generate a first random number dataset by setting each element of a vector having a first length as a random number, and generate a second random number dataset by setting each element of a vector having a second length shorter than the first length as a random number (S10). Here, the second length may be the length of the digest to be output through message hashing and may be pre-set as a hyperparameter as described in FIG. 1. Meanwhile, the first length may be set to be longer than the second length, for example, it may be set to twice the second length.

[0057] Referring to FIG. 3, the processor has a first random number dataset (R a The first length (1) included in ) st Create a vector of length, but the elements that make up the vector (elements, a nm ) can be set as a random number. In this case, considering that the digest generated through the present invention has a bit value of 0 or 1, the processor can randomly set the random number as a real number having a uniform distribution between 0 and 1.

[0058] First random number dataset (R a Since ) is used for learning the merge block (100) and hash block (200) described later, the processor generates a plurality of vectors of a first length and a first random number dataset (R a ) can be constructed. For example, as illustrated in FIG. 3, the processor can construct a first random number dataset (R aA total of n vectors can be generated as vectors included in ), each vector can have m elements (first length), and each element can be randomly set as a real number having a uniform distribution between 0 and 1.

[0059] In addition, the processor uses a second random number dataset (R b The second length (2) included in ) nd Create a vector of length, but the elements (b) that constitute the vector nk The digests can be set as random numbers. Even in this case, considering that the digest has a bit value of 0 or 1, the processor can randomly set the random numbers as real numbers with a uniform distribution between 0 and 1.

[0060] 2nd Random Number Dataset (R b Since ) is used for learning the hash block (200) described later, the processor generates multiple vectors of a second length and a second random number dataset (R b ) can be constructed. For example, as illustrated in FIG. 3, the processor can construct a second random number dataset (R b A total of n vectors can be generated as vectors included in ), each vector can have k elements (second length), and each element can be randomly set as a real number having a uniform distribution between 0 and 1.

[0061] Next, the processor receives the input / output data as the first random number dataset (R a A merge block (100) can be supervised learning using a first training dataset composed of ) (S20). In the present invention, the merge block (100) may include any neural network that performs a regression task.

[0062] The first training dataset may include pairs of input data and corresponding label data, and the processor has a first random number dataset (R aA merge block (100) can be supervised learning using a data pair consisting only of )

[0063] Referring to FIG. 4, the processor has a first random number dataset (R a The first-1 random number data (#i) and the first-2 random number data (#j) can be extracted from the ). Subsequently, the processor can supervise the merge block (100) by setting the first-1 random number data (#i) as the input, i.e., input data, of the merge block (100) and setting the first-2 random number data (#j) as the output, i.e., label data, of the merge block (100). This supervised learning can be performed repeatedly while changing the first-1 random number data and the first-2 random number data.

[0064] Meanwhile, generally, when a neural network is supervised, the neural network learns a non-linear correlation between the input and the output, but as shown in FIG. 4, the merge block (100) is learned based on data set as a random number, so it cannot learn the correlation between the input and output data.

[0065] Accordingly, the merge block (100) cannot identify specific rules or patterns on its own and can satisfy the preimage resistance condition of the hash function. That is, if internal parameters (weight, bias, etc.) are fixed according to the learning of the merge block (100), even if the merge block (100) is retrained with the same random data, the merge block (100) will output different data for the same input.

[0066] Referring specifically to FIG. 5, in one example, the merge block (100) may be implemented by including a multi-layer perceptron (MLP), specifically a fully connected layer (FCL) that receives data of a first length and outputs data of a first length.

[0067] Each layer included in the merge block (100) may include multiple nodes, and each node may have parameters, specifically weights and biases. The parameters of each node are updated per learning epoch according to the correlation between the input data and the output data, but as described above, since the input and output data of the merge block (100) are set to random numbers, the parameters may not converge to a specific value. Accordingly, the processor may proceed with the learning of the merge block (100) only for a preset number of epochs, and the parameters of each node may have the final updated value in that epoch.

[0068] When the merge block (100) is learned in the manner described above, the parameters of each node can also be determined arbitrarily. Accordingly, even if a merge block (100) of the same structure is learned with the same data, the newly determined parameters differ from the parameters of the previously learned merge block (100), and as a result, the merge block (100) can have preimage resistance, which is a condition of the hash function.

[0069] Next, the processor [describes] the input / output data as the first and second random number datasets (R a , R b A hash block (200) can be supervised learning using a second training dataset composed of each of the following (S30). In the present invention, the hash block (200) may include any neural network that performs a regression task.

[0070] The second training dataset may include pairs of input data and corresponding label data, and the processor has a first random number dataset (R a Input data consisting only of ) and a second random number dataset (R b A merge block (100) can be supervised learning using a pair of label data consisting only of )

[0071] Referring to FIG. 6, the processor [uses] a first random number dataset (R a Extract the first random number data (#i) from ), and the second random number dataset (R b A second random number data (#j) can be extracted from ). Subsequently, the processor can supervise the hash block (200) by setting the first random number data (#i) as the input, i.e., input data, of the hash block (200) and setting the second random number data (#j) as the output, i.e., label data, of the hash block (200). This supervised learning can be performed repeatedly while changing the first and second random number data.

[0072] As described above, the hash block (200) is also learned based on random numbers with different input and output lengths, so it is unable to learn the correlation between the input and output data. Accordingly, the hash block (200) is also unable to identify specific rules or patterns on its own and can satisfy the preimage resistance condition of the hash function.

[0073] Referring specifically to FIG. 7, in one example, the hash block (200) may be implemented by including a multilayer perceptron (MLP), specifically a fully connected layer (FCL) that receives data of a first length and outputs data of a second length.

[0074] Each layer included in the hash block (200) may include multiple nodes, and each node may have parameters, specifically weights and biases. The parameters of each node are updated per learning epoch according to the correlation between the input data and the output data, but as described above, since the input and output data of the hash block (200) are set to random numbers, the parameters may not converge to a specific value. Accordingly, the processor may only perform the learning of the hash block (200) for a preset number of epochs, and the parameters of each node may have the final updated value in that epoch.

[0075] When a hash block (200) is learned in the manner described above, the parameters of each node can also be determined arbitrarily. Accordingly, even if a hash block (200) of the same structure is learned with the same data, the newly determined parameters differ from the parameters of the previously learned hash block (200), and as a result, the hash block (200) can have preimage resistance, which is a condition of a hash function.

[0076] Below, we will explain the process of determining a digest for a target message using the merge block (100) and hash block (200) learned according to the method described above.

[0077] The processor can divide a target message into a first length to create a plurality of units, and sequentially input the plurality of units into a merge block (100) serially connected in the same number of units (S40). The target message is a message to be hashed and can have any length, and in the present invention, it is assumed that the target message is longer than the first length.

[0078] Referring to FIG. 8, a neural network model according to one embodiment of the present invention may include a merge block (100) serially connected as many times as the number of units, and a hash block (200) connected to the final output terminal of the merge block (100). As described in steps (S20) and (S30), since both the merge block (100) and the hash block (200) are trained to receive data of a first length, the processor may generate a plurality of units (300) by dividing a target message, specifically a bit sequence representing the target message, into a first length to input a target message into the merge block (100).

[0079] When a target message is divided into first to nth units (300), the processor may input the first unit into the first merge block (100), the second unit into the second merge block (100), and likewise the nth unit into the nth merge block (100). At this time, in order for all units (300) constituting the target message to be merged, the neural network model may have a structure in which the output of the n-1st merge block (100) is concatenated, for example, by an XOR operation, with the nth unit input into the nth merge block (100), as shown in FIG. 8.

[0080] Meanwhile, referring again to FIG. 8, in order to provide consistency to the merging operation of the merging block (100), the processor may combine the first unit with the initialization vector set as the initial value and input it into the first merging block (100), and combine the second unit with the output of the first merging block (100) and input it into the second merging block (100).

[0081] At this time, the reference vector may have a first length as a vector in which its elements are set to either 0 or 1 as initial values. By having this reference vector fixedly input to the first merge block (100) regardless of the target message, consistency in the merge operation by serially connected multiple merge blocks (100) can be increased.

[0082] Meanwhile, the target message may not be completely divided into units of the first length. That is, if the target message is divided from the front by the first length, a bit sequence shorter than the first length may remain after the division.

[0083] At this time, the processor can divide the target message into a first length to generate a plurality of complete units, and after generating the complete units among the target messages, pad the remaining message that is shorter than the first length with a preset bit sequence to generate a remaining unit of the first length.

[0084] Referring to FIG. 9, assuming the target message consists of 542 bits, the processor can divide the target message into a first length from the front to generate a plurality of complete units (310). This division operation may generate a residual message shorter than the first length, and the processor can pad the residual message with a pre-set bit sequence (e.g., 0 bits, but not limited thereto) to generate a residual unit (320) of the first length. Accordingly, regardless of the length of the target message, the target message can be divided into units (300) of the first length that can be input into the merge block (100).

[0085] Meanwhile, when generating a residual unit (320) for a first and second target message in which all bits except the residual message are identical, if the residual message of the first target message ends in '0' and the residual message of the second target message ends in '00', the units (320) for the two target messages become completely identical due to the padding of 0 bits, which can cause a hash collision.

[0086] To prevent this, the processor may generate a first length unit representing the length of the target message.

[0087] Referring to FIG. 10, if the target message consists of 542 bits as exemplified in FIG. 9, the processor divides the target message into a first length from the front to generate a plurality of complete units (310), pads the remaining message with 0 bits to generate a first length residual unit (320), and additionally, the processor may generate a first length length unit (330) representing the length of the target message, i.e., 542. Through this unit generation process, the occurrence of hash collisions can be prevented regardless of the length or bits of the target message.

[0088] As illustrated in FIG. 10, when a target message is divided into a plurality of complete units (310), one residual unit (320), and one length unit (330), the processor can sequentially input each unit (300) into a serially connected merge block (100) in the order of the complete unit (310), the residual unit (320), and the length unit (330). By standardizing the data input order in this way, higher consistency can be provided to the merge operation by the plurality of merge blocks (100).

[0089] The processor can determine a digest having a second length by sequentially inputting each unit (300) into serially connected merge blocks (100) and inputting the final output of the last merge block (100) into a hash block (200) (S50).

[0090] Meanwhile, the merge block (100) can output a regression value between 0 and 1 as it performs a regression task, and the processor can input the final output value of the merge block (100) into the hash block (200) by amplifying and converting it to increase the inverse resistance and flood effect of the hashing operation.

[0091] Referring to FIG. 11, the processor can convert the final output of the merge block (100) into a bit value of 0 or 1 through an amplifier (400). The amplifier may be composed of a multiplication operation module (410), a modulo-2 operation module (420), and an output module (430).

[0092] The processor can amplify the output of the merge block (100) through the multiplication operation module (410). In one example, the processor to the output of the merge block (100) A real value between 0 and 1 can be amplified into a value including an integer part by multiplying by a large value. Subsequently, the processor can obtain the remainder by dividing the integer part of the amplified output by 2 through the modulo-2 operation module (420), and can output the operation applied value, i.e., the remainder, through the output module (430).

[0093] In a specific example, if any element of the output of the merge block (100) is 0.142934137, the processor [indicates] to that output It can be amplified to 142934.137 by multiplying, and the remainder 0 can be output by dividing the integer part 142934 by 2.

[0094] Accordingly, the real number regression value between 0 and 1 finally output from the merge block (100) can be changed to a merged unit of bit sequences of 0 or 1, and the processor can input the merged unit into the hash block (200).

[0095] Since the hash block (200) is pre-trained to receive random number data of a first length and output random number data of a second length, it can receive a merge unit of a first length that was not used for training and output a vector of a second length. The processor can determine the vector of a second length output from the hash block (200) as a digest.

[0096] Meanwhile, the hash block (200) can output a regression value between 0 and 1 as it performs a regression task, just like the merge block (100). The processor can amplify and transform the output of the hash block (200) to increase the inverse resistance and flood effect of the hashing operation, and determine the transformed value as a digest.

[0097] Referring to FIG. 12, the processor can convert the output of the hash block (200) through the same amplifier (400) as illustrated in FIG. 11. Specifically, the processor converts the output of the hash block (200) through a multiplication operation module (410). A real value between 0 and 1 can be amplified into a value including an integer part by multiplying by a large value. Subsequently, the processor can obtain the remainder by dividing the integer part of the amplified output by 2 through the modulo-2 operation module (420), output the operation applied value, i.e., the remainder, through the output module (430), and determine the output remainder as a digest.

[0098] As described above, the present invention has the advantage of being able to implement hashing with high inverse image resistance, collision resistance, and swarm effect by dynamically generating a digest using the characteristics of a neural network model, and can quickly solve security problems by rapidly changing the operation algorithm even if an external attack occurs.

[0099] Meanwhile, the processor may additionally perform a stability verification operation on the digest generated through the aforementioned neural network model. In this case, Strict Avalanche Criterion (SAC) and Bit Independence Criterion (BIC) may be used as parameters for verification.

[0100] Referring to FIG. 13, the processor can determine a candidate digest by applying steps (S40) and (S50) to a target message (Message bit array) having a random length, and can determine a verification digest by applying steps (S40) and (S50) to a test message (1 bit flipped array) that differs from the target message by only 1 bit at an arbitrary position. The operation of determining the candidate digest and the verification digest can be performed N times depending on the number of target messages.

[0101] Next, the processor can determine the first SAC and the second BIC based on the candidate digest and the verification digest.

[0102] SAC can represent the Hamming distance between two input digests when there exists a given input and another input that is only one bit different from that input. For example, if the candidate digest is '10100110' and the verification digest is '10110101', the SAC can be 3.

[0103] Meanwhile, BIC is an indicator of how independent the relationship between a given input and output is, and can be expressed as the Pearson correlation coefficient as shown in [Equation 1] below.

[0104] [Mathematical Formula 1]

[0105]

[0106] (Here is the Pearson correlation coefficient, D c is Candidate Digest, D v is the verification digest, con is the covariance, and SD is the standard deviation)

[0107] These SAC and BIC calculation operations can be performed for each of the N pairs of candidate digests and verification digests, and the processor can determine the average values ​​of the SAC and BIC as the first SAC and the second BIC, respectively.

[0108] Subsequently, the processor can determine a second SAC and a second BIC based on a first sample digest (random bit array) in which each bit has a value of 0 or 1 with a probability of 1 / 2, and a second sample digest that differs from the first sample digest by only 1 bit. Even in this case, the SAC and BIC calculation operations can be performed for each of the first and second sample digests of the M pair, and the processor can determine the average values ​​of the SAC and BIC as the second SAC and the second BIC, respectively.

[0109] Since the first sample digest contains bits of 0 or 1 determined by a probability of 1 / 2, the second SAC and the second BIC can be considered as threshold parameters for an ideal digest.

[0110] Basically, since it is known that the higher the SAC and the lower the BIC, the greater the flood effect of the hash function, the processor can determine that the first SAC determined through steps (S40) and (S50) is greater than the second SAC determined by the sample message, and the first BIC determined through steps (S40) and (S50) is smaller than the second BIC determined by the sample message, and thus determine that steps (S40) and (S50) generate a sufficiently large flood effect, and finally determine the candidate digest as the digest for the target message.

[0111] Conversely, if the first SAC is smaller than the second SAC or the first BIC is larger than the second BIC, the processor determines that steps (S40) and (S50) do not generate a sufficiently large surge effect and can re-perform the learning operations of steps (S20) and (S30).

[0112] The stability verification of existing hash functions is performed through algorithm analysis or collision pair analysis, which requires a significant amount of time. In contrast, as mentioned above, the present invention has the advantage of being able to verify the stability of the hashing operation through a very simple mathematical methodology.

[0113] Although the present invention has been described above with reference to the illustrated drawings, the present invention is not limited by the embodiments and drawings disclosed in this specification, and it is obvious that various modifications can be made by a person skilled in the art within the scope of the technical concept of the present invention. Furthermore, even if the effects of the configuration of the present invention were not explicitly described while explaining the embodiments of the present invention above, it is natural to acknowledge that the effects predictable by said configuration should also be recognized.

Claims

Claim 1 A message hashing method using a neural network model comprising: a step of generating a first random number dataset by setting each element of a vector having a first length as a random number, and generating a second random number dataset by setting each element of a vector having a second length shorter than the first length as a random number; a step of supervised learning a merge block using a first training dataset in which input / output data is composed of the first random number dataset; a step of supervised learning a hash block using a second training dataset in which input / output data is composed of the first and second random number datasets, respectively; a step of generating a plurality of units by dividing a target message by the first length and sequentially inputting the plurality of units into the merge block serially connected by the number of units; and a step of determining a digest having the second length by inputting the output of the serially connected merge block into the hash block, wherein each element of the vector constituting the first or second random number dataset is randomly determined as a real value having a uniform distribution between 0 and 1. Claim 2 delete Claim 3 delete Claim 4 A message hashing method using a neural network model according to claim 1, wherein the step of supervising the merge block comprises extracting first-1 random data and first-2 random data from the first random data dataset, setting the first-1 random data as the input of the merge block and setting the first-2 random data as the output of the merge block to supervise the merge block. Claim 5 A message hashing method using a neural network model according to claim 1, wherein the step of supervising the hash block comprises setting a first random number data extracted from a first random number dataset as the input of the hash block and setting a second random number data extracted from a second random number dataset as the output of the hash block. Claim 6 In claim 1, the message hashing method using a neural network model that is supervised learning the merge block and hash block in a preset epoch. Claim 7 A message hashing method using a neural network model according to claim 1, wherein the step of sequentially inputting into the merge block comprises the step of inputting into the first merge block by combining the first unit with a reference vector set as an initial value, and the step of inputting into the second merge block by combining the second unit with the output of the first merge block. Claim 8 A message hashing method using a neural network model according to claim 1, wherein the step of generating the plurality of units comprises dividing the target message into a first length to generate the plurality of complete units, and padding the remaining message among the target message after the generation of the complete units with a preset bit sequence to generate the remaining unit of the first length. Claim 9 In claim 8, the step of generating the plurality of units further includes the step of generating the first length unit representing the length of the target message, in a message hashing method using a neural network model. Claim 10 In claim 9, the step of sequentially inputting into the merge block comprises the step of sequentially inputting the plurality of complete units, the remainder units, and the length units into the serially connected merge block, in a message hashing method using a neural network model. Claim 11 A message hashing method using a neural network model according to claim 1, wherein the step of inputting the output of the merged block into the hash block comprises a step of amplifying the output of the serially connected merged block, a step of applying a modulo-2 operation to the amplified output, and a step of inputting the applied value of the modulo-2 operation into the hash block. Claim 12 A message hashing method using a neural network model according to claim 1, wherein the step of determining the digest includes the step of determining the second length vector output from the hash block as the digest. Claim 13 A message hashing method using a neural network model according to claim 1, wherein the step of determining the digest comprises a step of amplifying the output of the hash block, a step of applying a modulo-2 operation to the amplified output, and a step of determining the applied value of the modulo-2 operation as the digest. Claim 14 A message hashing method using a neural network model according to claim 1, wherein the step of determining the digest comprises: determining a candidate digest for the target message and a verification digest for a test message that differs from the target message by only one bit; determining a first SAC (Strict Avalanche Criterion) and a first BIC (Bit Independence Criterion) based on the candidate digest and the verification digest; determining a second SAC and a second BIC based on a first sample digest in which each bit has a value of 0 or 1 with a probability of 1 / 2 and a second sample digest that differs from the first sample digest by only one bit; and determining the candidate digest as the digest for the target message if the first SAC is greater than the second SAC and the first BIC is smaller than the second BIC.

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