Semiconductor package

The semiconductor package effectively addresses heat dissipation and moisture prevention in GaN power semiconductors through a recessed frame and copper components, enhancing reliability and performance.

KR102993463B1Active Publication Date: 2026-07-21A PRO SEMICON CO LTD
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Patent Information

Authority / Receiving Office
KR · KR
Patent Type
Patents
Current Assignee / Owner
A PRO SEMICON CO LTD
Filing Date
2024-08-23
Publication Date
2026-07-21

AI Technical Summary

Technical Problem

Existing semiconductor packages face challenges in efficiently dissipating the high heat generated by GaN power semiconductors and preventing moisture absorption, leading to thermal deformation and performance degradation.

Method used

A semiconductor package design featuring a metal frame with a recessed concave portion, copper support, and copper electrical connection members, along with grooves and a molding to enhance heat dissipation and insulation, while maintaining component spacing to prevent moisture absorption.

Benefits of technology

The design efficiently dissipates heat and prevents moisture absorption, improving the reliability and service life of GaN power semiconductors by dispersing heat and maintaining electrical integrity.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention relates to a semiconductor package, comprising: a semiconductor chip; and a frame that accommodates the semiconductor chip inside, wherein the frame includes a recess formed downward from the upper surface of the frame, and the semiconductor chip is disposed in the recess.
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Description

Technology Field

[0001] The present invention relates to a semiconductor package. Background Technology

[0002] Generally, multiple semiconductor chips are formed on a wafer, and each semiconductor chip formed on the wafer is cut along the scribe lane of the wafer. The individual semiconductor chips cut and separated from the wafer can be stacked on a substrate or frame and can be electrically connected through a wire bonding process.

[0003] It is necessary to place these semiconductor chips in required locations while considering factors such as power supply and heat dissipation methods. The field of semiconductor packaging technology, which enables semiconductor chips to be placed in appropriate locations and ensures stable electrical connections, has evolved alongside semiconductor technology.

[0004] Meanwhile, with the advancement of semiconductor technology, GaN power semiconductors have been developed that offer faster switching speeds than Si power semiconductors. However, since GaN power semiconductors emit more heat than conventional Si power semiconductors, problems are arising where the emitted heat causes thermal deformation of the GaN power semiconductor package or degrades the performance of the GaN power semiconductor.

[0005] To address these issues, there is a growing need for a semiconductor package that can enhance the heat dissipation effect of a semiconductor package accommodating GaN power semiconductors, which emit a large amount of heat without the addition of additional components, while also improving the reliability of the semiconductor. The problem to be solved

[0006] Embodiments of the present invention were invented against the background described above and aim to provide a semiconductor package having a structure capable of efficiently dissipating heat generated from components disposed in the semiconductor package.

[0007] In addition, we intend to provide a semiconductor package having a structure that prevents interface moisture absorption toward the semiconductor chip. means of solving the problem

[0008] According to one aspect of the present invention, a semiconductor package may be provided, comprising: a semiconductor chip; and a frame that accommodates the semiconductor chip inside, wherein the frame includes a recess recessed downward from the upper surface of the frame, and the semiconductor chip is disposed in the recess.

[0009] In addition, the above frame may be provided as a semiconductor package made of a metal material capable of etching 50% to 90% of the thickness of the frame.

[0010] In addition, the above frame may be provided with a semiconductor package containing copper (Cu).

[0011] Additionally, a semiconductor package may be provided, further comprising: a molding that surrounds the semiconductor chip and is disposed in the concave portion so as to insulate the semiconductor chip; and an electrical connection member, one end of which is connected to the semiconductor chip and the other end opposite to the one end of which is connected to the frame, and the portion between the one end and the other end of which is disposed so as to face upward.

[0012] Additionally, a semiconductor package may be provided in which one or more of the semiconductor chip, the molding, and the electrical connection member are positioned in contact with or further lower than a virtual surface formed parallel to the upper surface of the frame.

[0013] Additionally, a semiconductor package may be provided, comprising: a frame formed to surround the concave portion and configured to have a thickness greater in the vertical direction than the concave portion; and a connecting portion connecting the concave portion and the body portion, and having a curved shape such that the height gradually increases from the concave portion to the body portion when viewed from the left and right directions.

[0014] Additionally, the semiconductor chip may be provided in a semiconductor package positioned at the top of the recess so as to be spaced apart from the connection portion by a first separation distance in the left and right directions.

[0015] In addition, a semiconductor package may be provided in which the first separation distance is smaller than the width of the connection portion in the left and right directions.

[0016] In addition, a semiconductor package may be provided in which the width of the body portion in the left and right directions is 10% to 60% of the width of the frame in the left and right directions.

[0017] In addition, a semiconductor package may be provided in which the width of the connection portion in the left and right directions is 400 µm or more and 600 µm or less.

[0018] In addition, a semiconductor package may be provided in which the width of the concave portion in the left-right direction is 70% to 90% of the width of the frame in the left-right direction.

[0019] Additionally, the above frame further includes one or more grooves formed such that at least a portion of the side is closer to the concave side, and the grooves include a first edge groove recessed from the side of the frame by the width of the first edge groove in a direction in which the source and drain of the semiconductor chip are spaced apart; and a second edge groove recessed from the side of the frame by the width of the first edge groove in a direction in which the source and drain of the semiconductor chip are spaced apart, wherein the width of the first edge groove is smaller than the width of the second edge groove, a semiconductor package may be provided.

[0020] Additionally, a semiconductor package may be provided in which the grooves are provided in a plurality, and the plurality of grooves are formed on the side so as to be spaced apart from each other.

[0021] Additionally, a semiconductor package may be provided, further comprising: a molding disposed adjacent to at least one of the semiconductor chip and the frame so as to insulate the semiconductor chip and the frame from each other; and an electrical connection member comprising a plurality of wires, one end of which is electrically connected to the semiconductor chip through wire bonding, and the other end, which is opposite to the one end, is electrically connected to the frame through wire bonding.

[0022] Additionally, a semiconductor package may be provided in which at least one of the semiconductor chip, the molding, and the electrical connection member is positioned in contact with or further lower than a virtual surface formed parallel to the upper surface of the frame. Effects of the invention

[0023] According to embodiments of the present invention, there is an effect of efficiently dissipating heat generated from components placed in a semiconductor package.

[0024] In addition, according to the embodiments of the present invention, there is an effect of preventing interface moisture absorption toward the semiconductor chip. Brief explanation of the drawing

[0025] FIG. 1 is a plan view showing a semiconductor package according to a first embodiment of the present invention. Figure 2 is a cross-sectional view taken along the AA' incision line of Figure 1. Figure 3 is a cross-sectional view taken along the BB' incision line of Figure 1. Figure 4 is a diagram showing heat being released to the outside in a cross-sectional view cut along the AA' cut line of Figure 1. FIG. 5 is a diagram illustrating when a semiconductor chip and an electrical connection member are removed from a semiconductor package according to a first embodiment of the present invention. FIG. 6 is a lower side view illustrating the lower surface of a semiconductor package according to a first embodiment of the present invention. FIG. 7 is a plan view showing a semiconductor package according to a second embodiment of the present invention. Figure 8 is a cross-sectional view taken along the CC' incision line of Figure 7. Specific details for implementing the invention

[0026] Hereinafter, specific embodiments for implementing the technical concept of the present invention will be described in detail with reference to the drawings.

[0027] In addition, in describing the present invention, if it is determined that a detailed description of related known components or functions may obscure the essence of the invention, such detailed description is omitted.

[0028] Furthermore, when it is mentioned that one component is 'placed' or 'connected' to another component, it should be understood that while it may be directly placed or connected to that other component, there may also be other components present in between.

[0029] The terms used in this specification are used merely to describe specific embodiments and are not intended to limit the invention. Singular expressions include plural expressions unless the context clearly indicates otherwise.

[0030] Furthermore, it should be noted in advance that expressions such as upper, lower, upward, downward, etc. in this specification are described based on the drawings, and may be expressed differently if the direction of the object changes. For the same reason, some components in the attached drawings are exaggerated, omitted, or schematically depicted, and the size of each component does not entirely reflect its actual size.

[0031] Additionally, terms including ordinal numbers, such as first, second, etc., may be used to describe various components, but such components are not limited by such terms. These terms are used solely for the purpose of distinguishing one component from another.

[0032] The meaning of "comprising" as used in the specification specifies certain characteristics, regions, integers, steps, operations, elements, and / or components, and does not exclude the existence or addition of other specific characteristics, regions, integers, steps, operations, elements, components, and / or groups.

[0033] Hereinafter, a specific configuration of a semiconductor package according to an embodiment of the present invention will be described with reference to FIGS. 1 to 6. The semiconductor package (1) can accommodate a semiconductor chip internally and can safely protect the accommodated semiconductor chip from external shocks, etc. Such a semiconductor package (1) may include a semiconductor chip (100), a frame (200), a molding (300), and an electrical connection member (400).

[0034] Referring to FIG. 1, the semiconductor chip (100) can be used as a component such as an electronic circuit by utilizing its electrical conductivity characteristics. This semiconductor chip (100) may be an active device cut from a wafer. Additionally, the semiconductor chip (100) may include a substrate, a channel layer, a barrier layer, a source, a gate, and a drain. The semiconductor chip (100) may be connected to a power source, and when connected to a power source, electrons may move within it. This semiconductor chip (100) may be accommodated inside the frame (200). Specifically, the semiconductor chip (100) may be placed on the upper side of the concave portion (230) to be described later. Additionally, the semiconductor chip (100) may be wrapped by a molding (300). The thickness of the semiconductor chip (100) in the vertical direction may be formed to be smaller than the thickness of the frame (200).

[0035] Referring further to FIGS. 2 through 6, the frame (200) may provide space to accommodate a semiconductor chip (100) inside. This frame (200) may support the semiconductor chip (100), the molding (300), and the electrical connection member (400). Additionally, the frame (200) may form the outer shape of the semiconductor package (1). The frame (200) may include a support (210), a groove (220), a recess (230), a body part (240), and a connection part (250).

[0036] The support (210) may be formed from a metal material or ceramic substrate capable of etching up to 50% to 90% of the thickness of the frame (200). In other words, the support (210) may be formed from a metal material or ceramic substrate having a softness such that it can be etched up to about 50% of the thickness of the frame (200). Additionally, the support (210) may include a metal with a Mohs hardness between 2.0 and 4.0 based on Mohs hardness. For example, the support (210) may be manufactured to include copper (Cu) with a Mohs hardness of 3.0. The copper (Cu) content in the support (210) may be about 60% to 99.99%. For example, C1100 copper may be used for the support (210). Additionally, the copper content of the support (210) may be greater than or equal to the copper content of the electrical connection member (400). However, the concept of the present invention is not limited thereto, and the copper content of the support (210) may vary depending on the shape of the frame (200) and the use and purpose of the semiconductor package (1). At least one of the semiconductor chip (100), the molding (300), and the electrical connection member (400) may be disposed parallel to a virtual surface formed to be parallel to the upper surface of the support (210), or on the lower side thereof. The lower surface of such a support (210) may be directly exposed to the outside. Additionally, the support (210) may be formed to be in contact with the molding (300).

[0037] A groove (220) may be formed on at least a portion of the side of the support (210). This groove (220) may be formed to face the concave portion (230) from the outside. Specifically, the groove (220) may be a groove formed in the support (210). Additionally, one or more grooves (220) may be provided in the support (210). Multiple grooves (220) may be formed on the side of the support (210) spaced apart from each other.

[0038] The concave portion (230) may be formed by etching downward from the upper surface of the frame (200). In other words, the concave portion (230) may be at least a part of the support (210) etched to 50% to 90% of the thickness of the frame (200). A semiconductor chip (100) may be placed at the top of the concave portion (230) at a position spaced apart from the connecting portion (250) by a first separation distance (D) in the left-right direction. The first separation distance (D), which is the separation distance between the concave portion (230) and the connecting portion (250), is the width (W) of the connecting portion (250) in the left-right direction. L It may be smaller than ). Also, the width (W) in the left-right direction of the concave portion (230) R ) is the width (W) in the left-right direction of the frame (200). F It may be 70% to 90% of ). A connecting part (250) may be placed at the edge of the concave part (230).

[0039] The body portion (240) may be formed to surround the concave portion (230). This body portion (240) may be another part of the support (210) where the concave portion (230) is not formed. Additionally, the thickness (H) in the vertical direction of the body portion (240) C ) is the total thickness (H) of the frame (200) F It can be the same as ). The thickness (H) of the body part (240) C ) is the thickness (H) in the vertical direction of the concave portion (230). R It may be thicker than ). The width (W) in the left-right direction of this body part (240). C) is the width (W) of the frame (200) in the left-right direction. F It may be 10% to 60% of ). Also, the width (W) of the body part (240) C ) is the width (W) of the frame (200) F The width (W) of the concave portion (230) in ) R It may be a part excluding ). The upper surface of the body part (240) may be exposed to the outside. The body part (240) may be connected to the connecting part (250) at a part adjacent to the concave part (230).

[0040] The connecting portion (250) can connect the concave portion (230) and the body portion (240). In other words, the connecting portion (250) can be positioned between the concave portion (230) and the body portion (240). This connecting portion (250) can be formed in a curved shape such that the height gradually increases from the concave portion (230) to the body portion (240) when viewed from the left-right direction. For example, the connecting portion (250) can be formed such that a virtual arc existing above the concave portion (230) forms the outer surface of the connecting portion (250). Additionally, the width (W) of the connecting portion (250) in the left-right direction L ) is the width (W) of the body part (240). C ) and the width (W) of the concave portion (230) R It may be smaller than ). Also, the width (W) in the left-right direction of the connecting part (250) L ) may be 500 µm or more. The width (W) of this connection part (250) L ) can be the maximum value of the separation distance between parts.

[0041] The molding (300) can insulate the semiconductor chip (100) and the frame (200). The molding (300) can be placed adjacent to at least one of the semiconductor chip (100) and the frame (200). Additionally, the molding (300) may be an epoxy molding compound. At least a portion of the molding (300) may be exposed to the outside. The molding (300) may be placed in the recess (230).

[0042] The electrical connection member (400) can dissipate heat generated in the semiconductor package (1). One end of the electrical connection member (400) may be connected to the semiconductor chip (100), and the other end, opposite to the one end, may be connected to the frame (200). Additionally, the electrical connection member (400) may have a surface formed between the one end and the other end. The one end of the electrical connection member (400) may be positioned so that it faces upward. In other words, the electrical connection member (400) is formed such that at least one part is bent, so that the one end and the other end can be connected to the semiconductor chip (100) or the frame (200) while the one end faces upward. For example, the electrical connection member (400) may be in the form of a clip. The uppermost end of the electrical connection member (400) may be positioned parallel to the upper surface of the support (210) or positioned on the lower side. Additionally, the electrical connection member (400) may be formed of the same material as the support (210), specifically copper (Cu). The copper content of the electrical connection member (400) may be equal to or less than the copper content of the support (210). Additionally, C1100 or C194 copper may be used for the electrical connection member (400). The electrical connection member (400) may be provided in multiple units. The electrical connection member (400) may include a first electrical connection member (410) and a second electrical connection member (420).

[0043] The first electrical connection member (410) may be one of a plurality of electrical connection members (400). This first electrical connection member (410) has a width (W) which is the horizontal distance between one end connected to the semiconductor chip (100) and the other end connected to the frame (200). L1 ) may be 400 µm or more and 600 µm or less. In addition, the height (H) in the vertical direction of the first electrical connection member (410) L1 ) is the height (H) of the concave portion (230) R It can be equal to or smaller than ).

[0044] The second electrical connection member (420) may be one of a plurality of electrical connection members (400). This second electrical connection member (420) has a width (W) which is the horizontal distance between one end connected to the semiconductor chip (100) and the other end connected to the frame (200). L2 ) is the width (W) of the first electrical connection member (410) L1 It can be formed to be larger than ). Also, the height (H) in the vertical direction of the second electrical connection member (420) L2 ) is the height (H) of the concave portion (230) R It may be equal to or smaller than ). The height (H) in the vertical direction of this second electrical connection member (420). L2 ) is the height (H) in the vertical direction of the first electrical connection member (410). L1 It can be smaller than ).

[0045] Below, the operation and effect of a semiconductor package (1) having the configuration described above will be explained.

[0046] A semiconductor package (1) can accommodate a semiconductor chip (100). Specifically, it can accommodate a GaN power semiconductor that emits a large amount of heat. This semiconductor package (1) can be formed with a shape, material, and structure that allows heat emitted from the GaN power semiconductor to be efficiently dissipated. Additionally, as heat is efficiently dissipated from the semiconductor package (1), there is an effect of improving the service life.

[0047] Thickness (H) of the support (210 F By forming the support (210) relatively thickly, heat can be emitted not only from the upper and lower surfaces but also from the sides. The thickness (H) of the support (210) F ) can include a side portion with a large area by being configured to be larger than the stacked thickness when the semiconductor chip (100), molding (300), and electrical connection member (400) are placed inside.

[0048] In addition, the support (210) has a thickness (H) of the support (210). FBy including a concave portion (230) in which 50% to 90% of the surface is etched, heat can be efficiently dissipated even on the surface facing the semiconductor chip (100). This support (210) can be formed of a copper (Cu) material that dissipates heat well.

[0049] In addition, in order to ensure an appropriate size of the support (210) while preventing interference between the components placed on the support (210), the spacing between the components and the spacing between the support (210) and the semiconductor chip (100) is 450 µm to the left-right width (W) of the connection part. L This can be done by ). As the components are spaced apart at a certain distance, the electric field can be dispersed rather than concentrated. In addition, hot carriers may not be generated, so the characteristics and functions of the semiconductor chip (100) may not be degraded.

[0050] In addition, as grooves (220) are formed in the support (210), the surface area in contact with the outside can be increased.

[0051] Meanwhile, in addition to this configuration, a semiconductor package (1) according to a second embodiment of the present invention may be provided. Hereinafter, a second embodiment of the present invention will be described with reference to FIGS. 7 and FIGS. 8. In describing the second embodiment, the differences when compared with the above-described embodiment will be described mainly, and the same descriptions and reference numerals will be taken from the above-described embodiment.

[0052] Referring to FIGS. 7 and 8, the electrical connection member (400) of the semiconductor package (1) according to the second embodiment of the present invention may be configured in a wire form. However, the present invention is not limited thereto, and either a wire form or a clip, or a wire form and a clip may be used simultaneously. Additionally, at least one of the semiconductor chip (100), the molding (300), and the electrical connection member (400) may be disposed below a virtual surface formed parallel to the upper surface of the support (210).

[0053] One end of the electrical connection member (400) can be electrically connected to the semiconductor chip (100) through wire bonding, and the other end, opposite to the one end, can be electrically connected to the frame (200) through wire bonding. This electrical connection member (400) may include a plurality of wires. The plurality of wires of the electrical connection member (400) may be arranged to be spaced apart from each other.

[0054] Although the embodiments of the present invention have been described above as specific embodiments, they are merely examples and the present invention is not limited thereto, but should be interpreted as having the broadest scope in accordance with the technical concept disclosed in this specification. Those skilled in the art may implement patterns of shapes not specified by combining or substituting the disclosed embodiments, and this also does not deviate from the scope of the present invention. Furthermore, those skilled in the art may easily modify or alter the disclosed embodiments based on this specification, and it is evident that such modifications or alterations also fall within the scope of the rights of the present invention. Explanation of the symbols

[0055] 1 : Semiconductor package 100 : Semiconductor chip 200 : Frame 210 : Support 220 : Groove 230 : Concave part 240 : Body part 250 : Connection part 300 : Molding 400 : Electrical connection member W F : Frame width H F : Frame height W R : Width of the depression H R : Height of the depression W C : Body width H C : Body height W L1 : Width H of the first electrical connection member L1 : Height of the first electrical connection member W L2: Width H of the second electrical connection member L2 : Height of the second electrical connection member W E1 : 1st edge groove width W E2 : 2nd edge groove width

Claims

Claim 1 A semiconductor package comprising: a semiconductor chip; and a frame that accommodates the semiconductor chip inside, wherein the frame comprises a recess recessed downward from the upper surface of the frame, the semiconductor chip is disposed in the recess, and the frame further comprises one or more grooves extending from the side toward the recess so that at least a portion of the side is brought closer to the side of the recess. Claim 2 A semiconductor package according to claim 1, wherein the frame is a metal material capable of etching 50% to 90% of the thickness of the frame. Claim 3 In claim 2, the frame is a semiconductor package comprising copper (Cu). Claim 4 A semiconductor package according to claim 1, further comprising: a molding that surrounds the semiconductor chip and is disposed in the concave portion so as to insulate the semiconductor chip; and an electrical connection member having one end connected to the semiconductor chip and the other end opposite to the one end connected to the frame, wherein a portion between the one end and the other end is disposed so as to face upward. Claim 5 In claim 4, one or more of the semiconductor chip, the molding, and the electrical connection member are disposed in contact with or further lower than a virtual plane formed parallel to the upper surface of the frame, in a semiconductor package. Claim 6 A semiconductor package according to claim 1, wherein the frame comprises: a body portion formed to surround the concave portion and configured to have a thickness greater in the vertical direction than the concave portion; and a connecting portion connecting the concave portion and the body portion, and having a curved shape such that the height gradually increases from the concave portion to the body portion when viewed from the left and right directions. Claim 7 In claim 6, the semiconductor chip is disposed at the top of the recess so as to be spaced apart from the connection portion by a first separation distance in the left and right directions, in a semiconductor package. Claim 8 In claim 7, the first separation distance is smaller than the width of the connection portion in the left-right direction, for a semiconductor package. Claim 9 A semiconductor package according to claim 6, wherein the width of the body portion in the left-right direction is 10% to 60% of the width of the frame in the left-right direction. Claim 10 A semiconductor package according to claim 6, wherein the width of the connection portion in the left and right directions is 400 µm or more and 600 µm or less. Claim 11 A semiconductor package according to claim 1, wherein the width of the concave portion in the left-right direction is 70% to 90% of the width of the frame in the left-right direction. Claim 12 A semiconductor package according to claim 1, wherein the groove comprises: a first edge groove recessed from the side of the frame by the width of the first edge groove in a direction in which the source and drain of the semiconductor chip are spaced apart; and a second edge groove recessed from the side of the frame by the width of the first edge groove in a direction in which the source and drain of the semiconductor chip are spaced apart, wherein the width of the first edge groove is smaller than the width of the second edge groove. Claim 13 In claim 12, the grooves are provided in a plurality, and the plurality of grooves are formed on the side so as to be spaced apart from each other, a semiconductor package. Claim 14 A semiconductor package according to claim 1, further comprising: a molding disposed adjacent to at least one of the semiconductor chip and the frame so as to insulate the semiconductor chip and the frame from each other; and an electrical connection member comprising a plurality of wires, one end of which is electrically connected to the semiconductor chip through wire bonding, and the other end opposite to the one end of which is electrically connected to the frame through wire bonding. Claim 15 A semiconductor package according to claim 14, wherein at least one of the semiconductor chip, the molding, and the electrical connection member is disposed in contact with or further lower than a virtual surface formed parallel to the upper surface of the frame.