VIDEO CODING METHODS AND SYSTEMS THAT USE REFERENCE REGIONS.

Abstract

A decoder includes circuitry configured to receive a bit stream, identify a first frame, locate a first independent reference region within the first frame, extract the first independent reference region from the first frame, and decode a second frame using the first independent reference region as a reference for the second frame.

Description

VIDEO CODING METHODS AND SYSTEMS THAT USE REGIONS REFERENCE Cross-reference to Related Applications This application claims the benefit of priority from United States Non-Provisional Application serial no. 17 / 229,957, filed on April 14, 2021, entitled "methods and systems of video coding using reference regions", which is incorporated herein by reference in its entirety, and claims the benefit of priority from United States Provisional Patent Application serial no. 63 / 009,978, filed on April 14, 2020, entitled "methods and systems of video coding using reference regions", which is incorporated herein by reference in its entirety. Field of Invention The present invention relates generally to the field of video compression. In particular, the present invention relates to video coding methods and systems that use reference regions. Background of the Invention A video codec can include an electronic circuit or software that compresses or decompresses digital video. It can convert uncompressed video to a compressed format or vice versa. In the context of video compression, a device that compresses video (and / or performs some function related to it) is typically called an encoder, and a device that decompresses video (and / or performs some function related to it) is typically called a decoder. The compressed data format can conform to a standard video compression specification. Compression can be inefficient in that the compressed video lacks certain information present in the original video. One consequence of this is that the decompressed video may be of lower quality than the original uncompressed video because there is insufficient information to accurately reconstruct the original video. There can be complex relationships between video quality, the amount of data used to represent the video (e.g., determined by the bit rate), the complexity of the encoding and decoding algorithms, sensitivity to data loss and errors, ease of editing, random access, end-to-end delay (e.g., latency), and the like. Motion compensation can involve an approach to predicting a video frame or portion of a frame, given a reference frame, such as previous and / or future frames, by taking into account the movement of the camera and / or objects in the video. It can be employed in the encoding and decoding of video data for video compression, for example, in encoding and decoding using the Advanced Video Coding (AVC) standard of the Moving Picture Experts Group (MPEG) (also known as H.264). Motion compensation can describe an image in terms of the transformation from a reference image to the current image. The reference image can be earlier in time compared to the current image, or further in time compared to the current image. When images can be accurately synthesized from previously transmitted and / or stored images, compression efficiency can be improved. Brief Description of the Invention In one aspect, a decoder includes circuitry configured to receive a bitstream of encoded video. The encoded video stream includes an encoded reference image and an encoded actual image that has a first size. It decodes the reference image, identifies from the bitstream a subregion of the reference image, the subregion has a second size, where the second size is different from the first size, resizes the subregion to a third size, where the third size is equal to the first size, to form a resized reference image, and decodes the actual image using the resized reference image. In another aspect, a decoder includes circuitry configured to receive a stream of encoded video bits that includes a first encoded reference image and a current encoded image, decode the reference image, identify from the bit stream a first subregion of the reference image, transform the first subregion to form a second reference image, and decode the current image using the second reference image. In another aspect, a video encoding method using reference regions includes receiving, by a decoder, a coded video bitstream, the coded video bitstream including an encoded reference image and an encoded current image having a first size, decoding, by the decoder, the reference image, identifying, by the decoder and from the bitstream, a subregion of the reference image, the subregion having a second size, where the second size is different from the first size, resizing, by the decoder, the subregion to a third size, where the third size is equal to the first size, to form a resized reference image, and decoding, by the decoder, the current image using the resized reference image. In another aspect, a decoder includes circuitry configured to receive a bit stream, identify a first frame, locate a first independent reference region within the first frame, extract the first independent reference region from the first frame, and decode a second frame using the first independent reference region as a reference for the second frame. In another aspect, a video encoding method using reference regions includes receiving a bitstream, identifying a first frame, locating a first independent reference region within the first frame, extracting the first independent reference region from the first frame, and decoding a second frame using the first independent reference region as a reference for the second frame. These and other aspects and features of non-limiting embodiments of the present invention will be evident to those skilled in the art after reviewing the following description of specific non-limiting embodiments of the invention together with the accompanying figures. Brief Description of the Figures To illustrate the invention, the figures show aspects of one or more embodiments of the invention. However, it should be understood that the present invention is not limited to the precise arrangements and instrumentation shown in the drawings, where: Figure 1 is a block diagram illustrating a modality that decodes using a reference frame; Figure 2 is an illustration of an example mode of a reference frame with an independent reference region; Figure 3 is an illustration of an example modality of an independent reference region and a predicted frame; Figure 4 is an illustration of an example modality of an independent reference region and a predicted frame; Figure 5 is an illustration of an example mode of independent reference regions and a predicted frame; Figure 6 is an illustration of an example mode of an LTR buffer; Figure 7 is a process flow diagram illustrating an example process for decoding a video according to some implementations of the current subject matter; Figure 8 is a system block diagram illustrating an example decoder capable of decoding a bit stream according to some implementations of the current subject matter; Figure 9 is a process flow diagram illustrating an example process for encoding a video according to some implementations of the current subject matter; Figure 10 is a system block diagram illustrating an example video encoder according to some implementations of the current subject matter; and Figure 11 is a block diagram of a computer system that can be used to implement one or more of the methodologies disclosed herein and one or more portions thereof. The drawings are not necessarily to scale and may be illustrated by ghost lines, schematic representations, and fragmentary views. In certain cases, details that are not necessary for an understanding of the modalities or that make other details difficult to perceive may have been omitted. Detailed Description of the Invention In traditional video coding systems, the video sequence is divided into groups of images (GOPs). Each GOP is autonomous in terms of temporal and spatial prediction. Typically, the first image in the group is used as a reference image for subsequent images. The temporal and spatial relationships between the images allow for very efficient compression using predictive coding. With reference to Figure 1, each GOP may include a reference frame 104 or intra-frame (I-frame) used as a reference, and information that can be used to predict other frames 108 from the reference; the information that can be used for prediction may include, without limitation, global and / or local motion vectors and / or transformations, as well as a residue as described later. The transmission of a reference frame 104 or I-frame may represent a substantial portion of the bandwidth used in the transmission of a GOP. In some modes, transmission bandwidth can be reduced and / or encoding / decoding efficiency can be improved by using a long-term reference (LTR) frame. As used in this disclosure, an LTR frame is a frame and / or image used to create predicted frames and / or images in one or more groups of pictures (GOPs), but which may not be displayed in a video image. A frame marked as an LTR frame in a video bitstream may be available for reference use until it is explicitly removed by bitstream signaling. LTR frames can improve prediction and compression efficiency in scenes that have a static background for an extended period (for example, the background in a videoconference or parking lot surveillance video). Current standards, such as H.264 and H.265, allow for the updating of similar frames, such as LTR frames, by signaling a newly decoded frame, which is then saved and made available as a reference frame 104. These updates are signaled by the encoder, and an entire frame is updated. However, updating the entire frame can be costly, particularly where only a small portion of the static background has changed. With reference to Figure 2, the methods disclosed herein improve the efficiency and flexibility of the prediction processes described above by making a prediction using at least one reference region of a 10⁴ reference frame as a reference for a current frame. The reference region or subregion has a size, which may include an area defined, for example, in pixels, that is smaller than an area of ​​the 10⁴ reference frame. In contrast to current encoding standards, where predicted frames are generated from complete 10⁴ reference frames, the approach described above allows a decoder to perform decoding operations more efficiently and with greater variation. At least one 20⁴ subregion can be used for any number of frames, in any position within the GOP, thus eliminating the requirement for I-frame recoding and / or retransmission. Continuing with reference to Figure 2, an example configuration of a reference frame 104 with a subregion 204 representing a cropped portion of the video view is illustrated. Subregion 204 can be identified, for example, by a decoder as described in further detail later, within reference frame 104. Subregion 204 can be used as a reference region in a manner analogous to the use of a cropped reference frame 104, without requiring a separate cropped reference frame 104 to be transmitted. As a non-limiting and illustrative example, and with reference to Figure 2, the reference frame 104 may have a first resolution defined by a first width DI and a first height D2, where DI and D2 may be, without limitation, numbers of measurement units such as pixels and / or fractions of pixels; an area of ​​the reference frame 104 may be defined as an area of ​​a rectangular array of measurement units DI and D2, defined as a resolution DI x D2. The subregion 204 may have a width W and a height H, which defines an area or resolution of W x H. The subregion 204 may define a sub-image 204 within the reference image that has the same dimensions or smaller dimensions, where smaller dimensions means that at least one of W and H is smaller than a corresponding dimension of the reference frame 104; in other words, W is smaller than DI or H is smaller than D2.As a result, the resolution or area W x H can be smaller than the resolution or area Di x D². Subregion 204 can be defined by a quad (X,Y,W,H), where X,Y is the coordinate of the upper-left corner of subregion 204 with respect to the upper-left corner of the reference image, and W,H are the width and height of subregion 204 expressed in units of measurement. It should be noted that alternative quads can be selected to define subregion 204, such as, without limitation, coordinates of an alternative corner of subregion 204, a set of two diagonally opposite vertices, and / or vectors to any defined point. The data defining subregion 204 can be static over a GOP; for example, a quad (X,Y,W,H) or equivalent can be static over a GOP. Alternatively or additionally, the data that define subregion 204 can be dynamic.For example, and without limitation, subregion 204 changes between subsequent GOP images to track the movement of an object and / or person of interest within a video image. This can be encoded similarly to motion vectors and / or transformations used in general video coding. Data defining subregion 204 can be provided for each image in a group of images. This can be achieved, without limitation, by using a dataset that defines subregion 204, for example, as described above, for each image in a group of images, or by using a dataset that defines a subregion 204 in an image and additional data describing the movement of subregion 204 from one image to a previous or subsequent image, or similarly.The data that define subregion 204 can be specified and / or signaled in a sequence parameter set (SPS); the updated data that define subregion 204 can be provided in an image parameter set (PPS) for one or more selected images and / or frames from a GOP. With continued reference to Figure 2, a decoder may be receiving, about to receive, or has already received a 10⁴ reference frame at DI x D² resolution and may select a 20⁴ subregion using a quad as described above. In some implementations, the encoder may signal a geometric feature of the 20⁴ subregion to the decoder using additional bits in a bitstream. The signaling bits may indicate a 10⁴ reference frame index and / or an index that identifies a GOP within a buffer, such as an LTR buffer and / or a reference buffer as described in further detail later, identifying image indices in a decoder, and a quad 20⁴ subregion. The decoder may then extract the 20⁴ subregion as an independent reference region. Subsequent frames can be predicted from the extracted independent reference region.Where the data defining subregion 204 is dynamic, as described above, subsequent frames can be predicted using this data and reference region. Advantageously, a single reference region can be used for a subregion 204 that moves relative to an image, without requiring retransmission of the reference region. The size and / or location of a subregion 204, reference frame 104, or similar feature can be alternatively or additionally characterized using parameters, which can be signaled in the bitstream, such as a height offset, a height, a length offset, and / or a length. Still with reference to Figure 2, a subregion 204 can be signaled using at least one vertical offset and at least one horizontal offset; for example, and without limitation, a quad as described above can specify a vertical offset from a top edge of the frame, a vertical offset from a bottom edge of the frame, a horizontal offset from a left edge of the frame, and a horizontal offset from a right edge of the frame, where the offsets can be measured in pixels of a frame either before or after resizing as described in further detail below.As a non-limiting example, at least one vertical offset can include a sps_conf_win_top_offset and a sps_conf_win_bottom offset, which can be signaled in an SPS and can identify, respectively, a vertical offset from a top edge of the box and a vertical offset from a bottom edge of the box. As a further non-limiting example, at least one horizontal offset can include a sps_conf_win_left_offset and a sps_conf_win_right_offset, which can be signaled in an SPS and can identify, respectively, a horizontal offset from a left edge of the box and a horizontal offset from a right edge of the box. With continued reference to Figure 2, a subregion 204 can be identified alternatively or additionally by specifying one or more tiles or sectors to be included in and / or excluded from subregion 204. The number of tiles and their position within a frame can be signaled in an image header. In one mode, the signaling can be explicit; alternatively or additionally, PPS can indicate tile rows, columns, row height, and / or column width, any or all of which can be combined and / or used by a decoder to determine the tile count and / or number. For example, and without limitation, a PPS parameter denoted as pps_num_exp_tile_columns_minusl, with 1 appended to it, can explicitly specify a number of tile column widths.As a further non-limiting example, a parameter `pps_tile_column width minusl[i]`, with 1 appended to it, can specify the width of the i-th tile column, for example, in encoding tree block (CTB) units for i in the range from 0 to pps_num_exp_tile_columns_minusl, inclusive. A parameter `pps_tile_row_height_minusl[i]` plus 1, with 1 appended to it, can specify the height of the i-th tile row, for example, in CTB units for i. The flagged parameters can alternatively or additionally specify numbers and / or dimensions of slices within one or more tiles. For example, a parameter denoted `pps_num_exp_slices_in_tile[i]` can specify a number of explicitly provided slice heights for slices in a tile containing the i-th slice.A parameter named pps_slice_width_in_tiles_minusl[i], with 1 appended to it, can specify a width of the i-th rectangular sector in tile column units. A parameter denoted pps_slice_height_in_tiles_minusl[i], with 1 appended to it, can specify a height of the i-th rectangular sector in tile row units, for example, when pps_num_exp_slices_in_tile[i] is equal to 0. Those skilled in the art, after reviewing the entirety of this disclosure, will be aware of several alternative or additional ways in which tile and / or sector parameters can be signaled and / or determined in and / or from bitstream and / or header parameters, either implicitly or explicitly. With reference to Figure 2, where the transformation of a 204 subregion involves resizing the 204 subregion, the width and height of the smaller and / or larger 204 subregion can be obtained by multiplying a width and height of the 204 subregion by an arbitrary resizing constant (Rc), also called a scaling factor and / or constant, which can alternatively or additionally be called a variable name such as RefPicScale. For smaller 204 subregions, Rc can have a value between 0 and 1. For larger squares, Rc can have a value greater than 1; for example, Rc can have a value between 1 and 4. Other values ​​are possible.The resizing constant can be different for one resolution dimension than for another; for example, a resizing constant Rch can be used to resize the height, while a different resizing constant Rcw can be used to resize the width. With reference to Figure 2, resizing can be implemented as a mode. In some implementations, an encoder can instruct the decoder which resizing constant to use, for example, as a function of an image parameter such as the `pps_pic_width_in_luma_samples` parameter, a `pps_scaling_win_right_offset` parameter, and / or a `pps_scaling_win_left_offset` parameter. Signaling can be performed on a sequence parameter set (SPS) corresponding to a GOP containing the current image and / or on an image parameter set (PPS) corresponding to the current image. For example, and without limitation, the encoder can signal resized parameters using fields such as pps_pic_width_in_luma_samples, pps_pic_height_in_luma_samples, pps_scaling_win_left_offset, pps_scaling_win_right_offset, pps_scaling_win_top_offset, pps_scaling_win_bottom_offset and / or sps_num_subpics_minusl.A parameter such as `pps_scaling_window_explicit_signalling_flag` equal to 1 can specify that rescaling window offset parameters are present in the PPS; `pps_scaling_window_explicit_signalling_flag` equal to 0 can indicate that rescaling window offset parameters are not present in the PPS. When `sps_ref_pic_resampling_enabled_flag` is equal to 0, a value of `pps_scaling_window_explicit_signalling_flag` can be equal to 0. `pps_scaling_win_left_offset`, `pps_scaling_win_right_offset`, `pps_scaling_win_top_offset`, and `pps_scaling_win_bottom_offset` can specify offsets that are applied to the image size for the rescaling ratio calculation.When they are not present, it can be inferred that the values ​​of pps_scaling_win_left_offset, pps_scaling_win_right_offset, pps scaling_win_top_offset and pps_scaling_win_bottom_offset are equal to pps_conf_win_left_offset, pps_conf_win_right_offset, pps_conf_win_top_offset and pps_conf_win_bottom_offset, respectively. With further reference to Figure 2, the parameters W and H, as described above, can be represented, without limitation, using the variables CurrPicScalWinWidthL and CurrPicScalWinHeightL, respectively. These variables can be derived from the signaled parameters as described above using one or more mathematical relationships between the signaled parameters and the variables. For example, and without limitation, CurrPicScalWinWidthL can be derived according to the following equation: CurrPicScalWinWidthL = pps_pic_width_in_luma_samples SubWidthC * ( pps_scaling_win_right_offset + pps_scaling_win_left_offset ) As an additional non-limiting example, CurrPicScalWinHeightL can be derived according to the following equation: CurrPicScalWinWidthL = pps_pic_width_in_luma_samples SubWidthC * ( pps_scaling_win_right_offset + pps_scaling_win_left_offset ) The resizing operation can be performed at a block level of coded frames and / or 204 subregions. For example, a 204 subregion that will be used as a 104 reference frame can be resized first, and then the prediction can be performed. The block prediction process can be performed on a scaled-up 104 reference frame (which has a scaled-up resolution) instead of the original 104 reference frame.The resizing reference frame 104 and / or subregion 204 may include resizing according to any parameter signaled by an encoder as described above; for example, and without limitation, where a reference frame 104 is signaled to be used with the current image, such as by reference to an index value associated with reference frame 104 or the like, the signaled reference frame 104 may be resized, prior to prediction, according to any resizing method described above.A resized reference frame 104 can be stored in memory and / or in a buffer, which may include, without limitation, a buffer identification frame contained therein by indexes, according to which frame retrieval can be performed; the buffer may include a decoded image buffer (DCB) and / or one or more additional buffers implemented by means of a decoder. The prediction process may include, for example, inter-image prediction that includes motion compensation. With reference to Figure 2, some block-based resizing implementations allow flexibility in applying optimal filters to each block, rather than applying the same filter to an entire frame. In some implementations, a resize-bypass mode is possible, allowing certain blocks (based, for example, on pixel uniformity and bitrate cost) to be in a resize-bypass mode (so that resizing does not change the bitrate). The resize-bypass mode can be signaled in a bitstream; for example, and without limitation, the resize-bypass mode can be signaled in a PPS parameter. Alternatively, the decoder can determine that the resize-bypass mode is active based on one or more parameters set by the decoder and / or signaled in the bitstream. Still with reference to Figure 2, resizing may include upsampling or the use of spatial filters. The spatial filters used in resizing may include, without limitation, bicubic spatial filters that apply bicubic interpolation, bilinear spatial filters that apply bilinear interpretation, Lanczos filters that use Lanczos filtering and / or Lanczos resampling that use combinations of sinc filters, sinc function interpolation techniques and / or signal reconstruction, or similar techniques. Persons skilled in the art, after reviewing this entire disclosure, will be aware of several filters that can be used for interpolation in a manner consistent with this disclosure.Interpolation filters can include, as a non-limiting example, any filter described above, a low-pass filter, which can be used, without limitation, by means of an upsampling process whereby the pixels between block and / or frame pixels before scaling can be initialized to zero and then filled with the output of the low-pass filter. Alternatively or additionally, any luma sample interpolation filtering process can be used. Luma sample interpretation can include calculating an interpolated value on a half-sample interpolation filter index, which lies between two consecutive sample values ​​from an unscaled sample array.The interpolated value can be calculated, without limitation, by retrieving coefficients and / or weighting factors from lookup tables. The selection of lookup tables can be based on encoding unit movement models and / or scaling ratio quantities, for example, as determined using scaling constants as described above. The calculation may include, without limitation, performing weighted sums of adjacent pixel values, where the weighting factors are retrieved from lookup tables. The calculated values ​​can be shifted alternatively or additionally; for example, and without limitation, the values ​​can be shifted by Min(4, BitDepth - 8), 6, Max(2, 14 - BitDepth), or similar values.Those skilled in the technique, after reviewing this entire disclosure, will be aware of several alternative or additional implementations that can be used for interpolation filters. With reference to Figure 3, the predicted image 108 can have a resolution and / or size identical or similar to an extracted independent reference region 304. This approach can be used to reduce video resolution, thereby reducing the bitrate, to focus on a region of interest to a viewer, and / or to focus on a region identified by automated or user-facilitated detection as containing visual data of greater relevance to a particular purpose and / or task. Alternatively or additionally, this approach can allow video viewing to continue where network speeds are compromised. The advantages of this approach may include saving bandwidth used for video transmission, saving resources used for video encoding, and / or saving the time required to decode and play back the video.One result can be a superior user experience, as well as more efficient use of resources on devices and / or networks that implement disclosed modalities. With reference to Figure 3, the predicted image 108 can be resized to a smaller or larger image. The width and height of the smaller and larger images can be obtained by multiplying W and H by an arbitrary resizing constant (Re) (also called a scaling factor). For smaller images, as a non-limiting example, Re can have a value between 0 and 1. For larger images, and as a further non-limiting example, Re can have values ​​between 1 and 4. Other values ​​are possible. The resizing operation can be left as an option for an end user and / or an additional program and / or module operating on a computer device that displays video to an end user, which, in one example, could resize the image to fit the display resolution. With reference now to Figure 4, a decoder can resize the independent reference region 304, producing a resized region 404, for example, using a resizing constant as described above, to match a full original video image resolution and / or a target resolution; for example, W and H can each be multiplied by a selected Re to scale W and H to the same size as DI and D2 as described above, such as without limitation Rc = D1 / W. Prediction and other operations can then be performed to obtain the predicted image using a resized subregion. With reference to Figure 5, the independent reference region 204 can be used to predict a portion of an image rather than the entire image. For example, and without limitation, an image such as a 360° video image and / or a video image used in virtual reality can extend beyond a user's field of view; in this situation, a given frame of a video image can be rendered with an independent reference region 204 corresponding to a user's predicted and / or detected current field of view. In other modalities, the independent reference region can correspond to a significant, high-detail, and / or high-motion portion of the first frame.The remainder of the predicted frame can be generated using any other suitable prediction and / or decoding method; pixels cannot be encoded, can be encoded in a predetermined color such as unlimited black, and / or can be given chroma and / or luma values ​​from neighboring pixels, for example, extending chroma and luma values ​​from the edges of the independent reference region to the fill screen. Portions can alternatively or additionally be predicted from other parts of the reference frame, residuals, motion vectors, or the like. With reference to Figure 5, a decoder can decode all or part of a second frame by transforming a first independent reference region 204, which is denoted here as "1" for illustrative purposes. Transforming the first independent reference region 204 may involve scaling it, for example, as described above. Alternatively, or additionally, transforming the first independent reference region 204 may involve moving it relative to a location in a video image; this location in the video image may include edges and / or any coordinates within the video image.As a non-limiting example, and as illustrated in Figure 5, a first independent reference region 204 can be displaced from an original location in a video image coordinate system and / or with respect to edges and / or pixel count to a novel location, for example, using a linear transformation such as an affine transformation, where an affine motion transformation as used herein is a transformation such as a matrix and / or vector that describes a uniform displacement of a set of pixels or points represented in a video image and / or picture, such as a set of pixels illustrating an object moving through a view in a video without changing the apparent shape during the movement.Any transformation, including any transformation that can be described using a matrix or other mathematical descriptor, may be used consistently with this disclosure to move or otherwise transform the first independent reference region. For example, and without limitation, transforming the first independent reference region may include rotating the first independent reference region about a location in a video image, flipping the first independent reference region, or similar actions. Still referring to Figure 5, the decoding may include the use of a second independent reference region 204, which is denoted here as "2" for illustrative purposes. In one mode, the decoder may place a second independent reference region 204 in the first frame, which can be done in any of the ways described above for the first independent reference region 204. Alternatively, or additionally, the second independent reference region 204 may be extracted from another reference frame and / or retrieved from a buffer, such as a reference buffer and / or an LTR buffer, as described in further detail below. Decoding from the second independent reference region 204 may be performed using any of the methods and / or steps described above for the first independent reference region.The combination of the first independent reference region 204 and the second independent reference region 204 can be used in several ways; for example, the first independent reference region 204 can represent a first field of view for a user of an image that is larger than the user's field of view, while a second independent reference region 204 can represent another field of view, which may be contiguous. Additional independent reference regions 204 can also be used to provide additional portions of the decoded frame; a plurality of independent reference regions can be extracted and / or retrieved to decode an image, and they can be contiguous, connected by pixels predicted using any of the methods described above, or combined in some other way.The plurality of independent reference regions 204 can be used alternatively or additionally sequentially for a sequence of frames. With reference to Figure 6, one or more independent reference regions 204 can be stored in a buffer, such as a reference buffer and / or an LTR 604 buffer. The LTR 604 buffer can include a plurality of frames. In one mode, an LTR 604 mode can contain multiple frames and / or independent reference regions 204; each of the multiple frames and / or independent reference regions can have a corresponding index that allows for retrieval and / or signaling for retrieval, for example, as described in further detail later. The reference buffer and / or the LTR 604 buffer can be updated and / or modified periodically, for example, by adding and / or removing frames and / or independent reference regions. With reference to Figure 6, the use of independent reference regions 204 and / or reference frames 104 can be signaled in the bitstream, for example, by an encoder. For instance, and without limitation, the presence of independent reference regions in an image can be signaled by the encoder in the video sequence header, for example, in a sequence parameter set or similar. A single flag can be used to indicate the presence of independent regions; the absence of the flag can be interpreted as a lack of independent regions. Alternatively, a total number of independent regions can be signaled in a sequence header.The geometric characteristics of independent reference regions, such as independent reference region identifiers for buffer recovery as described earlier, can also be signaled in sequence headers. Alternatively or additionally, one or more signals can be provided in image headers, such as in the image parameter set. In one mode, signaling in an image header can extend the flexibility of a decoder, enabling image-level decision-making. A list of region identifiers can include a sequence of consecutive numbers representing region identifiers in a prescribed order. The decoder can use a signaled list to reposition and reconstruct independent regions and predicted image regions from those independent regions. With reference to Figure 7, an example embodiment of a 700 video encoding method using reference regions is illustrated. In step 705, a decoder receives a bitstream, for example, as described in further detail later. The bitstream may include an encoded video bitstream. The bitstream may include at least one encoded reference image and / or LTR frame, which may be referred to alternatively as the reference image and / or LTR image, and at least one encoded actual image. The encoded actual image may have a first size, which may include any size as described above, encompassing an area. In step 710, the decoder decodes the reference image and / or LTR frame; this may be performed according to any decoding process as described in this disclosure. The decoder may identify the reference frame and / or LTR frame in the bitstream.Alternatively, the reference frame and / or LTR frame can be left undecoded, and only independent reference regions can be decoded. In step 715, and with reference to Figure 7, the decoder locates a first subregion within the reference frame and / or LTR frame. This can be achieved, without limitation, as described above with reference to Figures 1-6. For example, and without limitation, locating the first subregion may include identifying, in the bitstream, a geometric characterization of an independent reference region within the reference frame and / or LTR frame. The bitstream may be signaled by an encoder as described above. As a non-limiting example, the first subregion may be rectangular, and the geometric characterization may include a set of four numbers characterizing the vertices of the first subregion. As a further non-limiting example, the geometric characterization may include a height offset, a height, a length offset, and a length.The first subregion has a second size; this second size can be different from the first size, or in other words, it can be larger or smaller than the first size. Identifying the first subregion can involve receiving, in the bitstream, an indication that the first subregion is present. In one modality, traditional prediction using reference frames can still be supported, either by signaling that there are zero regions within the image or by defining a region that has the same size as the original image. Flexibility can be provided by allowing the specification of one or more regions to be extracted and how these are treated as an independent reference image for future prediction. Continuing with reference to Figure 7, in step 720, the decoder transforms the first subregion 204. The transformation can produce a second reference image and / or a resized image and / or a portion thereof. The transformation of a first subregion can include any transformation and / or modification to any subregion as described in this disclosure. The transformation of the first subregion can include, without limitation, translating the first subregion. As an additional example, the decoder can be configured to transform the first subregion by applying an affine transformation, which can include any affine transformation as described above. As a further non-limiting example, the decoder can resize the first subregion to a third size; the third size can be equal to the first size, to form a resized reference image.In other words, the decoder can resize the subregion to match the current and / or signaled size of the current frame. Alternatively, the first subregion can be left at its current size; the decoder cannot transform the first subregion. The decoder can extract the first subregion from the reference frame and / or LTR frame; this can be done, without limitation, as described above with reference to Figures 1-6. In step 725, the decoder decodes the current frame using the first subregion as a reference for the current frame; this can be implemented, without limitation, as described above with reference to Figures 1-6. For example, decoding the current frame can include decoding the current frame to be the same size as the first subregion. Decoding the second frame can include transforming the first subregion.Transforming the first subregion can include scaling the first subregion, flipping the first subregion, moving the first subregion relative to a location in a video image, and / or rotating the first subregion relative to a location in a video image. With reference to Figure 7, the decoder can store the reference frame and / or LTR frame in a buffer; this buffer can include a long-term reference buffer and / or a reference image buffer. The decoder can also be configured to locate a second subregion within the reference frame and / or LTR frame. The decoder can decode a second current frame using the first and / or second subregion. The decoder can store the second independent reference region in a buffer. The decoder can decode a second current frame using a first and / or second subregion and / or reference frame, which can be retrieved from a buffer, extracted from another frame, or similarly. Figure 8 is a system block diagram illustrating an example decoder 800 capable of decoding a bitstream, including constructing a list of motion vector candidates using a global motion vector candidate used by an adjacent block. The decoder 800 may include an entropy decoder processor 804, an inverse quantization and inverse transform processor 808, an unlock filter 812, a frame buffer 816, a motion compensation processor 820, and / or an intraprediction processor 824. In operation, and with reference to Figure 8, the bit stream 828 can be received by the decoder 800 and can be fed into the entropy decoder processor. 804, which can decode portions of the bitstream into quantized coefficients. These quantized coefficients can be provided to the inverse quantization and inverse transform processor 808, which can perform inverse quantization and inverse transform to create a residual signal. This residual signal can then be added to an output of either the motion compensation processor 820 or the intraprediction processor 824, depending on the processing mode. An output from either the motion compensation processor 820 or the intraprediction processor 824 can include a block prediction based on a previously decoded block. The sum of the prediction and residual can be processed by the unlock filter 812 and stored in a frame buffer 816. In one configuration, and with reference to Figure 8, the 800 decoder can include circuitry configured to implement any operation as described above, in any order, and with any degree of repetition. For example, the 800 decoder can be configured to perform a single step or sequence repeatedly until a desired or ordered result is achieved; the repetition of a step or sequence of steps can be performed iteratively and / or recursively, using outputs from previous repetitions as inputs for subsequent repetitions, adding inputs and / or outputs from repetitions to produce an aggregate result, reducing or decreasing one or more variables such as global variables, and / or dividing a larger processing task into a set of smaller, iteratively addressed processing tasks.The decoder may perform any step or sequence of steps as described in this disclosure in parallel, such as performing a step two or more times simultaneously and / or substantially simultaneously using two or more parallel threads, processor cores, or the like; task division between parallel threads and / or processes may be performed according to any protocol suitable for task division between iterations. Those skilled in the art, after reviewing this entire disclosure, will be aware of various ways in which steps, sequences of steps, processing tasks, and / or data may be subdivided, shared, or otherwise handled using iteration, recursion, and / or parallel processing. With continued reference to Figure 8, the 800 decoder and / or its circuitry can be designed and / or configured to perform any method, method step, or sequence of method steps in any manner described in this disclosure, in any order, and with any degree of repetition. For example, the 800 decoder and / or its circuitry can be configured to perform a single step or sequence repeatedly until a desired or ordered result is achieved; the repetition of a step or sequence of steps can be performed iteratively and / or recursively by using outputs from previous repetitions as inputs for subsequent repetitions, by adding inputs and / or outputs from repetitions to produce an aggregate result, by reducing or decreasing one or more variables such as global variables, and / or by dividing a larger processing task into a set of smaller, iteratively addressed processing tasks.The 800 decoder and / or its circuitry can perform any step or sequence of steps as described in this disclosure in parallel, such as performing a step two or more times simultaneously and / or substantially simultaneously using two or more parallel threads, processor cores, or the like; task division between parallel threads and / or parallel processes can be performed according to any protocol suitable for task division between iterations. Those skilled in the art, after reviewing the entirety of this disclosure, will be aware of various ways in which steps, sequences of steps, processing tasks, and / or data can be subdivided, shared, or otherwise handled using iteration, recursion, and / or parallel processing. Figure 9 is a process flow diagram illustrating a sample process 900 for encoding a video with adaptive cropping, which can provide additional flexibility for the video encoder / decoder, enabling bitrate savings in various use cases. In step 905, a video frame can undergo initial block segmentation, for example, using a tree-structured macroblock partitioning scheme that can include partitioning an image frame into CTUs and CUs. In step 910, and with reference to Figure 9, a first reference region can be identified, which includes selecting a subregion of a frame or portion thereof. The region can be selected through automatic or expert input. Automatic selection can be achieved, as a non-limiting example, by using a computer vision algorithm that detects specific objects; object detection may include additional processing such as object classification or similar. Expert input selection can be achieved, without limitation, using manual human intervention, for example, by selecting a close-up of a person and / or object of interest in a video, such as a person in a surveillance video. Another possible use case could be selecting a maximum outward-pointing region that contributes most to a reduction in bit rate.Adaptive clipping may also include the selection of a geometric characterization of the subregion; for example, and without limitation, the selection of the geometric characterization of the subregion may include the selection of a quadruple as described above, such as (X,Y,W,H). The selection of the geometric characterization of the subregion may also include updating information and / or information indicating changes in the data that define the subregion from one frame to another, as described above with respect to the dynamic data that defines the subregion. With reference to Figure 9, in step 915, the block can be encoded and included in the bitstream. Encoding can include the use of interprediction and intraprediction modes, for example. Encoding can also include adding bits to the bitstream characterization (X, Y, W, H), identifying the adaptive clipping mode, or similar actions, as described earlier. Encoding can also include encoding update information and / or information indicating changes in the data defining the subregion from one frame to the next, as described earlier regarding the dynamic data defining the subregion. Figure 10 is a system block diagram illustrating an example of a video encoder 1000 capable of adaptive clipping, which can provide additional flexibility for the video encoder / decoder, enabling bitrate savings in various use cases. The example video encoder 1000 receives an input video 1005, which can initially be segmented or divided according to a processing scheme, such as a tree-structured macroblock partitioning scheme (e.g., quad-tree plus binary-tree). An example of a tree-structured macroblock partitioning scheme might include partitioning an image frame into large block elements called encoding tree units (CTUs). In some implementations, each CTU can be further partitioned one or more times into a number of subblocks called encoding units (CUs).The final result of this division may include a group of subblocks that can be called predictive units (PU). Transform units (TU) can also be used. Still referring to Figure 10, the example video encoder 1000 includes an intraprediction processor 1015, a motion estimation / compensation processor 1020 (also called an interprediction processor) capable of supporting adaptive clipping, a transform / quantization processor 1025, an inverse quantization / transform processor 1030, a loop filter 1035, a decoded image buffer 1040, and an entropy encoding processor 1045. Bitstream parameters can be input to the entropy encoding processor 1045 for inclusion in the output bitstream 1050. In operation, and continuing with reference to Figure 10, for each block of a frame in the input video 1005, it can be determined whether the block should be processed using intra-image prediction or motion estimation / compensation. The block can be provided to either the intra-prediction processor 1010 or the motion estimation / compensation processor 1020. If the block is to be processed using intra-prediction, the intra-prediction processor 1010 can perform the processing to produce the predictor. If the block is to be processed using motion estimation / compensation, the motion estimation / compensation processor 1020 can perform the processing, including using adaptive cropping, if applicable. With reference to Figure 10, a residue can be formed by subtracting the predictor from the input video. This residue can be received by the transform / quantization processor 1025, which can perform transform processing (e.g., discrete cosine transform (DCT)) to produce coefficients that can then be quantized. The quantized coefficients and any associated signaling information can be provided to the entropic encoding processor 1045 for entropic encoding and inclusion in the output bitstream 1050. The entropic encoding processor 1045 can support encoding signaling information related to the encoding of the current block.Furthermore, the quantized coefficients can be provided to the inverse quantization / inverse transform processor 1030, which can reproduce pixels, which can be combined with the predictor and processed by the loop filter 1035, the output of which is stored in the decoded image buffer 1040 for use by the motion estimation / compensation processor 1020 which has adaptive clipping capability. With continued reference to Figure 10, although some variations have been described in detail above, other modifications or additions are possible. For example, in some implementations, the actual blocks may include any symmetric block (8x8, 16x16, 32x32, 64x64, 128x128, and so on) as well as any asymmetric block (8x4, 16x8, and so on). With reference to Figure 10, some implementations can utilize a quad plus binary (QTBT) decision tree. In QTBT, at the coding tree unit level, the QTBT partitioning parameters are dynamically derived to suit local characteristics without introducing any overhead. Subsequently, at the coding unit level, a joint classifier decision tree structure can eliminate unnecessary iterations and mitigate the risk of false predictions. In some implementations, the LTR frame block update mode may be available as an additional option on each leaf node of the QTBT. In some implementations, and with continued reference to Figure 10, additional syntax elements can be signaled at different levels of the bitstream hierarchy. For example, a flag can be enabled for an entire sequence by including a hard-coded enable flag in a sequence parameter set (SPS). Furthermore, a CTU flag can be hard-coded at the encoding tree unit (CTU) level. Still referring to Figure 10, the 1000 encoder can include circuitry configured to implement any operation as described above with reference to Figures 8 or 10 in any mode, in any order, and with any degree of repetition. For example, the 1000 encoder can be configured to perform a single step or sequence repeatedly until a desired or ordered result is achieved; the repetition of a step or sequence of steps can be performed iteratively and / or recursively using outputs from previous repetitions as inputs for subsequent repetitions, adding inputs and / or outputs from repetitions to produce an aggregate result, reducing or decreasing one or more variables such as global variables, and / or dividing a larger processing task into a set of smaller, iteratively addressed processing tasks.The Encoder 1000 can perform any step or sequence of steps as described in this disclosure in parallel, such as performing a step two or more times simultaneously and / or substantially simultaneously using two or more parallel threads, processor cores, or the like; task division between parallel threads and / or processes can be performed according to any protocol suitable for task division between iterations. Those skilled in the art, after reviewing the entirety of this disclosure, will be aware of various ways in which steps, sequences of steps, processing tasks, and / or data can be subdivided, shared, or otherwise handled using iteration, recursion, and / or parallel processing. With continued reference to Figure 10, non-transient computer program products (i.e., physically embedded computer program products) may store instructions that, when executed by one or more data processors of one or more computer systems, cause at least one data processor to perform operations and / or steps thereof described in this disclosure, including, without limitation, any operation described above and / or any operation decoder 700 and / or encoder 1000 that may be configured to perform. Similarly, computer systems that may include one or more data processors and memory coupled to one or more data processors are also described. The memory may temporarily or permanently store instructions that cause at least one processor to perform one or more of the operations described herein.Furthermore, the methods can be implemented by one or more data processors either within a single computer system or distributed across two or more computer systems. These computer systems can be connected and can exchange data and / or commands or other instructions or similar information through one or more connections, including a connection via a network (e.g., the Internet, a wireless wide area network, a local area network, a wide area network, a wired network, or similar), or through a direct connection between one or more of the multiple computer systems or similar. With continued reference to Figure 10, the encoder The 1000 and / or its circuitry can be designed and / or configured to perform any method, method step, or sequence of method steps in any manner described in this disclosure, in any order, and with any degree of repetition. For example, the 1000 encoder and / or its circuitry can be configured to perform a single step or sequence repeatedly until a desired or ordered result is achieved; repetition of a step or sequence of steps can be performed iteratively and / or recursively by using outputs from previous repetitions as inputs for subsequent repetitions, by adding inputs and / or outputs from repetitions to produce an aggregate result, by reducing or decreasing one or more variables such as global variables, and / or by dividing a larger processing task into a set of smaller, iteratively addressed processing tasks.The 1000 encoder and / or its circuitry can perform any step or sequence of steps as described in this disclosure in parallel, such as performing a step two or more times simultaneously and / or substantially simultaneously using two or more parallel threads, processor cores, or the like; task division between parallel threads and / or parallel processes can be performed according to any protocol suitable for task division between iterations. Those skilled in the art, after reviewing the entirety of this disclosure, will be aware of various ways in which steps, sequences of steps, processing tasks, and / or data can be subdivided, shared, or otherwise handled using iteration, recursion, and / or parallel processing. In some modes, a decoder includes circuitry configured to receive an encoded video bitstream. The encoded video stream includes an encoded reference image and an encoded actual image that has a first size. It decodes the reference image, identifies from the bitstream a subregion of the reference image, the subregion has a second size, where the second size is different from the first size, resizes the subregion to a third size, where the third size is equal to the first size, to form a resized reference image, and decodes the actual image using the resized reference image. The subregion can be characterized by an upper shift, a lower shift, a right shift, and a left shift. The identification subregion can include receiving, in a bit stream, an indication that the subregion is present. In some modes, a decoder includes circuitry configured to receive a stream of encoded video bits that includes a first encoded reference image and a current encoded image, decode the reference image, identify from the bit stream a first subregion of the reference image, transform the first subregion to form a second reference image, and decode the current image using the second reference image. The current image can have a first size, the first subregion can have a second size that is different from the first size, and the decoder can be configured to transform the subregion by scaling the first subregion to a third size equal to the first size. The decoder can be configured to transform the first subregion by translating the first subregion. The decoder can be configured to transform the first subregion by applying an affine transformation. The decoder can also be configured to store the first reference image in a buffer. The buffer can include a long-term reference buffer. The buffer can include a reference image buffer. The decoder can also be configured to locate a second subregion within the first reference image.The decoder can be further configured to decode a second frame using a first reference region and a second independent reference region. The decoder can also be configured to store a second independent reference region in a buffer. The current image can be a first image, and the decoder can be further configured to decode a second image using a first subregion and a second subregion. In some modalities, a method of video encoding using reference regions includes receiving, by a decoder, a stream of encoded video bitstream, the encoded video bitstream that includes an encoded reference image and an encoded current image that has a first size, decoding, by the decoder, the reference image, identifying, by the decoder and from the bitstream, a subregion of the reference image, the subregion that has a second size, wherein the second size is different from the first size, resizing, by the decoder, the subregion to a third size, wherein the third size is equal to the first size, to form a resized reference image, and decoding, by the decoder, the current image using the resized reference image. The subregion can be characterized by a height offset, a height, a length offset, and a length. The subregion identification can include receiving, in a bitstream, an indication that the subregion is present. The method can include storing the reference frame in a buffer. The buffer can include a long-term reference buffer. The buffer can include a reference image buffer. In some forms, a decoder includes circuitry configured to receive a bit stream, identify a first frame, locate a first independent reference region within the first frame, extract the first independent reference region from the first frame, and decode a second frame using the first independent reference region as a reference for the second frame. The decoder can be further configured to locate the first independent reference region by identifying, in the bitstream, a geometric characterization of an independent reference region within the first frame. The first independent reference region can be rectangular, and the geometric characterization can include a set of four numbers characterizing the vertices of the first independent reference region. Identifying the first independent reference region can involve receiving, in the bitstream, an indication that the first and second reference regions are present in the first frame. The decoder can also be configured to decode a second frame using a first and a second independent reference region. The decoder can also be configured to store a second independent reference region in a buffer.The decoder can also be configured to decode the second frame using a first reference region and a second reference region. In some modalities, a video encoding method using reference regions includes receiving a bitstream, identifying a first frame, locating a first independent reference region within the first frame, extracting the first independent reference region from the first frame, and decoding a second frame using the first independent reference region as a reference for the second frame. The location of the first independent reference region may involve identifying, in the bitstream, a geometric characterization of an independent reference region within the first frame. The first independent reference region may be rectangular, and the geometric characterization may include a set of four numbers characterizing the vertices of the first independent reference region. Identifying the first independent reference region may involve receiving, in the bitstream, an indication that the first independent reference region is present. The first independent reference region may have a size, and the decoding of the second frame may involve decoding the second frame, which has the same size as the first independent reference region. The method may involve decoding the second frame by transforming the first independent reference region.Transforming the first independent reference region can include scaling it. Transforming the first independent reference region can include flipping it. Transforming the first independent reference region can include moving it relative to a location in a video image. Transforming the first independent reference region can include rotating it relative to a location in a video image. The method may include storing the first frame in a buffer. The buffer may include a long-term reference buffer. The buffer may include a reference image buffer. The decoder may be further configured to locate a second reference region in the first frame. The method may include decoding the second frame using the first reference region and the second independent reference region. The method may include storing a second independent reference region in a buffer. The method may include decoding the second frame using a first reference region and a second reference region. It should be noted that one or more of the aspects and modalities described herein can be conveniently implemented using one or more machines (for example, one or more computing devices used as a user computing device for an electronic document, one or more server devices, such as a document server, etc.) programmed in accordance with the teachings of this specification, as will be evident to those skilled in computer technology. Suitable software coding can be readily prepared by skilled programmers based on the teachings of this disclosure, as will be evident to those skilled in software technology. The aspects and implementations discussed above that employ software and / or software modules may also include suitable hardware to assist in the implementation of the machine-executable instructions of the software and / or software module. This software may be a computer program product that uses a machine-readable storage medium. A machine-readable storage medium may be any medium capable of storing and / or encoding a sequence of instructions for execution by a machine (e.g., a computer device) and causing the machine to perform any of the methodologies and / or modalities described herein. Examples of machine-readable storage media include, but are not limited to, a magnetic disk, an optical disk (e.g., CD, CD-R, DVD, DVD-R, etc.), a magneto-optical disk, a read-only memory (ROM) device, a random-access memory (RAM) device, a magnetic card, an optical card, a solid-state memory device, an EPROM, an EEPROM, and any combination thereof.A machine-readable medium, as used herein, is intended to include a single medium as well as a collection of physically separate media, such as, for example, a collection of compact discs or one or more hard disk drives in combination with computer memory. As used herein, a machine-readable storage medium does not include transient forms of signal transmission. This software may also include information (e.g., data) carried as a data signal on a data carrier, such as a carrier wave. For example, machine-executable information may be included as a data carrier signal embedded in a data carrier where the signal encodes an instruction sequence, or portion thereof, for execution by a machine (e.g., a computing device) and any related information (e.g., data structures and data) that enables the machine to perform any of the methodologies and / or modalities described herein. Examples of a computing device include, but are not limited to, an e-book reader, a computer workstation, a terminal computer, a server computer, a portable device (e.g., a tablet computer, a smartphone, etc.), a web device, a network router, a network switch, a network bridge, any machine capable of executing a sequence of instructions that specify an action that the machine is to take, and any combination thereof. For example, a computing device might include and / or be part of a kiosk. Figure 11 shows a schematic representation of one type of computing device in the form of an example 1100 computer system within which a set of instructions can be executed to cause a control system to perform any one or more of the aspects and / or methodologies of this disclosure. It is also contemplated that multiple computing devices can be used to implement a specially configured set of instructions to cause one or more of the devices to perform any one or more of the aspects and / or methodologies of this disclosure. The 1100 computer system includes a 1104 processor and 1108 memory that communicate with each other and with other components via a 1112 bus.The 1112 bus can include any of several types of bus structures including, but not limited to, a memory bus, a memory controller, a peripheral bus, a local bus, and any combination thereof, utilizing any of a variety of bus architectures. The 1104 processor may include any suitable processor, such as, without limitation, a processor incorporating logic circuitry for performing arithmetic and logical operations, such as an arithmetic logic unit (ALO), which can be regulated by a state machine and directed by operational inputs from memory and / or sensors; the 1104 processor may be arranged according to Von Neumann and / or Harvard architecture as a non-limiting example. The 1104 processor may include, incorporate, and / or be incorporated into, without limitation, a microcontroller, microprocessor, digital signal processor (DSP), field-programmable gate array (FPGA), complex programmable logic device (CPLD), graphics processing unit (GPU), general-purpose GPU, tensor processing unit (TPU), analog or mixed-signal processor, trust platform module (TPM), floating-point unit (FPU), and / or system-on-a-chip (SoC).Memory 1108 may include various components (e.g., machine-readable media) including, but not limited to, a random-access memory component, a read-only component, and any combination thereof. For example, a basic input / output system 1116 (BIOS), which includes basic routines that assist in transferring information between elements within the computer system 1100, such as during startup, may be stored in memory 1108. Memory 1108 may also include (e.g., stored on one or more machine-readable media) instructions (e.g., software) 1120 that incorporate any one or more of the aspects and / or methodologies of this disclosure.In another example, memory 1108 may also include any number of program modules including, but not limited to, an operating system, one or more application programs, other program modules, program data, and any combination thereof. The 1100 computer system may also include a 1124 storage device. Examples of a storage device (e.g., storage device 1124) include, but are not limited to, a hard disk drive, a magnetic disk drive, an optical disk drive in combination with optical media, a solid-state memory device, and any combination thereof. The 1124 storage device may be connected to the 1112 bus by means of a suitable interface (not shown). Examples of interfaces include, but are not limited to, SCSI, Advanced Technology Attachment (ATA), Serial ATA, Universal Serial Bus (USB), IEEE 1394 (FireWire), and any combination thereof. In one example, the 1124 storage device (or one or more components thereof) may be removably interfaced with the 1100 computer system (e.g., via an external port connector (not shown)).Specifically, storage device 1124 and an associated machine-readable medium 1128 can provide non-volatile and / or volatile storage of machine-readable instructions, data structures, program modules, and / or other data for computer system 1100. In one example, software 1120 can reside, in whole or in part, within machine-readable medium 1128. In another example, software 1120 can reside, in whole or in part, within processor 1104. The 1100 computer system may also include an 1132 input device. For example, a user of the 1100 computer system may enter commands and / or other information into the 1100 computer system through the 1132 input device. Examples of an 1132 input device include, but are not limited to, an alphanumeric input device (e.g., a keyboard), a pointing device, a joystick, a game controller, an audio input device (e.g., a microphone, a voice response system, etc.), a cursor control device (e.g., a mouse), a touchpad, an optical scanner, a video capture device (e.g., a still camera, a video camera), a touchscreen, and any combination thereof.Input Device 1132 can be interfaced to Bus 1112 via any of a variety of interfaces (not shown), including, but not limited to, a serial interface, a parallel interface, a game port, a USB interface, a FireWire interface, a direct interface to Bus 1112, and any combination thereof. Input Device 1132 may include a touchscreen interface, which may be part of or separate from Display 1136, discussed later. Input Device 1132 can be used as a user selection device to select one or more graphical representations in a graphical interface as described above. A user can also input commands and / or other information into the 1100 computer system through the 1124 storage device (for example, a removable disk drive, a flash drive, etc.) and / or the 1140 network interface device. A network interface device, such as the 1140 network interface device, can be used to connect the 1100 computer system to one or more of a variety of networks, such as the 1144 network, and one or more 1148 remote devices connected to it. Examples of a network interface device include, but are not limited to, a network interface card (for example, a mobile network interface card, a LAN card), a modem, and any combination thereof.Examples of a network include, but are not limited to, a wide area network (e.g., the Internet, an enterprise network), a local area network (e.g., a network associated with an office, building, campus, or other relatively small geographic area), a telephone network, a data network associated with a telephone / voice provider (e.g., a mobile communications provider's data and / or voice network), a direct connection between two computing devices, and any combination thereof. A network, such as network 1144, may employ a wired and / or wireless communication mode. In general, any network topology may be used. Information (e.g., data, software 1120, etc.) may be communicated to and / or from the computer system 1100 through the network interface device 1140. The 1100 computer system may further include a video display adapter 1152 to communicate a viewable image to a display device, such as the display device 1136. Examples of a display device include, but are not limited to, a liquid crystal display (LCD), a cathode ray tube (CRT), a plasma display, a light-emitting diode (LED) display, and any combination thereof. The display adapter 1152 and the display device 1136 may be used in combination with the processor 1104 to provide graphical representations of aspects of this disclosure. In addition to a display device, the 1100 computer system may include one or more peripheral output devices, including, but not limited to, an audio speaker, a printer, and any combination thereof. These peripheral output devices may be connected to the bus 1112 through a peripheral interface 1156. Examples of a peripheral interface include, but are not limited to, a serial port, a USB connection, a FIREWIRE connection, a parallel connection, and any combination thereof. The foregoing has been a detailed description of illustrative embodiments of the invention. Various modifications and additions may be made without departing from the spirit and scope of this invention. The features of each of the various embodiments described above may be combined with features of other described embodiments, as appropriate, to provide a multitude of combinations of features in new associated embodiments. Furthermore, while the foregoing describes several separate embodiments, what has been described herein is merely illustrative of the application of the principles of the present invention. Moreover, although the particular methods herein may be illustrated and / or described as being carried out in a specific order, the order is highly variable within the ordinary range of ability to achieve methods, systems, and software in accordance with this disclosure.Therefore, this description is intended to be taken only as an example, and not to otherwise limit the scope of this invention. The exemplary embodiments have been disclosed above and illustrated in the accompanying figures. It shall be understood by those skilled in the art that various changes, omissions, and additions may be made to what is specifically disclosed herein without departing from the spirit and scope of the present invention.

Claims

CLAIMS 1. A decoder, the decoder comprising circuitry configured to: receive a bitstream, which includes a set of sequence parameters and a first encoded image; detect in the set of sequence parameters associated with the first encoded image that a sub-encoded image is present in the first encoded image and a location of the sub-encoded image in the first encoded image; extract from the first encoded image and decode the sub-encoded image to form a reference image; determine a predictor from the reference image using a scaling constant, the scaling constant being determined from information in the bitstream; and use the predictor to decode a subsequent image in the bitstream.

2. A decoder, the decoder comprising circuitry configured to: receive a bitstream that includes a sequence parameter set and a first encoded image; detect in the sequence parameter set associated with the first encoded image the location of a first encoded sub-image in the first encoded image and the location of a second encoded sub-image in the first encoded image; extract and decode the first encoded sub-image to form a first reference image; extract and decode the second encoded sub-image to form a second reference image; determine a first predictor in the first reference image using a first scaling constant determined from information in the bitstream;and determine a second predictor in the second reference image using a second scaling constant determined from information in the bitstream.

3. A video decoding method, the method comprising: receiving, by means of a decoder, a bitstream, which includes a set of sequence parameters and a first encoded image; detecting, by means of the decoder, in the set of sequence parameters associated with the first encoded image, that a sub-encoded image region is present in the first encoded image and a location of the sub-encoded image region in the first encoded image; extracting, by means of the decoder, the sub-encoded image region from the first encoded image to form a separate decoded image which is used as a reference image; determining, by means of the decoder, a predictor from the reference image using a scaling constant, the scaling constant being determined from information in the bitstream;and use, through the decoder, the predictor to decode a subsequent image in the bitstream.

4. The decoder according to claim 1, wherein the information in the bit stream used to obtain the scaling modification constant includes an index.

5. The decoder according to claim 1, wherein the predictor is formed using an interpolation filter.

6. The decoder according to claim 1, wherein the back image is an independent back sub-image.

7. The decoder according to claim 2, wherein the predictor is determined using a list of motion vector candidates.

8. The decoder according to claim 2, wherein the first predictor is used to decode a first subsequent image.

9. The decoder according to claim 8, wherein the second predictor is used to decode a second subsequent image.

10. The decoder according to claim 9, wherein the first and second subsequent images are sub-images extracted from the same image.

11. A decoder, the decoder comprising circuitry configured to: receive a bitstream that includes a set of sequence parameters and a first encoded image; detect in the set of sequence parameters associated with the first encoded image that a sub-encoded image is present in the first encoded image and a location of the sub-encoded image in the first encoded image; extract from the first encoded image and decode the sub-encoded image to form a reference image; determine a predictor in the reference image using a scaling constant obtained from information in the bitstream, the information including an index; and use the predictor to decode a subsequent image.

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