Fiber Array Error Correction Structure

The fiber optic array error correction structure addresses assembly errors in fiber array units by using a prism array and self-written optical channel layer to ensure reliable connections with silicon photonic chips.

TWM685105UActive Publication Date: 2026-07-11ZHENSHI CO LTD
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Patent Information

Authority / Receiving Office
TW · TW
Patent Type
Utility models
Current Assignee / Owner
ZHENSHI CO LTD
Filing Date
2026-01-19
Publication Date
2026-07-11

AI Technical Summary

Technical Problem

Current fiber array units suffer from cumulative assembly errors such as roundness deformation, optical axis deviation, optical adhesive curing deformation, and misalignment of V-groove arrays, leading to unreliable connections with silicon photonic chips.

Method used

A fiber optic array error correction structure with a prism array sheet and a self-written optical channel layer, utilizing self-written optical waveguides to correct deviations and form guiding optical paths, ensuring accurate alignment with silicon photonic chips.

Benefits of technology

The structure ensures reliable and accurate optical signal transmission by correcting assembly errors, enabling precise connection between fiber array units and silicon photonic chips.

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  • Figure IMG-2_DRAW_115200574-A0305-14-0003-3
    Figure IMG-2_DRAW_115200574-A0305-14-0003-3
Patent Text Reader

Abstract

This invention relates to an error correction structure for fiber optic arrays, used for error correction in fiber optic array units. It comprises a prism array sheet and a self-written optical channel layer. The prism array sheet contains multiple prism array optical paths aligned with the coupler array of the silicon photonics chip. The self-written optical channel layer forms a guiding optical path that couples with the corresponding fiber and prism array optical paths. The error correction structure allows optical signals to reliably enter the silicon photonics chip from the fiber optic array unit through the guiding optical path and the prism array optical path, or to be emitted by the silicon photonics chip and enter the fiber optic array unit, thereby establishing a reliable and accurate connection between the fiber optic array unit and the silicon photonics chip.
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Description

Fiber Array Error Correction Structure Technical Field

[0001] This invention relates to an error correction structure for fiber optic arrays, specifically an error correction structure for fiber optic arrays that can be used to correct the cumulative assembly errors of fiber optic array units. Prior Technology

[0002] To meet the high bandwidth and low power consumption requirements of AI technology development, silicon photonics technology has been promoted. Silicon photonics technology mainly applies optical communication technology to integrated circuits and uses packaging technology to significantly shorten the electronic signal transmission path, thereby achieving the effects of increasing data transmission bandwidth, reducing power consumption, and resisting interference.

[0003] When a silicon photonic chip is connected, it is coupled to the coupler of the silicon photonic chip through a fiber array unit (FAU), so that optical signals can be transmitted between the optical fibers of the fiber array unit and the silicon photonic chip. However, in the process of coupling the fiber array unit and the coupler of the silicon photonic chip, each optical fiber in the fiber array unit must be precisely aligned with the coupler of the silicon photonic chip in order to achieve a reliable connection.

[0004] As shown in Figure 4, the fiber array unit 90 is formed on a base 91 with a plurality of high-precision etched V-shaped grooves 911. After applying optical adhesive to the V-shaped grooves 911 of the base 91, a plurality of optical fibers 92 are arranged in the V-shaped grooves 911 of the base 91, and then a cover plate 93 is used to cover and fix the plurality of optical fibers 92. However, during the manufacturing and assembly of the current fiber array unit 90, poor connectivity is easily caused by the following problems: 1. Roundness and optical axis deviation of optical fiber 92: As shown in Figure 5, during the manufacturing and storage process, optical fiber 92 may be subjected to thermal deformation, which may cause roundness deformation. In addition, the optical axis 921 of optical fiber 92 may be deviated due to skewing or damage of the cut surface at the end of optical fiber 92. 2. Optical adhesive curing deformation: The optical fiber 92 is fixed to the base 91 through optical adhesive. During the curing and shrinkage process of the optical adhesive, the optical fiber 92 may be affected by the curing deformation of the optical adhesive and be pulled. 3. The V-groove 911 array of the base 91 does not match the coupler spacing of the silicon photonics wafer. 4. Manufacturing deviation of the V-groove 911 array in base 91.

[0005] In summary, the current fiber array unit 90 is susceptible to the aforementioned conditions, which can lead to various cumulative errors during the assembly process. This makes it difficult to reliably connect the silicon photonics chips during the interconnection process. Therefore, how to effectively correct the cumulative errors generated during the manufacturing and assembly process of the fiber array unit 90 in order to provide reliable and accurate interconnection of the silicon photonics chips is the goal that the applicant of this invention is committed to researching. Summary of the Invention

[0006] The main purpose of this invention is to provide an error correction structure for fiber arrays, thereby improving the problem of the cumulative errors generated during the manufacturing and assembly of current fiber array units, which makes it difficult to provide reliable and accurate connectivity for silicon photonic chips.

[0007] To achieve the aforementioned objective, this invention provides a fiber optic array error correction structure, which is disposed in a fiber optic array unit, the fiber optic array unit having a plurality of optical fibers, comprising: A prism array sheet is disposed on one side of the fiber optic array unit. The prism array sheet contains a plurality of prism array optical paths, each of which forms a plurality of optical signal input / output terminals at the other end of the prism array sheet opposite the fiber optic array unit. The optical signal input / output terminals of the plurality of prism array optical paths can be coupled to a coupler of a silicon photonics wafer. A self-written optical channel layer is formed between the fiber array unit and the prism array sheet. The self-written optical channel layer has a plurality of guiding optical paths formed by self-written optical waveguide means. The guiding optical paths can be coupled to the corresponding prism array optical paths in the prism array sheet and the corresponding optical fibers in the fiber array unit.

[0008] This invention relates to a fiber optic array error correction structure that can be installed in a fiber optic array unit. This structure corrects the deviation between the optical fiber of the fiber optic array unit and the prism array optical path of the prism array sheet through the self-written optical channel layer. This effectively corrects the accumulated errors generated during the assembly of the optical fiber in the fiber optic array unit, ensuring that the optical signal can be reliably guided from the optical fiber of the fiber optic array unit through the guiding optical path of the self-written optical channel layer and the prism array optical path of the prism array sheet, and then reliably introduced into the coupler of the silicon photonics chip; or that the optical signal emitted by the silicon photonics chip enters the fiber optic array unit, thereby establishing a reliable and accurate connection between the silicon photonics chip and the fiber optic array unit. Simple Explanation of the Diagram

[0009] Figure 1: A three-dimensional schematic diagram of a preferred embodiment of the fiber array error correction structure of this invention. Figure 2: A top-view schematic diagram of the fiber optic array error correction structure of this invention. Figure 3: A schematic diagram of the process of forming the optical path using self-written optical waveguide technology for the fiber array error correction structure of this invention. Figure 4: A schematic diagram of a fiber optic array unit. Figure 5: A schematic diagram of optical fiber manufacturing errors. Implementation

[0010] Please refer to Figures 1 and 2, which show a preferred embodiment of the fiber array error correction structure of this invention. It is disposed in a fiber array unit 30, which has a plurality of optical fibers 31, and includes a prism array sheet 10 and a self-written optical channel layer 20.

[0011] As shown in Figures 1 and 3, the prism array plate 10 is disposed on one side of the fiber array unit 30. The prism array plate 10 forms a plurality of prism array optical paths. The plurality of prism array optical paths can form a plurality of optical signal input / output terminals 11 at the other end of the prism array plate 10 opposite to the fiber array unit 30. The optical signal input / output terminals 11 of the plurality of prism array optical paths can be coupled to a coupler of a silicon photonic chip. As shown in Figure 4, the prism array plate 10 has a plurality of coupling mirror groups 12 inside, and each coupling mirror group 12 constitutes the prism array optical path.

[0012] As shown in Figures 1 to 3, the self-written optical channel layer 20 is formed between the fiber array unit 30 and the prism array sheet 10. The self-written optical channel layer 20 has a plurality of guiding optical paths 21 formed by self-written optical waveguide means. The guiding optical paths 21 can be coupled to the corresponding prism array optical paths in the prism array sheet 10 and the corresponding optical fibers 31 in the fiber array unit 30.

[0013] Furthermore, as shown in Figures 1 to 3, the fiber array error correction structure of this invention can sequentially perform the steps of prism array fabrication, self-written photoresist filling, and optical path shaping during fabrication.

[0014] When performing the prism array fabrication step, a prism array 10 can be fabricated, forming a plurality of prism array optical paths and a plurality of optical signal input / output terminals 11 corresponding to the plurality of prism array optical paths. The specifications of the optical signal input / output terminals 11 of the plurality of prism array optical paths are compatible with the coupler of the silicon photonics wafer.

[0015] In the prism array sheet fabrication step, the prism array sheet 10 can be fabricated using two-photon polymerization 3D microprinting technology.

[0016] Next, in the self-written photoresist filling step, after aligning the prism array 10 and the fiber array unit 30 using 3D vision-assisted technology, self-written photoresist is filled between the prism array 10 and the fiber array unit 30 to form a self-written optical channel layer 20.

[0017] Finally, as shown in Figure 3, during the guiding optical path forming step, the laser is simultaneously introduced from the optical signal input / output end 11 of the prism array optical path of the prism array sheet 10 and the optical fiber 31 of the optical fiber array unit 30. The self-written optical waveguide technology is used to form a guiding optical path 21 inside the self-written optical channel layer 20 that can be coupled to the corresponding prism array optical path and optical fiber 31.

[0018] As shown in Figure 3, the self-writing photoresist of the self-writing optical channel layer 20, under the illumination of laser light of a certain wavelength, causes the refractive index of the self-writing photoresist to gradually change around the position irradiated by the laser light, thereby slowly forming an optical channel. When the self-writing photoresist of the self-writing optical channel layer 20 is irradiated by laser light at both ends, the optical channels formed at the two ends will gradually approach each other. When the optical channels formed by the laser light at both ends approach each other, the laser radiation beams of the two ends will overlap each other, so that an optical path is constructed between the two optical channels, and then the two optical channels are connected to each other to form a guiding optical path 21.

[0019] This invention's fiber optic array error correction structure involves setting a prism array 10 that can be coupled to a coupler on a silicon photonic chip, and then guiding a laser signal from the optical signal input / output end 11 of the prism array optical path of the prism array 10 and the optical fiber 31 of the fiber optic array unit 30. This forms a guiding optical path 21 inside the self-writing optical channel layer 20, thereby correcting the assembly error between the fiber optic array unit 30 and the prism array 10, and ensuring the fiber... When the array unit 30 is connected to the silicon photonic chip, it can input an optical signal from the optical fiber 31, so that the optical signal can sequentially pass through the guide optical path 21 of the self-written optical channel layer 20 and the prism array optical path of the prism array plate 10, and accurately enter the coupler of the silicon photonic chip; or the optical signal emitted by the silicon photonic chip passes through the prism array plate 10 and the self-written optical channel layer 20 into the fiber array unit 30, thereby achieving a reliable and accurate connection effect.

[0020] In summary, the fiber array error correction structure of this invention can correct the assembly error between the fiber array unit 30 and the prism array 10 through the guide optical path 21 of the self-written optical channel layer 20. This allows the optical signal to be reliably guided from the fiber 31 of the fiber array unit 30 through the guide optical path 21 and the prism array optical path to the silicon photonic chip; or the optical signal emitted by the silicon photonic chip can be guided through the prism array 10 and the self-written optical channel layer 20 to the fiber array unit 30, thereby establishing a reliable and accurate connection between the fiber array unit 30 and the silicon photonic chip.

[0021] 10: Prism array sheet 11: Optical signal input / output end 12: Correction lens group 20: Custom-written optical channel layer 21: Guiding optical path 30: Fiber optic array unit 31: Optical fiber 90: Fiber optic array unit 91: Base 911: V-shaped groove 92: Fiber optic 921: Optical Axis 93: Cover plate

Claims

1. A fiber optic array error correction structure disposed in a fiber optic array unit having a plurality of optical fibers, comprising: a prism array sheet disposed on one side of the fiber optic array unit, wherein a plurality of prism array optical paths are formed inside the prism array sheet, the plurality of prism array optical paths being capable of forming a plurality of optical signal input / output terminals at the other end of the prism array sheet opposite to the fiber optic array unit, the optical signal input / output terminals of the plurality of prism array optical paths being capable of coupling with a coupler of a silicon photonics wafer; and a self-written optical channel layer formed between the fiber optic array unit and the prism array sheet, wherein the self-written optical channel layer has a plurality of guiding optical paths formed by self-written optical waveguide means, the guiding optical paths being capable of coupling with corresponding prism array optical paths in the prism array sheet and corresponding optical fibers in the fiber optic array unit.

2. The fiber array error correction structure as described in claim 1, wherein the prism array sheet has a plurality of coupling mirror groups inside, and the prism array optical path is formed by the coupling mirror groups of each coupling mirror group.