Light-emitting substrate, backlight module and display apparatus

Abstract

A light-emitting substrate, which is provided with a functional area and a binding area, which are arranged spaced apart from each other in a first direction. The light-emitting substrate comprises: a base; a plurality of drive chips located on the base, wherein the plurality of drive chips comprise a plurality of first drive chips and a plurality of second drive chips, at least one first drive chip among the plurality of first drive chips being closer to the binding area than the plurality of second drive chips, and / or at least one first drive chip among the plurality of first drive chips being farther away from the binding area than the plurality of second drive chips, and each first drive chip comprising at least one floating pin; and a plurality of conductive patterns, which are located between the base and the plurality of drive chips, wherein one conductive pattern is electrically connected to one floating pin.

Description

Light-emitting substrate, backlight module and display device TECHNICAL FIELD

[0001] The present disclosure relates to the technical field of display, and in particular to a light-emitting substrate, a backlight module and a display device. BACKGROUND

[0002] Light-emitting diode (LED), Mini Light-Emitting Diode (Mini LED) or Micro Light-Emitting Diode (Micro LED). Among them, the size of Mini LED is about 80-500 μm, and the size of Micro LED is less than 80 μm.

[0003] Mini LED can be used in backlight and direct display. In the case of Mini LED applied to backlight, through a large number of dense arrangement, it can realize regional dimming in a smaller range. Compared with the traditional backlight design, it can realize better brightness uniformity and higher color contrast in a smaller light mixing distance, thereby realizing the ultra-thin, high color rendering and power saving of the terminal product. At the same time, since its design can be matched with a flexible substrate, the curvature of the liquid crystal display panel (LCD) can also realize similar organic light-emitting diode (OLED) curved display while ensuring the image quality.

[0004] In the case of Micro LED applied to RGB direct display, it can overcome the defects of wire bonding and reliability of the normal chip, and combine the advantages of COB (Chip on Board) or COG (Chip on Glass) packaging, so that the display screen point pitch can be further reduced, the visual effect of the corresponding terminal product is greatly improved, and the viewing distance can be greatly reduced, so that the indoor display screen can further replace the original LCD market. On the other hand, the use of flexible substrate can also realize the high-quality display effect of the curved surface, and its self-luminous characteristic has a very broad market in some special modeling requirements (such as automobile display).

[0005] SUMMARY

[0006] In one aspect, a light emitting substrate is provided, having functional areas and bonding areas arranged in a first direction. The light emitting substrate comprises: a substrate; a plurality of driving chips on the substrate, the plurality of driving chips comprising a plurality of first driving chips and a plurality of second driving chips; at least one first driving chip in the plurality of first driving chips is closer to the bonding areas than the plurality of second driving chips, and / or at least one first driving chip in the plurality of first driving chips is farther away from the bonding areas than the plurality of second driving chips; the first driving chip comprises at least one floating pin; a plurality of conductive patterns between the substrate and the plurality of driving chips, one conductive pattern is electrically connected to one floating pin.

[0007] In some embodiments, the light emitting substrate further comprises: a plurality of light emitting device groups on the substrate; the first driving chip comprises a plurality of channel pins, one channel pin is configured to be electrically connected to one light emitting device group; in the plurality of channel pins of the first driving chip, part of the channel pins constitute the floating pins and are not connected to the light emitting device groups.

[0008] In some embodiments, the number of channel pins included in the second driving chip is the same as the number of channel pins included in the first driving chip; the number of light emitting device groups connected to the second driving chip is greater than the number of light emitting device groups connected to the first driving chip.

[0009] In some embodiments, the number of floating pins included in the first driving chip is a plurality, and the conductive patterns connected to at least two floating pins of the first driving chip constitute an integrated structure.

[0010] In some embodiments, the light emitting substrate further comprises: a plurality of first voltage signal lines between the substrate and the plurality of driving chips; the light emitting device groups are also electrically connected to the first voltage signal lines; and the conductive patterns are not connected to the first voltage signal lines.

[0011] In some embodiments, the plurality of conductive patterns and the plurality of first voltage signal lines are of the same material and are disposed in the same layer.

[0012] In some embodiments, the minimum distance between the conductive patterns and the first voltage signal lines is greater than or equal to 200 μm.

[0013] In some embodiments, the first driving chip comprises a plurality of power voltage signal pins; the power voltage signal pins are configured to receive a power voltage signal; in the plurality of power voltage signal pins of the first driving chip, part of the power voltage signal pins constitute the floating pins and do not receive the power voltage signal.

[0014] In some embodiments, the light-emitting substrate further comprises a plurality of second voltage signal lines between the substrate and the plurality of driving chips, the power voltage signal pins are electrically connected with the second voltage signal lines; and the conductive pattern is not connected with the second voltage signal lines.

[0015] In some embodiments, the conductive pattern is made of the same material as the second voltage signal lines and is arranged in the same layer.

[0016] In some embodiments, the minimum distance between the conductive pattern and the second voltage signal lines is greater than or equal to 200 μm.

[0017] In some embodiments, the first driving chip comprises a plurality of data signal pins; the data signal pins are configured to receive data signals; and among the plurality of data signal pins of the first driving chip, some data signal pins constitute the floating pins and do not receive data signals.

[0018] In some embodiments, the light-emitting substrate further comprises a plurality of data signal lines between the substrate and the plurality of driving chips; the data signal pins are electrically connected with the data signal lines; and the conductive pattern is not connected with the data signal lines.

[0019] In some embodiments, the conductive pattern is made of the same material as the data signal lines and is arranged in the same layer.

[0020] In some embodiments, the minimum distance between the conductive pattern and the data signal lines is greater than or equal to 200 μm.

[0021] In some embodiments, the conductive pattern is arranged in a circular arc shape or a chamfer shape away from one end of the first driving chip.

[0022] In some embodiments, the shape of the conductive pattern on the substrate is a strip shape, a rectangular shape, a circular shape or an elliptical shape.

[0023] In some embodiments, the plurality of driving chips are arranged in a plurality of columns, each column of driving chips comprises a plurality of driving chips; and the plurality of driving chips in each column of driving chips are sequentially cascaded.

[0024] In another aspect, a backlight module is provided, which is the light-emitting substrate as described in any of the above embodiments, and an optical film located on the light-emitting side of the light-emitting substrate.

[0025] In yet another aspect, a display device is provided, which comprises: a backlight module as described in the above embodiments; an array substrate located on the light-emitting side of the backlight module; and a color film substrate located on the side of the array substrate away from the backlight module. BRIEF DESCRIPTION OF DRAWINGS

[0026] In order to more clearly illustrate the technical solutions in the present disclosure, the drawings needed to be used in some embodiments of the present disclosure will be briefly introduced. Obviously, the drawings in the following description are only some drawings of the embodiments of the present disclosure, and other drawings can also be obtained by those skilled in the art according to these drawings. In addition, the drawings in the following description can be regarded as schematic diagrams, and are not limited to the actual size of the products involved in the embodiments of the present disclosure.

[0027] FIG. 1A is a structural diagram of a display device according to some embodiments of the present disclosure;

[0028] FIG. 1B is a structural diagram of another display device according to some embodiments of the present disclosure;

[0029] FIG. 2 is a structural diagram of a backlight module according to some embodiments of the present disclosure;

[0030] FIG. 3 is a structural diagram of a light-emitting substrate according to some embodiments of the present disclosure;

[0031] FIG. 4 is a structural diagram of another light-emitting substrate according to some embodiments of the present disclosure;

[0032] FIG. 5 is a partial enlarged view of a light-emitting substrate according to some embodiments of the present disclosure;

[0033] FIG. 6 is a partial enlarged view of a light-emitting substrate according to some embodiments of the present disclosure;

[0034] FIG. 7 is a structural diagram of a light-emitting substrate according to some embodiments of the present disclosure;

[0035] FIG. 8 is a partial enlarged view of region H in FIG. 7;

[0036] FIG. 9 is a partial enlarged view of a light-emitting substrate according to some embodiments of the present disclosure;

[0037] FIG. 10 is a partial enlarged view of a light-emitting substrate according to some embodiments of the present disclosure;

[0038] FIG. 11 is a partial enlarged view of a light-emitting substrate according to some embodiments of the present disclosure. DETAILED DESCRIPTION

[0039] The technical solutions in some embodiments of the present disclosure will be described clearly and completely with reference to the drawings. Obviously, the described embodiments are only some of the embodiments of the present disclosure, but not all the embodiments. Based on the embodiments provided in the present disclosure, all other embodiments obtained by those skilled in the art belong to the scope of protection of the present disclosure.

[0040] Unless the context clearly requires otherwise, throughout the description and the claims, the term "comprise," and variations thereof (e.g., "comprises" and "comprising"), will be construed to be inclusive in a manner consistent with the term's meaning as set forth herein as used in a discrete collection of elements. As used herein, the terms "first," "second," and the like, do not imply relative importance or a particular order but are simply used to distinguish one element from another. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed terms.

[0041] The terms "first," "second," and the like, as used herein do not imply relative importance or a particular order but are simply used to distinguish one element from another. Thus, a feature specified as "first" can be either implicitly or explicitly preceded by one or more other features. In the description of embodiments of the present disclosure, the meaning of "a," "an," and "the" includes two or more unless otherwise clear from the context.

[0042] In describing some embodiments, use is made of the term "connect" and its derivatives. The term "connect" is to be construed broadly, for example, "connect" can be a fixed connection, a detachable connection, or integral; can be direct, or through an intermediate medium. For example, the term "connect" can be used in describing some embodiments to indicate that two or more components have direct physical or electrical contact with each other. The embodiments disclosed herein are not necessarily limited by the content herein.

[0043] "A and / or B" includes the following three combinations: A alone, B alone, and a combination of A and B.

[0044] As used herein, the term "if' is, optionally, interpreted as meaning "when" or "while" or "in response to a determination" or "in response to a detection of, as the context requires. Similarly, the phrase "if determined" or "if detected [a stated condition or event]" is, optionally, interpreted as meaning "upon a determination of" or "in response to a determination of" or "upon a detection of [a stated condition or event]" or "in response to a detection of [a stated condition or event]," as the context requires.

[0045] The use of “adapted to” or “configured to” herein means open and inclusive language that does not exclude additional devices or steps not explicitly described.

[0046] Additionally, the use of “based on” means open and inclusive, as the process, step, calculation, or other action that is based on one or more recited conditions or values can in practice be based on additional conditions or values beyond those recited.

[0047] As used herein, “about,” “approximately” or “around” includes the recited value and average values falling within an acceptable range of deviation from the particular value, as determined by one of ordinary skill in the art considering the measurement in question and the error in measuring the particular quantity (i.e., the limitations of the measurement system).

[0048] As used herein, “vertical,” “equal” includes the recited condition and conditions that approximate the recited condition, the approximation being within an acceptable range of deviation, as determined by one of ordinary skill in the art considering the measurement in question and the error in measuring the particular quantity (i.e., the limitations of the measurement system). For example, “vertical” includes absolute vertical and near vertical, where the acceptable range of deviation for near vertical is, for example, within 5°. “Equal” includes absolute equality and near equality, where the acceptable range of deviation for near equality is, for example, a difference between the two that is less than or equal to 5% of either.

[0049] It will be understood that when a layer or element is referred to as being “on” another layer or substrate, it can be directly on the other layer or substrate, or intervening layers can also be present.

[0050] Exemplary embodiments are described herein with reference to cross-sectional and / or plan view illustrations that are idealized examples of exemplary embodiments. In the drawings, the thickness of layers and regions are exaggerated for clarity. Accordingly, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and / or tolerances, are to be expected. Thus, the exemplary embodiments should not be construed as limited to the particular shapes of regions as illustrated herein but are to include deviations in shapes that result, for example, from manufacturing. For example, an etched region illustrated as a rectangle will typically have rounded or curved features. Thus, the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the precise shape of a region of a device and are not intended to limit the scope of the exemplary embodiments.

[0051] FIG. 1A is a structural diagram of a display device according to some embodiments.

[0052] As shown in FIG. 1A, embodiments of the present disclosure provide a display device 1. In some examples, the display device 1 can be a product with an image display function.

[0053] In some examples, the display device 1 can be any device that displays images whether in motion (e.g., video) or stationary (e.g., a still image) and whether textual or pictorial. More specifically, it is contemplated that the embodiments can be implemented in or in association with a variety of electronic devices such as, but not limited to, mobile telephones, wireless devices, personal data assistants, handheld or portable computers, global positioning system receivers / navigators, cameras, video players, camcorders, game consoles, watches, clocks, calculators, television monitors, flat panel displays, computer monitors, auto displays (e.g., odometer display, etc.), cockpit controls and / or displays, display of camera views (e.g., display of a rear view camera in a vehicle), electronic photographs, electronic billboards or signs, projectors, architectural structures, packaging, and aesthetic structures (e.g., display of images on a piece of jewelry) and the like.

[0054] Embodiments of the present disclosure do not make further limitations on the display device 1, and the following is taken as an example that the display device 1 is a product with an image display function.

[0055] For example, in the case of the above-mentioned display device 1 being a large-size display device, the display device 1 can include a plurality of sub-display devices, and the plurality of sub-display devices are spliced with each other to form a large-size display device to meet the large-size display requirement. The display device can be referred to as a spliced display device.

[0056] In some examples, the above-mentioned display device 1 can be an LCD (Liquid Crystal Display) display device.

[0057] In some examples, as shown in FIG. 1B, the display device 1 includes a backlight module 10, an array substrate 20 located at the light-emitting side of the backlight module 10, and a color film substrate 30 located at the side of the array substrate 20 away from the backlight module 10.

[0058] For example, the backlight module 10 can serve as a light source to provide backlight. For example, the backlight provided by the backlight module 10 can be white light or blue light.

[0059] For example, the light-emitting side of the backlight module 10 refers to the side from which the backlight module 10 emits light.

[0060] Exemplarily, the array substrate 20 can include a plurality of pixel driving circuits, for example, arranged in an array. The plurality of pixel driving circuits are electrically connected one-to-one with the plurality of pixel electrodes, and the pixel driving circuits provide pixel voltages for the corresponding pixel electrodes.

[0061] Exemplarily, the display device 1 further includes a common electrode. The common electrode can be arranged in the color filter substrate 30, and the common electrode can receive a common voltage. Of course, the common electrode can also be arranged in the array substrate 20, which is not limited in the present disclosure.

[0062] In some examples, as shown in FIG. 1B, the display device 1 further includes a liquid crystal layer 40 between the color filter substrate 30 and the array substrate 20.

[0063] Exemplarily, the liquid crystal layer 40 includes a plurality of liquid crystal molecules. For example, an electric field can be formed between the pixel electrode and the common electrode, and by controlling the pressure value of each pixel voltage, the intensity of the electric field formed between the common electrode and each pixel electrode can be controlled, thereby controlling the deflection angle of the liquid crystal molecules in the liquid crystal layer 40.

[0064] It can be understood that the backlight provided by the backlight module 10 can be transmitted through the array substrate 20 and incident on the liquid crystal molecules of the liquid crystal layer 40. The liquid crystal molecules are flipped under the action of the electric field formed between the pixel electrode and the common electrode, thereby changing the amount of light transmitted through the liquid crystal molecules, so that the light emitted through the liquid crystal molecules reaches a preset brightness. The above light is emitted after passing through different color filters in the color filter substrate 30. The emitted light includes light of various colors, such as red light, green light, blue light, etc., and the light of various colors cooperates with each other, so that the display device 1 realizes display.

[0065] In some examples, when the backlight provided by the backlight module 10 is white light, the color filter substrate 30 can include a red filter film, a green filter film, and a blue filter film. By controlling the intensity of the light irradiated to the red filter film, the green filter film, and the blue filter film, red light, green light, and blue light of different intensities can be obtained, so that the display device 1 can display a color image. For example, the red filter film can only make the red light in the incident light transmit, the green filter film can only make the green light in the incident light transmit, and the blue filter film can only make the blue light in the incident light transmit.

[0066] In other examples, when the backlight provided by the backlight module 10 is blue light, the color filter substrate 30 may include a color conversion film. For example, the color conversion film may be a quantum dot film. Blue light irradiated by the red quantum dot film can be converted into red light. Blue light irradiated by the green quantum dot film can be converted into green light. The resulting red and green light after conversion by the quantum dot film is mixed with the blue light provided by the backlight module 10, enabling the display device 1 to achieve full-color graphic display.

[0067] For example, there are various types of backlight modules 10 in the display device 1, which can be set according to the actual situation, and this disclosure does not limit them.

[0068] For example, the backlight module 10 can be an edge-lit backlight module or a direct-lit backlight module.

[0069] For ease of description, the following embodiments of this disclosure use a direct-lit backlight module 10 as an example.

[0070] In some embodiments, as shown in FIG2, the backlight module 10 includes: a light-emitting substrate 100 and an optical film 200 located on the light-emitting side of the light-emitting substrate 100.

[0071] For example, the optical film 200 includes a diffuser plate 210, a quantum dot film 220, a diffuser sheet 230, and a composite film 240, which are sequentially stacked on the light-emitting side of the light-emitting substrate 100.

[0072] For example, the diffuser plate 210 and diffuser sheet 230 are used to eliminate lamp shadows and to homogenize the light emitted by the light-emitting substrate 100, thereby improving the uniformity of the light.

[0073] For example, the quantum dot film 220 is used to convert the light emitted by the light-emitting substrate 100. Optionally, when the light emitted by the light-emitting substrate 100 is blue light, the quantum dot film 220 can convert the blue light into white light and improve the purity of the white light.

[0074] For example, the composite film 240 is used to increase the brightness of the light emitted by the light-emitting substrate 100.

[0075] It is understandable that the light emitted from the light-emitting substrate 100 is enhanced in brightness and has higher purity and better uniformity after being incident on the optical film 200.

[0076] The backlight module 10 described above may include multiple light-emitting substrates 100 and corresponding optical films. The multiple light-emitting substrates 100 can be spliced ​​together, and the corresponding optical films can also be spliced ​​together, so that the backlight module 10 has a large size. In this case, the backlight module 10 can be called a splicing display module, and can be applied in the above-mentioned splicing display device.

[0077] In some examples, as shown in FIG. 2, the backlight module 10 further comprises a support column 201 arranged between the light-emitting substrate 100 and the diffusion plate 210 of the optical film 200.

[0078] Exemplarily, the support column 201 can be fixed on the light-emitting substrate 100 by glue. The support column 201 can be used to support the optical film 200 and make the light emitted by the light-emitting substrate 100 obtain a certain light mixing distance, so as to further eliminate the lamp shadow and improve the uniformity of the light.

[0079] Exemplarily, the display device 1 further comprises a frame, a display chip and other electronic accessories, etc.

[0080] In other examples, the display device 1 comprises the light-emitting substrate 100, which is directly used for displaying pictures. The display device is commonly used in commercial display, such as traffic management command center display screen or commercial square display screen, etc.

[0081] In some embodiments, as shown in FIG. 3, the light-emitting substrate 100 has a functional area F and a binding area B.

[0082] In some examples, as shown in FIG. 3, the light-emitting substrate 100 comprises a substrate 110 and a plurality of driving chips 120 and a plurality of light-emitting device groups 130 located on the same side of the substrate 110.

[0083] Exemplarily, the light-emitting device groups 130 can realize light emission under the control of the driving signals transmitted by the driving chips 120.

[0084] It can be understood that, as shown in FIG. 3 and FIG. 4, the light-emitting substrate 100 further comprises a plurality of signal lines 150 located between the substrate 110 and the plurality of driving chips 120, and a plurality of connection lines 160. For example, the plurality of signal lines 150 comprises a plurality of first voltage signal lines, a plurality of second voltage signal lines, a plurality of data signal lines, a plurality of address signal lines and a plurality of ground signal lines. Among them, the first voltage signal line can also be referred to as a device power supply signal line, which is used to provide a larger constant current voltage for the light-emitting device groups 130, and then form a loop with the ground signal line; the second voltage signal line can also be referred to as a chip power supply signal line, which is used to input a voltage signal for providing working power supply for the driving chips 120.

[0085] The plurality of connection lines 160 are used to realize the electrical connection between the driving chips 120 and the signal lines 150, the electrical connection between the light-emitting device groups 130 and the signal lines 150, and the electrical connection between the light-emitting device groups 130 and the driving chips 120.

[0086] In some examples, as shown in FIG. 3, the plurality of signal lines 150 and the plurality of connection lines 160 are arranged on different conductive layers. For example, the signal lines 150 and the connection lines 160 can be arranged on two layers of conductive layers, respectively, and the material of the conductive layers can include a metal material, such as copper. At this time, the light-emitting substrate 100 is generally referred to as a light-emitting substrate with double-layer wiring.

[0087] In other examples, as shown in FIG. 4, the plurality of signal lines 150 and the plurality of connection lines 160 are arranged on the same conductive layer, and the material of the conductive layer can include a metal material, such as copper. At this time, the light-emitting substrate 100 is generally referred to as a light-emitting substrate with single-layer wiring.

[0088] Generally, in the process of manufacturing the light-emitting substrate 100 with double-layer wiring, a plurality of insulating layers are arranged between the two layers of conductive layers, and a plurality of insulating layers are arranged between the layer of conductive layer close to the driving chip 120 and the driving chip 120. For example, two layers of insulating layers are arranged between the layer of conductive layer close to the driving chip 120 and the driving chip 120, and the two layers of insulating layers include an inorganic insulating layer and an organic insulating layer stacked in sequence away from the substrate 110. The material of the inorganic insulating layer is, for example, silicon nitride, silicon oxide, etc., and the inorganic insulating layer is used to isolate the conductive layer from water and oxygen; the material of the organic insulating layer can be, for example, OC (Over Coating) glue, and the organic insulating layer is used to protect the layer of conductive layer close to the driving chip 120 among the two layers of conductive layers, so that the conductive layer is not easily oxidized, and the corrosion rate of the conductive layer is delayed. In the process of manufacturing the light-emitting substrate 100 with single-layer wiring, generally only one layer of insulating layer is arranged between the conductive layer and the driving chip 120. The material of the insulating layer is, for example, silicon nitride, silicon oxide, etc.

[0089] It can be understood that the light-emitting substrate 100 will inevitably come into contact with the human body during use. After the human body carries a certain static electricity due to friction, etc., the static electricity will be transmitted to the light-emitting substrate 100 and discharged through the light-emitting substrate 100 when the human body comes into contact with the light-emitting substrate 100. The equivalent resistance of the human body is in the order of KΩ (for example, 1500Ω), and the characteristics of the static electricity discharge in the light-emitting substrate 100 after the human body comes into contact with the light-emitting substrate 100 are that the discharge time is long, the peak current is small, an extremely high instantaneous discharge current can be generated within a few hundred nanoseconds, and the discharge current can reach several amperes.

[0090] In addition, the preparation process of the light-emitting substrate 100 generally includes an assembling or transporting process of the light-emitting substrate 100. For example, in the film forming process of the light-emitting substrate 100, the light-emitting substrate 100 will contact other charged conductors, and then the static electricity on the charged conductors will be transmitted to the light-emitting substrate 100, thereby causing a charging and discharging phenomenon. The current generated in this preparation process can be as high as about 21A. If such a large current and fast discharge pulse discharge occurs in the light-emitting substrate, it is easy to cause damage to the internal circuit of the light-emitting substrate 100.

[0091] In some examples, when the number of the light-emitting device groups 130 electrically connected to the light-emitting substrate 100 with single-layer wiring is one, the driving chip 120 has four pins, and the four pins are respectively connected to the lamp area signal line (i.e., the first voltage signal line described above), the ground signal line, the working signal line, and the address signal line, wherein the working signal line can simultaneously provide the driving chip 120 with the power signal (i.e., the second voltage signal provided by the second voltage signal line described above) and the data signal. That is, the four pins of the driving chip 120 are all connected to the signal lines, as shown in FIG. 5.

[0092] However, when the number of the light-emitting device groups 130 electrically connected to the driving chip 120 is multiple, on the top side of the light-emitting substrate 100 (the top side of the light-emitting substrate 100 refers to the side of the functional area F away from the binding area B) and / or the bottom side of the light-emitting substrate 100 (the bottom side of the light-emitting substrate 100 refers to the side of the functional area F close to the binding area B), due to the uneven distribution of the light-emitting device groups 130, at least one dummy pin DP exists in the driving chip 120 close to the top side of the light-emitting substrate 100 and / or close to the bottom side of the light-emitting substrate 100, that is, at least one pin in the driving chip 120 close to the top side of the light-emitting substrate 100 and / or close to the bottom side of the light-emitting substrate 100 is in a floating state. For example, as shown in FIG. 6, which is a partial enlarged view of the light-emitting substrate provided by some embodiments of the present disclosure, the driving chip 120 has multiple dummy pins DP.

[0093] The inventors of the present disclosure further found that, in the die bonding process of the driving chip 120, a reflow soldering process is usually adopted. The force environment of the floating pins is different from that of the pins connected with signal lines (for example, the force area of the floating pins is smaller than that of the pins connected with signal lines during reflow soldering), which leads to uneven force on the driving chip 120 during reflow soldering, thereby affecting the flatness of the welding of the driving chip 120. Moreover, the number of layers of the protective layer (i.e., the above-mentioned insulating layer) of the light-emitting substrate 100 with single-layer wiring is less than that of the light-emitting substrate 100 with double-layer wiring, and the thickness of the protective layer of the light-emitting substrate 100 with single-layer wiring is thinner (the thickness of the protective layer is usually in the range of 1200A-4000A), which leads to that the electro static discharge (ESD) resistance of the light-emitting substrate 100 with single-layer wiring is lower than that of the light-emitting substrate 100 with double-layer wiring. On this basis, since the multiple pins of the driving chip 120 need to transmit multiple signals at the same time, that is, multiple signals converge at the driving chip 120, the floating pins will exacerbate the ESD risk at the driving chip 120, thereby leading to line damage in the driving chip 120 or burning of the driving chip 120, and the like.

[0094] Based on this, the present disclosure provides a light-emitting substrate 100, as shown in FIG. 7, which has a functional area F and a binding area B.

[0095] It should be noted that, in the drawings of the specification of the present disclosure, the edges of the functional area F and the edges of the binding area B are arranged apart from each other, as shown in FIG. 7, which is only for the purpose of clearly distinguishing the functional area F and the binding area B, and the edge positions of the functional area F and the binding area B are not further limited.

[0096] For example, the binding area B is the area for binding the light-emitting substrate 100 with the above-mentioned display chip.

[0097] For example, the shape of the functional area F can be rectangular, circular, or the like, which can be selected according to actual conditions, and the present disclosure does not limit this.

[0098] For convenience of illustration, the shape of the functional area F is taken as rectangular as an example for introduction below.

[0099] In some examples, the light-emitting substrate 100 includes a substrate 110, multiple driving chips 120, and multiple conductive patterns 140.

[0100] In some examples, the substrate 110 described above can be a flexible substrate. The flexible substrate can be, for example, a PET (Polyethylene Terephthalate) substrate, a PEN (Polyethylene Naphthalate Two Formic Acid Glycol Ester) substrate, a PI (Polyimide) substrate, or the like.

[0101] In other examples, the substrate 110 described above can be a rigid substrate. For example, the rigid substrate can be a glass substrate, a PMMA (Polymethyl methacrylate) substrate, or the like.

[0102] In some examples, the driving chips 120 are located on the substrate 110. Each driving chip 120 is configured to be connected with at least one light emitting device group 130, and the light emitting device groups 130 connected with the driving chip 120 are adjacent in the column direction. For example, the light emitting device groups 130 are arranged into multiple rows along a first direction X and multiple columns along a second direction Y. The driving chips 120 are arranged into multiple rows along the first direction X and multiple columns along the second direction Y. Further, the driving chip 120 connected with the light emitting device groups 130 can be located in the area between two adjacent light emitting device groups 130.

[0103] For example, the light emitting device groups 130 are arranged into M rows along the first direction X, i.e., one column of light emitting device groups 130 contains M light emitting device groups 130; and the driving chips 120 are arranged into N rows along the first direction X, i.e., one column of driving chips 120 contains N driving chips 120. In the case that M is divisible by N, the number of light emitting device groups 130 connected with each driving chip 120 in the same column can be the same. In the case that M is not divisible by N, among the driving chips 120 in the same column, at least one first driving chip 121 and multiple second driving chips 122 are included, wherein the number of light emitting device groups 130 connected with the first driving chip 121 is less than the number of light emitting device groups 130 connected with the second driving chip 122, and in this case, there is a floating pin DP in the first driving chip 121.

[0104] Exemplarily, in the plurality of first driving chips 121, at least one first driving chip 121 is closer to the binding area B than the plurality of second driving chips 122, that is, at least one first driving chip 121 is closer to the ground side of the light-emitting substrate 100 than the plurality of second driving chips 122. Exemplarily, in the plurality of first driving chips 121, at least one first driving chip 121 is farther away from the binding area B than the plurality of second driving chips 122, that is, at least one first driving chip 121 is closer to the sky side of the light-emitting substrate 100 than the plurality of second driving chips 122. Wherein, the first driving chip 121 includes at least one floating pin DP.

[0105] Exemplarily, the plurality of first driving chips 121 and the plurality of second driving chips 122 are both located in the functional area F. It can be understood that the plurality of rows of driving chips 120 (including the plurality of first driving chips 121 and the plurality of second driving chips 122) are arranged at intervals along the first direction X, and the plurality of columns of driving chips 120 are arranged at intervals along the second direction Y.

[0106] It should be noted that in the drawings of the present disclosure, in order to clearly show the structure of the light-emitting substrate 100, only three rows and two columns of driving chips 120 (as shown in FIG. 7) are shown, and the number and arrangement of the driving chips 120 in the embodiments of the present disclosure are not limited further.

[0107] Exemplarily, the first direction X and the second direction Y intersect.

[0108] Here, the included angle between the first direction X and the second direction Y can be selected according to actual needs. For example, the included angle between the first direction X and the second direction Y is 85°, 88° or 90°, etc.

[0109] It can be understood that the first driving chip 121 and the second driving chip 122 both have a plurality of pins.

[0110] Further, the number of pins of the first driving chip 121 and the number of pins of the second driving chip 122 can be equal or not equal, and the embodiments of the present disclosure do not limit this. For example, as shown in FIG. 7, the number of pins of the first driving chip 121 and the number of pins of the second driving chip 122 are equal.

[0111] Exemplarily, FIG. 7 shows that the first driving chip 121 and the second driving chip 122 both have 12 pins.

[0112] It can be understood that part of the pins are connected with part of the signal lines (for example, the second voltage signal line, the ground signal line, etc.) through the connection lines, so as to realize the electrical connection between the first driving chip 121 or the second driving chip 122 and the part of the signal lines. Part of the pins are connected with the light emitting device group 130 through the connection lines, so as to realize the electrical connection between the first driving chip 121 or the second driving chip 122 and the light emitting device group 130.

[0113] In some examples, the first driving chip 121 includes one floating pin DP.

[0114] In yet some examples, the first driving chip 121 includes a plurality of floating pins DP.

[0115] In some examples, the plurality of conductive patterns 140 are located between the substrate and the plurality of driving chips 120, and one conductive pattern 140 is electrically connected with one floating pin DP.

[0116] For example, the material of the plurality of conductive patterns 140 can be metal material, such as copper.

[0117] For example, the plurality of conductive patterns 140 and the signal lines and the connection lines can be arranged in the same conductive layer. For example, the plurality of conductive patterns 140 and the signal lines and the connection lines can be arranged in different conductive layers.

[0118] For example, the plurality of conductive patterns 140 are located in the functional area F. When the first driving chip 121 includes a plurality of floating pins DP, the plurality of conductive patterns 140 electrically connected with the plurality of floating pins DP can be arranged in a column.

[0119] Optionally, when the first driving chip 121 includes a plurality of floating pins DP, all the floating pins DP can be connected with the conductive patterns 140, or part of the floating pins DP can be connected with the conductive patterns 140, and the embodiments of the present disclosure do not limit this.

[0120] With the above arrangement, each pin of the first driving chip 121 is connected with the electric pattern, thereby improving the uniformity of the stress of each pin of the first driving chip 121, and improving the poor welding of the first driving chip 121 in the reflow soldering process due to the uneven stress of each pin of the first driving chip 121. Moreover, the static electricity on the light-emitting substrate 100 can be conducted to the conductive pattern 140 electrically connected with the floating pin DP through the floating pin DP, and conducted to the end of the conductive pattern 140 away from the first driving chip 121 through the conductive pattern 140, thereby avoiding the accumulation of the static electricity on the light-emitting substrate 100 at the floating pin DP of the first driving chip 121, reducing the damage of the static electricity to the first driving chip 121, improving the anti-ESD performance of the first driving chip 121, and improving the poor line strike or burning of the first driving chip 121 caused by the static electricity due to the existence of the floating pin, thereby improving the product reliability and reliability of the light-emitting substrate 100.

[0121] In some embodiments, as shown in FIGS. 7 and 8, the light-emitting substrate 100 further comprises: a plurality of light-emitting device groups 130 on the substrate 110; the first driving chip 121 comprises a plurality of channel pins FP1, and one channel pin FP1 is configured to be electrically connected with one light-emitting device group 130. Among the plurality of channel pins FP1 of the first driving chip 121, part of the channel pins FP1 constitute the floating pin DP and are not connected with the light-emitting device group 130.

[0122] For example, the number of channel pins FP1 included in the first driving chip 121 can be two or more.

[0123] For example, when the number of channel pins FP1 included in the first driving chip 121 is more, one channel pin FP1 can constitute the floating pin DP, or a plurality of channel pins FP1 can constitute the floating pin DP.

[0124] For example, FIG. 8 shows that the first driving chip 121 includes four channel pins FP1. Three of the channel pins FP1 constitute the floating pin DP and are not connected with the light-emitting device group 130. Moreover, the three channel pins FP1 constituting the floating pin DP are all connected with the conductive pattern 140.

[0125] For example, the second driving chip 122 also includes a plurality of channel pins FP1. The number of channel pins FP1 included in the first driving chip 121 and the number of channel pins FP1 included in the second driving chip 122 can be the same or different, and the embodiments of the present disclosure do not limit this.

[0126] For example, the number of the light emitting device groups 130 electrically connected to the first driving chip 121 can be one or multiple. The number of the light emitting device groups electrically connected to the second driving chip 122 is multiple.

[0127] For example, the multiple light emitting device groups 130 are arranged into multiple rows along the first direction X and multiple columns along the second direction Y. It can be understood that the multiple rows of light emitting device groups 130 are arranged at intervals along the first direction X, and the multiple columns of driving chips 120 are arranged at intervals along the second direction Y.

[0128] For example, the light emitting device group 130 includes at least two light emitting devices 131.

[0129] For example, the light emitting device group 130 can include two light emitting devices 131, four light emitting devices 131, or six light emitting devices 131.

[0130] Optionally, the multiple light emitting devices 131 in one light emitting device group 130 can also be arranged at the vertices of a hexagon, an octagon, or other irregular shapes. Alternatively, the multiple light emitting devices 131 in one light emitting device group 130 can also be arranged in a circle or an ellipse, etc., to meet different use requirements. Embodiments of the present disclosure do not limit this.

[0131] For example, the multiple light emitting devices 131 in one light emitting device group 130 can be used to emit light of the same color, and the multiple light emitting devices 131 in the same light emitting device group 130 can also be used to emit light of multiple different colors.

[0132] It can be understood that the number of light emitting devices 131 included in different light emitting device groups 130 can be the same or different. Embodiments of the present disclosure do not further limit the number of light emitting devices 131 in one light emitting device group 130.

[0133] For example, at least two light emitting devices 131 in the same light emitting device group 130 are connected to each other in series. In this way, providing an electrical signal to any light emitting device 131 in one light emitting device group 130 can achieve providing an electrical signal to each light emitting device 131 in one light emitting device group 130, improving the wiring convenience of the light emitting substrate 100.

[0134] For example, under the control of the driving signal transmitted by the driving chip 120, the light emitting device group 130 realizes light emission.

[0135] Exemplarily, the light emitting device 131 can be a Mini LED. Since the grain size of the Mini LED is smaller, the light mixing distance between adjacent Mini LEDs can be greatly shortened, so that the light emitting substrate has the advantages of regional brightness adjustment, high color rendering, high contrast, etc. It can also make the light emitting substrate 100 more lightweight, more power saving, and thus make the application of the light emitting substrate including the Mini LED more flexible. In addition, compared with OLED (Organic Light Emitting Diode, OLED for short), the light emitting substrate including the Mini LED has lower cost, longer service life, and less risk of screen burning.

[0136] In the embodiment, among the plurality of channel pins FP1 of the first driving chip 121, part of the channel pins FP1 constitute the floating pins DP in the floating state. At this time, by electrically connecting the channel pins FP1 in the floating state with the conductive pattern 140, the static electricity on the light emitting substrate 100 can be conducted to the conductive pattern 140 electrically connected with the channel pins FP1 in the floating state through the channel pins FP1 in the floating state, and then conducted to the end of the conductive pattern 140 away from the first driving chip 121 through the conductive pattern 140, thereby avoiding the static electricity on the light emitting substrate 100 from accumulating at the channel pins FP1 in the floating state, reducing the damage of static electricity to the first driving chip 121, improving the ESD performance of the light emitting substrate 100, and improving the product reliability and reliability of the light emitting substrate 100.

[0137] In some embodiments, the number of channel pins FP1 included in the second driving chip 122 is the same as the number of channel pins FP1 included in the first driving chip 121; the number of light emitting device groups 130 connected with the second driving chip 122 is greater than the number of light emitting device groups 130 connected with the first driving chip 121.

[0138] Exemplarily, as shown in FIGS. 7 and 8, the first driving chip 121 and the second driving chip 122 each have four channel pins FP1. The number of light emitting device groups 130 connected with the second driving chip 122 is four; the number of light emitting device groups 130 connected with the first driving chip 121 is one. At this time, among the four channel pins FP1 included in the first driving chip 121, three channel pins FP1 not connected with the light emitting device group 130 constitute the floating pins DP. That is, the first driving chip 121 includes three floating pins DP.

[0139] Further, as shown in FIG. 8, the three floating pins DP are each connected with the conductive pattern 140.

[0140] It can be understood that the number of light emitting device groups 130 connected to the first driving chip 121 mainly depends on the distribution of the light emitting device groups 130. Based on the different distribution of the light emitting device groups 130, when the number of light emitting device groups 130 connected to the second driving chip 122 is four, the number of light emitting device groups 130 connected to the first driving chip 121 can also be two or three, and the embodiments of the present disclosure do not limit this.

[0141] In the embodiment, based on the distribution of the light emitting device groups 130, the number of light emitting device groups 130 connected to the first driving chip 121 closer to the sky side or closer to the ground side is less than the number of light emitting device groups 130 connected to the second driving chip 122. By connecting the channel pin FP1 of the first driving chip 121 not connected to the light emitting device group 130 to the conductive pattern 140, the static electricity on the light emitting substrate 100 can be conducted to the conductive pattern 140 electrically connected to the channel pin FP1 through the channel pin FP1 not connected to the light emitting device group 130, and through the conductive pattern 140 to the end of the conductive pattern 140 away from the driving chip 120, avoiding the static electricity on the light emitting substrate 100 from accumulating at the first driving chip 121, thereby reducing the damage of static electricity to the first driving chip 121, improving the ESD performance of the light emitting substrate 100, and improving the product reliability and reliability of the light emitting substrate 100.

[0142] In some embodiments, as shown in FIG. 9, the number of floating pins DP included in the first driving chip 121 is multiple, and the conductive patterns 140 connected to at least two floating pins DP of the first driving chip 121 constitute an integrated structure.

[0143] In some examples, when the number of floating pins DP included in the first driving chip 121 is multiple, the conductive patterns 140 connected to the multiple floating pins DP constitute an integrated structure. For example, as shown in FIG. 9, the first driving chip 121 includes four channel pins FP1. Three channel pins FP1 constitute floating pins DP, and the conductive patterns 140 connected to the three channel pins FP1 in the floating state constitute an integrated structure.

[0144] In yet other examples, when the number of floating pins DP included in the first driving chip 121 is multiple, the conductive patterns 140 connected to part of the multiple floating pins DP constitute an integrated structure.

[0145] The "integrated structure" refers to that the two connected patterns are arranged in the same layer and the two patterns are continuous and not separated. The above arrangement can enable the conductive pattern 140 connected with the at least two floating pins DP to be formed in one patterning process, thereby simplifying the preparation process of the light-emitting substrate 100 and reducing the preparation cost of the light-emitting substrate 100.

[0146] In some embodiments, as shown in FIG. 7, the light-emitting substrate 100 further comprises a plurality of first voltage signal lines VL1 between the substrate 110 and the plurality of driving chips 120; the light-emitting device groups 130 are further electrically connected with the first voltage signal lines VL1; and the conductive pattern 140 is not connected with the first voltage signal lines VL1.

[0147] It can be understood that the first voltage signal lines VL1 described herein are equivalent to the first voltage signal lines included in the signal lines 150 in some embodiments described above.

[0148] For example, the plurality of first voltage signal lines VL1 extend along the first direction X and are arranged at intervals along the second direction Y.

[0149] It can be understood that the light-emitting substrate 100 further comprises a flexible printed circuit (FPC) and a printed circuit board (PCB). Meanwhile, the binding area B of the light-emitting substrate 100 is provided with a plurality of binding pins, one end of the flexible printed circuit is bound and connected with the binding pins in the binding area B, and the other end is bound and connected with the printed circuit board.

[0150] For example, the first voltage signal lines VL1 are located in the functional area F, one first voltage signal line VL1 is electrically connected with one column of light-emitting device groups 130, and the first voltage signal line VL1 extends to the binding area B, so that the signal from the printed circuit board can be transmitted to the light-emitting device groups 130. The power supply outside the light-emitting substrate 100 is electrically connected with the first voltage signal lines VL1 through the printed circuit board and the binding pins, so that the power supply can supply power to the light-emitting devices 131 in the light-emitting device groups 130 through the first voltage signal lines VL1, thereby enabling the light-emitting devices 131 to emit light.

[0151] For example, the first voltage signal line VL1 is used to provide a large constant current voltage for the light emitting device 131 in the light emitting device group 130. When the light emitting device group 130 includes a plurality of light emitting devices 131, and the plurality of light emitting devices 131 are connected in series, the first light emitting device 131 in the plurality of series-connected light emitting devices 131 is electrically connected to the first voltage signal line VL1, and the last light emitting device 131 in the plurality of series-connected light emitting devices 131 is electrically connected to the channel pin FP1 of the driving chip 121.

[0152] For example, the orthographic projection of the conductive pattern 140 on the substrate 110 does not overlap with the orthographic projection of the first voltage signal line VL1 on the substrate 110. That is, there is a gap between the conductive pattern 140 and the first voltage signal line VL1.

[0153] With the above arrangement, the static electricity in the light emitting substrate 100 can be prevented from being conducted to the end of the conductive pattern 140 away from the driving chip 120, thereby avoiding interference or influence on the voltage signal transmitted by the first voltage signal line VL1.

[0154] In some embodiments, the plurality of conductive patterns 140 and the plurality of first voltage signal lines VL1 are made of the same material and arranged in the same layer.

[0155] For example, the material of the plurality of conductive patterns 140 and the material of the plurality of first voltage signal lines VL1 can both be metal materials, such as copper.

[0156] The above-mentioned "same layer" refers to a layer structure formed by using the same film forming process to form a film layer for forming a specific pattern, and then using the same mask plate to form the layer structure by one-time patterning process. According to different specific patterns, the one-time patterning process can include multiple exposure, development or etching processes, and the specific patterns in the formed layer structure can be continuous or discontinuous, and these specific patterns can also be at different heights or have different thicknesses.

[0157] With the above arrangement, the plurality of conductive patterns 140 and the plurality of first voltage signal lines VL1 are arranged in the same layer, which can reduce the steps of patterning the conductive layer, thereby simplifying the preparation process of the light emitting substrate 100, reducing the number of mask plates, and thus simplifying the preparation process of the light emitting substrate, reducing the cost of the light emitting substrate 100, and also reducing the risk of short circuit and other defects of the light emitting substrate 100, and improving the yield of the light emitting substrate 100.

[0158] In some embodiments, the minimum distance between the conductive pattern 140 and the first voltage signal line VL1 is greater than or equal to 200 μm. For example, the minimum distance between the conductive pattern 140 and the first voltage signal line VL1 can be 200 μm, 210 μm, 220 μm, 230 μm, or 240 μm, etc., and embodiments of the present disclosure do not limit this.

[0159] Specifically, the conductive pattern 140 has a first end and a second end distributed along the second direction Y. The first end of the conductive pattern 140 is electrically connected to the first drive chip.

[0160] For example, the first voltage signal line VL1 is located on the side of the conductive pattern away from the first drive chip 121, and at this time, the minimum distance between the conductive pattern 140 and the first voltage signal line VL1 is the minimum distance between the second end of the conductive pattern 140 and the first voltage signal line VL1.

[0161] With the above arrangement, the minimum distance between the conductive pattern 140 connected to the floating pin DP and the adjacent first voltage signal line is avoided to be too small, thereby avoiding the static electricity in the light-emitting substrate 100 from being conducted to the end of the conductive pattern 140 away from the first drive chip 121, which causes interference or influence on the voltage signal transmitted by the adjacent first voltage signal line VL1, thereby avoiding the influence on the light-emitting device 131 in the light-emitting device group 130, and improving the yield of the light-emitting substrate 100.

[0162] In some embodiments, as shown in FIG. 10, the first drive chip 121 includes a plurality of power voltage signal pins FP2; the power voltage signal pins FP2 are configured to receive a power voltage signal; among the plurality of power voltage signal pins FP2 of the first drive chip 121, part of the power voltage signal pins FP2 constitute floating pins DP, and do not receive the power voltage signal.

[0163] For example, the power voltage signal received by the power voltage signal pin FP2 can be a constant voltage signal, and the power voltage signal is used to power the first drive chip 121.

[0164] For example, the second drive chip 122 also includes a plurality of power voltage signal pins FP2. The number of power voltage signal pins FP2 included in the first drive chip 121 and the number of power voltage signal pins FP2 included in the second drive chip 122 can be the same or different, and embodiments of the present disclosure do not limit this.

[0165] For example, the first driving chip 121 includes the same number of power voltage signal pins FP2 as the second driving chip 122, and both the first driving chip 121 and the second driving chip 122 have two power voltage signal pins FP2. Among the two power voltage signal pins FP2 included by the first driving chip 121, one power voltage signal pin FP2 constitutes a floating pin DP. Moreover, the power voltage signal pin FP2 constituting the floating pin DP is electrically connected with the conductive pattern 140.

[0166] With the above arrangement, the power voltage signal pin FP2 constituting the floating pin DP is electrically connected with the conductive pattern 140, so that the static electricity on the light-emitting substrate 100 can be conducted to the conductive pattern 140 through the power voltage signal pin FP2, and then conducted to the end of the conductive pattern 140 away from the driving chip 120 through the conductive pattern 140, thereby avoiding the accumulation of static electricity on the light-emitting substrate 100 at the first driving chip 121, reducing the damage of static electricity to the first driving chip 121, improving the ESD performance of the light-emitting substrate 100, and improving the product reliability and reliability of the light-emitting substrate 100.

[0167] In some embodiments, as shown in FIG. 7, the light-emitting substrate 100 further includes a plurality of second voltage signal lines VL2 between the substrate 110 and the plurality of driving chips 120, and the power voltage signal pin FP2 is electrically connected with the second voltage signal line VL2; and the conductive pattern 140 is not connected with the second voltage signal line VL2.

[0168] It can be understood that the second voltage signal line VL2 described herein is equivalent to the second voltage signal line included in the signal line 150 in some embodiments described above.

[0169] For example, the plurality of second voltage signal lines VL2 extend along the first direction X and are arranged at intervals along the second direction Y.

[0170] For example, the second voltage signal line VL2 is located in the functional area F, and one second voltage signal line VL2 is electrically connected with one column of driving chips 120 and extends to the bonding area B.

[0171] For example, one end of the second voltage signal line VL2 is electrically connected with the power voltage signal pin FP2 of the driving chip 120, and the other end of the second voltage signal line VL2 is electrically connected with the power supply outside the light-emitting substrate 100 through the bonding pin in the bonding area B and the printed circuit board, so that the power voltage signal outside the light-emitting substrate 100 can be transmitted to the driving chip 120 to realize the power supply of the driving chip 120.

[0172] Exemplarily, the orthographic projection of the conductive pattern 140 on the substrate 110 does not overlap with the orthographic projection of the second voltage signal line VL2 on the substrate 110. That is, there is a gap between the conductive pattern 140 and the second voltage signal line VL2.

[0173] With the above arrangement, it can be avoided that the static electricity in the light-emitting substrate 100 conducts to the end of the conductive pattern 140 away from the first driving chip 121, thereby interfering with or affecting the voltage signal transmitted by the second voltage signal line VL2.

[0174] In some embodiments, the conductive pattern 140 is made of the same material as the second voltage signal line VL2 and arranged in the same layer.

[0175] Exemplarily, the material of the plurality of conductive patterns 140 and the material of the second voltage signal line VL2 can both be metal materials, for example, copper.

[0176] With the above arrangement, the plurality of conductive patterns 140 and the plurality of second voltage signal lines VL2 are arranged in the same layer, so that the plurality of conductive patterns 140 and the plurality of second voltage signal lines VL2 can be formed by one patterning process using the same mask plate. This can reduce the steps of patterning the conductive layer, thereby simplifying the preparation process of the light-emitting substrate 100, reducing the number of mask plates, and further simplifying the preparation process of the light-emitting substrate, reducing the cost of the light-emitting substrate 100, and also reducing the risk of short circuit and other defects of the light-emitting substrate 100, thereby improving the yield of the light-emitting substrate 100.

[0177] In some embodiments, the minimum distance between the conductive pattern 140 and the second voltage signal line VL2 is greater than or equal to 200 μm. For example, the minimum distance between the conductive pattern 140 and the second voltage signal line VL2 can be 200 μm, 210 μm, 220 μm, 230 μm, or 240 μm, and the like, which is not limited in the embodiments of the present disclosure.

[0178] With the above arrangement, it can be avoided that the spacing between the conductive pattern 140 connected to the floating pin DP and the adjacent second voltage signal line VL2 is too small, thereby avoiding that the static electricity in the light-emitting substrate 100 conducts to the end of the conductive pattern 140 away from the first driving chip 121, thereby interfering with or affecting the voltage signal transmitted by the adjacent second voltage signal line VL2, and improving the yield of the light-emitting substrate 100.

[0179] In some embodiments, as shown in FIG. 11, the first driving chip 121 includes a plurality of data signal pins FP3; the data signal pins FP3 are configured to receive data signals; among the plurality of data signal pins FP3 of the first driving chip 121, part of the data signal pins FP3 constitute floating pins DP and do not receive data signals.

[0180] For example, the data signal can be transmitted to the first driving chip 121 through the data signal pin FP3.

[0181] For example, the second driving chip 122 also includes a plurality of data signal pins FP3. The number of data signal pins FP3 included in the first driving chip 121 can be the same as or different from the number of data signal pins FP3 included in the second driving chip 122, and the embodiments of the present disclosure do not limit this.

[0182] For example, the number of data signal pins FP3 included in the first driving chip 121 is the same as the number of data signal pins FP3 included in the second driving chip 122, and the first driving chip 121 and the second driving chip 122 each have two data signal pins FP3. Among the two data signal pins FP3, one is a data input port, and the other is a data output port.

[0183] Among the two data signal pins FP3 included in the first driving chip 121, one data signal pin FP3 constitutes a floating pin DP. Moreover, the data signal pin FP3 constituting the floating pin DP is electrically connected to the conductive pattern 140.

[0184] With the above arrangement, the data signal pin FP3 constituting the floating pin DP is electrically connected to the conductive pattern 140, so that static electricity on the light-emitting substrate 100 can be conducted to the conductive pattern 140 electrically connected to the data signal pin FP3 through the data signal pin FP3, and conducted to the end of the conductive pattern 140 away from the first driving chip 121 through the conductive pattern 140, thereby avoiding the accumulation of static electricity on the light-emitting substrate 100 at the first driving chip 121, reducing the damage of static electricity to the first driving chip 121, improving the ESD performance of the light-emitting substrate 100, and improving the product reliability and reliability of the light-emitting substrate 100.

[0185] In some embodiments, as shown in FIG. 7, the light-emitting substrate 100 further includes a plurality of data signal lines VL3 between the substrate 110 and the plurality of driving chips 120; the data signal pin FP3 is electrically connected to the data signal line VL3; and the conductive pattern 140 is not connected to the data signal line VL3.

[0186] It can be understood that the data signal line VL described herein is equivalent to the data signal line included in the signal line 150 in some embodiments described above.

[0187] For example, the plurality of data signal lines VL3 extend along the first direction X and are arranged at intervals along the second direction Y.

[0188] For example, the data signal line VL3 is electrically connected to the data signal pin FP3 of the driving chip 120 at one end, and is electrically connected to the bonding pin in the bonding area B at the other end.

[0189] For example, one end of the data signal line VL3 is electrically connected to the data signal pin FP3 of the driving chip 120, and the other end of the data signal line VL3 is electrically connected to the bonding pin in the bonding area B. As described above, the driving chip 120 is electrically connected to the light emitting device group 130, so that the data signal line VL3 can be electrically connected to the light emitting device group 130 through the driving chip 120.

[0190] For example, the orthographic projection of the conductive pattern 140 on the substrate 110 does not overlap with the orthographic projection of the data signal line VL3 on the substrate 110. That is, there is a gap between the conductive pattern 140 and the data signal line VL3.

[0191] With the above arrangement, the static electricity in the light emitting substrate 100 can be prevented from being conducted to the end of the conductive pattern 140 away from the driving chip 120, which can interfere with or affect the voltage signal transmitted by the data signal line VL3.

[0192] In some embodiments, the conductive pattern 140 and the data signal line VL3 are made of the same material and arranged in the same layer.

[0193] For example, the material of the plurality of conductive patterns 140 and the material of the data signal line VL3 can both be metal materials, such as copper.

[0194] With the above arrangement, the plurality of conductive patterns 140 and the plurality of data signal lines VL3 are arranged in the same layer, so that the plurality of conductive patterns 140 and the plurality of data signal lines VL3 can be formed by one patterning process using the same mask plate, which can reduce the steps of patterning the conductive layer, thereby simplifying the preparation process of the light emitting substrate 100, reducing the number of mask plates, and thus simplifying the preparation process of the light emitting substrate, reducing the cost of the light emitting substrate 100, and also reducing the risk of short circuit and other defects of the light emitting substrate 100, and improving the yield of the light emitting substrate 100.

[0195] In some embodiments, the minimum distance between the conductive pattern 140 and the data signal line VL3 is greater than or equal to 200 μm. For example, the minimum distance between the conductive pattern 140 and the data signal line VL3 can be 200 μm, 210 μm, 220 μm, 230 μm, or 240 μm, and the like, and the embodiments of the present disclosure do not limit this.

[0196] With the above arrangement, the distance between the conductive pattern 140 connected by the floating pin DP and the adjacent data signal line can be avoided to be too small, thereby avoiding the static electricity in the light-emitting substrate 100 from being conducted to the end of the conductive pattern 140 away from the first driving chip 121 through the conductive pattern 140, which can cause interference or influence on the data signal transmitted by the adjacent data signal line VL3, thereby improving the yield of the light-emitting substrate 100.

[0197] In some examples, the length of the conductive pattern 140 can range from 0.5 mm to 7 mm. For example, the length of the conductive pattern 140 can be 0.5 mm, 1.5 mm, 3 mm, 5.0 mm, or 7 mm, and the like, which is not limited in the embodiments of the present disclosure.

[0198] It should be noted that the length of the conductive pattern 140 refers to the distance between the first end and the second end of the conductive pattern 140. The first end of the conductive pattern 140 is electrically connected to the first driving chip 121, and the second end of the conductive pattern 140 is the other end opposite to the first end in the extension direction of the conductive pattern 140. For example, as shown in FIG. 9, the length of the conductive pattern 140 is L.

[0199] In the case where the length L of the conductive pattern 140 ranges from 0.5 mm to 7 mm, the damage of the static electricity to the first driving chip 121 can be effectively reduced, the ESD resistance of the light-emitting substrate 100 is improved, and the product reliability and the reliability of the light-emitting substrate 100 are improved.

[0200] In some embodiments, the end of the conductive pattern 140 away from the first driving chip 121 is arranged in a circular arc shape or a chamfered shape.

[0201] It can be understood that when the end of the conductive pattern 140 away from the first driving chip 121 is in a circular arc shape or a chamfered shape, the probability of sharp discharge can be reduced by the chamfered or chamfered arc transition.

[0202] In some embodiments, the shape of the conductive pattern 140 on the substrate 110 is a strip shape, a rectangular shape, a circular shape, or an elliptical shape. It can be understood that the shape of the conductive pattern 140 on the substrate 110 can also be other irregular shapes, which are not limited in the embodiments of the present disclosure. For example, as shown in FIG. 8, the shape of the conductive pattern 140 on the substrate 110 is a rectangular shape.

[0203] With the above arrangement, the preparation process of the light-emitting substrate 100 can be simplified, and the manufacturing difficulty of the light-emitting substrate 100 is reduced.

[0204] In some embodiments, as shown in FIG. 7, the plurality of driving chips 120 are arranged in multiple columns, and each column of driving chips 120 includes a plurality of driving chips 120; wherein the plurality of driving chips 120 in each column of driving chips 120 are cascaded in sequence.

[0205] For example, the light-emitting substrate 100 further includes a plurality of address signal lines DL between the substrate 110 and the plurality of driving chips 120, and any two adjacent driving chips 120 in each column of driving chips 120 are electrically connected by the address signal lines DL, so as to realize the cascading in sequence of the plurality of driving chips 120 in each column of driving chips 120.

[0206] For example, the driving chip 120 further includes a data receiving pin Dis and a data transmitting pin Dos. One end of the address signal line DL is electrically connected to the data receiving pin Dis of one of the two adjacent driving chips 120, and the other end of the address signal line DL is electrically connected to the data transmitting pin Dos of the other of the two adjacent driving chips 120.

[0207] Specifically, the cascading in sequence of the plurality of driving chips 120 in each column of driving chips 120 can be as follows: in the direction away from the binding area B along the functional area F, the data receiving pin Dis of the first-level driving chip 120 is electrically connected to the binding pin located in the binding area B, and the data receiving pin Dis of any driving chip 120 except the first-level driving chip 120 is electrically connected to the data transmitting pin Dos of the previous driving chip 120 of the driving chip 120 through the address signal line DL; and the data transmitting pin Dos of the last-level driving chip 120 is electrically connected to one address signal line DL. In this way, the signal output by the printed circuit board can be transmitted to the plurality of driving chips 120 through the address signal line DL.

[0208] For example, the two power voltage signal pins FP2 of the first driving chip 121 and the second driving chip 122 both include a power voltage signal input pin and a power voltage signal output pin. In a column of cascaded driving chips 120, the power voltage signal input pin of the first-level driving chip 120 is electrically connected to the binding pin located in the binding area B, and the power voltage signal input pin of any driving chip 120 except the first-level driving chip 120 is electrically connected to the power voltage signal output pin of the previous driving chip 120 of the driving chip 120 through the second voltage signal line VL2. At this time, the power voltage signal output pin of the last-level driving chip 120 constitutes a floating pin DP.

[0209] Exemplarily, the two data signal pins FP3 of the first driving chip 121 and the second driving chip 122 each include a data signal input pin and a data signal output pin. In a column of driving chips 120 connected in sequence, the data signal input pin of the first-stage driving chip 120 is electrically connected with a bonding pin located in the bonding area B, and the data signal input pin of any driving chip 120 other than the first-stage driving chip 120 is electrically connected with the data signal output pin of the previous-stage driving chip 120 of the driving chip 120 through a data signal line VL3. At this time, the data signal output pin of the last-stage driving chip 120 constitutes a floating pin DP.

[0210] Exemplarily, the light-emitting substrate 100 further includes an output line FB, and the data transmission pin Dos of the last-stage driving chip 120 in each column of driving chips 120 is electrically connected with the output line FB, which extends from the functional area F to the bonding area B and is electrically connected with a printed circuit board outside the light-emitting substrate 100. In this way, the signal output by the printed circuit board can be transmitted to the plurality of driving chips 120 through the address signal line DL and then fed back to the printed circuit board through the output line FB, so as to realize the driving of the plurality of driving chips 120.

[0211] Exemplarily, the light-emitting substrate 100 provided by some embodiments of the present disclosure can be manufactured by the following method.

[0212] S1: providing a substrate 110.

[0213] The material of the substrate 110 can refer to the description in some embodiments described above, which will not be repeated here.

[0214] S2: forming a buffer layer on the substrate 110.

[0215] Exemplarily, the buffer layer can be formed by chemical vapor deposition (CVD) or physical vapor deposition (PVD).

[0216] S3: forming a conductive layer on the buffer layer.

[0217] Exemplarily, the preparation method of the conductive layer is, for example, as follows: first, a conductive film layer is formed by an electroplating process or a sputtering process, wherein the conductive film layer is made of a metal material with good conductivity, such as copper. Then, the conductive film layer is etched by a photolithography process, so as to manufacture a conductive part on the conductive film layer.

[0218] The conductive part refers to the first voltage signal line VL1, the second voltage signal line VL2, the data signal line VL3, the address signal line DL, the conductive pattern 140, or the connection line 160, and the like mentioned in some embodiments of the present disclosure.

[0219] It should be noted that the above-mentioned electroplating process, sputtering process, and photolithography process are only examples of processes used in the preparation method and are not limited to the processes in the actual manufacturing process.

[0220] In some examples, the conductive layer includes two layers.

[0221] For example, the conductive layer can be formed by sputtering to form a laminated material such as MoNb (molybdenum-niobium alloy) / Cu / MoNb (molybdenum-niobium alloy). The bottom layer MoNb can be used to improve adhesion, the middle layer Cu is used to transmit electrical signals, and the top layer MoNb is used to prevent oxidation. The conductive layer can also be formed by electroplating to form a seed layer MoNiTi (molybdenum-titanium-nickel alloy) to improve the grain nucleation density, and then an oxidation-resistant layer MoNiTi is formed after electroplating.

[0222] S4: Forming a passivation layer (i.e., the insulating layer mentioned in some embodiments of the present disclosure) on the conductive layer.

[0223] The passivation layer is used to isolate the conductive layer from water and oxygen.

[0224] It can be understood that the passivation layer has a plurality of openings, which at least expose a part of the first voltage signal line VL1, the second voltage signal line VL2, the data signal line VL3, the address signal line DL, or the connection line 160. Thus, the driving chip 120 in some embodiments of the present disclosure can achieve electrical connection with the second voltage signal line VL2, the data signal line VL3, or the address signal line DL at the opening; or the driving chip 120 can achieve electrical connection with the light-emitting device group 130 through the connection line 160 at the opening; or the light-emitting device group 130 can achieve electrical connection with the first voltage signal line VL1 at the opening.

[0225] The above is only a specific embodiment of the present disclosure, but the protection scope of the present disclosure is not limited thereto, and any person skilled in the art can think of changes or replacements within the technical scope disclosed in the present disclosure. Therefore, the protection scope of the present disclosure should be subject to the protection scope of the claims.

Claims

1. A light emitting substrate having function areas and a binding area arranged at intervals along a first direction, the light emitting substrate comprising: a substrate; a plurality of driving chips on the substrate, the plurality of driving chips comprising a plurality of first driving chips and a plurality of second driving chips; in the plurality of first driving chips, at least one first driving chip is closer to the binding area than the plurality of second driving chips, and / or, at least one first driving chip is farther from the binding area than the plurality of second driving chips; the first driving chip comprises at least one floating pin; a plurality of conductive patterns between the substrate and the plurality of driving chips, one conductive pattern being electrically connected with one floating pin.

2. The light-emitting substrate according to claim 1, wherein The light emitting substrate further comprises a plurality of light emitting device groups on the substrate; the first driving chip comprises a plurality of channel pins, one channel pin being configured to be electrically connected with one light emitting device group; in the plurality of channel pins of the first driving chip, part of the channel pins constitute the floating pin and are not connected with the light emitting device group.

3. The light-emitting substrate of claim 2, wherein, The number of channel pins comprised by the second driving chip is the same as the number of channel pins comprised by the first driving chip; The number of light emitting device groups connected by the second driving chip is greater than the number of light emitting device groups connected by the first driving chip.

4. The light-emitting substrate according to claim 2 or 3, wherein The number of floating pins comprised by the first driving chip is a plurality, at least two floating pins of the first driving chip being connected with the conductive pattern to constitute an integrated structure.

5. The light-emitting substrate according to any one of claims 2 to 4, wherein The light emitting substrate further comprises a plurality of first voltage signal lines between the substrate and the plurality of driving chips; the light emitting device group is further electrically connected with the first voltage signal line; There is no connection between the conductive pattern and the first voltage signal line.

6. The light-emitting substrate of claim 5, wherein, The plurality of conductive patterns and the plurality of first voltage signal lines are of the same material and are arranged in the same layer.

7. The light-emitting substrate according to claim 5 or 6, wherein The minimum distance between the conductive pattern and the first voltage signal line is greater than or equal to 200μm.

8. The light-emitting substrate according to any one of claims 1 to 7, wherein The first driving chip comprises a plurality of power voltage signal pins; the power voltage signal pin is configured to receive a power voltage signal; In the plurality of power voltage signal pins of the first driving chip, part of the power voltage signal pins constitute the floating pin and do not receive the power voltage signal.

9. The light-emitting substrate of claim 8, wherein, The light emitting substrate further comprises a plurality of second voltage signal lines between the substrate and the plurality of driving chips, the power voltage signal pin being electrically connected with the second voltage signal line; There is no connection between the conductive pattern and the second voltage signal line.

10. The light-emitting substrate of claim 9, wherein, The conductive pattern and the plurality of second voltage signal lines are of the same material and are arranged in the same layer.

11. The light-emitting substrate according to claim 9 or 10, wherein The minimum distance between the conductive pattern and the second voltage signal line is greater than or equal to 200μm.

12. The light-emitting substrate according to any one of claims 1 to 11, wherein The first driving chip comprises a plurality of data signal pins; the data signal pin is configured to receive a data signal; In the plurality of data signal pins of the first driving chip, part of the data signal pins constitute the floating pin and do not receive the data signal.

13. The light-emitting substrate of claim 12, wherein, The light emitting substrate further comprises a plurality of data signal lines between the substrate and the plurality of driving chips; the data signal pin is electrically connected with the data signal line; The conductive pattern is not connected with the data signal line.

14. The light-emitting substrate of claim 13, wherein, The conductive pattern is made of the same material as the data signal line and is arranged in the same layer.

15. The light-emitting substrate according to claim 13 or 14, wherein The minimum distance between the conductive pattern and the data signal line is greater than or equal to 200 μm.

16. The light-emitting substrate according to any one of claims 1 to 15, wherein The conductive pattern is arranged in a circular arc shape or a chamfer shape away from one end of the first driving chip.

17. The light-emitting substrate according to any one of claims 1 to 16, wherein The shape of the conductive pattern on the substrate is a strip shape, a rectangular shape, a circular shape, or an elliptical shape.

18. The light-emitting substrate according to any one of claims 1 to 17, wherein The plurality of driving chips are arranged in multiple columns, and each column of driving chips includes a plurality of driving chips. The plurality of driving chips in each column of driving chips are sequentially cascaded.

19. A backlight module comprising: The light-emitting substrate according to any one of claims 1-18; and an optical film located on the light-emitting side of the light-emitting substrate.

20. A display device, comprising: The backlight module according to claim 19; An array substrate located on the light-emitting side of the backlight module; and, A color film substrate located on the side of the array substrate away from the backlight module.

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