Semiconductor processing chamber and semiconductor processing device

Abstract

A semiconductor processing chamber and a semiconductor processing device, relating to the technical field of chip processing, and designed for solving the problems of radio frequency energy loss and interference of reaction chambers in existing semiconductor processing chambers, so that the radio frequency energy loss and interference of the reaction chambers during processes can be reduced. The semiconductor processing chamber comprises: an outer cavity formed by a cavity bottom wall (100) and a cavity shielding cover (450) arranged opposite to each other, at least one reaction chamber located in the outer cavity, and a conductive connecting member (410) respectively corresponding to each reaction chamber; the conductive connecting member (410) is used for electrically connecting a radio frequency power supply (510) located outside the outer cavity; the reaction chamber comprises: an upper electrode (520) and a lower electrode arranged oppositely and spaced apart from each other, and an upper electromagnetic shielding cover (300), wherein the upper electromagnetic shielding cover (300) is located above the upper electrode (520) so as to shield at least part of the surface of the upper electrode (520); the conductive connecting member (410) penetrates through the upper electromagnetic shielding cover (300) to be electrically connected to the upper electrode (520).

Description

Semiconductor processing chambers and semiconductor processing equipment Technical Field

[0001] The present disclosure relates to, but is not limited to, the field of chip processing technology, and in particular, to a semiconductor processing chamber and semiconductor processing equipment. Background Art

[0002] With the continued increase in computing speed and power demands for microprocessors and memory, and the continuous reduction in critical dimensions (CDs) of components, semiconductor device manufacturing faces increasing challenges. Especially in the "post-Moore's Law" era, nanoscale device structures require thin film deposition with precise control at the atomic layer level. Plasma-enhanced atomic layer deposition (PEALD) has become a key technology in the manufacturing strategy for next-generation novel devices. Compared to physical vapor deposition (PVD) and plasma-enhanced chemical vapor deposition (PECVD), PEALD-deposited films exhibit excellent conformality, precise thickness control, and superior filling capabilities for high-aspect-ratio pattern structures. Furthermore, PEALD's lower process temperature facilitates process integration. However, the low throughput resulting from PEALD's slow reaction rate limits its application in mass production within the integrated circuit industry. For this purpose, batch-type, twin-chamber, and quadruple-chamber PEALD multi-wafer chambers and corresponding processes have emerged and are already being used to prepare oxide films such as SiO2 and other thin films. In these processes, multiple wafers are placed in the chamber simultaneously, and the deposition process is completed in one go. Compared with single-chamber, single-wafer processes, batch-type, twin-chamber, and quadruple-chamber PEALD multi-wafer chambers significantly increase production capacity. In the current environment of tight global chip production capacity, multi-wafer chamber structures are bound to have an increasing market share.

[0003] Improvements in chip performance are placing increasing demands on the quality of deposited thin films (including intra-wafer uniformity, inter-wafer uniformity, stress, and step coverage). The development of multi-wafer chamber structures should be based on ensuring stable product quality. Due to cost and volume considerations, PEALD multi-wafer chamber equipment requires the sharing of many metal components and gas flow systems between chambers. Furthermore, the RF and gas delivery systems are located in close proximity, making RF energy loss and crosstalk more likely to occur during the process. This results in poor consistency and matching between process results between chambers, impacting the film deposition quality of products within the same batch.

[0004] Summary of the Invention

[0005] The first object of the present disclosure is to provide a semiconductor processing chamber, which can improve the stability of the radio frequency energy in the process reaction area inside the chamber and the matching of the radio frequency energy between chambers, thereby improving the consistency and stability of the process results between chambers.

[0006] The present disclosure provides a semiconductor processing chamber comprising:

[0007] An outer cavity formed by an oppositely disposed cavity bottom wall and a cavity shield, at least one reaction chamber located within the outer cavity, and conductive connectors corresponding to each reaction chamber, the conductive connectors being used to electrically connect to a radio frequency power source located outside the outer cavity; the reaction chamber comprising:

[0008] An upper electrode and a lower electrode and an upper electromagnetic shielding cover are arranged opposite to each other and spaced apart, wherein the upper electromagnetic shielding cover is located above the upper electrode to shield at least a portion of the surface of the upper electrode;

[0009] The conductive connecting member passes through the upper electromagnetic shielding cover and is electrically connected to the upper electrode.

[0010] The semiconductor processing chamber provided by the present disclosure has the following beneficial effects:

[0011] By setting up an upper electromagnetic shielding cover to shield the conductive objects below it, the electric field interference generated by the metal backplate, heating plate, metal strip and pipeline heating belt between the reaction chambers during the process is reduced, the stability of the RF energy in the process reaction zone inside the chamber and the matching of the RF energy between chambers are improved, and the consistency and stability of the process results between chambers are improved.

[0012] In some embodiments, an electromagnetic shielding tube is further provided in the outer cavity; one end of the electromagnetic shielding tube contacts the upper electromagnetic shielding cover, and the other end of the electromagnetic shielding tube contacts the cavity shielding cover;

[0013] The electromagnetic shielding tube is arranged around the conductive connecting member.

[0014] In some embodiments, a tube opening of the electromagnetic shielding tube facing one end of the upper electromagnetic shielding cover covers an upper end opening of a first through hole of the upper electromagnetic shielding cover through which the conductive connector passes.

[0015] In some embodiments, the semiconductor processing chamber further includes a lower electromagnetic shielding cover disposed opposite to the upper electromagnetic shielding cover, and the lower electromagnetic shielding cover and the upper electromagnetic shielding cover form a shielding space for accommodating the upper electrode and the lower electrode.

[0016] In some embodiments, the upper electromagnetic shielding cover includes: an annular cover side wall and a cover top plate fixedly arranged with the cover side wall; the cover top plate is provided with a first through hole for the conductive connecting member to pass through.

[0017] In some embodiments, the top panel includes a plurality of sub-panels that are spliced ​​together, and adjacent sub-panels overlap at the splicing points.

[0018] In some embodiments, one of the sub-board bodies is provided with the first through hole.

[0019] In some embodiments, the joints of adjacent sub-plates are provided with ridges, and the orthographic projections of the ridges of adjacent sub-plates on the horizontal plane overlap and overlap each other; or,

[0020] Among the splicing parts of the adjacent sub-board bodies, one is provided with a first slot, and the other is provided with a first protrusion for matching and plugging with the first slot.

[0021] In some embodiments, the cover top plate is connected to the cover side wall by fasteners; or,

[0022] The cover top plate and the cover side wall are plugged together along the height direction of the cover side wall.

[0023] In some embodiments, the cover sidewall includes at least two sub-sidewalls, each of the sub-sidewalls is spliced ​​in sequence in the circumferential direction of the cover sidewall, and adjacent sub-sidewalls overlap at the splicing points.

[0024] In some embodiments, the outer cavity is further provided with:

[0025] an air mixing block located on a side of the upper electrode facing the upper electromagnetic shield, and an air intake pipeline connected to the air mixing block;

[0026] The air inlet pipeline is used to sequentially supply reaction gas to between the upper electrode and the lower electrode through the gas mixing block and the upper electrode;

[0027] The air mixing block is located below the upper electromagnetic shielding cover, and the upper electromagnetic shielding cover is provided with a second through hole for the air intake pipeline to pass through in an area corresponding to the air mixing block.

[0028] In some embodiments, a groove is provided on a side of the upper electromagnetic shield facing the upper electrode;

[0029] The second through hole is located at the bottom of the groove, and the gas mixing block is partially embedded in the groove.

[0030] In some embodiments, a region of the upper electromagnetic shielding cover facing the cavity shielding cover and corresponding to the groove has a protrusion, and the second through hole passes through the protrusion.

[0031] The second object of the present disclosure is to provide a semiconductor processing equipment, which can improve the stability of the radio frequency energy in the process reaction zone inside the chamber and the matching of the radio frequency energy between chambers, thereby improving the consistency and stability of the process results between chambers.

[0032] The semiconductor processing equipment provided by the present disclosure includes at least one RF power supply and at least one RF matching circuit arranged in a one-to-one correspondence, and any of the above-mentioned semiconductor processing chambers; the RF power supply is electrically connected to the conductive connecting member in the semiconductor processing chamber through the RF matching circuit.

[0033] By arranging the above-mentioned semiconductor processing chamber in the semiconductor processing equipment, the semiconductor processing equipment accordingly has all the advantages of the above-mentioned semiconductor processing chamber, which will not be described in detail here. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] In order to more clearly illustrate the technical solutions in the embodiments or background technologies of the present disclosure, the following briefly introduces the drawings required for use in the description of the embodiments or background technologies. Obviously, the drawings described below are merely embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without any creative work.

[0035] FIG1 is a schematic structural diagram of a semiconductor processing chamber provided in a first embodiment of the present disclosure;

[0036] FIG2 is a schematic structural diagram of an upper electromagnetic shielding cover in a semiconductor processing chamber provided in a first embodiment of the present disclosure;

[0037] FIG3 is a disassembled perspective view of an upper electromagnetic shield in a semiconductor processing chamber provided in the first embodiment of the present disclosure;

[0038] FIG4a is a partial structural diagram of an implementation method for connecting adjacent sub-boards in a semiconductor processing chamber provided by the first embodiment of the present disclosure;

[0039] FIG4 b is a partial structural diagram of another implementation method for connecting adjacent sub-boards in a semiconductor processing chamber provided by the first embodiment of the present disclosure;

[0040] FIG5a is a partial structural diagram of an implementation method of connecting an upper electromagnetic shielding cover and a gas mixing block in a semiconductor processing chamber provided by the first embodiment of the present disclosure;

[0041] FIG5 b is a partial structural diagram of another implementation of the connection between the upper electromagnetic shielding cover and the gas mixing block in the semiconductor processing chamber provided by the first embodiment of the present disclosure;

[0042] FIG6 a is a partial structural diagram of an implementation of a connection between a cover side wall and a cover top plate in a semiconductor processing chamber provided by the first embodiment of the present disclosure;

[0043] FIG6 b is a partial structural diagram of another implementation of the connection between the cover sidewall and the cover top in the semiconductor processing chamber provided by the first embodiment of the present disclosure;

[0044] FIG7 is a schematic diagram of a partial structure of connections between adjacent sub-side walls in a semiconductor processing chamber provided in the first embodiment of the present disclosure;

[0045] FIG8 is a schematic diagram showing a comparison of RF power input to multiple reaction sites in a semiconductor processing chamber provided by the first embodiment of the present disclosure;

[0046] FIG9 is a schematic structural diagram of a semiconductor processing device provided in a second embodiment of the present disclosure. DETAILED DESCRIPTION

[0047] To make the above-mentioned objectives, features and advantages of the present disclosure more clearly understood, the following detailed description of the specific embodiments of the present disclosure is given in conjunction with the accompanying drawings. It should be understood that the specific embodiments described herein are only used to explain the present disclosure and are not intended to limit the present disclosure.

[0048] Example 1:

[0049] FIG1 is a schematic structural diagram of a semiconductor processing chamber provided in accordance with a first embodiment of the present disclosure. As shown in FIG1 , the semiconductor processing chamber provided in accordance with a first embodiment of the present disclosure includes:

[0050] An outer cavity formed by the oppositely disposed cavity bottom wall 100 and cavity shield 450, at least one reaction chamber located within the outer cavity, and conductive connectors 410 corresponding to each reaction chamber, the conductive connectors 410 being used to electrically connect to an RF power supply 510 located outside the outer cavity; the reaction chamber includes:

[0051] An upper electrode 520 and a lower electrode and an upper electromagnetic shielding cover 300 are arranged opposite to each other and spaced apart, wherein the upper electromagnetic shielding cover 300 is located above the upper electrode 520 to shield at least a portion of the surface of the upper electrode 520;

[0052] The conductive connection member 410 passes through the upper electromagnetic shield 300 and is electrically connected to the upper electrode 520 .

[0053] In a specific embodiment, the reaction zone of the reaction chamber is located between the upper electrode 520 and the lower electrode. The lower electrode can be mounted on a metal or ceramic base 480. A metal backing plate 430 and a heating plate 420 are stacked on the side of the upper electrode 520 facing the upper electromagnetic shield 300. The metal backing plate 430 and the upper electrode 520 can be tightly fixed with metal so that the metal backing plate 430 and the upper electrode 520 have the same potential.

[0054] The present application sets up an upper electromagnetic shielding cover to shield the conductive objects below it, thereby reducing the electric field interference generated by the metal backplate, heating plate, metal strip and pipeline heating belt between the reaction chambers during the process, improving the stability of the radio frequency energy in the process reaction zone inside the chamber and the matching of the radio frequency energy between chambers, and improving the consistency and stability of the process results between chambers.

[0055] For example, the upper electrode 520 generally has a uniform flow cavity and a uniform flow plate. After the reaction gas enters the uniform flow cavity, it passes through the uniform flow plate and reaches evenly between the lower electrode and the upper electrode 520 .

[0056] As shown in FIG1 , the semiconductor processing chamber further includes a lower electromagnetic shield 200 disposed opposite the upper electromagnetic shield 300. The lower electromagnetic shield 200 and the upper electromagnetic shield 300 form a shielded space for accommodating the upper electrode 520 and the lower electrode. The lower electromagnetic shield 200 can be formed by a chamber bottom wall 100 and a plurality of annular sidewalls located on the chamber bottom wall, each annular sidewall corresponding to a reaction chamber, and the lower electrode is located within the area defined by the annular chamber sidewall. Furthermore, the plurality of annular sidewalls can be integrally formed with the chamber bottom wall. Generally speaking, the lower electromagnetic shield 200 is generally grounded to transfer the charge accumulated thereon.

[0057] In a specific implementation, as shown in Figure 9, a ceramic ring 470 is typically disposed inside the annular sidewall to confine the plasma reaction region. An annular insulator 530 is also disposed above the ceramic ring 470 to isolate adjacent reaction chambers and reduce interference and loss of RF energy during the process.

[0058] Specifically, in this embodiment, the upper electromagnetic shielding cover 300 is made of a conductive material, preferably a material with good conductivity, such as copper or aluminum. The outer dimensions of the bottom of the upper electromagnetic shielding cover 300 are larger than the outer dimensions of the top of the lower electromagnetic shielding cover 200. The upper electromagnetic shielding cover 300 is sufficient to completely cover the lower electromagnetic shielding cover 200, forming a shielded space that is isolated from the outside and accommodates the upper electrode 520 and the lower electrode.

[0059] By setting up the upper electromagnetic shielding cover 300, together with the lower electromagnetic shielding cover 200, a shielding space is formed, which can respectively shield the metal back plate 430 and the heating plate 420 in the reaction chamber of the semiconductor processing chamber to form a closed shielding space, which is isolated from external interference factors, and reduces the electric field interference generated by the upper electrode 520, lower electrode, metal back plate 430, heating plate 420, conductive connector 410 and pipeline heating belt of the reaction chamber during the process. It can also reduce the external electric field interference in the reaction chamber, improve the stability of the radio frequency energy in the process reaction zone inside the chamber and the matching of the radio frequency energy between chambers, and improve the consistency and stability of the chamber process results.

[0060] Figure 2 is a schematic structural diagram of the upper electromagnetic shielding cover in the semiconductor processing chamber provided in the first embodiment of the present disclosure; as shown in Figures 1 and 2, in some embodiments, an electromagnetic shielding tube 330 is also provided in the outer cavity; one end of the electromagnetic shielding tube 330 contacts the upper electromagnetic shielding cover 300, for example, is closely attached to the upper electromagnetic shielding cover 300, and the other end of the electromagnetic shielding tube 330 contacts the cavity shielding cover 450, for example, is closely attached to the cavity shielding cover 450.

[0061] The RF power supply 510 can be directly connected to the RF matching circuit 440, and the RF matching circuit 440 is connected to the metal backplane 430 through the conductive connector 410. Specifically, in this embodiment, the conductive connector 410 can be a bare metal strip. The electromagnetic shielding tube 330 is arranged around the conductive connector 410. Specifically, the electromagnetic shielding tube 330 can extend upward from the top surface of the upper electromagnetic shielding cover 300 to the bottom surface of the cavity shielding cover 450, and the conductive connector 410 does not contact the electromagnetic shielding tube 330 and the upper electromagnetic shielding cover 300 to ensure that the conductive connector 410 is insulated from the electromagnetic shielding tube 330 and the upper electromagnetic shielding cover 300. Thus, the conductive connector 410 between the upper electromagnetic shielding cover 300 and the cavity shielding cover 450 is completely shielded to prevent the current on the conductive connector 410 from leaking to the outside, and to prevent the current on the conductive connector 410 from being interfered with by the RF signals of other reaction positions.

[0062] In a specific implementation, the electromagnetic shielding tube 330 can be made of a conductive material, preferably a material with good conductivity, such as copper or aluminum. For example, the material of the electromagnetic shielding tube 330 can be the same as the material of the upper electromagnetic shielding cover 300.

[0063] As shown in FIG. 1 and FIG. 2 , in some embodiments, the upper electromagnetic shielding cover 300 may include: an annular cover side wall 311 and a cover top plate 321 fixed to the cover side wall 311 ; the cover top plate 321 is provided with a first through hole for the conductive connector 410 to pass through.

[0064] For example, in order to prevent the conductive connector 410 from contacting the cover top plate 321 , an insulating ring may be sleeved in the first through hole so that the insulating ring is located between the conductive connector 410 and the cover top plate 321 , thereby isolating the conductive connector 410 from the cover top plate 321 .

[0065] Specifically, in this embodiment, the cover sidewall 311 can be a complete, continuous circular ring-shaped sidewall, while the cover top plate 321 is in the form of a circular ring. The direction from the through-hole in the middle region of the cover top plate 321 to the side edge of the cover top plate 321 is the radial direction of the cover top plate 321, and the direction perpendicular to the radial direction within the plane of the cover top plate 321 is the circumferential direction. Because the cover top plate 321 is circular, the lateral dimension of the side edge of the cover top plate 321 is the outer diameter of the cover top plate 321, while the lateral outer dimension of the cover sidewall 311 is the diameter of the outer surface of the cover sidewall 311. The lateral dimension of the side edge of the cover top plate 321 can be greater than the lateral outer dimension of the cover sidewall 311. It should be understood by those skilled in the art that the cover sidewall 311 and the cover top plate 321 maintain continuous contact in the circumferential direction to seal the interior of the upper electromagnetic shield 300.

[0066] By setting the cover side wall 311 as an annular side wall, horizontal electric field interference can be prevented from entering the shielding space, and the electric field in the shielding space can be prevented from propagating outward in the horizontal direction to cause interference. By setting the first through hole, a channel for the conductive connector 410 to pass through the upper electromagnetic shielding cover can be retained, which is convenient for powering the devices inside the upper electromagnetic shielding cover 300.

[0067] Of course, in another implementation, the cover top plate 321 can also be a rectangle, a rounded rectangle, or a regular polygon with a through hole in the middle, and is not limited to a circle. Accordingly, the cover side wall 311 is also a complete ring that matches the shape of the cover top plate 321.

[0068] FIG3 is a three-dimensional disassembled view of the upper electromagnetic shielding cover in the semiconductor processing chamber provided by the first embodiment of the present disclosure; as shown in FIG3 , in some embodiments, the cover top plate 321 includes a plurality of sub-plates 322 that are spliced ​​together, and adjacent sub-plates 322 overlap at the splicing points. In specific implementations, this application does not limit the number of sub-plates 322 in the cover top plate 321, and the specific design can be based on actual conditions. In addition to the case of four sub-plates 322 described later, for example, six, eight, or other numbers of sub-plates 322 may also be included.

[0069] Illustratively, in this embodiment, the cover top plate 321 may include four sub-plates 322 of the same shape, that is, each sub-plate 322 is a fan-shaped 1 / 4 ring, and the four sub-plates 322 are spliced ​​into a circular cover top plate 321 with their respective centers coinciding.

[0070] By setting up multiple sub-plates 322, on the one hand, the installation of the cover top plate 321 can be facilitated, and on the other hand, the manufacturing difficulty of the cover top plate 321 can be reduced. Even if part of the sub-plates 322 is damaged, only the damaged sub-plates 322 need to be replaced, and there is no need to replace the entire cover top plate 321, thereby reducing maintenance costs.

[0071] As shown in Figures 2 and 3, in some embodiments, one of the sub-boards 322 is provided with the aforementioned first through-hole to allow the conductive connector 410 to pass through the upper electromagnetic shield, facilitating power supply to the components within the upper electromagnetic shield 300. In one example, a reserved opening can be provided on each sub-board 322. This reserved opening can be a through-hole extending through the thickness of the sub-board 322. During installation, one of the reserved openings on the sub-board 322 serves as the aforementioned first through-hole for the conductive connector 410 to pass through, while the remaining reserved openings can be mounted on the sub-board 322 via a cover plate 323 using male threaded connectors to prevent electric field leakage or interference from external electric fields. Specifically, the reserved openings on all sub-boards 322 can be identical in position, size, and shape, and the size and position of the reserved threaded holes or apertures therein can also be identical. If a sub-board 322 requires the conductive connector 410 to pass through, the electromagnetic shielding tube 330 is installed on that sub-board 322. If the conductive connector 410 does not need to be passed through, the cover 323 is installed on the sub-board body 322 using a male threaded connector to prevent electric field leakage or interference from external electric fields.

[0072] Specifically, in this embodiment, the reserved opening can be circular, rectangular, or rectangular with rounded corners. The bottom of the electromagnetic shielding tube 330 can be a mounting flange plate 331, which can be circular, rectangular, or rectangular with rounded corners. Mounting holes at the four corners of the mounting flange plate 331 allow male threaded connectors to fit into corresponding threaded holes or apertures in the sub-plate 322 to secure the electromagnetic shielding tube 330.

[0073] In some embodiments, the opening of the electromagnetic shielding tube 330 at one end facing the upper electromagnetic shielding cover 300 covers the upper opening of the first through hole of the upper electromagnetic shielding cover 300 for the conductive connector 410 to pass through. This prevents the electric field from leaking from the first through hole or being interfered with by external electric fields.

[0074] By setting a reserved opening on each sub-plate body 322, an electromagnetic shielding tube 330 is installed on part of the reserved opening, the reserved opening is covered by the opening at the bottom of the electromagnetic shielding tube 330, and the remaining reserved openings are covered by the cover plate 323. The sealing conditions of each reserved opening on the cover top plate 321 can be flexibly selected as needed, thereby improving the flexibility of the process.

[0075] Figure 4a is a partial structural schematic diagram of an implementation method of connecting adjacent sub-boards in a semiconductor processing chamber provided by Example 1 of the present disclosure; as shown in Figure 4a, in some embodiments, the splicing parts of adjacent sub-boards 322 are provided with ridges 324, and the ridges 324 of adjacent sub-boards 322 overlap in their orthographic projections on the horizontal plane and overlap with each other; in some examples, the ridges 324 of adjacent sub-boards 322 can be fixedly connected; or, Figure 4b is a partial structural schematic diagram of another implementation method of connecting adjacent sub-boards in a semiconductor processing chamber provided by Example 1 of the present disclosure; as shown in Figure 4b, in other embodiments, in the splicing parts of adjacent sub-boards 322, one of them is provided with a first slot 325, and the other is provided with a first protrusion 326 for matching and plugging with the first slot 325.

[0076] The above connection method is conducive to ensuring the connection rigidity of the sub-plate body 322. Moreover, by adopting the form of circumferential plug-in, an overlap of solid materials can be formed at the junction of the sub-plate body 322 to prevent the leakage of the electric field through the longitudinal gaps on the adjacent sides of the sub-plate body 322 or the influence of the electric field of the remaining reaction chambers.

[0077] Specifically, the splicing portion refers to the side surfaces in the thickness and radial directions of the sub-plate bodies 322. As shown in FIG4a , if adjacent sub-plate bodies 322 are provided with ridges 324, at the splicing portion between the two adjacent sub-plate bodies 322, the ridges 324 of one sub-plate body 322 are higher, while the ridges 324 of the other sub-plate body 322 are lower, thereby allowing the ridges 324 of the two sub-plate bodies 322 to overlap in the thickness direction of the sub-plate bodies 322. Furthermore, one of the ridges 324 of the two sub-plate bodies 322 is provided with a threaded hole or a blank hole, while the other is provided with a threaded hole, so that a male threaded connector can pass through the threaded hole or blank hole of one sub-plate body 322 and be threadedly connected to the threaded hole of the other sub-plate body 322, thereby achieving a fixed connection between the two ridges 324.

[0078] As shown in Figure 4b, by using the combination of the first slot 325 and the first protrusion 326, two radially extending convex strips with a certain distance between them can be set at the splicing part of one of the sub-plate bodies 322, and the area between the two convex strips forms the first slot 325. A radially extending convex strip is set on the other sub-plate body 322 to serve as the first protrusion 326 and be inserted into the first slot 325.

[0079] It should be noted that both the first protrusions 326 and the ridges 324 are distributed throughout the entire radial length of the sub-plate body 322 .

[0080] By providing a rib 324 that cooperates with a male threaded connector, or by employing a method of plugging the first slot 325 into the first protrusion 326, multiple sub-plates 322 can be joined together to form a single cover top plate 321. This provides a high connection strength and helps improve the overall rigidity of the cover top plate 321. Furthermore, because there is material overlap at the joints between adjacent sub-plates 322, this prevents electric fields from leaking from the joints between adjacent sub-plates 322 or being affected by external electric fields.

[0081] As shown in FIG1 , in some embodiments, the outer cavity is further provided with:

[0082] A gas mixing block 460 located on the side of the upper electrode 520 facing the upper electromagnetic shield 300 and an air inlet pipe 490 connected to the gas mixing block;

[0083] The air inlet line 490 is used to sequentially supply reaction gas to between the upper electrode 520 and the lower electrode through the gas mixing block 460 and the upper electrode 520;

[0084] The air mixing block 460 is located below the upper electromagnetic shielding cover 300 . The upper electromagnetic shielding cover 300 is provided with a second through hole for the air intake pipeline to pass through in a region corresponding to the air mixing block 460 .

[0085] In this embodiment, the second through hole can be formed by the radial inner edges of a plurality of sector-annular sub-plate bodies 322 .

[0086] FIG5a is a partial structural diagram of an implementation of a connection between an upper electromagnetic shielding cover and a gas mixing block in a semiconductor processing chamber provided in a first embodiment of the present disclosure. As shown in FIG5a , in some embodiments, a groove is provided on the side of the cover top plate 321 facing the upper electrode 520.

[0087] The second through hole is located at the bottom of the groove, and the gas mixing block 460 is partially embedded in the groove.

[0088] The top plate 321 has an inner flange 327, with the area below the inner flange 327 being a recess. The inner flange 327 is located in the middle of the top plate 321 and can overlap the top surface of the mixing block 460. An intake pipe 490, whose outer diameter is smaller than that of the mixing block 460, is mounted in the middle of the top surface of the mixing block 460. The inner diameter of the inner flange 327 is smaller than that of the mixing block 460 but equal to or greater than the outer diameter of the intake pipe 490.

[0089] Specifically, inner flange 327 can be located in the upper half of the inner circumference of top plate 321. When inner flange 327 overlaps the surface of gas mixing block 460, the top of the side surface of gas mixing block 460 is located below the base of inner flange 327, that is, gas mixing block 460 is partially embedded in the groove. Inner flange 327 can effectively block the gap between the side surface of gas mixing block 460 and top plate 321, thereby preventing electric field leakage or interference from external electric fields. Furthermore, the partial embedment of gas mixing block 460 in the groove can also be used to achieve the positioning of top plate 321.

[0090] Figure 5b is a partial structural schematic diagram of another implementation method of connecting the upper electromagnetic shielding cover and the gas mixing block in the semiconductor processing chamber provided in the first embodiment of the present disclosure; as shown in Figure 5b, in some embodiments, the cover top plate 321 faces the side of the upper electromagnetic shielding cover 300 and the area corresponding to the groove has a protrusion 328, and the second through hole passes through the protrusion 328.

[0091] Specifically, the distance between the outer sidewall of the raised portion 328 and the central axis of the cover top plate 321 is greater than the distance between the base of the inner flange 327 and the central axis of the cover top plate 321. Furthermore, the raised portion 328 and the inner flange 327 can be formed by bending, stretching, or stamping the inner edge of the cover top plate 321 upward. In other words, the thickness of the inner flange 327 can be substantially the same as that of the cover top plate 321.

[0092] By providing the upward protrusion 328 , the rigidity of the inner edge area of ​​the cover top plate 321 can be improved, thereby preventing the cover top plate 321 from being easily warped due to local strength reduction caused by the provision of the inner flange 327 .

[0093] Figure 6a is a partial structural schematic diagram of an implementation method of connecting the cover side wall and the cover top plate in the semiconductor processing chamber provided in Example 1 of the present disclosure; Figure 6b is a partial structural schematic diagram of another implementation method of connecting the cover side wall and the cover top in the semiconductor processing chamber provided in Example 1 of the present disclosure; as shown in Figure 6a, in some embodiments, the cover top plate 321 is connected to the cover side wall 311 through fasteners; or, as shown in Figure 6b, the cover top plate 321 and the cover side wall 311 are plugged in along the height direction of the cover side wall 311.

[0094] The above connection method can realize reliable connection between the cover top plate 321 and the cover side wall 311 when both are of small thickness, which is beneficial to ensure the overall rigidity of the split upper electromagnetic shielding cover 300 composed of the cover top plate 321 and the cover side wall 311.

[0095] As shown in FIG6a , in some embodiments, the cover top plate 321 is connected to the cover side wall 311 via a male threaded connector; alternatively, as shown in FIG6b , the upper end surface of the cover side wall 311 is provided with a plug-in boss 313 , and the lower end surface of the cover top plate 321 is provided with a socket 314 for inserting the plug-in boss 313 .

[0096] Specifically, as shown in FIG6a , a through hole extending through the cover in the thickness direction can be provided near the edge of the cover top plate 321, and a threaded hole extending in the height direction can be provided on the cover side wall 311. The threaded holes and the through holes can be evenly distributed, and the two can be distributed correspondingly. The male threaded connector passes through the through hole and is tightened with the threaded hole to fix the cover top plate 321. Alternatively, as shown in FIG6b , a plug-in boss 313 is provided on the top of the cover side wall 311, and the plug-in boss 313 is inserted into the socket 314 of the cover top wall. Specifically, the plug-in boss 313 can be a plug-in column, and the socket 314 can be a through hole.

[0097] The use of a male threaded connector or a combination of the plug-in boss 313 and the plug hole 314 can improve the convenience of connection and simplify assembly and disassembly.

[0098] In another implementation, the lower end surface of the cover top plate 321 is provided with an inserting boss 313 , and the upper end surface of the cover side wall 311 is provided with an inserting hole 314 for inserting the inserting boss 313 .

[0099] As shown in FIG3 , in some embodiments, the cover sidewall 311 includes at least two sub-sidewalls 312 , and each sub-sidewall 312 is spliced ​​in sequence in the circumferential direction of the cover sidewall 311 , that is, connected end to end in sequence to form a complete ring, and adjacent sub-sidewalls 312 overlap at the splicing point.

[0100] Specifically, in this embodiment, there are two cover side walls 311 , and the two cover side walls 311 have the same size and structure, that is, the central angle corresponding to each cover side wall 311 is 180°.

[0101] The solution of splicing a plurality of sub-side walls 312 to form the cover side wall 311 is adopted to reduce the space occupied by the cover side wall 311 before installation, and is convenient for carrying and storage.

[0102] Figure 7 is a schematic diagram of the local structure of the connection between adjacent sub-side walls in the semiconductor processing chamber provided in the first embodiment of the present disclosure; as shown in Figure 7, in some embodiments, the connection parts of adjacent sub-side walls 312, one of which is provided with a second slot 315, and the other is provided with a second protrusion 316 adapted to the second slot 315.

[0103] The second slot 315 and the second protrusion 316 are both arranged along the circumference of the sub-sidewall 312, that is, along the arc extension direction of the sub-sidewall 312, to ensure that the outer peripheral surface of the sub-sidewall 312 is a complete arc cylinder. The second slot 315 and the second protrusion 316 are both located in the middle of the height direction of the sub-sidewall 312. In this embodiment, the second protrusion 316 can be set at both ends of one sub-sidewall 312, and the second slot 315 can be set at both ends of the other sub-sidewall 312. In another implementation, each of the two sub-sidewalls 312 has a second slot 315 set at one end and a second protrusion 316 set at one end.

[0104] The cooperation between the second slots 315 and the second protrusions 316 can limit the relative positions of the ends of the adjacent sub-side walls 312 in the height direction, thereby cooperating with the cover top plate 321 to fix the sub-side walls 312 at the top to fix the sub-side walls 312. In summary, the semiconductor processing chamber provided in this embodiment 1 has the following technical effects:

[0105] 1. By setting up an upper electromagnetic shield to shield the conductive objects below it, the electric field interference generated by the metal back plate, heating plate, metal strip and pipeline heating belt between the reaction chambers during the process is reduced. For example, the electromagnetic field crosstalk between the various reaction positions and the air inlet pipe 490 heating belt during process operation is reduced, the stability of the RF energy in the process reaction zone inside the chamber and the matching of the RF energy between chambers are improved, and the consistency and stability of the process results between chambers are improved. 2. The consistency of the RF energy feed and voltage distribution of the motor at each reaction position is ensured, and the stability of process results such as thin film deposition uniformity and thickness and the stability of product quality between the two chambers are improved; 3. The semiconductor structure is simple and easy to disassemble and assemble. It can be accurately positioned and produce a good shielding effect without any improvement to the structure of the chamber, which can effectively reduce the difficulty of operation and reduce manpower and material costs.

[0106] Figure 8 is a schematic diagram comparing the input RF power of multiple reaction positions in the semiconductor processing chamber provided by the first embodiment of the present disclosure; as shown in Figure 8, after the improvement, the input energy of the two reaction positions is compared in a process where the actual output power of the RF power supply is 160W. The triangle icon is RC1 with an input power of 154W, and the X-shaped icon is RC2 with an input power of 153W. The difference between the two is only 1W. It can be clearly seen that after the electromagnetic shielding cover 300 is installed, the mutual interference of the electric fields between the devices is effectively reduced, and the matching of the RF power of the two reaction positions is improved.

[0107] Example 2:

[0108] Figure 9 is a structural schematic diagram of the semiconductor processing equipment provided in Example 2 of the present disclosure. As shown in Figure 9, the semiconductor processing equipment provided in Example 2 of the present disclosure includes at least one RF power supply 510 and at least one RF matching circuit 440 arranged in a one-to-one correspondence, and the semiconductor processing chamber of Example 1; the RF power supply 510 is electrically connected to the corresponding conductive connector 410 in the semiconductor processing chamber through the corresponding RF matching circuit 440.

[0109] Specifically, the semiconductor processing equipment also includes a base 480, an annular flow grid (not shown in the figure) and the semiconductor processing chamber of the above-mentioned embodiment one, wherein the base 480 is used to support the wafer, wherein the flow grid can be set in the annular insulating part 530, and the flow grid has an air inlet facing the inside of the reaction chamber, and the gas in the reaction chamber can be pumped away by the vacuum pump through the pump port 540 through the flow grid.

[0110] By arranging the above-mentioned semiconductor processing chamber in the semiconductor processing equipment, the semiconductor processing equipment accordingly has all the advantages of the above-mentioned semiconductor processing chamber, which will not be described in detail here.

[0111] Although the present disclosure is disclosed as above, the present disclosure is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present disclosure. Therefore, the scope of protection of the present disclosure should be based on the scope defined by the claims.

[0112] Finally, it should be noted that, in this document, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "comprises" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article, or device that includes a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or device. In the absence of further limitations, an element defined by the phrase "comprises a ..." does not exclude the presence of other identical elements in the process, method, article, or device that includes the element.

[0113] In the above embodiments, the descriptions of directions such as “upper” and “lower” are all based on the drawings.

[0114] The above description of the disclosed embodiments is intended to enable those skilled in the art to implement or use the present disclosure. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present disclosure.

[0115] Thus, the present disclosure will not be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A semiconductor processing chamber, wherein: include: An outer cavity formed by a cavity bottom wall and a cavity shielding cover arranged oppositely, at least one reaction chamber located in the outer cavity, and conductive connectors corresponding to each of the reaction chambers, the conductive connectors being used to electrically connect to a radio frequency power source; the reaction chamber comprises: An upper electrode and a lower electrode and an upper electromagnetic shielding cover are arranged opposite to each other and spaced apart, wherein the upper electromagnetic shielding cover is located above the upper electrode to shield at least a portion of the surface of the upper electrode; The conductive connecting member passes through the upper electromagnetic shielding cover and is electrically connected to the upper electrode.

2. The semiconductor processing chamber according to claim 1, wherein: An electromagnetic shielding tube is also provided in the outer cavity; one end of the electromagnetic shielding tube contacts the upper electromagnetic shielding cover, and the other end of the electromagnetic shielding tube contacts the cavity shielding cover; The electromagnetic shielding tube is arranged around the conductive connecting member.

3. The semiconductor processing chamber according to claim 2, wherein: The tube opening of the electromagnetic shielding tube facing one end of the upper electromagnetic shielding cover covers the upper end opening of the first through hole of the upper electromagnetic shielding cover for the conductive connecting member to pass through.

4. The semiconductor processing chamber according to claim 1, wherein: The semiconductor processing chamber further comprises a lower electromagnetic shielding cover arranged opposite to the upper electromagnetic shielding cover, and the lower electromagnetic shielding cover and the upper electromagnetic shielding cover form a shielding space for accommodating an upper electrode and a lower electrode.

5. The semiconductor processing chamber according to any one of claims 1 to 4, wherein: The upper electromagnetic shielding cover comprises: an annular cover side wall and a cover top plate fixedly arranged with the cover side wall; the cover top plate is provided with a first through hole for the conductive connecting member to pass through.

6. The semiconductor processing chamber according to claim 5, wherein: The cover top plate includes a plurality of sub-plate bodies which are spliced ​​together, and adjacent sub-plate bodies overlap at the splicing positions.

7. The semiconductor processing chamber according to claim 6, wherein: One of the sub-board bodies is provided with the first through hole.

8. The semiconductor processing chamber according to claim 6, wherein: The joint parts of the adjacent sub-plate bodies are all provided with ridges, and the orthographic projections of the ridges of the adjacent sub-plate bodies on the horizontal plane overlap and overlap each other; or, Among the splicing parts of the adjacent sub-board bodies, one is provided with a first slot, and the other is provided with a first protrusion for matching and plugging with the first slot.

9. The semiconductor processing chamber according to claim 5, wherein: The cover top plate is connected to the cover side wall by fasteners; or, The cover top plate is plugged into the cover side wall along the height direction of the cover side wall.

10. The semiconductor processing chamber of claim 5, wherein: The cover side wall includes at least two sub-side walls, each of which is spliced ​​in sequence in the circumferential direction of the cover side wall, and adjacent sub-side walls overlap at the splicing position.

11. The semiconductor processing chamber according to any one of claims 1 to 4, wherein: The outer cavity is also provided with: A gas mixing block located on a side of the upper electrode facing the upper electromagnetic shielding cover and an air intake pipeline connected to the gas mixing block; The air intake pipeline is used to sequentially supply reaction gas to between the upper electrode and the lower electrode through the gas mixing block and the upper electrode; The gas mixing block is located below the upper electromagnetic shielding cover. A second through hole for the air intake pipeline to pass through is provided in the area corresponding to the air block.

12. The semiconductor processing chamber of claim 11, wherein: The upper electromagnetic shielding cover is provided with a groove on one side facing the upper electrode; The second through hole is located at the bottom of the groove, and the gas mixing block is partially embedded in the groove.

13. The semiconductor processing chamber of claim 12, wherein: The upper electromagnetic shielding cover has a protruding portion in an area facing the cavity shielding cover and corresponding to the groove, and the second through hole passes through the protruding portion.

14. A semiconductor processing device, wherein: The semiconductor processing equipment includes at least one RF power supply and at least one RF matching circuit arranged in a one-to-one correspondence, and a semiconductor processing chamber according to any one of claims 1 to 13; the RF power supply is electrically connected to the corresponding conductive connecting member in the semiconductor processing chamber through the corresponding RF matching circuit.

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