Switch circuit, switch application system, communication device, and switch application method

Abstract

Embodiments of the present application relate to the technical field of communications, and disclose a switch circuit, a switch application system, a communication device and a switch application method, for use in reducing the power consumption of switch circuits. The switch circuit comprises a first sub-switch circuit and a second sub-switch circuit which are connected in parallel; the first sub-switch circuit comprises at least one first depletion-mode transistor connected in series, and the second sub-switch circuit comprises at least one first enhancement-mode transistor connected in series; the switch circuit comprises a first end, the first sub-switch circuit comprises a second end and a third end, and the second sub-switch circuit comprises a fourth end and a fifth end; the first end is electrically connected to the second end, and the first end is electrically connected to the fourth end; when the switch circuit is powered off, the second end and the third end are closed, and the fourth end and the fifth end are opened.

Description

A switching circuit, a switching application system, a communication device, and a switching application method

[0001] This application claims priority to the Chinese patent application filed with the State Intellectual Property Office on May 23, 2023, with application number 202310595183.5 and invention name “A switching circuit, a switching application system, a communication device and a switching application method”, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present application relates to the field of communication technology, and in particular to a switch circuit, a switch application system, a communication device, and a switch application method. Background Art

[0003] In wireless communication networks, a considerable amount of energy of communication devices is wasted in idle listening when receiving signals. To address this issue, existing technologies use Low Power Wake Up Radio (LP-WUR) technology to reduce energy waste during device listening.

[0004] The core idea of ​​LP-WUR is that wireless communication devices (such as Bluetooth headsets, mobile phones, etc.) include a wake-up radio WUR module in addition to the main communication module (such as wireless fidelity (Wi-Fi) module, Bluetooth (BT) module). When the main communication module is in the off state to save power consumption, the WUR module always works in the receiving state of wireless signals. When other communication devices need to communicate with wireless communication devices with WUR modules and main communication modules, other communication devices can send wake-up frames to the WUR module. After the WUR module determines that the wake-up sequence contained in the wake-up frame is correct, it can wake up the main communication module. After the main communication module is awakened, the normal transmission and reception of wireless signals are performed.

[0005] The WUR module and the main communication module can time-share the same antenna. The antenna is connected to the WUR module and the main communication module via a single-pole double-throw switch. When the WUR module is in operation, it controls the path connecting the antenna and the WUR module in the single-pole multi-throw switch to connect, so that the WUR module receives wake-up frames through the antenna. When the main communication module is in operation, it controls the path connecting the antenna and the main communication module in the single-pole multi-throw switch to connect, so that the main communication module can transmit and receive wireless signals through the antenna.

[0006] The existing technology requires continuous power supply to the SPMT switch during the WUR monitoring process to control the connection between the WUR and the antenna, thereby enabling the WUR to monitor signals through the antenna. However, continuous power supply to the SPMT switch results in high power consumption.

[0007] Summary of the Invention

[0008] Embodiments of the present application provide a switch circuit, a switch application system, a communication device, and a switch application method for reducing the power consumption of the switch circuit.

[0009] To achieve the above objectives, the embodiments of the present application adopt the following technical solutions:

[0010] In a first aspect, a switching circuit is provided, which includes a first sub-switch circuit and a second sub-switch circuit connected in parallel, the first sub-switch circuit includes at least one first depletion-mode transistor connected in series, and the second sub-switch circuit includes at least one first enhancement-mode transistor connected in series; the switching circuit includes a first end, the first sub-switch circuit includes a second end and a third end, and the second sub-switch circuit includes a fourth end and a fifth end; the first end is electrically connected to the second end, and the first end is electrically connected to the fourth end.

[0011] Wherein, when the switch circuit is powered off, the second end and the third end are connected, and the fourth end and the fifth end are disconnected.

[0012] It can be understood that the switch circuit includes a first sub-switch circuit and a second sub-switch circuit connected in parallel. Since the first sub-switch circuit includes at least one first depletion-mode transistor connected in series, the first depletion-mode transistor can also be turned on when the power is off. Therefore, it can be seen that when the switch circuit is powered off (including the first sub-switch circuit being powered off), the second end and the third end of the first sub-switch circuit are turned on. Since the first end of the switch circuit is electrically connected to the second end, when the second end and the third end are turned on, the first end and the third end of the switch circuit are also turned on, thereby achieving a conduction path for the switch circuit with zero power consumption, thereby reducing the power consumption of the switch circuit.

[0013] In combination with the first aspect, in one possible implementation, when the voltage of the control terminal of at least one first depletion-mode transistor is a first voltage value, and the voltage of the control terminal of at least one first enhancement-mode transistor is a second voltage value, the second terminal and the third terminal are disconnected, and the fourth terminal and the fifth terminal are connected.

[0014] It is understandable that the first sub-switch circuit may include a plurality of first depletion-mode transistors connected in series. When the voltages of the plurality of first depletion-mode transistors connected in series are all the first voltage value, the plurality of first depletion-mode transistors are all disconnected, and the second end and the third end are disconnected. Since the first end of the switch circuit is electrically connected to the second end, it can be seen that when the second end and the third end are disconnected, the first end and the third end are also disconnected. Since the first end to the third end include a plurality of disconnected first depletion-mode transistors, the possibility of the wireless signal being transmitted from the first end of the switch circuit to the third end is smaller. The plurality of first depletion-mode transistors connected in series can serve as signal isolation for the third end when the first end and the third end of the switch circuit are disconnected.

[0015] In combination with the first aspect, in another possible implementation, the first end of the switch circuit is used to electrically connect to the antenna, the third end is used to electrically connect to the first wake-up receiver WUR, and the fifth end is used to electrically connect to the first communication module.

[0016] It can be understood that the first end of the switch circuit can be electrically connected to the antenna, the third end of the switch circuit can be electrically connected to the first WUR, and the fifth end can be electrically connected to the first communication module. Since the first end is electrically connected to the second end of the first sub-switch circuit and is also electrically connected to the fourth end of the second sub-switch circuit, it can be seen that when the first end is connected to the antenna, the second end and the fourth end are also connected to the antenna. Secondly, since the second end and the third end of the first sub-switch circuit are turned on when the switch circuit is powered off (including the first sub-switch circuit is powered off), it can be seen that when the switch circuit is powered off (including the first sub-switch circuit is powered off), the first WUR can be connected to the antenna through the first sub-switch circuit. Since the second sub-switch circuit includes at least one first enhancement transistor connected in series, the first enhancement transistor is disconnected when the power is off, so it can be seen that when the switch circuit is powered off (including the second sub-switch circuit is powered off), the fourth end and the fifth end of the second sub-switch circuit are disconnected. Since the fourth and fifth ends of the second sub-switch circuit are disconnected when the switch circuit is powered off (including the second sub-switch circuit is powered off), it can be known that the first communication device is disconnected from the antenna when the switch circuit is powered off (including the second sub-switch circuit is powered off).

[0017] In summary, when the switch circuit is powered off (including the first sub-switch circuit and the second sub-switch circuit), the antenna is connected to the first WUR through the switch circuit and disconnected from the first communication module. Furthermore, the first WUR can monitor wireless signals through the antenna, and the first communication module itself is in the off state and does not receive wireless signals. Since the power consumption of the first WUR monitoring wireless signals through the antenna is relatively small, and there is no power consumption when the switch circuit is powered off, the power consumption of the wireless signal monitoring process can be reduced.

[0018] In combination with the first aspect, in another possible implementation, the first end of the switch circuit is used to electrically connect to a television, the second end of the switch circuit is used to electrically connect to an antenna, and the third end of the switch circuit is used to electrically connect to a multimedia player.

[0019] It can be understood that when the switch circuit is powered off, the first and third terminals are conductive, while the first and fifth terminals are disconnected. Therefore, when the switch circuit is powered off, the television is electrically connected to the antenna, while the television is disconnected from the multimedia player. This allows the television to receive signals via the antenna while the switch circuit consumes zero power.

[0020] In conjunction with the first aspect, in another possible implementation, the switch circuit further includes a third sub-switch circuit, connected in parallel with the first sub-switch circuit and the second sub-switch circuit. The third sub-switch circuit includes a sixth terminal and a seventh terminal. The first terminal is electrically connected to the sixth terminal. The third sub-switch circuit includes at least one second depletion-mode transistor connected in series.

[0021] When the switch circuit is powered off, the sixth terminal and the seventh terminal are turned on; when the voltage of the control terminal of at least one second depletion-mode transistor is the first voltage value, the sixth terminal and the seventh terminal are turned off.

[0022] It can be understood that since the first and third sub-switch circuits in the switch circuit are both conductive when powered off, and the second and third terminals are conductive when the first sub-switch circuit is conductive, and the sixth and seventh terminals are conductive when the third sub-switch circuit is conductive, it can be seen that when the switch circuit is powered off, multiple conductive paths (including a path from the second terminal to the third terminal and a path from the sixth terminal to the seventh terminal) can be provided. In other words, the switch circuit can provide multiple conductive paths with zero power consumption. Since the first terminal is electrically connected to the second terminal, when the second and third terminals are conductive, the first and third terminals are also conductive. Since the first terminal is electrically connected to the sixth terminal, when the sixth and seventh terminals are conductive, the first and seventh terminals are also conductive.

[0023] In combination with the first aspect, in another possible implementation, the seventh end is used to electrically connect to the second WUR, and the operating frequency bands of the second WUR and the first WUR are different.

[0024] It is understandable that when the switching circuit is powered off, at least one first depletion-mode transistor and at least one second depletion-mode transistor are both turned on, and at least one first enhancement-mode transistor is turned off. When at least one first depletion-mode transistor and at least one second depletion-mode transistor are both turned on, the first end and the third end are turned on, and the first end and the seventh end are also turned on. In this case, the first WUR and the second WUR are both connected to the same antenna. Furthermore, the first WUR and the second WUR can simultaneously monitor wireless signals, enabling multiple WURs with different operating frequency bands to monitor wireless signals while the switching circuit consumes zero power.

[0025] In conjunction with the first aspect, in another possible implementation, the switch circuit further includes a fourth sub-switch circuit, connected in parallel with the first sub-switch circuit and the second sub-switch circuit. The fourth sub-switch circuit includes an eighth terminal and a ninth terminal. The first terminal is electrically connected to the eighth terminal. The fourth sub-switch circuit includes at least one second enhancement-mode transistor connected in series.

[0026] When the switch circuit is powered off, the eighth terminal and the ninth terminal are disconnected; when the voltage of the control terminal of at least one second enhancement-mode transistor is the second voltage value, the eighth terminal and the ninth terminal are connected.

[0027] It can be understood that, since the first end is electrically connected to the eighth end, when the eighth end and the ninth end are disconnected, the first end and the ninth end are also disconnected, and when the eighth end and the ninth end are connected, the first end and the ninth end are also connected.

[0028] In combination with the first aspect, in another possible implementation, the ninth terminal of the switch circuit is used to connect to the second communication module.

[0029] It is understood that the switch circuit may include, in addition to the second sub-switch circuit composed of enhancement-mode transistors, a fourth sub-switch circuit composed of enhancement-mode transistors. By controlling the power supply of the switch circuit, one path in the second sub-switch circuit and the fourth sub-switch circuit can be connected, thereby enabling the first communication module connected to the second sub-switch circuit to be connected to the antenna, or the second communication module connected to the fourth sub-switch circuit to be connected to the antenna.

[0030] In conjunction with the first aspect, in another possible implementation, the first sub-switch circuit includes a first branch, the first branch including at least one third enhancement-mode transistor connected in series. The first branch includes a tenth terminal and an eleventh terminal, the tenth terminal being electrically connected to the first sub-switch circuit, and the eleventh terminal being grounded. When the switch circuit is powered off, the tenth terminal and the eleventh terminal are disconnected; when the voltage at the control terminal of the at least one third enhancement-mode transistor is a second voltage value, the tenth terminal and the eleventh terminal are connected.

[0031] It is understood that when the voltage at the control terminal of at least one first depletion-mode transistor is a first voltage value, and the voltage at the control terminal of at least one first enhancement-mode transistor and the voltage at the control terminal of at least one third enhancement-mode transistor are both a second voltage value, at least one first depletion-mode transistor is turned off, at least one first enhancement-mode transistor is turned on, and at least one third enhancement-mode transistor is turned on. If at least one first depletion-mode transistor is turned off, the second and third terminals of the first sub-switch circuit (including at least one first depletion-mode transistor connected in series) are disconnected, and the first and third terminals of the switch circuit are also disconnected. If at least one first enhancement-mode transistor is turned on, the fourth and fifth terminals of the second sub-switch circuit (including at least one first enhancement-mode transistor connected in series) are turned on, and the first and fifth terminals of the switch circuit are also turned on. If at least one third enhancement-mode transistor is turned on, the tenth and eleventh terminals of the first branch are also turned on, and the tenth terminal of the first branch is grounded.

[0032] Furthermore, if some wireless signals still leak from the second end to the third end of the first sub-switch circuit when the second and third ends of the first sub-switch circuit are disconnected, since the first sub-switch circuit is connected to the grounded first branch, the leaked wireless signals can be transmitted to the ground through the grounded first branch and will not be transmitted from the second end to the third end of the first sub-switch circuit. In other words, the first branch can enhance signal isolation at the third end of the first sub-switch circuit when the first sub-switch circuit is disconnected.

[0033] In conjunction with the first aspect, in another possible implementation, the second sub-switch circuit includes a second branch, the second branch including at least one third depletion-mode transistor connected in series. The second branch includes a twelfth terminal and a thirteenth terminal, the twelfth terminal being electrically connected to the second sub-switch circuit, and the thirteenth terminal being grounded. When the switch circuit is powered off, the twelfth and thirteenth terminals are conductive; when the voltage at the control terminal of the at least one third depletion-mode transistor is at a first voltage value, the twelfth and thirteenth terminals are disconnected.

[0034] It can be understood that when the switch circuit is powered off, at least one first depletion-mode transistor is turned on, at least one first enhancement-mode transistor is turned off, and at least one third depletion-mode transistor is turned on. If at least one first depletion-mode transistor is turned on, the second and third terminals of the first sub-switch circuit (including at least one first depletion-mode transistor connected in series) are turned on, and the first and second terminals of the switch circuit are also turned on. If at least one first enhancement-mode transistor is turned off, the fourth and fifth terminals of the second sub-switch circuit (including at least one first enhancement-mode transistor connected in series) are turned off, and the first and fifth terminals of the switch circuit are also turned off. If at least one third depletion-mode transistor is turned on, the twelfth and thirteenth terminals of the second branch are also turned on, and the thirteenth terminal is grounded.

[0035] Furthermore, if some wireless signals still leak from the fourth terminal to the fifth terminal of the second sub-switch circuit when the fourth and fifth terminals are disconnected, since the second sub-switch circuit is connected to the grounded second branch, the leaked wireless signals can be transmitted to the ground through the grounded second branch and will not be transmitted from the fourth terminal to the fifth terminal of the second sub-switch circuit. In other words, the second branch can enhance signal isolation at the fifth terminal of the second sub-switch circuit when the second sub-switch circuit is disconnected.

[0036] In a second aspect, a switch application system is provided. The switch application system includes: a first signal transceiver module, a second signal transceiver module, a third signal transceiver module, and a switch circuit. The switch circuit includes a first terminal. The switch circuit includes a first sub-switch circuit and a second sub-switch circuit connected in parallel. The first sub-switch circuit includes at least one first depletion-mode transistor connected in series, and the second sub-switch circuit includes at least one first enhancement-mode transistor connected in series. The first sub-switch circuit includes a second terminal and a third terminal, and the second sub-switch circuit includes a fourth terminal and a fifth terminal. The first terminal is electrically connected to the second terminal, and the first terminal is electrically connected to the fourth terminal. The first terminal is electrically connected to the first signal transceiver module, the third terminal is electrically connected to the second signal transceiver module, and the fifth terminal is electrically connected to the third signal transceiver module.

[0037] The second signal transceiver module is configured to transmit signals to the first signal transceiver module via the switch circuit when the switch circuit is powered off. The third signal transceiver module is configured to transmit signals to the first signal transceiver module via the switch circuit when the at least one first depletion-mode transistor and the at least one first enhancement-mode transistor are powered on.

[0038] When the switch circuit is powered off, the second and third terminals are conductive, and the fourth and fifth terminals are disconnected. When a preset power-on condition is met, the at least one first depletion-mode transistor and the at least one first enhancement-mode transistor are powered on. When the at least one first depletion-mode transistor and the at least one first enhancement-mode transistor are powered on, the fourth and fifth terminals are conductive.

[0039] In conjunction with the second aspect, in one possible implementation, the first signal transceiver module is a television, the second signal transceiver module is an antenna, and the third signal transceiver module is a multimedia player. The preset power-on condition includes a switching operation; the switching operation is used to trigger switching of a signal source of the television.

[0040] A television set is configured to receive a first signal through a switching circuit and an antenna and display first multimedia information based on the first signal when the switching circuit is powered off; receive and, in response to a switching operation, control at least one first depletion-mode transistor and at least one first enhancement-mode transistor to power on, receive a second signal through the switching circuit and a multimedia player, and display second multimedia information based on the second signal.

[0041] In conjunction with the second aspect, in another possible implementation, the first signal transceiver module is an antenna, the second signal transceiver module is a first WUR, and the third signal transceiver module is a first communication module. The preset power-on condition includes the first communication module entering a working mode.

[0042] The first WUR is configured to receive a first wireless signal via the switching circuit and the antenna when the switching circuit is powered off, and, if the first wireless signal is a first wake-up signal, to wake up the first communication module in response to the first wake-up signal, thereby placing the first communication module in an operating mode. The first communication module is configured to control the at least one first depletion-mode transistor and the at least one first enhancement-mode transistor to power on in the operating mode, and to receive a second wireless signal via the switching circuit and the antenna.

[0043] In conjunction with the second aspect, in another possible implementation, the first communication module is electrically connected to the control terminal of at least one first depletion-mode transistor, and the second communication module is electrically connected to the control terminal of at least one first enhancement-mode transistor. The first communication module is specifically configured to, in an operating mode, output a first voltage value to the control terminal of the at least one first depletion-mode transistor, and output a second voltage value to the control terminal of the at least one first enhancement-mode transistor, so as to disconnect the second and third terminals of the first sub-switch circuit and connect the fourth and fifth terminals of the second sub-switch circuit.

[0044] In combination with the second aspect, in another possible implementation, the first communication module is further configured to enter a sleep state when a sleep condition is met; when the first communication module is in the sleep state, at least one first depletion-mode transistor and at least one first enhancement-mode transistor are powered off.

[0045] In conjunction with the second aspect, in another possible implementation, the switch circuit further includes a third sub-switch circuit, connected in parallel with the first and second sub-switch circuits. The third sub-switch circuit includes a sixth terminal and a seventh terminal. The first terminal of the switch circuit is electrically connected to the sixth terminal. The third sub-switch circuit includes at least one second depletion-mode transistor connected in series. When the switch circuit is powered off, the sixth and seventh terminals are conductive.

[0046] In conjunction with the second aspect, in another possible implementation, the switch application system further includes a second WUR, the seventh end being electrically connected to the second WUR; the second WUR and the first WUR having different operating frequency bands. The second WUR is configured to receive a third wireless signal via the switch circuit and the antenna when the switch circuit is powered off; and, if the third wireless signal is a third wake-up signal, wake up the first communication module in response to the third wake-up signal, thereby causing the first communication module to enter an operating mode.

[0047] In conjunction with the second aspect, in another possible implementation, the first communication module is electrically connected to the control terminal of at least one first depletion-mode transistor, the first communication module is electrically connected to the control terminal of at least one first enhancement-mode transistor, and the first communication module is electrically connected to the control terminal of at least one second depletion-mode transistor. The first communication module is specifically configured to, in an operating mode, output a first voltage value to the control terminal of the at least one first depletion-mode transistor and the control terminal of the at least one second depletion-mode transistor, and output a second voltage value to the control terminal of the control terminal of the at least one first enhancement-mode transistor, so as to disconnect the second and third terminals of the first sub-switch circuit, disconnect the sixth and seventh terminals of the third sub-switch circuit, and connect the fourth and fifth terminals of the second sub-switch circuit.

[0048] In conjunction with the second aspect, in another possible implementation, the switch application system further includes a second communication module. The switch circuit further includes a fourth sub-switch circuit. The fourth sub-switch circuit is connected in parallel with the first and second sub-switch circuits. The fourth sub-switch circuit includes an eighth terminal and a ninth terminal. The first terminal of the switch circuit is electrically connected to the eighth terminal. The ninth terminal is electrically connected to the second communication module. The fourth sub-switch circuit includes at least one second enhancement-mode transistor connected in series.

[0049] The first WUR is further configured to, when the first wireless signal is a second wake-up signal, wake up the second communication module in response to the second wake-up signal, so that the second communication module enters an operating mode. The second communication module is configured to, in the operating mode, control the at least one first depletion-mode transistor and the at least one second enhancement-mode transistor to power on, and receive a third wireless signal via the switching circuit and the antenna.

[0050] When the switch circuit is powered off, the eighth terminal and the ninth terminal are disconnected; when the at least one first depletion-mode transistor and the at least one second enhancement-mode transistor are powered on, the eighth terminal and the ninth terminal are connected.

[0051] In conjunction with the second aspect, in another possible implementation, the first sub-switch circuit includes a first branch, the first branch including at least one third enhancement-mode transistor connected in series. The first branch includes a tenth terminal and an eleventh terminal. The tenth terminal is electrically connected to the first sub-switch circuit, and the eleventh terminal is grounded. The first communication module is electrically connected to the control terminal of the at least one third enhancement-mode transistor. The first communication module is further configured to, in an operating mode, output a second voltage value to the control terminal of the at least one third enhancement-mode transistor to cause conduction between the tenth terminal and the eleventh terminal.

[0052] Wherein, when the switch circuit is powered off, the tenth terminal and the eleventh terminal are disconnected.

[0053] In conjunction with the second aspect, in another possible implementation, the second sub-switch circuit includes a second branch, the second branch including at least one third depletion-mode transistor connected in series. The second branch includes a twelfth terminal and a thirteenth terminal. The twelfth terminal is electrically connected to the second sub-switch circuit, and the thirteenth terminal is grounded. The first communication module is electrically connected to the control terminal of the at least one third depletion-mode transistor. The first communication module is further configured to, in an operating mode, output a first voltage value to the control terminal of the at least one third depletion-mode transistor to disconnect the twelfth terminal and the thirteenth terminal. When the switch circuit is powered off, the twelfth terminal and the thirteenth terminal are connected.

[0054] In a third aspect, a communication device is provided, the communication device comprising: a switch application system as described in any one of the second aspects above, and / or a switch circuit as described in any one of the first aspects above.

[0055] In a fourth aspect, a switch application method is provided, which is applied to a switch application system. The switch application system includes a first signal transceiver module, a second signal transceiver module, a third signal transceiver module, and a switch circuit. The switch circuit includes a first terminal. The switch circuit includes a first sub-switch circuit and a second sub-switch circuit connected in parallel. The first sub-switch circuit includes at least one first depletion-mode transistor connected in series, and the second sub-switch circuit includes at least one first enhancement-mode transistor connected in series. The first sub-switch circuit includes a second terminal and a third terminal, and the second sub-switch circuit includes a fourth terminal and a fifth terminal. The first terminal is electrically connected to the second terminal, and the first terminal is electrically connected to the fourth terminal. The first terminal is electrically connected to the first signal transceiver module, the third terminal is electrically connected to the second signal transceiver module, and the fifth terminal is electrically connected to the third signal transceiver module. The method includes: when the switch circuit is powered off, the second signal transceiver module transmits signals to the first signal transceiver module via the switch circuit; when a preset power-on condition is met, the at least one first depletion-mode transistor and the at least one first enhancement-mode transistor are controlled to power on, and the third signal transceiver module transmits signals to the first signal transceiver module via the switch circuit.

[0056] In which, when the switch circuit is powered off, the second and third terminals are turned on, and the fourth and fifth terminals are turned off; when at least one first depletion-mode transistor and at least one first enhancement-mode transistor are powered on, the fourth and fifth terminals are turned on.

[0057] In conjunction with the fourth aspect, in one possible implementation, the first signal transceiver module is an antenna, the second signal transceiver module is a first WUR, and the third signal transceiver module is a first communication module; the preset power-on condition includes the first communication module entering an operating mode. The method includes: when the switching circuit is powered off, the first WUR receives a first wireless signal through the switching circuit and the antenna, and when the first wireless signal is a first wake-up signal, in response to the first wake-up signal, sends a first wake-up instruction to the first communication module; in response to the first wake-up instruction, the first communication module enters an operating mode and controls at least one first depletion-mode transistor and at least one first enhancement-mode transistor to power on, so that the second terminal and the third terminal are disconnected and the fourth terminal and the fifth terminal are connected; the first communication module receives a second wireless signal through the switching circuit and the antenna.

[0058] In combination with the fourth aspect, in another possible implementation, the method further includes: the first communication module enters a sleep state when a sleep condition is met; when the first communication module is in the sleep state, at least one first depletion-type transistor and at least one first enhancement-type transistor are powered off.

[0059] In conjunction with the fourth aspect, in another possible implementation, the first signal transceiver module is a television, the second signal transceiver module is an antenna, and the third signal transceiver module is a multimedia player; the preset power-on condition includes a switching operation; and the switching operation is used to trigger switching of the television's signal source. The method includes: when the switching circuit is powered off, the television receives a first signal via the switching circuit and the antenna and displays first multimedia information based on the first signal; the television receives and responds to the switching operation, controls at least one first depletion-mode transistor and at least one first enhancement-mode transistor to power on, and receives a second signal via the switching circuit and the multimedia player; and the television displays second multimedia information based on the second signal.

[0060] In a fifth aspect, a communication device is provided, which includes a processor, a memory, a communication interface and a communication bus; the processor, the memory and the communication interface communicate with each other through the communication bus; the memory is used to store computer instructions; when the computer instructions are executed on the processor, the processor executes the switch application method as described in any one of the above fourth aspects.

[0061] In a sixth aspect, a computer-readable storage medium is provided, wherein the computer-readable storage medium stores computer instructions; when the computer instructions are executed on a communication device, the communication device executes the switch application method as described in any one of the above-mentioned fourth aspects.

[0062] In a seventh aspect, a computer program product comprising computer instructions is provided. When the computer instructions are executed on a communication device, the communication device executes the switch application method as described in any one of the above-mentioned fourth aspects.

[0063] It should be understood that the technical effects brought about by any design method in the second to seventh aspects can refer to the technical effects brought about by different design methods in the first aspect, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0064] FIG1 is a structural diagram of a communication device provided by a related solution;

[0065] FIG2 is a structural diagram of another communication device provided by a related solution;

[0066] FIG3 is a structural diagram 1 of a switch circuit provided in an embodiment of the present application;

[0067] FIG4 is a cross-sectional structural diagram and a control schematic diagram of a depletion-type NMOS transistor provided in an embodiment of the present application;

[0068] FIG5 is a cross-sectional structural diagram and a control schematic diagram of an enhancement mode NMOS transistor provided in an embodiment of the present application;

[0069] FIG6 is a third structural diagram of a switch circuit provided in an embodiment of the present application;

[0070] FIG7A is a fourth structural diagram of a switch circuit provided in an embodiment of the present application;

[0071] FIG7B is a fifth structural diagram of a switch circuit provided in an embodiment of the present application;

[0072] FIG8A is a sixth structural diagram of a switch circuit provided in an embodiment of the present application;

[0073] FIG8B is a seventh structural diagram of a switch circuit provided in an embodiment of the present application;

[0074] FIG9 is a structural diagram 8 of a switch circuit provided in an embodiment of the present application;

[0075] FIG10A is a ninth structural diagram of a switch circuit provided in an embodiment of the present application;

[0076] FIG10B is a structural diagram 10 of a switch circuit provided in an embodiment of the present application;

[0077] FIG10C is a structural diagram 11 of a switch circuit provided in an embodiment of the present application;

[0078] FIG11A is a structural diagram 1 of a switch application system provided in an embodiment of the present application;

[0079] FIG11B is a second structural diagram of a switch application system provided in an embodiment of the present application;

[0080] FIG12 is a structural diagram of a first communication module provided in an embodiment of the present application;

[0081] FIG13A is a flowchart 1 of a switch application method provided in an embodiment of the present application;

[0082] FIG13B is a second flowchart of a switch application method provided in an embodiment of the present application;

[0083] FIG14 is a second structural diagram of a switch circuit provided in an embodiment of the present application;

[0084] FIG15 is a schematic diagram of the hardware structure of a communication device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0085] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0086] Hereinafter, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of the technical features being referred to. Thus, a feature specified as "first" or "second" may explicitly or implicitly include one or more of the features. Throughout the description of this application, unless otherwise specified, "plurality" means two or more.

[0087] In addition, in the embodiment of the present application, one end X1 of an element X is "electrically connected" to one end Y1 of another element Y, which may refer to a circuit connection in which one end X1 of the element X and one end Y1 of the element Y are in physical contact, for example, a wire connection.

[0088] At present, in order to reduce the power consumption of communication equipment, relevant solutions have proposed LP-WUR technology. The core idea of ​​the LP-WUR technology is that in addition to the main communication module, the communication equipment also adds a WUR module. When the communication device does not need to communicate with other communication devices, the main communication module enters a dormant state, and the WUR module works, and the WUR module is used to monitor wireless signals. Since the power consumption of the WUR module is less than that of the main communication module, the power consumption of the communication device can be reduced by monitoring the signal through the WUR module. If the WUR module monitors the wireless signal sent by other communication devices and determines that the wireless signal is used to trigger the awakening of the main communication module, the WUR module can wake up the main communication module to switch the main communication module from the dormant state to the working mode. The main communication module can send and receive wireless signals in the working mode.

[0089] Exemplarily, as shown in the structural diagram of a communication device provided by the relevant scheme of Figure 1, the communication device 11 includes a WUR module, a main communication module, an antenna 1 and an antenna 2. The main communication module is electrically connected to the antenna 1, the WUR module is electrically connected to the antenna 2, and the WUR module is electrically connected to the main communication module. When the main communication module is in a dormant state, the WUR module monitors the wireless signal through the antenna 2. If the WUR module receives a wake-up sequence through the antenna, and determines that the wake-up sequence is used to trigger the wake-up of the main communication module, the main communication module is awakened. The main communication module is awakened and enters the working mode. In the working mode, the main communication module sends and receives wireless signals through the antenna 2.

[0090] Furthermore, in order to reduce the area overhead of the communication equipment, the relevant solution proposes that the WUR module and the main communication module time-share the same antenna.

[0091] For example, as shown in FIG2 , a related solution provides a structural diagram of a communication device. The communication device 12 includes a WUR module, a main communication module, a single-pole double-throw switch SP2T, and an antenna. A first end of the SP2T is electrically connected to the antenna, a second end of the SP2T is electrically connected to the WUR module, and a second end of the SP2T is electrically connected to the main communication module.

[0092] When the main communication module enters the dormant state, the communication device 12 controls SP2T to power on, so that the first end of SP2T and the second end of SP2T are connected, and the first end of SP2T and the third end of SP2T are disconnected. When the first end of SP2T and the second end of SP2T are connected, and the first end of SP2T and the third end of SP2T are disconnected, the main communication module is disconnected from the antenna, the WUR module is connected to the antenna, and the WUR module can monitor wireless signals through the antenna. Furthermore, if the WUR module wakes up the main communication module and the main communication module enters the working mode, the communication device 12 can control SP2T to power on, so that the first end of SP2T and the second end of SP2T are disconnected, and the first end of SP2T and the third end of SP2T are connected. When the first end of SP2T and the second end of SP2T are disconnected, and the first end of SP2T and the third end of SP2T are connected, the WUR module is disconnected from the antenna, the main communication module is connected to the antenna, and the main communication module can communicate with other communication devices through the antenna.

[0093] It can be seen that when the main communication module is in the dormant state, the communication device 12 controls the SP2T to power on, connecting the first terminal of the SP2T to the second terminal of the SP2T, thereby enabling the WUR module to monitor wireless signals through the antenna. Although the WUR module consumes less power when monitoring wireless signals, the communication device 12 needs to control the SP2T to power on at all times. The power consumption generated by the communication device 12 controlling the SP2T to power on increases the power consumption of the WUR module during the wireless signal monitoring process.

[0094] To address the above-mentioned issues, an embodiment of the present application provides a switching circuit, which includes a first sub-switch circuit and a second sub-switch circuit connected in parallel. The second end of the first sub-switch circuit and the fourth end of the second sub-switch circuit can both be connected to the antenna, the third end of the first sub-switch circuit can be connected to the WUR, and the fifth end of the second sub-switch circuit can be connected to the first communication module. Since the first sub-switch circuit includes at least one first depletion-type transistor connected in series, and the first depletion-type transistor is turned on when the power is off, it can be seen that when the first sub-switch circuit is powered off, the second and third ends of the first sub-switch circuit are turned on, and when the first sub-switch circuit is powered off, the WUR can also be connected to the antenna through the first sub-switch circuit. Since the second sub-switch circuit includes at least one first enhancement-type transistor connected in series, and the first enhancement-type transistor is disconnected when the power is off, it can be seen that when the second sub-switch circuit is powered off, the fourth and fifth ends of the second sub-switch circuit are disconnected, and when the second sub-switch circuit is powered off, the first communication device is also disconnected from the antenna.

[0095] In summary, when the switch circuit is powered off (including the first sub-switch circuit and the second sub-switch circuit), the antenna is connected to the WUR through the switch circuit and disconnected from the first communication module. The WUR can then monitor wireless signals through the antenna, while the first communication module is in a dormant state and does not receive wireless signals. Since the WUR consumes less power when monitoring wireless signals through the antenna, and there is no power consumption when the switch circuit is powered off, the power consumption of the wireless signal monitoring process can be reduced.

[0096] The following describes a switch circuit, a switch application system including the switch circuit, a communication device, and a switch application method applied to the communication device, provided in accordance with an embodiment of the present application, in conjunction with the accompanying drawings.

[0097] Please refer to Figure 3, which shows a switching circuit provided in an embodiment of the present application. As shown in Figure 3, the switching circuit includes a first sub-switch circuit and a second sub-switch circuit connected in parallel, the first sub-switch circuit includes at least one first depletion-mode transistor connected in series, and the second sub-switch circuit includes at least one first enhancement-mode transistor connected in series. The switching circuit includes a first terminal A1, the first sub-switch circuit includes a second terminal B1 and a third terminal A2, and the second sub-switch circuit includes a fourth terminal B2 and a fifth terminal A3. The first terminal A1 is electrically connected to the second terminal B1, and the first terminal A1 is electrically connected to the fourth terminal B2. The second terminal B1 and the third terminal A2 of the first sub-switch circuit are the two ends of at least one first depletion-mode transistor connected in series, and the fourth terminal B2 and the fifth terminal A3 of the second sub-switch circuit are the two ends of at least one first enhancement-mode transistor connected in series.

[0098] When the switch circuit is powered off, the second terminal B1 and the third terminal A2 are conductive, and the second terminal B1 and the fifth terminal A3 are disconnected. When the switch circuit is powered on, the second terminal B1 and the third terminal A2 are disconnected, and the second terminal B1 and the fifth terminal A3 are conductive. Powering on the switch circuit may include powering on at least one first depletion-mode transistor and at least one first enhancement-mode transistor.

[0099] It should be noted that the first terminal A1 of the switch circuit is electrically connected to the second terminal B1, and the first terminal A1 is also electrically connected to the fourth terminal B2. Therefore, the first terminal A1 can be referred to as the common node (pole) of the second terminal B1 and the fourth terminal B2. The third terminal A2 of the first sub-switch circuit can be referred to as the third terminal A2 of the switch circuit. The fifth terminal A3 of the second sub-switch circuit can be referred to as the fifth terminal A3 of the switch circuit.

[0100] It can be understood that when the switch circuit is powered off, at least one first depletion-mode transistor is turned on and at least one first enhancement-mode transistor is turned off. Therefore, it can be seen that the second terminal B1 and the third terminal A2 of the first sub-switch circuit (including the at least one first depletion-mode transistor connected in series) are turned on, and the fourth terminal B2 and the fifth terminal A3 of the second sub-switch circuit (including the at least one first enhancement-mode transistor connected in series) are turned off. Since the first terminal A1 is electrically connected to the second terminal B1, it can be seen that when the second terminal B1 and the third terminal A2 are turned on, the first terminal A1 and the third terminal A2 are also turned on. Since the first terminal A1 is electrically connected to the fourth terminal B2, it can be seen that when the fourth terminal B2 and the fifth terminal A3 are turned off, the first terminal A1 and the fifth terminal A3 are also turned off.

[0101] The second sub-switch circuit may include multiple first enhancement-mode transistors connected in series. When the switch circuit is powered off, the multiple first enhancement-mode transistors connected in series are all disconnected, disconnecting the first terminal A1 and the fifth terminal A3 of the switch circuit. Because the multiple disconnected first enhancement-mode transistors are included between the first terminal A1 and the fifth terminal A3 of the switch circuit, the possibility of wireless signals being transmitted from the first terminal A1 of the switch circuit to the fifth terminal A3 is reduced. The multiple first enhancement-mode transistors connected in series can provide signal isolation for the fifth terminal A3 of the switch circuit when the first terminal A1 and the fifth terminal A3 of the switch circuit are disconnected.

[0102] It can also be understood that the switch circuit can provide two paths from the first end A1 to the third end A2 and from the first end A1 to the fifth end A3. Therefore, the switch circuit can be used in scenarios where multiple first devices are connected to the same second device (for example, a scenario where multiple communication modules are connected to the same antenna (ANT), a scenario where multiple signal sources are connected to the same electronic device), the first end A1 is used to electrically connect the second device, and the third end A2 and the fifth end A3 are used to electrically connect different first devices. When the switch circuit is powered off, the first end A1 and the third end A2 of the switch circuit are turned on, achieving zero power consumption so that the first device and the second device are connected.

[0103] For example, taking the scenario where the first communication module (e.g., a Wi-Fi module or a BT module) and the WUR are connected to the same antenna as an example, as shown in Figure 3, the first end A1 of the switch circuit can be used to electrically connect the antenna, the third end A2 of the switch circuit can be used to electrically connect the WUR (which can be called the first WUR), and the fifth end A3 of the switch circuit can be used to electrically connect the first communication module. In particular, since when the switch circuit is powered off, the first end A1 and the third end A2 of the switch circuit are turned on, and the first end A1 and the fifth end A3 of the switch circuit are disconnected. Therefore, it can be seen that when the switch circuit is powered off, the first WUR is electrically connected to the antenna, and the first communication module is disconnected from the antenna.

[0104] It can also be understood that the depletion-mode transistor (e.g., the first depletion-mode transistor) is in the on state when the power is off, and the enhancement-mode transistor (e.g., the first enhancement-mode transistor) is in the off state when the power is off. Therefore, it can be seen that when at least one first depletion-mode transistor is powered off, the second end B1 and the third end A2 of the first sub-switch circuit (including at least one first depletion-mode transistor connected in series) are powered on, and the first end A1 and the third end A2 are also powered on; when at least one first enhancement-mode transistor is powered off, the fourth end B2 and the fifth end A3 of the second sub-switch circuit (including at least one first enhancement-mode transistor connected in series) are disconnected, and the first end A1 and the fifth end A3 are also disconnected.

[0105] Secondly, by controlling the depletion-mode transistor (e.g., the first depletion-mode transistor) to be powered on, the depletion-mode transistor can be turned off, and by controlling the enhancement-mode transistor (e.g., the first enhancement-mode transistor) to be powered on, the enhancement-mode transistor can be turned on. Therefore, it can be seen that when at least one first depletion-mode transistor is powered on, the second terminal B1 and the third terminal A2 of the first sub-switch circuit (including at least one first depletion-mode transistor connected in series) are disconnected; when at least one first enhancement-mode transistor is powered off, the fourth terminal B2 and the fifth terminal A3 of the second sub-switch circuit (including at least one first enhancement-mode transistor connected in series) are turned on. Since the first terminal A1 is electrically connected to the second terminal B1, it can be seen that when the second terminal B1 and the third terminal A2 of the first sub-switch circuit are disconnected, the first terminal A1 and the third terminal A2 of the switch circuit are also disconnected. Since the first terminal A1 is electrically connected to the fourth terminal B2, it can be seen that when the fourth terminal B2 and the fifth terminal A3 of the second sub-switch circuit are turned on, the first terminal A1 and the fifth terminal A3 of the switch circuit are also turned on.

[0106] It should be noted that FIG3 describes an example of an application scenario of the switch circuit provided in an embodiment of the present application, and does not limit the application scenario of the switch circuit.

[0107] In some embodiments, when the voltage of the control terminal of at least one first depletion-mode transistor is the first voltage value, and the voltage of the control terminal of at least one first enhancement-mode transistor is the second voltage value, the second terminal B1 and the third terminal A2 of the switching circuit are disconnected, and the fourth terminal B2 and the fifth terminal A3 of the switching circuit are connected.

[0108] The first voltage value may be any voltage value that causes the first depletion-mode transistor to be in an off state, and the second voltage value may be any voltage value that causes the first enhancement-mode transistor to be in an on state.

[0109] It is understandable that the first sub-switch circuit may include a plurality of first depletion-mode transistors connected in series. When the voltages of the plurality of first depletion-mode transistors connected in series are all the first voltage value, the plurality of first depletion-mode transistors are all disconnected, and the second end B1 and the third end A2 of the switch circuit are disconnected, and the first end A1 and the third end A2 are also disconnected. Since the switch circuit includes a plurality of disconnected first depletion-mode transistors between the first end A1 and the third end A2, the possibility of the wireless signal being transmitted from the first end A1 of the switch circuit to the third end A2 is smaller. The plurality of first depletion-mode transistors connected in series can serve as signal isolation for the third end A2 of the switch circuit when the first end A1 and the third end A2 of the switch circuit are disconnected.

[0110] Optionally, the first depletion-mode transistor may be a depletion-mode NMOS transistor (Negative channel Metal Oxide Semiconductor) or a depletion-mode PMOS transistor (positive channel Metal Oxide Semiconductor). The first enhancement-mode transistor may be an enhancement-mode NMOS transistor or an enhancement-mode PMOS transistor.

[0111] For example, a depletion-type NMOS transistor is used as an example to describe the control process of the depletion-type NMOS transistor. As shown in FIG4 (a), a cross-sectional structure diagram of a depletion-type NMOS transistor includes a source S1, a drain D1, and a gate G1. By controlling the voltage value V gs1 To control the current I between source S1 and drain D1 D1 As shown in FIG4(b), the voltage value V of the gate G1 is gs1 When the current I between source S1 and drain D1 is equal to different values, D1 Different sizes. Among them, V gs1 =0V, I D1 If it is not equal to 0, there is a conductive channel between the source S1 and the drain D1, indicating that the source S1 and the drain D1 are conductive (ie, the depletion-type NMOS transistor is conductive). Therefore, it can be seen that when the depletion-type NMOS transistor is powered off, the depletion-type NMOS transistor is conductive.

[0112] Secondly, V gs1 =-2.5V, I D1When the voltage of the control terminal (gate G1) of the depletion-type NMOS transistor is -2.5V, the depletion-type NMOS transistor is turned off. The first voltage value can be -2.5V.

[0113] It should be noted that different depletion-type NMOS transistors can be turned on when the power is off, and different depletion-type NMOS transistors may require different first voltage values ​​when they are turned off.

[0114] For example, the control process of an enhanced NMOS transistor is described by taking an enhanced NMOS transistor as an example. As shown in FIG5(a), a cross-sectional structure diagram of an enhanced NMOS transistor includes a source S2, a drain D2, and a gate G2. By controlling the voltage value V gs2 To control the current I between source S2 and drain D2 D2 As shown in FIG5(b), the voltage value V of the gate G2 is gs2 When the current I between source S2 and drain D2 is equal to different values, D2 Different sizes. Among them, V gs2 =0V, I D2 =0, indicating that the source S2 and the drain D2 are disconnected, that is, the enhanced NMOS transistor is disconnected. Therefore, it can be seen that when the enhanced NMOS transistor is powered off, the enhanced NMOS transistor is disconnected.

[0115] Secondly, V gs2 When it is greater than 0V, I D2 If the second voltage is not equal to 0, a conductive channel exists between the source S2 and the drain D2, indicating that the source S2 and the drain D2 are conductive (i.e., the enhancement-type NMOS transistor is conductive). Therefore, it can be seen that when the voltage at the control terminal (i.e., the gate G2) of the enhancement-type NMOS transistor is greater than 0V, the enhancement-type NMOS transistor is conductive. The second voltage value can be greater than 0V, for example, the second voltage value is equal to 2.5V.

[0116] It should be noted that different enhancement-type NMOS transistors are all turned off when the power is off, and different enhancement-type NMOS transistors may require different second voltage values ​​when they are turned on.

[0117] For example, in combination with FIG3 and with reference to FIG6, a circuit structure of a switch circuit provided in an embodiment of the present application is described, taking the example of a first sub-switch circuit including a first depletion-mode transistor and a second sub-switch circuit including a first enhancement-mode transistor. As shown in FIG6, the first terminal A1 of the switch circuit is electrically connected to the second terminal B1 of the first sub-switch circuit, and the first terminal A1 is electrically connected to the fourth terminal B2 of the second sub-switch circuit. The second terminal B1 and the third terminal A2 of the first sub-switch circuit are the two ends of the first depletion-mode transistor included in the first sub-switch circuit. The fourth terminal B2 and the fifth terminal A3 of the second sub-switch circuit are the two ends of the first enhancement-mode transistor included in the second sub-switch circuit.

[0118] The second terminal B1 of the first sub-switch circuit is the source S1 of the first depletion-mode transistor, and the third terminal A2 of the first sub-switch circuit is the drain D1 of the first depletion-mode transistor; alternatively, the second terminal B1 of the first sub-switch circuit is the drain D1 of the first depletion-mode transistor, and the third terminal A2 of the first sub-switch circuit is the source S1 of the first depletion-mode transistor. The control terminal of the first sub-switch circuit is the gate G1 of the first depletion-mode transistor.

[0119] The fourth terminal B2 of the second sub-switch circuit is the source S2 of the first enhancement-mode transistor, and the fifth terminal A3 of the second sub-switch circuit is the drain D2 of the first enhancement-mode transistor; alternatively, the fourth terminal B2 of the second sub-switch circuit is the drain D2 of the first enhancement-mode transistor, and the fifth terminal A3 of the second sub-switch circuit is the source S2 of the first enhancement-mode transistor. The control terminal of the third enhancement-mode transistor is the gate G2 of the first enhancement-mode transistor.

[0120] It is understood that, since the source and drain of a transistor (e.g., an NMOS transistor or a PMOS transistor) are symmetrical and reciprocal, the second terminal B1 of the first sub-switch circuit can be either the source or the drain of the transistor; accordingly, the third terminal A2 of the first sub-switch circuit can be either the drain or the source of the transistor. Similarly, the fourth terminal B2 of the second sub-switch circuit can be either the source or the drain of the transistor, and the fifth terminal A3 of the second sub-switch circuit can be either the drain or the source of the transistor.

[0121] For example, in combination with the switching circuit shown in Figure 6, taking the case where the first depletion-mode transistor in the switching circuit is the depletion-mode NMOS transistor shown in Figure 4, and the first enhancement-mode transistor in the switching circuit is the enhancement-mode NMOS transistor shown in Figure 5 as an example, the control voltage and working state of the switching circuit are introduced, as shown in Table 1 below.

[0122] Table 1 Control voltage and working state of a switching circuit

[0123] When the switch circuit is powered off, the voltage V gs1 =0V, the voltage V gs2 =0V. V gs1 =0V, the first depletion-mode transistor is turned on, the second terminal B1 and the third terminal A2 of the switch circuit are turned on, and the first terminal A1 and the third terminal A2 are also turned on. gs2 =0V, the first enhancement mode transistor is disconnected, then the fourth terminal B2 and the fifth terminal A3 of the switch circuit are disconnected, and the first terminal A1 and the fifth terminal A3 are also disconnected.

[0124] Secondly, when the switch circuit is powered on, the voltage V gs1 =-2.5V, the voltage V gs2 =2.5V. V gs1 =-2.5V, the first depletion-type transistor is disconnected, and the second terminal B1 and the third terminal A2 of the switch circuit are disconnected, and the first terminal A1 and the third terminal A2 are also disconnected. gs2 =2.5V, the first enhancement mode transistor is turned on, the fourth terminal B2 and the fifth terminal A3 of the switch circuit are turned on, and the first terminal A1 and the fifth terminal A3 are also turned on. The first voltage value can be -2.5V, and the second voltage value can be 2.5V.

[0125] It should be noted that Table 1 exemplarily describes a first voltage value for controlling the depletion-type NMOS transistor to be turned off, and the first voltage value for controlling the depletion-type NMOS transistor to be turned off may have other values. Table 1 exemplarily describes a second voltage value for controlling the enhancement-type NMOS transistor to be turned on, and the second voltage value for controlling the enhancement-type NMOS transistor to be turned on may have other values.

[0126] For example, in combination with the switching circuit shown in FIG6 , taking the case where the first depletion-mode transistor in the switching circuit is a depletion-type PMOS transistor, and the first enhancement-mode transistor in the switching circuit is an enhancement-type PMOS transistor as an example, the control voltage and working state of the switching circuit are introduced, as shown in Table 2 below.

[0127] Table 2 Control voltage and working state of another switching circuit

[0128] When the switch circuit is powered off, the voltage V gs1 =0V, the voltage V gs2 =0V. V gs1=0V, the first depletion-mode transistor is turned on, and the first terminal A1 and the third terminal A2 of the switch circuit are turned on. gs2 =0V, the first enhancement mode transistor is turned off, and the first terminal A1 and the fifth terminal A3 of the switch circuit are disconnected.

[0129] Secondly, when the switch circuit is powered on, the voltage V gs1 =2.5V, the voltage V gs2 =-2.5V. V gs1 =2.5V, the first depletion-mode transistor is disconnected, and the first terminal A1 and the third terminal A2 of the switch circuit are disconnected. gs2 =-2.5V, the first enhancement mode transistor is turned on, and the first terminal A1 and the fifth terminal A3 of the switch circuit are turned on. The first voltage value can be 2.5V, and the second voltage value can be -2.5V.

[0130] It should be noted that Table 2 exemplarily describes a first voltage value for controlling the depletion-type PMOS transistor to be turned off, and the first voltage value for controlling the depletion-type PMOS transistor to be turned off may have other values. Table 2 exemplarily describes a second voltage value for controlling the enhancement-type PMOS transistor to be turned on, and the second voltage value for controlling the enhancement-type PMOS transistor to be turned on may have other values.

[0131] It should also be noted that, in addition to the first sub-switch circuit and the second sub-switch circuit shown in FIG6 , the first sub-switch circuit may also include a plurality of first depletion-mode transistors connected in series, and the second sub-switch circuit may also include a plurality of first enhancement-mode transistors connected in series. For details of the plurality of first depletion-mode transistors, reference may be made to the description of the first depletion-mode transistor in the above embodiment, and for details of the plurality of first enhancement-mode transistors, reference may be made to the description of the first enhancement-mode transistor in the above embodiment, and will not be further elaborated in the present embodiment.

[0132] In some embodiments, referring to FIG7A , in addition to the first and second sub-switch circuits, the switch circuit may further include a third sub-switch circuit, which is connected in parallel with the first and second sub-switch circuits. The third sub-switch circuit includes a sixth terminal B3 and a seventh terminal A4. In addition to being electrically connected to the second terminal B1 of the first and second sub-switch circuits and the fourth terminal B2 of the second sub-switch circuit, the first terminal A1 of the switch circuit is also electrically connected to the sixth terminal B3 of the third sub-switch circuit. The third sub-switch circuit may include at least one second depletion-mode transistor connected in series. The sixth terminal B3 and the seventh terminal A4 of the third sub-switch circuit may be the two ends of the at least one second depletion-mode transistor connected in series.

[0133] When the switch circuit is powered off, the second terminal B1 and the third terminal A2 are conductive, the fourth terminal B2 and the fifth terminal A3 are disconnected, and the sixth terminal B3 and the seventh terminal A4 are conductive. When the voltage at the control terminal of at least one second depletion-mode transistor is the first voltage value, the sixth terminal B3 and the seventh terminal A4 are disconnected.

[0134] It should be noted that the first terminal A1 of the switch circuit is electrically connected to the second terminal B1, the first terminal A1 is electrically connected to the fourth terminal B2, and the first terminal A1 is electrically connected to the sixth terminal B3. Therefore, the first terminal A1 of the switch circuit can be referred to as the common node of the second terminal B1, the fourth terminal B2, and the sixth terminal B3. The seventh terminal A4 of the third sub-switch circuit can be referred to as the seventh terminal A4 of the switch circuit. Furthermore, since the first terminal A1 of the switch circuit is electrically connected to the sixth terminal B3, it can be seen that when the sixth terminal B3 and the seventh terminal A4 are conductive, the first terminal A1 and the seventh terminal A4 are also conductive, and when the sixth terminal B3 and the seventh terminal A4 are disconnected, the first terminal A1 and the seventh terminal A4 are also disconnected.

[0135] It should also be noted that the details of the third sub-switch circuit can refer to the introduction of the first sub-switch circuit in the above embodiment, and the details of the second depletion-type transistor can refer to the above introduction of the first depletion-type transistor, which will not be repeated here in the embodiments of this application.

[0136] It can be understood that since the first sub-switch circuit and the third sub-switch circuit in the switch circuit are both turned on when the power is off, and the first end and the third end are turned on when the first sub-switch circuit is turned on, and the first end and the seventh end are turned on when the second sub-switch circuit is turned on, it can be seen that the switch circuit can provide multiple conductive paths (including the path from the second end to the third end, and the path from the first end to the seventh end) when the power is off. In other words, the switch circuit can provide multiple conductive paths with zero power consumption. The switch circuit can be used in scenarios where multiple conductive paths are required in the case of power off, for example, a scenario where multiple WURs with different operating frequency bands listen to wireless signals.

[0137] For example, in a scenario where multiple WURs with different operating frequency bands monitor wireless signals, the first end A1 of the switch circuit can be used to electrically connect to an antenna, the third end A2 of the switch circuit can be used to electrically connect to the first WUR, the fifth end A3 of the switch circuit can be used to electrically connect to the first communication module, and the seventh end A4 of the switch circuit can be used to electrically connect to the second WUR. The operating frequency bands of the first WUR and the second WUR are different. For example, the operating frequency band of the first WUR is 1800 megahertz (MHz), and the operating frequency band of the second WUR is 2400 MHz. Furthermore, when the switch circuit is powered off, at least one first depletion-type transistor and at least one second depletion-type transistor are both turned on, and at least one first enhancement-type transistor is turned off. When at least one first depletion-type transistor and at least one second depletion-type transistor are both turned on, the first end A1 and the third end A2 of the switch circuit are turned on, and the first end A1 and the seventh end A4 of the switch circuit are also turned on. In this case, the first WUR and the second WUR are both connected to the same antenna, and the first WUR and the second WUR can monitor wireless signals simultaneously.

[0138] The third terminal A2 of the switch circuit can be connected to the first WUR via a first filter, and the first filter is used to transmit a wireless signal that complies with the operating frequency band of the first WUR (for example, a 1800 MHz wireless signal) to the first WUR. The seventh terminal A4 of the switch circuit can be connected to the second WUR via a second filter, and the second filter is used to transmit a wireless signal that complies with the operating frequency band of the second WUR (for example, a 2400 MHz wireless signal) to the second WUR.

[0139] It should be noted that the switch circuit may include one or more third sub-switch circuits. The details of each of the multiple third sub-switch circuits (including connection methods, on / off conditions) can be found in the description of the third sub-switch circuit in the above embodiment, and will not be further described in detail in the present embodiment.

[0140] By way of example, in conjunction with the switch circuit shown in FIG7A and with reference to FIG7B , the circuit structure of a switch circuit provided by an embodiment of the present application is described, taking as an example a first sub-switch circuit including a first depletion-mode transistor, a second sub-switch circuit including a first enhancement-mode transistor, and a third sub-switch circuit including a second depletion-mode transistor. As shown in FIG7B , the first terminal A1 of the switch circuit is electrically connected to the second terminal B1 of the first sub-switch circuit, the fourth terminal B2 of the second sub-switch circuit, and the sixth terminal B3 of the third sub-switch circuit. The sixth terminal B3 and the seventh terminal A4 of the third sub-switch circuit are the two terminals of the second depletion-mode transistor included in the third sub-switch circuit.

[0141] The sixth terminal B3 of the third sub-switch circuit is the source S3 of the second depletion-mode transistor, and the seventh terminal A4 of the third sub-switch circuit is the drain D3 of the second depletion-mode transistor; alternatively, the sixth terminal B3 of the third sub-switch circuit is the drain D3 of the first depletion-mode transistor, and the seventh terminal A4 of the third sub-switch circuit is the source S3 of the second depletion-mode transistor. The control terminal of the second depletion-mode transistor is the gate G3 of the second depletion-mode transistor.

[0142] In some embodiments, referring to FIG8A , in addition to the first and second sub-switch circuits, the switch circuit may further include a fourth sub-switch circuit, which is connected in parallel with the first and second sub-switch circuits. The fourth sub-switch circuit includes an eighth terminal B4 and a ninth terminal A5. In addition to being electrically connected to the second terminal B1 of the first and second sub-switch circuits and the fourth terminal B2 of the second sub-switch circuit, the first terminal A1 of the switch circuit is also electrically connected to the eighth terminal B4 of the fourth sub-switch circuit. The fourth sub-switch circuit may include at least one second enhancement-mode transistor connected in series. The eighth terminal B4 and the ninth terminal A5 of the fourth sub-switch circuit may serve as the two ends of the at least one second enhancement-mode transistor connected in series.

[0143] When the switch circuit is powered off, the second terminal B1 and the third terminal A2 are conductive, the fourth terminal B2 and the fifth terminal A3 are disconnected, and the eighth terminal B4 and the ninth terminal A5 are disconnected. When the voltage at the control terminal of the at least one second enhancement-mode transistor is at the second voltage value, the eighth terminal B4 and the ninth terminal A5 are conductive.

[0144] It should be noted that the first terminal A1 of the switch circuit is electrically connected to the second terminal B1, the first terminal A1 is electrically connected to the fourth terminal B2, and the first terminal A1 is electrically connected to the eighth terminal B4. Therefore, the first terminal A1 of the switch circuit can be referred to as the common node of the second terminal B1, the fourth terminal B2, and the eighth terminal B4. The ninth terminal A5 of the fourth sub-switch circuit can be referred to as the ninth terminal A5 of the switch circuit. Furthermore, since the first terminal A1 of the switch circuit is electrically connected to the eighth terminal B4, it can be understood that when the eighth terminal B4 and the ninth terminal A5 are conductive, the first terminal A1 and the ninth terminal A5 are also conductive, and when the eighth terminal B4 and the ninth terminal A5 are disconnected, the first terminal A1 and the ninth terminal A5 are also disconnected.

[0145] It should also be noted that the details of the fourth sub-switch circuit can refer to the introduction of the second sub-switch circuit in the above embodiment, and the details of the second enhancement-mode transistor can refer to the introduction of the first enhancement-mode transistor in the above embodiment, and the embodiments of this application will not be repeated here.

[0146] In addition, the switch circuit may include one or more fourth sub-switch circuits. Details of each of the multiple fourth sub-switch circuits (including connection methods, on / off conditions) can be found in the description of the fourth sub-switch circuit in the above embodiment, and will not be repeated in detail in the present embodiment.

[0147] For example, the first terminal A1 of the switch circuit can be used to electrically connect to the antenna, the third terminal A2 of the switch circuit can be used to electrically connect to the WUR, the fifth terminal A3 of the switch circuit can be used to electrically connect to the first communication module, and the ninth terminal A5 of the switch circuit can be used to electrically connect to the second communication module (for example, a Wi-Fi module or a BT module). Furthermore, when the voltage of the control terminal of at least one first depletion-mode transistor is a first voltage value, the voltage of the control terminal of at least one first enhancement-mode transistor is a second voltage value, and the voltage of the control terminal of at least one second enhancement-mode transistor is a third voltage value of 0V, the first terminal A1 and the third terminal A2 of the switch circuit are disconnected, the first terminal A1 and the fifth terminal A3 of the switch circuit are turned on, and the first terminal A1 of the switch circuit and the ninth terminal A5 of the switch circuit are disconnected; in this case, the first communication module is connected to the antenna to transmit and receive wireless signals, and the WUR and the second communication module are both disconnected from the antenna. The third voltage value can be a voltage value used to control the disconnection of the enhancement-mode transistor (such as the second enhancement-mode transistor). The third voltage value can be a voltage value less than or equal to 0V, for example, 0V or -2.5V. -2.5V can turn off the enhancement mode transistor to a greater extent than 0V.

[0148] Optionally, when the voltage of the control terminal of at least one first depletion-mode transistor is a first voltage value, the voltage of the control terminal of at least one first enhancement-mode transistor is a third voltage value, and the voltage of the control terminal of at least one second enhancement-mode transistor is a second voltage value, the first terminal A1 and the third terminal A2 of the switching circuit are disconnected, the first terminal A1 and the fifth terminal A3 of the switching circuit are disconnected, and the first terminal A1 and the ninth terminal A5 of the switching circuit are connected; in this case, the second communication module is connected to the antenna to receive and transmit wireless signals, and the WUR and the first communication module are both disconnected from the antenna.

[0149] It is understood that the switch circuit may include, in addition to the second sub-switch circuit composed of enhancement-mode transistors, a fourth sub-switch circuit composed of enhancement-mode transistors. By controlling the power supply of the switch circuit, one path in the second sub-switch circuit and the fourth sub-switch circuit can be connected, thereby enabling the first communication module connected to the second sub-switch circuit to be connected to the antenna, or the second communication module connected to the fourth sub-switch circuit to be connected to the antenna.

[0150] By way of example, in conjunction with the switch circuit shown in FIG8A and with reference to FIG8B , the circuit structure of a switch circuit provided by an embodiment of the present application is described, taking as an example a first sub-switch circuit including a first depletion-mode transistor, a second sub-switch circuit including a first enhancement-mode transistor, and a fourth sub-switch circuit including a second enhancement-mode transistor. As shown in FIG8B , a first terminal A1 of the switch circuit is electrically connected to a second terminal B1 of the first sub-switch circuit, the first terminal A1 is electrically connected to a fourth terminal B2 of the second sub-switch circuit, and the first terminal A1 is electrically connected to an eighth terminal B4 of the fourth sub-switch circuit. The eighth terminal B4 and the ninth terminal A5 of the fourth sub-switch circuit serve as the terminals of the second enhancement-mode transistor included in the fourth sub-switch circuit.

[0151] The eighth terminal B4 of the fourth sub-switch circuit is the source S4 of the second enhancement-mode transistor, and the ninth terminal A5 of the fourth sub-switch circuit is the drain D4 of the second enhancement-mode transistor; alternatively, the eighth terminal B4 of the fourth sub-switch circuit is the drain D4 of the first depletion-mode transistor, and the ninth terminal A5 of the fourth sub-switch circuit is the source S4 of the second enhancement-mode transistor. The control terminal of the fourth sub-switch circuit is the gate G4 of the second enhancement-mode transistor.

[0152] In some embodiments, in addition to the at least one first depletion-mode transistor connected in series, the first sub-switch circuit may further include a first branch. The first branch is a branch connected in parallel with the first sub-switch circuit and includes at least one third enhancement-mode transistor connected in series. The first branch includes a tenth terminal H1 and an eleventh terminal H2, which are the two ends of the first branch. The tenth terminal H1 of the first branch is electrically connected to the first sub-switch circuit, and the eleventh terminal H2 of the first branch is grounded. The tenth terminal H1 of the first branch can be electrically connected to the source or drain of any one of the at least one first depletion-mode transistors.

[0153] When the switch circuit is powered off, the voltage at the control terminal of the at least one third enhancement-mode transistor is 0V, the at least one third enhancement-mode transistor is disconnected, and the tenth terminal H1 and the eleventh terminal H2 of the first branch are disconnected. When the voltage at the control terminal of the at least one third enhancement-mode transistor is a second voltage value, the tenth terminal H1 and the eleventh terminal H2 of the first branch are connected, and the tenth terminal H1 of the first branch is grounded.

[0154] It should be noted that the details of the third enhancement-mode transistor can refer to the introduction of the first enhancement-mode transistor in the above embodiment, and will not be repeated here in the embodiment of the present application.

[0155] It should also be noted that the first sub-switch circuit may include one first branch or multiple first branches. The details of each of the multiple first branches (including connection mode, on / off status) can be referred to the description of the first branch in the above embodiment, and will not be repeated here in the present embodiment.

[0156] It is understood that when the voltage at the control terminal of at least one first depletion-mode transistor is a first voltage value, and the voltage at the control terminal of at least one first enhancement-mode transistor and the voltage at the control terminal of at least one third enhancement-mode transistor are both a second voltage value, at least one first depletion-mode transistor is turned off, at least one first enhancement-mode transistor is turned on, and at least one third enhancement-mode transistor is turned on. If at least one first depletion-mode transistor is turned off, the second terminal B1 and the third terminal A2 of the first sub-switch circuit (including the at least one first depletion-mode transistor connected in series) are turned off, and the first terminal A1 and the third terminal A2 of the switch circuit are also turned off. If at least one first enhancement-mode transistor is turned on, the fourth terminal B2 and the fifth terminal A3 of the second sub-switch circuit (including the at least one first enhancement-mode transistor connected in series) are turned on, and the first terminal A1 and the fifth terminal A3 of the switch circuit are also turned on. If at least one third enhancement-mode transistor is turned on, the tenth terminal H1 and the eleventh terminal H2 of the first branch are also turned on, and the tenth terminal H1 of the first branch is grounded.

[0157] Furthermore, if some wireless signals still leak from the second end B1 of the first sub-switch circuit to the third end A2 when the second end B1 and the third end A2 of the first sub-switch circuit are disconnected, since the first sub-switch circuit is connected to the grounded first branch, the leaked wireless signals can be transmitted to the ground through the grounded first branch and will not be transmitted from the second end B1 of the first sub-switch circuit to the third end A2. In other words, the first branch can enhance signal isolation at the third end A2 of the first sub-switch circuit when the first sub-switch circuit is disconnected.

[0158] By way of example, in conjunction with the switch circuit shown in FIG6 , with reference to FIG9 , a circuit structure of a switch circuit provided by an embodiment of the present application is described, taking as an example a first sub-switch circuit including a first depletion-mode transistor, a second sub-switch circuit including a first enhancement-mode transistor, and a first branch including a third enhancement-mode transistor. As shown in FIG9 , the tenth terminal H1 of the first branch is electrically connected to the third terminal A2 of the first sub-switch circuit, and the eleventh terminal H2 of the first branch is grounded.

[0159] The tenth terminal H1 of the first branch is the source S5 of the third enhancement-mode transistor, and the eleventh terminal H2 of the first branch is the drain D5 of the third enhancement-mode transistor; alternatively, the tenth terminal H1 of the first branch is the drain D5 of the third enhancement-mode transistor, and the tenth terminal H1 of the first branch is the source S5 of the third enhancement-mode transistor. The control terminal of the third enhancement-mode transistor is the gate G5 of the third enhancement-mode transistor.

[0160] In some embodiments, in addition to the at least one first enhancement-mode transistor connected in series, the second sub-switch circuit may further include a second branch. The second branch is connected in parallel with the second sub-switch circuit and includes at least one third depletion-mode transistor connected in series. The second branch includes a twelfth terminal K1 and a thirteenth terminal K2, which form the two ends of the second branch. The twelfth terminal K1 of the second branch is electrically connected to the second sub-switch circuit, and the thirteenth terminal K2 of the second branch is grounded. The twelfth terminal K1 of the second branch can be electrically connected to the source or drain of any one of the at least one first enhancement-mode transistors.

[0161] When the switch circuit is powered off, the voltage at the control terminal of at least one third depletion-mode transistor is 0V, and at least one third depletion-mode transistor is turned on, and the twelfth terminal K1 and the thirteenth terminal K2 of the second branch are turned on. When the voltage at the control terminal of at least one third depletion-mode transistor is the first voltage value, the twelfth terminal K1 and the thirteenth terminal K2 of the second branch are disconnected.

[0162] It should be noted that the details of the third depletion-mode transistor can refer to the introduction of the first depletion-mode transistor in the above embodiment, and will not be repeated here in the embodiment of the present application.

[0163] It should also be noted that the second sub-switch circuit may include one second branch or multiple second branches. The details of each of the multiple second branches (including connection mode, on / off status) can be referred to the description of the second branch in the above embodiment, and will not be repeated in this embodiment of the present application.

[0164] It is understood that when the switch circuit is powered off, at least one first depletion-mode transistor is turned on, at least one first enhancement-mode transistor is turned off, and at least one third depletion-mode transistor is turned on. If at least one first depletion-mode transistor is turned on, the second terminal B1 and the third terminal A2 of the first sub-switch circuit (including at least one first depletion-mode transistor connected in series) are turned on, and the first terminal A1 and the third terminal A2 of the switch circuit are also turned on. If at least one first enhancement-mode transistor is turned off, the fourth terminal B2 and the fifth terminal A3 of the second sub-switch circuit (including at least one first enhancement-mode transistor connected in series) are turned off, and the first terminal A1 and the fifth terminal A3 of the switch circuit are also turned off. If at least one third depletion-mode transistor is turned on, the twelfth terminal K1 and the thirteenth terminal K2 of the second branch are also turned on, and the twelfth terminal K1 of the second branch is grounded.

[0165] Furthermore, if some wireless signals still leak from the fourth terminal B2 of the second sub-switch circuit to the fifth terminal A3 when the fourth terminal B2 and the fifth terminal A3 of the second sub-switch circuit are disconnected, since the second sub-switch circuit is connected to the grounded second branch, the leaked wireless signals can be transmitted to the ground through the grounded second branch and will not be transmitted from the fourth terminal B2 of the second sub-switch circuit to the fifth terminal A3. In other words, the second branch can enhance signal isolation at the fifth terminal A3 of the second sub-switch circuit when the second sub-switch circuit is disconnected.

[0166] By way of example, in conjunction with the switch circuit shown in FIG6 , with reference to FIG9 , a circuit structure of a switch circuit provided in an embodiment of the present application is described, taking as an example a first sub-switch circuit including a first depletion-mode transistor, a second sub-switch circuit including a first depletion-mode transistor, a first branch including a third enhancement-mode transistor, and a second branch including a third depletion-mode transistor. As shown in FIG9 , the twelfth terminal K1 of the second branch is electrically connected to the fifth terminal A3 of the second sub-switch circuit, and the thirteenth terminal K2 of the second branch is grounded.

[0167] The twelfth terminal K1 of the second branch is the source S6 of the third depletion-mode transistor, and the thirteenth terminal K2 of the second branch is the drain D6 of the third depletion-mode transistor; alternatively, the twelfth terminal K1 of the second branch is the drain D6 of the third depletion-mode transistor, and the twelfth terminal K1 of the second branch is the source S6 of the third depletion-mode transistor. The control terminal of the third depletion-mode transistor is the gate G6 of the third depletion-mode transistor.

[0168] For example, in combination with the switching circuit shown in Figure 9, taking the first depletion-mode transistor and the third depletion-mode transistor as the depletion-type NMOS transistor shown in Figure 4, and the first enhancement-mode transistor and the third enhancement-mode transistor as the enhancement-type NMOS transistor shown in Figure 5 as an example, the control voltage and working state of the switching circuit are introduced, as shown in Table 3 below.

[0169] Table 3 Control voltage and working state of another switching circuit

[0170] When the switch circuit is powered off, the voltage V gs1 =0V, the voltage V gs2 =0V, the voltage V gs3 =0V, the voltage V gs4 =0V. V gs1 =0V, the first depletion-mode transistor is turned on, and the first terminal A1 and the third terminal A2 of the switch circuit are turned on. gs2 =0V, the first enhancement mode transistor is disconnected, and the first terminal A1 and the fifth terminal A3 of the switch circuit are disconnected. gs3 =0V, the third depletion-type transistor is turned on, the twelfth terminal K1 and the thirteenth terminal K2 of the second branch of the switch circuit are turned on, and the twelfth terminal K1 of the second branch is grounded. gs4 =0V, the third enhancement mode transistor is turned off, and the tenth terminal H1 and the eleventh terminal H2 of the first branch in the switch circuit are disconnected.

[0171] Secondly, when the switch circuit is powered on, the voltage V gs1 =-2.5V, the voltage V gs2 =2.5V, the voltage V gs3 =-2.5V, the voltage V gs4 =2.5V. V gs1 =-2.5V, the first depletion-mode transistor is disconnected, and the first terminal A1 and the third terminal A2 of the switch circuit are disconnected. gs2 =2.5V, the first enhancement mode transistor is turned on, and the first terminal A1 and the fifth terminal A3 of the switch circuit are turned on. gs3 =-2.5V, the third depletion-type transistor is disconnected, and the twelfth terminal K1 and the thirteenth terminal K2 of the second branch of the switch circuit are disconnected. gs4=2.5V, the third enhancement mode transistor is turned on, the tenth terminal H1 and the eleventh terminal H2 of the first branch in the switch circuit are turned on, and the tenth terminal H1 of the first branch is grounded.

[0172] In some embodiments, the third sub-switch circuit in the switch circuit may include a third branch. The fourth sub-switch circuit in the switch circuit may include a fourth branch.

[0173] It should be noted that the details of the third branch in the third sub-switch circuit (including the connection method, on and off conditions) can refer to the introduction of the first branch in the first sub-switch circuit in the above embodiment; the details of the fourth branch in the fourth sub-switch circuit can refer to the introduction of the fourth branch in the second sub-switch circuit in the above embodiment; the embodiments of this application will not be repeated here.

[0174] For example, in conjunction with the switch circuit shown in FIG9 , referring to FIG10A , the switch circuit may further include a fourth sub-switch circuit, and the fourth sub-switch circuit includes a second enhancement-mode transistor and a fourth branch. The fourth branch may include a fourth depletion-mode transistor, one end of the fourth depletion-mode transistor being electrically connected to one end of the second enhancement-mode transistor, and the other end of the fourth depletion-mode transistor being grounded.

[0175] When the switch circuit is powered off, the first depletion-mode transistor, the third depletion-mode transistor and the fourth depletion-mode transistor are all turned on, and the first enhancement-mode transistor, the second enhancement-mode transistor and the third enhancement-mode transistor are all turned off.

[0176] For example, in combination with the switch circuit shown in FIG9 , with reference to the switch circuit shown in FIG10B , the switch circuit may include a first sub-switch circuit and a second sub-switch circuit connected in parallel. The first sub-switch circuit includes two first depletion-mode transistors connected in series and a first branch, and the second sub-switch circuit includes two first enhancement-mode transistors connected in series and a second branch. The first branch includes a third enhancement-mode transistor, one end of which is electrically connected to one end of the two first depletion-mode transistors, and the other end of which is grounded. The second branch includes a third depletion-mode transistor, one end of which is electrically connected to one end of the two first enhancement-mode transistors, and the other end of which is grounded.

[0177] Wherein, when the switch circuit is powered off, the two first depletion-mode transistors and the third depletion-mode transistor are both turned on, and the two first enhancement-mode transistors and the third enhancement-mode transistor are both turned off.

[0178] By way of example, in conjunction with the switch circuit shown in FIG9 , with reference to the switch circuit shown in FIG10C , the switch circuit may include a first sub-switch circuit and a second sub-switch circuit connected in parallel. The first sub-switch circuit includes two first depletion-mode transistors connected in series and two first branches, and the second sub-switch circuit includes two first enhancement-mode transistors connected in series and two second branches. Each first branch includes a third enhancement-mode transistor. One end of the third enhancement transistor in a first branch is electrically connected to one end of the two first depletion-mode transistors connected in series, and the other end of the third enhancement transistor in a first branch is grounded. One end of the third enhancement transistor in another first branch is electrically connected to one end of a first depletion-mode transistor, and the other end of the third enhancement transistor in another first branch is grounded. Each second branch includes a third depletion-mode transistor. One end of the third depletion-mode transistor in a second branch is electrically connected to one end of the two first enhancement transistors connected in series, and the other end of the third depletion-mode transistor in a second branch is grounded. One end of the third depletion-mode transistor in another second branch is electrically connected to one end of a first enhancement transistor, and the other end of the third depletion-mode transistor in another second branch is grounded.

[0179] When the switch circuit is powered off, the two first depletion-mode transistors and the third depletion-mode transistors in the two first branches are turned on, and the two first enhancement-mode transistors and the third enhancement-mode transistors in the two second branches are turned off.

[0180] It should be noted that the following embodiments take a scenario in which multiple communication modules are connected to the same antenna as an example to introduce a communication device applied to this scenario.

[0181] Please refer to Figure 11A, which shows a switch application system provided in an embodiment of the present application. The switch application system 20 includes: a first signal transceiver module 21, a second signal transceiver module 22, a third signal transceiver module 23, and a switch circuit 24. The switch circuit 24 includes a first terminal A1. The switch circuit 24 includes a first sub-switch circuit 24 and a second sub-switch circuit 24 connected in parallel. The first sub-switch circuit 24 includes at least one first depletion-mode transistor connected in series, and the second sub-switch circuit 24 includes at least one first enhancement-mode transistor connected in series. The first sub-switch circuit 24 includes a second terminal B1 and a third terminal A2, and the second sub-switch circuit 24 includes a fourth terminal B2 and a fifth terminal A3. The first terminal A1 is electrically connected to the second terminal B1, and the first terminal A1 is electrically connected to the fourth terminal B2. The first terminal A1 is electrically connected to the first signal transceiver module 21, the third terminal A2 is electrically connected to the second signal transceiver module 22, and the fifth terminal A3 is electrically connected to the third signal transceiver module 23. The switch circuit 24 can be the switch circuit shown in Figure 3 or Figure 6.

[0182] The second signal transceiver module 22 is configured to transmit signals with the first signal transceiver module 21 via the switch circuit 24 when the switch circuit 24 is powered off. The third signal transceiver module 23 is configured to transmit signals with the first signal transceiver module 21 via the switch circuit 24 when the at least one first depletion-mode transistor and the at least one first enhancement-mode transistor are powered on. When the switch circuit 24 is powered off, the second terminal B1 and the third terminal A2 are conductive, and the fourth terminal B2 and the fifth terminal A3 are disconnected. When the at least one first depletion-mode transistor and the at least one first enhancement-mode transistor are powered on, the fourth terminal B2 and the fifth terminal A3 are conductive.

[0183] When the switch circuit 24 is powered off, the second terminal B1 and the third terminal A2 are conductive, and the fourth terminal B2 and the fifth terminal A3 are disconnected. When a preset power-on condition is met, the at least one first depletion-mode transistor and the at least one first enhancement-mode transistor in the switch circuit 24 are powered on. When the at least one first depletion-mode transistor and the at least one first enhancement-mode transistor are powered on, the second terminal B1 and the third terminal A2 are conductive, and the fourth terminal B2 and the fifth terminal A3 are conductive.

[0184] It should be noted that the details of the switch circuit 24 can be referred to the introduction of the switch circuit in the above embodiment, and will not be repeated here in the embodiment of the present application.

[0185] For example, referring to FIG11B , in a scenario where multiple communication modules are connected to the same antenna, the first signal transceiver module 21 in the switch application system 20 may be the antenna 31, the second signal transceiver module 22 may be the first WUR 32, and the third signal transceiver module 23 may be the first communication module 33. The preset power-on condition may include the first communication module 33 entering an operating mode.

[0186] The first WUR 32 is configured to receive a first wireless signal via the switch circuit 24 and antenna 31 when the switch circuit 24 is powered off. Furthermore, if the first wireless signal is a first wake-up signal, the first WUR 32 is configured to wake up the first communication module 33 in response to the first wake-up signal, thereby placing the first communication module 33 into an operating mode. In the operating mode, the first communication module 33 is configured to control the at least one first depletion-mode transistor and the at least one first enhancement-mode transistor in the switch circuit 24 to power on, and to receive a second wireless signal via the switch circuit 24 and antenna 31.

[0187] Furthermore, the first communication module 33 is further configured to enter a dormant state when a dormant condition is met. When the first communication module 33 is in the dormant state, the first communication module 33 may control the at least one first depletion-mode transistor and the at least one first enhancement-mode transistor to be powered off. The dormant condition may include: cessation of receiving the second wireless signal for a first duration, or receipt of first identification information indicating the end of transmission of the second wireless signal.

[0188] It can be understood that the first WUR32 and the first communication module 33 reuse the same antenna 31. When the first communication module 33 is in a dormant state, the first WUR32 needs to monitor the first wireless signal. When the switch circuit 24 is powered off, the second end B1 and the third end A2 of the switch circuit 24 are turned on, and the first end A1 and the third end A2 are also turned on, and then the first WUR32 is connected to the antenna 31 through the first end A1 and the fifth end A3 of the switch circuit 24, and the first WUR32 can monitor the first wireless signal through the antenna 31. Since the power consumption of the WUR for monitoring the wireless signal through the antenna 31 is relatively small, and there is no power consumption when the switch circuit 24 is powered off, the power consumption of the wireless signal monitoring process can be reduced.

[0189] For example, the first wireless signal received by the first WUR32 may be a wake-up sequence. The first WUR32 determines whether the received first wireless signal is a first wake-up signal, which is used to trigger the awakening of the first communication module. If the first wireless signal is a first wake-up signal, the first WUR32 may generate a first wake-up frame and send the first wake-up frame to the first communication module 33. The first communication module 33 receives and responds to the first wake-up frame and enters the working mode.

[0190] In some embodiments, the first communication module 33 can be electrically connected to the control terminal of at least one first depletion-mode transistor, and the first communication module 33 can also be electrically connected to the control terminal of at least one first enhancement-mode transistor. The first communication module 33 is specifically configured to, in an operating mode, output a first voltage value to the control terminal of at least one first depletion-mode transistor, and output a second voltage value to the control terminal of at least one first enhancement-mode transistor, so as to disconnect the second terminal B1 and the third terminal A2 of the first sub-switch circuit, and connect the fourth terminal B2 and the fifth terminal A3 of the second sub-switch circuit. When the second terminal B1 and the third terminal A2 of the first sub-switch circuit are disconnected, the first terminal A1 and the third terminal A2 of the switch circuit 24 are also disconnected. When the fourth terminal B2 and the fifth terminal A3 of the second sub-switch circuit are connected, the first terminal A1 and the fifth terminal A3 of the switch circuit 24 are also connected.

[0191] For example, in conjunction with the switch application system shown in FIG11B , with reference to FIG12 , a first communication module is provided in an embodiment of the present application. The first communication module 33 may include: a decoder 331, a level shift module 332, a negative voltage generator 333, and a positive voltage linear regulator (low dropout regulator, LDO) 334. The level shift module 332 is electrically connected to the control terminal of at least one first depletion-mode transistor (e.g., the gate G1 of at least one first depletion-mode transistor), and the level shift module 332 is also electrically connected to the control terminal of at least one first enhancement-mode transistor (e.g., the gate G2 of at least one first enhancement-mode transistor).

[0192] The process of the first communication module 33 controlling the switch circuit 24 in the working mode shown in FIG12 may include: s1, the first communication module 33 receives the first wake-up frame sent by the first WUR 32, and enters the working mode in response to the first wake-up frame; s2, when the first communication module 33 enters the working mode, each module in the first communication module 33 (including the decoder 331, the level conversion module 332, the negative voltage generator 333, and the positive voltage LDO 334) is powered on; s3, after the decoder 331 is powered on, it generates a first initial signal (e.g., 0V) and a second initial signal (e.g., 0V) in response to the first wake-up frame. 1.8V), and sends the first initial signal and the second initial signal to the level conversion module 332; s4, the level conversion module 332 converts the first initial signal into a first voltage value (for example, converts 0V into -2.5V) through the negative voltage generator 333, and outputs the first voltage value to the control terminal of at least one first depletion-mode transistor; s5, the level conversion module 332 also converts the second initial signal into a second voltage value (for example, converts 1.8V into 2.5V) through the positive voltage LDO 334, and outputs the second voltage value to the control terminal of at least one first enhancement-mode transistor.

[0193] In some embodiments, in addition to the at least one first depletion-mode transistor connected in series, the first sub-switch circuit may further include a first branch. The first branch includes at least one third enhancement-mode transistor connected in series. The first communication module 33 is electrically connected to the control terminal of the at least one third enhancement-mode transistor. Furthermore, the first communication module 33 is further configured to, in an operating mode, output a second voltage value to the control terminal of the at least one third enhancement-mode transistor to conduct the tenth terminal H1 and the eleventh terminal H2 of the first branch. When the switch circuit 24 is powered off, the tenth terminal H1 and the eleventh terminal H2 of the first branch are disconnected.

[0194] It should be noted that the details of the first branch can be referred to the introduction of the first branch in the above embodiment, and will not be repeated here in the embodiment of the present application.

[0195] In some embodiments, in addition to the at least one first enhancement-mode transistor connected in series, the second sub-switch circuit may further include a second branch. The second branch includes at least one third depletion-mode transistor connected in series. The first communication module 33 is electrically connected to the control terminal of the at least one third depletion-mode transistor. Furthermore, the first communication module 33 is further configured to, in an operating mode, output a first voltage value to the control terminal of the at least one third depletion-mode transistor to disconnect the twelfth terminal K1 and the thirteenth terminal K2 of the second branch. When the switch circuit 24 is powered off, the twelfth terminal K1 and the thirteenth terminal K2 of the second branch are connected.

[0196] It should be noted that the details of the second branch can be referred to the introduction of the second branch in the above embodiment, and will not be repeated here in the embodiment of the present application.

[0197] In some embodiments, in a scenario where multiple communication modules are connected to the same antenna, the switch application system 20 may further include a second WUR. The switch circuit 24 in the switch application system 20 may be the switch circuit shown in FIG7A or FIG7B , wherein the switch circuit 24 includes a first sub-switch circuit, a second sub-switch circuit, and a third sub-switch circuit. The first sub-switch circuit includes at least one first depletion-mode transistor, the second sub-switch circuit includes at least one first enhancement-mode transistor, and the third sub-switch circuit includes at least one second depletion-mode transistor. The seventh terminal A4 of the switch circuit 24 is electrically connected to the second WUR. The first communication module 33 may be electrically connected to the control terminal of at least one first depletion-mode transistor, electrically connected to the control terminal of at least one first enhancement-mode transistor, and electrically connected to the control terminal of at least one second depletion-mode transistor.

[0198] The second WUR is used to receive a third wireless signal through the switching circuit and the antenna when the switching circuit is powered off; and when the third wireless signal is a third wake-up signal, wake up the first communication module 33 in response to the third wake-up signal, so that the first communication module 33 enters the working mode.

[0199] The first communication module 33 is specifically configured to, in an operating mode, output a first voltage value to the control terminal of at least one first depletion-mode transistor and the control terminal of at least one second depletion-mode transistor, and output a second voltage value to the control terminal of at least one first enhancement-mode transistor, so as to disconnect the second terminal B1 and the third terminal A2 of the first sub-switch circuit, disconnect the sixth terminal B3 and the seventh terminal A4 of the third sub-switch circuit, and connect the fourth terminal B2 and the fifth terminal A3 of the second sub-switch circuit. When the second terminal B1 and the third terminal A2 of the first sub-switch circuit are disconnected, the first terminal A1 and the third terminal A2 of the switch circuit 24 are also disconnected. When the sixth terminal B3 and the seventh terminal A4 of the third sub-switch circuit are disconnected, the first terminal A1 and the seventh terminal A4 of the switch circuit 24 are also disconnected. When the fourth terminal B2 and the fifth terminal A3 of the second sub-switch circuit are connected, the first terminal A1 and the fifth terminal A3 of the switch circuit 24 are also connected.

[0200] In some embodiments, in a scenario where multiple communication modules are connected to the same antenna, the switch application system 20 may further include a second communication module. The switch circuit 24 in the switch application system 20 may be the switch circuit shown in FIG8A or FIG8B , wherein the switch circuit 24 includes a first sub-switch circuit, a second sub-switch circuit, and a fourth sub-switch circuit. The first sub-switch circuit includes at least one first depletion-mode transistor, the second sub-switch circuit includes at least one first enhancement-mode transistor, and the fourth sub-switch circuit includes at least one second enhancement-mode transistor connected in series. The fourth sub-switch circuit includes an eighth terminal B4 and a ninth terminal A5. The first terminal A1 of the switch circuit is electrically connected to the eighth terminal B4. The ninth terminal A5 of the switch circuit 24 is electrically connected to the second communication module. The second communication module may be electrically connected to the control terminal of the at least one first depletion-mode transistor and the control terminal of the at least one second enhancement-mode transistor.

[0201] The first WUR 32 is further configured to, when the first wireless signal is a second wake-up signal, wake up the second communication module in response to the second wake-up signal, so that the second communication module enters an operating mode. The second communication module is configured to, in the operating mode, control the at least one first depletion-mode transistor and the at least one second enhancement-mode transistor to power on, and receive a third wireless signal via the switch circuit 24 and the antenna 31.

[0202] When the switch circuit 24 is powered off, the eighth terminal B4 and the ninth terminal A5 are disconnected. When the at least one first depletion-mode transistor and the at least one second enhancement-mode transistor are powered on, the eighth terminal B4 and the ninth terminal A5 are connected.

[0203] Exemplarily, the second communication module outputs a first voltage value to the control terminal of at least one first depletion-mode transistor and a second voltage value to the control terminal of at least one second enhancement-mode transistor, thereby disconnecting the second terminal B1 and the third terminal A2 of the first sub-switch circuit and connecting the eighth terminal B4 and the ninth terminal A5 of the fourth sub-switch circuit. When the second terminal B1 and the third terminal A2 of the first sub-switch circuit are disconnected, the first terminal A1 and the third terminal A2 of the switch circuit 24 are also disconnected. When the eighth terminal B4 and the ninth terminal A5 of the fourth sub-switch circuit are connected, the first terminal A1 and the ninth terminal A5 of the switch circuit are also connected.

[0204] It should be noted that the details of the second communication module (including the method of waking up the second communication module, the sleep conditions satisfied by the second communication module, etc.) can refer to the introduction of the first communication module 33 in the above embodiment, and will not be repeated here in the embodiment of this application.

[0205] It is understood that the first WUR 32, the first communication module 33, and the second communication module can reuse the same antenna 31. When the first communication module 33 and the second communication module are both in a dormant state, the first WUR 32 connects to the antenna to monitor the first wireless signal. After the first WUR 32 wakes up the first communication module 33 or the second communication module, the first communication module 33 or the second communication module connects to the antenna to transmit and receive wireless signals.

[0206] 13A , an embodiment of the present application provides a switch application method, which is applied to the above switch application system. The method may include S401 - S402 .

[0207] S401: When the switch circuit is powered off, the second signal transceiver module transmits signals with the first signal transceiver module through the switch circuit.

[0208] When the switch circuit is powered off, the first terminal A1 and the third terminal A2 of the switch circuit are conductive, and the second signal transceiver module can be connected to the first signal transceiver module through the first terminal A1 and the third terminal A2 of the switch circuit. Furthermore, the second signal transceiver module can perform signal transmission with the first signal transceiver module.

[0209] S402 : When a preset power-on condition is met, control at least one first depletion-mode transistor and at least one first enhancement-mode transistor to be powered on, and the third signal transceiver module transmits signals with the first signal transceiver module through a switch circuit.

[0210] When the preset power-on conditions are met, the switch application system can output a first voltage value to the control terminal of at least one first depletion-mode transistor and a second voltage value to the control terminal of at least one first enhancement-mode transistor, so that at least one first depletion-mode transistor is turned off and at least one first enhancement-mode transistor is turned on. When at least one first depletion-mode transistor is turned off, the first terminal A1 and the third terminal A2 of the switch circuit are turned off. When at least one first enhancement-mode transistor is turned on, the first terminal A1 and the fifth terminal A3 of the switch circuit are turned on. When the first terminal A1 and the fifth terminal A3 of the switch circuit are turned on, the third signal transceiver module is connected to the first signal transceiver module via the first terminal A1 and the fifth terminal A3 of the switch circuit. Furthermore, the third signal transceiver module can transmit signals with the first signal transceiver module.

[0211] For example, the switch application method provided by the embodiment of the present application is described using a scenario where multiple communication modules are connected to the same antenna. Referring to FIG13B , S401 in the method may include S501, S402 may include S503-S504, and the method may further include S502 and S505.

[0212] S501. When the switch circuit is powered off, the first WUR receives a first wireless signal through the switch circuit and the antenna.

[0213] When the switch circuit is powered off, the first terminal A1 and the third terminal A2 of the switch circuit are conductive, and the first WUR can be connected to the antenna through the first terminal A1 and the third terminal A2 of the switch circuit. In turn, the first WUR receives the first wireless signal (eg, RF signal) from the antenna.

[0214] S502. When the first wireless signal is a first wake-up signal, the first WUR sends a first wake-up instruction to the first communication module in response to the first wake-up signal.

[0215] After receiving the first wireless signal, the first WUR determines whether the first wireless signal is a first wake-up signal. If the first wireless signal is a first wake-up signal, in response to the first wake-up signal, the first WUR sends a first wake-up instruction (such as a first wake-up frame) to the first communication module.

[0216] S503. The first communication module enters the working mode in response to the first wake-up instruction, and controls at least one first depletion-mode transistor and at least one first enhancement-mode transistor to power on, so that the first terminal A1 and the third terminal A2 of the switching circuit are disconnected, and the first terminal A1 and the fifth terminal A3 of the switching circuit are turned on.

[0217] The first communication module enters an operating mode from a dormant state in response to a first wake-up instruction. In the operating mode, the first communication module outputs a first voltage value to the control terminal of at least one first depletion-mode transistor and a second voltage value to the control terminal of at least one first enhancement-mode transistor, thereby turning off the at least one first depletion-mode transistor and turning on the at least one first enhancement-mode transistor. When the at least one first depletion-mode transistor is turned off, the first terminal A1 and the third terminal A2 of the switch circuit are turned off. When the at least one first enhancement-mode transistor is turned on, the first terminal A1 and the fifth terminal A3 of the switch circuit are turned on.

[0218] S504: The first communication module receives a second wireless signal through the switch circuit and the antenna.

[0219] When the first terminal A1 and the fifth terminal A3 of the switch circuit are connected, the first communication module is connected to the antenna through the first terminal A1 and the fifth terminal A3 of the switch circuit, and the first communication module can transmit and receive wireless signals through the antenna.

[0220] S505 : The first communication module enters a sleep state when a sleep condition is met; when the first communication module is in the sleep state, at least one first depletion-mode transistor and at least one first enhancement-mode transistor are powered off.

[0221] After the first communication module enters a dormant state, it stops supplying power to the at least one first depletion-mode transistor and the at least one first enhancement-mode transistor. This means that both the at least one first depletion-mode transistor and the at least one first enhancement-mode transistor are powered off. When both the at least one first depletion-mode transistor and the at least one first enhancement-mode transistor are powered off, the first terminal A1 and the third terminal A2 of the switch circuit are disconnected, while the first terminal A1 and the fifth terminal A3 of the switch circuit are connected. Consequently, the first WUR is connected to the antenna via the first terminal A1 and the third terminal A2 of the switch circuit, continuing to monitor wireless signals.

[0222] In some embodiments, scenarios where multiple signal sources are connected to the same electronic device may include: an antenna and a multimedia player (eg, a digital video disk (DVD), a video compact disc (VCD)) being connected to the same television.

[0223] For example, in a scenario where the antenna and multimedia player are connected to the same television, as shown in Figure 14, the first signal transceiver module 21 in the switch application system 20 can be the television, the second signal transceiver module 22 can be the antenna, and the third signal transceiver module 23 can be the multimedia player. The first terminal A1 of the switch circuit 24 can be used to electrically connect to the television, the third terminal A2 of the switch circuit 24 can be used to electrically connect to the antenna, and the fifth terminal A3 of the switch circuit 24 can be used to electrically connect to the multimedia player. The preset power-on condition can include a switching operation that triggers switching of the television's signal source.

[0224] Among them, the television is used to receive a first signal through the switching circuit 24 and the antenna when the switching circuit 24 is powered off, and display first multimedia information based on the first signal; then receive and respond to the switching operation, control at least one first depletion-mode transistor and at least one first enhancement-mode transistor to power on, and receive a second signal through the switching circuit 24 and the multimedia player; then, display second multimedia information based on the second signal.

[0225] It can be understood that when the switch circuit is powered off, the first terminal A1 and the third terminal A2 of the switch circuit are conductive, while the first terminal A1 and the fifth terminal A3 of the switch circuit are disconnected. Therefore, when the switch circuit is powered off, the television is connected to the antenna, while the television is disconnected from the multimedia player.

[0226] It is understood that, in order to implement the above-mentioned functions, the switch application system includes hardware structures and / or software modules corresponding to the execution of each function. Those skilled in the art should readily appreciate that, in combination with the units and algorithm steps of the various examples described in the embodiments disclosed herein, the embodiments of the present application can be implemented in the form of hardware or a combination of hardware and computer software. Whether a function is executed in hardware or in a manner driven by computer software depends on the specific application and design constraints of the technical solution. Professional and technical personnel may use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the embodiments of the present application.

[0227] An embodiment of the present application further provides a communication device, which includes the switch application system described in the above embodiment and / or the switch circuit described in the above embodiment.

[0228] In some examples, the communication device may be a mobile phone, a tablet computer, a handheld computer, a personal computer (PC), a personal digital assistant (PDA), a wearable device, or other electronic device with communication capabilities. The embodiments of the present application do not limit the specific form of the electronic device.

[0229] For example, taking the communication device as a mobile phone as an example, FIG15 shows a structural diagram of a communication device provided in an embodiment of the present application.

[0230] As shown in FIG15 , the mobile phone 50 may include a processor 501 , an external memory interface 502 , an internal memory 503 , an antenna 1 , an antenna 2 , a mobile communication module 504 , a wireless communication module 505 , a display screen 506 , and the like.

[0231] It should be understood that the structure illustrated in this embodiment does not constitute a specific limitation on the mobile phone 50. In other embodiments, the mobile phone 50 may include more or fewer components than shown, or may combine or separate certain components, or have different component arrangements. The illustrated components may be implemented in hardware, software, or a combination of software and hardware.

[0232] The processor 501 can be the nerve center and command center of the mobile phone 50. The processor 501 can generate operation control signals according to instruction operation codes and timing signals to complete the control of instruction fetching and execution.

[0233] Processor 501 may be provided with a memory for storing instructions and data. In some embodiments, the memory in processor 501 is a cache memory. This memory can store instructions or data that have just been used or are being recycled by processor 501. If processor 501 needs to use the same instruction or data again, it can directly access the memory. This avoids repeated accesses, reduces the waiting time of processor 501, and thus improves the operating efficiency of processor 501.

[0234] The wireless communication function of the mobile phone 50 can be implemented through the antenna 1, the antenna 2, the mobile communication module 504, the wireless communication module 505, the modem processor and the baseband processor.

[0235] Antenna 1 and Antenna 2 are used to transmit and receive electromagnetic wave signals. Each antenna in mobile phone 50 can be used to cover a single or multiple communication frequency bands. Different antennas can also be reused to improve antenna utilization. For example, antenna 1 can be reused as a diversity antenna for a wireless local area network.

[0236] The mobile communication module 504 can provide solutions for wireless communications including 2G / 3G / 4G / 5G, etc., applied to the mobile phone 50. The mobile communication module 504 may include at least one filter, a switch, a power amplifier, a low noise amplifier (LNA), etc. The mobile communication module 504 can receive electromagnetic waves from the antenna 1, and filter, amplify, and process the received electromagnetic waves, and transmit them to the modulation and demodulation processor for demodulation. The mobile communication module 504 can also amplify the signal modulated by the modulation and demodulation processor, and convert it into electromagnetic waves for radiation through the antenna 1. In some embodiments, at least some of the functional modules of the mobile communication module 504 can be set in the processor 501. In some embodiments, at least some of the functional modules of the mobile communication module 504 can be set in the same device as at least some of the modules of the processor 501.

[0237] The wireless communication module 505 can provide wireless communication solutions for mobile phone 50, including wireless local area networks (WLAN) and BT. The wireless communication module 505 can be one or more devices that integrate at least one communication processing module. The wireless communication module 505 receives electromagnetic waves via antenna 2, frequency-modulates and filters the electromagnetic wave signals, and transmits the processed signals to processor 501. The wireless communication module 505 can also receive signals to be transmitted from processor 501, frequency-modulate them, amplify them, and convert them into electromagnetic waves for radiation via antenna 2.

[0238] In some embodiments, antenna 1 of mobile phone 50 is coupled to mobile communication module 504, and antenna 2 is coupled to wireless communication module 505, so that mobile phone 50 can communicate with a network and other devices (e.g., a server) via wireless communication technologies. The wireless communication technologies may include Global System for Mobile Communications (GSM), BT, and / or WLAN.

[0239] The external memory interface 502 can be used to connect an external memory card, such as a Micro SD card, to expand the storage capacity of the mobile phone 50. The internal memory 503 can be used to store computer executable program code, which includes computer instructions. The processor 501 executes the computer instructions stored in the internal memory 503 to execute various functional applications and data processing of the mobile phone 50.

[0240] Of course, it is understood that FIG15 is merely an example of a communication device in the form of a mobile phone. If the communication device is a tablet computer, handheld computer, PC, PDA, wearable device, or other device, the structure of the communication device may include fewer or more structures than shown in FIG15, and this is not limited here.

[0241] An embodiment of the present application further provides a communications device comprising: a processor, a memory, a communications interface, and a communications bus. The processor, memory, and communications interface communicate with each other via the communications bus. The memory is used to store computer instructions. When the processor executes the computer instructions, the communications device performs the functions or steps performed by the communications device in the aforementioned method embodiment.

[0242] The present application also provides a computer-readable storage medium storing computer instructions, which, when executed on a communication device, cause the communication device to execute the functions or steps performed by the communication device in the above method embodiment.

[0243] For example, the computer-readable storage medium may be a read-only memory (ROM), a random access memory (RAM), a compact disc (CD-ROM), a magnetic tape, a floppy disk, an optical data storage device, and the like.

[0244] An embodiment of the present application further provides a computer program product comprising computer instructions, which, when executed on a communication device, enables the communication device to execute the various functions or steps executed by the communication device in the above method embodiment.

[0245] Among them, the communication equipment, computer-readable storage medium or computer program product provided in the embodiments of the present application are all used to execute the corresponding methods provided above. Therefore, the beneficial effects that can be achieved can refer to the beneficial effects in the corresponding methods provided above, and will not be repeated here.

[0246] Through the description of the above embodiments, those skilled in the art can clearly understand that for the convenience and brevity of description, only the division of the above functional modules is used as an example. In actual applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device (such as a communication device) is divided into different functional modules to complete all or part of the functions described above. The specific working process of the system, device (such as a communication device) and unit described above can refer to the corresponding process in the aforementioned method embodiment and will not be repeated here.

[0247] In the several embodiments provided in this application, it should be understood that the disclosed systems, devices (e.g., communication devices), and methods can be implemented in other ways. For example, the above-described device (e.g., communication device) embodiments are merely illustrative. For example, the division of the modules or units is merely a logical functional division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not performed.

[0248] The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of these units may be selected to achieve the purpose of this embodiment according to actual needs.

[0249] In addition, the functional units in the various embodiments of the present application may be integrated into a single processing unit, or each unit may exist physically separately, or two or more units may be integrated into a single unit. The aforementioned integrated units may be implemented in the form of hardware or software functional units.

[0250] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions for enabling a computer device (which can be a personal computer, server, or network device, etc.) or a processor to execute all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes: various media that can store program codes, such as flash memory, mobile hard disk, read-only memory, random access memory, magnetic disk or optical disk.

[0251] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of this application. Therefore, the scope of protection of this application should be based on the scope of protection of the claims.

Claims

1. A switching circuit, characterized in that: The switch circuit comprises a first sub-switch circuit and a second sub-switch circuit connected in parallel, the first sub-switch circuit comprises at least one first depletion-mode transistor connected in series, and the second sub-switch circuit comprises at least one first enhancement-mode transistor connected in series; the switch circuit comprises a first terminal, the first sub-switch circuit comprises a second terminal and a third terminal, and the second sub-switch circuit comprises a fourth terminal and a fifth terminal; the first terminal is electrically connected to the second terminal, and the first terminal is electrically connected to the fourth terminal; Wherein, when the switch circuit is powered off, the second end and the third end are connected, and the fourth end and the fifth end are disconnected.

2. The switch circuit according to claim 1, characterized in that: When the voltage of the control terminal of the at least one first depletion-mode transistor is a first voltage value, and the voltage of the control terminal of the at least one first enhancement-mode transistor is a second voltage value, the second terminal and the third terminal are disconnected, and the fourth terminal and the fifth terminal are connected.

3. The switch circuit according to claim 1 or 2, characterized in that: The first end is used to electrically connect to an antenna, the third end is used to electrically connect to a first wake-up receiver WUR, and the fifth end is used to electrically connect to a first communication module.

4. The switch circuit according to claim 1 or 2, characterized in that: The first end is used for electrically connecting to a television, the third end is used for electrically connecting to an antenna, and the fifth end is used for electrically connecting to a multimedia player.

5. The switch circuit according to claim 3, characterized in that: The switch circuit further includes a third sub-switch circuit, the third sub-switch circuit is connected in parallel with the first sub-switch circuit and the second sub-switch circuit; the third sub-switch circuit includes a sixth terminal and a seventh terminal; the first terminal is electrically connected to the sixth terminal; the third sub-switch circuit includes at least one second depletion-type transistor connected in series; Wherein, when the switch circuit is powered off, the sixth terminal and the seventh terminal are turned on; when the voltage of the control terminal of the at least one second depletion-mode transistor is the first voltage value, the sixth terminal and the seventh terminal are turned off.

6. The switch circuit according to claim 5, characterized in that: The seventh end is used to electrically connect to a second WUR, and the operating frequency bands of the second WUR and the first WUR are different.

7. The switch circuit according to claim 3, characterized in that: The switch circuit further includes a fourth sub-switch circuit, which is connected in parallel with the first sub-switch circuit and the second sub-switch circuit; the fourth sub-switch circuit includes an eighth terminal and a ninth terminal; the first terminal is electrically connected to the eighth terminal; the fourth sub-switch circuit includes at least one second enhancement-mode transistor connected in series; Wherein, when the switching circuit is powered off, the eighth terminal and the ninth terminal are disconnected; when the voltage of the control terminal of the at least one second enhancement-mode transistor is a second voltage value, the eighth terminal and the ninth terminal are connected.

8. The switch circuit according to claim 7, characterized in that: The ninth end is used for electrically connecting to the second communication module.

9. The switch circuit according to any one of claims 1 to 8, characterized in that: The first sub-switch circuit includes a first branch, the first branch includes at least one third enhancement-mode transistor connected in series, the first branch includes a tenth terminal and an eleventh terminal, the tenth terminal is electrically connected to the first sub-switch circuit, and the eleventh terminal is grounded; Wherein, when the switch circuit is powered off, the tenth terminal and the eleventh terminal are disconnected; when the voltage of the control terminal of the at least one third enhancement-mode transistor is a second voltage value, the tenth terminal and the eleventh terminal are connected.

10. The switch circuit according to any one of claims 1 to 9, characterized in that: The second sub-switch circuit includes a second branch, the second branch includes at least one third depletion-type transistor connected in series, the second branch includes a twelfth terminal and a thirteenth terminal, the twelfth terminal is electrically connected to the second sub-switch circuit, and the second terminal of the second branch is grounded; Wherein, when the switch circuit is powered off, the twelfth terminal and the thirteenth terminal are turned on; when the voltage of the control terminal of the at least one third depletion-mode transistor is the first voltage value, the twelfth terminal and the thirteenth terminal are turned off.

11. A switch application system, characterized in that: The switch application system comprises: a first signal transceiver module, a second signal transceiver module, a third signal transceiver module and a switch circuit; the switch circuit comprises a first end; The switch circuit includes a first sub-switch circuit and a second sub-switch circuit connected in parallel, the first sub-switch circuit includes at least one first depletion-mode transistor connected in series, and the second sub-switch circuit includes at least one first enhancement-mode transistor connected in series; the first sub-switch circuit includes a second terminal and a third terminal, and the second sub-switch circuit includes a fourth terminal and a fifth terminal; the first terminal is electrically connected to the second terminal, and the first terminal is electrically connected to the fourth terminal; the first terminal is electrically connected to the first signal transceiver module, the third terminal is electrically connected to the second signal transceiver module, and the fifth terminal is electrically connected to the third signal transceiver module; The second signal transceiver module is used to transmit signals with the first signal transceiver module through the switch circuit when the switch circuit is powered off; The third signal transceiver module is used for performing signal transmission with the first signal transceiver module through the switch circuit when the at least one first depletion-mode transistor and the at least one first enhancement-mode transistor are powered on; Wherein, when the switching circuit is powered off, the second terminal and the third terminal are turned on, and the fourth terminal and the fifth terminal are turned off; when a preset power-on condition is met, the at least one first depletion-mode transistor and the at least one first enhancement-mode transistor are powered on; when the at least one first depletion-mode transistor and the at least one first enhancement-mode transistor are powered on, the fourth terminal and the fifth terminal are turned on.

12. The switch application system according to claim 11, characterized in that: The first signal transceiver module is an antenna, the second signal transceiver module is a first wake-up receiver WUR, and the third signal transceiver module is a first communication module; the preset power-on condition includes the first communication module entering a working mode; The first WUR is used to receive a first wireless signal through the switch circuit and the antenna when the switch circuit is powered off; and when the first wireless signal is a first wake-up signal, in response to the first wake-up signal, wake up the first communication module so that the first communication module enters a working mode; The first communication module is used to control the at least one first depletion-mode transistor and the at least one first enhancement-mode transistor to power on in the working mode, and to receive a second wireless signal through the switch circuit and the antenna.

13. The switch application system according to claim 11, characterized in that: The first signal transceiver module is a television, the second signal transceiver module is an antenna, and the third signal transceiver module is a multimedia player; the preset power-on condition includes a switching operation; the switching operation is used to trigger switching of the signal source of the television; The television is configured to receive a first signal through the switch circuit and the antenna when the switch circuit is powered off, and display first multimedia information according to the first signal; The at least one first depletion-mode transistor and the at least one first enhancement-mode transistor are controlled to be powered on in response to the switching operation, and a second signal is received through the switching circuit and the multimedia player, and second multimedia information is displayed according to the second signal.

14. The switch application system according to claim 12, characterized in that: The first communication module is electrically connected to the control terminal of the at least one first depletion-mode transistor, and the first communication module is electrically connected to the control terminal of the at least one first enhancement-mode transistor; The first communication module is specifically used to output a first voltage value to the control end of the at least one first depletion-mode transistor and a second voltage value to the control end of the at least one first enhancement-mode transistor in an operating mode, so that the second end and the third end are disconnected and the fourth end and the fifth end are connected.

15. The switch application system according to claim 14, characterized in that: The first communication module is further configured to enter a sleep state when a sleep condition is met; when the first communication module is in the sleep state, the at least one first depletion-mode transistor and the at least one first enhancement-mode transistor are powered off.

16. The switch application system according to any one of claims 12, 14 and 15, characterized in that: The switch circuit further includes a third sub-switch circuit, the third sub-switch circuit is connected in parallel with the first sub-switch circuit and the second sub-switch circuit; the third sub-switch circuit includes a sixth terminal and a seventh terminal; the first terminal is electrically connected to the sixth terminal; the third sub-switch circuit includes at least one second depletion-type transistor connected in series; Wherein, when the switch circuit is powered off, the sixth end and the seventh end are conducted.

17. The switch application system according to claim 16, characterized in that: The switch application system further includes a second WUR, and the seventh end is electrically connected to the second WUR; the second WUR and the first WUR have different operating frequency bands; The second WUR is used to receive a third wireless signal through the switch circuit and the antenna when the switch circuit is powered off; and when the third wireless signal is a third wake-up signal, wake up the first communication module in response to the third wake-up signal, so that the first communication module enters the working mode.

18. The switch application system according to claim 16 or 17, characterized in that: The first communication module is electrically connected to the control terminal of the at least one first depletion-mode transistor, the first communication module is electrically connected to the control terminal of the at least one first enhancement-mode transistor, and the first communication module is electrically connected to the control terminal of the at least one second depletion-mode transistor; The first communication module is specifically used to output a first voltage value to the control end of the at least one first depletion-mode transistor and the control end of the at least one second depletion-mode transistor, and to output a second voltage value to the control end of the control end of the at least one first enhancement-mode transistor in an operating mode, so that the second end and the third end are disconnected, the sixth end and the seventh end are disconnected, and the fourth end and the fifth end are connected.

19. The switch application system according to any one of claims 12 and 14-18, characterized in that: The switch application system further includes a second communication module; the switch circuit further includes a fourth sub-switch circuit, the fourth sub-switch circuit is connected in parallel with the first sub-switch circuit and the second sub-switch circuit; the fourth sub-switch circuit includes an eighth terminal and a ninth terminal; the first terminal is electrically connected to the eighth terminal; the ninth terminal is electrically connected to the second communication module; the fourth sub-switch circuit includes at least one second enhancement-mode transistor connected in series; The first WUR is further used for waking up the second communication module in response to the second wake-up signal when the first wireless signal is a second wake-up signal, so that the second communication module enters a working mode; The second communication module is used to control the at least one first depletion-mode transistor and the at least one second enhancement-mode transistor to be powered on in the working mode, and to receive a third wireless signal through the switch circuit and the antenna; Wherein, when the switch circuit is powered off, the eighth terminal and the ninth terminal are disconnected; when the at least one first depletion-mode transistor and the at least one second enhancement-mode transistor are powered on, the eighth terminal and the ninth terminal are connected.

20. The switch application system according to any one of claims 12 and 14-19, characterized in that: The first sub-switch circuit includes a first branch, the first branch includes at least one third enhancement-mode transistor connected in series, the first branch includes a tenth terminal and an eleventh terminal, the tenth terminal is electrically connected to the first sub-switch circuit, and the eleventh terminal is grounded; the first communication module is electrically connected to the control terminal of the at least one third enhancement-mode transistor; The first communication module is further configured to output a second voltage value to the control terminal of the at least one third enhancement-mode transistor in the working mode, so as to conduct the tenth terminal and the eleventh terminal; Wherein, when the switch circuit is powered off, the tenth terminal and the eleventh terminal are disconnected.

21. The switch application system according to any one of claims 12 and 14-20, characterized in that: The second sub-switch circuit includes a second branch, the second branch includes at least one third depletion-type transistor connected in series, the second branch includes a twelfth terminal and a thirteenth terminal, the twelfth terminal is electrically connected to the second sub-switch circuit, and the thirteenth terminal is grounded; the first communication module is electrically connected to the control terminal of the at least one third depletion-type transistor; The first communication module is further configured to output a first voltage value to the control terminal of the at least one third depletion-type transistor in the working mode, so as to disconnect the twelfth terminal and the thirteenth terminal; Wherein, when the switch circuit is powered off, the twelfth terminal and the thirteenth terminal are turned on.

22. A communication device, characterized in that: The communication device comprises: a switch application system as claimed in any one of claims 11, 12 and 14-21, and / or a switch circuit as claimed in any one of claims 1-10.

23. A switch application method, characterized in that: Applied to a switch application system, the switch application system includes a first signal transceiver module, a second signal transceiver module, a third signal transceiver module and a switch circuit; the switch circuit includes a first end; the switch circuit includes a first sub-switch circuit and a second sub-switch circuit connected in parallel, the first sub-switch circuit includes at least one first depletion-type transistor connected in series, and the second sub-switch circuit includes at least one first enhancement-type transistor connected in series; the first sub-switch circuit includes a second end and a third end, and the second sub-switch circuit includes a fourth end and a fifth end; the first end is electrically connected to the second end, and the first end is electrically connected to the fourth end; the first end is electrically connected to the first signal transceiver module, the third end is electrically connected to the second signal transceiver module, and the fifth end is electrically connected to the third signal transceiver module; The method comprises: When the switch circuit is powered off, the second signal transceiver module transmits signals with the first signal transceiver module through the switch circuit; When a preset power-on condition is met, the at least one first depletion-mode transistor and the at least one first enhancement-mode transistor are controlled to be powered on, and the third signal transceiver module performs signal transmission with the first signal transceiver module through the switch circuit; Wherein, when the switching circuit is powered off, the second end and the third end are turned on, and the fourth end and the fifth end are turned off; when the at least one first depletion-mode transistor and the at least one first enhancement-mode transistor are powered on, the fourth end and the fifth end are turned on.

24. The method according to claim 23, characterized in that The first signal transceiver module is an antenna, the second signal transceiver module is a first wake-up receiver WUR, and the third signal transceiver module is a first communication module; The preset power-on condition includes the first communication module entering a working mode; The method comprises: When the switch circuit is powered off, the first WUR receives a first wireless signal through the switch circuit and the antenna, and when the first wireless signal is a first wake-up signal, sends a first wake-up instruction to the first communication module in response to the first wake-up signal; The first communication module enters a working mode in response to the first wake-up instruction and controls the at least one The first depletion-mode transistor and the at least one first enhancement-mode transistor are powered on to disconnect the second terminal and the third terminal and connect the fourth terminal and the fifth terminal; The first communication module receives a second wireless signal through the switch circuit and the antenna.

25. The method according to claim 24, characterized in that The method further comprises: The first communication module enters a sleep state when a sleep condition is met; when the first communication module is in the sleep state, the at least one first depletion-mode transistor and the at least one first enhancement-mode transistor are powered off.

26. The method according to claim 23, characterized in that The first signal transceiver module is a television, the second signal transceiver module is an antenna, and the third signal transceiver module is a multimedia player; the preset power-on condition includes a switching operation; the switching operation is used to trigger switching of the signal source of the television; The method comprises: When the switch circuit is powered off, the television receives a first signal through the switch circuit and the antenna, and displays first multimedia information according to the first signal; The television receives and controls the at least one first depletion-mode transistor and the at least one first enhancement-mode transistor to power on in response to the switching operation, and receives a second signal through the switch circuit and the multimedia player; The television displays second multimedia information according to the second signal.

27. A communication device, characterized in that: The communication device includes a processor, a memory, a communication interface and a communication bus; the processor, the memory and the communication interface communicate with each other through the communication bus; the memory is used to store computer instructions; when the computer instructions run on the processor, the processor executes the switch application method as described in any one of claims 23-26.

28. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer instructions; when the computer instructions are executed on a communication device, the communication device executes the switch application method according to any one of claims 23 to 26.

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