Display panel, driving method for display panel, and display apparatus

Abstract

A display panel, a driving method for a display panel, and a display apparatus. The display panel comprises a display area (11), a non-display area (12), a plurality of sub-pixels and at least one multiplex signal line (100), wherein the plurality of sub-pixels are located in the display area (11); each sub-pixel comprises a pixel circuit and a light-emitting device (150); the pixel circuit comprises a driving module (110), an initialization module (130), a data writing module (120) and a storage module (140); the initialization module (130) is configured to write an initialization voltage to at least one of a control end of the driving module (110) and an anode of the light-emitting device (150); an input end of the initialization module (130) of the pixel circuit of each sub-pixel and a cathode of the light-emitting device (150) are connected to one multiplex signal line (100); and each multiplex signal line (100) is configured to provide, in an initialization stage, the initialization voltage to the initialization module (130) connected to said multiplex signal line (100), and is configured to provide, in a light emission stage, a cathode voltage to the cathode of the light-emitting device (150) connected to said multiplex signal line (100).

Description

Display panel, display panel driving method, and display device

[0001] This application claims priority to the Chinese patent application filed with the China Patent Office on June 13, 2023, with application number 202310707183.X. The entire contents of the above application are incorporated by reference into this application. Technical Field

[0002] Embodiments of the present application relate to the field of display technology, for example, to a display panel, a method for driving a display panel, and a display device. Background Art

[0003] With the gradual development of organic light-emitting diodes (OLEDs), the requirements for circuit configuration of OLED display panels are becoming increasingly higher.

[0004] OLED display panels have problems with a large number of wirings and difficulty in wiring.

[0005] Summary of the Invention

[0006] Embodiments of the present application provide a display panel, a method for driving the display panel, and a display device, which reduce the number of wirings of the display panel and the difficulty of wiring.

[0007] The present application provides a display panel, comprising a display area, a non-display area at least partially surrounding the display area, a plurality of sub-pixels, and at least one multiplexing signal line;

[0008] A plurality of sub-pixels are located in the display area; each sub-pixel includes a pixel circuit and a light-emitting device; the pixel circuit includes a driving module, an initialization module, a data writing module, and a storage module; the data writing module is configured to transmit a data voltage to the driving module; the storage module is configured to store a voltage at a control terminal of the driving module; the driving module is configured to generate a driving current based on the voltage at the control terminal to drive the light-emitting device to emit light; the initialization module is configured to write an initialization voltage to at least one of the control terminal of the driving module and the anode of the light-emitting device;

[0009] The input end of the initialization module of the pixel circuit of each sub-pixel and the cathode of the light-emitting device are electrically connected to a multiplexed signal line; each multiplexed signal line is configured to provide the initialization voltage to the connected initialization module during the initialization phase, and to provide a cathode voltage to the cathode of the connected light-emitting device during the light-emitting phase.

[0010] Optionally, the plurality of sub-pixels include a first sub-pixel, a second sub-pixel, and a third sub-pixel; and the at least one multiplexed signal line includes a first multiplexed signal line, a second multiplexed signal line, and a third multiplexed signal line;

[0011] An input terminal of the initialization module of the pixel circuit of the first sub-pixel and a cathode of the light-emitting device are electrically connected to the first multiplexed signal line;

[0012] An input terminal of the initialization module of the pixel circuit of the second sub-pixel and a cathode of the light-emitting device are electrically connected to the second multiplexed signal line;

[0013] The input terminal of the initialization module of the pixel circuit of the third sub-pixel and the cathode of the light-emitting device are electrically connected to the third multiplexing signal line.

[0014] Optionally, the at least one multiplexed signal line includes a plurality of multiplexed signal lines, and the plurality of multiplexed signal lines are configured to be at least one of the following situations:

[0015] providing different cathode voltages to cathodes of light-emitting devices of different seed pixels respectively;

[0016] They are electrically connected to different output terminals of the driver chip respectively.

[0017] Optionally, the plurality of multiplexed signal lines are configured to transmit different initialization voltages to input terminals of initialization modules of different seed pixels respectively.

[0018] Optionally, the pixel circuit of each sub-pixel also includes a light-emitting control module; the light-emitting control module, the driving module and the light-emitting device are connected between the power signal line and the one multiplexed signal line, and the light-emitting control module is configured to control the conduction between the light-emitting device and the power signal line during the light-emitting stage, and to control the conduction between the light-emitting device and the connected multiplexed signal line.

[0019] Optionally, the light-emitting control module includes a first light-emitting control transistor, a second light-emitting control transistor, and a third light-emitting control transistor; a first electrode of the first light-emitting control transistor is connected to the power signal line, a second electrode of the first light-emitting control transistor is connected to the first end of the driving module, and the second end of the driving module is connected to the first electrode of the second light-emitting control transistor; a second electrode of the second light-emitting control transistor is connected to the anode of the light-emitting device; a first electrode of the third light-emitting control transistor is connected to the cathode of the light-emitting device, and a second electrode of the third light-emitting control transistor is connected to the reset signal line;

[0020] The gate of the first light emission control transistor, the gate of the second light emission control transistor, and the gate of the third light emission control transistor are all connected to a light emission control signal line.

[0021] Optionally, the initialization module includes at least one of a first initialization module and a second initialization module:

[0022] A first end of the first initialization module is electrically connected to the one multiplexed signal line, a second end of the first initialization module is electrically connected to the anode of the light-emitting device, and a control end of the first initialization module is configured to receive a first gate signal;

[0023] A first end of the second initialization module is electrically connected to the one multiplexed signal line, a second end of the second initialization module is electrically connected to the control end of the driving module, and the control end of the second initialization module is configured to receive a second gate signal.

[0024] Optionally, cathodes of the light-emitting devices of some sub-pixels among the plurality of sub-pixels are electrically connected, so that the light-emitting devices with electrically connected cathodes are configured to emit light of the same color.

[0025] Optionally, cathodes of the light-emitting devices of some sub-pixels among the plurality of sub-pixels are connected together to form cathode strips; or cathodes of the light-emitting devices of some sub-pixels are electrically connected via connecting wires.

[0026] Optionally, the cathode strips include a plurality of first cathode strips, a plurality of second cathode strips, and a plurality of third cathode strips; the plurality of sub-pixels are arranged in an array; the first sub-pixels in the plurality of sub-pixels emit the same light color, the second sub-pixels in the plurality of sub-pixels emit the same light color, and the third sub-pixels in the plurality of sub-pixels emit the same light color;

[0027] The cathodes of the light-emitting devices in the first sub-pixels in the same column are connected together to form a first cathode strip, and each first cathode strip is electrically connected to the first multiplexed signal line in the non-display area of ​​the display panel;

[0028] The cathodes of the light-emitting devices in the second sub-pixels in the same column are connected as a whole to form a second cathode strip connection, and each second cathode strip is electrically connected to the second multiplexed signal line in the non-display area of ​​the display panel;

[0029] The cathodes of the light emitting devices in the third sub-pixels in the same column are connected together to form a third cathode strip, and each third cathode strip is electrically connected to the third multiplexing signal line in the non-display area of ​​the display panel.

[0030] Optionally, the first end of the initialization module in each sub-pixel is electrically connected to the cathode of the light-emitting module in each sub-pixel through a via hole, or is electrically connected to the same cathode strip as the light-emitting device in each sub-pixel.

[0031] Optionally, the display panel also includes a plurality of signal transmission lines located in the display area, each signal transmission line is electrically connected to the cathode of the light-emitting device in a row or a column of sub-pixels, and each signal transmission line is electrically connected to a multiplexed signal line, and the multiplexed signal line is configured to transmit cathode voltage to the cathode of the light-emitting device through the signal transmission line.

[0032] The present application provides a method for driving a display panel, for driving the display panel described in any embodiment of the present application, comprising:

[0033] During the initialization phase, the initialization module is turned on to control the multiplexed signal line to provide an initialization voltage to at least one of the anode of the light-emitting module and the control terminal of the driving module;

[0034] In the data writing phase, controlling the data writing module to transmit a data voltage to the control terminal of the driving module;

[0035] In the light-emitting stage, the initialization module is disconnected, the multiplexed signal line is controlled to provide a cathode voltage to the cathode of the light-emitting device, and the driving module is controlled to output a driving current to the light-emitting device to drive the light-emitting device to emit light.

[0036] Optionally, controlling the multiplexed signal line to provide a cathode voltage to the cathode of the light-emitting device, and controlling the driving module to output a driving current to the light-emitting device to drive the light-emitting device to emit light includes:

[0037] Controlling the light emitting control module included in the pixel circuit to be turned on, so that the multiplexed signal line is electrically connected to the cathode of the light emitting device, so as to transmit the cathode voltage to the cathode of the light emitting device through the multiplexed signal line;

[0038] Controlling the light emitting control module to be turned on, so that the power signal line is electrically connected to the driving module and the driving module is electrically connected to the anode of the light emitting device, so as to output a driving current to the light emitting device through the driving module;

[0039] The light emitting control module, the driving module and the light emitting device are connected between the power signal line and the multiplexing signal line.

[0040] The present application provides a display device, comprising the display panel described in any embodiment of the present application.

[0041] The technical solution provided by the embodiments of the present application provides at least one multiplexed signal line in the display panel, electrically connecting the input of the initialization module of the pixel circuit of each sub-pixel and the cathode of the light-emitting device to the multiplexed signal line. The multiplexed signal line provides the initialization voltage to the initialization module during the initialization phase and the cathode voltage to the cathode of the light-emitting device during the light-emitting phase. This allows the cathode wiring and the initialization signal line to be shared, reducing the number of wiring lines in the display panel and alleviating the complex wiring issues associated with independent control of the cathodes of different sub-pixels in the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] FIG1 is a schematic structural diagram of a pixel circuit provided by an embodiment;

[0043] FIG2 is a schematic structural diagram of a display panel provided in an embodiment of the present application;

[0044] FIG3 is a schematic structural diagram of a pixel circuit provided in an embodiment of the present application;

[0045] FIG4 is a schematic structural diagram of a multiplexed signal line provided in an embodiment of the present application;

[0046] FIG5 is a schematic structural diagram of another display panel provided in an embodiment of the present application;

[0047] FIG6 is a schematic structural diagram of another pixel circuit provided in an embodiment of the present application;

[0048] FIG7 is a schematic structural diagram of another pixel circuit provided in an embodiment of the present application;

[0049] FIG8 is a schematic structural diagram of a cathode layer in a display panel provided by an embodiment;

[0050] FIG9 is a schematic structural diagram of another pixel circuit provided in an embodiment of the present application;

[0051] FIG10 is a flow chart of a method for driving a display panel according to an embodiment of the present application;

[0052] FIG11 is a flowchart of another display panel driving method provided in an embodiment of the present application;

[0053] FIG12 is a schematic structural diagram of a display device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0054] The terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequential order. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments of the present application described herein can be implemented in a sequence other than those illustrated or described herein. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, in addition to the process, method, system, product or equipment comprising a series of steps or units shown in the embodiments of the present application, other processes, methods, systems, products or equipment of this series of steps or units not clearly listed may also be included, or other steps or units inherent to these processes, methods, systems, products or equipment.

[0055] FIG1 is a schematic diagram of the structure of a pixel circuit provided in one embodiment. Referring to FIG1 , an OLED display panel includes multiple sub-pixels, each of which includes a pixel circuit and a light-emitting device 150. The pixel circuit is connected to a scan signal line, a data signal line, an initialization signal line, and a power signal line, respectively. The data signal line is configured to provide a data voltage, Data, to the pixel circuit; the scan signal line is configured to provide a scan signal (scan signal Scan1 / Scan2 / Scan3) to the pixel circuit; the initialization signal line is configured to provide an initialization voltage, Vrefn, to the pixel circuit; and the power signal line is configured to provide a power signal to the pixel circuit. The power signal line includes a first power signal line and a second power signal line. The first power signal line transmits a first power voltage, VDD, to the anode of the light-emitting device 150, and the second power signal line transmits a second power voltage, VSS, to the cathode of the light-emitting device 150. The second power signal line can also be understood as a cathode line, and the second power voltage can also be understood as a cathode voltage. Separate cathode lines and initialization lines for the sub-pixels in the display panel increase the number of wiring traces and the wiring difficulty of the display panel. An embodiment of the present application provides a display panel, in which a multiplexed signal line is used to provide an initialization voltage to an initialization module in an initialization phase, and to provide a cathode voltage to the cathode of a light-emitting device in a light-emitting phase, so that the cathode wiring and the initialization signal line are shared, thereby reducing the number of wirings of the display panel and the wiring difficulty.

[0056] An embodiment of the present application provides a display panel. Figure 2 is a structural schematic diagram of a display panel provided by an embodiment of the present application. Figure 3 is a structural schematic diagram of a pixel circuit provided by an embodiment of the present application. Figure 4 is a structural schematic diagram of a multiplexed signal line provided by an embodiment of the present application. Referring to Figures 2 to 4, the display panel includes a display area 11, a non-display area 12 that at least partially surrounds the display area 11, multiple sub-pixels and at least one multiplexed signal line 100.

[0057] Multiple sub-pixels are located in the display area 11; each sub-pixel includes a pixel circuit and a light-emitting device 150; the pixel circuit includes a driving module 110, an initialization module 130, a data writing module 120 and a storage module 140; the data writing module 120 is configured to transmit a data voltage Data to the driving module 110; the storage module 140 is configured to store the voltage of the control terminal G of the driving module 110; the driving module 110 is configured to generate a driving current according to the voltage of the control terminal G to drive the light-emitting device 150 to emit light; the initialization module 130 is configured to write an initialization voltage Vrefn to the control terminal G of the driving module 110 and / or the anode of the light-emitting device 150.

[0058] The input end of the initialization module 130 of the pixel circuit of each sub-pixel and the cathode of the light-emitting device 150 are electrically connected to a multiplexed signal line 100; the multiplexed signal line 100 is configured to provide an initialization voltage Vrefn to the initialization module 130 during the initialization phase, and to provide a cathode voltage VSS to the cathode of the light-emitting device 150 during the light-emitting phase.

[0059] The display panel includes a display area 11 and a non-display area 12. The non-display area 12 is located on at least one side of the display area 11. The non-display area 12 includes a scan drive circuit 10 and a driver chip 20 as shown in Figure 2. In other embodiments, the driver chip 20 may not be arranged on the display panel. The display area 11 includes an array substrate and a light-emitting structure layer arranged on the array substrate. The array substrate refers to a film layer structure that can provide a drive signal for the display panel and play a role of buffering, protection or support, etc., which includes a substrate and a drive circuit layer arranged on the substrate. The drive circuit layer includes multiple circuit units, multiple data signal lines (d1 to dn), multiple scan signal lines (s1 to sm) and multiple power signal lines. The driver chip 20 is electrically connected to the multiple data signal lines (d1 to dn) respectively, and the scan drive circuit 10 is electrically connected to the multiple scan signal lines (s1 to sm) respectively.

[0060] The light-emitting structure layer includes a plurality of light-emitting devices 150. The circuit unit and the light-emitting device 150 electrically connected to the circuit unit constitute a sub-pixel. The display area 11 includes a plurality of sub-pixels Pxij, where i and j can be natural numbers. The circuit unit includes at least a pixel circuit. Referring to FIG3 , the pixel circuit is electrically connected to a scan signal line, a data signal line, and a power signal line, respectively. The data signal line is configured to provide a data voltage Data to the pixel circuit. The scan signal line includes a second scan signal line, which is configured to provide a second scan signal Scan2 to the pixel circuit. The second scan signal Scan2 is configured to control the conduction state of the data write module 120. When the second scan signal Scan2 controls the data write module 120 to be turned on, the data write module 120 is configured to transmit the data voltage Data on the data signal line to the driver module 110. The storage module 140 is electrically connected to the control terminal G of the driver module 110 and is configured to store the voltage at the control terminal G of the driver module 110. The driving module 110 is electrically connected to the light emitting device 150 . The driving module 110 is configured to generate a driving current according to the voltage of the control terminal G to drive the light emitting device 150 to emit light.

[0061] The output end of the initialization module 130 can be electrically connected to the control terminal G of the driver module 110. Before the data writing module 120 writes the data voltage Data on the data signal line to the control terminal G of the driver module 110 (data writing phase), the initialization module 130 is configured to write the initialization voltage Vrefn to the control terminal G of the driver module 110 to ensure that a voltage related to the data voltage Data can be transmitted to the control terminal G of the driver module 110. The output end of the initialization module 130 can be electrically connected to the anode of the light-emitting device 150. Before the driver module 110 generates a driving current to drive the light-emitting device 150 to emit light (light-emitting phase), the initialization module 130 can also be configured to write the initialization voltage Vrefn to the anode of the light-emitting device 150 to initialize the anode potential of the light-emitting device 150.

[0062] The initialization module 130 may write the initialization voltage Vrefn to the anode of the light-emitting device 150 at the same stage as the initialization module 130 writes the initialization voltage Vrefn to the control terminal G of the driver module 110. Alternatively, the initialization module 130 may write the initialization voltage Vrefn to the anode of the light-emitting device 150 at the same stage as the data writing module 120 transmits the data voltage Data on the data signal line to the driver module 110. Alternatively, the initialization module 130 may write the initialization voltage Vrefn to the anode of the light-emitting device 150 after the data writing module 120 transmits the data voltage Data on the data signal line to the driver module 110.

[0063] At least one multiplexed signal line 100 is provided in the display panel. Three multiplexed signal lines are exemplarily shown in FIG4 , and are provided in the non-display area 12 of the display panel. The multiplexed signal line 100 is configured to provide an initialization voltage Vrefn to the initialization module 140 during the initialization phase. This can be understood as providing the initialization voltage Vrefn to the initialization module 130 when the initialization module 130 writes the initialization voltage Vrefn to the control terminal G of the driving module 110, and providing the initialization voltage Vrefn to the initialization module 130 when the initialization module 130 writes the initialization voltage Vrefn to the anode of the light-emitting device 150. The initialization voltage Vrefn provided by the multiplexed signal line 100 to the initialization module 130 during the initialization phase may be the same as or different from the cathode voltage VSS provided to the cathode of the light-emitting device 150 during the light-emitting phase. The voltage signal on the multiplexed signal line 100 is controlled according to actual needs. Both the initialization voltage Vrefn and the cathode voltage VSS are negative voltages. Optionally, the absolute value of the initialization voltage Vrefn provided by the multiplexed signal line 100 to the initialization module 130 during the initialization phase is set to be smaller than the absolute value of the cathode voltage VSS provided to the cathode of the light-emitting device 150 during the light-emitting phase. Setting the cathode voltage VSS to a negative voltage can prevent the light-emitting device 150 from emitting light during the non-light-emitting phase.

[0064] The input end of the initialization module 130 of the pixel circuit of each sub-pixel and the cathode of the light-emitting device 150 are electrically connected to a multiplexed signal line 100; the multiplexed signal line 100 provides the initialization voltage Vrefn to the initialization module 130 in the initialization phase, and provides the cathode voltage VSS to the cathode of the light-emitting device 150 in the light-emitting phase, so that the cathode wiring and the initialization signal line are shared, and there is no need to set separate cathode wiring and separate initialization signal lines for sub-pixels of different colors in the display panel, thereby reducing the number of wirings in the display panel and improving the problem of complex wiring under independent cathode control of different seed pixels in the display panel.

[0065] The display panel provided by the embodiment of the present application includes a display area and a non-display area that at least partially surrounds the display area; the display area includes multiple sub-pixels, and the non-display area includes at least one multiplexed signal line; the sub-pixels include a pixel circuit and a light-emitting device; the pixel circuit includes a driving module, an initialization module, a data writing module and a storage module; the data writing module is configured to transmit a data voltage to the driving module; the storage module is configured to store the data voltage of the control end of the driving module; the driving module is configured to generate a driving current according to the data voltage to drive the light-emitting device to emit light; the initialization module is configured to write an initialization voltage to the control end of the driving module and / or the anode of the light-emitting device; the input end of the initialization module of the pixel circuit of each sub-pixel and the cathode of the light-emitting device are electrically connected to a multiplexed signal line; the multiplexed signal line is configured to provide an initialization voltage to the initialization module in the initialization stage, and to provide a cathode voltage to the cathode of the light-emitting device in the light-emitting stage, thereby reducing the number of wirings and the wiring difficulty of the display panel.

[0066] In one embodiment of the present application, FIG5 is a schematic diagram of the structure of another display panel provided in an embodiment of the present application, and FIG6 is a schematic diagram of the structure of another pixel circuit provided in an embodiment of the present application. With reference to FIG5 and FIG6 , the non-display area 12 optionally further includes a light-emission control driver circuit 30. The driver circuit layer includes multiple light-emission control signal lines (e1 to eo), and the light-emission control driver circuit 30 is electrically connected to the multiple light-emission control signal lines (e1 to eo). The pixel circuit includes a light-emission control module; the light-emission control module, the driver module 110, and the light-emitting device 150 are electrically connected between a power signal line and a multiplexing signal line 100. The light-emission control signal EM on the light-emission control signal line is used to control the conduction state of the light-emission control module, so that the driver module 110 can transmit a driving current to the light-emitting device 150, driving the light-emitting device 150 to emit light. The pixel circuit also includes a threshold compensation module 160 electrically connected between the second terminal of the driver module 110 and the control terminal G. The control terminal of the threshold compensation module 160 receives the same scanning signal as the control terminal of the data writing module 120.

[0067] The light control module may include a first light control module 171 and a second light control module 172. A first terminal of the first light control module 171 is electrically connected to a power signal line and is configured to receive a power supply voltage VDD. A second terminal of the first light control module 171 is electrically connected to a first terminal of the driver module 110, and a second terminal of the driver module 110 is electrically connected to a first terminal of the second light control module 172. A second terminal of the second light control module 172 is electrically connected to the anode of the light-emitting device 150. A light control signal line is electrically connected to the control terminals of the first light control module 171 and the second light control module 172. When both the first light control module 171 and the second light control module 172 are turned on, the power signal line is electrically connected to the anode of the light-emitting device 150.

[0068] FIG7 is a schematic diagram of the structure of another pixel circuit provided in an embodiment of the present application. Referring to FIG7 , the driving module 110 includes a driving transistor T1, the data writing module 120 includes a data writing transistor T2, and the storage module 140 includes a storage capacitor C1. The emission control module includes a first emission control transistor T5 and a second emission control transistor T6. The threshold compensation module 160 includes threshold compensation transistors, which are dual-gate transistors and include a first threshold compensation transistor T3-1 and a second threshold compensation transistor T3-2.

[0069] In one embodiment of the present application, referring again to Figures 3 and 6 , the initialization module 130 optionally includes: a first initialization module 131 and / or a second initialization module 132. A first end of the first initialization module 131 is electrically connected to the multiplexing signal line 100, a second end of the first initialization module 131 is electrically connected to the anode of the light-emitting device 150, and a control end of the first initialization module 131 is configured to receive a first gate signal. A first end of the second initialization module 132 is electrically connected to the multiplexing signal line 100, a second end of the second initialization module 132 is electrically connected to the control end G of the driving module 110, and a control end of the second initialization module 132 is configured to receive a second gate signal.

[0070] The first initialization module 131 is configured to write an initialization voltage Vrefn to the anode of the light-emitting device 150. The second initialization module 132 is configured to write an initialization voltage Vrefn to the control terminal of the driving module 110. Referring to FIG7 , the first initialization module 131 may include a first initialization transistor T7, a first electrode of the first initialization transistor T7 being electrically connected to the multiplexing signal line 100, a second electrode of the first initialization transistor T7 being electrically connected to the anode of the light-emitting device 150, and a gate of the first initialization transistor T7 being configured to receive a first gate signal. 9 , illustratively, when the anode of the light-emitting device 150 is reset, the light-emitting control signal EM is at a high level, and the first light-emitting control transistor T5, the second light-emitting control transistor T6, and the third light-emitting control transistor T8 are turned off; the first gate signal (the third scan signal Scan3) is at a low level, the first initialization transistor T7 is turned on, and the multiplexing signal line 100 inputs the initialization voltage Vrefn to reset the anode of the light-emitting device 150; when the light-emitting device 150 emits light, the light-emitting control signal EM is at a low level, the first gate signal (the third scan signal Scan3) is at a high level, the first initialization transistor T7 is turned off, the first light-emitting control transistor T5, the second light-emitting control transistor T6, and the third light-emitting control transistor T8 are turned on, the multiplexing signal line 100 inputs VSS, and the cathode voltage VSS is provided to the cathode of the light-emitting device 150.

[0071] The second initialization module 132 may include a second initialization transistor. The second initialization transistor is a dual-gate transistor including a first sub-transistor T4-2 and a second sub-transistor T4-1. The first electrode of the first sub-transistor T4-2 is electrically connected to the multiplexing signal line 100, the second electrode of the first sub-transistor T4-2 is electrically connected to the first electrode of the second sub-transistor T4-1, and the second electrode of the second sub-transistor T4-1 is electrically connected to the control terminal G of the driving module 110. The gate of the first sub-transistor T4-2 and the gate of the second sub-transistor T4-1 receive the same second gate signal (first scan signal Scan1). When the control terminal G of the driving transistor T1 is initialized, the light control signal EM is at a high level, the first light control transistor T5, the second light control transistor T6, and the third light control transistor T8 are turned off, the first scan signal Scan1 controls the conduction of the first sub-transistor T4-2 and the second sub-transistor T4-1, and the multiplexing signal line 100 inputs the initialization voltage Vrefn to initialize the control terminal G of the driving transistor T1.

[0072] The control end of the first initialization module 131 and the control end of the second initialization module 132 can be electrically connected to the same gate signal line as shown in FIG3 , so that the first initialization module 131 and the second initialization module 132 can be turned on at the same time, that is, the first gate signal and the second gate signal are the same. The control end of the first initialization module 131 and the control end of the second initialization module 132 can also be electrically connected to different scan signal lines as shown in FIG6 , so that the first initialization module 131 and the second initialization module 132 can be turned on at different times, that is, the first gate signal and the second gate signal are different.

[0073] In one embodiment of the present application, please continue to refer to Figures 2 to 4. Optionally, the multiple sub-pixels include a first sub-pixel, a second sub-pixel and a third sub-pixel; the multiple multiplexed signal lines 100 include a first multiplexed signal line a, a second multiplexed signal line b and a third multiplexed signal line c; the input end of the initialization module 130 of the pixel circuit of the first sub-pixel and the cathode of the light-emitting device 150 are electrically connected to the first multiplexed signal line a; the input end of the initialization module 130 of the pixel circuit of the second sub-pixel and the cathode of the light-emitting device 150 are electrically connected to the second multiplexed signal line b; the input end of the initialization module 130 of the pixel circuit of the third sub-pixel and the cathode of the light-emitting device 150 are electrically connected to the third multiplexed signal line c.

[0074] The display panel includes different types of sub-pixels, each of which can be understood as emitting different colors. Multiple multiplexed signal lines 100 are provided in the non-display area 12. The input of the initialization module 130 and the cathode of the light-emitting device 150 in the pixel circuit of each sub-pixel are electrically connected to a multiplexed signal line 100. Multiplexed signal line 100 is configured to provide an initialization voltage Vrefn to the initialization module 130 during the initialization phase and to provide a cathode voltage VSS to the cathode of the light-emitting device 150 during the light-emitting phase.

[0075] The first, second, and third subpixels emit different colors. For example, the first subpixel is configured to emit red light, the second subpixel is configured to emit green light, and the third subpixel is configured to emit blue light. Accordingly, the multiple multiplexed signal lines include a first multiplexed signal line a, a second multiplexed signal line b, and a third multiplexed signal line c. The input terminal of the initialization module 130 of the pixel circuit of the first subpixel and the cathode of the light-emitting device 150 are electrically connected to the first multiplexed signal line a. The first multiplexed signal line a provides an initialization voltage Vrefn to the initialization module 130 of the first subpixel during the initialization phase, and a cathode voltage VSS to the cathode of the light-emitting device 150 during the light-emitting phase. The input terminal of the initialization module 130 of the pixel circuit of the second subpixel and the cathode of the light-emitting device 150 are electrically connected to the second multiplexed signal line b. The second multiplexed signal line b provides an initialization voltage Vrefn to the initialization module 130 of the second subpixel during the initialization phase, and a cathode voltage VSS to the cathode of the light-emitting device 150 during the light-emitting phase. The input terminal of the initialization module 130 of the pixel circuit of the third subpixel and the cathode of the light-emitting device 150 are electrically connected to the third multiplexed signal line c. The third multiplexed signal line c provides an initialization voltage Vrefn to the initialization module 130 of the third subpixel during the initialization phase, and provides a cathode voltage VSS to the cathode of the light-emitting device 150 during the light-emitting phase. By providing the first multiplexed signal line a, the second multiplexed signal line b, and the third multiplexed signal line c, the cathode voltage VSS of the first, second, and third subpixels can be independently controlled, and the initialization voltage Vrefn of the first, second, and third subpixels can be independently controlled.

[0076] The non-display area 12 may be provided with a first multiplexed signal line a, a second multiplexed signal line b, and a third multiplexed signal line c. All first sub-pixels are electrically connected to the same first multiplexed signal line a, all second sub-pixels are electrically connected to the same second multiplexed signal line b, and all third sub-pixels are electrically connected to the same third multiplexed signal line c. This further reduces the number of wirings in the non-display area 12 of the display panel, facilitating the development of a narrow-frame display panel.

[0077] Alternatively, the non-display area 12 may be provided with at least two first multiplexing signal lines a, at least two second multiplexing signal lines b, and at least two third multiplexing signal lines c. Each first multiplexing signal line a is electrically connected to a portion of the first sub-pixels, so that the first sub-pixels in the display panel can be controlled by a partition. Each second multiplexing signal line b is electrically connected to a portion of the second sub-pixels, so that the second sub-pixels in the display panel can be controlled by a partition. Each first multiplexing signal line a is electrically connected to a portion of the first sub-pixels, so that the first sub-pixels in the display panel can be controlled by a partition.

[0078] Optionally, the at least one multiplexing signal line includes a plurality of multiplexing signal lines 100 , and the plurality of multiplexing signal lines 100 respectively provide different cathode voltages VSS to cathodes of the light-emitting devices 150 in the plurality of sub-pixels.

[0079] For example, different cathode voltages VSS and initialization voltages Vrefn can be provided to sub-pixels of different luminous colors as needed, thereby reducing the power consumption of the display panel and alleviating the power consumption problem caused by using the same cathode voltage across the entire display panel. Furthermore, by reusing signal line 100 to replace the cathode wiring and initialization signal line, the cathode wiring and initialization signal line are shared, reducing the number of wirings in the display panel, thereby alleviating the complex wiring problem caused by independent cathode control of different sub-pixels in the display panel.

[0080] In addition, Figure 8 is a schematic structural diagram of a cathode layer in a display panel provided by one embodiment. Referring to Figure 8 , the cathode in the OLED display panel is a common cathode. Subpixels across the entire surface use the same cathode layer 101. The cathode voltages of the subpixels are the same, while subpixels of different colors may require different cathode voltages. Therefore, using the same cathode voltage sacrifices some power consumption. Furthermore, the common cathode also forces all subpixels across the entire surface to use the same initialization voltage, while subpixels of different colors may require different initialization voltages. Therefore, using the same initialization voltage also sacrifices some power consumption.

[0081] In the embodiment of the present application, the input end of the initialization module 130 of the pixel circuit of each sub-pixel and the cathode of the light-emitting device 150 are electrically connected to a multiplexed signal line 100; different sub-pixels are electrically connected to different multiplexed signal lines 100. The multiplexed signal line 100 provides an initialization voltage Vrefn to the initialization module 130 during the initialization phase, and provides a cathode voltage VSS to the cathode of the light-emitting device 150 during the light-emitting phase. This allows the initialization voltage Vrefn of sub-pixels of different luminous colors to be independently controlled, and the cathode voltage VSS of sub-pixels of different luminous colors to be independently controlled. Thus, different cathode voltages VSS and different initialization voltages Vrefn can be provided to sub-pixels of different luminous colors as needed, thereby reducing the power consumption of the display panel and improving the power consumption problem caused by using the same cathode voltage across the entire display panel. Furthermore, by reusing the signal line 100 to replace the cathode wiring and the initialization signal line, the cathode wiring and the initialization signal line are shared, and there is no need to separately set cathode wiring and initialization signal lines for sub-pixels of different colors in the display panel. This solves the power consumption problem caused by different seed pixels using the same cathode voltage VSS and the same initialization voltage Vrefn, reduces the number of wirings in the display panel, and improves the problem of complex wiring under independent cathode control of different seed pixels in the display panel.

[0082] In one embodiment of the present application, referring to FIG4 , optionally, the plurality of multiplexed signal lines 100 are electrically connected to different output terminals of the driver chip 20. It can be understood that the initialization voltage Vrefn and the cathode voltage VSS on the first multiplexed signal line a, the second multiplexed signal line b, and the third multiplexed signal line c are provided by the driver chip 20. The driving chip 20 can provide the initialization voltage Vrefn required by the first sub-pixel to the first multiplexed signal line a during the initialization stage of the first sub-pixel, and provide the cathode voltage VSS required by the first sub-pixel to the first multiplexed signal line a during the light-emitting stage of the first sub-pixel. In addition, the driving chip 20 can provide the initialization voltage Vrefn required by the second sub-pixel to the second multiplexed signal line b during the initialization stage of the second sub-pixel, and provide the cathode voltage VSS required by the second sub-pixel to the second multiplexed signal line b during the light-emitting stage of the second sub-pixel. In addition, the driving chip 20 can provide the initialization voltage Vrefn required by the third sub-pixel to the third multiplexed signal line c during the initialization stage of the third sub-pixel, and provide the cathode voltage VSS required by the third sub-pixel to the third multiplexed signal line c during the light-emitting stage of the third sub-pixel.

[0083] In one embodiment of the present application, the light-emitting control module is optionally configured to control the conduction between the light-emitting device 150 and the power signal line, and to control the conduction between the light-emitting device 150 and the multiplexed signal line 100 during the light-emitting phase. It can be understood that the light-emitting control module can control the conduction between the light-emitting device 150 and the multiplexed signal line 100 in addition to controlling the conduction between the light-emitting device 150 and the power signal line. By controlling the conduction between the cathode of the light-emitting device 150 and the multiplexed signal line 100 through the light-emitting control module, when the initialization module 130 provides the initialization voltage Vrefn to the anode of the light-emitting device 150, the light-emitting control module can control the cathode of the light-emitting device 150 to be disconnected from the multiplexed signal line 100, thereby preventing the light-emitting device 150 from emitting light during the non-light-emitting phase due to problems such as transistor leakage in the pixel circuit, thereby affecting the display effect of the display panel.

[0084] FIG9 is a schematic diagram of the structure of another pixel circuit provided by an embodiment of the present application. Referring to FIG9 , the light control module includes a first light control transistor T5, a second light control transistor T6, and a third light control transistor T8. A first electrode of the first light control transistor T5 is electrically connected to a power signal line, a second electrode of the first light control transistor T5 is electrically connected to a first terminal of a driver module 110 (driver transistor T1), and a second terminal of the driver module 110 is electrically connected to a first electrode of the second light control transistor T6. A second electrode of the second light control transistor T6 is electrically connected to an anode of a light emitting device 150. A first electrode of the third light control transistor T8 is electrically connected to a cathode of the light emitting device 150, and a second electrode of the third light control transistor T8 is electrically connected to a reset signal line 100. The gates of the first light control transistor T5, the second light control transistor T6, and the third light control transistor T8 are all electrically connected to a light control signal line, so that a light control signal EM on the light control signal line can simultaneously control the on / off states of the first light control transistor T5, the second light control transistor T6, and the third light control transistor T8.

[0085] In one embodiment of the present application, the cathodes of the light-emitting devices 150 in some sub-pixels are optionally electrically connected, and the light-emitting devices 150 in some sub-pixels emit light of the same color. It can be understood that the cathodes of some light-emitting devices 150 in the display panel are electrically connected, and some of the light-emitting devices 150 emit light of the same color. This allows the cathodes of at least some of the light-emitting devices 150 that emit light of the same color to receive the same cathode voltage VSS, and a multiplexed signal line 100 can provide the cathode voltage VSS to at least some of the light-emitting devices 150 that emit light of the same color. Optionally, the cathodes of some of the light-emitting devices 150 are connected together to form a cathode strip; or, the cathodes of some of the light-emitting devices 150 are electrically connected via a connecting line. Exemplarily, the cathodes of some of the light-emitting devices 150 are connected together to form a cathode strip, so that the multiplexed signal line 100 is electrically connected to the cathode strip. Thus, the cathode voltage VSS is provided to at least some of the light-emitting devices 150 that emit light of the same color via the cathode strip. Alternatively, the cathode of the light-emitting device 150 is a separate cathode, and the cathodes of some of the light-emitting devices 150 are electrically connected through a connecting line, so that after the multiplexed signal line 100 is electrically connected to the connecting line or the cathode of one of the light-emitting devices 150, the cathode voltage VSS on the multiplexed signal line 100 can be transmitted to the cathodes of at least some of the light-emitting devices 150 with the same luminous color through the connecting line between the cathodes of some of the light-emitting devices 150.

[0086] In one embodiment of the present application, optionally, the cathode strips include multiple first cathode strips, multiple second cathode strips and multiple third cathode strips; the sub-pixels are arranged in an array; the luminous colors of all first sub-pixels are the same, the luminous colors of all second sub-pixels are the same, and the luminous colors of all third sub-pixels are the same; the cathodes of the light-emitting devices 150 in the first sub-pixels located in the same column are connected as a whole to form a first cathode strip, and each first cathode strip is electrically connected to the first multiplexing signal line a in the non-display area 12 of the display panel; the cathodes of the light-emitting devices 150 in the second sub-pixels located in the same column are connected as a whole to form a second cathode strip, and each second cathode strip is electrically connected to the second multiplexing signal line b in the non-display area 12 of the display panel; the cathodes of the light-emitting devices 150 in the third sub-pixels located in the same column are connected as a whole to form a third cathode strip, and each third cathode strip is electrically connected to the third multiplexing signal line c in the non-display area 12 of the display panel.

[0087] The light-emitting devices 150 in the first sub-pixels in the same column are electrically connected to a common first cathode stripe, and each first cathode stripe is electrically connected to the first multiplexing signal line a in the non-display area 12 of the display panel. Thus, the cathode voltage VSS on the first multiplexing signal line a can be supplied to the cathodes of the light-emitting devices 150 in all the first sub-pixels on the entire surface via the first cathode stripe. The light-emitting devices 150 in the second sub-pixels in the same column are electrically connected to a common second cathode stripe, and each second cathode stripe is electrically connected to the second multiplexing signal line b in the non-display area 12 of the display panel. Thus, the cathode voltage VSS on the second multiplexing signal line b can be supplied to the cathodes of the light-emitting devices 150 in all the second sub-pixels on the entire surface via the second cathode stripe. The light-emitting devices 150 in the third sub-pixels in the same column are electrically connected to a common third cathode stripe, and each third cathode stripe is electrically connected to the third multiplexing signal line c in the non-display area 12 of the display panel. Thus, the cathode voltage VSS on the third multiplexing signal line c can be supplied to the cathodes of the light-emitting devices 150 in all the third sub-pixels on the entire surface via the third cathode stripe.

[0088] Optionally, in each sub-pixel, the input end of the initialization module 130 is electrically connected to the cathode of the light-emitting device 150 through a via hole, or is electrically connected to the same cathode strip as the light-emitting device 150 .

[0089] The display panel includes a substrate, a driving circuit layer disposed on the substrate, and a light-emitting structure layer disposed on a side of the driving circuit layer away from the substrate. The light-emitting structure layer includes a plurality of light-emitting devices 150. Each light-emitting device 150 includes an anode disposed on the driving circuit layer, a light-emitting material layer disposed on a side of the anode away from the substrate, and a cathode disposed on a side of the light-emitting material layer away from the substrate. When the cathodes of some light-emitting devices 150 are electrically connected via a connecting wire, the first end of the initialization module 130 in each sub-pixel can be electrically connected to the cathode of the light-emitting device 150 via a via. After the cathode of the light-emitting device 150 receives the initialization voltage Vrefn transmitted by the multiplexing signal line 100, the initialization voltage Vrefn can be transmitted through the cathode of the light-emitting device 150 and through the via to the input end of the initialization module 130. Alternatively, when the cathodes of some light-emitting devices 150 are connected together to form a cathode strip, the input end of the initialization module 130 in each sub-pixel can be electrically connected to the same cathode strip as the light-emitting device 150, and the input end of the initialization module 130 can directly receive the initialization voltage Vrefn on the cathode strip.

[0090] In another embodiment of the present application, optionally, the display panel also includes a plurality of signal transmission lines located in the display area 11, each signal transmission line is electrically connected to the cathode of the light-emitting device 150 in a row or a column of sub-pixels, and each signal transmission line is electrically connected to a multiplexed signal line 100, and the multiplexed signal line 100 transmits the cathode voltage VSS to the cathode of the light-emitting device 150 through the signal transmission line.

[0091] The signal transmission line may be, for example, an initialization signal line, which is connected to the multiplexing signal line 100 located in the non-display area 12, so that the initialization voltage Vrefn on the multiplexing signal line 100 can be transmitted to the initialization module 130 in the pixel circuit during the initialization phase. The input end of the initialization module 130 is electrically connected to the cathode of the light-emitting device 150 through a via, thereby achieving electrical connection between each initialization signal line and the cathode of the light-emitting device 150 in a row or column of sub-pixels, and further, the cathode voltage VSS on the multiplexing signal line 100 can be transmitted to the cathode of the light-emitting device 150 through the initialization signal line during the light-emitting phase.

[0092] The present application also provides a method for driving a display panel, which is used to drive the display panel described in any of the above embodiments. FIG10 is a flow chart of a method for driving a display panel provided in an embodiment of the present application. Referring to FIG10 and in combination with FIG3 , the method for driving a display panel includes:

[0093] S110 , in the initialization stage, turning on the initialization module to control the multiplexed signal line to provide an initialization voltage to the anode of the light-emitting module and / or the control terminal of the driving module.

[0094] During the initialization phase, initialization module 130 is turned on by a scan signal on a scan signal line, controlling multiplexing signal line 100 to provide initialization voltage Vrefn to the anode of light-emitting device 150 and / or control terminal G of driver module 110. Initialization module 130 may include a first initialization module 131 and / or a second initialization module 132. A first terminal of first initialization module 131 is electrically connected to multiplexing signal line 100, a second terminal of first initialization module 131 is electrically connected to the anode of light-emitting device 150, and a control terminal of first initialization module 131 is configured to receive a first gate signal. A first terminal of second initialization module 132 is electrically connected to multiplexing signal line 100, a second terminal of second initialization module 132 is electrically connected to control terminal G of driver module 110, and a control terminal of second initialization module 132 is configured to receive a second gate signal. The control terminals of first initialization module 131 and second initialization module 132 may be electrically connected to the same scan signal line, allowing both first and second initialization modules 131 and 132 to be turned on simultaneously. The control end of the first initialization module 131 and the control end of the second initialization module 132 can also be electrically connected to different scan signal lines, so that the first initialization module 131 and the second initialization module 132 can be turned on at different times. In the embodiment of the present application, referring to Figure 3, the control end of the first initialization module 131 and the control end of the second initialization module 132 are both input with the first scan signal Scan1, so that the first initialization module 131 and the second initialization module 132 are turned on at the same time.

[0095] S120 , in the data writing phase, controlling the data writing module to transmit the data voltage to the driving module.

[0096] During the data writing phase, the initialization module 130 is turned off by the first scan signal Scan1 on the first scan signal line. The data writing module 120 is turned on by the second scan signal Scan2 on the second scan signal line. The data writing module 120 can write the data voltage Data on the data signal line to the control terminal G of the driving module 110. The storage module 140 is electrically connected to the control terminal G of the driving module 110 and can store the voltage at the control terminal G of the driving module 110.

[0097] S130. In the light-emitting stage, disconnect the initialization module, control the multiplexed signal line to provide a cathode voltage to the cathode of the light-emitting device, and control the driving module to output a driving current to the light-emitting device to drive the light-emitting device to emit light.

[0098] During the light-emitting phase, the initialization module 130 is disconnected by the first scan signal Scan1 on the first scan signal line. The data writing module 120 is disconnected by the second scan signal Scan2 on the second scan signal line. The multiplexing signal line 100 is controlled to provide a cathode voltage VSS to the cathode of the light-emitting device 150, and the driver module 110 outputs a driving current to the light-emitting device 150. The input terminal of the initialization module 130 and the cathode of the light-emitting device 150 in the pixel circuit of each sub-pixel are electrically connected to a multiplexing signal line 100. The multiplexing signal line 100 provides the initialization voltage Vrefn to the initialization module 130 during the initialization phase, and the cathode voltage VSS to the cathode of the light-emitting device 150 during the light-emitting phase. This allows the cathode voltage VSS and initialization voltage Vrefn of sub-pixels of different luminous colors to be independently controlled. Different cathode voltages VSS and initialization voltages Vrefn can be provided to sub-pixels of different luminous colors as needed, reducing the power consumption of the display panel and improving the power consumption problem caused by using a single cathode voltage across the entire display panel. Furthermore, by multiplexing the signal line 100 to replace the cathode wiring and the initialization signal line, the cathode wiring and the initialization signal line are shared, and there is no need to separately set cathode wiring and separate initialization signal lines for sub-pixels of different colors in the display panel. In addition, by transmitting different cathode voltages and initialization voltages to different partitions, the power consumption problem caused by using the same cathode voltage and the same initialization voltage is solved, and the number of wirings in the display panel is reduced, thereby improving the problem of complex wiring under independent cathode control of different seed pixels in the display panel.

[0099] FIG11 is a flow chart of another method for driving a display panel provided in an embodiment of the present application. Referring to FIG11 and in combination with FIG9 , the method for driving a display panel includes:

[0100] S210 , in a first initialization phase, turning on a first initialization module to control a multiplexed signal line to provide an initialization voltage to a control terminal of a driving module.

[0101] S220 , in the data writing phase, controlling the data writing module to transmit the data voltage to the driving module.

[0102] S230 , in the second initialization stage, turning on the second initialization module to control the multiplexed signal line to provide an initialization voltage to the anode of the light-emitting module.

[0103] S240 . In the light-emitting stage, the light-emitting control module is turned on to control the multiplexed signal line to provide a cathode voltage to the cathode of the light-emitting device, and the driving module is controlled to output a driving current to the light-emitting device to drive the light-emitting device to emit light.

[0104] The pixel circuit of the sub-pixel also includes a light-emitting control module; the light-emitting control module, the driver module 110, and the light-emitting device 150 are electrically connected between the power signal line and the multiplexed signal line 100. The light-emitting control module is configured to control the conductive state between the light-emitting device 150 and the power signal line, as well as the conductive state between the light-emitting device 150 and the multiplexed signal line 100. Controlling the multiplexed signal line 100 to provide a cathode voltage VSS to the cathode of the light-emitting device 150 and controlling the driver module 110 to output a driving current to the light-emitting device 150 includes: controlling the light-emitting control module to conduct, so that the multiplexed signal line 100 and the cathode of the light-emitting device 150 are conductive, so that the cathode voltage VSS is transmitted to the cathode of the light-emitting device 150 through the multiplexed signal line 100; and controlling the light-emitting control module to conduct, so that the power signal line and the driver module 110 are electrically connected, and the driver module 110 is electrically connected to the anode of the light-emitting device 150, so that the driving current is output to the light-emitting device 150 through the driver module 110.

[0105] Optionally, referring to FIG9 , the light control module may include a first light control transistor T5, a second light control transistor T6, and a third light control transistor T8. A first electrode of the first light control transistor T5 is electrically connected to a power signal line, a second electrode of the first light control transistor T5 is electrically connected to a first terminal of the driver module 110 (driver transistor T1), and a second terminal of the driver module 110 is electrically connected to a first electrode of the second light control transistor T6. A second electrode of the second light control transistor T6 is electrically connected to the anode of the light emitting device 150. A first electrode of the third light control transistor T8 is electrically connected to the cathode of the light emitting device 150, and a second electrode of the third light control transistor T8 is electrically connected to a reset signal line 100. The gates of the first light control transistor T5, the second light control transistor T6, and the third light control transistor T8 are all electrically connected to a light control signal line, so that a light control signal EM on the light control signal line can simultaneously control the on / off of the first light control transistor T5, the second light control transistor T6, and the third light control transistor T8. The cathode of the light-emitting device 150 is disconnected from the multiplexed signal line 100 by controlling the third light-emitting control transistor T8 to prevent the light-emitting device 150 from emitting light in the non-light-emitting stage due to problems such as transistor leakage in the pixel circuit, thereby affecting the display effect of the display panel.

[0106] FIG12 is a schematic structural diagram of a display device provided in an embodiment of the present application. Referring to FIG12 , an embodiment of the present application further provides a display device including the display panel 1 described in any of the above embodiments, which has the same technical effects and will not be described in detail here.

Claims

1. A display panel comprising a display area, a non-display area at least partially surrounding the display area, a plurality of sub-pixels and at least one multiplexed signal line; The plurality of sub-pixels are located in the display area; each sub-pixel includes a pixel circuit and a light-emitting device; the pixel circuit includes a driving module, an initialization module, a data writing module and a storage module; the data writing module is configured to transmit a data voltage to the driving module; the storage module is configured to store a voltage at a control terminal of the driving module; the driving module is configured to generate a driving current according to the voltage at the control terminal to drive the light-emitting device to emit light; the initialization module is configured to write an initialization voltage to at least one of the control terminal of the driving module and the anode of the light-emitting device; The input end of the initialization module of the pixel circuit of each sub-pixel and the cathode of the light-emitting device are electrically connected to a multiplexed signal line; each multiplexed signal line is configured to provide the initialization voltage to the connected initialization module during the initialization phase, and to provide a cathode voltage to the cathode of the connected light-emitting device during the light-emitting phase.

2. The display panel according to claim 1, wherein: The plurality of sub-pixels include a first sub-pixel, a second sub-pixel, and a third sub-pixel; the at least one multiplexed signal line includes a first multiplexed signal line, a second multiplexed signal line, and a third multiplexed signal line; An input terminal of the initialization module of the pixel circuit of the first sub-pixel and a cathode of the light-emitting device are electrically connected to the first multiplexed signal line; An input terminal of the initialization module of the pixel circuit of the second sub-pixel and a cathode of the light-emitting device are electrically connected to the second multiplexed signal line; The input terminal of the initialization module of the pixel circuit of the third sub-pixel and the cathode of the light-emitting device are electrically connected to the third multiplexing signal line.

3. The display panel according to claim 1, wherein: The at least one multiplexed signal line includes a plurality of multiplexed signal lines, and the plurality of multiplexed signal lines are set to at least one of the following situations: Providing different cathode voltages to cathodes of light-emitting devices of different seed pixels respectively; Respectively electrically connected to different output terminals of the driver chip; Different initialization voltages are transmitted to the input terminals of the initialization modules of different seed pixels respectively.

4. The display panel according to claim 1, wherein: The pixel circuit of each sub-pixel also includes a light-emitting control module; the light-emitting control module, the driving module and the light-emitting device are connected between the power signal line and the one multiplexed signal line, and the light-emitting control module is configured to control the conduction between the light-emitting device and the power signal line during the light-emitting stage, and control the conduction between the light-emitting device and the connected multiplexed signal line.

5. The display panel according to claim 4, wherein: The light-emitting control module includes a first light-emitting control transistor, a second light-emitting control transistor and a third light-emitting control transistor; a first electrode of the first light-emitting control transistor is connected to the power signal line, a second electrode of the first light-emitting control transistor is connected to a first end of the driving module, and a second end of the driving module is connected to a first electrode of the second light-emitting control transistor; a second electrode of the second light-emitting control transistor is connected to an anode of the light-emitting device; a first electrode of the third light-emitting control transistor is connected to a cathode of the light-emitting device, and a second electrode of the third light-emitting control transistor is connected to the one multiplexing signal line; A gate of the first light emission control transistor, a gate of the second light emission control transistor, and a gate of the third light emission control transistor are all connected to a light emission control signal line.

6. The display panel according to claim 1, wherein: The initialization module includes at least one of a first initialization module and a second initialization module: A first end of the first initialization module is electrically connected to the one multiplexed signal line, a second end of the first initialization module is electrically connected to the anode of the light emitting device, and a control end of the first initialization module is configured to receive a first gate signal; A first end of the second initialization module is electrically connected to the one multiplexed signal line, a second end of the second initialization module is electrically connected to a control end of the driving module, and the control end of the second initialization module is configured to receive a second gate signal.

7. The display panel according to claim 2, wherein: The cathodes of the light emitting devices of some of the sub-pixels are electrically connected, so that the light emitting devices with the cathodes electrically connected are arranged to emit light of the same color.

8. The display panel according to claim 2, wherein: The cathodes of the light-emitting devices of some of the sub-pixels among the plurality of sub-pixels are connected as a whole to form a cathode strip; or the cathodes of the light-emitting devices of some of the sub-pixels are electrically connected via a connecting wire.

9. The display panel according to claim 8, wherein: The cathode strips include a plurality of first cathode strips, a plurality of second cathode strips, and a plurality of third cathode strips; the plurality of sub-pixels are arranged in an array; the first sub-pixels in the plurality of sub-pixels emit the same color, the second sub-pixels in the plurality of sub-pixels emit the same color, and the third sub-pixels in the plurality of sub-pixels emit the same color; The cathodes of the light emitting devices in the first sub-pixels in the same column are connected as a whole to form a first cathode strip, and each first cathode strip is electrically connected to the first multiplexed signal line in the non-display area of ​​the display panel; The cathodes of the light emitting devices in the second sub-pixels in the same column are connected as a whole to form a second cathode strip, and each second cathode strip is electrically connected to the second multiplexed signal line in the non-display area of ​​the display panel; The cathodes of the light emitting devices in the third sub-pixels of the same column are connected as a whole to form a third cathode strip, and each third cathode strip is electrically connected to the third multiplexed signal line in the non-display area of ​​the display panel.

10. The display panel according to claim 8, wherein: The first end of the initialization module in each sub-pixel is electrically connected to the cathode of the light-emitting module in each sub-pixel through a via hole, or is electrically connected to the same cathode strip as the light-emitting device in each sub-pixel.

11. The display panel according to claim 1 further includes a plurality of signal transmission lines located in the display area, each signal transmission line is electrically connected to the cathode of the light-emitting device in a row or a column of sub-pixels, and each signal transmission line is electrically connected to a multiplexed signal line, and the multiplexed signal line is configured to transmit a cathode voltage to the cathode of the light-emitting device through the signal transmission line.

12. A method for driving a display panel, for driving the display panel according to any one of claims 1 to 11, comprising: In the initialization stage, the initialization module is turned on to control the multiplexed signal line to provide an initialization voltage to at least one of the anode of the light-emitting module and the control terminal of the driving module; In the data writing stage, controlling the data writing module to transmit a data voltage to the driving module; In the light-emitting stage, the initialization module is disconnected, the multiplexed signal line is controlled to provide a cathode voltage to the cathode of the light-emitting device, and the driving module is controlled to output a driving current to the light-emitting device to drive the light-emitting device to emit light.

13. The method for driving a display panel according to claim 12, wherein: The controlling the multiplexed signal line to provide a cathode voltage to the cathode of the light emitting device, and controlling the driving module to output a driving current to the light emitting device to drive the light emitting device to emit light comprises: Controlling the light emitting control module included in the pixel circuit to be turned on, so that the multiplexed signal line and the cathode of the light emitting device are electrically connected, so as to transmit the cathode voltage to the cathode of the light emitting device through the multiplexed signal line; Controlling the light-emitting control module to be turned on, so that the power signal line is electrically connected to the driving module and the driving module is electrically connected to the anode of the light-emitting device, so as to output a driving current to the light-emitting device through the driving module; Wherein, the light emitting control module, the driving module and the light emitting device are connected between the power signal line and the multiplexing signal line.

14. A display device comprising the display panel according to any one of claims 1 to 11.

Images