Display panel and display apparatus

By forming raised portions at the edges of the flat layer of the transparent display panel, the problem of dark spot defects caused by pixel breakage was solved, thus improving the product yield.

WO2024255541A1PCT designated stage expired Publication Date: 2024-12-19BOE TECHNOLOGY GROUP CO LTD +1
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Patent Information

Application Number
PCT/CN2024/094321
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-06-13
Filing Date
2024-05-21
Publication Date
2024-12-19

AI Technical Summary

Technical Problem

Dark spots caused by pixels not displaying properly in existing transparent display panels affect product yield.

Method used

A protrusion is formed at the edge of the planarization layer near the substrate side to reduce the tilt angle at the edge of the planarization layer, making the slope gentler, reducing the difficulty of the first electrode climbing the slope, and avoiding breakage.

Benefits of technology

It effectively reduces the risk of first electrode breakage, reduces dark spot defects, and improves product yield.

✦ Generated by Eureka AI based on patent content.

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Abstract

Disclosed in the embodiments of the present disclosure are a display panel and a display apparatus. In a specific embodiment, the display panel comprises a substrate and a plurality of pixels arranged in an array on the substrate, wherein each pixel comprises a light-emitting region and a transparent region; the light-emitting region comprises a driving circuit layer, a planarization layer, a first electrode, a light-emitting layer and a second electrode, which are sequentially arranged on the substrate; there is a first overlapping region between the orthographic projection of an edge portion, close to the transparent region, of the planarization layer on the substrate and the orthographic projection of the first electrode on the substrate; the light-emitting region further comprises a protruding portion; the thickness of the protruding portion is less than the thickness of the planarization layer; and the protruding portion is closer to the substrate than the planarization layer, and the orthographic projection of the protruding portion on the substrate covers the first overlapping region. The embodiment can reduce the risk of a breakage defect occurring in the first electrode, such that the risk of a dark spot defect occurring in the display panel is reduced, thereby improving the product yield.
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Description

Display panel and display device

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to Chinese patent application No. 202310706226.2 filed in China on June 13, 2023, the entire contents of which are incorporated herein by reference. Technical Field

[0003] The present disclosure relates to the field of display technology, and more particularly to a display panel and a display device. Background Art

[0004] Transparent display panels are increasingly being used in a wide range of applications, for example, in the windows of vehicles like cars, subways, and trains, as well as in display windows in shopping malls and supermarkets and on billboards. The inventors have discovered that transparent display panels in related art often exhibit dark spots, where pixels fail to display properly, impacting product yield.

[0005] Summary of the Invention

[0006] An object of the present disclosure is to provide a display panel and a display device to solve at least one of the problems existing in the prior art.

[0007] To achieve the above objectives, the present disclosure adopts the following technical solutions:

[0008] According to a first aspect of the present disclosure, there is provided a display panel comprising a substrate and a plurality of pixels arranged in an array on the substrate, wherein the pixels comprise a light-emitting area and a transparent area, the light-emitting area comprising a driving circuit layer, a planar layer, a first electrode, a light-emitting layer, and a second electrode sequentially arranged on the substrate, wherein an orthographic projection of an edge portion of the planar layer close to the transparent area on the substrate and an orthographic projection of the first electrode on the substrate have a first overlapping area, the light-emitting area further comprises a raised portion, the thickness of the raised portion is less than the thickness of the planar layer, the raised portion is closer to the substrate than the planar layer, and the orthographic projection of the raised portion on the substrate covers the first overlapping area.

[0009] Optionally, the light emitting area further includes a plurality of signal lines electrically connected to the pixels, and the signal lines form the protrusions.

[0010] Optionally, the light-emitting area further includes an auxiliary electrode electrically connected to the second electrode, the signal line includes an auxiliary electrode wiring electrically connected to the auxiliary electrode, the auxiliary electrode wiring is provided with an extension portion, and the extension portion forms the protrusion.

[0011] Optionally, the raised portion includes a first portion, the orthographic projection of the first portion on the substrate coincides with the orthographic projection of the first overlapping region on the substrate, and the length of the first portion in the direction from the luminous area to the transparent area is 5 μm-20 μm.

[0012] Optionally, the raised portion further includes a second portion, and an orthographic projection of the second portion on the substrate is located on a side of the first overlapping region close to the transparent area.

[0013] Optionally, the first electrode includes a first step portion and a second step portion, the orthographic projection of the first step portion on the substrate covers the orthographic projection of the boundary between the first part and the second part on the substrate, and the orthographic projection of the second step portion on the substrate covers the orthographic projection of the edge of the second part close to the transparent area on the substrate.

[0014] Optionally, in a direction from the light emitting area to the transparent area, the length of the second portion is equal to the length of the first portion.

[0015] Optionally, a thickness ratio of the protrusion to the flat layer is 1:3-1:5.

[0016] Optionally, the driving circuit layer includes an active layer, a gate insulating layer, a gate of a thin film transistor, a dielectric layer and a source-drain metal layer stacked in sequence, the source-drain metal layer forms the source and drain of the thin film transistor, the light-emitting area also includes a passivation layer arranged between the driving circuit layer and the flat layer, and the anode is connected to the source or drain through a via in the passivation layer.

[0017] Optionally, the auxiliary electrode wiring is provided in the same layer as the source / drain metal layer.

[0018] A second aspect of the present disclosure provides a display device, comprising the display panel provided by the first aspect of the present disclosure.

[0019] The beneficial effects of the present disclosure are as follows:

[0020] The technical solution disclosed in the present invention can reduce the inclination angle of the edge of the flat layer by forming a protrusion close to the substrate side at the edge of the flat layer, so that the slope of the edge of the flat layer is relatively gentle, thereby reducing the climbing difficulty of the first electrode, and can effectively reduce the risk of the first electrode being broken, thereby reducing the risk of dark spots in the display panel and improving the product yield. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] The specific embodiments of the present disclosure will be further described in detail below with reference to the accompanying drawings.

[0022] FIG. 1 is a schematic diagram showing a pixel in a display panel in the related art.

[0023] FIG. 2 is a schematic cross-sectional view showing a pixel in a display panel in the related art.

[0024] FIG3 is a schematic diagram showing a microscope observation of the edge region of the flat layer shown in FIG1 .

[0025] FIG. 4 is a schematic cross-sectional view of an edge region of the flat layer shown in FIG. 1 , taken by SEM (scanning electron microscope).

[0026] FIG5 is a schematic diagram showing a pixel in a display panel provided by an embodiment of the present disclosure.

[0027] FIG6 is a schematic cross-sectional view of a pixel in a display panel according to an embodiment of the present disclosure.

[0028] FIG. 7 shows a simplified schematic diagram of the edge area of ​​the flat layer in the related art.

[0029] FIG8 shows a simplified schematic diagram of the edge region of a planar layer according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0030] The terms “on,” “formed on,” and “disposed on” used in the present disclosure may mean that one layer is directly formed or disposed on another layer, or may mean that one layer is indirectly formed or disposed on another layer, i.e., there are other layers between the two layers.

[0031] It should be noted that although the terms "first," "second," etc. may be used herein to describe various parts, components, elements, regions, layers, and / or portions, these parts, components, elements, regions, layers, and / or portions should not be limited by these terms. Rather, these terms are used to distinguish one part, component, element, region, layer, and / or portion from another. Thus, for example, the first part, first member, first element, first region, first layer, and / or first portion discussed below may be referred to as a second part, second member, second element, second region, second layer, and / or second portion without departing from the teachings of the present disclosure.

[0032] In this disclosure, unless otherwise specified, the term "co-layer arrangement" refers to two layers, components, members, elements, or parts that can be formed by the same manufacturing process (e.g., patterning process, etc.), and the two layers, components, members, elements, or parts are generally formed from the same material. For example, co-layer arrangement of two or more functional layers means that these co-layered functional layers can be formed using the same material layer and the same manufacturing process, thereby simplifying the manufacturing process of the display substrate.

[0033] In this disclosure, unless otherwise specified, the expression "patterning process" generally includes steps such as photoresist coating, exposure, development, etching, and photoresist stripping. The expression "one-time patterning process" means a process of forming patterned layers, components, members, etc. using one mask.

[0034] The inventors found that the transparent display panels in the related art often have dark spots caused by the inability of pixels to display normally, which affects the product yield. In order to determine the cause of the dark spot problem of the transparent display panel, the inventors studied the structure of the transparent display panel. Taking the organic light-emitting diode (OLED) transparent display panel as an example, as shown in Figures 1 and 2, the display area of ​​the OLED transparent display panel includes a substrate and a plurality of pixels arranged in an array on the substrate. Each pixel includes a light-emitting area and a transparent area. For example, as shown in Figure 1, the left side of the passivation layer (PVX) via 101 for connecting the anode (Anode) to the source (Source) of the thin film transistor (TFT) is the light-emitting area, and the right side of the passivation layer via 101 is the transparent area. For example, as shown in Figures 1 and 2, the light-emitting area includes a driving circuit layer, a passivation layer (PVX) 104, a flat layer (PLN) 105, an anode, a light-emitting layer 107 and a cathode 108, which are sequentially arranged on the substrate 102. The driving circuit layer includes an active layer (Active) 1031, a gate insulating layer (GI) 1032, a gate (Gate) 1033 of the thin film transistor, a dielectric layer (ILD) 1034, and a source / drain metal layer (SD), which are stacked in sequence. The source / drain metal layer forms the source (Source) 10351 and drain (Drain) 10352 of the thin film transistor. The anode is, for example, a composite structure, including a first thin film electrode 1061, for example, made of indium tin oxide (ITO), a metal electrode 1062, for example, which serves as a reflective electrode, and a second thin film electrode 1063, for example, made of indium tin oxide (ITO), which are stacked in sequence. The first thin film electrode 1061 is connected to the source electrode 10351 through a via 101 in the passivation layer 104. Furthermore, as shown in FIG. 2 , the light-emitting area also includes a pixel definition layer (PDL) 109 for defining the light-emitting area. As shown in Figures 1 and 2, in order to improve the transmittance of the transparent area, the OLED transparent display panel will not set a flat layer in the transparent area. Therefore, the flat layer 105 in the light-emitting area will form a flat layer edge with a large edge inclination angle near the edge of the light-emitting area. In this way, when the first thin-film electrode 1061 is formed after the flat layer 105 is formed, the first thin-film electrode 1061 needs to climb a steep slope at the edge of the flat layer. The first thin-film electrode 1061 is prone to breakage due to the climbing. The morphology of the flat layer edge area where the first thin-film electrode 1061 is prone to breakage is shown in Figures 3 and 4, where the dotted box in Figure 4 corresponds to the position of the dotted box in Figure 3. The breakage of the first thin-film electrode 1061 will cause the anode to be unable to receive the data signal, and the light-emitting area of ​​the pixel cannot be displayed normally, resulting in dark spots.

[0035] In view of this, an embodiment of the present disclosure provides a display panel, comprising a substrate and a plurality of pixels arranged in an array on the substrate, the pixels comprising a light-emitting area and a transparent area, the light-emitting area comprising a driving circuit layer, a flat layer, a first electrode, a light-emitting layer, and a second electrode sequentially arranged on the substrate, the orthographic projection of an edge portion of the flat layer close to the transparent area on the substrate and the orthographic projection of the first electrode on the substrate having a first overlapping area, the light-emitting area also comprising a raised portion, the thickness of the raised portion being less than the thickness of the flat layer, the raised portion being closer to the substrate than the flat layer, and the orthographic projection of the raised portion on the substrate covering the first overlapping area.

[0036] The display panel provided by the embodiment of the present disclosure can reduce the inclination angle of the edge of the flat layer by forming a protrusion near the substrate side at the edge of the flat layer, so that the slope of the edge of the flat layer is relatively gentle, thereby reducing the climbing difficulty of the first electrode, and can effectively reduce the risk of the first electrode being broken, thereby reducing the risk of dark spots in the display panel and improving the product yield.

[0037] Since the pixel includes a transparent area, the display panel provided in the embodiment of the present disclosure is a transparent display panel. In addition, the display panel provided in the present disclosure can be an organic light-emitting diode (OLED) display panel or a light-emitting diode (LED) display panel, etc. Below, the display panel provided in the present disclosure is described using an OLED display panel, that is, the display panel provided in the present disclosure is described using an OLED transparent display panel.

[0038] The OLED transparent display panel provided in the embodiments of the present disclosure includes a substrate and a plurality of pixels arranged in an array on the substrate. Each pixel includes a light-emitting region and a transparent region. For example, as shown in FIG5 , the left side of the passivation layer (PVX) via 501 for connecting the anode (Anode) to the source (Source) of the thin-film transistor (TFT) is the light-emitting region, and the right side of the passivation layer via 501 is the transparent region. For example, as shown in FIG5 and FIG6 , the light-emitting region includes a driving circuit layer, a passivation layer (PVX) 504, a planarization layer (PLN) 505, an anode, a light-emitting layer 507, and a cathode 508, which are sequentially provided on a substrate 502.

[0039] For example, as shown in FIG5 and FIG6 , in the OLED transparent display panel provided by the embodiment of the present disclosure:

[0040] The substrate 502 can be made of materials such as glass and quartz. The OLED transparent display panel may further include a barrier layer (not shown) and a buffer layer (Buffer) 509 located between the substrate 502 and the driving circuit layer. For example, the barrier layer and the buffer layer 509 may be formed on the entire surface of the substrate 502. For example, the barrier layer may be made of an inorganic insulating material such as silicon oxide, silicon nitride, or silicon oxynitride, and the buffer layer 509 may also be made of an inorganic insulating material such as silicon oxide, silicon nitride, or silicon oxynitride. The barrier layer is beneficial for preventing water and oxygen from entering the subsequently formed OLED from the bottom. The buffer layer 509 is beneficial for the quality of subsequent material deposition.

[0041] The driving circuit layer can also be called a thin film transistor (TFT) layer. The driving circuit layer includes an active layer (Active) 5031, a gate insulating layer (GI) 5032, a gate (Gate) 5033 of the thin film transistor, a dielectric layer (ILD) 5034 and a source-drain metal layer (SD) stacked in sequence. The source-drain metal layer forms the source (Source) 50351 and drain (Drain) 50352 of the thin film transistor. Specifically, the driving circuit layer includes an active layer 5031 formed on the buffer layer 509 by a patterning process, a gate insulating layer 5032 formed on the active layer 5031 by deposition or the like, a gate 5033 of a thin film transistor formed on the gate insulating layer 5032 by a patterning process, a dielectric layer 5034 formed on the gate 5033 by deposition or the like, and a source-drain metal layer formed on the dielectric layer 5034. The source-drain metal layer forms a source 50351 and a drain 50352 of the thin film transistor. The active layer 5031 includes, for example, a semiconductor portion, and conductive portions located on both sides of the semiconductor portion and connected to the semiconductor portion. For example, the source 50351 is electrically connected to one conductive portion of the active layer 5031 through a dielectric layer via, and the drain 50352 is electrically connected to another conductive portion of the active layer 5031 through a dielectric layer via. For example, the light-emitting area also includes a plurality of signal lines, which include, for example, a detection line 521, a data line 522, a gate line 523, etc. The data line 522 is electrically connected to the drain electrode 50352, and the gate line 523 is electrically connected to the gate electrode 5033. For example, the active layer 5031 can be made of materials such as polysilicon and metal oxide, the gate insulating layer 5032 can be made of inorganic insulating materials such as silicon oxide, silicon nitride or silicon oxynitride, and the dielectric layer 5034 can be made of inorganic insulating materials such as silicon oxide, silicon nitride or silicon oxynitride. The gate 5033 material includes metals or alloy materials such as aluminum, titanium, and cobalt. In addition, as shown in FIG6 , the OLED transparent display panel may also include a light-shielding layer (LS) 510 located on the substrate 502 and covering the TFT structure with an orthographic projection.

[0042] The passivation layer 504 covers the source / drain metal layer and the exposed dielectric layer 5034, and the planarization layer 505 covers the passivation layer 504. The anode is, for example, a composite structure, including a first thin-film electrode 5061, for example, made of indium tin oxide (ITO), a metal electrode 5062, for example, serving as a reflective electrode, and a second thin-film electrode 5063, for example, made of indium tin oxide (ITO), stacked in sequence. The first thin-film electrode 5061 is connected to the source electrode 50351 through a passivation layer via 501. Furthermore, as shown in FIG6 , the light-emitting area further includes a pixel definition layer (PDL) 509 for defining the light-emitting area. The cathode 508 is, for example, made of indium zinc oxide (IZO).

[0043] The OLED transparent display panel may further include an encapsulation layer (TFE) located on the cathode 508. For example, the encapsulation layer includes a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer. For example, the first inorganic encapsulation layer and the second inorganic encapsulation layer are formed by deposition or the like. The organic encapsulation layer is formed by inkjet printing. For example, the first inorganic encapsulation layer and the second inorganic encapsulation layer can be formed of inorganic materials such as silicon nitride, silicon oxide, and silicon oxynitride, and the organic encapsulation layer can be formed of organic materials such as polyimide (PI) and epoxy resin. Thus, the first inorganic encapsulation layer, the organic encapsulation layer, and the second inorganic encapsulation layer are formed into a composite encapsulation layer, which can form multiple protections for the functional structure of the display panel and has a better encapsulation effect.

[0044] For example, as shown in FIG6 , the buffer layer 509, dielectric layer 5034, light-emitting layer 507, and cathode 508 of the light-emitting region extend to the transparent region, wherein the light-emitting layer 507 extending to the transparent region is disconnected at the edge of the light-emitting region, which will be described in detail later. In order to improve the transmittance of the transparent region, the thicker flat layer 505, such as a resin material, does not extend to the transparent region, or in other words, no flat layer is provided in the transparent region. For example, as shown in FIG5 and FIG6 , the edge of the flat layer 505 is located near the edge of the light-emitting region, and the orthographic projection of the edge portion of the flat layer 505 near the transparent region on the substrate 502 and the orthographic projection of the first thin-film electrode 5061 on the substrate 502 have a first overlapping region. In the OLED transparent display panel provided in the embodiment of the present disclosure, the light-emitting region of the pixel also includes a raised portion 511, the thickness of the raised portion 511 is less than the thickness of the flat layer 505, the raised portion 511 is closer to the substrate 502 than the flat layer 505, and the orthographic projection of the raised portion 511 on the substrate 502 covers the first overlapping region. Among them, the thickness of the protrusion 511, that is, the length of the protrusion 511 in the light-emitting direction (the light-emitting direction is the direction perpendicular to the substrate 502, the vertical direction in Figure 6), and the thickness of the flat layer 505 are the same. In addition, it can be understood that the thickness of the flat layer 505 refers to its main body thickness in the light-emitting area and should not be regarded as the thickness in the edge slope.

[0045] Therefore, by providing a raised portion 511 below the designed position of the flat layer 505 near the edge of the transparent area (or on the pad), when the flat layer 505 is formed in the subsequent process, the fluid flat layer material such as resin will form a flat layer 505 with a relatively gentle edge slope, as shown in Figures 7 and 8. By providing the raised portion 511, the embodiment of the present disclosure can change the edge of the flat layer 105 in the related art shown in Figure 7 from a slope with a large slope to two slopes with smaller slopes at the edge position of the flat layer 505 as shown in Figure 8. As shown in Figure 8, the two slopes with smaller slopes are formed by the edge of the flat layer 505 and the edge of the passivation layer 504, respectively, so that the slope at the edge position of the flat layer is relatively gentle, reducing the climbing difficulty of the first thin-film electrode 5061, effectively reducing the risk of the first thin-film electrode 5061 being broken, thereby reducing the risk of dark spots in the OLED transparent display panel and improving the product yield.

[0046] In some embodiments of the present disclosure, other necessary functional film layers may be formed in the display area of ​​the OLED transparent display panel as needed, such as storage capacitors in the light-emitting area of ​​the pixels, etc., which will not be described in detail here.

[0047] In a possible implementation, in the OLED transparent display panel provided by the embodiment of the present disclosure, the light-emitting area further includes a plurality of signal lines electrically connected to the pixels, and the signal lines form the protrusions 511 .

[0048] Therefore, the protrusion 511 can be formed by designing the routing shape of the signal line, avoiding the increase in preparation process and production cost caused by setting the protrusion 511, and effectively achieving the smoothing of the edge position of the flat layer, reducing the climbing difficulty of the first thin film electrode 5061.

[0049] In one possible implementation, for example, as shown in Figures 5 and 6, in the OLED transparent display panel provided by the embodiment of the present disclosure, the light-emitting area also includes an auxiliary cathode electrically connected to the cathode 508, the signal line includes an auxiliary cathode trace 524 electrically connected to the auxiliary cathode, and the auxiliary cathode trace 524 is provided with an extension portion, which forms a protrusion 511.

[0050] For example, as shown in Figures 5 and 6, the auxiliary electrode wiring 524 itself is located relatively close to the edge of the flat layer 505 near the transparent area. Therefore, an extension portion is designed for the auxiliary cathode wiring 524 below the first overlapping area, and a raised portion 511 is formed by the extension portion. This can further avoid the increase in preparation process and production costs caused by the provision of the raised portion 511, and can effectively achieve the smoothing of the edge position of the flat layer, thereby reducing the climbing difficulty of the first thin film electrode 5061.

[0051] In a specific example, such as shown in Figure 6, the auxiliary cathode is stacked in sequence with a first thin film electrode layer 5061', a metal electrode layer 5062' and a second thin film electrode layer 5063', wherein the side surface of the metal electrode layer 5062' close to the transparent area and the side surface away from the transparent area (i.e., the left and right side surfaces in Figure 6) are respectively recessed inward, so that the auxiliary cathode as a whole forms an I-shaped structure as shown in Figure 6. This structure can be achieved by side etching and other processes, thereby achieving the disconnection between the light-emitting layer 507 at the top of the auxiliary cathode and the light-emitting layer 507 in the light-emitting area and extending into the transparent area. In addition, the cathode 508 at the top of the auxiliary cathode and the cathode 508 in the light-emitting area and extending into the transparent area are also disconnected, but the cathode 508 in the light-emitting area can be electrically connected to the metal electrode layer 5062' of the auxiliary cathode, thereby achieving electrical connection between the auxiliary cathode and the cathode 508 in the light-emitting area. It is understandable that Figure 6 is only a schematic diagram of the cross-sectional morphology. In fact, in the direction from the light-emitting area to the transparent area (i.e., the horizontal direction in Figures 5-7), the auxiliary cathode and the auxiliary cathode wiring 512 are located between the sloped edge of the flat layer 505 close to the transparent area and the passivation layer via 501 for connecting the first thin-film electrode 5061 to the source 50351 of the thin-film transistor, for example, see Figure 5.

[0052] In one possible implementation, as shown in FIG6 , in the OLED transparent display panel provided by the embodiment of the present disclosure, the auxiliary cathode wiring 524 is provided on the same layer as the source / drain metal layer forming the source 50351 and the drain 50352 of the thin film transistor.

[0053] Therefore, when patterning the source / drain metal layer, an extension portion can be designed for the auxiliary cathode wiring 524 below the first overlapping region, thereby further simplifying the manufacturing process.

[0054] In one possible implementation, as shown in FIG8 , in the OLED transparent display panel provided by an embodiment of the present disclosure, the raised portion 511 includes a first portion, the orthographic projection of the first portion on the substrate 502 coincides with the orthographic projection of the first overlapping region on the substrate 502, and the length of the first portion in the direction from the light-emitting region to the transparent region is 5 μm-20 μm.

[0055] Among them, the first part of the protrusion 511, that is, the part of the protrusion 511 that overlaps with the positive projection of the VSS flat layer 505 on the substrate 502 as shown in Figure 8, the above design can effectively smooth the edge position of the flat layer and reduce the climbing difficulty of the first thin film electrode 5061.

[0056] In a possible implementation, in the OLED transparent display panel provided by the embodiment of the present disclosure, the raised portion 511 further includes a second portion, and the orthographic projection of the second portion on the substrate 502 is located on a side of the first overlapping region close to the transparent area.

[0057] Among them, the second part of the protrusion 511, that is, the right part of the part of the protrusion 511 that overlaps with the positive projection of the VSS flat layer 505 on the substrate 502 as shown in Figure 8, the above design can effectively smooth the edge position of the flat layer and reduce the climbing difficulty of the first thin film electrode 5061.

[0058] In a possible implementation, in the OLED transparent display panel provided by an embodiment of the present disclosure, in a direction from the light-emitting area to the transparent area, the length of the second portion is equal to the length of the first portion.

[0059] This effectively smoothes the edge of the flat layer and reduces the climbing difficulty of the first thin-film electrode 5061. It should be noted that the equal lengths in this implementation allow for process errors. For example, in the disclosed embodiment, length deviations within 5% are considered equal.

[0060] In one possible implementation, in the OLED transparent display panel provided by the embodiment of the present disclosure, the first thin-film electrode 5061 includes a first step portion and a second step portion, the orthographic projection of the first step portion on the substrate 502 covers the orthographic projection of the junction of the first part and the second part on the substrate 502, and the orthographic projection of the second step portion on the substrate 502 covers the orthographic projection of the edge of the second part close to the transparent area on the substrate 502.

[0061] For example, as shown in FIG8 , two slopes with smaller slopes are formed at the edge of the flat layer 505. The two slopes with smaller slopes are formed by the edge of the flat layer 505 and the edge of the passivation layer 504, respectively. The first thin-film electrode 5061 forms a relatively gentle step portion at the two slopes with smaller slopes at the edge of the flat layer 505, respectively. Compared with the related art shown in FIG7 , the first thin-film electrode 5061 greatly reduces the difficulty of climbing at the edge of the flat layer 505, thereby effectively reducing the risk of the first thin-film electrode 5061 breaking.

[0062] In a possible implementation, the thickness ratio of the protrusion 511 to the flat layer 505 is 1:3-1:5.

[0063] For example, the thickness of the flat layer 505 is The thickness of the raised portion 511 is The thickness ratio of the protrusion 511 to the flat layer 505 is 1:4.

[0064] Therefore, by designing the thickness of the protruding portion 511 , the edge of the flat layer can be effectively smoothed, thereby reducing the difficulty of the first thin-film electrode 5061 in climbing.

[0065] Another embodiment of the present disclosure provides a display device including the aforementioned display panel. The display device may be a window display screen in a vehicle such as a car, subway, or train, a display window screen in a shopping mall or supermarket, a billboard display, or other product or component with a display function, although this embodiment does not limit this.

[0066] Obviously, the above embodiments of the present disclosure are merely examples for clearly illustrating the present disclosure, and are not intended to limit the implementation methods of the present disclosure. For those skilled in the art, other different forms of changes or modifications can be made based on the above description. It is impossible to enumerate all the implementation methods here. Any obvious changes or modifications derived from the technical solution of the present disclosure are still within the scope of protection of the present disclosure.

Claims

1. A display panel, characterized in that: The invention comprises a substrate and a plurality of pixels arranged in an array on the substrate, wherein the pixels comprise a light-emitting area and a transparent area, wherein the light-emitting area comprises a driving circuit layer, a flat layer, a first electrode, a light-emitting layer and a second electrode sequentially arranged on the substrate, wherein an orthographic projection of an edge portion of the flat layer close to the transparent area on the substrate and an orthographic projection of the first electrode on the substrate have a first overlapping area, and the light-emitting area further comprises a protruding portion, wherein a thickness of the protruding portion is less than a thickness of the flat layer, the protruding portion is closer to the substrate than the flat layer, and an orthographic projection of the protruding portion on the substrate covers the first overlapping area.

2. The display panel according to claim 1, characterized in that: The light emitting area further includes a plurality of signal lines electrically connected to the pixels, and the signal lines form the protrusions.

3. The display panel according to claim 2, characterized in that: The light emitting area further includes an auxiliary electrode electrically connected to the second electrode, the signal line includes an auxiliary electrode wiring electrically connected to the auxiliary electrode, the auxiliary electrode wiring is provided with an extension portion, and the extension portion forms the protrusion.

4. The display panel according to claim 1, characterized in that: The protrusion includes a first portion, the orthographic projection of the first portion on the substrate coincides with the orthographic projection of the first overlapping region on the substrate, and the length of the first portion in the direction from the light emitting region to the transparent region is 5 μm-20 μm.

5. The display panel according to claim 4, characterized in that: The protrusion also includes a second portion, the orthographic projection of the second portion on the substrate is located on a side of the first overlapping region close to the transparent area.

6. The display panel according to claim 5, characterized in that: The first electrode includes a first step portion and a second step portion, wherein the orthographic projection of the first step portion on the substrate covers the orthographic projection of the boundary between the first portion and the second portion on the substrate, and the orthographic projection of the second step portion on the substrate covers the orthographic projection of the edge of the second portion close to the transparent area on the substrate.

7. The display panel according to claim 5, characterized in that: In a direction from the light emitting area to the transparent area, the length of the second portion is equal to the length of the first portion.

8. The display panel according to claim 1, characterized in that: The thickness ratio of the protrusion to the flat layer is 1:3-1:

5.

9. The display panel according to claim 3, characterized in that: The driving circuit layer includes an active layer, a gate insulating layer, a gate of a thin film transistor, a dielectric layer and a source-drain metal layer stacked in sequence, the source-drain metal layer forms the source and drain of the thin film transistor, the light-emitting area also includes a passivation layer arranged between the driving circuit layer and the flat layer, and the anode is connected to the source or drain through a via hole in the passivation layer.

10. The display panel according to claim 9, characterized in that: The auxiliary electrode wiring is arranged in the same layer as the source-drain metal layer.

11. A display device, characterized in that: The invention comprises a display panel as claimed in any one of claims 1 to 10.

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