Display device, method for controlling display device, and program

Abstract

This display device comprises: a first memory (M1) that stores a plurality of pieces of stress data (SD) corresponding to a plurality of subpixels (PXs); and a control unit (CS) that updates the plurality of pieces of stress data (SD) on the basis of video data. The control unit (CS) can access a second memory (M2). The control unit (CS) saves, during a first period (T1), the plurality of pieces of stress data (SD) stored in the first memory (M1) in the second memory (M2) in a first order, and saves, during a second period (T2) after the first period, the plurality of pieces of stress data stored in the first memory (M1) in the second memory (M2) in a second order different from the first order.

Description

Display device, display device control method, and program

[0001] The present disclosure relates to a display device, a control method for a display device, and a computer program.

[0002] Patent Document 1 discloses a predictive compensation method for a self-luminous display in which stress data for each sub-pixel is updated while the degree of deterioration of each sub-pixel is predicted based on the stress data, and brightness is compensated for.

[0003] JP 2005-55800 A

[0004] Backing up stress data takes longer than updating it, and there are differences in the update timing between the backed-up stress data. As a result, each time the backed-up stress data is read, the unevenness of the accumulated stress data period increases, resulting in a decrease in display quality.

[0005] A display device according to one aspect of the present disclosure comprises a plurality of sub-pixels located across the entire display area, a first memory that stores a plurality of stress data corresponding to the plurality of sub-pixels, and a control unit that updates the plurality of stress data based on video data, and is capable of accessing a second memory separate from the first memory, wherein the control unit stores the plurality of stress data from the first memory in the second memory in a first order during a first period, and stores the plurality of stress data from the first memory in the second memory in a second order different from the first order during a second period after the first period.

[0006] A control method for a display device according to one aspect of the present disclosure is a control method for a display device that includes a plurality of sub-pixels located across the entire display area and a first memory that stores a plurality of stress data corresponding to the plurality of sub-pixels, and that is capable of accessing a second memory separate from the first memory, the control method updating the plurality of stress data based on video data, and during a first period, storing the plurality of stress data in the first memory in the second memory in a first order, and during a second period after the first period, storing the plurality of stress data in the first memory in the second memory in a second order different from the first order.

[0007] According to one aspect of the present disclosure, it is possible to improve display quality.

[0008] 9 is a block diagram showing an example of the configuration of a display device of the present embodiment. FIG. 10 is a schematic diagram showing an effect of the display device of the present embodiment. FIG. 11 is a schematic diagram showing an example of a method for storing stress data of the present embodiment. FIG. 12 is a schematic diagram showing an example of a method for storing stress data of the present embodiment. FIG. 13 is a schematic diagram showing an example of a method for storing stress data of the present embodiment. FIG. 14 is a plan view showing an example of the configuration of a display device according to an example of the present disclosure. FIG. 15 is a timeline diagram showing an example of the operation of the control unit shown in FIG. 1. FIG. 16 is a timeline diagram showing an example of stress data stored in a first period shown in FIG. 17 is a timeline diagram showing an example of stress data stored in a second period shown in FIG. 18 is a plan view showing an example of a storage order in the first period and the second period shown in FIG. 19 ... schematic diagram showing an example of a configuration of a second memory shown in FIG. 8. FIG. 9 is a block diagram showing an example of the configuration of the control unit shown in FIG. 8. FIG. 10 is a flow diagram showing an example of an operation when power is turned on in a control method for a display device according to an embodiment of the present disclosure. FIG. 11 is a flow diagram showing an example of an operation during display in a control method for a display device according to an embodiment of the present disclosure. FIG. 12 is a flow diagram showing an example of storage of stress data shown in FIG. 20. FIG. 13 is a flow diagram showing an example of an operation when power is turned off in a control method for a display device according to an embodiment of the present disclosure. FIG. 14 is a cross-sectional view showing an example of the configuration of a subpixel shown in FIG. 8. FIG. 15 is a timeline diagram showing an example of the operation of a control unit in a display device according to an embodiment of the present disclosure. FIG. 16 is a flow diagram showing an example of storage of stress data in a display device according to an embodiment of the present disclosure. FIG. 17 is a plan view showing an example of the configuration of a display device according to an embodiment of the present disclosure. FIG. 18 is a plan view showing an example of the configuration of an electronic device according to an embodiment of the present disclosure.

[0009] FIG. 1 is a block diagram showing an example of the configuration of a display device according to this embodiment. FIG. 2 is a schematic diagram illustrating the effects of the display device according to this embodiment. As shown in FIG. 1 , the display device 100 includes a plurality of subpixels PX located across the entire display area DA, a first memory M1 that stores a plurality of stress data corresponding to the plurality of subpixels PX, and a control unit CS that updates the plurality of stress data based on video data. The control unit CS can access a second memory M2 separate from the first memory M1. During a first period T1, the control unit CS stores the plurality of stress data from the first memory M1 in the second memory M2 in a first order, and during a second period T2 following the first period T1, the control unit CS stores the plurality of stress data from the first memory M1 in the second memory M2 in a second order different from the first order.

[0010] In this disclosure, unless otherwise specified, "save" refers to save in the second memory M2. Save in the second memory M2 is also referred to as "backup." The vertical scanning direction (V direction) of the display unit DA is the up-down direction.

[0011] The display device 100 may include a display unit DA and a driver circuit DC that drives the display unit DA, and a control unit CS may control the driver circuit DC based on video data. The display unit DA may include multiple blocks B1, B2 to Bi, Bj to Bk, Bm arranged in the vertical scanning direction (V direction). Blocks B1 and B2 may be included in the upper part of the display unit DA, blocks Bi and Bj in the middle part of the display unit DA, and blocks Bk and Bm in the lower part of the display unit DA. Each block (B1 to Bm) may include one or more subpixel rows (lines). The first memory M1 may be a volatile memory such as a DRAM or SRAM, and the second memory M2 may be a nonvolatile memory such as a flash memory. Although the first memory M1 is depicted as a single functional block in FIG. 1, it may actually be composed of multiple memories. The second memory M2 may similarly be composed of multiple memories.

[0012] The plurality of stress data may include stress data 1d1 to 1dn (block data D1 corresponding to the subpixel group of block B1), stress data 2d1 to 2dn (block data D2 corresponding to the subpixel group of block B2), stress data id1 to idn (block data Di corresponding to the subpixel group of block Bi), stress data jd1 to jdn (block data Dj corresponding to the subpixel group of block Bj), stress data kd1 to kdn (block data Dk corresponding to the subpixel group of block Bk), and stress data md1 to mdn (block data Dm corresponding to the subpixel group of block Bm). Each stress data may correspond to one subpixel PX, several subpixels PX that are adjacent to each other and emit the same color, or several subpixels PX that are adjacent to each other and do not emit the same color. For example, for each color, two rows and two columns, four rows and four columns, or four rows and two columns of subpixels PX are considered as one set, and each stress data corresponds to one set of subpixels PX. Hereinafter, stress data may be collectively referred to as stress data SD.

[0013] The control unit CS may read the stress data SD stored in the second memory M2 and store it in the first memory M1, and then update the stress data SD in accordance with the video data. The control unit CS may control the driver circuit DC by referring to the stress data SD read from the first memory M1.

[0014] The first period T1 and the second period T2 may be longer than an update cycle of the stress data SD. The subpixels PX of the display unit DA may include a first subpixel P1 and a second subpixel P2, and the control unit CS may store the stress data SD corresponding to the first subpixel P1 before the stress data SD corresponding to the second subpixel P2 during the first period T1, while storing the stress data SD corresponding to the first subpixel P1 after the stress data SD corresponding to the second subpixel P2 during the second period T2.

[0015] For example, if the first subpixel P1 is included at the upper end (block B1) of the display section DA and the second subpixel P2 is included at the lower end (block Bm) of the display section DA, then in the first period T1, the block data may be stored in the order of D1, D2, Di, Dj, Dk, Dm, and in the second period T2, the block data may be stored in the order of Dm, Dk, Dj, Di, D2, D1.

[0016] In this case, in the first period T1, stress data 1d1 corresponding to the first subpixel P1 is stored followed by stress data md1 corresponding to the second subpixel P2 (first order), and in the second period T2, stress data md1 corresponding to the second subpixel P2 is stored followed by stress data 1d1 corresponding to the first subpixel P1 (second order).

[0017] In this case, the time lag from the update timing of the stress data SD stored in the first period T1 to the end timing of the first period T1 is larger for the first subpixel P1 than for the second subpixel P2, and the time lag from the update timing of the stress data stored in the second period T2 to the end timing of the second period T2 is smaller for the first subpixel P1 than for the second subpixel P2. Therefore, in the first period T1 (first order), the error in the stress data SD stored in the second memory M2 is smaller for the second subpixel P2 than for the first subpixel P1, and in the second period T2 (second order), the error in the stress data SD stored in the second memory M2 is smaller for the first subpixel P1 than for the second subpixel P2. As a result, in this embodiment, in which stress data SD is stored by combining the first period T1 of the first sequence and the second period T2 of the second sequence, as shown in Figure 2, the error in the stress data SD is more uniform within the surface (within the display area DA) than in the comparative example (when stress data is stored only in the first sequence), making it possible to display high-quality images with less display unevenness (gradation).

[0018] 2 shows display unevenness when the storage unit of stress data SD corresponds to an integer number of subpixel rows. However, the present disclosure is not limited to this, and also includes cases where the storage unit of stress data SD does not correspond to a subpixel row, for example, when the boundary between storage units is in the middle of a subpixel row.

[0019] 3 is a schematic diagram showing an example of a method for storing stress data according to this embodiment. The control unit CS may store the plurality of stress data SD in the first order (first period T1) one or more times during the Nth power-on period. In this case, the control unit CS may not store the plurality of stress data SD in the second order during the Nth power-on period, but may store the plurality of stress data SD in the second order (second period T2) one or more times during the (N+1)th power-on period.

[0020] The control unit CS may store the plurality of stress data SD in the first order (first period T1) one or more times during the Nth power-on period, and may store the plurality of stress data SD in the second order (second period T2) one or more times. The control unit CS may alternate between storing the plurality of stress data SD in the first order (first period T1) and storing the plurality of stress data SD in the second order (second period T2). If the last storage in the Nth power-on period is the first order, the first storage in the N+1th power-on period may be the second order, and if the last storage in the Nth power-on period is the second order, the first storage in the N+1th power-on period may be the first order.

[0021] When the display device 100 is powered off while the plurality of stress data SD is being saved, the control unit CS may invalidate or erase (discard) the saved stress data from the second memory M2. Invalidation can be achieved by managing flags so that the stress data SD being saved is invalid and the stress data SD after saving is complete is valid. Invalid data may be erased. The erasure may be performed when the power is turned off or the next time the power is turned on.

[0022] 4 is a schematic diagram illustrating an example of a stress data storage method according to this embodiment. For example, if the first subpixel P1 is included in the upper end (block B1) of the display area DA and the second subpixel P2 is included in the lower end (block Bm) of the display area DA, the block data D1, D2, Di, Dj, Dk, and Dm may be stored in this order during the first period T1, and the block data Dk, Dm, Di, Dj, D1, and D2 may be stored in this order during the second period T2. In this case, during the first period T1, the stress data 1d1 corresponding to the first subpixel P1 may be stored followed by the stress data md1 corresponding to the second subpixel P2 (first order), and during the second period T2, the stress data 1d1 corresponding to the first subpixel P1 may be stored followed by the stress data md1 corresponding to the second subpixel P2 (second order).

[0023] 5 is a schematic diagram illustrating an example of a stress data storage method according to this embodiment. For example, if the first subpixel P1 is located at the top (block B1) of the display area DA and the second subpixel P2 is located at the center (block Bj) of the display area DA, the block data D1, Dm, D2, Dk, Di, and Dj may be stored in this order during the first period T1, and the block data Dj, Di, Dk, D2, Dm, and D1 may be stored in this order during the second period T2. In this case, during the first period T1, the stress data 1d1 corresponding to the first subpixel P1 may be stored followed by the stress data jd1 corresponding to the second subpixel P2 (first order), and during the second period T2, the stress data 1d1 corresponding to the first subpixel P1 may be stored followed by the stress data jd1 corresponding to the second subpixel P2 (second order).

[0024] 6 is a schematic diagram illustrating an example of a stress data storage method according to this embodiment. For example, if one of two adjacent blocks (block B1) in the upper part of the display area DA includes a first subpixel P1 and the other (block B2) includes a second subpixel P2, the block data D1, D2, Di, Dj, Dk, and Dm may be stored in this order during the first period T1, and the block data D2, Di, Dj, Dk, Dm, and D1 may be stored in this order during the second period T2. In this case, during the first period T1, the stress data 1d1 corresponding to the first subpixel P1 may be stored followed by the stress data 2d1 corresponding to the second subpixel P2 (first order), and during the second period T2, the stress data 2d1 corresponding to the second subpixel P2 may be stored followed by the stress data 1d1 corresponding to the first subpixel P1 (second order).

[0025] FIG. 7 is a schematic diagram showing an example of a method for storing stress data according to this embodiment. The control unit CS may store multiple stress data SD over multiple vertical blanking intervals BT. The vertical blanking intervals BT are blanking periods inserted between successive vertical scanning intervals VT. For example, in FIG. 7, one block of data (e.g., one line of stress data) is stored over 6 BTs (approximately 0.1 seconds). This allows, for example, 1,000 lines of stress data SD to be stored over 100 seconds, and 2,000 lines of stress data SD to be stored over 200 seconds (3 minutes and 20 seconds). The update period for the stress data SD may be approximately 0.5 to 5 seconds. The update period may be approximately 1 to several seconds, and the first period T1 and second period T2 may be approximately several hundred seconds.

[0026] As shown in FIG. 7, when the first subpixel P1 is located at the left end of the block B1 and the second subpixel P2 is located at the right end of the block Bm, in the first period T1, the stress data 1d1 corresponding to the first subpixel P1 may be stored first and the stress data mdn corresponding to the second subpixel P2 may be stored last (first order), and in the second period T2, the stress data mdn corresponding to the second subpixel P2 may be stored first and the stress data 1d1 corresponding to the first subpixel P1 may be stored last (second order).

[0027] [Example 1] (Configuration of Display Device) FIG. 8 is a plan view showing an example of the configuration of a display device according to an example of the present disclosure. As shown in FIG. 8, the display device 100 may include a timing controller TCON including a processor functioning as a control unit CS and a first memory M1. The display device 100 includes a volatile memory as the first memory M1. The volatile memory is, for example, a dynamic random access memory (DRAM). The display device 100 may include a second memory M2, which may be a non-volatile memory. The non-volatile memory is, for example, a flash memory or an electrically erasable programmable read-only memory (EEPROM). Alternatively, the display device 100 may include an external storage device such as a hard disk as the second memory M2.

[0028] The display device 100 may further include a driver DC that drives the display unit DA. The controller CS controls the display unit DA via the driver DC based on the plurality of stress data SD and the video data. The display device 100 may further include a buffer Bf. The controller CS accesses the second memory M2 via the buffer Bf. The video data may be supplied from the host device 200. The display device 100 may further include a temperature sensor TS. The temperature sensor TS directly or indirectly measures the temperature of the display unit DA.

[0029] A direct method is to arrange multiple temperature sensors TS on the back surface of the display unit DA, and each temperature sensor TS transmits temperature data to the control unit CS. For example, multiple temperature sensors TS are arranged inside the display unit DA, and the temperature data is transmitted from the temperature sensors TS to the driver circuit DC or the control unit CS via signal lines extending from the driver circuit DC to the subpixels PX, or via signal lines dedicated to the temperature sensors TS.

[0030] For example, when the display unit DA is disposed on a module substrate, one or more temperature sensors TS are disposed on the module substrate, and the temperature data of the display unit DA is calculated from the temperature data of the module substrate measured by the temperature sensor TS. In the calculation, the temperature data may be inferred by combining the video data, or may be inferred by combining previously calculated temperature data of the display unit DA.

[0031] FIG. 9 is a timeline diagram showing an example of the operation of the control unit CS shown in FIG. 8 . As shown in FIG. 9 , the control unit CS reads various data from the second memory M2 when power is turned on and stores the data in the first memory M1. Subsequently, during the power-on period, the control unit CS causes the display unit DA to perform a display operation, updates the plurality of stress data SD, and stores the updated plurality of stress data SD in the second memory M2. During a first period T1, the control unit CS stores the plurality of stress data SD from the first memory M1 in the second memory M2 in a first order. Then, during a second period T2 following the first period T1, the control unit CS stores the plurality of stress data SD from the second memory M2 in a second order different from the first order.

[0032] According to the configuration of the present disclosure, the storage order is different between the first period T1 and the second period T2. Therefore, compared to a configuration in which the storage order is fixed, it is possible to reduce the non-uniformity of the accumulation period of the multiple stress data SD. Therefore, it is possible to improve the display quality of the display device 100.

[0033] The control unit CS saves the plurality of stress data SD in the first order at least once during the Nth power-on period. In addition, the control unit CS does not save the plurality of stress data SD in the second order during the Nth power-on period. The control unit CS saves the stress data SD in the second order at least once during the (N+1)th power-on period, and does not save the plurality of stress data SD in the first order. The control unit CS changes the save order once per power-on.

[0034] The first period T1 and the second period T2 may be 10 times or more the update period UC. For example, when the display frequency of the display unit DA is 60 Hz, the update period UC of the stress data SD may be about 4 seconds, and the first period T1 and the second period T2 may each be 3 to 4 minutes.

[0035] 10 is a timeline diagram showing an example of stress data stored during the first period shown in FIG. 8 . Referring again to FIG. 8 , the plurality of subpixels PX include a first subpixel P1 and a second subpixel P2. As shown in FIG. 10 , during the first period T1, the control unit CS stores the stress data SD corresponding to the first subpixel P1 before the stress data SD corresponding to the second subpixel P2. As a result, the time lag L1 for the first subpixel P1 from the update timing of the stress data SD stored during the first period T1 to the end timing of the first period T1 is longer than the time lag L2 for the second subpixel P2.

[0036] 11 is a timeline diagram showing an example of stress data stored during the second period shown in FIG. 9. As shown in FIG. 11, during the second period T2, the control unit CS stores the stress data SD corresponding to the first subpixel P1 after the stress data SD corresponding to the second subpixel P2. As a result, the time lag from the update timing of the stress data SD stored during the second period T2 to the end timing of the second period T2 is longer than the time lag L4 of the second subpixel P2, i.e., the time lag L3 of the first subpixel.

[0037] 12 to 16 are plan views showing an example of the storage order in the first and second periods shown in FIG. 9 , with the subpixels corresponding to the stress data to be stored. In FIGS. 12 to 16 , the position where storage starts is indicated by a circle. As shown in FIG. 12 , in the first period T1, the control unit CS may store the stress data SD corresponding to the first subpixel P1 first and store the stress data SD corresponding to the second subpixel P2 last, while in the second period T2, the control unit CS may store the stress data SD corresponding to the second subpixel P2 first and store the stress data SD corresponding to the first subpixel P1 last.

[0038] As shown in FIG. 13 , the first sub-pixel P1 may be located at the top end TL of the display area DA, and the second sub-pixel P2 may be located at the bottom end BL of the display area DA. The controller CS stores the corresponding stress data SD from the top end TL to the bottom end BL during the first period T1, while the controller CS stores the corresponding stress data SD from the bottom end BL to the top end TL during the second period T2. Alternatively, the controller CS may store the stress data SD for each unit area consisting of one or more sub-pixels. The controller CS shifts the unit area from which the storage starts. For example, as shown in FIG. 14 , the controller CS stores the corresponding stress data SD from the unit area TU including the top end TL to the unit area BU including the bottom end BL during the first period T1, while the controller CS stores the corresponding stress data SD from the unit area AU adjacent to the unit area TU to the unit area BU during the second period T2, and then stores the stress data SD corresponding to the unit area TU. The storage order in each unit area may be the same in the first period T1 and the second period T2.

[0039] 15 , the first sub-pixel P1 may be located in an upper portion TP of the display portion DA, and the second sub-pixel P2 may be located in a lower portion BP of the display portion DA. The display portion DA may be divided into two or more portions, for example, an upper portion TP, a central portion MP, and a lower portion BP. The control unit CS stores the corresponding stress data SD in the order of the upper portion TP, the central portion MP, and the lower portion BP during the first period T1, and stores the corresponding stress data SD in the order of the lower portion BP, the central portion MP, and the upper portion TP during the second period T2. The storage order for the upper portion TP, the central portion MP, and the lower portion BP may be the same during the first period T1 and the second period T2.

[0040] 16 , with the vertical scanning direction of the display unit DA as the up-down direction, the first sub-pixel P1 may be located at the top end TL or the bottom end BL of the display unit DA, and the second sub-pixel P2 may be located at the center ML between the top end TL and the bottom end BL of the display unit DA. When the display unit DA has an even number of rows, the center ML is row 2, and the second sub-pixel P2 may be located in either of the two rows. In the first period, the control unit CS stores the corresponding stress data SD alternately up and down from the top end TL and the bottom end BL toward the center ML, while in the second period, the control unit CS stores the corresponding stress data SD alternately up and down from the center ML toward the top end TL and the bottom end BL.

[0041] (Storage Areas of Second Memory) FIG. 17 is a schematic diagram showing an example of the configuration of the second memory shown in FIG. 8. The second memory M2 has multiple areas for storing multiple pieces of stress data SD and associated information, and for example, as shown in FIG. 17, has a stress data A side and a stress data B side. Hereinafter, the stress data A side and the stress data B side will be simply referred to as the "A side" and the "B side." The control unit CS erases the data on the A side, stores the multiple pieces of stress data SD on the A side, and, when the storage of the multiple pieces of stress data SD on the A side is completed, writes a completion flag to the A side of the second memory M2 and writes an order flag indicating the storage order to the A side. The control unit CS erases the data on the B side, stores the multiple pieces of stress data SD on the B side, and, when the storage of the multiple pieces of stress data SD on the B side is completed, writes a completion flag and an order flag to the B side of the second memory M2. The control unit CS may alternately store the multiple pieces of stress data SD on the A side and the B side.

[0042] When the second memory M2 is composed of multiple memories, the second memory M2 may include a memory having side A and another memory having side B. The control unit CS may repeatedly store data alternately in the two memories or in three or more memories in sequence.

[0043] In the present disclosure, writing an order flag may be expressed as writing a storage order. The same applies to operations other than writing.

[0044] (Configuration of Control Unit) Fig. 18 is a block diagram showing an example of the configuration of the control unit shown in Fig. 8. As shown in Fig. 18, the control unit CS has a port 10 connected to the host device 200, a port 12 connected to the drive unit DC, a port 14 connected to the first memory M1, a port 16 connected to the temperature sensor TS, and a port 18 connected to the second memory M2 via a buffer Bf. The control unit CS may include an image processing unit 20 that performs image processing, an update processing unit 30 that updates the stress data SD, an update timing unit 32 that determines the timing of updating, a storage processing unit 40 that stores the stress data SD in the first memory M1, and a storage timing unit 42 that determines whether it is the time to store the stress data SD.

[0045] (Display Device Control Method) FIG. 19 is a flow diagram illustrating an example of a power-on operation of a display device control method according to an embodiment of the present disclosure. As shown in FIG. 19 , when the display device 100 is powered on, the control unit CS receives a power-on request from the host device 200 (step S10). The control unit CS then executes read control on the second memory M2 (step S20), reads various data from the second memory M2 (step S30), and stores the read data in the first memory M1 (step S40). The control unit CS then executes other on-sequences (step S50). The on-sequence is a predetermined series of operations executed sequentially to enable the display device to properly start display operations. A typical on-sequence includes powering on various circuits, such as the logic circuit and the drive circuit including the driver circuit DC; reading data such as firmware, setting values ​​for various functions, and correction data; initializing various circuits; starting the operation of various circuits; and starting the display unit DA to display all black or an arbitrary image. Parts of the on-sequence are included in steps S10, S20, and S30.

[0046] In steps S30 and S40, the data to be read includes setting information and backup data. The control unit CS reads from the second memory M2 the multiple stress data SD previously saved and an order flag indicating the order in which the data was saved the previous time, and stores these in the first memory M1. Here, the control unit CS reads the stress data SD and the order flag from the side A or B on which a completion flag has been written. The control unit CS writes the side flag indicating the side on which the completion flag has been written into the first memory M1.

[0047] 20 is a flow diagram showing an example of an operation during display in a control method for a display device according to an embodiment of the present disclosure. As shown in FIG. 20 , following step S50, the control unit CS of the display device 100 receives video data from the host device 200 (step S60). The image processing unit 20 of the control unit CS then performs image processing on the received video data to obtain output data (step S70). The image processing unit 20 of the control unit CS then outputs output data to the drive unit DC (step S80), and the drive unit DC lights up the display unit DA in accordance with the output data.

[0048] In step S70, the image processing unit 20 of the control unit CS may generate output data based on the plurality of stress data SD and the video data stored in the first memory M1. The image processing unit 20 may predict deterioration of each sub-pixel PX based on the stress data SD and generate the output data to compensate for the luminance.

[0049] Next, the update timing unit 32 of the control unit CS determines whether it is time to update the stress data SD (step S90). If it is time to update (Yes), the update processing unit 30 of the control unit CS updates the multiple stress data SD based on the video data (step S100) and stores the updated stress data SD in the first memory M1 (step S110). The stress data SD may be compressed and stored. For example, stress data SD may be calculated for each subpixel PX, and the stress data SD for several neighboring subpixels PX emitting the same color may be averaged and stored. Compression can reduce the capacity of the first memory M1 and the second memory M2. When the control unit CS reads the compressed stress data SD, it decompresses the read stress data SD and then generates output data based on the multiple stress data SD and the video data.

[0050] Regarding step S100, if the display device 100 includes a temperature sensor TS, the update processing unit 30 of the control unit CS may update the plurality of stress data SD based on the video data and the temperature obtained from the temperature sensor TS. The update processing unit 30 may also update the plurality of stress data SD based on the output data instead of the video data.

[0051] Next, the save timing unit 42 of the control unit CS determines whether it is time to save the stress data SD in the first memory M1 (step S120). If it is time to save (Yes), the save processing unit 40 of the control unit CS reads some of the multiple stress data SD from the first memory M1 and saves them in the second memory M2 (step S130). The save processing unit 40 of the control unit CS may save the multiple stress data SD over multiple vertical blanking intervals BT. Alternatively, if the control unit CS can operate the image processing unit 20 and the save processing unit 40 in parallel, the save processing unit 40 may save the multiple stress data SD in periods other than the vertical blanking interval BT. In this way, when part of step S130 is executed in parallel with steps S60 to S80, the time required from start to completion of saving the multiple stress data SD can be shortened compared to when step S130 is executed only in the vertical blanking interval BT. Alternatively, if the display device 100 has a built-in touch panel and the driving of the display unit DA is stopped for a period of time during display to sense the touch panel, the storage processing unit 40 may store multiple pieces of stress data SD during this stopped period.

[0052] Next, the control unit CS returns to step S60 and repeats steps S60 to S130.

[0053] 21 is a flow diagram showing an example of the storage of the stress data shown in FIG. 20. As shown in FIG. 21, the storage processing unit 40 reads an order flag indicating the previous storage order from the first memory M1 (step S200) and determines whether the previous storage order was the first order or the second order based on the order flag (step S210). If the previous storage order was the first order, the storage order is designated as the second order (step S220). On the other hand, if the previous storage order was the second order, the storage order is designated as the first order (step S230). Next, the storage processing unit 40 reads a surface flag from the first memory M1 (step S240) and determines whether the surface to which the completion flag is written is side A or side B based on the surface flag (step S250).

[0054] If a completion flag has been written to side A, side B is designated as the storage destination for the stress data SD (step S260). Next, the storage processing unit 40 stores the multiple stress data SD on side B in the designated storage order (step S270), and after storage is complete, writes a completion flag to side B (step S280) and writes an order flag indicating the designated storage order to side B (step S200). Furthermore, the storage processing unit 40 erases the data on side A (step S300) and rewrites the side flag in the first memory M1 to a side flag indicating side B (step S310).

[0055] On the other hand, if a completion flag has been written to side B, side A is designated as the storage destination for the stress data SD (step S320). Next, the storage processing unit 40 stores multiple pieces of stress data SD on side A (step S330), and after storage is complete, writes a completion flag to side A (step S340) and an order flag indicating the designated storage order to side A (step S350). Furthermore, the storage processing unit 40 erases the data on side B (step S360) and rewrites the side flag in the first memory M1 to a side flag indicating side A (step S370).

[0056] In steps S240 and S250, update count information for sides A and B may be used instead of the side flag. The save processing unit 40 increments the update count for side B by 1 each time stress data SD is saved to side B, and increments the update count for side A by 1 each time stress data SD is saved to side A. The side with the largest update count can be determined to be the side that last successfully saved stress data SD. Therefore, the update count information may be read out and it may be determined whether the side with the largest update count is side A or side B. If the update count for side A is large, side B is designated as the save destination for stress data SD, and if the update count for side A is large, side B is designated as the save destination for stress data SD.

[0057] The data erasure of steps S300 and S360 may be performed at different times. For example, the old stress data SD and order flag on side B are erased during steps S260 and S270, the completion flag on side A is erased during steps S280 and S290, the old stress data SD and order flag on side A are erased during steps S320 and S330, and the completion flag on side B is erased during steps S340 and S350. For example, using the data erase function of the flash memory, the old stress data SD on side B is erased little by little in step S270 while new stress data SD is written little by little to side B, and the old stress data SD on side A is erased little by little in step S330 while new stress data SD is written little by little to side A. The data erase function of the flash memory can erase data in sector units of, for example, 4 kBytes.

[0058] The save processing unit 40 rewrites the surface flag in the first memory M1 in steps S310 and S370 of step S130. As a result, the save processing unit 40 changes the save destination each time it saves multiple pieces of stress data SD. The save processing unit 40 does not rewrite the order flag in the first memory M1 in step S130. As a result, the save processing unit 40 changes the save order once for each power-on.

[0059] It should be noted that the saving of the multiple stress data SD is actually performed in multiple steps of step S130. Also, there may be three or more designable save destinations and three or more designable save orders.

[0060] FIG. 22 is a flow diagram illustrating an example of an operation performed during power-off in a control method for a display device according to an embodiment of the present disclosure. As shown in FIG. 22 , the control unit CS of the display device 100 receives a power-off request (step S140) and executes an off sequence (step S150). The off sequence is a predetermined series of operations that are sequentially executed so that the display device can normally terminate its display operation. The off sequence of the display device 100 is executed when a display-off request or a power-off request is received, or when the power supply drops or is interrupted, to prevent damage and to prevent the display device 100 from displaying or operating abnormally. A typical off sequence includes discharging the subpixels PX and sequentially shutting down the power supplies of various circuits.

[0061] 23 is a flow diagram showing the operation when the power is turned off in the display device of the comparative example. As shown in FIG. 23, when a power-off request is received, the control unit executes a part of the power-off sequence, stores multiple pieces of stress data in the nonvolatile memory, and executes the rest of the power-off sequence.

[0062] According to the present disclosure, by not storing data in the second memory M2 after receiving a power-off request, the power to the display device 100 can be turned off more quickly than in the comparative example.

[0063] When the storage processing unit 40 of the control unit CS according to the present disclosure receives a power-off request while saving multiple pieces of stress data SD, it invalidates or erases from the second memory M2 the saved stress data among the multiple pieces of stress data SD. For example, if data is being saved to side A when the power is turned off, a completion flag has not been written to side A, and the stress data SD on side A is invalid. The control unit CS may erase the data on side A if a completion flag has not been written to side A when the power is turned off or turned on. In this case, multiple pieces of stress data SD, an order flag, and a completion flag have been written to side B, and the stress data SD on side B is valid. The next time the power is turned on, the control unit CS reads the multiple pieces of stress data SD and the order flag from side B.

[0064] If a power-off request is received while step S130 is in progress, the control unit CS may immediately terminate step S130 and execute the off sequence, or may turn off the display unit DA and then complete step S130 before executing the off sequence.

[0065] (Configuration of Sub-Pixel) Fig. 24 is a cross-sectional view showing an example of the configuration of the sub-pixel shown in Fig. 8. As shown in Fig. 24, the sub-pixel PX has a light-emitting element ED including an emitting layer EM, and a pixel circuit PC that controls the light-emitting element ED. The emitting layer EM is an organic emitting layer or a quantum dot emitting layer.

[0066] Another embodiment of the present disclosure will be described below. For ease of explanation, the same reference numerals will be used to designate components having the same functions as those described in the above embodiment, and the description thereof will not be repeated.

[0067] 25 is a timeline diagram illustrating an example of the operation of the control unit in the display device according to an embodiment of the present disclosure. As shown in FIG. 25, the control unit CS may store the plurality of stress data SD in the first order one or more times and store the plurality of stress data SD in the second order one or more times during the Nth power-on period.

[0068] 26 is a flow diagram showing an example of storing stress data in a display device according to an embodiment of the present disclosure. As shown in FIG. 26, after storing is completed, the control unit CS rewrites the order flag in the first memory M1 to an order flag indicating the specified order (step S400). In this way, the control unit CS changes the storing order each time it stores multiple pieces of stress data SD.

[0069] Third Embodiment In the display device 100 according to an embodiment of the present disclosure, the first order and the second order may each be a random order.

[0070] 27 is a flow diagram showing an example of storing stress data in a display device according to an embodiment of the present disclosure. As shown in FIG. 27 , if the control unit CS determines in step S210 that the previous storage order was a random order, the control unit CS may specify the random order as the storage order (step S500). Details of the random order may be determined in steps S270 and S320. For example, when storing stress data SD for each unit area, one of the unstored unit areas is randomly selected, and the stress data SD corresponding to the selected unit area is repeatedly stored.

[0071] 28 is a plan view illustrating an example of a configuration of a display device according to an embodiment of the present disclosure. As shown in FIG. 28, the second memory M2 may be arranged on a network.

[0072] 29 is a plan view showing an example of a configuration of an electronic device according to an embodiment of the present disclosure. As shown in FIG. 22, an electronic device 300 according to the present disclosure may include a display device 100 and a second memory M2.

[0073] Sixth Embodiment A program that causes a processor or the like to execute the control method for the display device 100 according to the present disclosure is also included in the scope of the present disclosure.

[0074] The functions of the control unit CS (hereinafter referred to as the "device") can be realized by a program that causes a computer to function as the device, and a program that causes a computer to function as each control block of the device (particularly the image processing unit 20, update processing unit 30, update timing unit 32, save processing unit 40, and save timing unit 42, which are included in the control unit CS).

[0075] In this case, the device includes a computer having at least one control device (e.g., a processor) and at least one storage device (e.g., a memory) as hardware for executing the program. The functions described in each of the above embodiments are realized by executing the program using the control device and storage device. The at least one memory may include a first memory M1 and a second memory M2.

[0076] The program may be non-transitory and may be recorded on one or more computer-readable recording media. The recording media may or may not be included in the device. In the latter case, the program may be supplied to the device via any wired or wireless transmission medium.

[0077] Furthermore, some or all of the functions of the control blocks can be realized by logic circuits. For example, an integrated circuit in which a logic circuit that functions as each of the control blocks is formed is also included in the scope of the present invention. In addition, the functions of the control blocks can also be realized by, for example, a quantum computer.

[0078] Furthermore, each control block of the control unit CS may be executed by AI (Artificial Intelligence). In this case, the AI ​​may operate on the control device or on another device (for example, an edge computer or a cloud server).

[0079] The present disclosure is not limited to the above-described embodiments, and various modifications are possible within the scope of the claims. Embodiments obtained by appropriately combining the technical means disclosed in different embodiments are also included in the technical scope of the present disclosure. Furthermore, new technical features can be formed by combining the technical means disclosed in each embodiment.

[0080] 100 Display device 300 Electronic device AU, BU, TU Unit area B1, BL Bottom edge Bm, TL Top edge BP Bottom part BT Vertical blanking interval CS Control part DA Display part ED Light-emitting element EM Light-emitting layer L1, L2, L3, L4 Time lag M1 First memory M2 Second memory ML Center PX Sub-pixel P1 First sub-pixel P2 Second sub-pixel SD Stress data T1 First period T2 Second period TCON Timing controller TP Top part TS Temperature sensor UC Update period

Claims

1. A display device comprising a plurality of sub-pixels positioned across the entire display area, a first memory for storing a plurality of stress data corresponding to the plurality of sub-pixels, and a control unit for updating the plurality of stress data based on video data, and capable of accessing a second memory separate from the first memory, wherein the control unit stores the plurality of stress data in the first memory in the second memory in a first order during a first period, and stores the plurality of stress data in the first memory in the second memory in a second order different from the first order during a second period after the first period.

2. The display device according to claim 1, wherein the first period and the second period are longer than an update cycle of the plurality of stress data.

3. The display device of claim 1 or 2, wherein the plurality of sub-pixels include a first sub-pixel and a second sub-pixel, and the control unit stores, during the first period, the stress data corresponding to the first sub-pixel before the stress data corresponding to the second sub-pixel, while during the second period, the stress data corresponding to the first sub-pixel after the stress data corresponding to the second sub-pixel.

4. The display device of claim 3, wherein a time lag from an update timing of the stress data stored during the first period to an end timing of the first period is larger for the first subpixel than for the second subpixel, and a time lag from an update timing of the stress data stored during the second period to an end timing of the second period is smaller for the first subpixel than for the second subpixel.

5. The display device of claim 3, wherein the control unit stores stress data corresponding to the first subpixel first and stores stress data corresponding to the second subpixel last during the first period, while storing stress data corresponding to the second subpixel first and stores stress data corresponding to the first subpixel last during the second period.

6. The display device according to claim 3, wherein the vertical scanning direction of the display section is taken as the up-down direction, the first sub-pixel is located at an upper end of the display section, and the second sub-pixel is located at a lower end of the display section.

7. The display device according to claim 3, wherein the vertical scanning direction of the display section is the up-down direction, the first sub-pixel is located in an upper part of the display section, and the second sub-pixel is located in a lower part of the display section.

8. The display device according to claim 3, wherein the vertical scanning direction of the display section is the up-down direction, the first sub-pixel is located at the upper end or the lower end of the display section, and the second sub-pixel is located in the center between the upper and lower ends.

9. The display device according to any one of claims 1 to 4, wherein the first order and the second order are each a random order.

10. The display device according to any one of claims 1 to 9, wherein the control unit stores the plurality of stress data in the first order one or more times during an Nth power-on period.

11. The display device according to claim 10, wherein the control unit does not store the plurality of stress data in the second order during the Nth power-on period.

12. The display device of claim 11, wherein the control unit stores the plurality of stress data in the second order at least once during the (N+1)th power-on period, and does not store the plurality of stress data in the first order.

13. The display device according to claim 10, wherein the control unit stores the plurality of stress data in the second order one or more times during the Nth power-on period.

14. A display device as described in any one of claims 1 to 13, wherein the control unit invalidates or erases from the second memory the stored stress data among the plurality of stress data when the power is turned off while the plurality of stress data are being saved.

15. The display device according to any one of claims 1 to 14, wherein the control unit writes a completion flag to the second memory when saving of the plurality of stress data is completed.

16. The display device according to any one of claims 1 to 15, wherein the control unit reads out the previously stored plurality of stress data from the second memory and stores them in the first memory.

17. The display device according to any one of claims 1 to 16, wherein the control unit writes the storage order in the second memory when storage of the plurality of stress data has been completed.

18. The display device according to claim 17, wherein the control unit reads out the previously saved order from the second memory and stores it in the first memory.

19. The display device according to any one of claims 1 to 18, wherein the control unit generates output data based on the plurality of stress data and the video data in the first memory.

20. The display device according to any one of claims 1 to 19, wherein the control unit saves the multiple stress data in multiple vertical blanking periods.

21. The display device according to any one of claims 1 to 20, wherein the control unit stores stress data for each unit area consisting of one or more sub-pixels.

22. The display device according to claim 2, wherein the first period and the second period are equal to or greater than 10 times the update period.

23. A display device according to any one of claims 1 to 22, further comprising a temperature sensor, wherein the control unit updates the plurality of stress data based on the video data and the temperature obtained from the temperature sensor.

24. The display device according to any one of claims 1 to 23, further comprising a timing controller including a processor functioning as the control unit and the first memory.

25. The display device of any one of claims 1 to 24, wherein each subpixel has a light-emitting element that includes an organic light-emitting layer or a quantum dot light-emitting layer.

26. The display device according to any one of claims 1 to 25, comprising a volatile memory as the first memory.

27. The display device according to any one of claims 1 to 26, further comprising a non-volatile memory as the second memory.

28. The display device according to any one of claims 1 to 26, wherein the second memory is arranged on a network.

29. An electronic device comprising the display device according to any one of claims 1 to 26 and the second memory.

30. A control method for a display device comprising a plurality of sub-pixels positioned across an entire display area and a first memory for storing a plurality of stress data corresponding to the plurality of sub-pixels, and capable of accessing a second memory separate from the first memory, the control method comprising: updating the plurality of stress data based on video data; storing the plurality of stress data in the first memory in the second memory in a first order during a first period; and storing the plurality of stress data in the first memory in the second memory in a second order different from the first order during a second period following the first period.

31. A program that causes a processor to execute the display device control method according to claim 30.

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