Power supply apparatus

Abstract

When a current is supplied from a driving power source VB to a load 1 via a FET 4a, a chip-external detection resistor R converts a current based on the aforementioned current to a voltage by energizing the detection resistor. An A / D converter 12 converts the voltage converted by the chip-external detection resistor R to a data value. When a computed value based on the data value exceeds a threshold value, the output control unit 15 performs a protection operation for stopping the supply of current to the load 1 by the FET 4a. A gain switching unit 33 is mounted on a control unit 11 configured from an IC, and the resolution of current detection in the A / D converter 12 is improved.

Description

power supply device CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application is based on Japanese Application No. 2023-107121, filed on June 29, 2023, the contents of which are incorporated herein by reference.

[0002] The present disclosure relates to a power supply apparatus including a power device that supplies current from a driving power supply to a load.

[0003] For example, Patent Documents 1 and 2 propose methods for implementing a fuse function using a semiconductor switch to protect a wire harness and a load. Hereinafter, such a protection function may be referred to as eFuse control. To achieve eFuse control, a large current must be interrupted in a short time due to the thermal time constant of the wire harness. On the other hand, to reduce costs by using thinner wires in the harness, it is necessary to improve the accuracy of current detection near the limit current that can steadily flow through the harness.

[0004] Patent No. 4624400 Patent No. 4762044

[0005] One method involves providing two types of I / V conversion resistors for the output used to monitor the current flowing through a semiconductor switch and switching them depending on the current range. In this case, in the current range where measurements are required by switching from high resistance to low resistance, the current measurement resolution decreases, resulting in the need for protection by shutting off the fuse earlier than the ideal fusing characteristic. Furthermore, for the high resistance side, a resistance value must be selected that ensures current detection accuracy near the current that can steadily flow through the harness. Due to the reduced measurement resolution and A / D conversion error in the low load current range, it is difficult to determine the quality of the load or to grasp the load status, such as wake-up / sleep. To address this issue, increasing the number of resistor values ​​increases costs.

[0006] The present disclosure has been made in consideration of the above circumstances, and an object of the present disclosure is to provide a power supply device that can improve the resolution of current detection while suppressing an increase in cost.

[0007] According to the power supply device of the present disclosure, when a current is supplied from a drive power supply to a load via a power device, a current based on the current is passed through an off-chip detection resistor and converted into a voltage. The power device is a semiconductor element capable of switching relatively large amounts of power that constitutes a power conversion circuit such as an inverter. The data converter converts the voltage converted by the off-chip detection resistor into a data value based on predetermined characteristics.

[0008] The protection operation unit performs a protection operation to stop the power device from supplying current to the load when a calculated value based on the data value exceeds a threshold. The data converter and the protection operation unit are mounted on an IC chip, and the IC chip has a configuration that can switch the voltage level obtained in multiple stages for a current based on the current.

[0009] To be able to detect current even when the maximum load current flows, it is necessary to switch the voltage level so that the I / V conversion voltage becomes the maximum input voltage of the data converter. To achieve a configuration capable of switching voltage levels in multiple stages, the resistors used within the chip are each configured to have a reference resistor arranged to achieve each resistance value. Therefore, although variations in the absolute values ​​of the resistance values ​​occur due to variations in the semiconductor manufacturing process, it is possible to reduce the variations in the resistance ratio, enabling high-precision switching of voltage levels.

[0010] Furthermore, according to the power supply device of the present disclosure, the gain switching unit switches the voltage level obtained by switching the gain for the current based on the current. The data converter performs data conversion with the gain set to the minimum, and determines the gain for detecting the current according to the converted data value. With this configuration, an appropriate gain can be selected, and the current flowing through the load can be detected by performing data conversion up to two times.

[0011] Furthermore, according to the power supply device of the present disclosure, when the power device stops supplying current to the load, it is possible to determine an abnormality in the connection state of the off-chip detection resistor based on the data value converted when the source-side current supply unit supplies current to the off-chip detection resistor.

[0012] The above and other objects, features, and advantages of the present disclosure will become more apparent from the following detailed description taken in conjunction with the accompanying drawings, in which Fig. 1 is a diagram showing the configuration of a power supply device in a first embodiment, Fig. 2 is a diagram showing the relationship between load current and A / D converted value when the resistance value of the I / V conversion resistor is only low resistance, Fig. 3 is a diagram showing the relationship between load current and A / D converted value when the resistance value of the I / V conversion resistor is switchable between low resistance and high resistance, Fig. 4 is a diagram (part 1) showing the configuration of a gain switching unit, Fig. 5 is a diagram (part 2) showing the configuration of the gain switching unit, Fig. 6 is a diagram (part 3) showing the configuration of the gain switching unit, and Fig. 7 is a diagram (part 4) showing the configuration of a gain switching unit. 14 is a diagram showing an example of a table used to determine the type of IPD. FIG. 15 is a flowchart showing the processing by the control unit in the seventh or fifteenth embodiment. FIG. 16 is a diagram explaining the process of correcting the A / D conversion result by applying a linear function. FIG. 17 is a diagram showing the configuration of the power supply device in the eighth embodiment. FIG. 18 is a flowchart showing the processing by the control unit. FIG. 19 is a diagram showing the configuration of the power supply device in the ninth embodiment. 21 is a diagram showing the relationship between the load current and the A / D conversion value when the combined resistance of the off-chip detection resistor and the on-chip detection resistor is switched; FIG. 22 is a diagram showing the configuration of a power supply device in the tenth embodiment; FIG. 23 is a diagram showing the combined resistance of the chip that is applied depending on the on-off state of the switches sw1 to sw4; FIG. 24 is a flowchart showing the processing contents of the control unit in the eleventh embodiment; and FIG. 25 is a diagram showing the relationship between the load current and the A / D conversion value when the combined resistance of the off-chip detection resistor and the on-chip detection resistor is switched;26 is a diagram showing the relationship between the load current and the A / D conversion value when the combined resistance value of the off-chip detection resistor and the on-chip detection resistor is switched, FIG. 26 is a diagram (part 1) showing the configuration of a power supply device in the 12th embodiment, FIG. 27 is a diagram (part 2) showing the configuration of a power supply device, FIG. 28 is a diagram (part 3) showing the configuration of a power supply device, FIG. 29 is a diagram (part 1) showing the configuration of a power supply device in the 13th embodiment, FIG. 30 is a diagram (part 2) showing the configuration of a power supply device, FIG. 31 is a diagram (part 1) showing the configuration of a power supply device in the 16th embodiment, and FIG. 32 is a diagram (part 2) showing the configuration of a power supply device.

[0013] 1, a power supply device according to this embodiment supplies current to a load 1, one end of which is connected to ground, from a power source VB via an IPD 2 and a harness 3. The IPD 2 has a drain connected to the power source VB and includes N-channel MOSFETs 4a and 4b, the gates of which are connected in common. The source of FET 4a, which is an example of a power device, is connected to the load 1 via the harness 3, and the source of FET 4b is connected to ground via a P-channel MOSFET 5 and an off-chip detection resistor with a resistance value R, hereinafter referred to as the off-chip detection resistor R.

[0014] The source of FET 4b, together with the source of FET 5, is connected to the inverting input terminal of an operational amplifier 7, the non-inverting input terminal of which is connected to the source of FET 4a. FETs 4a and 4b form a transistor pair 4. FET 4b is a so-called sense MOS, and FETs 4b and 5, along with the operational amplifier 7, form a current output circuit 8. The gate of transistor pair 4 is driven by a control unit 11.

[0015] Inside the control unit 11, which is made up of an IC, an A / D converter 12, an eFuse (I ２ , t) characteristic calculation unit 13, interruption determination unit 14, and output control unit 15 are connected in series. The input terminal of an A / D converter 12, which is an example of a data converter, is connected to a common connection point of the IPD 2 and the off-chip detection resistor 6. The data converted by the A / D converter 12 is stored in an eFuse (I ２, t) are input to the characteristic calculation unit 13. The calculation result of the calculation unit 13 is input to the trip determination unit 14, and the determination result of the trip determination unit 14 is input to the output control unit 15.

[0016] eFuse (I ２ , t) The characteristics calculation unit 13 calculates and outputs the data converted by the A / D converter 12 based on data proportional to the square of the detected current, as in the "multiplication circuit 200" shown in Figure 1 of Japanese Patent Laid-Open No. 2023-18957. This is based on the fact that the smoking time t of the harness 3 has a characteristic that depends on the square of the current flowing through it, as described in the publication.

[0017] The shutdown determination unit 14 compares the data calculated as described above with a threshold value to determine whether to issue a shutdown instruction. The output control unit 15 drives the gates of the transistor pair 4 of the IPD 2 in response to an output instruction input from a higher-level control device (not shown). When a shutdown instruction is input from the shutdown determination unit 14, the output control unit 15, which corresponds to a protection operation unit, turns off the transistor pair 4.

[0018] A gain switching unit 33 is connected between the input terminal of the A / D converter 12 and the off-chip detection resistor 6. The gain switching unit 33 can switch the gain in two or more stages. The gain switching control is performed by an eFuse (I ２ , t) are performed by the characteristic calculation unit 13. The power supply device 17 is made up of the components described above excluding the harness 3 and the load 1.

[0019] Next, the operation of this embodiment will be described. As shown in Figure 2, in the load current-I / V conversion characteristics when a low gain is selected, in region (1) where the load current value is small, there is also the influence of errors due to A / D conversion, making it difficult to determine whether the load is good or bad and whether it is in a wake-up or sleep state. Note that the numbers in parentheses correspond to the circled numbers in the figure. Furthermore, in region (2), the current measurement resolution is low, so it becomes necessary to perform a protective operation by shutting off the IPD 2 earlier than the ideal fusing characteristic of the harness 3. Region (3) indicates the current value that can steadily flow through the harness 3.

[0020] If the characteristics when a high gain is selected are added to Figure 2, the result is as shown in Figure 3. As shown, it is necessary to select the gain so that the current detection accuracy can be ensured near region (3).

[0021] The gain switching unit 33 can be configured with a circuit such as that shown in FIG. 4 or FIG. 5. The gain can be changed to 1x, 2x, or 4x by combining the on / off states of switches SW10 to SW11 or selectively turning on switches SW20 to SW22. This gain switching results in the load current-I / V conversion characteristics shown in FIG. 7. Here, the load current is IL, the monitor current flowing through the off-chip detection resistor 6 is IS, the resistance of the off-chip detection resistor 6 is R, the current ratio is KILIS, and the maximum input voltage of the A / D converter 12 is V_ADMAX. With a gain of 1x, it is possible to detect a current up to V_ADMAX / R*KILIS. With a gain of 2x, it is possible to detect a current up to V_ADMAX / R*KILIS / 2. With a gain of 4x, it is possible to detect a current up to V_ADMAX / R*KILIS / 4. 6, the output voltage can be changed to 1 / 4, 1 / 2, or 1 by selectively turning on switches SW30 to SW32. If the lowest output voltage is used as a reference, the gain can be similarly changed to 1, 2, or 4.

[0022] In order to be able to detect the current even when the maximum load current ILMAX flows, it is necessary to set the lowest gain so that the I / V conversion voltage is equal to or less than the maximum input voltage V_ADMAX of the A / D converter 12.

[0023] Assuming that the configuration of this embodiment is applied to, for example, an ECU (Electronic Control Unit), in order to improve detection accuracy, a load current must be passed during the manufacturing process to correct the characteristics of the IPD 2 and the off-chip detection resistor 6. In this case, correction is performed within the constraints of the inspection jig and equipment, at a current value that provides sufficient A / D conversion accuracy, and by setting the gain switcher 33, correction is performed at a gain setting that ensures the highest resolution at at least one condition, preferably point D (see FIG. 7 ) near the upper limit current (3) that can steadily flow through the harness, where the highest current accuracy is required. When other gain switch settings are used, correction is performed based on the gain ratio, thereby shortening the ECU inspection time.

[0024] Here, when the gain switching unit 33 switches the gain to 1x, 2x, or 4x, if a squared current characteristic is desired, the input is multiplied by 1x, 4x, or 16x. 4x and 16x can be achieved by shifting the digital data by 2 bits or 4 bits, respectively, and can be configured with a simple arithmetic circuit. The gain may also be switched by 1x, √2x, 2x, etc. Similarly, when a squared current characteristic is desired with these switching settings, the input is multiplied by 1x, 2x, or 4x. 2x and 4x can be achieved by shifting the digital data by 1 bit or 2 bits, respectively, and can be configured with a simple arithmetic circuit.

[0025] Furthermore, by taking into account the gain error of the gain switching unit 33 and setting the gain slightly higher as the gain becomes lower, for example, ((4 / 2) + α) / 2 + β times, (4 / 2) + α times, or 4 times, it is possible to obtain a data conversion result corresponding to a larger current value when the gain is switched to a lower level in a region where the load current is large. As the calculated value based on the data value increases more quickly, the calculated value is more likely to exceed the threshold value sooner, enabling a protective operation to stop the current supply from the power device to the load more quickly. Therefore, even if there is variation in the gain of the gain switching unit 33, safer protection can be achieved.

[0026] As described above, according to this embodiment, when current is supplied from the drive power supply VB to the load 1 via the FET 4a and the harness 3, a current based on that current is converted into a voltage by passing it through the off-chip detection resistor 6. The gain switching unit 33 selects a gain that ensures the highest resolution for the voltage within the input voltage range of the downstream A / D converter 12. This makes it possible to virtually improve the resolution of data conversion in the A / D converter 12. This also makes it possible to improve current detection accuracy in the small current region where the highest accuracy is required and near the upper limit of the current that can steadily flow through the harness 3.

[0027] Second Embodiment In the following, the same parts as those in the first embodiment are denoted by the same reference numerals and their explanations are omitted, and only the differences will be explained. As shown in FIG. 8, the second embodiment shows the control contents in the control unit 11. When processing starts, the gain of the gain switching unit is set to the lowest value of 1 (S51), and A / D conversion is performed (S52). This corresponds to the first data conversion. Then, when the maximum output value of the A / D conversion circuit is set to admax, it is determined whether the A / D conversion result is equal to or greater than admax / 2 (S53).

[0028] If the A / D conversion result is equal to or greater than the conversion value admax / 2 (S53; Yes), the A / D conversion result is multiplied by four and the resulting value is used as the final digital value corresponding to the detected current (S61). Note that, for simplicity of explanation, the "case of ideal characteristics" shown in the figure ignores the case where the conversion characteristics of the current output circuit 8 are actually nonlinear in the low current region.

[0029] If the A / D conversion result is less than the conversion value admax / 4 (S54; No), the gain switcher is switched to a gain (4x) (S55), and A / D conversion is performed as in step S2 (S56). The A / D conversion result is then used as the final digital value (S57). If the A / D conversion result is less than the conversion value admax / 2 but greater than or equal to the conversion value admax / 4 (S54; Yes), the gain switcher is switched to a gain (2x) (S58), and A / D conversion is performed (S59). The A / D conversion result is then doubled and used as the final digital value corresponding to the detected current (S60).

[0030] The conversion values ​​admax / 2 to admax / 4 may be finely adjusted depending on the characteristics of the gain switching circuit in the chip, or may be stored in advance in a storage unit 11M (not shown) provided in the control unit 11.

[0031] As described above, according to the second embodiment, conversion resolution in the current domains (1) and (3) can be increased by performing A / D conversion a maximum of two times.

[0032] 9, a power supply device 28D of the third embodiment includes a control unit 11D having a source-side current supply unit 29I. The source-side current supply unit 29I is configured with a series circuit of a current source 30 and a switch 31 connected between the control unit 11D and an internal power supply. In a power supply device 28Da shown in FIG. 10, the source-side current supply unit 29I is disposed inside an IPD 2I. The source-side current supply unit 29I here is for diagnostic purposes within the chip of the IPD 2I.

[0033] 9 and 10 , when no current is passed through the load 1 from the IPD 2 or 2I, a current Itest is supplied from the source-side current supply unit 29I to the off-chip detection resistor 6, and the resulting voltage V_val1 is detected by the A / D converter 12. Similarly, when no current is passed through the load 1 from the IPD 2 or 2I, a current is supplied from the source-side current supply unit 29I to the off-chip detection resistor 6, and the resulting voltage V_val2 is detected by the A / D converter 12.

[0034] 9, the voltage V_val1 generated when the gain switch 33 is set to a gain of 1 is V_val1=R×Itest. In the configuration shown in FIG. 10, when the source-side current supply unit 29I supplies a current Idiag with the gain switch 33 set to a gain of 1 and no current is applied to the load 1 from the IPD 2I, the generated voltage V_val1 is V_val1=R×Idiag. By comparing V_val1 or V_val2 with an expected value under normal conditions, it is possible to determine an abnormality in the connection state of the off-chip detection resistor 6 and to determine the type of resistance value of the off-chip detection resistor 6, thereby enabling various control parameters (described later) to be set without requiring setting from a microcomputer or the like.

[0035] 11 shows a power supply device 28F of the fourth embodiment, which includes a control unit 11F and a source-side current supply unit 29R. The source-side current supply unit 29R includes a resistive element 32 having a resistance value Rtest instead of the current source 30.

[0036] In the configuration shown in Figure 11, when no current is flowing from the IPD 2 to the load 1, the gain switching unit is set to a gain of 1, and the switch 31 of the source side current supply unit 29R is turned on, the resulting voltage V_val1 is V_val1 = VCC x R / (R + Rtest).

[0037] Fifth Embodiment FIG. 12 illustrates a fifth embodiment. The control details shown in FIG. 12 can be similarly applied to the configuration of the fourth embodiment. As shown in FIG. 12, processing begins in a self-check mode with the output control unit 15 turning off the IPD 2 or putting it in standby mode. First, the switch 31 of the source-side current supply unit 29I or 29R is turned on to pass current through a resistor for I / V conversion, in this case the off-chip detection resistor 6 (S21). Then, A / D conversion is performed by the A / D converter 12, and the resistance value read from the conversion result is determined (S22). A comparator may also be used for this determination.

[0038] If the determined resistance value is equal to or greater than the upper threshold (S23; Yes), it is suspected that the I / V conversion resistor is open or shorted to the power supply, and therefore it is determined to be abnormal (S28).Then, for example, a command to execute a diagnosis is sent to a higher-level control device, or the IPD 2 is maintained in the off state (S29).

[0039] If the determined resistance value is equal to or less than the lower threshold value (S24; Yes), it is suspected that the connection of the I / V conversion resistor has a ground fault, and therefore it is determined to be abnormal (S26). Then, the same process as in step S29 is performed (S27). On the other hand, if the determined resistance value is greater than the lower threshold value (S24; No), it is determined to be normal (S25).

[0040] As described above, according to the fourth or fifth embodiment, by determining the resistance value when a source current is passed through the I / V conversion resistor via the source-side current supply unit 29 while the supply of current to the load 1 by the IPD 2 is stopped, it is possible to determine whether the connection of the I / V conversion resistor is normal or abnormal.

[0041] 13 and 14 , in the sixth embodiment, the control unit 11F of the fourth or fifth embodiment determines the type of connected IPD 2 based on the resistance value of the off-chip detection resistor 6. As shown in FIG. 13 , when processing is started in a self-check mode in the same state as in the fourth embodiment, processing similar to step S21 is performed (S31). Then, A / D conversion is performed by the A / D converter 12, and the conversion result is acquired as resistance value data ValR (S32). Control parameters are set based on the resistance value data ValR (S33).

[0042] 14, for example, the control unit 11F holds a data table for determining the type of IPD 2. For example, if the resistance value R is in the range of 5 kΩ to 7.5 kΩ, the type of IPD 2 is KILIS=500, and the wire cross-sectional area of ​​the harness 3 is 0.15 mm ２ If the resistance value R is in the range of 10 kΩ to 12.5 kΩ, the type of IPD2 is KILIS=1000, the wire cross-sectional area is 0.3 mm ２ These are set as parameters to be used in eFuse control. This information can be used to start control with rough parameters before obtaining accurate information such as conversion ratios and correction values ​​from a higher-level microcomputer, for example.

[0043] By providing the gain switching unit 33 inside the chip, it is not a problem even if the resistance value of the off-chip detection resistor 6 is high. Therefore, parameter setting and current monitoring can be achieved with one terminal, eliminating the need for terminals that were previously provided exclusively for parameters. This makes it possible to reduce the number of terminals and components such as resistors dedicated to parameter setting.

[0044] 15, in the seventh embodiment, the connection state of the off-chip detection resistor 6 is determined in the same manner as in the fourth embodiment. After steps S26 and S28 are executed, for example, when performing correction on the A / D conversion result using a linear function, the intercept (offset) parameter Bh shown in FIG. 16 is changed to a value larger than the normally used value (S42). Here, the functional part that performs correction using the linear function corresponds to the correction unit.

[0045] Thereafter, when the IPD 2 starts energizing, the correction value of the A / D conversion result can be used to recognize that a large current is flowing regardless of the actual load current IL. As a result, the eFuse control function or the power monitoring function operates in a short time to provide protection by cutting off the current, thereby safely protecting the load 1. Furthermore, if the determination in step S24 is "No," the source-side current supply source 29 is turned off and eFuse control, etc. is started.

[0046] 17 , a normally-closed switch 36 is inserted between the off-chip detection resistor 6 and the gain switching unit 33, and the source-side current supply unit 29I of the sixth embodiment is connected to a common connection point between the gain switching unit 33 and the switch 36.

[0047] 18 , step S42 is replaced with step S43. In step S43, switch 36 is turned off, and switch 31 of source-side current supply unit 29I is turned on. As a result, when current is subsequently applied by IPD 2, the voltage input to A / D converter 12 becomes higher than the normal input range, causing the A / D converter to recognize that a large current is flowing regardless of the actual load current IL. As a result, protection that cuts off the current by the eFuse control function or the power amount monitoring function operates in a short time, thereby safely protecting load 1.

[0048] (Other Embodiments) The gain change in the gain switching unit 33 may be set to two stages, or three or more stages. ２, t) The characteristic calculation unit 13 may be integrated to form a data converter that outputs a conversion result according to the two-wire characteristic of the current.

[0049] (Ninth embodiment) As shown in FIG. 19, in the ninth embodiment, a resistance value changing unit 16 is connected between the input terminal of the A / D converter 12 and the ground. The resistance value changing unit 16 includes a series circuit in which a resistive element with a resistance value r corresponding to an on-chip detection resistor is connected to each of the switches SW1 to SW4. Hereinafter, this will be referred to as on-chip detection resistor r. "On-chip" and "off-chip" refer to being inside and outside the IC chip, respectively. It is also possible to provide five or more pairs of switches and on-chip detection resistors. The on / off control of the switches S1 to S4 is performed by an eFuse (I ２ , t) are performed by the characteristic calculation unit 13. The power supply device 17 is made up of the components described above excluding the harness 3 and the load 1.

[0050] Next, the operation of the ninth embodiment will be described. As shown in Figure 2, in the load current-I / V conversion characteristics when the resistance value is set low, in region (1) where the load current value is small, there is also the influence of errors due to A / D conversion, making it difficult to determine whether the load is good or bad and whether it is in a wake-up or sleep state. Furthermore, in region (2), the current measurement resolution is low, so it becomes necessary to perform a protective operation by shutting off the IPD 2 earlier than the ideal fusing characteristic of the harness 3. Region (3) indicates the current value that can steadily flow through the harness 3.

[0051] If we add the characteristics when the resistance value is set higher to Figure 2, we get the results shown in Figure 3. In this way, even if we simply switch to a high resistance, it is necessary to select a resistance value so that the current detection accuracy in the vicinity of region (3) can be ensured.

[0052] In the ninth embodiment, the resistance value changing unit 16 changes the combined resistance value of the on-chip detection resistor r to infinity, r, r / 2, r / 3, and r / 4 by selectively turning on switches S1 to S4 as shown in Fig. 20. By changing from a high resistance setting using only the off-chip detection resistor R to adding the combined resistance value of the on-chip detection resistor r in parallel, the load current-I / V conversion characteristics become as shown in Fig. 21.

[0053] To enable current detection even when the maximum load current ILMAX flows, the resistance value of each on-chip detection resistor r is set so that the I / V conversion voltage is equal to or less than the maximum input voltage V_ADMAX of the A / D converter 12 when all the on-chip detection resistors r are connected. Furthermore, each on-chip detection resistor r is configured to have its respective resistance value by arranging reference resistors. Therefore, although variations in the absolute values ​​of the resistance values ​​occur due to variations in the semiconductor manufacturing process, it is possible to reduce variations in the resistance ratio.

[0054] Assuming that the configuration of the ninth embodiment is applied to, for example, an ECU (Electronic Control Unit), in order to improve detection accuracy, a load current must be passed during the manufacturing process to correct the characteristics of the IPD 2 and the off-chip detection resistor R. At this time, correction is performed under at least two conditions: a current value that provides sufficient A / D conversion accuracy within the constraints of the inspection jig and device, and the setting of the resistance value change unit 16. When other switching settings are used, correction is performed based on the resistance ratio, which makes it possible to shorten the inspection time for the ECU.

[0055] Here, if the load current is IL, the monitor current flowing through the off-chip detection resistor R is IS, and the current ratio of the off-chip detection resistor R is KILIS, the relationship between the currents IL and IS is (IL = KILIS x IS). For example, as shown in FIG. 21 , the on-chip detection resistor r is not connected, and a constant load current IL flows only through the off-chip detection resistor R. In this case, the value of (R x KILIS) can be corrected by performing A / D conversion at point A. Furthermore, by connecting only one on-chip detection resistor r in parallel and performing A / D conversion at point B, the value of r can be corrected.

[0056] As another method, the load current IL is made variable, current flows only through the off-chip detection resistor R, and the load current that reaches a certain A / D converted value corresponding to point A is found to correct the value of R. Furthermore, the value of r can also be corrected by connecting only one on-chip detection resistor r in parallel and finding the load current that reaches a certain A / D converted value corresponding to point C.

[0057] When detecting the load current IL, the combined resistance value gradually decreases by sequentially connecting one to four on-chip detection resistors r in parallel with the off-chip detection resistor R, starting from a state in which the on-chip detection resistor r is not connected. When the on-chip detection resistor r is not connected, the load current IL can only be detected in the range of IL = 0 to V_ADMAX / (R × KILIS).

[0058] In the ninth embodiment, in the resistance value change unit 16, by connecting the in-chip detection resistors r sequentially in parallel, it becomes possible to detect the load current IL up to the above upper limit plus the range of +V_ADMAX / (r×KILIS) +2V_ADMAX / (r×KILIS) +3V_ADMAX / (r×KILIS) +4V_ADMAX / (r×KILIS).

[0059] As described above, according to the ninth embodiment, when current is supplied from the drive power supply VB to the load 1 via the FET 4a and the harness 3, a current based on that current is converted into a voltage by passing it through the off-chip detection resistor R. The A / D converter 12 converts the voltage converted by the off-chip detection resistor R into a data value. When a calculated value based on the data value exceeds a threshold, the output control unit 15 performs a protective operation to stop the current supply from the FET 4a to the load 1. The control unit 11, which is configured as an IC, is equipped with a resistance value changing unit 16 having a plurality of on-chip detection resistors r, which can be connected in parallel to the off-chip detection resistors 6.

[0060] In this way, increasing the number of on-chip detection resistors r formed in the control unit 11 configured as an IC does not lead to an increase in costs. By changing the combined resistance value with the off-chip detection resistor R using the resistance value change unit 16, it is possible to further reduce the voltage input to the A / D converter 12. This makes it possible to virtually improve the resolution of data conversion in the A / D converter 12. This also makes it possible to improve current detection accuracy in the small current region where accuracy is most required and near the upper limit of the current that can steadily flow through the harness 3.

[0061] 22, a power supply device 21 of the tenth embodiment includes a resistance value changing unit 22 instead of the resistance value changing unit 16. In the resistance value changing unit 22, on-chip detection resistors having resistance values ​​r1 to r4 are connected to the switches swS1 to sw4, respectively.

[0062] The resistance values ​​r1 to r4 are set, for example, as follows: r1=4r r2=2r=r1 / 2 r3=r=r1 / 4 r4=r / 2=r1 / 8

[0063] That is, the resistance is set to a power of 1 / 2 of the reference resistance value r1, and the switches sw1 to sw4 are selectively turned on to change the combined resistance value as shown in Fig. 23. Note that the resistance value may be changed by turning on two or more switches simultaneously, or the resistance value may be switched between infinity, r, r / 2, ... as in the first embodiment.

[0064] 11th Embodiment As shown in FIG. 24, the 11th embodiment shows the control details of the control unit 11. When processing starts, the combined resistance value for I / V conversion is set to the lowest value {1 / (1 / R+4 / r)} (S1), and A / D conversion is performed (S2). This corresponds to the first data conversion. The A / D conversion result is then compared with each of the conversion values ​​adl4 to adl1 shown in FIG. 9, and it is determined whether or not the result is equal to or greater than each of the conversion values ​​adl4 to adl1 (S3 to S6).

[0065] If the A / D conversion result is equal to or greater than the conversion value adl4 (S3; Yes), it belongs to current region E shown in Figure 25. In this case, the A / D conversion result is multiplied by (R + 4r) / R to obtain the final digital value corresponding to the detected current (S19). (R + 4r) / R is the ratio of the combined resistance of the off-chip detection resistor R and the four on-chip detection resistors r to the resistance of the off-chip detection resistor R alone. Note that the "ideal characteristics" shown in the figure ignores, for simplicity's sake, the case where the conversion characteristics of the current output circuit 8 are actually nonlinear in the low current region.

[0066] If the A / D conversion result is less than the conversion value adl1 (S5; No), the device belongs to current region A. The on-chip detection resistor r is not connected, and the I / V conversion resistor is switched to only the off-chip detection resistor R (S7), and A / D conversion is performed as in step S2 (S8). The A / D conversion result is then used as the final digital value (S9). If the A / D conversion result is less than the conversion value adl2 but greater than or equal to the conversion value adl1 (S5; Yes), the device belongs to current region B. The I / V conversion resistor is switched to a parallel connection of the off-chip detection resistor R and one on-chip detection resistor r (S10), and A / D conversion is performed (S11). The A / D conversion result is then multiplied by (R + r) / R to obtain the final digital value corresponding to the detected current (S12).

[0067] If the A / D conversion result is equal to or greater than conversion value adl2 and less than conversion value adl3 (S6; No), the current belongs to current region C, and the resistance for I / V conversion is switched to a parallel connection of off-chip detection resistor R and two on-chip detection resistors r (S13), and A / D conversion is performed (S14).The A / D conversion result is then multiplied by (R+2r) / R to obtain the final digital value corresponding to the detected current (S15).

[0068] If the A / D conversion result is less than conversion value adl4 and greater than or equal to conversion value adl3 (S6; Yes), the device belongs to current domain D, and the I / V conversion resistor is switched to a parallel connection of off-chip detection resistor R and three on-chip detection resistors r (S16), followed by A / D conversion (S17). The A / D conversion result is then multiplied by (R + 3r) / R to obtain the final digital value corresponding to the detected current (S18). Steps S8, S11, S14S, and S17 correspond to the second data conversion. The conversion values ​​adh1 to adh4 are previously stored in a memory unit 11M (not shown) provided in the control unit 11.

[0069] As described above, according to the eleventh embodiment, the A / D conversion results adl1 to adl4 when the resistance value for I / V conversion is set to the lowest are stored in advance, and the actual A / D conversion results are compared with these to classify the current regions A to E. For the current regions A to D, the I / V conversion resistance is switched to either the off-chip detection resistor R alone, or the on-chip detection resistor r of the resistance value change unit 16 connected in parallel sequentially to the off-chip detection resistor R, and A / D conversion is performed again. In this way, the conversion resolution in the current regions A to D can be artificially increased by performing A / D conversion up to two times.

[0070] 26 and 27 , power supply devices 28I and 21I of the 12th embodiment include a source-side current supply unit 29I in each of control units 11I and 11B. The control unit 11B includes the resistance value change unit 22 of the 10th embodiment. The source-side current supply unit 29I is configured with a series circuit of a current source 30 and a switch 31 connected between a power supply VB and ground. In a power supply device 28Ia shown in FIG. 28 , the source-side current supply unit 29I is disposed inside an IPD 2I. The source-side current supply unit 29I here is for diagnostic purposes within the chip of the IPD 2I.

[0071] 26 and 27 , with no current passing through the load 1 from the IPD 2, all on-chip detection resistors r are disconnected, a current Itest is supplied from the source-side current supply unit 29I to the off-chip detection resistor R, and the resulting voltage V_val1 is detected by the A / D converter 12. Similarly, with no current passing through the load 1 from the IPD 2 and one or more on-chip detection resistors r connected, a current is supplied from the source-side current supply unit 29I to the I / V conversion resistor, and the resulting voltage V_val2 is detected by the A / D converter 12.

[0072] In the configuration shown in FIG. 26, the voltage V_val1 generated when switches S1 to S4 are all turned off is V_val1=R×Itest, and when only switch S1 is turned on, V_val2=1 / (1 / R+1 / r)×Itest=R×r / (R+r)×Itest.

[0073] In the configuration shown in FIG. 27, the voltage V_val1 generated when switches S1 to S4 are all turned off is V_val1=R×Itest, and the voltage V_val2 generated when only switch S4 is turned on is V_val2=1 / (1 / R+1 / r4)×Itest=R×r4 / (R+r4)×Itest.

[0074] Here, the on-chip detection resistors r1 to r4 are resistors within the same semiconductor chip, and the resistance ratios can be considered to be constant. Therefore, if the resistance value of any one of them is known, the resistance values ​​of each can be calculated from the following relational expressions: r1 = 4r, r2 = 2r, r3 = r, r4 = r / 2.

[0075] 28, when the load 1 is not energized by the IPD 2I, the switches S1 to S4 are all turned off, and the source-side current supply unit 29I supplies the current Idiag, the resulting voltage V_val1 is V_val1 = R × Idiag. Therefore, when only the switch S1 is turned on, the resulting voltage V_val2 is V_val2 = 1 / (1 / R + 1 / r) × Idiag = R × r / (R + r) × Idiag. Using the value of the off-chip detection resistor R as a reference, the resistance values ​​of the on-chip detection resistors r and r1 to r4 can be corrected from the values ​​of the voltages Vval1 and Vval2.

[0076] 29 and 30 show power supply devices 28R and 21R of a thirteenth embodiment, in which the source-side current supply unit 29I in the control units 11R and 11C is replaced with a source-side current supply unit 29R. The source-side current supply unit 29R includes a resistive element 32 having a resistance value Rtest instead of the current source 30.

[0077] 29, when the switches S1 to S4 are all turned off and the switch 31 of the source-side current supply unit 29R is turned on while no current is being passed through the load 1 from the IPD 2, the voltage V_val1 that is generated is V_val1=VCC×R / (R+Rtest). From this, the voltage V_val2 that is generated when only the switch S1 is turned on is V_val2=VCC×R×r / (Rtest×r+r×R+Rtest×R).

[0078] Here, since the resistor Rtest and the in-chip detection resistor r are resistors within the same semiconductor chip, the resistance ratio can be considered to be constant. If r=Rtest×a, then V_val1=VCC×R / (R+Rtest), V_val2=VCC×R×Rtest×a / (a×Rtest ２ + a × Rtest × R + Rtest × R).

[0079] 30, when the switches S1 to S4 are all turned off and the switch 31 of the source-side current supply unit 29R is turned on while no current is being passed through the load 1 from the IPD 2, the voltage V_val1 that is generated is V_val1=VCC×R / (R+Rtest). From this, the voltage V_val2 that is generated when only the switch S3 is turned on is V_val2=VCC×R×r3 / (Rtest×r3+r3×R+Rtest×R).

[0080] Here, the resistance ratio of the resistor Rtest and the in-chip detection resistors r1 to r4 can be considered to be constant, as above. If r3=Rtest×a, then V_val1=VCC×R / (R+Rtest) V_val2=VCC×R×Rtest×a / (a×Rtest ２ + a×Rtest×R+Rtest×R). The resistance ratios of the on-chip detection resistors r1 to r4 can be considered to be constant. Therefore, if the resistance value of any one of them is known, the resistance value of each can be calculated from a relational expression such as r1=4r, r2=2r, r3=r, r4=r / 2.

[0081] Next, the operation of the thirteenth embodiment will be described. The same operation can be achieved with the configuration of the twelfth embodiment. As shown in FIG. 12, processing begins in a self-check mode with the output control unit 15 turning off the IPD 2 or in standby mode. First, the switch 31 of the source-side current supply unit 29I or 29R is turned on to pass current through a resistor for I / V conversion, here the off-chip detection resistor R (S21). Then, A / D conversion is performed by the A / D converter 12, and the resistance value read from the conversion result is determined (S22). A comparator may also be used for the determination.

[0082] If the determined resistance value is equal to or greater than the upper threshold (S23; Yes), it is suspected that the I / V conversion resistor is open or shorted to the power supply, and therefore it is determined to be abnormal (S28).Then, for example, a command to execute a diagnosis is sent to a higher-level control device, or the IPD 2 is maintained in the off state (S29).

[0083] If the determined resistance value is equal to or less than the lower threshold value (S24; Yes), it is suspected that the connection of the I / V conversion resistor has a ground fault, and therefore it is determined to be abnormal (S26). Then, the same process as in step S29 is performed (S27). On the other hand, if the determined resistance value is greater than the lower threshold value (S24; No), it is determined to be normal (S25).

[0084] As described above, according to the twelfth and thirteenth embodiments, the resistance values ​​of the on-chip detection resistors r, r1 to r4 are corrected according to the data value converted when the source-side current supply unit 29I or the like applies current to the off-chip detection resistor R while the IPD 2 is turned off. Furthermore, by determining the resistance value when a source current is applied to the I / V conversion resistors via the source-side current supply unit 29 while the IPD 2 is turned off, it is possible to determine whether the connection of the I / V conversion resistors is normal or abnormal. If the resistance value of the off-chip detection resistors is switchable, an abnormality on the high-resistance side alone can also be detected by comparing the A / D conversion results for the low-resistance side and the high-resistance side after the start of current application. Therefore, it is necessary to at least detect whether there is an abnormality on the low-resistance side before taking the above-mentioned measures. It is also desirable to determine whether the resistance value on the high-resistance side after switching is normal, and if there is an abnormality, to take similar measures.

[0085] 14th Embodiment As shown in FIGS. 13 and 14 , in the 14th embodiment, the control unit 11I, 11R, 11B, or 11C of the 12th or 13th embodiment determines the type of connected IPD 2 based on the resistance value of the off-chip detection resistor R. As shown in FIG. 13 , when processing is started in a self-check mode in the same state as in the fourth embodiment, processing similar to step S21 is performed (S31). Then, A / D conversion is performed by the A / D converter 12, and the conversion result is obtained as resistance value data ValR (S32). Control parameters are set based on the resistance value data ValR (S33).

[0086] The control unit 11I etc. holds a data table for determining the type of the IPD 2, such as that shown in Fig. 14. For example, if the resistance value R is in the range of 5 kΩ to 7.5 kΩ, the type of the IPD 2 is KILIS=500, and the wire cross-sectional area of ​​the harness 3 is 0.15 mm ２ If the resistance value R is in the range of 10 kΩ to 12.5 kΩ, the type of IPD2 is KILIS=1000, the wire cross-sectional area is 0.3 mm ２These are set as parameters to be used in eFuse control. This information can be used to start control with rough parameters before obtaining accurate information such as conversion ratios and correction values ​​from a higher-level microcomputer, for example.

[0087] By making it possible to switch the connection combination with the on-chip detection resistor, it is not a problem even if the resistance value of the off-chip detection resistor is high. Therefore, parameter setting and current monitoring can be achieved with one terminal, eliminating the need for terminals that were previously provided exclusively for parameters. This makes it possible to reduce the number of terminals and components such as resistors dedicated to parameter setting.

[0088] 15th Embodiment As shown in Fig. 15, in the 15th embodiment, the connection state of the off-chip detection resistor R is determined in the same manner as in the 12th embodiment. After steps S26 and S28 are executed, for example, when performing correction using a linear function on the A / D conversion result, the intercept (offset) parameter Bh shown in Fig. 16 is changed to a value larger than the normally used value (S42). Here, the functional part that performs correction using the linear function corresponds to the correction unit.

[0089] Thereafter, when the IPD 2 starts energizing, the correction value of the A / D conversion result can be used to recognize that a large current is flowing regardless of the actual load current IL. As a result, the eFuse control function or the power monitoring function operates in a short time to provide protection by cutting off the current, thereby safely protecting the load 1. Furthermore, if the determination in step S24 is "No," the source-side current supply source 29 is turned off and eFuse control, etc. is started.

[0090] Sixteenth Embodiment The sixteenth embodiment is a variation of the fifteenth embodiment. As shown in Fig. 31 , a normally-closed switch 36 is inserted between the input terminal of the A / D converter 12 and the resistance value changing unit 16, and a source-side current supply unit 29I of the sixth embodiment is connected to a common connection point between the input terminal and the switch 36. Fig. 32 shows a configuration in which the switch 36 and a source-side current supply source 29R are connected to the same positions as in Fig. 31 in a control unit 11C having the resistance value changing unit 22 shown in Fig. 30, to form a control unit 11H.

[0091] 18, step S42 is replaced with step S43. In step S43, switch 36 is turned off, and switch 31 of source-side current supply unit 29I or 29R is turned on. As a result, when current is subsequently applied by IPD 2, the voltage input to A / D converter 12 becomes higher than the normal input range, causing the A / D converter to recognize that a large current is flowing regardless of the actual load current IL. As a result, protection that cuts off the current by the eFUSE control function or the power amount monitoring function operates in a short time, making it possible to safely protect load 1.

[0092] (Other embodiments) The resistance value of the off-chip detection resistor may be changed in three or more stages. The resistance value does not necessarily have to be changed. The number of current sources provided in the sink-side current source section may be "3" or less or "5" or more. ２ｔ The characteristic calculation unit 13 may be integrated to configure a data converter that outputs a conversion result according to the two-wire characteristic of the current.

[0093] In addition to the inventions described in the claims, this case also includes the following inventions: [1] A power supply device comprising: a power device (4a) that supplies current to a load (1) from a drive power supply (VB); an off-chip detection resistor (6) through which a current based on the current flows; a data converter (12) that converts a voltage converted by the off-chip detection resistor into a data value based on predetermined characteristics; and a protection operation unit (13-15) that performs a protection operation to stop the power device from supplying current to the load when a calculated value based on the data value exceeds a threshold value, and an IC chip (11, 11A, 11B, 11C, 11D, 11E, 11F, 11G, 11H, 11I, 11R) on which the data converter and the protection operation unit are mounted, wherein the IC chip further comprises a configuration capable of switching the voltage level obtained in multiple stages for a current based on the current. [2] The power supply device according to [1], further comprising: a gain switching unit (33) for switching a voltage level obtained by switching a gain for a current based on the current; wherein the data converter performs data conversion with the gain set to a minimum, and determines a gain for detecting the current according to the converted data value. [3] The power supply device according to [1] or [2], further comprising: a source-side current supply source (29I, 29R) for energizing the off-chip detection resistor while the power device is not energizing the load; and wherein the power supply device determines an abnormality in the connection state of the off-chip detection resistor according to the data value converted when the power device is energized. [4] The power supply device according to [3], further comprising: a correction unit for correcting output data of the data converter; and wherein the correction unit sets a correction parameter for correcting the correction unit so that the protection operation unit starts a protection operation more quickly when an abnormality in the detection resistor is determined. [5] The power supply device according to [3], further comprising: a correction unit for correcting output data of the data converter; and wherein the correction unit sets a correction parameter for correcting the correction unit so that the protection operation unit starts a protection operation more quickly when an abnormality in the detection resistor is determined.[6] The power supply device according to any one of [1] to [5], further comprising: a source-side current supply source (29I, 29R) for supplying current to the off-chip detection resistor while the power device is not supplying current to the load, wherein the control unit determines a resistance value of the off-chip detection resistor based on a result of data conversion associated with the current supply, and sets a control parameter according to the determined resistance value. [7] The power supply device according to any one of [1] to [6], further comprising: a resistance value changing unit (16) having a plurality of on-chip detection resistors (r, r1 to r4) connectable in parallel to the off-chip detection resistor, wherein the data converter performs data conversion while a combined resistance value of the off-chip detection resistor and the on-chip detection resistor is minimized, and the combined resistance value for detecting the current is determined according to the converted data value. [8] The power supply device according to any one of claims [1] to [7], further comprising a source-side current supply unit (29I, 29R) for supplying current to the off-chip detection resistor while the power device is not supplying current to the load, and correcting the resistance value of the on-chip detection resistor according to a data value converted when the source-side current source supplies current to the off-chip detection resistor. [9] The power supply device according to [8], further comprising a correction unit for correcting output data of the data converter, wherein, upon determining an abnormality in the detection resistor, the correction unit sets a correction parameter for the correction unit so that the protection operation unit starts protection operation more quickly.

[10] The power supply device according to [8], further comprising, upon determining an abnormality in the detection resistor, the input voltage of the data converter is set to a potential higher than a normal input range.

[0094] Although the present disclosure has been described with reference to the embodiments, it is understood that the present disclosure is not limited to the embodiments or structures. The present disclosure also encompasses various modifications and equivalent modifications. In addition, various combinations and forms, including only one element, more than one element, or less than one element, are also within the scope and spirit of the present disclosure.

Claims

1. A power supply device comprising: a power device (4a) that supplies current to a load (1) from a drive power supply (VB); an off-chip detection resistor (6) through which a current based on the current is passed; a data converter (12) that converts a voltage converted by the off-chip detection resistor into a data value based on predetermined characteristics; and a protective operation unit (13-15) that performs a protective operation to stop the supply of current to the load by the power device when a calculated value based on the data value exceeds a threshold value, and an IC chip (11, 11A, 11B, 11C, 11D, 11E, 11F, 11G, 11H, 11I, 11R) on which the data converter and the protective operation unit are mounted, and the IC chip further comprises a configuration capable of switching the voltage level obtained in multiple stages for a current based on the current.

2. A power supply device as described in claim 1, further comprising a gain switching unit (33) for switching a voltage level obtained by switching a gain for a current based on the current, wherein data conversion is performed by the data converter with the gain set to a minimum, and a gain for detecting the current is determined according to the converted data value.

3. A power supply device as claimed in claim 1 or 2, further comprising a source-side current supply source (29I, 29R) for passing current through the off-chip detection resistor when the power device is stopped from passing current through the load, and determining whether there is an abnormality in the connection state of the off-chip detection resistor depending on the data value converted when the current is passed through.

4. A power supply device as described in claim 3, further comprising a correction unit which corrects the output data of the data converter, and which sets a correction parameter of the correction unit so that the protective operation unit starts protective operation more quickly when an abnormality is detected in the detection resistor.

5. The power supply device according to claim 3, wherein when an abnormality in said detection resistor is detected, the input voltage of said data converter is set to a potential higher than a normal input range.

6. A power supply device as claimed in claim 1 or 2, further comprising a source-side current supply source (29I, 29R) for supplying current to the off-chip detection resistor when the power device is stopped from supplying current to the load, wherein the control unit determines the resistance value of the off-chip detection resistor based on the result of data conversion associated with the current supply, and sets a control parameter in accordance with the determined resistance value.

7. The power supply device according to claim 1, wherein the IC chip is provided with a resistance value changing section (16) having a plurality of on-chip detection resistors (r, r1 to r4) connectable in parallel to the off-chip detection resistor, and wherein data conversion is performed by the data converter with a combined resistance value of the off-chip detection resistor and the on-chip detection resistor set to a minimum, and the combined resistance value for detecting the current is determined according to the converted data value.

8. A power supply device as claimed in claim 1 or 7, further comprising a source side current supply unit (29I, 29R) for supplying current to the off-chip detection resistor when the power device is stopped from supplying current to the load, and which corrects the resistance value of the on-chip detection resistor in accordance with a data value converted when the source side current supply unit supplies current to the off-chip detection resistor.

9. A power supply device as described in claim 8, further comprising a correction section which corrects the output data of the data converter, and which sets a correction parameter of the correction section so that the protective operation section starts protective operation more quickly when an abnormality is detected in the detection resistor.

10. The power supply device according to claim 8, wherein when an abnormality in said detection resistor is detected, the input voltage of said data converter is set to a potential higher than a normal input range.

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