Electronic device and method for digital predistortion in wireless communication system

Abstract

This electronic device may comprise: a memory for storing instructions; a transmission antenna; a power amplifier; a digital predistortion (DPD) circuit including a first DPD path and a second DPD path; and at least one processor. When executed by the at least one processor, the instructions can cause the electronic device to: predistort, on the basis of the first DPD path, a first digital signal having a first sampling rate; transmit a first output signal generated on the basis of the power amplifier from the predistorted first digital signal; provide, to the DPD circuit, on the basis of a correlation value for the first digital signal and the first output signal, a control signal for activating the second DPD path; predistort, on the basis of the second DPD path, a second digital signal having a second sampling rate; and transmit a second output signal generated on the basis of the power amplifier from the predistorted second digital signal.

Description

Electronic device and method for digital predistortion in wireless communication systems

[0001] The present disclosure relates to a wireless communication system. More specifically, the present disclosure relates to an electronic device and method for digital predistortion in a wireless communication system.

[0002] In wireless communication systems, digitally modulated signals are amplified by a radio frequency (RF) power amplifier. To transmit the signal without distortion, the power amplifier requires high linearity. To achieve this, digital predistortion (DPD) is used to modify the input signal so that the power amplifier output approximates the ideal state.

[0003] In embodiments, an electronic device may include a memory storing instructions and including one or more storage media. The electronic device may include a transmitting antenna. The electronic device may include a power amplifier connected to the transmitting antenna. The electronic device may include a digital predistortion (DPD) circuit connected to the power amplifier, the DPD circuit including a first DPD path and a second DPD path. The electronic device may include at least one processor including a processing circuit. The instructions, when individually or collectively executed by the at least one processor, may cause the electronic device to perform predistortion on a first digital signal having a first sampling rate based on the first DPD path. The instructions, when individually or collectively executed by the at least one processor, may cause the electronic device to transmit, through the transmit antenna, a first output signal generated based on the power amplifier from the predistorted first digital signal. The instructions, when individually or collectively executed by the at least one processor, may cause the electronic device to provide a control signal to the DPD circuit for activating a second DPD path among the first DPD path and the second DPD path based on a correlation value for the first digital signal and the first output signal. The instructions, when individually or collectively executed by the at least one processor, may cause the electronic device to perform predistortion on a second digital signal subsequent to the first digital signal, based on the second DPD path, having a second sampling rate that is an integer multiple of the first sampling rate.The instructions, when individually or collectively executed by the at least one processor, may cause the electronic device to transmit, through the transmit antenna, a second output signal generated based on the power amplifier from the predistorted second digital signal.

[0004] In embodiments, a method performed by an electronic device may include performing predistortion on a first digital signal having a first sampling rate based on a first DPD path of a DPD circuit included in the electronic device. The method may include transmitting a first output signal generated based on the power amplifier from the first digital signal on which the predistortion has been performed. The method may include providing a control signal to the DPD circuit for activating a second DPD path among the first DPD path and a second DPD path of the DPD circuit based on a correlation value for the first digital signal and the first output signal that is greater than or equal to a reference value. The method may include performing predistortion on a second digital signal subsequent to the first digital signal, the second digital signal having a second sampling rate that is an integer multiple of the first sampling rate, based on the second DPD path. The method may include an operation of transmitting a second output signal generated based on the power amplifier from the second digital signal on which the predistortion has been performed.

[0005] In embodiments, an electronic device may include a transmitting antenna. The electronic device may include a power amplifier connected to the transmitting antenna. The electronic device may include a digital predistortion (DPD) circuit connected to the power amplifier. The DPD circuit may include a switch for selecting a first DPD path and a second DPD path, a down sampler for decreasing a sampling rate of a digital signal and an up sampler for increasing the sampling rate, a DPD actuator for generating a signal on which predistortion is performed from the digital signal for linearity of the power amplifier, and a delay block for adjusting a processing delay between the first DPD path and the second DPD path. The first DPD path may include the DPD actuator and the delay block. The second DPD path may include the DPD actuator, the down sampler, and the up sampler.

[0006] Figure 1 illustrates an example of a wireless communication system according to embodiments.

[0007] Figure 2 illustrates examples of network entities according to distributed deployment according to embodiments.

[0008] Figure 3a illustrates an example of a functional configuration of a DU (digital unit) according to embodiments.

[0009] FIG. 3b illustrates an example of a functional configuration of a radio unit (RU) according to embodiments.

[0010] FIG. 4a is an exemplary diagram for explaining the principle of DPD (digital predistortion) according to embodiments.

[0011] Figure 4b illustrates an example of a DPD circuit according to embodiments.

[0012] FIG. 5 illustrates an example of a DPD circuit including multiple DPD paths according to embodiments.

[0013] FIG. 6 illustrates an example of a graph showing correlation values ​​for samples according to embodiments.

[0014] FIGS. 7A and 7B illustrate examples of graphs representing the performance of a DPD circuit including multiple DPD paths according to embodiments.

[0015] FIG. 8 illustrates an example of an operational flow for a method of transmitting a signal based on a DPD circuit including multiple DPD paths according to embodiments.

[0016] The terms used in this disclosure are used only to describe specific embodiments and may not be intended to limit the scope of other embodiments. The singular expression may include plural expressions unless the context clearly indicates otherwise. Terms used herein, including technical or scientific terms, may have the same meaning as commonly understood by those of ordinary skill in the art described in this disclosure. Terms defined in general dictionaries among the terms used in this disclosure may be interpreted as having the same or similar meaning in the context of the relevant technology, and shall not be interpreted in an idealized or overly formal sense unless explicitly defined in this disclosure. In some cases, even if a term is defined in this disclosure, it cannot be interpreted to exclude embodiments of the present disclosure.

[0017] The various embodiments of the present disclosure described below illustrate a hardware-based approach as an example. However, since the various embodiments of the present disclosure include techniques utilizing both hardware and software, the various embodiments of the present disclosure do not exclude a software-based approach.

[0018] In the following description, terms referring to signals (e.g., sample, data, message, signal, information, signaling), terms referring to resources (e.g., symbol, slot, subframe, radio frame, subcarrier, resource element (RE), resource block (RB), bandwidth part (BWP), occasion), terms for operational states (e.g., step, operation, procedure), and terms referring to components of devices are examples for convenience of description. Therefore, the present disclosure is not limited to the terms described below, and other terms having equivalent technical meanings may be used. In addition, terms such as '... part', '... device', '... object', '... body' used below may mean at least one shape structure or a unit that processes a function.

[0019] In addition, in the present disclosure, expressions such as "more than" or "less than" may be used to determine whether a specific condition is satisfied or fulfilled, but this is merely a description for expressing an example and does not exclude descriptions such as "more than" or "less than." A condition described as "more than" may be replaced with "more than," a condition described as "less than" may be replaced with "less than," and a condition described as "more than and less than" may be replaced with "more than and less than." In addition, hereinafter, "A" to "B" mean at least one of elements from A (including A) to B (including B). hereinafter, "C" and / or "D" mean at least one of "C" or "D," that is, including {"C", "D", "C" and "D"}.

[0020] Although this disclosure describes embodiments using terminology used in certain communication standards (e.g., 3rd Generation Partnership Project (3GPP)), this is merely an example for illustrative purposes. Embodiments of this disclosure can also be applied to other communication and broadcasting systems.

[0021] Figure 1 illustrates an example of a wireless communication system.

[0022] Referring to FIG. 1, FIG. 1 illustrates a base station (110) and a terminal (120) as some of the nodes utilizing a wireless channel in a wireless communication system. Although FIG. 1 illustrates only one base station, the wireless communication system may further include other base stations identical or similar to the base station (110).

[0023] The base station (110) is a network infrastructure that provides wireless access to the terminal (120). The base station (110) has coverage defined based on the distance at which a signal can be transmitted. In addition to the base station, the base station (110) may be referred to as an 'access point (AP)', 'eNodeB (eNB)', '5th generation node', 'next generation nodeB (gNB)', 'wireless point', 'transmission / reception point (TRP)', or other terms having equivalent technical meanings.

[0024] The terminal (120) is a device used by a user and communicates with the base station (110) via a wireless channel. The link from the base station (110) to the terminal (120) is referred to as a downlink (DL), and the link from the terminal (120) to the base station (110) is referred to as an uplink (UL). In addition, although not shown in FIG. 1, the terminal (120) and another terminal may communicate with each other via a wireless channel. In this case, the link between the terminal (120) and another terminal (device-to-device link, D2D) is referred to as a sidelink, and the sidelink may be used interchangeably with the PC5 interface. In some other embodiments, the terminal (120) may be operated without the involvement of a user. In one embodiment, the terminal (120) is a device that performs machine type communication (MTC) and may not be carried by the user. Additionally, according to one embodiment, the terminal (120) may be an NB (narrowband)-IoT (internet of things) device.

[0025] The terminal (120) may be referred to as a terminal, or other terms such as 'user equipment (UE),' 'customer premises equipment (CPE),' 'mobile station,' 'subscriber station,' 'remote terminal,' 'wireless terminal,' 'electronic device,' or 'user device,' or other terms having equivalent technical meanings.

[0026] The base station (110) and the terminal (120) can perform beamforming. The base station (110) and the terminal (120) can transmit and receive wireless signals in a relatively low frequency band (e.g., FR 1 (frequency range 1) of NR). In addition, the base station (110) and the terminal (120) can transmit and receive wireless signals in a relatively high frequency band (e.g., FR 2 (or, FR 2-1, FR 2-2, FR 2-3), FR 3 of NR), millimeter wave (mmWave) band (e.g., 28 GHz, 30 GHz, 38 GHz, 60 GHz)). To improve channel gain, the base station (110) and the terminal (120) can perform beamforming. Here, the beamforming can include transmission beamforming and reception beamforming. The base station (110) and the terminal (120) can impart directionality to the transmitted or received signal. To this end, the base station (110) and the terminal (120) can select serving beams through a beam search or beam management procedure. After the serving beams are selected, subsequent communication can be performed through resources that have a QCL relationship with the resource that transmitted the serving beams.

[0027] If large-scale characteristics of a channel carrying a symbol on a first antenna port can be inferred from a channel carrying a symbol on a second antenna port, the first antenna port and the second antenna port can be evaluated to have a QCL relationship. For example, the large-scale characteristics may include at least one of delay spread, Doppler spread, Doppler shift, average gain, average delay, and a spatial receiver parameter.

[0028] Although both the base station (110) and the terminal (120) are described as performing beamforming in FIG. 1, the embodiments of the present disclosure are not necessarily limited thereto. In some embodiments, the terminal may or may not perform beamforming. Furthermore, the base station may or may not perform beamforming. That is, either only one of the base station and the terminal may perform beamforming, or neither the base station nor the terminal may perform beamforming.

[0029] In the present disclosure, a beam refers to a spatial flow of a signal in a wireless channel, and is formed by one or more antennas (or antenna elements), and this forming process may be referred to as beamforming. Beamforming may include at least one of analog beamforming and digital beamforming (e.g., precoding). Reference signals transmitted based on beamforming may include, for example, a demodulation-reference signal (DM-RS), a channel state information-reference signal (CSI-RS), a synchronization signal / physical broadcast channel (SS / PBCH), and a sounding reference signal (SRS). In addition, as a configuration for each reference signal, an IE such as a CSI-RS resource or an SRS-resource may be used, and this configuration may include information associated with the beam. Information associated with a beam may mean whether the configuration (e.g., a CSI-RS resource) uses the same spatial domain filter as another configuration (e.g., another CSI-RS resource within the same CSI-RS resource set) or a different spatial domain filter, or whether it is quasi-co-located (QCL) with a reference signal, and if so, what type it is (e.g., QCL type A, B, C, D).

[0030] In the past, in communication systems with relatively large cell radius of base stations, each base station was installed to include the functions of a digital processing unit (or DU (distributed unit)) and an RF (radio frequency) processing unit (or RU (radio unit)). However, in 4G (4 th As higher frequency bands are used in the 5G generation and / or subsequent communication systems (e.g., 5G) and the cell coverage of base stations becomes smaller, the number of base stations to cover a specific area has increased. The installation cost burden on operators for installing base stations has also increased. In order to minimize the installation cost of base stations, a structure has been proposed in which the DU and RU of the base station are separated, one or more RUs are connected to one DU via a wired network, and one or more RUs are geographically distributed to cover a specific area. Hereinafter, the deployment structure and expansion examples of base stations according to various embodiments of the present disclosure are described through FIG. 2.

[0031] Figure 2 illustrates an example of network entities according to distributed deployment.

[0032] For example, the network entities may include a digital unit (DU) (210) and a radio unit (RU) (220) (or a massive multiple input multiple output (MMU) unit). For example, the network entities may be connected via a fronthaul. Unlike the backhaul between a base station and a core network, the fronthaul refers to entities (e.g., DU (210), RU (220)) between a wireless LAN and a base station. Although FIG. 2 illustrates an example of a fronthaul structure between a DU (210) and one RU (220), this is merely for convenience of explanation and the present disclosure is not limited thereto. In other words, embodiments of the present disclosure may also be applied to a fronthaul structure between one DU and multiple RUs. For example, embodiments of the present disclosure may be applied to a fronthaul structure between one DU and two RUs. Additionally, the embodiments of the present disclosure can also be applied to a fronthaul structure between one DU and three RUs.

[0033] Referring to FIG. 2, the base station (110) may include a DU (210) and a RU (220). The front hole (215) between the DU (210) and the RU (220) is F x It can be operated through an interface. For operation of the fronthaul (215), interfaces such as eCPRI (enhanced common public radio interface) and ROE (radio over ethernet) can be used, for example.

[0034] As communications technology advances, mobile data traffic increases, significantly increasing the bandwidth requirements for the fronthaul between the digital unit and the radio unit. In deployments such as C-RAN (centralized / cloud radio access network), the DU performs functions for the packet data convergence protocol (PDCP), radio link control (RLC), media access control (MAC), and physical layer (PHY), while the RU can be implemented to perform additional functions for the PHY layer in addition to its radio frequency (RF) functions.

[0035] The DU (210) may be responsible for upper layer functions of a wireless network. For example, the DU (210) may perform functions of the MAC layer and a part of the PHY layer. Here, a part of the PHY layer refers to functions performed at a higher level among the functions of the PHY layer, and may include, for example, channel encoding (or channel decoding), scrambling (or descrambling), modulation (or demodulation), and layer mapping (or layer demapping). According to an embodiment, if the DU (210) complies with the O-RAN standard, it may be referred to as an O-DU (O-RAN DU). The DU (210) may be replaced with a first network entity for a base station (e.g., gNB) in embodiments of the present disclosure, if necessary.

[0036] The RU (220) may be responsible for lower layer functions of a wireless network. For example, the RU (220) may perform a part of the PHY layer, an RF function. Here, a part of the PHY layer refers to functions of the PHY layer that are performed at a relatively lower level than the DU (210), and may include, for example, iFFT transformation (or FFT transformation), CP insertion (CP removal), and digital beamforming. The RU (220) may be referred to as an 'access unit (AU)', an 'access point (AP)', a 'transmission / reception point (TRP)', a 'remote radio head (RRH)', a 'radio unit (RU)', or other terms having an equivalent technical meaning thereto. According to an embodiment, when the RU (220) complies with the O-RAN standard, it may be referred to as an O-RU (O-RAN RU). RU (220) may be represented as a second network entity for a base station (e.g., gNB) in embodiments of the present disclosure, as needed.

[0037] In FIG. 2, the base station (110) is described as including a DU (210) and a RU (220), but the embodiments of the present disclosure are not limited thereto. The base station according to the embodiments may be implemented in a distributed deployment according to a centralized unit (CU) configured to perform functions of upper layers of an access network (e.g., packet data convergence protocol (PDCP), radio resource control (RRC)) and a distributed unit (DU) configured to perform functions of lower layers. For example, the digital unit (DU) (210) may be implemented by separating into a centralized unit (CU) and a distributed unit (DU). Between a core (e.g., 5G core (5GC) or next generation core (NGC)) network and a radio network (RAN), the base station may be implemented in a structure in which a centralized unit (CU), a distributed unit (DU), and a radio unit (RU) are arranged in that order. The interface between the CU (centralized unit) and the DU (distributed unit) can be referred to as the F1 interface.

[0038] A centralized unit (CU) may be connected to one or more distributed units (DUs) and may be responsible for functions at a higher layer than the distributed units (DUs). For example, the CU may be responsible for functions at the radio resource control (RRC) and packet data convergence protocol (PDCP) layers, while the DU and RU may be responsible for functions at lower layers. The DU may perform some functions (high PHY) of the radio link control (RLC), media access control (MAC), and physical (PHY) layers, while the RU may be responsible for the remaining functions (low PHY) of the PHY layer. In addition, for example, a digital unit (DU) may be included in a distributed unit (DU) depending on the implementation of a distributed deployment of the base station. Hereinafter, unless otherwise defined, the operations of DU (digital unit) and RU are described, but various embodiments of the present disclosure can be applied to both a base station arrangement including a CU and an arrangement in which a DU is directly connected to a core network (i.e., a base station in which the CU and DU are integrated into a single entity (e.g., an NG-RAN node)).

[0039] Figure 3a illustrates an example of the functional configuration of a DU (digital unit).

[0040] The configuration illustrated in Fig. 3a can be understood as the configuration of the DU (210) of Fig. 2 as part of a base station. Terms such as "... unit" and "... unit" used hereinafter mean a unit that processes at least one function or operation, and this can be implemented by hardware, software, or a combination of hardware and software.

[0041] Referring to FIG. 3a, DU (210) includes a transceiver (310), memory (320), and processor (330).

[0042] The transceiver (310) can perform functions for transmitting and receiving signals in a wired communication environment. The transceiver (310) can include a wired interface for controlling direct connections between devices via a transmission medium (e.g., copper wire, optical fiber). For example, the transceiver (310) can transmit electrical signals to other devices via copper wire, or perform conversion between electrical signals and optical signals. The DU (210) can communicate with a radio unit (RU) via the transceiver (310). The DU (210) can be connected to a core network or a CU in a distributed arrangement via the transceiver (310).

[0043] The transceiver (310) may perform functions for transmitting and receiving signals in a wireless communication environment. For example, the transceiver (310) may perform a conversion function between a baseband signal and a bit stream according to the physical layer specifications of the system. For example, when transmitting data, the transceiver (310) generates complex symbols by encoding and modulating the transmitted bit stream. In addition, when receiving data, the transceiver (310) restores the received bit stream by demodulating and decoding the baseband signal. In addition, the transceiver (310) may include multiple transmission and reception paths. In addition, according to one embodiment, the transceiver (310) may be connected to the core network or other nodes (e.g., an integrated access backhaul (IAB).

[0044] The transceiver (310) can transmit and receive signals. For example, the transceiver (310) can transmit a management plane (M-plane) message. For example, the transceiver (310) can transmit a management plane (S-plane) message. For example, the transceiver (310) can transmit a control plane (C-plane) message. For example, the transceiver (310) can transmit a user plane (U-plane) message. For example, the transceiver (310) can receive a user plane message. Although only the transceiver (310) is illustrated in FIG. 3A, in other implementations, the DU (210) may include two or more transceivers.

[0045] The transceiver (310) transmits and receives signals as described above. Accordingly, all or part of the transceiver (310) may be referred to as a "communication unit," a "transmitter," a "receiver," or a "transmitter-receiver unit." Furthermore, in the following description, transmission and reception performed via a wireless channel are used to mean that the transceiver (310) performs the processing described above.

[0046] Although not illustrated in FIG. 3A, the transceiver (310) may further include a backhaul transceiver for connection to the core network or other base stations. The backhaul transceiver provides an interface for communicating with other nodes within the network. That is, the backhaul transceiver converts a bit stream transmitted from the base station to other nodes, such as other access nodes, other base stations, upper nodes, the core network, etc., into a physical signal, and converts a physical signal received from other nodes into a bit stream.

[0047] The memory (320) stores data such as basic programs, application programs, and setting information for the operation of the DU (210). The memory (320) may be referred to as a storage unit. The memory (320) may be composed of volatile memory, nonvolatile memory, or a combination of volatile memory and nonvolatile memory. In addition, the memory (320) provides stored data upon request from the processor (330).

[0048] The processor (330) controls the overall operations of the DU (210). The processor (380) may be referred to as a control unit. For example, the processor (330) transmits and receives signals through the transceiver (310) (or through the backhaul communication unit). In addition, the processor (330) records and reads data from the memory (320). In addition, the processor (330) may perform the functions of the protocol stack required by the communication standard. Although only the processor (330) is illustrated in FIG. 3A, the DU (210) may include two or more processors according to other implementation examples.

[0049] For example, the processor (330) may include various processing circuits and / or multiple processors. For example, the term "processor" as used herein, including in the claims, may include various processing circuits including at least one processor, one or more of which may be configured to individually and / or collectively perform the various functions described below in a distributed manner. As used herein, when "processor," "at least one processor," and "one or more processors" are described as being configured to perform various functions, these terms encompass, for example, and without limitation, situations where one processor performs some of the recited functions and other processor(s) perform other parts of the recited functions, and also situations where one processor may perform all of the recited functions. Additionally, the at least one processor may include a combination of processors that perform the various functions enumerated / disclosed, for example, in a distributed manner. At least one processor may execute program instructions to achieve or perform the various functions.

[0050] The configuration of DU (210) illustrated in FIG. 3A is merely an example, and examples of DUs performing embodiments of the present disclosure are not limited to the configuration illustrated in FIG. 3A. In some embodiments, some configurations may be added, deleted, or changed.

[0051] Figure 3b illustrates an example of the functional configuration of a RU (radio unit).

[0052] The configuration illustrated in Fig. 3b can be understood as the configuration of the RU (220) of Fig. 2 as part of a base station. Terms such as "... unit" and "... unit" used hereinafter mean a unit that processes at least one function or operation, and this can be implemented by hardware, software, or a combination of hardware and software.

[0053] Referring to FIG. 3b, the RU (220) includes an RF transceiver (360), a fronthaul transceiver (365), a memory (370), and a processor (380).

[0054] The RF transceiver (360) performs functions for transmitting and receiving signals via a wireless channel. For example, the RF transceiver (360) upconverts a baseband signal into an RF band signal and transmits it via an antenna, and downconverts an RF band signal received via the antenna into a baseband signal. For example, the RF transceiver (360) may include a transmit filter, a receive filter, an amplifier, a mixer, an oscillator, a DAC, an ADC, and the like.

[0055] The RF transceiver (360) may include multiple transmission and reception paths. Furthermore, the RF transceiver (360) may include an antenna unit. The RF transceiver (360) may include at least one antenna array composed of multiple antenna elements. In terms of hardware, the RF transceiver (360) may be composed of digital circuits and analog circuits (e.g., a radio frequency integrated circuit (RFIC)). Here, the digital circuits and analog circuits may be implemented in a single package. In addition, the RF transceiver (360) may include multiple RF chains. The RF transceiver (360) may perform beamforming. The RF transceiver (360) may apply beamforming weights to a signal to be transmitted and received in order to impart directionality to the signal according to the settings of the processor (380). According to one embodiment, the RF transceiver (360) may include an RF (radio frequency) block (or RF unit).

[0056] According to one embodiment, the RF transceiver (360) can transmit and receive signals on a radio access network. For example, the RF transceiver (360) can transmit a downlink signal. The downlink signal can include a synchronization signal (SS), a reference signal (RS) (e.g., a cell-specific reference signal (CRS), a demodulation (DM)-RS), system information (e.g., a MIB, a SIB, remaining system information (RMSI), other system information (OSI)), a configuration message, control information, or downlink data. In addition, for example, the RF transceiver (360) can receive an uplink signal. The uplink signal may include a random access related signal (e.g., a random access preamble (RAP) (or Msg1 (message 1)), Msg3 (message 3)), a reference signal (e.g., a sounding reference signal (SRS), DM-RS), or a power headroom report (PHR). Although only the RF transceiver (360) is illustrated in FIG. 3b, in other implementation examples, the RU (220) may include two or more RF transceivers.

[0057] The fronthaul transceiver (365) can transmit and receive signals. According to one embodiment, the fronthaul transceiver (365) can transmit and receive signals on the fronthaul interface. For example, the fronthaul transceiver (365) can receive a management plane (M-plane) message. For example, the fronthaul transceiver (365) can receive a management plane (S-plane) message. For example, the fronthaul transceiver (365) can receive a control plane (C-plane) message. For example, the fronthaul transceiver (365) can transmit a user plane (U-plane) message. For example, the fronthaul transceiver (365) can receive a user plane message. Although only the fronthaul transceiver (365) is shown in FIG. 3b, according to other implementation examples, the RU (220) may include two or more fronthaul transceivers.

[0058] The RF transceiver (360) and the fronthaul transceiver (365) transmit and receive signals as described above. Accordingly, all or part of the RF transceiver (360) and the fronthaul transceiver (365) may be referred to as a 'communication unit', a 'transmitter unit', a 'receiver unit', or a 'transmitter-receiver unit'. In addition, in the following description, transmission and reception performed through a wireless channel are used to mean that the processing as described above is performed by the RF transceiver (360). In the following description, transmission and reception performed through a wireless channel are used to mean that the processing as described above is performed by the RF transceiver (360).

[0059] The memory (370) stores data such as basic programs, application programs, and setting information for the operation of the RU (220). The memory (370) may be referred to as a storage unit. The memory (370) may be configured as volatile memory, non-volatile memory, or a combination of volatile memory and non-volatile memory. In addition, the memory (370) provides the stored data according to a request from the processor (380). According to one embodiment, the memory (370) may include a memory for conditions, commands, or setting values ​​related to the SRS transmission method.

[0060] The processor (380) controls the overall operations of the RU (220). The processor (380) may be referred to as a control unit. For example, the processor (380) transmits and receives signals through the RF transceiver (360) or the fronthaul transceiver (365). In addition, the processor (380) records and reads data in the memory (370). In addition, the processor (380) may perform functions of a protocol stack required by a communication standard. Although only the processor (380) is illustrated in FIG. 3B, the RU (220) may include two or more processors according to other implementation examples. The processor (380) may be a set of instructions or codes stored in the memory (370), or may be a storage space that stores instructions / codes or instructions / codes that are at least temporarily residing in the processor (380), or may be a part of the circuitry that constitutes the processor (380). Additionally, the processor (380) may include various modules for performing communication. The processor (380) may control the RU (220) to perform operations according to the embodiments described below.

[0061] For example, the processor (380) may include various processing circuits and / or multiple processors. For example, the term "processor" as used herein, including in the claims, may include various processing circuits including at least one processor, one or more of which may be configured to individually and / or collectively perform the various functions described below in a distributed manner. As used herein, when "processor," "at least one processor," and "one or more processors" are described as being configured to perform various functions, these terms encompass, for example, and without limitation, situations where one processor performs some of the recited functions and other processor(s) perform other parts of the recited functions, and also situations where one processor may perform all of the recited functions. Additionally, the at least one processor may include a combination of processors that perform the various functions enumerated / disclosed, for example, in a distributed manner. At least one processor may execute program instructions to achieve or perform the various functions.

[0062] The configuration of RU (220) illustrated in FIG. 3b is merely an example, and examples of RUs performing embodiments of the present disclosure are not limited to the configuration illustrated in FIG. 3b. In some embodiments, some configurations may be added, deleted, or changed.

[0063] FIG. 4a is an exemplary diagram for explaining the principle of DPD (digital predistortion) according to embodiments.

[0064] The above DPD may represent a method for improving the nonlinearity of a power amplifier. For example, predistortion may be performed in the DPD circuit (410). For example, the predistortion may include digital predistortion. For example, the DPD circuit (410) may be referred to as a digital predistorter, a digital predistortion circuit (DPD circuit), a digital predistortion module (DPD module), and a DPD model. The DPD circuit (410) may compensate for a distortion component according to the nonlinear characteristics of the power amplifier (PA) (450) based on a comparison between an input signal and an output signal of the PA. As the distorted input modulation signal through the DPD circuit (410) is input to the power amplifier (450), the final modulated signal may be linearly amplified.

[0065] Referring to FIG. 4A, a DPD circuit (410) can output a DPD output signal (402) based on an input signal (401). The input signal (401) can be pre-distorted into a DPD output signal (402) through the DPD circuit (410). A power amplifier (450) can output an amplifier output signal (403) based on the DPD output signal (402). The DPD output signal (402) can be input to the power amplifier (450). Depending on the nonlinear characteristics of the power amplifier (450), the DPD output signal (402) is distorted. Due to the distortion caused by the power amplifier (450), the amplifier output signal (403) is output. Although not shown in FIG. 4A, analog conversion may be performed on the DPD output signal (402) through a DAC, and up-conversion may be performed on the DPD output signal (402) through a mixer. In other words, the input signal (401) (or DPD input signal) and the DPD output signal (402) before analog conversion are performed may be digital signals. Additionally, the amplifier output signal (403) may be an analog signal.

[0066] Graph (404) represents the relationship between the magnitude of the input signal (401) and the magnitude of the DPD output signal (402). Graph (405) represents the relationship between the magnitude of the DPD output signal (402) and the magnitude of the amplifier output signal (403). Graph (406) represents the relationship between the magnitude of the input signal (401) and the magnitude of the amplifier output signal (403). Referring to graph (406), through predistortion of the DPD circuit (410), the input (e.g., input signal (401)) to the output (e.g., amplifier output signal (403)) can be linear.

[0067] The power amplifier (450) may include a transistor. The transistor generates harmonic components. A memory effect occurs due to the nonlinearity of the low-frequency second-order harmonic components corresponding to the bandwidth (f2-f1) (f2 is the highest frequency, f1 is the lowest frequency). The larger the low-frequency second-order harmonic components, the more difficult it is to remove the impedance. Therefore, the power amplifier (450) exhibits the memory effect as the signal bandwidth increases. When a modulation signal of a wireless communication system is used as a wide bandwidth signal, the distortion components of the power amplifier (450) may include distortion components due to the memory effect as well as nonlinear characteristics. The memory effect means that a signal that was generated nonlinearly in the past affects the current nonlinearity. In other words, the power amplifier (450) is a nonlinear system that utilizes memory.

[0068] The memory effect can be attributed to the thermal constants of active devices or components of a biasing network with frequency-dependent operation. As described above, the distortion component due to the memory effect increases in proportion to the signal bandwidth. A DPD (memory-compensated DPD) circuit (410) is required to compensate for the nonlinear distortion component of the power amplifier (450) and the distortion component due to the memory effect.

[0069] Figure 4b illustrates an example of a DPD circuit according to embodiments.

[0070] FIG. 4B illustrates an example of an electronic device (400) including a DPD circuit (410). For example, the electronic device (400) may include the RU (220) of FIG. 2 . However, the embodiments of the present disclosure are not limited thereto. For example, at least a portion of the electronic device (400) may be implemented in the base station (110) of FIG. 1 or the DU (210) of FIG. 2 .

[0071] Referring to FIG. 4B, the electronic device (400) may include a plurality of components for transmitting a signal. For example, the electronic device (400) may include a DPD circuit (410), a digital to analog converter (DAC) (440), an analog to digital converter (ADC) (445), a power amplifier (450), a coupler (455), an isolator (460), a filter (465), and a transmission antenna (470). For example, at least some of the plurality of components may be included in a transmission path. The transmission path may represent a path for the electronic device (400) to radiate a transmission signal to the outside. For example, the transmission signal may be referred to as a signal radiated through a transmission antenna.

[0072] For example, the DPD circuit (410) improves the nonlinearity of the power amplifier (450) by increasing the DPD input signal (x in A circuit for performing predistortion on [n] can be represented, where n is a discrete signal (e.g., x in ) can be referenced as a sample index. For example, the DPD input signal (x in [n]) may be a digital signal provided from at least one processor (not shown). For example, the DPD circuit (410) may receive the DPD input signal (x in Based on performing predistortion on [n]), the DPD output signal (x out [n]) can be generated. For example, the above DPD output signal (x out [n]) is a DPD input signal (x) by the DPD circuit (410). in[n]) may be a pre-distorted digital signal. Hereinafter, a DPD input signal (x) provided from at least one processor in [n]) can be referenced as a digital signal.

[0073] For example, the DAC (440) receives a DPD output signal (x) provided from the DPD circuit (410). out [n]) can perform analog conversion on the DPD output signal (x out Based on the analog conversion for [n], an amplifier input signal can be generated. For example, the amplifier input signal can be an analog signal.

[0074] For example, the power amplifier (450) may perform amplification on the amplifier input signal provided from the DAC (440). For example, the power amplifier (450) may generate an amplifier output signal (y(t)) based on the amplification on the amplifier input signal. For example, the t may represent the time of a continuous signal (e.g., y). For example, the amplifier output signal (y(t)) may be an analog signal. Hereinafter, the amplifier output signal (y(t)) may be referred to as an output signal.

[0075] For example, the coupler (455) may provide the amplifier output signal (y(t)) of the power amplifier (450) to the DPD circuit (410) or the at least one processor via a feedback path. For example, the coupler (455) may provide the amplifier output signal (y(t)) to an ADC (445) on the feedback path, which is used for calibration of the transmission path or for identifying an inverse function coefficient of a DPD actuator (430). For example, the feedback path may also be referred to as a feedback circuit.

[0076] For example, the ADC (445) can perform digital conversion on the amplifier output signal (y(t)) provided from the power amplifier (450) via the coupler (455). For example, the ADC (445) can generate a feedback signal (y[n]) based on the digital conversion on the amplifier output signal (y(t)). For example, the feedback signal (y[n]) can be a digital signal converted from the amplifier output signal (y(t)). For example, the feedback signal (y[n]) can be provided to the DPD circuit (410) or the at least one processor.

[0077] For example, the isolator (460) may represent a passive component for providing the amplifier output signal (y(t)) provided from the power amplifier (450) to the filter (465) and the transmitting antenna (470). For example, the isolator (460) may be used to fix the flow of the amplifier output signal (y(t)) in one direction. The isolator (460) may control the signal from the transmitting antenna (470) and the filter (465) to not be introduced to the power amplifier (450) (or coupler (455)).

[0078] For example, the filter (465) can perform filtering on the amplifier output signal (y(t)) provided from the isolator (460). For example, the filter (465) can include a band pass filter (BPF). For example, the transmitting antenna (470) can radiate a filtered signal for the amplifier output signal (y(t)). For example, the transmitting antenna (470) can transmit the filtered amplifier output signal (y(t)) to an external electronic device (not shown) (e.g., the terminal (120) of FIG. 1).

[0079] For example, the DPD circuit (410) may include a DPD actuator (430) and a DPD coefficient estimator (435). For example, the DPD actuator (430) may be referred to as an actuator, a DPD actuator part, or an actuator part. For example, the DPD coefficient estimator (435) may be referred to as a DPD engine, a DPD coefficient engine, an adaptation part, or a DPD adaptation engine.

[0080] For example, the DPD actuator (430) calculates the DPD input signal (x) based on the inverse function coefficient provided from the DPD coefficient estimator (435). in [n]) can be pre-distorted. For example, the DPD coefficient estimator (435) can perform the pre-distortion on the DPD input signal (x in [n]), the above DPD output signal (x out [n]), or at least one of the feedback signals (y[n]). For example, the DPD coefficient estimator (435) may estimate the inverse function coefficient based on the DPD input signal (x in [n]) can be obtained (or captured). In addition, the DPD coefficient estimator (435) can obtain (or capture) at least a portion of the DPD output signal (x out[n]) can be obtained (or captured). For example, the DPD coefficient estimator (435) can obtain the feedback signal (y[n]) through the feedback path. For example, the inverse function coefficients can represent inverse function characteristics for nonlinear characteristics of the power amplifier (450). For example, the inverse function coefficients can include a look-up table (LUT). For example, the inverse function coefficients can be referred to as inverse function characteristics or DPD coefficients. For example, the inverse function coefficients can be stored in a buffer of the DPD actuator (430).

[0081] Although not shown in FIG. 4B, for example, the DPD actuator (430) may include at least one of an adder, a multiplier, a buffer, or a delay block. For example, the buffer may be referred to as a memory, a buffer memory. For example, the DPD actuator (430) may be implemented with hardware circuits. For example, the DPD coefficient estimator (435) may be implemented as a function of the at least one processor. The function may include modeling the characteristics of the power amplifier (450) as an inverse function to identify the inverse function coefficient.

[0082] For effective compensation of nonlinearity and memory effect of the power amplifier (450), delayed signal components within a specific time domain may be required. The delayed signal components may be referenced as samples. In other words, the DPD output signal (x) of the DPD circuit (410) out For modeling [n], feedback signals from past points in time can be used. The above DPD output signal (x out The relationship between [n]) and feedback signals is as follows:

[0083]

[0084] Above x out [n] may represent the output signal of the DPD circuit (410), the f may represent the inverse function of the power amplifier (450), the y[n] may represent the feedback signal, and the N may represent the maximum delay of the DPD circuit (410). Referring to the above, the DPD coefficient estimator (435) may use signals of past points in time to model the inverse function coefficient. In the above mathematical expression, the DPD output signal (x) of the DPD circuit (410) out Describes the relationship between the DPD output signal (x[n]) and the feedback signal (y[n]). out [n]) can also use DPD input signals of present and past points in time.

[0085] As described above, as the length of N increases (i.e., a long delay range is utilized), the DPD circuit (410) can effectively compensate for the memory effect of the power amplifier (450). However, as the length of N increases, the computational load of the DPD coefficient estimator (435) for calculating N may increase. In addition, since a plurality of multipliers and a plurality of buffers (e.g., N+1) are required to configure N in hardware, the structure of the DPD actuator (430) may become complex. Accordingly, the hardware and software resources required for the electronic device (400) to transmit a signal through the power amplifier (450) may increase. In addition, due to the structural limitations of the DPD circuit (410), only signals within a limited delay range may be utilized. For example, due to structural limitations of the DPD actuator (430) (e.g., number of buffers), signals outside the limited delay range cannot be utilized, and thus memory components (or distortion components) resulting from signals outside the delay range cannot be compensated for. Accordingly, the performance of the DPD circuit (410) may be degraded.

[0086] Hereinafter, electronic devices and methods according to embodiments of the present disclosure may utilize a DPD circuit including multiple paths. The multiple paths may be driven at different sampling rates. For example, a DPD circuit including two paths may support dual rates. However, the embodiments of the present disclosure are not limited thereto. Electronic devices and methods according to embodiments of the present disclosure may include a path for adjusting the sampling rate of a digital signal. By adjusting the sampling rate, electronic devices and methods according to embodiments of the present disclosure can compensate for a substantially expanded delay range despite structural limitations of the DPD circuit. Accordingly, electronic devices and methods according to embodiments of the present disclosure can improve the compensation capability of the DPD circuit and achieve linearization of a power amplifier.

[0087] FIG. 5 illustrates an example of a DPD circuit including multiple DPD paths according to embodiments.

[0088] FIG. 5 illustrates an example of an electronic device (500) including a DPD circuit (510). For example, the electronic device (500) may include the RU (220) of FIG. 2 . However, the embodiments of the present disclosure are not limited thereto. For example, at least a portion of the electronic device (500) may be implemented in the base station (110) of FIG. 1 or the DU (210) of FIG. 2 .

[0089] Referring to FIG. 5, according to one embodiment, an electronic device (500) may include a plurality of components for transmitting a signal. For example, the electronic device (500) may include a DPD circuit (510), a digital to analog converter (DAC) (540), an analog to digital converter (ADC) (545), a power amplifier (550), a coupler (555), an isolator (560), a filter (565), and a transmission antenna (570). For example, at least some of the plurality of components may be included in a transmission path. The transmission path may represent a path for the electronic device (500) to radiate a transmission signal to the outside. For example, the transmission signal may be referred to as a signal radiated through a transmission antenna. Although FIG. 5 illustrates an example of one transmission path included in an electronic device (500), embodiments of the present disclosure are not limited thereto. For example, the electronic device (500) may include multiple transmission paths. For example, each of the multiple transmission paths may include the multiple components.

[0090] For example, the DPD circuit (510) improves the nonlinearity of the power amplifier (550) by increasing the DPD input signal (x in A circuit for performing predistortion on [n] can be represented, where n is a discrete signal (e.g., x in ) can be referenced as a sample index. For example, the DPD input signal (x in [n]) may be a digital signal provided from at least one processor (not shown). For example, the DPD circuit (510) may receive the DPD input signal (x inBased on performing predistortion on [n]), the DPD output signal (x out [n]) can be generated. For example, the above DPD output signal (x out [n]) is a DPD input signal (x) by the DPD circuit (510). in [n]) may be a pre-distorted digital signal. Hereinafter, a DPD input signal (x) provided from at least one processor in [n]) can be referenced as a digital signal.

[0091] For example, the DAC (540) receives a DPD output signal (x) provided from the DPD circuit (510). out [n]) can perform analog conversion on the DPD output signal (x out Based on the analog conversion for [n], an amplifier input signal can be generated. For example, the amplifier input signal can be an analog signal.

[0092] For example, the power amplifier (550) may perform amplification on the amplifier input signal provided from the DAC (540). For example, the power amplifier (550) may generate an amplifier output signal (y(t)) based on the amplification on the amplifier input signal. For example, the t may represent the time of a continuous signal (e.g., y). For example, the amplifier output signal (y(t)) may be an analog signal. Hereinafter, the amplifier output signal (y(t)) may be referred to as an output signal.

[0093] For example, the coupler (555) may provide the amplifier output signal (y(t)) of the power amplifier (550) to the DPD circuit (510) or the at least one processor via a feedback path. For example, the coupler (555) may provide the amplifier output signal (y(t)) to an ADC (545) on the feedback path, which is used for calibration of the transmission path or for identifying an inverse function coefficient of a DPD actuator (530). For example, the feedback path may also be referred to as a feedback circuit.

[0094] For example, the ADC (545) can perform digital conversion on the amplifier output signal (y(t)) provided from the power amplifier (550) via the coupler (555). For example, the ADC (545) can generate a feedback signal (y[n]) based on the digital conversion on the amplifier output signal (y(t)). For example, the feedback signal (y[n]) can be a digital signal converted from the amplifier output signal (y(t)). For example, the feedback signal (y[n]) can be provided to the DPD circuit (510) or the at least one processor.

[0095] For example, the isolator (560) may represent a passive component for providing the amplifier output signal (y(t)) provided from the power amplifier (550) to the filter (565) and the transmitting antenna (570). For example, the isolator (560) may be used to fix the flow of the amplifier output signal (y(t)) in one direction. The isolator (560) may control the signal from the transmitting antenna (570) and the filter (565) to not be introduced to the power amplifier (550) (or coupler (555)).

[0096] For example, the filter (565) can perform filtering on the amplifier output signal (y(t)) provided from the isolator (560). For example, the filter (565) can include a band pass filter (BPF). For example, the transmitting antenna (570) can radiate a filtered signal for the amplifier output signal (y(t)). For example, the transmitting antenna (570) can transmit the filtered amplifier output signal (y(t)) to an external electronic device (not shown) (e.g., the terminal (120) of FIG. 1).

[0097] According to one embodiment, the DPD circuit (510) may include a switch (520), a delay block (522), a down sampler (526), ​​an up sampler (528), a DPD actuator (530), a DPD coefficient estimator (535), and a rate changer (537). For example, the DPD actuator (530) may be referred to as an actuator, a DPD actuator part, or an actuator part. For example, the DPD coefficient estimator (535) may be referred to as a DPD engine, a DPD coefficient engine, an adaptation part, or a DPD adaptation engine.

[0098] According to one embodiment, the switch (520) selects a DPD input signal (x) from among the plurality of paths included in the DPD circuit (510). in[n]) can be selected for processing. For example, each of the plurality of paths can be referred to as a DPD path. For example, the switch (520) can be used to select a first DPD path and a second DPD path included in the DPD circuit (510). For example, the switch (520) can include a demultiplexer. For example, the output terminal (0) of the demultiplexer can be connected to the first DPD path, and the output terminal (1) of the demultiplexer can be connected to the second DPD path. The demultiplexer can also be referred to as a data distributor. However, the embodiments of the present disclosure are not limited thereto.

[0099] According to one embodiment, the switch (520) may select one DPD path among the first DPD path and the second DPD path based on a control signal (EN) provided from the rate converter (537). For example, the switch (520) may activate the first DPD path and deactivate the second DPD path based on receiving a control signal having a first value (e.g., 0). In other words, the switch (520) may select the first DPD path based on the control signal having the first value. Alternatively, the switch (520) may deactivate the first DPD path and activate the second DPD path based on receiving a control signal having a second value (e.g., 1). In other words, the switch (520) may select the second DPD path based on the control signal having the second value.

[0100] In the example of FIG. 5, the switch (520) has two inputs (e.g., a control signal and a DPD input signal (x in [n])) to two outputs (e.g. DPD input signal (x) for the first DPD path (or the second DPD path)in [n]) and a 0 value output for the second DPD path (or the first DPD path), but the embodiment of the present disclosure is not limited thereto. For example, if the DPD circuit (510) includes four DPD paths, it may be implemented as a 1x4 demultiplexer. In this case, each of the four DPD paths outputs a digital signal (e.g., a DPD input signal (x in The magnification for adjusting the sampling rate for [n])) may be different from each other. Adjusting the sampling rate may be understood as adjusting the interval between samples of the digital signal or adjusting the number of samples included in a specified time. The sampling rate may be referred to as a sampling frequency, a sampling speed, or an operating rate.

[0101] In one embodiment, the first DPD path may include a DPD actuator (530) and a delay block (522) connected to one output terminal (0) of the switch (520). In addition, the second DPD path may include a down sampler (526), ​​a DPD actuator (530), and an up sampler (528) connected to the other output terminal (1) of the switch (520). For example, the first DPD path may be referred to as the first path or path. In addition, for example, the second DPD path may be referred to as the second path or sampling path.

[0102] According to one embodiment, the first DPD path comprises a DPD input signal (x in Without changing the sampling rate for [n]), the DPD input signal (x in [n]) can provide pre-distortion and delay compensation for the DPD input signal (x inChange (or adjust) the sampling rate (e.g. downsampling) for [n]), the DPD input signal (x) with the changed sampling rate in Predistortion for [n]), and the DPD input signal (x) on which the predistortion is performed in [n]) can provide a change (or adjustment) of the sampling rate (e.g., upsampling).

[0103] According to one embodiment, the DPD actuator (530) calculates the DPD input signal (x) based on the inverse function coefficient (c) provided from the DPD coefficient estimator (535). in [n]) can perform predistortion. For example, the DPD actuator (530) may receive a DPD input signal (x) provided through the first DPD path. in [n]) can be pre-distorted. Alternatively, for example, the DPD actuator (530) may perform a DPD input signal (x) with an adjusted sampling rate provided through the second DPD path. in [n]) can be performed. At this time, the DPD actuator (530) can use the first inverse function coefficient (c1) when performing the predistortion based on the first DPD path. In contrast, the DPD actuator (530) can use the second inverse function coefficient (c2) different from the first inverse function coefficient when performing the predistortion based on the second DPD path. For example, the second inverse function coefficient (c2) can be identified based on the adjustment ratio of the sampling rate provided by the second DPD path.

[0104] According to one embodiment, the down sampler (526) and the up sampler (528) are configured to sample the DPD input signal (x in [n]) can adjust the sampling rate. For example, the down sampler (526) can adjust the sampling rate for the DPD input signal (x in[n]) can reduce (or downsample) the sampling rate for the DPD input signal (x) on which predistortion has been performed by the DPD actuator (530). For example, the upsampler (528) may be configured to reduce (or downsample) the sampling rate for the DPD input signal (x) on which predistortion has been performed by the DPD actuator (530). in [n]) (or the output signal of the DPD actuator (530)) can be increased (or up-sampled). Referring to the above, the DPD input signal (x) provided to the DPD actuator (530) through the first DPD path in [n]) is referred to as the first sampling rate (e.g., k), the DPD input signal (x) provided to the DPD actuator (530) through the second DPD path in [n]) may be a second sampling rate (e.g., k / 2, k / 3, k / 4) reduced by an integer multiple (e.g., x2, x3, x4) from the first sampling rate by a down sampler (526). After that, the DPD input signal (x) on which predistortion is performed based on the second DPD path in The sampling rate of [n]) may be the first sampling rate (e.g., k) increased by an integer multiple (e.g., x2, x3, x4) from the second sampling rate by the up sampler (528). The first sampling rate increased by the up sampler (528) may correspond to the operating rate of the DAC (540).

[0105] In one embodiment, the delay block (522) may compensate for a delay between the first DPD path and the second DPD path. For example, the delay may include a processing delay between the first DPD path and the second DPD path.

[0106] According to one embodiment, the DPD coefficient estimator (535) estimates the DPD input signal (x in [n]), the above DPD output signal (xout [n]), or the feedback signal (y[n]), the inverse function coefficient can be estimated based on at least one of the DPD input signals (x in [n]) can be obtained (or captured). In addition, the DPD coefficient estimator (535) can obtain (or capture) at least a portion of the DPD output signal (x out [n]) can be obtained (or captured). For example, the DPD coefficient estimator (535) can obtain the feedback signal (y[n]) through the feedback path. For example, the inverse function coefficients can represent inverse function characteristics for nonlinear characteristics of the power amplifier (550). For example, the inverse function coefficients can include a look-up table (LUT). For example, the inverse function coefficients can be referred to as inverse function characteristics or DPD coefficients. For example, the inverse function coefficients can be stored in a buffer of the DPD actuator (530).

[0107] According to one embodiment, the estimated inverse function coefficients may be sampled based on the sampling rate of the second DPD path. For example, the DPD input signal (x in [n]), the above DPD output signal (x out[n]), or the feedback signal (y[n]), the estimated inverse function coefficients may be inverse function coefficients to be used for the first DPD path in which sampling is not considered. The DPD coefficient estimator (535), in response to identifying that the second path is used, may sample the estimated inverse function coefficients based on a sampling rate of the second path. That the second path is used may be identified based on a value of a control signal (EN) received from a rate converter (537). The sampled inverse function coefficients may be inverse function coefficients to be used for the second DPD path. Referring to the above, the inverse function coefficients may be identified based on an adjustment factor of a sampling rate of a down sampler (526) (or an up sampler (528)) of the second DPD path.

[0108] According to one embodiment, the rate converter (537) may generate a control signal (EN) that indicates which DPD path to activate among the first DPD path and the second DPD path. For example, the control signal (EN) may be used by the switch (520) to select (or activate, identify) one DPD path among the first DPD path and the second DPD path. According to one embodiment, the control signal (EN) may be used to set a sampling rate for the DPD actuator (530). For example, the control signal (EN) may be used to identify an inverse function coefficient of the DPD actuator (530) as provided to the DPD coefficient estimator (535). Accordingly, by identifying the inverse function coefficient performed based on the control signal (EN), the sampling rate for the DPD actuator (530) may be set. The sampling rate for the DPD actuator (530) can correspond to the adjustment ratio of the sampling rate of the down sampler (526) and the up sampler (528).

[0109] According to one embodiment, the rate converter (537) receives a DPD input signal (x in [n]) and a feedback signal (y[n]). For example, the rate converter (537) can identify an error correlation to detect that memory compensation is required at a sample delay (or sample index) longer than the maximum delay (N) of the DPD actuator (530). In other words, the rate converter (537) can calculate the error correlation to detect that memory compensation greater than a certain value is required in an area that cannot be compensated based on the DPD actuator (530). For example, the error correlation may be calculated based on a DPD input signal (x in [n]) and the difference between the feedback signal (y[n]) and the DPD input signal (x in [n]) can represent the correlation value between them. The above error correlation can be defined as follows:

[0110]

[0111] The above Corr[m] is the error correlation for the sample whose sample index is m, and the above N c is the number of specified samples used to compute the error correlation, e * is the complex conjugate, and the above x in [n] may represent a DPD input signal, and y[n] may represent a feedback signal.

[0112] Referring to the above, the rate converter (537) receives the DPD input signal (x in The DPD input signal (x[n]) and the difference (or error) between the feedback signal (y[n]) in[n]) can identify the correlation value (i.e., the error correlation). According to one embodiment, the rate converter (537) can identify the error correlation (Corr[m]) and the reference value ( ), the value of the control signal can be set to 1. For example, the error correlation (Corr[m]) and the reference value ( ) can be defined as the following mathematical formula.

[0113]

[0114]

[0115]

[0116] FIG. 6 illustrates an example of a graph showing correlation values ​​for samples according to embodiments.

[0117] Fig. 6 illustrates a graph (600) representing an error correlation of a sample corresponding to a sample delay identified by a DPD circuit (510). For example, the error correlation may be identified based on a rate converter (537) of the DPD circuit (510). The horizontal axis of the graph (600) may represent a sample delay (or a sample corresponding to a sample delay), and the vertical axis may represent an error correlation (or a correlation value of a DPD input signal with respect to a difference between a DPD input signal and a feedback signal).

[0118] Referring to the graph (600), a line (605) representing error correlation according to sample delay and a line (610) representing a maximum delay (e.g., N=20) of the DPD circuit (510) (or DPD actuator (530)) are shown. For example, referring to the line (605), at a point (615) where the sample delay is 0, the error correlation for the current sample may be approximately 0.33. The error correlation for the current sample may be represented by Corr[0] within the mathematical equation described above in FIG. 5. Also, referring to the line (605), a point (620) where the error correlation for sample delays (or samples) greater than the maximum delay (N=20) is at a maximum (or peak) may be a point where the sample (m=33). For example, the error correlation of point (620) may be about 0.275. For example, the reference value ( ) is 0.7, the ratio according to the above mathematical expression 3 is approximately 0.833 (=0.275 / 0.33), which is the reference value ( ) may be higher. Therefore, the rate converter (537) may set the value of the control signal (EN) to 1.

[0119] Referring again to FIG. 5, according to one embodiment, the rate converter (537) receives the DPD input signal (x in The ratio identified based on the correlation value for the feedback signal (y[n]) and the reference value ( ) can be set to 1. The control signal having a value of 1 can be provided to the switch (520) and the DPD coefficient estimator (535).

[0120] Although not shown in FIG. 5, for example, the DPD actuator (530) may include at least one of an adder, a multiplier, a buffer, or a delay block. For example, the buffer may be referred to as a memory, a buffer memory. For example, the DPD actuator (530) may be implemented with hardware circuits. For example, the DPD coefficient estimator (535) may be implemented as a function of the at least one processor. The function may include modeling the characteristics of the power amplifier (550) as an inverse function to identify the inverse function coefficient. Also, for example, the rate converter (537) may be implemented as a function of the at least one processor. For example, the function may include generating a control signal to identify (or activate) a DPD path to be used among the first DPD path and the second DPD path.

[0121] Referring to the above, the electronic device (500) receives a DPD input signal (x in By performing predistortion through the DPD circuit (510) for [n]), the linearity of the power amplifier (550) can be improved. According to one embodiment, the electronic device (500) receives a DPD input signal (x in Based on identifying the correlation values ​​for the DPD input signal (x[n]) and the feedback signal (y[n]), in [n]) can be used as a path (e.g., a second DPD path) that can adjust the sampling rate. Through the second DPD path, the DPD input signal (x inBy down-sampling the sampling rate of [n]) by a factor of two, the range of practical memory compensation can be increased by a factor of two. For example, assume that the DPD actuator (530) includes a total of N+1 buffers (e.g., DPD 0 to DPD N) (i.e., the maximum delay is N). A DPD input signal (x) having a first sampling rate in [n]), x[n] can be stored in DPD 0, x[n-1] in DPD 1, ..., x[nN] in DPD N. In contrast, a DPD input signal (x) having a second sampling rate downsampled by twice the first sampling rate in In the case of [n]), x[n] can be stored in DPD 0, x[n-2] in DPD 1, ..., x[n-2N] in DPD N. Therefore, the number of buffers (or memory resources) of the DPD actuator (530) that are actually used is the same, but the compensable temporal region can be doubled. Therefore, compared to the maximum delay (N) that can be compensated for by the predistortion based on the first DPD path that does not adjust the sampling rate, the predistortion based on the second DPD path that adjusts the sampling rate can compensate for the maximum delay that is substantially doubled (e.g., 2N).

[0122] According to one embodiment, the electronic device (500) receives a digital signal (e.g., a DPD input signal (x in [n])) based on a DPD path (e.g., the first DPD path or the second DPD path) identified based on a control signal, and then predistortion is performed, and then an output signal is generated through a power amplifier (550) and the generated output signal can be transmitted through a transmission antenna (570). For example, the electronic device (500) may generate a first digital signal (e.g., a DPD input signal (x in[n])) can be generated. For example, the first digital signal can be generated through at least one processor (not shown) and provided to the DPD circuit (510) from the at least one processor. In other words, the first digital signal can be a DPD input signal. For example, the electronic device (500) can perform predistortion on the first digital signal based on the first DPD path of the DPD circuit (510). For example, the first digital signal can be predistorted based on the DPD actuator (530). At this time, the DPD actuator (530) can perform predistortion on the first digital signal based on the first inverse function coefficient. For example, the electronic device (500) may perform delay compensation on the first digital signal on which the predistortion is performed based on the first DPD path through the delay block (522). At this time, the first digital signal may have a first sampling rate. Accordingly, the first digital signal on which the delay compensation is performed may be a DPD output signal of the DPD circuit (510) (e.g., DPD output signal (x out[n]). The DPD output signal may be analog converted based on the DAC (540). The analog-converted DPD output signal may be input to the power amplifier (550). The analog-converted DPD output signal may be referenced as an input signal (or amplifier input signal) of the power amplifier (550). Accordingly, the power amplifier (550) may generate a first output signal (or amplifier output signal). The first output signal may be transmitted through the transmission antenna (570) through the isolator (560) and the filter (565). At this time, the first output signal may be provided to the ADC (545) through a feedback path. The first output signal may be digitally converted based on the ADC (545). The digitally converted first output signal may be referenced as a feedback signal (e.g., feedback signal (y[n])). The rate converter (537) (or at least one processor) can identify a correlation value for the first digital signal and the feedback signal. The rate converter (537) can compare a ratio of the correlation values ​​identified based on the correlation value with a reference value. The rate converter (537) can generate a control signal (EN) (e.g., a control signal having a value of 1) to deactivate the first DPD path and activate the second DPD path based on the ratio being greater than or equal to the reference value.

[0123] For example, the electronic device (500) may generate a second digital signal following the first digital signal. For example, the second digital signal may be generated by at least one processor (not shown) and provided to the DPD circuit (510) from the at least one processor. In other words, the second digital signal may be a DPD input signal. For example, the electronic device (500) may perform predistortion on the second digital signal based on the second DPD path activated based on the control signal. For example, the second digital signal may have a sampling rate downsampled by a downsampler (526) included in the second DPD path. For example, the downsampled second digital signal may have a second sampling rate that is reduced by an integer multiple of the first sampling rate. Thereafter, the downsampled second digital signal may be predistorted by a DPD actuator (530). At this time, the DPD actuator (530) can perform predistortion on the second digital signal based on the second inverse function coefficient. The first inverse function coefficient can be estimated by the feedback signal, the first digital signal, and the DPD output signal associated with the first digital signal. The second inverse function coefficient can be a sampled value for the first inverse function coefficient based on the control signal indicating the second DPD path. Accordingly, the second digital signal on which the predistortion has been performed can have its sampling rate up-sampled again by the up-sampler (528). The up-sampled second digital signal can have the first sampling rate adjusted from the second sampling rate. Thereafter, the up-sampled second digital signal can be analog converted by the DAC (540).The second digital signal converted to analog may be referred to as an input signal (or amplifier input signal) of the power amplifier (550). The power amplifier (550) may generate a second output signal (or amplifier output signal) from the second digital signal converted to analog. The second output signal may be transmitted through the transmission antenna (570) after passing through the isolator (560) and the filter (565).

[0124] According to one embodiment, the first digital signal and the second digital signal of the above example may be generated based on the same carrier configuration information (or expansion information). For example, the electronic device (500) may receive the carrier configuration information (or expansion information) from a DU (e.g., DU (220) of FIG. 2). Based on the carrier configuration information, the electronic device (500) may generate the first digital signal and the second digital signal. At this time, predistortion may be performed on the first digital signal based on the first DPD path, and predistortion may be performed on the second digital signal based on the second DPD path. A third digital signal following the second digital signal may be predistorted based on the second DPD path. According to one embodiment, when different carrier configuration information is received from the DU, the electronic device (500) may generate a control signal having a value of 0. For example, the rate converter (537) can generate a control signal having a value of 0 and provide it to the switch (520) and the DPD coefficient estimator (535). Accordingly, the DPD circuit (510) in the electronic device (500) can use the first DPD path again. The fourth digital signal generated by the electronic device (500) based on the other carrier setting information can be predistorted through the first DPD path. When the second DPD path is activated (i.e., the control signal having a value of 1) based on the fourth digital signal, predistortion can be performed again based on the second DPD path for the fifth digital signal after the fourth digital signal. For example, the carrier setting information can include frequency information of the transmission signal.For example, the frequency information may include at least one of the instantaneous bandwidth (IBW) or the occupied bandwidth (OBW) of the transmission signal. The transmission signal may represent a signal of a physical layer transmitted through a transmission path of the electronic device (500).

[0125] According to one embodiment, when the electronic device (500) processes a digital signal using the first DPD path changed from the second DPD path, the electronic device (500) may perform delay compensation through the delay block (522). For example, when the second DPD path, which is activated based on the carrier setting information, is deactivated and the deactivated first DPD path is activated, the electronic device (500) may perform the delay compensation through the delay block (522). While using the second DPD path, time for processing of the down sampler (526) and the up sampler (528) may be generated. When using the first DPD path changed based on the carrier setting information while using the second DPD path, compensation for the time on the second DPD path may be required. This may be to resolve asynchronization of the output signal. Accordingly, the electronic device (500) can perform compensation (i.e., delay compensation) for the time that may occur in the second DPD path through the delay block (522).

[0126] In FIG. 5, an embodiment of one transmission path among a plurality of transmission paths included in the electronic device (500) is described, but the embodiments of the present disclosure are not limited thereto. When the transmission path illustrated in FIG. 5 is referred to as a first transmission path and another transmission path not illustrated in FIG. 5 is referred to as a second transmission path, the electronic device (500) according to one embodiment may further include a DPD circuit (510) for the first transmission path and another DPD circuit (not illustrated) for the second transmission path. For example, the other DPD circuit may include a third DPD path and a fourth DPD path. The third DPD path may correspond to the first DPD path of the DPD circuit (510), and the fourth DPD path may correspond to the second DPD path of the DPD circuit (510). In other words, the third DPD path may represent a path that does not perform sampling rate adjustment, and the fourth DPD path may represent a path that performs sampling rate adjustment. However, the adjustment factor of the sampling rate according to the fourth DPD path may be different from the adjustment factor of the sampling rate of the second DPD path. This is because the adjustment factor may be determined based on the characteristics of another power amplifier connected to a transmission antenna that is different from the antenna (570) included in the second transmission path. For example, assume a case where the first digital signal having a first sampling rate is provided to the first transmission path and the second transmission path. When the first digital signal is provided to the second DPD path in the DPD circuit (510) of the first transmission path, the sampling rate of the first digital signal may be downsampled to the second sampling rate. Thereafter, predistortion may be performed on the first digital signal having the second sampling rate.In contrast, when the first digital signal is provided to the fourth DPD path in another DPD circuit of the second transmission path, the sampling rate of the first digital signal may be downsampled to a third sampling rate. Thereafter, predistortion may be performed on the first digital signal having the third sampling rate. At this time, each of the second sampling rate and the third sampling rate may represent a sampling rate that is reduced (or downsampled) by an integer multiple with respect to the first sampling rate. For example, the transmission antenna (570) of the first transmission path and the other transmission antenna of the second transmission path may be included in an antenna array.

[0127] FIGS. 7A and 7B illustrate examples of graphs representing transmission performance based on a DPD circuit including multiple DPD paths according to embodiments.

[0128] Figures 7a and 7b illustrate graphs (700, 750) for indicating transmission performance based on a DPD circuit including a plurality of DPD paths (e.g., the DPD circuit (510) of Figure 5). The transmission performance may indicate transmission performance for a signal on which predistortion is performed based on each of the plurality of DPD paths (e.g., a first DPD path, a second DPD path). For example, a digital signal passing through the first DPD path may have a first sampling rate (e.g., about 1000 MHz). For example, a digital signal passing through the second DPD path may have a second sampling rate (e.g., about 500 MHz) that is reduced by a factor of two with respect to the first sampling rate. It is assumed that the maximum delay (N) of a DPD actuator (e.g., a DPD actuator (530)) included in the first DPD path and the second DPD path is 20.

[0129] Referring to FIG. 7A, a graph (700) illustrates a first line (710) representing transmission performance based on the first DPD path and a second line (720) representing transmission performance based on the second DPD path. The horizontal axis of the graph (700) may represent a sample delay (or a sample corresponding to a sample delay), and the vertical axis of the graph (700) may represent an error correlation (or a correlation value of a DPD input signal with respect to a difference between a DPD input signal and a feedback signal).

[0130] Referring to the graph (700), the second line (720) may have a smaller error correlation overall compared to the first line (710). For example, the second line (720) may have a lower error correlation than the first line (710) in samples corresponding to a sample delay greater than the maximum delay. The error correlation may indicate how much of the DPD input signal is included in the difference (or error) between the DPD input signal and the feedback signal. In other words, a smaller error correlation may indicate that there is no relationship between the difference and the DPD input signal. In other words, a smaller error correlation may indicate a smaller influence due to errors, and it can be understood that transmission performance is improved.

[0131] Referring to FIG. 7B, the graph (750) illustrates a third line (760) representing transmission performance based on the first DPD path and a fourth line (770) representing transmission performance based on the second DPD path. The horizontal axis of the graph (750) may represent a frequency offset (unit: MHz), and the vertical axis of the graph (750) may represent a power spectral density (PSD) (unit: dBm).

[0132] Referring to the graph (750), the fourth line (770) may have a lower output level in an area (757) adjacent to the bandwidth (755) of the transmission signal compared to the third line (760). For example, the PSD value of the fourth line (770) may be lower than the PSD value of the third line (760) in the adjacent area (757). The PSD may represent the amount (or level) of energy according to frequency. In other words, a smaller PSD value may indicate a lower energy level at the corresponding frequency. In other words, a lower output level in the adjacent area (757) may indicate a lower transmission signal component in an undesired frequency range, which may be understood as an improvement in transmission performance.

[0133] Referring to FIGS. 7A and 7B , predistortion using a DPD circuit (or a dual-rate DPD circuit) including multiple DPD paths according to embodiments of the present disclosure can improve the linearity of a power amplifier. Accordingly, electronic devices and methods according to embodiments of the present disclosure can secure improved transmission quality.

[0134] FIG. 8 illustrates an example of an operational flow for a method of transmitting a signal based on a DPD circuit including multiple DPD paths according to embodiments.

[0135] At least some of the methods of FIG. 8 may be performed by the electronic device (500) of FIG. 5. For example, at least some of the methods may be controlled by at least one processor of the electronic device (500).

[0136] Referring to FIG. 8, in operation (810), the electronic device (500) may perform predistortion on a first digital signal having a first sampling rate. For example, the electronic device (500) may perform predistortion on the first digital signal generated from the at least one processor through a first DPD path among the plurality of DPD paths. For example, the first digital signal may be provided to a DPD actuator (e.g., a DPD actuator (530) of FIG. 5) of the first DPD path selected based on a switch (e.g., a switch (520) of FIG. 5). Predistortion may be performed on the first digital signal based on the first DPD path. For example, the first digital signal may have a first sampling rate.

[0137] In operation (820), the electronic device (500) may transmit a first output signal generated based on a power amplifier (e.g., a power amplifier (550) of FIG. 5) from the first digital signal on which the predistortion was performed. For example, the first digital signal on which the predistortion was performed may have a delay compensated for by a delay block of the first DPD path. For example, the delay may include a processing delay between the first DPD path and the second DPD path. For example, the first digital signal on which the delay is compensated may be analog converted by a DAC (e.g., a DAC (540) of FIG. 5). A first input signal analog converted from the first digital signal by the DAC may be provided to the power amplifier. The power amplifier may generate the first output signal from the first input signal. The above first output signal can be transmitted through the transmission antenna (570) through the isolator (560) and the filter (565).

[0138] According to one embodiment, the first output signal may be provided to the DPD circuit through a feedback path. For example, the first output signal may be provided to the feedback path based on a coupler connected to an output terminal of the power amplifier. The first output signal may be digitally converted by an ADC (e.g., ADC (545)) of the feedback path. The ADC may generate a digitally converted feedback signal from the first output signal. The feedback signal may be provided to a DPD coefficient estimator (e.g., DPD coefficient estimator (535) of FIG. 5) and a rate converter (e.g., rate converter (537) of FIG. 5) of the DPD circuit.

[0139] In operation (830), the electronic device (500) may provide a control signal to the DPD circuit to activate the second DPD path.

[0140] In one embodiment, the rate converter can identify a value of the control signal based on the first digital signal and the feedback signal. For example, the rate converter can identify an error correlation to detect that memory compensation is required at a sample delay (or sample index) longer than a maximum delay (N) of the DPD actuator. For example, the error correlation can represent a difference between the first digital signal and the feedback signal and a correlation value between the first digital signal. For example, the rate converter can identify whether a ratio of correlation values ​​identified based on the error correlation is greater than or equal to the reference value. The ratio can represent a ratio between a maximum correlation value among correlation values ​​corresponding to samples greater than or equal to the maximum delay and a correlation value of a current sample. The maximum delay can represent a maximum delay for the DPD actuator. For example, the rate converter may generate the control signal for activating the second DPD path among the first DPD path and the second DPD path based on identifying that the rate is greater than or equal to the reference value. For example, the control signal for activating the second DPD path may have a value of 1. For example, the control signal having a value of 1 may be used to deactivate the first DPD path and activate the second DPD path. For example, the control signal having a value of 0 may be used to activate the first DPD path and deactivate the second DPD path.

[0141] According to one embodiment, based on the control signal having a value of 1, an inverse function coefficient for a DPD actuator can be identified. For example, the rate converter can provide the control signal to the DPD coefficient estimator. Based on the control signal having a value of 1, the DPD coefficient estimator can sample the inverse function coefficient. A sampling rate for the inverse function coefficient can correspond to an adjustment factor of a sampling rate of the second DPD path.

[0142] In operation (840), the electronic device (500) may perform predistortion on a second digital signal having a second sampling rate. For example, the electronic device (500) may perform predistortion on the second digital signal following the first digital signal generated from the at least one processor through the second DPD path among the plurality of DPD paths. For example, the second digital signal may be provided to a DPD actuator of the second DPD path selected through the switch based on the control signal having a value of 1. An inverse function coefficient of the DPD actuator of the second DPD path may be different from an inverse function coefficient of the DPD actuator of the first DPD path. In other words, the DPD actuator of the second DPD path may be the same DPD actuator as the DPD actuator of the first DPD path, and the inverse function coefficient may be applied differently. Predistortion of the second digital signal may be performed based on the second DPD path.

[0143] At this time, the second digital signal may be down-sampled before the predistortion is performed. For example, the sampling rate of the second digital signal may be down-sampled to have a second sampling rate that is an integer multiple of the first sampling rate by a down-sampler of the second DPD path (e.g., the down-sampler (526) of FIG. 5). The integer multiple may be referred to as an adjustment factor of the sampling rate. The down-sampled second digital signal may be subjected to predistortion by the DPD actuator.

[0144] In operation (850), the electronic device (500) may transmit a second output signal generated based on the power amplifier from the second digital signal on which the predistortion was performed. For example, the second digital signal on which the predistortion was performed based on the second path may be up-sampled by an up-sampler (e.g., the up-sampler (528) of FIG. 5) of the second path. The up-sampling may have the same magnification as the adjustment magnification of the down-sampling. For example, when the down-sampling is 2x down-sampling, the up-sampling may be 2x up-sampling. Accordingly, the sampling rate of the second digital signal may be changed from the second sampling rate to the first sampling rate. The up-sampled second digital signal may be provided to the DAC. At this time, the first sampling rate may correspond to an operating rate of the DAC. The above-mentioned up-sampled second digital signal can be converted to analog by the DAC. The second input signal converted to analog by the DAC from the second digital signal can be provided to the power amplifier. The power amplifier can generate the second output signal from the second input signal. The second output signal can be transmitted through the transmission antenna (570) after passing through the isolator (560) and the filter (565).

[0145] In embodiments, an electronic device may include a memory storing instructions and including one or more storage media. The electronic device may include a transmitting antenna. The electronic device may include a power amplifier connected to the transmitting antenna. The electronic device may include a digital predistortion (DPD) circuit connected to the power amplifier, the DPD circuit including a first DPD path and a second DPD path. The electronic device may include at least one processor including a processing circuit. The instructions, when individually or collectively executed by the at least one processor, may cause the electronic device to perform predistortion on a first digital signal having a first sampling rate based on the first DPD path. The instructions, when individually or collectively executed by the at least one processor, may cause the electronic device to transmit, through the transmit antenna, a first output signal generated based on the power amplifier from the predistorted first digital signal. The instructions, when individually or collectively executed by the at least one processor, may cause the electronic device to provide a control signal to the DPD circuit for activating a second DPD path among the first DPD path and the second DPD path based on a correlation value for the first digital signal and the first output signal. The instructions, when individually or collectively executed by the at least one processor, may cause the electronic device to perform predistortion on a second digital signal subsequent to the first digital signal, based on the second DPD path, having a second sampling rate that is an integer multiple of the first sampling rate.The instructions, when individually or collectively executed by the at least one processor, may cause the electronic device to transmit, through the transmit antenna, a second output signal generated based on the power amplifier from the predistorted second digital signal.

[0146] In one embodiment, the first DPD path may provide predistortion and delay compensation for the first digital signal. The second DPD path may provide downsampling, predistortion, and upsampling for the second digital signal.

[0147] In one embodiment, the instructions, when individually or collectively executed by the at least one processor, may cause the electronic device to perform downsampling to change the first sampling rate of the second digital signal to the second sampling rate based on the second DPD path. The instructions, when individually or collectively executed by the at least one processor, may cause the electronic device to perform upsampling to change the second sampling rate of the second digital signal on which the predistortion has been performed to the first sampling rate.

[0148] In one embodiment, the instructions, when individually or collectively executed by the at least one processor, may cause the electronic device to perform delay compensation on the predistorted first digital signal based on the first DPD path. The delay compensation may be identified based on a processing delay between the first DPD path and the second DPD path.

[0149] According to one embodiment, the first output signal may be generated based on the transmission amplifier from a first input signal that is analog converted from the predistorted first digital signal. The second output signal may be generated based on the transmission amplifier from a second input signal that is analog converted from the predistorted second digital signal.

[0150] In one embodiment, the instructions, when individually or collectively executed by the at least one processor, may cause the electronic device to obtain a feedback signal digitally converted from the first output signal. The instructions, when individually or collectively executed by the at least one processor, may cause the electronic device to identify the correlation value of the first digital signal for a difference between the first digital signal and the feedback signal.

[0151] In one embodiment, the correlation value may have a maximum value among correlation values ​​of the first digital signal for the difference between the first digital signal and the feedback signal corresponding to the samples. Each of the samples may have a delay greater than or equal to a reference delay. The reference delay may represent a maximum delay provided by the DPD circuit.

[0152] In one embodiment, the instructions, when individually or collectively executed by the at least one processor, may cause the electronic device to generate the control signal for activating the second DPD path based on identifying a ratio between the correlation value that is greater than or equal to a reference value and a reference correlation value. The reference correlation value may represent the correlation value corresponding to a current sample.

[0153] In one embodiment, the instructions, when individually or collectively executed by the at least one processor, may cause the electronic device to identify, from a first look-up table (LUT) corresponding to the first sampling rate for the predistortion performed based on the first DPD path, a second LUT corresponding to the second sampling rate for the predistortion performed based on the second DPD path, based on identifying the ratio being greater than or equal to the reference value. The first LUT and the second LUT may be associated with an inverse function of the power amplifier.

[0154] In one embodiment, the electronic device may include another transmit antenna. The electronic device may include another power amplifier connected to the another transmit antenna. The electronic device may further include another digital predistortion (DPD) circuit connected to the other power amplifier and including a third DPD path and a fourth DPD path. The instructions, when individually or collectively executed by the at least one processor, may cause the electronic device to perform predistortion on the first digital signal having the first sampling rate based on the third DPD path. The instructions, when individually or collectively executed by the at least one processor, may cause the electronic device to transmit, through the other antenna, a third output signal generated based on the other power amplifier from the first digital signal on which the predistortion has been performed based on the third DPD path. The instructions, when individually or collectively executed by the at least one processor, may cause the electronic device to provide a control signal to the other DPD circuit for activating the fourth DPD path among the third DPD path and the fourth DPD path based on another correlation value for the first digital signal and the third output signal. The instructions, when individually or collectively executed by the at least one processor, may cause the electronic device to perform predistortion on the second digital signal, having a third sampling rate that is an integer multiple of the first sampling rate, based on the fourth DPD path.The instructions, when individually or collectively executed by the at least one processor, may cause the electronic device to transmit, through the other transmit antenna, a fourth output signal generated based on the other power amplifier from the second digital signal on which the predistortion has been performed based on the fourth DPD path.

[0155] According to one embodiment, the electronic device may include a radio unit (RU). The instructions, when individually or collectively executed by the at least one processor, may cause the electronic device to obtain carrier configuration information from a distributed unit (DU) connected to the RU. The instructions, when individually or collectively executed by the at least one processor, may cause the electronic device to deactivate the activated second DPD path based on the carrier configuration information and provide another control signal to the DPD circuit for activating the deactivated first DPD path. The carrier configuration information may include bandwidth information of a transmission signal. The transmission signal may include the first output signal or the second output signal radiated through the transmission antenna.

[0156] According to one embodiment, the bandwidth information may include at least one of an instantaneous bandwidth (IBW) or an occupied bandwidth (OBW) of the transmission signal.

[0157] In embodiments, a method performed by an electronic device may include performing predistortion on a first digital signal having a first sampling rate based on a first DPD path of a DPD circuit included in the electronic device. The method may include transmitting a first output signal generated based on the power amplifier from the first digital signal on which the predistortion has been performed. The method may include providing a control signal to the DPD circuit for activating a second DPD path among the first DPD path and a second DPD path of the DPD circuit based on a correlation value for the first digital signal and the first output signal that is greater than or equal to a reference value. The method may include performing predistortion on a second digital signal subsequent to the first digital signal, the second digital signal having a second sampling rate that is an integer multiple of the first sampling rate, based on the second DPD path. The method may include an operation of transmitting a second output signal generated based on the power amplifier from the second digital signal on which the predistortion has been performed.

[0158] In embodiments, a non-transitory computer-readable storage medium may store one or more programs, including instructions that, when individually or collectively executed by at least one processor of an electronic device, include a transmit antenna, a power amplifier connected to the transmit antenna, and a digital predistortion (DPD) circuit connected to the power amplifier and including a first DPD path and a second DPD path, cause predistortion to be performed on a first digital signal having a first sampling rate based on the first DPD path. The non-transitory computer-readable storage medium may store one or more programs, including instructions that, when individually or collectively executed by the at least one processor, cause a first output signal generated based on the power amplifier from the predistorted first digital signal to be transmitted through the transmit antenna. The non-transitory computer-readable storage medium may store one or more programs including instructions that, when individually or collectively executed by the at least one processor, cause the DPD circuit to provide a control signal for activating the second DPD path among the first DPD path and the second DPD path based on a correlation value for the first digital signal and the first output signal. The non-transitory computer-readable storage medium may store one or more programs including instructions that, when individually or collectively executed by the at least one processor, cause the second DPD path to perform predistortion on a second digital signal subsequent to the first digital signal, the second digital signal having a second sampling rate that is an integer multiple of the first sampling rate.The non-transitory computer-readable storage medium may store one or more programs including instructions that, when individually or collectively executed by the at least one processor, cause the power amplifier to transmit, through the transmission antenna, a second output signal generated from the predistorted second digital signal.

[0159] In embodiments, an electronic device may include a transmitting antenna. The electronic device may include a power amplifier connected to the transmitting antenna. The electronic device may include a digital predistortion (DPD) circuit connected to the power amplifier. The DPD circuit may include a switch for selecting a first DPD path and a second DPD path, a down sampler for decreasing a sampling rate of a digital signal and an up sampler for increasing the sampling rate, a DPD actuator for generating a signal on which predistortion is performed from the digital signal for linearity of the power amplifier, and a delay block for adjusting a processing delay between the first DPD path and the second DPD path. The first DPD path may include the DPD actuator and the delay block. The second DPD path may include the DPD actuator, the down sampler, and the up sampler.

[0160] According to one embodiment, the switch may include a demultiplexer for selecting the first DPD path or the second DPD path for the digital signal provided from the at least one processor.

[0161] According to one embodiment, the electronic device may further include a coupler between the power amplifier and the transmitting antenna. The coupler may provide an output signal of the power amplifier.

[0162] According to one embodiment, the electronic device may further include an analog-to-digital convertor (ADC) connected to the coupler. The ADC may provide a feedback signal digitally converted from the output signal.

[0163] According to one embodiment, the electronic device may further include at least one RF component between the coupler and the transmitting antenna. The at least one RF component may include a filter.

[0164] According to one embodiment, the electronic device may further include an analog-to-digital (DAC) between the DPD circuit and the power amplifier. The DAC may provide an input signal of the power amplifier that is analog-converted from the signal on which predistortion has been performed through the DPD circuit.

[0165] In one embodiment, the electronic device may include another transmit antenna. The electronic device may include another power amplifier connected to the other transmit antenna. The electronic device may further include another digital predistortion (DPD) circuit connected to the other power amplifier, the DPD circuit including a third DPD path and a fourth DPD path.

[0166] The methods according to the embodiments described in the claims or specification of the present disclosure may be implemented in the form of hardware, software, or a combination of hardware and software.

[0167] When implemented in software, a computer-readable storage medium storing one or more programs (software modules) may be provided. The one or more programs stored in the computer-readable storage medium are configured to be executed by one or more processors in an electronic device. The one or more programs include instructions that cause the electronic device to execute methods according to embodiments described in the claims or specification of the present disclosure. The one or more programs may be provided as a computer program product. The computer program product may be traded between a seller and a buyer as a commodity. The computer program product may be distributed in the form of a machine-readable storage medium (e.g., compact disc read only memory (CD-ROM)), or may be distributed online (e.g., downloaded or uploaded) via an application store (e.g., Play Store™) or directly between two user devices (e.g., smart phones). In the case of online distribution, at least a portion of the computer program product may be temporarily stored or temporarily created in a device-readable storage medium, such as the memory of a manufacturer's server, an application store's server, or an intermediary server.

[0168] These programs (software modules, software) may be stored in random access memory, non-volatile memory including flash memory, read only memory (ROM), electrically erasable programmable read only memory (EEPROM), magnetic disc storage devices, compact disc-ROM (CD-ROM), digital versatile discs (DVDs) or other forms of optical storage devices, magnetic cassettes, or may be stored in memories formed by a combination of some or all of these. In addition, each configuration memory may include multiple copies.

[0169] Additionally, the program may be stored on an attachable storage device that is accessible via a communication network, such as the Internet, an intranet, a local area network (LAN), a wide area network (WAN), a storage area network (SAN), or a combination thereof. Such a storage device may be connected to a device implementing an embodiment of the present disclosure via an external port. Additionally, a separate storage device on the communication network may be connected to a device implementing an embodiment of the present disclosure.

[0170] In the specific embodiments of the present disclosure described above, components included in the disclosure are expressed singularly or plurally, depending on the specific embodiment presented. However, the singular or plural expressions are selected to suit the presented situation for convenience of explanation, and the present disclosure is not limited to singular or plural components. Components expressed in plural may be composed of singular elements, or components expressed in singular may be composed of plural elements.

[0171] According to embodiments, one or more of the components or operations of the aforementioned components may be omitted, or one or more other components or operations may be added. Alternatively or additionally, a plurality of components (e.g., modules or programs) may be integrated into a single component. In such a case, the integrated component may perform one or more functions of each of the plurality of components identically or similarly to those performed by the corresponding component among the plurality of components prior to the integration. According to embodiments, the operations performed by a module, program, or other component may be executed sequentially, in parallel, iteratively, or heuristically, or one or more of the operations may be executed in a different order, omitted, or one or more other operations may be added.

[0172] Meanwhile, although the detailed description of the present disclosure has described specific embodiments, it is obvious that various modifications are possible within the scope of the present disclosure.

Claims

1. In electronic devices, A memory that stores instructions and includes one or more storage media; radiator; A power amplifier connected to the above transmitting antenna; A DPD circuit connected to the power amplifier and including a first DPD (digital predistortion) path and a second DPD path; and At least one processor comprising a processing circuit; The above instructions, when individually or collectively executed by the at least one processor, cause the electronic device to: Based on the first DPD path, predistortion is performed on a first digital signal having a first sampling rate; Transmitting a first output signal generated based on the power amplifier from the above-described pre-distorted first digital signal through the transmission antenna; Based on the correlation value for the first digital signal and the first output signal, a control signal for activating the second DPD path among the first DPD path and the second DPD path is provided to the DPD circuit; Predistortion is performed on a second digital signal following the first digital signal, having a second sampling rate that is an integer multiple of the first sampling rate, based on the second DPD path; and Causing a second output signal generated based on the power amplifier from the above pre-distorted second digital signal to be transmitted through the transmission antenna. Electronic devices.

2. In claim 1, The above first DPD path provides predistortion and delay compensation for the first digital signal, The second DPD path provides down sampling, predistortion, and up sampling for the second digital signal. Electronic devices.

3. In claim 1, The above instructions, when individually or collectively executed by the at least one processor, cause the electronic device to: Based on the second DPD path, down sampling is performed to change the first sampling rate of the second digital signal to the second sampling rate; and Based on the second DPD path, upsampling is performed to change the second sampling rate of the second digital signal on which the predistortion is performed to the first sampling rate. Electronic devices.

4. In claim 1, The above instructions, when individually or collectively executed by the at least one processor, cause the electronic device to: Based on the first DPD path, delay compensation is performed on the pre-distorted first digital signal, The above delay compensation is identified based on the processing delay between the first DPD path and the second DPD path. Electronic devices.

5. In claim 1, The first output signal is generated from the first input signal, which is analog converted from the pre-distorted first digital signal, based on the transmission amplifier, The second output signal is generated from the second input signal, which is analog converted from the pre-distorted second digital signal, based on the transmission amplifier. Electronic devices.

6. In claim 1, The above instructions, when individually or collectively executed by the at least one processor, cause the electronic device to: Obtaining a feedback signal digitally converted from the first output signal; and causing said correlation value of said first digital signal to be identified for a difference between said first digital signal and said feedback signal; Electronic devices.

7. In claim 6, The above correlation value has a maximum value among the correlation values ​​of the first digital signal for the difference between the first digital signal and the feedback signal corresponding to the samples, Each of the above samples has a delay greater than the reference delay, The above reference delay represents the maximum delay provided by the DPD circuit. Electronic devices.

8. In claim 6, The above instructions, when individually or collectively executed by the at least one processor, cause the electronic device to: generating the control signal for activating the second DPD path based on identifying a ratio between the correlation value greater than or equal to the reference correlation value, The above reference correlation value represents the correlation value corresponding to the current sample. Electronic devices.

9. In claim 8, The above instructions, when individually or collectively executed by the at least one processor, cause the electronic device to: Based on identifying the ratio greater than or equal to the reference value, causing a second LUT (look-up table) corresponding to the second sampling rate for the predistortion performed based on the second DPD path to be identified from the first LUT (look-up table) corresponding to the first sampling rate for the predistortion performed based on the first DPD path. The first LUT and the second LUT are related to the inverse function of the power amplifier. Electronic devices.

10. In claim 1, The above electronic device: another transmitting antenna; another power amplifier connected to said other transmitting antenna; and further comprising another DPD circuit connected to the other power amplifier and including a third DPD (digital predistortion) path and a fourth DPD path; The above instructions, when individually or collectively executed by the at least one processor, cause the electronic device to: Based on the third DPD path, predistortion is performed on the first digital signal having the first sampling rate; Transmitting a third output signal generated based on the other power amplifier from the first digital signal on which the predistortion has been performed based on the third DPD path through the other antenna; Providing a control signal to the other DPD circuit for activating the fourth DPD path among the third DPD path and the fourth DPD path based on another correlation value for the first digital signal and the third output signal; Performing predistortion on the second digital signal having a third sampling rate that is an integer multiple of the first sampling rate based on the fourth DPD path; Causing a fourth output signal generated based on the other power amplifier from the second digital signal on which the predistortion is performed based on the fourth DPD path to be transmitted through the other transmission antenna. Electronic devices.

11. In claim 1, The above electronic device includes a RU (radio unit), The above instructions, when individually or collectively executed by the at least one processor, cause the electronic device to: Obtain carrier configuration information from a DU (distributed unit) connected to the above RU; and Based on the carrier setting information, causing the DPD circuit to provide another control signal to disable the activated second DPD path and activate the disabled first DPD path. The above carrier setting information includes bandwidth information of the transmission signal, The above transmission signal includes the first output signal or the second output signal radiated through the transmission antenna. Electronic devices.

12. In claim 11, The bandwidth information includes at least one of the instantaneous bandwidth (IBW) or the occupied bandwidth (OBW) of the transmission signal. Electronic devices.

13. In a method performed by an electronic device, The above method: An operation of performing predistortion on a first digital signal having a first sampling rate based on a first DPD path of a DPD circuit included in the electronic device; An operation of transmitting a first output signal generated based on the power amplifier from the first digital signal on which the above predistortion has been performed; An operation of providing a control signal to the DPD circuit for activating the second DPD path among the first DPD path and the second DPD path of the DPD circuit based on a correlation value for the first digital signal and the first output signal that is greater than or equal to a reference value; An operation of performing predistortion on a second digital signal following the first digital signal, having a second sampling rate that is an integer multiple of the first sampling rate based on the second DPD path; and An operation of transmitting a second output signal generated based on the power amplifier from a second digital signal on which the above predistortion has been performed, method.

14. In claim 13, The first DPD path provides predistortion and delay compensation for the first digital signal, and The second DPD path provides down sampling, predistortion, and up sampling for the second digital signal. method.

15. In electronic devices; radiator; a power amplifier connected to the transmitting antenna; and A DPD (digital predistortion) circuit connected to the above power amplifier is included, The above DPD circuit: A switch for selecting the first DPD path and the second DPD path; A down sampler for reducing the sampling rate of a digital signal and an up sampler for increasing the sampling rate, For the linearity of the power amplifier, a DPD actuator that generates a signal in which predistortion is performed from the digital signal, and A delay block for adjusting a processing delay between the first DPD path and the second DPD path is included. The above first DPD path includes the DPD actuator and the delay block, The second DPD path comprises the DPD actuator and the down sampler and the up sampler. Electronic devices.

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