Redistribution layer embedded magnetic core inductor

Abstract

An integrated voltage regulators (IVRs) and methods for fabricating IVRs that improve the integration of passive components such as inductors. A method comprises: providing a polymer substrate having a redistribution layer (RDL) patterned therein, wherein the RDL comprises a plurality of metal layers formed in the polymer substrate; forming a blind cavity in a region of the polymer substrate that does not contain the plurality of metal layers; embedding a magnetic inductor core into the blind cavity and filling blind cavity with a dielectric; and patterning a top layer of an inductor on a surface of the polymer substrate, wherein the magnetic inductor core forms a portion of the inductor.

Description

REDISTRIBUTION LAYER EMBEDDED MAGNETIC CORE INDUCTORRELATED APPLICATION

[0001] This PCT application claims priority to, and the benefit of, U.S. Provisional Patent Application No. 63 / 516,271 , filed July 28, 2023, which is incorproated by reference here in its entirety.BACKGROUND

[0002] For integrated voltage regulators (IVRs) used in power delivery systems, magnetic inductors should have a small footprint while maintaining high inductance density, high current density, and low DC and AC losses. To improve inductor efficiency, the magnetic core and design must be taken into consideration. However, inductor designs using currently available materials generally are not able to meet target metrics.

[0003] As voltage regulators are integrated onto substrates, e.g., for a more compact package, the power density and efficiencies have been demonstrated to improve due to the low interconnection length between the voltage regulator modules (VRMs) and the System-on-Chip (SoC). Furthermore, improvement in power density helps in reducing losses when the power is brought in at higher voltage levels to, e.g., a microprocessor. For these and other reasons, Integrated Voltage Regulators (IVRs) are being utilized to improve system efficiency, sometimes up to 90% and when integrated into the package close to where it is needed the losses can be reduced significantly.

[0004] There is a benefit to improving the design and fabriaction of integrated circuits.SUMMARY

[0005] Disclosed herein are an integrated voltage regulators (IVRs) and methods for fabricating IVRs that improve the integration of passive components such as inductors. Existing IVR solutions typically integrate an inductor in the package substrate through the use of magnetic pastes to plug through-package-vias or by drilling cavities in a printed circuit board (PCB) where prefabricated discrete inductors are mounted. However, these existing techniques can result in a large form factor device that requires complex fabrication. The architecture(s) described herein not only enhance efficiency but will also reduce the physical dimensions of power delivery systems. It should be appreciated that the disclosed device and techniques (e.g., described herein but not limited with respect to a glass substrate with embedded components) is not limited to just chiplets, integrated voltage regulator (IVR) chiplets, or Power Management Integrated Circuits (PMICs), but can also be used in / for capacitors (e.g., a multi-layer ceramic capacitor) and other passive and active devices / components.

[0006] In an aspect, a method is disclosed comprising: providing a polymer substrate having a redistribution layer (RDL) patterned therein, wherein the RDL comprises a plurality of metal layers formed in the polymer substrate; forming a blind cavity in a region of the polymer substrate that docs not contain the plurality of metal layers; embedding a magnetic inductor core into the blind cavity; and patterning a top layer of an inductor on a surface of the polymer substrate, wherein the magnetic inductor core forms a portion of the inductor;

[0007] In some embodiments, the blind cavity is formed using laser drilling.

[0008] In some embodiments, the polymer substrate is removably coupled to a carrier, the method fruther comprises debonding the substrate from the carrier.

[0009] In some embodiments, the magnetic inductor core is formed onto a sheet that is predrilled to match the blind cavity.

[0010] In some embodiments, the method further includes coupling a second substrate to the polymer substrate after patterning the top layer of the inductor.

[0011] In some embodiments, the second substrate is electrically connected to the inductor.

[0012] In some embodiments, the second substrate is a glass substrate with embedded components.

[0013] In some embodiments, the method includes coupling the substrate to a printed circuit board after patterning the bottom layer of the inductor.

[0014] In another aspect, a device is disclosed comprising: an active device; an integrated voltage regulator (1VR) comprising: a polymer substrate having a redistribution layer (RDL) patterned therein, the RDL comprising two or more metal layers; a magnetic inductor core formed in the polymer substrate; and one or more conductive traces patterned to form an inductor, wherein the magnetic inductor core forms a portion of the inductor, and wherein the one or more conductive traces extend into the polymer substrate from at least one of a top surface or a bottom surface of the polymer surface.

[0015] In some embodiments, the integrated voltage regulator comprises multi-layer ceramic capacitor formed in the electrical connection with the one or more conductive traces.BRIEF SUMMARY OF THE DRAWINGS

[0016] FIG. 1 shows an example fabrication process for fabricating an RDL-embedded inductor that spans multiple metal layers in accordancew with an illustrative embodiment.

[0017] FIG. 2 illustrates a variation to the final stack of FIG. 1 in which an IVR and a system- on-a-chip are combined into a single package 204 with integrated passives in accordance with an illustrative embodiment.

[0018] FIG. 3 shows an optical microscope image of an example device produced using the above-disclosed fabrication method.

[0019] FIG. 4 is an optical microscope image of a cross-section of the example device in FIG. 3 in accordance with an illustrative embodiment.DETAILED DESCRIPTION

[0020] In at least one aspect, the present disclosure is directed to an inductor with a magnetic core in the form of a bulk magnetic sheet (not necessarily limited to just sheets). Tn some implementations, the bulk magnetic sheet has a thickness of a few hundred microns (e.g., less than 1000 microns). The magnetic sheet may consist of a pure metal, a metal alloy, or a metalorganic and metal-polymer composite. In another aspect, inductors can be patterned and fabricated simultaneously as the redistribution layer (RDL) is patterned. In some implementations, the magnetic core of the inductor is formed as a sheet or paste. Patterning the RDL surrounding the magnetic core, as disclosed herein, can enable short and high-densityinterconnections. In contrast, existing IVR solutions (e.g., as mentioned above) typically form / position an inductor between two or more metal layers which results in large form factors due to larger z-height surrounding the inductor.

[0021] Generally, the figures below illustrate a process of fabricating an IVR or other device using the above-mentioned RDL patterning technique. In particular, one example (FIG. 1 ) is shown with a single-sided patterning; however, it should be appreciated that the disclosed technique is equally applicable to double-sided patterning. As shown, semi-additive patterning process can be used to form the RDL and the inductor windings. Tn some implementations, individual alignment marks arc used for the inductor and RDL to enable a fairly simple integration process flow. In this manner, any magnetic core shift that might occur post polymer curing step should not affect the alignment of the windings since the RDL design and inductor winding design are individually aligned. To form the RDL in additional metal layers, adaptive patterning techniques can be used to offset routing changes that occur due to, e.g., warpage or shift of the magnetic core. In general, the total RDL thickness is greater than the magnetic core thickness. In some implementations, thermal vias are used to remove heat generated from the magnetic core.

[0022] Example Method and Device

[0023] FIG. 1 shows an example fabrication process 100 for fabricating an RDL-embedded inductor that spans multiple metal layers. As shown, a RDL 102 is first fabricated 104 on top of a glass carrier 106 (‘step 1 ’ 104). In the example shown in FIG. 1, the RDL 102 and a glass carrier 106 are separated by a release tape 108, e.g., to facilitate removal of the glass carrier 108 at a later stage of fabrication. In some such implementations, the release tape 108 is a thermal release tape, a laser release tape, or a light release tape. The RDL 102 is shown to include a number of metal layers 110 embedded in a region where only laminated / deposited polymer is present.

[0024] Subsequently, a blind cavity 112 is formed in the polymer only area 116 of the substrate where no metal is present (‘step 2’ 1 14). In the example shown in FIG. 1 , the blind cavity 118 is formed using a laser drilling process. The wavelength of the laser can be in the UV or Visible or Infrared region as an example. Other fabrication techniques arc contemplated herein.

[0025] A pre-slot drilled sheet 118, as an integrated passive structure, is then embedded into the blind cavity 1 12 (‘step 3’ 120) and an inductor top-layer 122 is patterned (‘step 4’ 124). Optionally, a second substrate 126 (e.g., a glass substrate with embedded components) can be mounted on top of the substrate 128 containing the inductor 122 and / or connected to the contacts formed at ‘step 4’ (‘step 5’ 130).

[0026] Then, the glass carrier 106 (shown as 106’) can be de-bonded (e.g., by way of release tape) (‘step 6’ 130). In some implementations, this step can also include patterning a bottom layer 132 of the inductor 122. In some implementations, the substrate 128 (shown as 128’) can then be coupled / assembled to a board 132 (e.g., a PCB) or other device.

[0027] Example #2

[0028] FIG. 2 illustrates a variation to the final stack 132 of FIG. 1 in which an IVR (shown by RDL 102) and a system on a chip (SoC) 202 (shown as “Chip let 1” 202a, “Chip let 2” 202b, and“Chiplet 3” 202c) are combined into a single package 204 with integrated passives 118. With the simplified fabrication process described herein, any design of inductor can be realized. Example designs include, but are not limited to, toroid, solenoid, spiral, and racetrack. Notably, using the fabrication techniques described herein, inductor properties generally are not adversely affected by the bulk electrical conductivity and leaching properties of the magnetic core since the magnetic core (e.g., 118) is insulated with a dielectric 204 - even in the vias 206. The vias 206 can be used as windings of the inductor 122 or act as power ports (e.g., input and output) depending on the design.

[0029] Example Prototype

[0030] FIG. 3 shows the optical microscope image of an example device produced using the above-disclosed fabrication method. Specifically, FIG. 3 shows a top-down view of a third metal layer with integrated inductor.

[0031] FIG. 4 is an optical microscope image of a cross-section of the example device in FIG. 3. Specifically, the disclosed example device is fabricated using a single-sided process having two metal layers in the same height as the inductor core. A third metal layer (“metal layer 3” or “ML 3”) forms the inductor windings and the surrounding RDL.

[0032] The construction and arrangement of the systems and methods as shown in the various implementations are illustrative only. Although only a few implementations have been described in detail in this disclosure, many modifications are possible (e.g., variations in sizes, dimensions, structures, shapes, and proportions of the various elements, values of parameters, mounting arrangements, use of materials, colors, orientations, etc.). For example, the position of elements may be reversed or otherwise varied, and the nature or number of discrete elements or positions may be altered or varied. Accordingly, all such modifications are intended to be included within the scope of the present disclosure. The order or sequence of any process or method steps may be varied or re-sequenced according to alternative implementations. Other substitutions, modifications, changes, and omissions may be made in the design, operating conditions, and arrangement of the implementations without departing from the scope of the present disclosure.

[0033] Although the figures show a specific order of method steps, the order of the steps may differ from what is depicted. Also, two or more steps may be performed concurrently or with partial concurrence. Such variation will depend on the software and hardware systems chosen and on designer choice. All such variations are within the scope of the disclosure. Likewise, software implementations could be accomplished with standard programming techniques with rule-based logic and other logic to accomplish the various connection steps, processing steps, comparison steps and decision steps.

[0034] It is to be understood that the methods and systems are not limited to specific synthetic methods, specific components, or to particular compositions. It is also to be understood that the terminology used herein is for the purpose of describing particular implementations only and is not intended to be limiting.

[0035] As used in the specification and the appended claims, the singular forms “a,” “an” and “the” include plural referents unless the context clearly dictates otherwise. Ranges may be expressed herein as from “about” one particular value, and / or to “about” another particular value. When such a range is expressed, another implementation includes from the one particular valueand / or to the other particular value. Similarly, when values are expressed as approximations, by use of the antecedent “about,” it will be understood that the particular value forms another implementation. It will be further understood that the endpoints of each of the ranges are significant both in relation to the other endpoint, and independently of the other endpoint.

[0036] “Optional” or “optionally” means that the subsequently described event or circumstance may or may not occur, and that the description includes instances where said event or circumstance occurs and instances where it does not.

[0037] Throughout the description and claims of this specification, the word “comprise” and variations of the word, such as “comprising” and “comprises,” means “including but not limited to,” and is not intended to exclude, for example, other additives, components, integers or steps. “Exemplary” means “an example of’ and is not intended to convey an indication of a preferred or ideal implementation. “Such as” is not used in a restrictive sense, but for explanatory purposes.

[0038] Disclosed are components that can be used to perform the disclosed methods and systems. These and other components are disclosed herein, and it is understood that when combinations, subsets, interactions, groups, etc. of these components are disclosed that while specific reference of each various individual and collective combinations and permutation of these may not be explicitly disclosed, each is specifically contemplated and described herein, for all methods and systems. This applies to all aspects of this application including, but not limited to, steps in disclosed methods. Thus, if there are a variety of additional steps that can be performed it is understood that each of these additional steps can be performed with any specific implementation or combination of implementations of the disclosed methods.

Claims

WHAT IS CLAIMED IS:1 . A method comprising: providing a polymer substrate having a redistribution layer (RDL) patterned therein, wherein the RDL comprises a plurality of metal layers formed in the polymer substrate; forming a blind cavity in a region of the polymer substrate that does not contain the plurality of metal layers; embedding a magnetic inductor core into the blind cavity and filling blind cavity with a dielectric; and patterning a top layer of an inductor on a surface of the polymer substrate, wherein the magnetic inductor core forms a portion of the inductor;2. The method of claim 1, wherein the blind cavity is formed using laser drilling.

3. The method of claim 1, wherein the polymer substrate is removably coupled to a carrier, the method further comprises: debonding the substrate from the carrier.

4. The method of claim 1, wherein the magnetic inductor core is formed onto a sheet that is pre-drilled to match the blind cavity.

5. The method of claim 1, further comprising coupling a second substrate to the polymer substrate after patterning the top layer of the inductor.

6. The method of claim 5, wherein the second substrate is electrically connected to the inductor.

7. The method of claim 5, wherein the second substrate is a glass substrate with embedded components.

8. The method of claim 1, further comprising coupling the substrate to a printed circuit board after patterning the bottom layer of the inductor.

9. A device comprising: an active device; an integrated voltage regulator (IVR) comprising: a polymer substrate having a redistribution layer (RDL) patterned therein, theRDL comprising two or more metal layers; a magnetic inductor core formed in the polymer substrate; and one or more conductive traces patterned to form an inductor, wherein the magnetic inductor core forms a portion of the inductor, and wherein the one or moreconductive traces extend into the polymer substrate from at least one of a top surface or a bottom surface of the polymer surface.

10. The device of claim 9, wherein the integrated voltage regulator comprises multi-layer ceramic capacitor formed in the electrical connection with the one or more conductive traces.

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