Applying indicium segments to a semiconductor device package

Abstract

This disclosure relates to a semiconductor device package marked with indicium segments and a method and a system for applying indicium segments to semiconductor device packages. The disclosed semiconductor device package comprises a substrate having a plurality of components mounted on the substrate and a casing covering the plurality of components. The semiconductor device package further comprises a plurality of markable patches defined over the top surface of the casing and a plurality of indicium segments generated from an indicium that is applied to corresponding ones of the plurality of markable patches using a laser beam. At least one markable patch of the plurality of markable patches includes a surface area that is above at least one component of the plurality of components while the at least one markable patch ensures that the at least one component is not damaged by the laser beam.

Description

APPLYING INDICIUM SEGMENTS TO A SEMICONDUCTOR DEVICE PACKAGERelated Applications

[0001] This application claims the benefit of provisional patent application serial number 63 / 518,942, filed August 1 1 , 2023, the disclosure of which is hereby incorporated herein by reference in its entirety.Field of the Disclosure

[0002] The present disclosure relates, in general, to semiconductor devices and, more particularly, to semiconductor device packages marked with indicium segments and a method and a system for applying indicium segments to semiconductor device packages.Background

[0003] Semiconductor devices are commonly found in modern electronic products. Semiconductor devices may be made with several active components disposed over a substrate and packaged together to form a high-density device. A top surface of the package is generally planarized and flat and, therefore, the thickness of the package may extend to a height above the tops of the active components such that the thickness of the package is nearly the same as the height of the tallest component within the semiconductor device.

[0004] Therefore, a laser marking of an indicium (for example, a two- dimensional (2D) matrix code) over the top surface of a package of a semiconductor device may be hindered by the presence of tall components. During the operation, penetration of heat caused by the laser beam may damage tall components, the tops of which are at or near the top surface of the package.

[0005] Therefore, a need exists for systems and methods for marking one or more indicia over a top surface of a package of a semiconductor device.Summary

[0006] The present disclosure relates, in general, to semiconductor devices and, more particularly, to semiconductor device packages marked with indicium segments and a method and a system for applying indicium segments to semiconductor device packages. In one aspect, the disclosed semiconductor device package comprises a substrate, a plurality of components mounted on the substrate, and a casing covering the plurality of components. The casing comprises a top surface that encapsulates the plurality of components, wherein the top surface of the casing is a top surface of the semiconductor device package. The semiconductor device package further comprises a plurality of markable patches over the top surface and a plurality of indicium segments of an indicium applied to corresponding ones of the plurality of markable patches, wherein at least one markable patch of the plurality of markable patches includes a surface area that is above at least one component of the plurality of components.

[0007] In an embodiment, the at least one component of the plurality of components comprises a height that is in a range of 0.10 mm to 0.40 mm. Furthermore, a minimum thickness exists between the top surface of the casing and a top surface of the at least one component of the plurality of components, and the minimum thickness is greater than a penetration depth of a laser device used to apply the plurality of indicium segments. The penetration depth of the laser device is in a range of 5 pm to 40 pm.

[0008] In an embodiment, each of the plurality of indicium segments is square or rectangular and has a surface area in a range of 1 .8 pm2to 16 mm2.

[0009] In an embodiment, the indicium is a two-dimensional (2D) data matrix having a minimum printable size that is in a range of 0.16 mm2to 4.0 mm2.

[0010] In an embodiment, a thickness of the casing is in a range of 200 pm to 600 pm.

[0011] In an embodiment, the top surface of the casing comprises a surface area that is in a range of 4.0 mm2to 144 mm2.

[0012] In an embodiment, the semiconductor device package further comprises a quantity code (Q code) applied to a corresponding one of the plurality of markable patches. In the same embodiment, the semiconductor device package further comprises a tractability code (trace code) applied to a corresponding one of the plurality of markable patches.

[0013] In an embodiment, the semiconductor device package further comprises a tractability code (trace code) applied to a corresponding one of the plurality of markable patches.

[0014] In an embodiment, the semiconductor device package comprises a tractability code (trace code) applied to a corresponding one of the plurality of markable patches, wherein each of the plurality of markable patches is above one or more of a plurality of components where a minimum thickness exists between a top surface of the package and the top surface of the one or more of the plurality of components. Additionally, the semiconductor device package further comprises a quantity code (Q code) applied to a corresponding one of the plurality of markable patches. According to the same embodiment, a minimum thickness exists between the top surface of the casing and the top surface of the at least one component of the plurality of components, the minimum thickness is greater than a penetration depth of a laser device used to apply the plurality of indicium segments, and the penetration depth of the laser device is in the range of 5 pm to 40 pm.

[0015] In an embodiment, the semiconductor device package further comprises a quantity code (Q code) applied to a corresponding one of the plurality of markable patches, wherein each of the plurality of markable patches is above one or more of a plurality of components where a minimum thickness exists between the top surface of the package and the top surface of the one or more of the plurality of components. Furthermore, a minimum thickness exists between the top surface of the casing and the top surface of the at least one component of the plurality of components, the minimum thickness is greater than a penetration depth of a laser device used to apply the plurality of indiciumsegments, and the penetration depth of the laser device is in a range of 5 pm to 40 pm.

[0016] In an embodiment, each of the plurality of indicium segments is generated to include data and information associated with a non-overlapping portion of the indicium.

[0017] In an embodiment, the plurality of indicium segments are pictorial fragmentations of the indicium and are reconstructed to reproduce a picture associated with the indicium.

[0018] In an embodiment, the plurality of indicium segments are reconstructed to reproduce data and information associated with the indicium.

[0019] In an embodiment, the plurality of indicium segments comprises at least four indicium segments.

[0020] In an embodiment, at least two of the plurality of indicium segments have different surface areas.

[0021] In an embodiment, at least two of the plurality of indicium segments are applied to a surface above at least two components of the plurality of components.

[0022] In an embodiment, the casing comprises a mold material.

[0023] In an embodiment, the indicium includes one of: a part number, a serial number, a 1 -dimensional (linear) barcode (1 DID), a quick response code (QR code), a 2D barcode (2DID), a pattern, a mark, a letter, a number, a symbol, a trademark, a patent number, a model number, a company name, a logo, a lot number, a die location, a tractability code (trace code), or a quantity code (Q code).

[0024] In an embodiment, the plurality of components includes at least one of: a discrete device including a resistor, a diode, or a capacitor; an integrated circuit (IC) including a control unit, a microprocessor, a memory device, an application specific IC (ASIC), a logic circuit, or an analog circuit; a radio frequency circuit; a radio frequency device including an antenna; and interconnect structures including wires, vias, or redistribution layers (RDLs).

[0025] In another aspect, a method of marking a semiconductor device package is disclosed. The method comprises: receiving a semiconductor device package, wherein the semiconductor device package includes a substrate, a plurality of components mounted on the substrate, and a casing covering the plurality of components, wherein the casing has a top surface that encapsulates the plurality of components and the top surface of the casing is a top surface of the semiconductor device package. The method further comprises identifying a plurality of markable patches over the top surface, applying a plurality of indicium segments of an indicium to corresponding ones of the plurality of markable patches, wherein at least one markable patch of the plurality of markable patches includes a surface area that is above at least one component of the plurality of components.

[0026] In an embodiment, the at least one component of the plurality of components comprises a height that is in a range of 0.10 mm to 0.40 mm. Furthermore, a minimum thickness exists between the top surface of the casing and a top surface of the at least one component of the plurality of components, the minimum thickness is greater than a penetration depth of a laser device used to apply the plurality of indicium segments, and the penetration depth of the laser device is in a range of 5 pm to 40 pm. In this regard, the indicium is a 2D data matrix having a minimum printable size that is in the range of 0.16 mm2to 4.0 mm2, and wherein each of the plurality of indicium segments is square or rectangular and has a surface area in a range of 1 .8 pm2to 16 mm2.

[0027] In an embodiment, each of the plurality of indicium segments is generated to include data and information associated with a non-overlapping portion of the indicium.

[0028] In an embodiment, each of the plurality of indicium segments are pictorial fragmentations of the indicium and are reconstructed to reproduce a picture associated with the indicium.

[0029] In an embodiment, each of the plurality of indicium segments are reconstructed to reproduce data and information associated with the indicium.

[0030] In an embodiment the plurality of indicium segments comprises at least four indicium segments.

[0031] In an embodiment, at least two of the plurality of indicium segments have different surface areas.

[0032] In an embodiment, at least two of the plurality of indicium segments are applied to a surface above at least two components of the plurality of components.

[0033] In an embodiment, the casing comprises a mold material.

[0034] In an embodiment, a method further comprises applying a quantity code (Q code) to a corresponding one of the plurality of markable patches. In the same embodiment, the method further comprises applying a tractability code (trace code) to a corresponding one of the plurality of markable patches.

[0035] In another aspect, a system for marking a semiconductor device package is disclosed. The system comprises a user interface, a control unit, a memory device, a scanning device, and a laser device, wherein the control unit operates in conjunction with the user interface, the memory device, and the scanning device to receive a semiconductor device package comprising a substrate, a plurality of components mounted on the substrate, a casing covering the plurality of components, wherein the casing has a top surface that encapsulates the plurality of components, and wherein the top surface of the casing is a top surface of the semiconductor device package. Furthermore, the control unit operates in conjunction with the user interface, the memory device, and the scanning device to identify a plurality of markable patches over the top surface and to apply a plurality of indicium segments of an indicium to corresponding ones of the plurality of markable patches, wherein at least one markable patch of the plurality of markable patches includes a surface area that is above at least one component of the plurality of components.

[0036] In an embodiment, the at least one component of the plurality of components comprises a height that is in a range of 0.10 mm to 0.40 mm. Furthermore, a minimum thickness exists between the top surface of the casing and a top surface of the at least one component of the plurality of components,the minimum thickness is greater than a penetration depth of a laser device used to apply the plurality of indicium segments, and the penetration depth of the laser device is in a range of 5 pm to 40 pm. In this regard, the indicium is a 2D data matrix having a minimum printable size that is in a range of 0.16 mm2to 4.0 mm2, and wherein each of the plurality of indicium segments is square or rectangular and has a surface area in a range of 1 .8 pm2to 16 mm2.

[0037] In another aspect, any of the foregoing aspects individually or together, and / or various separate aspects and features as described herein, may be combined for additional advantage. Any of the various features and elements as disclosed herein may be combined with one or more other disclosed features and elements unless indicated to the contrary herein.

[0038] Those skilled in the art will appreciate the scope of the present disclosure and realize additional aspects thereof after reading the following detailed description of the preferred embodiments in association with the accompanying drawing figures.Brief Description of the Drawing Figures

[0039] The accompanying drawing figures incorporated in and forming a part of this specification illustrate several aspects of the disclosure, and together with the description serve to explain the principles of the disclosure.

[0040] FIGs. 1 A and 1 B illustrate an indicium that is a bar code and indicium segments that are bar code segments generated from the bar code;

[0041] FIG. 1 A illustrates an indicium that is a bar code;

[0042] FIG. 1 B illustrates exemplary indicium segments that are bar code segments generated from the bar code of FIG. 1 A;

[0043] FIGs. 2A, 2B, and 2C illustrate the bar code segments as shown in FIG. 1 B applied to markable areas of a top surface of a semiconductor device package and not applied to unmarkable areas of the top surface of the semiconductor device package;

[0044] FIG. 2A illustrates the bar code segments as shown in FIG. 1 B applied to a top surface of an exemplary semiconductor device package;

[0045] FIG. 2B illustrates markable areas in a cross-sectional view of the semiconductor device package in FIG. 2A along a line;

[0046] FIG. 2C illustrates unmarkable areas in a cross-sectional view of the semiconductor device package in FIG. 2A along a line;

[0047] FIGs. 3A and 3B illustrate a top view and a cross-sectional view, respectively, of an exemplary semiconductor device package;

[0048] FIG. 3A illustrates a top view of a semiconductor device package;

[0049] FIG. 3B illustrates a cross-sectional view of the semiconductor device package in FIG. 3A along a line;

[0050] FIGs. 4A and 4B illustrate top views of markable areas and unmarkable areas over a top surface of a casing of a semiconductor device package;

[0051] FIG. 4A illustrates a top view of a semiconductor device package as seen after unmarkable areas over a top surface of a casing are identified;

[0052] FIG. 4B illustrates a top view of a semiconductor device package as seen after markable areas and unmarkable areas over a top surface of a casing are identified;

[0053] FIG. 5 illustrates a top view of a semiconductor device package as seen after exemplary markable patches are identified;

[0054] FIGs. 6A-6H illustrate a fragmentation process of an indicium into indicium segments;

[0055] FIG. 6A illustrates a first bar code segment generated from a bar code as a part of a fragmentation process that fragments an exemplary bar code into bar code segments;

[0056] FIG. 6B illustrates a second bar code segment generated from a bar code as a part of a fragmentation process that fragments an exemplary bar code into bar code segments;

[0057] FIG. 6C illustrates a third bar code segment generated from a bar code as a part of a fragmentation process that fragments an exemplary bar code into bar code segments;

[0058] FIG. 6D illustrates a fourth bar code segment generated from a bar code as a part of a fragmentation process that fragments an exemplary bar code into bar code segments;

[0059] FIG. 6E illustrates a fifth bar code segment generated from a bar code as a part of a fragmentation process that fragments an exemplary bar code into bar code segments;

[0060] FIG. 6F illustrates a sixth bar code segment generated from a bar code as a part of a fragmentation process that fragments an exemplary bar code into bar code segments;

[0061] FIG. 6G illustrates a seventh bar code segment generated from a bar code as a part of a fragmentation process that fragments an exemplary bar code into bar code segments;

[0062] FIG. 6H illustrates an eighth bar code segment generated from a bar code as a part of a fragmentation process that fragments an exemplary bar code into bar code segments;

[0063] FIG. 7 illustrates a system used to apply indicia over a top of a semiconductor device package; and

[0064] FIG. 8 is a functional flow chart diagram illustrating the generalized steps for applying indicium segments generated from an indicium over a top surface of a semiconductor device package.Detailed Description

[0065] The embodiments set forth below represent the necessary information to enable those skilled in the art to practice the embodiments and illustrate the best mode of practicing the embodiments. Upon reading the following description in light of the accompanying drawing figures, those skilled in the art will understand the concepts of the disclosure and will recognize applications of these concepts not particularly addressed herein. It should be understood that these concepts and applications fall within the scope of the disclosure and the accompanying claims.

[0066] It should be understood that, although the terms first, second, etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element, without departing from the scope of the present disclosure. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0067] It should also be understood that when an element is referred to as being "connected" or "coupled" to another element, it can be directly connected or coupled to the other element or intervening elements may be present. In contrast, when an element is referred to as being "directly connected" or "directly coupled" to another element, there are no intervening elements present.

[0068] It should be understood that, although the terms “upper,” “lower,” “bottom,” “intermediate,” “middle,” “top,” and the like may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element could be termed an “upper” element and, similarly, a second element could be termed an “upper” element depending on the relative orientations of these elements, without departing from the scope of the present disclosure.

[0069] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. As used herein, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises," "comprising," "includes," and / or "including" when used herein specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0070] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It will be further understood that terms used herein should be interpreted as having meanings that are consistent with their meanings in the context of this specification and the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[0071] Embodiments are described herein with reference to schematic illustrations of embodiments of the disclosure. As such, the actual dimensions of the layers and elements can be different, and variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and / or tolerances, are expected. For example, a region illustrated or described as square or rectangular can have rounded or curved features, and regions shown as straight lines may have some irregularity. Thus, the regions illustrated in the figures are schematic and their shapes are not intended to illustrate the precise shape of a region of a device and are not intended to limit the scope of the disclosure. Additionally, sizes of structures or regions may be exaggerated relative to other structures or regions for illustrative purposes and, thus, are provided to illustrate the general structures of the present subject matter and may or may not be drawn to scale. Common elements between figures may be shown herein with common element numbers and may not be subsequently redescribed.

[0072] The present disclosure relates to breaking a bar code into bar code segments and marking a top surface of a semiconductor device package with the bar code segments. An exemplary bar code is illustrated in FIG. 1 A as a bar code 14 and exemplary bar code segments that were generated from the bar code 14 are illustrated in FIG. 1 B as bar code segments 16.

[0073] As illustrated in FIGs. 2A, 2B, and 2C, the bar code segments 16 in FIG. 1 B are provided on markable areas 30 of a top surface 28 of a casing 26 in FIG. 2B, wherein the bar code segments 16 are not provided on unmarkable areas 32 of the top surface 28 of the casing 26 in FIG. 2C. The bar codesegments 16 in are separated from one another on the top surface 28. As shown in FIGs. 2B and 2C, the markable areas 30 in FIG. 2B generally correspond to areas of the top surface 28 that are above short components 24B, and the unmarkable areas 32 in FIG. 2C generally correspond to areas of the top surface 28 that are above tall components 24A.

[0074] FIG. 1 A shows an indicium 10 that is the bar code 14. In this regard, the indicium 10 may include a part number, a serial number, a 1 -dimensional (linear) barcode, a matrix barcode such as a quick response code (QR code), a 2-dimensional (2D) barcode (2DID), a pattern, a mark, letters, numbers, symbols, a trademark, a patent number, a model number, a company name, a logo, a lot number, a die location, a tractability code (trace code), a quantity code (Q code), or the like, or a combination thereof. It is to be noted that in the context of the present disclosure, the term “indicia 10” is used interchangeably as a plural of the indicium 10.

[0075] The bar code 14 provides a machine-readable representation of data and information in a graphic pattern which may be a 2D barcode, a data matrix, or a 2DID (hereinafter collectively referred to as the bar code 14). The bar code 14 may be square or rectangular, even though other shapes are also possible. The bar code 14 includes pixels, cells, dots, modules, or the like (hereinafter collectively referred to as pixels 14A), that represent a logical state with at least one one of two or more levels of possible values. In this regard, the pixels 14A of the bar code 14 may have a minimum size of 30 pm x 30 pm, 40 pm x 40 pm, 60 pm x 60 pm, or 80 pm x 80 pm. Therefore, a length (L2DID) of the bar code 14 may have a minimum value that is greater or equal to 0.4 mm, 0.8 mm, or 2.0 mm and a width (W2DID) of the bar code 14 may have a minimum value that is greater or equal to 0.4 mm, 0.8 mm, or 2.0 mm. Thus, the bar code 14 may have a minimum printable size (L2DID x W2DID) that is in the range of 0.4 mm x 0.4 mm to 2.0 mm x 2.0 mm, 0.5 mm x 0.5 mm to 1 .0 mm x 1 .0 mm, or 0.6 mm x 0.6 mm to 0.8 mm x 0.8 mm.

[0076] FIG. 1 B shows exemplary indicium segments 12 that are generated from the indicium 10 of FIG. 1 A, which is the bar code 14 of FIG. 1A. Theindicium segments 12 may be generated from a pictorial fragmentation of the indicium 10, which fragments the indicium 10 into at least two of the indicium segments 12. In certain embodiments, the indicium 10 is divided into the indicium segments 12 in accordance with a set of geometric specifications and geometric characteristics such as a shape, surface area, dimensions, or the like. The geometric specifications may be predefined or created by an algorithm that is implemented using a computer. Alternatively, or in addition, the geometrical specifications may be based on geometric characteristics of the indicium 10. Furthermore, the geometrical specifications may be based on geometric characteristics of the area available for marking.

[0077] Each of the indicium segments 12 may be processed prior to being applied to a surface. The processing of the indicium segments 12 may include, but is not limited to, scaling or miniaturizing, rotating, cutting, edge extracting, or the like, or a combination thereof. In this regard, the indicium segments 12 may be reprocessed, reconfigured, assembled back together, and / or reconstructed to regenerate the indicium 10 such that any data or information in a graphic pattern of the indicium 10 is recovered and retrieved.

[0078] The indicium segments 12 as shown in FIG. 1 B are the bar code segments 16 that are generated from the bar code 14 of FIG. 1 A. In the exemplary embodiments of the present disclosure, the bar code 14 is divided into eight of the bar code segments 16, labeled S1 to S8. Nevertheless, it is important to note that the scope of the present disclosure is not limited to the bar code 14 or the bar code segments 16 as shown in FIGs. 1 A and 1 B.

[0079] A top view and cross-sectional views of an exemplary semiconductor device package 20 are illustrated in FIG. 2A and FIGs. 2B and 2C, respectively. The semiconductor device package 20 includes the tall components 24A and the short components 24B, both of which are residing on a substrate 22. The tall components 24A and the short components 24B are covered by the casing 26, which provides a top surface of the semiconductor device package 20. The short components 24B are shorter than the tall components 24A, as illustrated in FIGs. 2B and 2C.

[0080] FIG. 2A shows the bar code segments 16 as shown in FIG. 1 B applied to the top surface of the semiconductor device package 20. In this regard, the bar code segments 16 may be etched, printed, annealed, engraved, ablated, or the like, or a combination thereof (herein collectively referred to as “applied to”) onto the top surface of the semiconductor device package 20.

[0081] The semiconductor device package 20 includes the substrate 22, components 24 (referred to individually as the tall components 24A and the short components 24B) which are mounted over the substrate 22, and the casing 26 that encapsulates and covers the components 24. Therefore, the top surface 28 of the casing 26 becomes the top surface of the semiconductor device package 20. The components 24 are categorized or determined to belong to at least one of the tall components 24A or of the short components 24B. In this regard, the tall components 24A extend, at least partially, under the top surface 28 of the casing 26 such that penetration of heat caused by a laser beam used to apply, for example, the bar code segments 16 to the top surface 28 of the casing 26 of the semiconductor device package 20 may damage the tall components 24A. The short components 24B are shorter than the tall components 24A and, therefore, are not exposed to or damaged by the penetration of heat caused by the laser beam during a process of applying, for example, the bar code segments 16 to the top surface 28 of the casing 26 of the semiconductor device package 20.

[0082] As shown in FIG. 2A, the eight bar code segments 16, S1 to S8, are applied to the markable areas 30 over the top surface 28 of the casing 26, as shown in FIG. 2B, that are generally above the short components 24B. Furthermore, to protect the tall components 24A from being damaged by the laser beam, applying the bar code segments 16 to the unmarkable areas 32 over the top surface 28 of the casing 26 that are generally above the tall components 24A is avoided, as shown in FIG. 2C. In order to do so, one or more of the bar code segments 16 may be scaled or miniaturized, rotated, or processed according to methods known to a person skilled in the art. In the exemplary embodiments of the present disclosure, the sixth bar code segment S6 and theeighth bar code segment S8 are rotated 90 degrees clockwise prior to being applied to their respective corresponding areas over the top surface 28 of the casing 26 of the semiconductor device package 20.

[0083] The tall components 24A, the short components 24B, and areas identified as the markable areas 30 and as the unmarkable areas 32 over the top surface 28 of the casing 26 of the semiconductor device package 20 are better illustrated and understood in cross-sectional views of the semiconductor device package 20 in FIGs. 2B and 2C.

[0084] FIG. 2B shows the markable areas 30 in a cross-sectional view of the semiconductor device package 20 of FIG. 2A along a line A-A. Elements as shown in FIG. 2B that were previously described in conjunction with FIG. 2A are not described here for brevity.

[0085] A height (HCOMP) of each of the components 24 is measured along a Z-axis from a top surface of the substrate 22 to the topmost surface of the components 24. According to various embodiments, the height (HCOMP) of each of the components 24 may be in the range of 0.10 mm to 0.40 mm, 0.20 mm to 0.30 mm, or 0.24 mm to 0.26 mm. Furthermore, a laser beam may penetrate from the top surface 28 into the casing 26 with a penetration depth in the range of 5.00 pm to 40.00 pm, 15.00 pm to 35.00 pm, or 20.00 pm to 30.00 pm. In this regard, the components 24 are categorized or determined to belong to at least one of the tall components 24A or to the short components 24B. In the present application, the components 24 with heights (HCOMPs) greater in value than 0.25 mm, 0.26 mm, 0.27 mm, or 0.28 mm are defined as the tall components 24A. Alternatively, the components 24 with heights (HCOMPs) lesser in value than 0.25 mm, 0.26 mm, 0.27 mm, or 0.28 mm are identified as the short components 24B. It is to be understood that certain ones of the components 24 (for example, interconnect structures such as wires) may form a part of the semiconductor device package 20 without being in direct contact with the substrate 22. Nevertheless, said components 24 are encapsulated within the casing 26 and parts of said components 24 may fall under the top surface 28 of the casing 26. Therefore, the height (HCOMP) associated with each of theabove-mentioned components 24 is measured along the Z-axis from the top surface of the substrate 22 to a topmost surface of the component 24.

[0086] In this regard, the markable areas 30 may be defined as areas over the top surface 28 of the casing 26 wherein penetration of heat caused by a laser beam in applying the indicium 10 or the indicium segments 12 (as shown in FIGs. 1 A and 1 B) does not damage the components 24 under said markable areas 30 and the semiconductor device package 20. Therefore, the markable areas 30 are the areas of the top surface 28 of the casing 26 not excluded from marking. In this regard, areas having a width in the range of 10 pm to 70 pm, 20 pm to 60 pm, or 30 pm to 50 pm extending inward from edges of the top surface 28 of the casing 26 of the semiconductor device package 20 are excluded since marking the indicium 10 or the indicium segments 12 may be impeded by limitations of a laser used. Furthermore, areas over the top surface 28 of the casing 26 that are above the tall components 24A are excluded. Additionally, areas over the top surface 28 of the casing 26 having a width in the range of 10 pm to 70 pm, 20 pm to 60 pm, or 30 pm to 50 pm extending outward from boundaries of areas over the tall components 24A are excluded.

[0087] FIG. 2C shows the unmarkable areas 32 in a cross-sectional view of the semiconductor device package 20 in FIG. 2A along a line A-A. Elements as shown in FIG. 2C that were previously described in conjunction with FIGs. 2A and 2B are not described here for brevity. In this regard, the unmarkable areas 32 may be defined as areas over the top surface 28 of the casing 26 wherein penetration of heat caused by a laser beam in applying the indicium 10 or the indicium segments 12 (as shown in FIGS. 1 A and 1 B) may damage the components 24 under said unmarkable areas 32 or the semiconductor device package 20.

[0088] At least two factors are considered in identifying the unmarkable areas 32. The first factor relates to a possibility of damaging the tall components 24A underneath the top surface 28 of the casing 26 when applying the indicium 10 or the indicium segments 12 over the top surface 28 of the casing 26. The second factor considers a margin of error associated with an operation of a laser beamused. In this regard, an error (for example, a movement deviation of the laser beam in applying the indicium 10 or the indicium segments 12 over the top surface 28 of the casing 26 and in a proximity of an area above the tall components 24A) may damage the tall components 24A.

[0089] In this regard, the unmarkable areas 32 may be defined as areas having a width in the range of 10 pm to 70 pm, 20 pm to 60 pm, or 30 pm to 50 pm extending inward from edges of the top surface 28 of the casing 26 of the semiconductor device package 20 wherein marking the indicium 10 or the indicium segments 12 may be impeded by limitations of a laser used. Furthermore, the unmarkable areas 32 include areas over the top surface 28 of the casing 26 that are above the tall components 24A. Additionally, the unmarkable areas 32 include areas over the top surface 28 of the casing 26 having a width in the range of 10 pm to 70 pm, 20 pm to 60 pm, or 30 pm to 50 pm extending outward from boundaries of areas over the tall components 24A.

[0090] FIGs. 3A and 3B illustrate a top view and a cross-sectional view, respectively, of the semiconductor device package 20. The semiconductor device package 20 as shown in FIGs. 3A and 3B is substantially similar to the semiconductor device package 20 described in FIGs. 2A, 2B, and 2C and will continue to have the same reference numerals as those discussed in FIGs. 2A, 2B, and 2C. Elements as shown in FIGs. 3A and 3B that were previously described in conjunction with FIGs. 2A, 2B, and 2C are not described here for brevity.

[0091] Referring to FIG. 3A, a top view of the semiconductor device package 20 is shown. As previously described, the semiconductor device package 20 includes the substrate 22 that is a laminate or the like. The components 24 may include one or more of: discrete components (for example, a resistor, a diode, a capacitor, or the like), integrated circuits and components (for example, control units, microprocessors, memory devices, application-specific integrated circuits (ASICs), logic circuits, analog circuits, or the like), radio frequency circuits and components (for example, attenuators, antennas, amplifiers, filters, or the like), and interconnect structures (for example, wires, redistribution layers (RDLs), orthe like), or any other element that could or may be part of the semiconductor device package 20. Therefore, it is important to note that, in certain embodiments, the components 24 (such as wires, RDLs, or the like) may not be mounted over or be in a direct contact with the substrate 22, even though said components 24 are encapsulated within the casing 26.

[0092] The casing 26 may be one of plastic dual in-line integrated circuit packages (PDIPs), small outline integrated circuits (SOICs) packages, quad flat packages (QFPs), thin QFPs (TQFPs), small shrink outline plastic packages (SSOPs), thin SSOPs (TSSOPs), thin very small outline packages (TVSOPs), double side mold (SIP), ball grid array (BGA) packages, Land Grid Array (LGA) packages, or other packages known to those skilled in the art. In an embodiment, the casing 26 is a mold that is disposed over the top surface of the substrate 22 and encapsulates the components 24 therein. The top surface 28 of the casing 26 has a width (WCASING) and a length (LCASING) that are measured along the X-axis and the Y-axis, respectively. In this regard, the width (WCASING) of the top surface 28 of the casing 26 may have a value in the range of 2.0 mm to 12.0 mm, 4.0 mm to 6.0 mm, or 8.0 mm to 10.0 mm. The length (LCASING) of the top surface 28 of the casing 26 may have a value in the range of 2.0 mm to 12.0 mm, 4.0 mm to 6.0 mm, or 8.0 mm to 10.00 mm. A surface area of the top surface 28 of the casing 26 may be in the range of 4.0 mm2to 144 mm2, 16 mm2to 36 mm2, or 64 mm2to 100 mm2.

[0093] FIG. 3B illustrates a cross-sectional view of the semiconductor device package 20 in FIG. 3A along a line B-B. A thickness (TCASING) of the casing 26 may be defined as a thickness between the top surface of the substrate 22 and the top surface 28 of the casing 26. The thickness (TCASING) of the casing 26 may be uniform or vary across the top surface 28 of the casing 26. Therefore, the thickness (TCASING) of the casing 26 may be in the range of 200 pm to 600 pm, 300 pm to 500 pm, or 350 pm to 450 pm.

[0094] A minimum exposed thickness (TMIN) is defined as a thickness of a region that extends under the top surface 28 of the casing 26 wherein penetration of heat caused by the laser beam may damage the tall components24A with parts extending within this region. The minimum exposed thickness (TMIN) may be in the range of 10.0 pm to 40.0 pm, 15.0 pm to 35.0 pm, or 20.0 pm to 30.0 pm. In the present application, portions of the tall components 24A that fall within the minimum exposed thickness (TMIN) may be exposed to penetration of heat generated by the laser beam during the marking process. Therefore, applying the indicium 10 or the indicium segments 12 (as shown in FIGs. 1A and 1 B) to the top surface 28 of the casing 26 and above the tall components 24A may damage the tall components 24A and the semiconductor device package 20. In this regard, to apply the indicium 10 to the top surface 28 of the semiconductor device package 20, it may be advantageous or even necessary to generate the indicium segments 12 from the indicium 10 and to apply the indicium segments 12 to selected areas over the top surface 28 of the casing 26 of the semiconductor device package 20.

[0095] FIGs. 4A and 4B illustrate top views of the semiconductor device package 20. The semiconductor device package 20 as shown in FIGs. 4A and 4B is substantially similar to the semiconductor device package 20 described in reference to FIGs. 2A, 2B, and 2C and FIGs. 3A and 3B, respectively, and will continue to have the same reference numerals as those previously discussed. Elements as shown in FIGs. 4A and 4B that were previously described in conjunction with FIGs. 2A, 2B, and 2C and FIGs. 3A and 3B, respectively, are not described here for brevity.

[0096] FIG. 4A illustrates a top view of the semiconductor device package 20 as seen after the unmarkable areas 32 over the top surface 28 of the casing 26 are identified. The unmarkable areas 32 were previously discussed in reference to FIG. 2C and are not described here for brevity. As shown in FIG. 4A, the unmarkable areas 32 may constitute 10%, 20%, 30%, or 50% of the surface area of the top surface 28 of the casing 26. As seen previously in FIG. 2C, the unmarkable areas 32 generally cover areas over the top surface 28 of the casing 26 that are above and surrounding the tall components 24A and areas around edges of the top surface 28 of the casing 26.

[0097] FIG. 4B illustrates a top view of the semiconductor device package 20 as seen after the markable areas 30 and the unmarkable areas 32 over the top surface 28 of the casing 26 are identified. The markable areas 30 and the unmarkable areas 32 were previously discussed in reference to FIGs. 2B and 2C, respectively, and therefore are not described here for brevity. As shown in FIG. 4B, the markable areas 30 may constitute 20%, 30%, 40%, or 50% of the surface area of the top surface 28 of the casing 26. As seen, the markable areas 30 generally cover areas over the top surface 28 of the casing 26 that are above the short components 24B.

[0098] FIG. 5 illustrates a top view of the semiconductor device package 20 as seen after exemplary markable patches 34 are identified. The semiconductor device package 20 as shown in FIG. 5 is substantially similar to the semiconductor device package 20 described in reference to FIGs. 2A, 2B, and 2C and FIGs. 3A and 3B, respectively, and will continue to have the same reference numerals as those discussed. Elements as shown in FIG. 5 that were previously described in conjunction with FIGs. 2A, 2B, and 2C and FIGs. 3A and 3B, respectively, are not described here for brevity.

[0099] The markable patches 34 may be defined as non-overlapping areas within the markable areas 30 within which corresponding ones of the indicium segments 12 are applied. In this regard, the markable patches 34 may be predefined areas within the markable areas 30. Alternatively, or in addition, an algorithm may be implemented to identify the markable patches 34 within the markable areas 30 over the top surface 28 of the casing 26 of the semiconductor device package 20. In an embodiment, the markable patches 34 are a number (N) of non-overlapping areas within the markable areas 30 that have non-selfintersecting geometric shapes that are identifiable using geometrical specifications.

[0100] Geometrical specifications may be one or more of a shape, a surface area, dimensions, or the like, or any other geometric characteristics that may be suitable in defining the markable patches 34. The geometric specifications may be predefined or created by an algorithm that is implemented using a computer.Alternatively, or in addition, the geometrical specifications may be based on geometric characteristics of the markable areas 30, the indicium segments 12, or both.

[0101] This is particularly advantageous since it allows for the indicium 10 (such as that bar code 14 as shown in FIG. 1A) to be applied to the top surface 28 of the semiconductor device package 20 despite limitations such as the surface area of the top surface 28 of the casing 26 being small compared with the minimum printable size (L2DID x W2DID) of the indicium 10 (i.e., the bar code 14), a total surface area of the markable areas 30 being even smaller compared with the minimum printable size (L2DID x W2DID) of the indicium 10 (i.e., the bar code 14), and a non-uniformity of the markable areas 30.

[0102] In the example embodiments of the present disclosure, geometrical specifications have been used to identify the markable patches 34 within the markable area 30. In this regard, the markable patches 34 are defined as nonoverlapping areas within the markable areas 30 which have a square or rectangular shape with a width (WP) along the X-axis that is greater than or equal to a width of 1 pixel, 2 pixels, 3 pixels, 4 pixels, or greater than 4 pixels, and a length (LP) along the Y-axis that is greater than or equal to a length of 2 pixels, 3 pixels, 4 pixels, or greater than 4 pixels.

[0103] As shown in FIG. 5, according to the above-mentioned geometrical specifications, eight of the markable patches 34 may be identified as a first patch P1 having a width (WP1 ) and a length (LP1 ), a second patch P2 having a width (WP2) and a length (LP2), a third patch P3 having a width (WP3) and a length (LP3), a fourth patch P4 having a width (WP4) and a length (LP4), a fifth patch P5 having a width (WP5) and a length (LP5), a sixth patch P6 having a width (WP6) and a length (LP6), a seventh patch P7 having a width (WP7) and a length (LP7), and an eighth patch P8 having a width (WP8) and a length (LP8). In this manner, combined surface areas of the eight markable patches 34 (PI PS) are greater than the minimum printable size (L2DID x W2DID) of the indicium 10.

[0104] FIGs. 6A-6H illustrate a fragmentation process of the indicium 10 into the indicium segments 12. In this regard, the indicium 10 is the bar code 14 and the indicium segments 12 are the bar code segments 16. In the exemplary embodiments of the present disclosure, the markable patches 34 (as shown in FIG. 5) are used to divide the bar code 14 into corresponding ones of the bar code segments 16. Nevertheless, it is to be noted that the scope of the present disclosure is not so limited, and other means or methods may be used to divide the indicium 10 (i.e., the bar code 14) into the indicium segments 12 (i.e., the bar code segments 16). In an exemplary embodiment, the bar code 14 may be segmented by a user in a random manner or according to a set of predefined rules. Alternatively, or in addition, an algorithm may be implemented by a computer or a control unit to divide the bar code 14 into the bar code segments 16. In this regard, and as shown and described in conjunction with FIGs. 6A-6H, an exemplary algorithm having a set of predefined rules is used herein to generate the bar code segments 16 from the bar code 14. In this regard, the bar code segments 16 may be reprocessed, reconfigured, assembled back together, and reconstructed to regenerate the bar code 14. Therefore, any data or information in a graphic pattern of the bar code 14 may be recovered and retrieved from the bar code segments 16.

[0105] In the present application, the bar code 14 is square shaped with a minimum printable size (L2DID x W2DID) that is 0.6 mm x 0.6 mm, 0.8 mm x 0.8 mm, or 1.0 mm x 1.0 mm. Therefore, the bar code 14 is processed (i.e., scaled down) to have a minimum width (W2DID) along the X-axis that is equal to or greater than 0.6 mm, 0.8 mm, or 1 .0 mm and a minimum length (L2DID) along the Y-axis that is equal to or greater than 0.6 mm, 0.8 mm, or 1 mm. Next, a shape and dimensions associated with each of the markable patches 34 are used to divide the bar code 14 into the bar code segments 16 in a step-by-step manner. In this regard, the bar code 14 is divided into multi-segment columns from a top left corner to a top right corner of the bar code 14. In the present application, a first multi-segment column of the bar code segments 16 is generated starting from the top left corner of the bar code 14 such that all of thebar code segments 16 that are generated within the first column have a width (WS) that is equal to the width (W2DID) of the bar code 14 and a combined length (LS) that is greater than the length (L2DID) of the bar code 14. In this regard, the width (WS) of each of the bar code segments 16 is greater than or equal to a width of 1 pixel, 2 pixels, 3 pixels, 4 pixels, or greater than 4 pixels. Furthermore, the length (LS) of each of the barcode segments 16 is greater than or equal to a length of 2 pixels, 3 pixels, 4 pixels, or greater than 4 pixels. Therefore, each of the barcode segments 16 may have a minimum surface area that is in the range of 1 .8 pm2to 16 mm2, 10 pm2to 9 mm2, or 100 pm2to 4 mm2.

[0106] In doing so, the remaining portion of the bar code 14 would have a square or a rectangular shape and may allow for a second vertical row of the bar code segments 16 and, subsequently, a next (third) row of the bar code segments 16 to be generated until the fragmentation of the bar code 14 is complete. It is important to note that the above-mentioned process of dividing the bar code 14 into the bar code segments 16 is one of many methods that may be implemented to generate the bar code segments 16 from the bar code 14, and therefore, the scope of the present disclosure is not limited to the exemplary process provided herein. Additionally, it is to be noted that the multi-segment columns are imaginary and, therefore, not shown here, but rather are described to further explain the embodiments of the present disclosure. In this regard, the first patch P1 and the second patch P2 may form a first multi-segment column to generate the first bar code segment S1 and the second bar code segment S2, respectively, as shown in FIGs. 6A and 6B. The third patch P3, the fourth patch P4, the fifth patch P5, and the sixth patch P6 may form a second multi-segment column to generate the third bar code segment S3, the fourth bar code segment S4, the fifth bar code segment S5, and the sixth bar code segment S6, respectively, as shown in FIGs. 6C-6F. Additionally, the seventh patch P7 and the eighth patch P8 may form a third multi-segment column to generate the seventh bar code segment S7 and the eighth bar code segment S8, respectively, as shown in FIGs. 6G and 6H.

[0107] According to exemplary embodiments of the present disclosure, elements as shown in FIGs. 6A-6H that were previously described in conjunction with FIGs. 1 A, 1 B, 2A, and 5 are not described in detail here for brevity.

[0108] FIG. 6A illustrates the first bar code segment S1 generated from the bar code 14 as a part of a fragmentation process that fragments the bar code 14 into the bar code segments 16. In this regard, the markable patch 34, which is the first patch P1 , is used to divide and split the first bar code segment S1 from the bar code 14 such that the first bar code segment S1 fits within boundaries of the first patch P1. To avoid splitting the pixels 14A (as described in FIG. 1 A) while generating the first bar code segment S1 , a first adjusted boundary C1 is used to calibrate the boundaries of first patch P1 , which is used to generate the first bar code segment S1 . In this manner, the first bar code segment S1 only includes the area covered by the first patch S1 that is to the left side of the first adjusted boundary 01. Therefore, the pixels 14A and information and data associated with them remain intact as the first bar code segment S1 is applied within the first patch P1 of the markable patches 34 over the top surface 28 of the casing 26, as shown in FIG. 2A. In this regard, the first bar code segment S1 may have a width (WS1 ) and a length (LS1 ).

[0109] FIG. 6B illustrates the second bar code segment S2 generated from the bar code 14 as a part of a fragmentation process that fragments the bar code 14 into the bar code segments 16. In this regard, the second patch P2 of the markable patches 34 is used to divide and split the second bar code segment S2 from the bar code 14 such that the second bar code segment S2 fits within boundaries of the second patch P2. Furthermore, a second adjusted boundary 02 may be used to calibrate a width (WS2) of the second bar code segment S2 to match the width (WS1 ) of the first bar code segment S1 . In this regard, the pixels 14A forming a part of the second bar code segment S2 are not divided and remain intact. This may be significant since, as the bar code segments 16 are generated from a top left corner to a bottom right corner of the bar code 14 in columns (i.e. , multi-segment columns), the bar code segments 16 belonging to each of the multi-segment columns have a same width, which makes thefragmentation process easier. In the present application, upon removal of the bar code segments 16 that form the first multi-segment column (i.e., the first bar code segment S1 and the second bar code segment S2), a remaining part of the bar code 14 would continue to maintain a rectangle or a square shape. In this regard, the second bar code segment S2 may have the width (WS2) and a length (LS2).

[0110] FIG. 6C illustrates a third bar code segment S3 generated from the bar code 14 as a part of a fragmentation process that fragments the bar code 14 into the bar code segments 16. As shown, a third adjusted boundary 03 may be used to calibrate a width (WS3) of the third bar code segment S3 to avoid dividing the pixels 14A. In this regard, the third bar code segment S3 may have the width (WS3) and a length (LS3).

[0111] FIG. 6D illustrates a fourth bar code segment S4 generated from the bar code 14 as a part of a fragmentation process that fragments the bar code 14 into the bar code segments 16. A fourth adjusted boundary C4 may be used to adjust a length (LS4) of the fourth bar code segment S4 to avoid dividing the pixels 14A. In this regard, the fourth bar code segment S4 may have a width (WS4) and the length (LS4).

[0112] FIG. 6E illustrates a fifth bar code segment S5 generated from the bar code 14 as a part of a fragmentation process that fragments the bar code 14 into the bar code segments 16. A fifth adjusted boundary 05 may be used to adjust a length (LS5) of the fifth bar code segment S5 to avoid dividing the pixels 14A and to allow the sixth bar code segment S6 (as to be shown below in FIG. 6F) to have a length (LS6). In this regard, the fifth bar code segment S5 may have a width (WS5).

[0113] FIG. 6F illustrates the sixth bar code segment S6 generated from the bar code 14 as a part of a fragmentation process that fragments the bar code 14 into the bar code segments 16. A sixth adjusted boundary 06 may be used to adjust the length (LS6) of the sixth bar code segment S6 such that it includes a remaining portion of the bar code 14 that forms a part of an imaginary secondmulti-segment column (not shown). In this regard, the sixth bar code segment S6 may have a width (WS6) and the length (LS6).

[0114] FIG. 6G illustrates the seventh bar code segment S7 generated from the bar code 14 as a part of a fragmentation process that fragments the bar code 14 into the bar code segments 16. A first-seventh adjusted boundary C7-1 and a second-seventh adjusted boundary C7-2 may be used to adjust a width (WS7) and a length (LS7) of the seventh bar code segment S7, respectively. In this regard, the seventh bar code segment S7 may have the width (WS7) and the length (LS7).

[0115] FIG. 6H illustrates the eighth bar code segment S8 generated from the bar code 14 as a part of a fragmentation process that fragments the bar code 14 into the bar code segments 16. A first-eighth adjusted boundary C8-1 and a second-eighth adjusted boundary C8-2 may be used to adjust a width (WS8) and a length (LS8) of the eighth bar code segment S8, respectively. In this regard, the eighth bar code segment S8 may have the width (WS8) and the length (LS8).

[0116] FIG. 7 shows a system 40 used to apply the indicia 10 over the top surface 28 of the semiconductor device package 20. The system 40 may include a user interface 36, a control unit 38, a memory 42, a scanning device 44, and a laser device 46. The system 40 and a general operation of the system 40 are described in a joint manner with FIGs. 1 , 1 B, 2A-2C, 3A, 3B, 4A, 4B, 5, and 6A- 6H using a description associated with FIGs. 1 , 1 B, 2A-2C, 3A, 3B, 4A, 4B, 5, and 6A-6H. In general, the system 40 operates to receive the semiconductor device package 20 as well as input data and information related to the indicia 10, identify or acquire information related to the markable patches 34 over the top surface 28 of the semiconductor device package 20, generate or obtain information related to the indicium segments 12 of one or more of the indicia 10, and apply indicium segments 12 (such as the bar code segments 16) and any of the indica 10 that remain unfragmented (such as a trace code 18A and a Q-code 18B) over corresponding ones of the markable patches 34.

[0117] In this regard, the bar code 14 and the bar code segments 16 as shown in FIG. 7 are substantially similar to the bar code 14 as shown in FIGs. 1Aand 1 B and FIGs. 6A-6H and will continue to have the same reference numerals. Therefore, the bar code segments S1 -S8 as shown in FIG. 7 are substantially similar to the bar code segments S1 -S8 as shown in reference to FIGs. 1 B and 6H. The semiconductor device package 20 as shown in FIG. 7 is substantially similar to the semiconductor device package 20 described in reference to FIGs. 2A, 2B, and 2C, FIGs. 3A and 3B, FIGs. 4A and 4B, and FIG. 5 and will continue to have the same reference numerals as those discussed and are not described here for brevity.

[0118] The indicia 10 include the bar code 14, the trace code 18A, and the Q- code 18B. The bar code 14 is divided into the bar code segments 16 in a manner as previously described in reference to FIGs. 6A-6H. The markable patches 34 are defined in a manner as previously described in FIG. 5 and are not described here for brevity. In addition to the patches R1 -P8, two additional markable patches 34 corresponding to each of the trace code 18A and the Q- code 18B are identified. In this regard, a ninth patch P9 (not explicitly shown) having a width (WP9) and a length (LP9) and a tenth patch P10 (not explicitly shown) having a width (WP10) and a length (LP10) are identified over the top surface 28 of the casing 26 of the semiconductor device package 20 onto which the trace code 18A and the Q-code 18B are to be applied, respectively.

[0119] The user interface 36 provides a graphical user interface for user interaction with the system 40 and may work in conjunction with the control unit 38, the memory 42, the scanning device 44, and the laser device 46 to control, operate, and monitor the operation of the system 40. The user interface 36 may include a graphical user interface, networks, a manual control, computers, or the like, or any other suitable technologies, inputs, or outputs that may be used to operate, monitor, control, maintain, or alter the system 40 by the users to apply the indicia 10 to the top surface 28 of the casing 26 of the semiconductor device package 20. In this regard, information regarding the indicia 10 and the semiconductor device package 20 may be provided to the control unit 38 by a user and through the user interface 36.

[0120] The control unit 38 may use data from or provide data to the memory 42. Information, instructions, and data provided to the control unit 38 may be one or more of either input from a user, a past input from a user stored in the memory 42, input obtained from the scanning device 44, previous input obtained from the scanning device 44, input obtained from a prior use of the system 40, or a combination thereof.

[0121] The memory 42 may be used to store information, instructions, and data that are obtained by the control unit 38 such that said information, instructions, and data can be readily accessible by the control unit 38 for current and future uses in the operation of the system 40. This is particularly beneficial in a high-volume facility for marking semiconductor device packages (such as the semiconductor device package 20) using the system 40.

[0122] The scanning device 44 may be used to obtain information regarding the components 24 and the casing 26 of the semiconductor device package 20 that is necessary for the operation of the system 40. Such information includes, but is not limited to, information regarding the components 24 and the casing 26 as described above in conjunction with information that may be provided by a user through the user interface 36. The scanning device 44 may include one or more of an optical imaging device, an X-ray imaging device, a scanning acoustic microscopy imaging device, a C-mode scanning acoustic microscopy (C-SAM) device, or any other suitable scanning device. According to various embodiments, the scanning device 44 may comprise an image-processing unit (not shown) to recognize and identify one or more of either positions, boundaries, surface areas, and cartesian coordinates of the markable patches 34 (as shown in FIG. 5). This information is subsequently provided to the control unit 38 to operate a laser marker 52 of the laser device 46.

[0123] In certain embodiments, during and after the process of applying the indicia 10 to corresponding ones of the markable patches 34, the scanning device 44 scans the top surface 28 of the casing 26 of the semiconductor device package 20 to verify the indicia 10 and the indicium segments 12 for readability, compliance with any pre-defined requirements, and accuracy of their positions.Furthermore, the scanning device 44 may further include verifiers that employ optics in conjunction with the control unit 38 to implement algorithms to verify the indicia 10 and the indicium segments 12 for accuracy of content.

[0124] The laser device 46 includes a laser source 48 that works in conjunction with the laser marker 52 to mark the indicia 10 and the indicium segments 12 over the top surface 28 of the casing 26. In this regard, the laser source 48 may be used to adjust the intensity of the laser beam that is applied using the laser marker 52. The laser marker 52 moves in an XY plane above the top surface 28 of the casing 26. Additionally, the laser marker 52 may be able to move up or down along the Z-axis (i.e., further away or closer to the top surface 28) and may be rotated such that the laser beam is angled.

[0125] FIG. 8 is a functional flow chart diagram 50 illustrating the generalized steps for applying the indicium segments 12 generated from the indicium 10 over the top surface 28 of the semiconductor device package 20 as shown in FIGs. 1 - 7. It will be appreciated that the steps and the arrangement thereof as described in FIG. 8 have been generalized to facilitate discussion of the more specific system described above, and that numerous variations are possible.

[0126] In this regard, STEP 1 , STEP 2, and STEP 3 were previously discussed in relation to FIGs. 1 A and 1 B, FIGs. 2A-2C, FIGs. 3A and 3B, and FIG. 4. STEP 4, STEP 5, STEP 6, and STEP 7 were described in reference to FIGs. 1A and 1 B, FIGs. 2A-2C, FIG. 5, and FIGs. 6A-6H. STEP 8 was previously discussed in reference to FIG. 7.

[0127] It is contemplated that any of the foregoing aspects, and / or various separate aspects and features as described herein, may be combined for additional advantage. Any of the various embodiments as disclosed herein may be combined with one or more other disclosed embodiments unless indicated to the contrary herein.

[0128] Those skilled in the art will recognize improvements and modifications to the preferred embodiments of the present disclosure. All such improvements and modifications are considered within the scope of the concepts disclosed herein and the claims that follow.

Claims

ClaimsWhat is claimed is:1 . A semiconductor device package comprising: a substrate; a plurality of components mounted on the substrate; a casing covering the plurality of components, the casing having a top surface that encapsulates the plurality of components, wherein the top surface of the casing is a top surface of the semiconductor device package; a plurality of markable patches over the top surface of the casing; a plurality of indicium segments of an indicium applied to corresponding ones of the plurality of markable patches; and wherein at least one markable patch of the plurality of markable patches includes a surface area that is above at least one component of the plurality of components.

2. The semiconductor device package of claim 1 , wherein the at least one component of the plurality of components comprises a height that is in a range of 0.10 mm to 0.40 mm.

3. The semiconductor device package of claim 2, wherein a minimum thickness exists between the top surface of the casing and a top surface of the at least one component of the plurality of components, and the minimum thickness is greater than a penetration depth of a laser device used to apply the plurality of indicium segments.

4. The semiconductor device package of claim 3, wherein the penetration depth of the laser device is in a range of 5 pm to 40 pm.

5. The semiconductor device package of claim 1 , wherein each of the plurality of indicium segments is square or rectangular and has a surface area in a range of 1 .8 pm2to 16 mm2.

6. The semiconductor device package of claim 1 , wherein the indicium is a two-dimensional data matrix having a minimum printable size that is in a range of 0.16 mm2to 4.0 mm2.

7. The semiconductor device package of claim 1 , wherein a thickness of the casing is in a range of 200 pm to 600 pm.

8. The semiconductor device package of claim 1 , wherein the top surface of the casing comprises a surface area that is in a range of 4.0 mm2to144 mm2.

9. The semiconductor device package of claim 1 , further comprising a quantity code (Q code) applied to a corresponding one of the plurality of markable patches.

10. The semiconductor device package of claim 9, further comprising a tractability code (trace code) applied to a corresponding one of the plurality of markable patches.1 1 . The semiconductor device package of claim 1 , further comprising a tractability code (trace code) applied to a corresponding one of the plurality of markable patches.

12. The semiconductor device package of claim 1 , further comprising a tractability code (trace code) applied to a corresponding one of the plurality of markable patches, wherein each of the plurality of markable patches is above one or more of the plurality of components where aminimum thickness exists between the top surface of the semiconductor device package and a top surface of the one or more of the plurality of components.

13. The semiconductor device package of claim 12, further comprising a quantity code (Q code) applied to a corresponding one of the plurality of markable patches.

14. The semiconductor device package of claim 12, wherein a minimum thickness exists between the top surface of the casing and a top surface of the at least one component of the plurality of components, the minimum thickness is greater than a penetration depth of a laser device used to apply the plurality of indicium segments, and the penetration depth of the laser device is in a range of 5 pm to 40 pm.

15. The semiconductor device package of claim 1 , further comprising a quantity code (Q code) applied to a corresponding one of the plurality of markable patches, wherein each of the plurality of markable patches is above one or more of the plurality of components where a minimum thickness exists between the top surface of the semiconductor device package and a top surface of the one or more of the plurality of components.

16. The semiconductor device package of claim 15, wherein a minimum thickness exists between the top surface of the casing and a top surface of the at least one component of the plurality of components, the minimum thickness is greater than a penetration depth of a laser device used to apply the plurality of indicium segments, and the penetration depth of the laser device is in a range of 5 pm to 40 pm.

17. The semiconductor device package of claim 1 , wherein each of the plurality of indicium segments is generated to include data and information associated with a non-overlapping portion of the indicium.

18. The semiconductor device package of claim 1 , wherein the plurality of indicium segments are pictorial fragmentations of the indicium and are reconstructed to reproduce a picture associated with the indicium.

19. The semiconductor device package of claim 1 , wherein the plurality of indicium segments are reconstructed to reproduce data and information associated with the indicium.

20. The semiconductor device package of claim 1 , wherein the plurality of indicium segments comprises at least four indicium segments.21 . The semiconductor device package of claim 1 , wherein at least two of the plurality of indicium segments have different surface areas.

22. The semiconductor device package of claim 1 , wherein at least two of the plurality of indicium segments are applied to a surface above at least two components of the plurality of components.

23. The semiconductor device package of claim 1 , wherein the casing comprises a mold material.

24. The semiconductor device package of claim 1 , wherein the indicium includes one of a part number, a serial number, a 1 -dimensional (linear) barcode (1 DID), a quick response code (QR code), a 2-dimensional barcode (2DID), a pattern, a mark, a letter, a number, a symbol, a trademark, a patent number, a model number, a company name, a logo, alot number, a die location, a tractability code (trace code), or a quantity code (Q code).

25. The semiconductor device package of claim 1 , wherein the plurality of components includes at least one of a discrete device including a resistor, a diode, or a capacitor; an integrated circuit (IC) including a control unit, a microprocessor, a memory device, an application specific IC (ASIC), a logic circuit, or an analog circuit; a radio frequency circuit; a radio frequency device including an antenna; and interconnect structures including wires, vias, or redistribution layers (RDLs).

26. A method of marking a semiconductor device package, comprising: receiving the semiconductor device package comprising: a substrate; a plurality of components mounted on the substrate; a casing covering the plurality of components, the casing having a top surface that encapsulates the plurality of components, wherein the top surface of the casing is a top surface of the semiconductor device package; identifying a plurality of markable patches over the top surface of the casing; applying a plurality of indicium segments of an indicium to corresponding ones of the plurality of markable patches; and wherein at least one markable patch of the plurality of markable patches includes a surface area that is above at least one component of the plurality of components.

27. The method of claim 26, wherein the at least one component of the plurality of components comprises a height that is in a range of 0.10 mm to 0.40 mm.

28. The method of claim 27, wherein a minimum thickness exists between the top surface of the casing and a top surface of the at least one component of the plurality of components, the minimum thickness is greater than a penetration depth of a laser device used to apply the plurality of indicium segments, and the penetration depth of the laser device is in a range of5 pm to 40 pm.

29. The method of claim 26, wherein the indicium is a two-dimensional data matrix having a minimum printable size that is in a range of 0.16 mm2to 4.0 mm2, and wherein each of the plurality of indicium segments is square or rectangular and has a surface area in a range of 1 .8 pm2to 16 mm2.

30. The method of claim 26, wherein each of the plurality of indicium segments is generated to include data and information associated with a non-overlapping portion of the indicium.31 . The method of claim 26, wherein the plurality of indicium segments are pictorial fragmentations of the indicium and are reconstructed to reproduce a picture associated with the indicium.

32. The method of claim 26, wherein the plurality of indicium segments are reconstructed to reproduce data and information associated with the indicium.

33. The method of claim 26, wherein the plurality of indicium segments comprises at least four indicium segments.

34. The method of claim 26, wherein at least two of the plurality of indicium segments have different surface areas.

35. The method of claim 26, wherein at least two of the plurality of indicium segments are applied to a surface above at least two components of the plurality of components.

36. The method of claim 26, wherein the casing comprises a mold material.

37. The method of claim 26, further comprising applying a quantity code (Q code) to a corresponding one of the plurality of markable patches.

38. The method of claim 37, further comprising applying a tractability code (trace code) to a corresponding one of the plurality of markable patches.

39. A system for marking a semiconductor device package, comprising: a user interface; a control unit; a memory device; a scanning device; a laser device; and wherein the control unit operates in conjunction with the user interface, the memory device, and the scanning device to receive the semiconductor device package comprising: a substrate; a plurality of components mounted on the substrate; a casing covering the plurality of components, the casing having a top surface that encapsulates the plurality of components, wherein the top surface of the casing is a top surface of the semiconductor device package; identifying a plurality of markable patches over the top surface; applying a plurality of indicium segments of an indicium to corresponding ones of the plurality of markable patches; andwherein at least one markable patch of the plurality of markable patches includes a surface area that is above at least one component of the plurality of components.

40. The system of claim 39, wherein a minimum thickness exists between the top surface of the casing and a top surface of the at least one component of the plurality of components, the minimum thickness is greater than a penetration depth of a laser device used to apply the plurality of indicium segments, and the penetration depth of the laser device is in a range of5 pm to 40 pm.41 . The system of claim 39, wherein the indicium is a two-dimensional data matrix having a minimum printable size that is in a range of 0.16 mm2to 4.0 mm2, and wherein each of the plurality of indicium segments is square or rectangular and has a surface area in a range of 1 .8 pm2to 16 mm2.

42. The system of claim 39, wherein a thickness of the casing is in a range of 200 pm to 600 pm, and wherein the top surface of the casing comprises a surface area that is in a range of 4.0 mm2to 144 mm2.

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