Display panel and manufacturing method therefor, and display device

Abstract

Provided in the embodiments of the present disclosure are a display panel and a manufacturing method therefor, and a display device. The display panel comprises a first substrate (1) and a second substrate (2) which are arranged in an oppositely aligned manner, wherein a liquid crystal (3) is filled between the first substrate (1) and the second substrate (2), the first substrate (1) and the second substrate (2) which are arranged in an oppositely aligned manner are provided with an active area (AA) and a border area (BB) surrounding the active area (AA), the border area (BB) is provided with a sealant (4) located between the first substrate (1) and the second substrate (2) and surrounding the active area (AA), and the sealant (4) is configured to seal the liquid crystal (3). The first substrate (1) is provided with a blocking structure (11), which is located between an area where the sealant (4) is located and the active area (AA) and which surrounds the active area (AA), in the border area (BB). The blocking structure (11) is configured to prevent the liquid crystal (3) from diffusing to the area where the sealant (4) is located, such that the liquid crystal (3) can be prevented from overflowing from the outer side of the sealant (4) away from the active area (AA), that is, the liquid crystal (3) is prevented from crossing the area where the sealant (4) is located.

Description

Display panel, manufacturing method thereof, and display device Technical Field

[0001] The present disclosure relates to the field of display technology, and in particular to a display panel, a manufacturing method thereof, and a display device. Background Art

[0002] Liquid crystal displays are currently common flat panel displays, among which thin film transistor liquid crystal displays are the mainstream products.

[0003] The liquid crystal display panel is a key component of liquid crystal displays (LCDs). Conventional technology uses an alignment process to align a color filter substrate with a first substrate to form the LCD panel. This process typically involves dripping liquid crystal onto the first substrate and applying a sealant to the color filter substrate to secure it. The first and color filter substrates are then aligned in a vacuum alignment device to form the LCD panel. A UV curing process then pre-cures the sealant. The LCD panel is then placed in a heating furnace to thermally cure the sealant.

[0004] Summary of the Invention

[0005] The present disclosure provides a display panel, a manufacturing method thereof, and a display device. The specific solutions are as follows:

[0006] A display panel provided by an embodiment of the present disclosure includes a first substrate and a second substrate arranged in a cell-like manner, wherein liquid crystal is filled between the first substrate and the second substrate, the first substrate and the second substrate arranged in a cell-like manner having a display area and a peripheral area surrounding the display area, the peripheral area being provided with a frame sealant located between the first substrate and the second substrate and surrounding the display area, the frame sealant being used to seal the liquid crystal; wherein:

[0007] The first substrate is provided with a blocking structure in the peripheral area, which is located between the area where the frame sealing glue is located and the display area and surrounds the display area. The blocking structure is used to prevent the liquid crystal from overflowing the frame sealing glue away from the outside of the display area when dripping onto the first substrate.

[0008] In a possible implementation, in the display panel provided in the embodiment of the present disclosure, the number of the blocking structure is one;

[0009] Alternatively, the number of the blocking structures is at least two, and at least two blocking structures are spaced apart and sleeved between the frame sealant and the display area.

[0010] In a possible implementation, in the display panel provided in an embodiment of the present disclosure, the blocking structure is a protruding structure in which a surface of the first substrate corresponding to the peripheral area protrudes from a surface corresponding to the display area.

[0011] In a possible implementation, in the display panel provided in the embodiment of the present disclosure, the first substrate includes: a base substrate, and a plurality of film layers stacked sequentially on a side of the base substrate facing the liquid crystal; wherein,

[0012] The first substrate further includes a first organic insulating layer in the peripheral area, which is arranged on the side of any one of the multiple film layers facing the liquid crystal. The first organic insulating layer is an internal film layer of the protruding structure, and the first organic insulating layer makes the surface of the first substrate corresponding to the peripheral area protrude from the surface corresponding to the display area.

[0013] In a possible implementation, in the display panel provided in an embodiment of the present disclosure, the first organic insulating layer is a closed structure disposed around the display area.

[0014] In a possible implementation, in the above-mentioned display panel provided in an embodiment of the present disclosure, the first organic insulating layer is arranged around the display area, the first organic insulating layer has a long side and a short side, and at least one opening that disconnects the first organic insulating layer is provided at least at the short side.

[0015] In a possible implementation, in the display panel provided by an embodiment of the present disclosure, each side of the first organic insulating layer has a plurality of openings that disconnect the first organic insulating layer.

[0016] In a possible implementation, in the display panel provided in an embodiment of the present disclosure, the blocking structure is a closed groove in which a surface of the first substrate corresponding to the peripheral area is recessed from a surface corresponding to the display area.

[0017] In a possible implementation, in the display panel provided in an embodiment of the present disclosure, the first substrate includes: a base substrate, and at least two inorganic insulating layers stacked in sequence on a side of the base substrate facing the liquid crystal;

[0018] At least one of the at least two inorganic insulating layers has a closed through groove at the location of the closed trench.

[0019] In a possible implementation, in the display panel provided in an embodiment of the present disclosure, the number of the closed groove is one, and any one of the at least two inorganic insulating layers has a closed through groove at the location of the closed groove.

[0020] In a possible implementation, in the display panel provided in an embodiment of the present disclosure, the number of the closed groove is one, and each of the at least two inorganic insulating layers has a closed through groove at the location of the closed groove.

[0021] In a possible implementation, in the display panel provided in an embodiment of the present disclosure, the number of the closed grooves is at least two, and any one of the at least two inorganic insulating layers has a closed through groove corresponding one-to-one to the closed groove.

[0022] In a possible implementation, in the display panel provided in the embodiment of the present disclosure, the number of the closed grooves is the same as the number of the inorganic insulating layers, and each of the inorganic insulating layers has a closed through groove corresponding to one of the closed grooves.

[0023] In a possible implementation, in the display panel provided in an embodiment of the present disclosure, the first substrate includes: a base substrate, at least two inorganic insulating layers stacked in sequence on a side of the base substrate facing the liquid crystal, and a second organic insulating layer disposed between two adjacent inorganic insulating layers;

[0024] At least the second organic insulating layer has a closed through groove at the location of the closed trench.

[0025] In a possible implementation, in the display panel provided in an embodiment of the present disclosure, the number of the closed groove is at least one, and the second organic insulating layer has closed through grooves corresponding one-to-one to the closed grooves.

[0026] In one possible implementation, in the above-mentioned display panel provided in an embodiment of the present disclosure, the number of the closed grooves is at least two, one of the closed grooves is formed by setting a closed through groove on the second organic insulating layer, and the remaining closed grooves are formed by setting a closed through groove in at least one of the at least two inorganic insulating layers.

[0027] In one possible implementation, in the above-mentioned display panel provided in an embodiment of the present disclosure, the number of the closed grooves is the same as the sum of the number of the inorganic insulating layers and the second organic insulating layers, and the second organic insulating layer and each of the inorganic insulating layers respectively have a closed through groove corresponding to one of the closed grooves.

[0028] In a possible implementation, in the display panel provided by an embodiment of the present disclosure, the number of the closed grooves is at least two, and each of the closed grooves is formed by providing a closed through groove on the same insulating layer, and the distance between two adjacent blocking structures is greater than 2 μm;

[0029] The number of the closed grooves is at least two, and each of the closed grooves is formed by providing a closed through groove on a different insulating layer, and the distance between two adjacent blocking structures is greater than 5 μm.

[0030] In a possible implementation, in the above-mentioned display panel provided in the embodiment of the present disclosure, the distance between the blocking structure closest to the display area and the display area is 100μm to 300μm, and the distance between the blocking structure closest to the frame sealing glue and the frame sealing glue is 200μm to 250μm.

[0031] In a possible implementation, in the display panel provided in an embodiment of the present disclosure, the first substrate is an array substrate, and the second substrate is an opposing substrate.

[0032] Correspondingly, an embodiment of the present disclosure further provides a display device, comprising any one of the above-mentioned display panels provided by the embodiment of the present disclosure.

[0033] Accordingly, an embodiment of the present disclosure further provides a method for manufacturing a display panel, comprising:

[0034] forming a second substrate;

[0035] Applying a frame sealing material surrounding the display area at a position corresponding to the peripheral area of ​​the second substrate;

[0036] A first substrate is formed; wherein the first substrate is provided with a blocking structure corresponding to the peripheral area, which is located between the area where the frame sealant is located and the display area and surrounds the display area;

[0037] dripping liquid crystal into the blocking structure of the first substrate; the blocking structure is used to prevent the liquid crystal from overflowing from the area corresponding to the frame sealant material and away from the outside of the display area when dripping onto the first substrate;

[0038] The second substrate and the first substrate are assembled into a cell, and the frame-sealing glue material is cured to form a frame-sealing glue for sealing the liquid crystal. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] FIG1 is a schematic diagram of a planar structure of a display panel provided by an embodiment of the present disclosure;

[0040] FIG2 is a schematic diagram of a planar structure of another display panel provided in an embodiment of the present disclosure;

[0041] FIG3 is a schematic diagram of a planar structure of another display panel provided in an embodiment of the present disclosure;

[0042] FIG4 is a schematic cross-sectional view of the display panel shown in FIG1 to FIG3 ;

[0043] FIG5 is a schematic diagram of a planar structure of another display panel provided in an embodiment of the present disclosure;

[0044] FIG6 is a schematic cross-sectional view of the display panel shown in FIG5 ;

[0045] FIG7 is a schematic diagram of a planar structure of another display panel provided in an embodiment of the present disclosure;

[0046] FIG8 is a schematic cross-sectional structure diagram corresponding to the display panel shown in FIG7 ;

[0047] FIG9 is a schematic diagram of another cross-sectional structure corresponding to the display panel shown in FIG7 ;

[0048] FIG10 is a schematic diagram of another cross-sectional structure corresponding to the display panel shown in FIG7 ;

[0049] FIG11 is a schematic diagram of a specific structure of the first substrate shown in FIG4 ;

[0050] FIG12 is a schematic diagram of another specific structure of the first substrate shown in FIG4 ;

[0051] FIG13 is a schematic diagram of a specific structure of the first substrate shown in FIG6 ;

[0052] FIG14 is a schematic diagram of another specific structure of the first substrate shown in FIG6 ;

[0053] FIG15 is a schematic diagram of another specific structure of the first substrate shown in FIG6 ;

[0054] FIG16 is a schematic diagram of another specific structure of the first substrate shown in FIG6 ;

[0055] FIG17 is a schematic diagram of a specific structure of the first substrate shown in FIG8 ;

[0056] FIG18 is a schematic diagram of another specific structure of the first substrate shown in FIG9 ;

[0057] FIG19 is a schematic diagram of a specific structure of the first substrate shown in FIG10 ;

[0058] FIG20 is a schematic diagram of another specific structure of the first substrate shown in FIG10 ;

[0059] FIG21 is a schematic flow chart of a method for manufacturing a display panel according to an embodiment of the present disclosure;

[0060] 22A to 22G are schematic structural diagrams of a method for manufacturing a display panel provided by an embodiment of the present disclosure after executing each step;

[0061] FIG23 is a schematic structural diagram of a display device provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0062] In order to make the purpose, technical solutions and advantages of the embodiments of the present disclosure clearer, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings of the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. And in the absence of conflict, the embodiments in the present disclosure and the features in the embodiments can be combined with each other. Based on the described embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.

[0063] Unless otherwise defined, the technical or scientific terms used in this disclosure shall have the usual meanings understood by persons of ordinary skill in the field to which this disclosure belongs. The words “include” or “comprise” and the like used in this disclosure mean that the elements or objects preceding the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects. The words “connect” or “connected” and the like are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. “Inside”, “outside”, “upper”, “lower”, etc. are only used to indicate relative positional relationships. When the absolute position of the object being described changes, the relative positional relationship may also change accordingly.

[0064] It should be noted that the sizes and shapes of the figures in the accompanying drawings do not reflect the actual scale and are only for the purpose of illustrating the present disclosure. The same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions.

[0065] With the continuous development of liquid crystal display technology, users have increasingly higher requirements not only for the performance of liquid crystal displays, but also for their size. In particular, small and even ultra-small liquid crystal displays have become increasingly popular in recent years due to their portability. However, when using the liquid crystal drop-in process for small-sized liquid crystal displays (e.g., 0.4-inch to 0.8-inch), there is a problem of poor liquid crystal diffusion (NG). For example, on a 5th generation line glass substrate (with a size of 1300*1100), the number of panels (e.g., 0.42-inch) is more than 10,000. The liquid crystal is generally drop-injected onto the first substrate, and the frame sealant is generally applied to the color filter substrate before the assembly is completed. Due to certain requirements for the minimum drop amount of liquid crystal and the limitation of panel size, after the liquid crystal on all panels is completely dripped, the liquid crystal that was first dripped has spread beyond the width of the corresponding frame sealant area. As a result, when the color filter substrate and the first substrate are assembled, the liquid crystal diffuses outside the corresponding frame sealant area, making it impossible to successfully assemble the color filter substrate with the first substrate.

[0066] In view of this, in order to solve the problem that a small-sized liquid crystal display cannot be successfully aligned due to the diffusion of liquid crystal to the outside of the corresponding area of ​​the frame glue during liquid crystal dripping, an embodiment of the present disclosure provides a display panel, as shown in Figures 1 to 10, Figures 1 to 3, Figures 5 and 7 are respectively schematic diagrams of the planar structures of several display panels provided in the embodiments of the present disclosure, Figure 4 is a schematic diagram of the cross-sectional structure corresponding to the display panels shown in Figures 1 to 3, Figure 6 is a schematic diagram of the cross-sectional structure corresponding to the display panel shown in Figure 5, and Figures 8 to 10 are schematic diagrams of several cross-sectional structures corresponding to the display panel shown in Figure 7, respectively. The display panel includes a first substrate 1 and a second substrate 2 arranged in an aligned manner, and liquid crystal 3 is filled between the first substrate 1 and the second substrate 2. The first substrate 1 and the second substrate 2 arranged in the aligned manner have a display area AA and a peripheral area BB surrounding the display area AA, and the peripheral area BB is provided with a frame glue 4 located between the first substrate 1 and the second substrate 2 and surrounding the display area AA, and the frame glue 4 is used to seal the liquid crystal 3; wherein,

[0067] The first substrate 1 is provided with a blocking structure 11 in the peripheral area BB, which is located between the area where the frame sealant 4 is located and the display area AA and surrounds the display area AA. The blocking structure 11 is used to prevent the liquid crystal 3 from overflowing the frame sealant 4 away from the outside of the display area AA when dripping onto the first substrate 1.

[0068] In the display panel provided by the embodiment of the present disclosure, a blocking structure is provided in the peripheral area of ​​the first substrate, which is located between the frame sealant and the display area and surrounds the display area. In this way, when liquid crystal is dripped onto the first substrate, the blocking structure can prevent the liquid crystal from diffusing to the area where the frame sealant is located, thereby preventing the liquid crystal from overflowing the frame sealant away from the outside of the display area, that is, preventing the liquid crystal from crossing the area where the frame sealant is located. Therefore, the present disclosure can avoid the problem of the first substrate and the second substrate being unable to be successfully assembled due to the liquid crystal diffusing to the outside of the area corresponding to the frame sealant during liquid crystal dripping.

[0069] Optionally, the first substrate in the disclosed embodiment may be an array substrate, and the second substrate may be an opposing substrate, for example, a color filter substrate (CF) having a color filter and a black matrix. Before the first and second substrates are aligned, a sealant may be applied to the peripheral area of ​​the second substrate (color filter substrate), and liquid crystal may be dripped into the display area of ​​the first substrate (array substrate).

[0070] Of course, in the disclosed embodiments, the first substrate can be a color filter substrate having a color filter and a black matrix, and the second substrate can be an array substrate. Before the first and second substrates are aligned, a sealant can be applied to the peripheral area of ​​the second substrate (array substrate), and liquid crystal can be dripped into the display area of ​​the first substrate (color filter substrate).

[0071] In the embodiment of the present disclosure, the first substrate is an array substrate, the second substrate is a color filter substrate, and before the first substrate and the second substrate are assembled, a sealing glue is applied on the peripheral area of ​​the second substrate, and liquid crystal is dripped on the display area of ​​the first substrate.

[0072] Specifically, before the first and second substrates are aligned, the frame sealant in the disclosed embodiment is a ring-shaped structure disposed on the second substrate. Specifically, silicon spheres are disposed within the frame sealant as supports to effectively support the first and second substrates. Optionally, the diameter of the silicon spheres is in the range of 3μm to 5μm, and the width of the frame sealant is generally around 800μm.

[0073] In a specific implementation, in the above-mentioned display panel provided in the embodiment of the present disclosure, as shown in Figures 1 to 6, the number of the blocking structure 11 can be one, that is, a circle of blocking structures 11 is set around the display area AA at a certain distance from the display area AA, so that when the liquid crystal is dripped on the first substrate 1, the excess liquid crystal 3 can be prevented from flowing to the area where the frame sealing glue 4 is located; as shown in Figures 7 to 10, the number of the blocking structures 11 is at least two (taking two as an example), and at least two blocking structures 11 are spaced apart and arranged between the frame sealing glue 4 and the display area AA, so that the at least two blocking structures 11 can increase the capacity of blocking the liquid crystal 3, and further prevent excess liquid crystal 3 from flowing to the area where the frame sealing glue 4 is located.

[0074] In a specific implementation, in the above-mentioned display panel provided by the embodiment of the present disclosure, as shown in Figures 11 to 20, Figures 11 and 12 are two specific structural schematic diagrams of the first substrate 1 in Figure 4, Figures 13 to 16 are four specific structural schematic diagrams of the first substrate 1 in Figure 6, Figure 17 is a specific structural schematic diagram of the first substrate 1 in Figure 8, Figure 18 is a specific structural schematic diagram of the first substrate 1 in Figure 9, and Figures 19 and 20 are two specific structural schematic diagrams of the first substrate 1 in Figure 10, respectively. The first substrate 1 includes a base substrate 12, and the display area AA corresponding to the base substrate 12 is divided into a plurality of pixel units arranged in an array. Figures 11 to 20 only illustrate a cross-sectional schematic diagram of one of the pixel units. Each pixel unit of the first substrate 1 includes a pixel circuit arranged on the side of the base substrate 12 facing the liquid crystal 3 and a pixel electrode 13 electrically connected to the pixel circuit. The first substrate 1 also includes a common electrode 14 arranged on the side of the pixel circuit and the pixel electrode 13 facing the liquid crystal 3; wherein the pixel circuit includes a thin film transistor (Thin Film Transistor, abbreviated as TFT), the TFT includes a gate G, an active layer Act, a source S and a drain D, the drain D of the TFT is electrically connected to the corresponding pixel electrode 13, the gate G of the TFT is connected to the gate line (not shown), and the source S of the TFT is electrically connected to the data line (not shown). The gate line can be set corresponding to the pixel row, and the gate of the TFT of the pixel unit in the same pixel row is connected to the same gate line. The data line can be set corresponding to the pixel column, and optionally, the source of the TFT of the pixel unit in the same pixel column is connected to the same data line. Optionally, the pixel electrode 13 and the common electrode 14 are both transparent conductive layers, such as an ITO layer.

[0075] Specifically, as shown in FIG. 11 to FIG. 20 , the first substrate 1 further includes: a gate insulating layer GI disposed between the gate G and the active layer Act, and a passivation layer PVX disposed between the source S, the drain D and the common electrode 14 .

[0076] Optionally, as shown in Figures 11 to 20, the embodiment of the present disclosure takes the example in which the source S and the drain D are arranged above the active layer Act and are in direct contact and electrical connection with the active layer Act; as shown in Figures 11, 13, 14, 15, 17 to 20, the embodiment of the present disclosure takes the example in which the pixel electrode 13 is arranged below the drain D and the drain D is in direct contact and electrical connection with the pixel electrode 13; as shown in Figure 12, the embodiment of the present disclosure takes the example in which the pixel electrode 13 is arranged above the drain D and the drain D is in direct contact and electrical connection with the pixel electrode 13; as shown in Figure 16, the embodiment of the present disclosure takes the example in which the pixel electrode 13 is arranged above the drain D and the drain D is electrically connected to the pixel electrode 13 through a via; of course, it is not limited to this. For example, the TFT structure and the connection method of the pixel electrode 13 in the embodiment of the present disclosure are applicable to all TFT structures and connection methods with the pixel electrode 13 in the related art.

[0077] In a specific implementation, in the display panel provided in the embodiments of the present disclosure, as shown in Figures 1-4, 11, and 12, the blocking structure 11 can be a raised structure protruding from the surface of the first substrate 1 corresponding to the peripheral area BB beyond the surface corresponding to the display area AA. In this way, when liquid crystal is dripped onto the first substrate 1, the raised structure can limit the flow range of the liquid crystal 3, preventing the liquid crystal 3 from diffusing outside the area where the frame sealant 4 is located and affecting the alignment process, thereby preventing unsuccessful alignment of the first substrate 1 and the second substrate 2.

[0078] Optionally, the maximum height of the blocking structure 11 can be made to be 2.5μm to 4μm. The height of the blocking structure 11 can be adjusted according to the size of the display panel and the amount of liquid crystal dripped. If the display panel size is small, the liquid crystal will still diffuse to the outside of the frame sealant 4 when the minimum amount of liquid crystal is dripped, and a higher blocking structure 11 is required; on the contrary, if the display panel size is large, the capacity of the liquid crystal to diffuse out of the outside of the frame sealant 4 when dripping is small, and a blocking structure 11 of a certain height is required.

[0079] In a specific implementation, in the above-mentioned display panel provided by the embodiment of the present disclosure, as shown in FIG11 and FIG12 , the first substrate 1 includes: a base substrate 12, and a plurality of film layers (such as the film layer where the gate G is located, the gate insulating layer GI, the active layer Act, the film layer where the pixel electrode 13 is located, the film layer where the source S and the drain D are located, the passivation layer PVX, and the film layer where the common electrode 14 is located) stacked in sequence on the side of the base substrate 12 facing the liquid crystal 3; wherein,

[0080] The first substrate 1 further includes a first organic insulating layer 15 in the peripheral area BB, which is arranged on the side of any one of the multiple film layers facing the liquid crystal 3. The first organic insulating layer 15 is an internal film layer with a raised structure, and the first organic insulating layer 15 makes the surface of the first substrate 1 corresponding to the peripheral area BB protrude from the surface corresponding to the display area AA.

[0081] Alternatively, as shown in FIG11 , the first organic insulating layer 15 can be fabricated after the common electrode 14 is fabricated. Specifically, a full layer of resin material can be applied to the side of the common electrode 14 facing the liquid crystal 3. This full layer of resin material is then patterned using a photolithography process, removing the resin material from the display area AA. This creates a first organic insulating layer 15 in the peripheral area BB, located between the area where the frame sealant 4 is located and the display area AA. The first organic insulating layer 15 is a raised structure. In the present disclosure, by fabricating the blocking structure 11 using a resin material on the side of the common electrode 14 facing the liquid crystal 3, only one mask needs to be added, and the other structures of the first substrate 1 remain unchanged, resulting in a simpler fabrication process.

[0082] Optionally, as shown in FIG12 , the first organic insulating layer 15 can be formed after the source S and the drain D and before the pixel electrode 13. Specifically, a whole layer of resin material can be applied to the side of the source S and the drain D facing the liquid crystal 3. Then, the whole layer of resin material is patterned by a photolithography process, and the resin material in the display area AA is removed to form a first organic insulating layer 15 located between the area where the frame sealant 4 is located and the display area AA in the peripheral area BB. Then, the pixel electrode 13, the passivation layer PVX and the common electrode 14 are sequentially formed, so that the passivation layer PVX forms a raised structure above the first organic insulating layer 15, that is, the first organic insulating layer 15 is an internal film layer of the raised structure formed by the passivation layer PVX. The present disclosure uses a resin material to form the blocking structure 11 before the source S, the drain D and the pixel electrode 13. In this way, only one mask needs to be added, and the other structures of the first substrate 1 do not need to be changed, and the manufacturing process is also relatively simple.

[0083] In a specific implementation, in the above-mentioned display panel provided in the embodiment of the present disclosure, as shown in Figures 1, 11 and 12, the first organic insulating layer 15 can be a closed structure arranged around the display area AA, so that the blocking structure 11 is a fully closed structure arranged around the display area AA.

[0084] In specific implementations, the fully enclosed annular barrier structure 11 shown in FIG1 can hinder the flow of liquid crystal, potentially causing problems such as "not fill" and "bubble." To avoid this problem, in the display panel provided in the embodiments of the present disclosure, as shown in FIG2 , FIG11 , and FIG12 , a first organic insulating layer 15 is disposed around the display area AA. The first organic insulating layer 15 has long and short sides, and at least one opening H is provided at least on the short side, disconnecting the first organic insulating layer 15. Thus, the barrier structure 11 has at least one opening H at least on the short side. By properly controlling the size of the opening H, the liquid crystal can be allowed to fully flow and fill the display area AA, while ensuring that the amount of liquid crystal flowing out of the barrier structure 11 through the opening H has no impact on the cell alignment process.

[0085] In practice, to further uniformly flow the liquid crystal, in the display panel provided in the embodiments of the present disclosure, as shown in Figures 3, 11, and 12, each side of the first organic insulating layer 15 has multiple openings H that interrupt the first organic insulating layer 15. Thus, each side of the barrier structure 11 has multiple openings H spaced apart. The spaced openings H can ensure more uniform liquid crystal flow. Optionally, the size of the openings H can be adjusted based on the size of the upper, lower, left, and right borders of the display area AA. For example, the barrier structure 11 corresponding to the smaller border can have fewer or no openings, while the barrier structure 11 corresponding to the larger border can have more or larger openings.

[0086] It should be noted that the blocking structure 11 shown in Figures 2 and 3 is provided with an opening H, so that the liquid crystal will flow to the frame sealant 4 through the opening H. Due to the blocking effect of the blocking structure 11, even if the opening H is provided, the liquid crystal will not pass through the frame sealant 4 and affect the box alignment.

[0087] In a specific implementation, in the display panel provided in the embodiments of the present disclosure, as shown in Figures 5-10 and 13-20, the blocking structure 11 is a closed groove recessed from the surface of the first substrate 1 corresponding to the peripheral area BB into the surface corresponding to the display area AA. By providing the closed groove surrounding the display area AA at a predetermined distance from the display area AA, when the liquid crystal 3 is dripped onto the first substrate 1, excess liquid crystal 3 can flow into the groove, thereby preventing excess liquid crystal 3 from flowing outside the area where the frame sealant 4 is located. Furthermore, because the groove is at a predetermined distance from the display area AA, it does not affect the liquid crystal orientation in the display area AA.

[0088] In a specific implementation, in the display panel provided in the embodiment of the present disclosure, as shown in FIG13 to FIG15 and FIG17 to FIG20 , the first substrate 1 includes: a base substrate 12, and at least two inorganic insulating layers (such as the gate insulating layer GI and the passivation layer PVX described above) stacked in sequence on the side of the base substrate 12 facing the liquid crystal 3;

[0089] At least one of the at least two inorganic insulating layers (the gate insulating layer GI and the passivation layer PVX) has a closed through-groove V at the location of the closed groove. Thus, when manufacturing the gate insulating layer GI and the passivation layer PVX, it is only necessary to use the original mask to manufacture the corresponding closed through-groove V on the corresponding inorganic insulating layer, thereby forming a corresponding closed groove (i.e., the blocking structure 11) on the first substrate 1 at the location of the closed through-groove V. Therefore, the present disclosure does not require a separate mask for manufacturing the closed groove, thereby not increasing the complexity of the manufacturing process.

[0090] In specific implementation, in the above-mentioned display panel provided by the embodiment of the present disclosure, the gate insulating layer GI or the passivation layer PVX can be used alone to form at least one closed through-groove V, the thickness of the passivation layer PVX is generally 0.25μm to 0.6μm, so that the thickness of the closed groove is 0.25μm to 0.6μm, and the thickness of the gate insulating layer GI is generally 0.35μm to 0.4μm, so that the thickness of the closed groove is 0.35μm to 0.4μm; or the gate insulating layer GI and the passivation layer PVX are combined to form inner and outer closed through-grooves V, so that the thickness of one of the closed grooves is 0.25μm to 0.6μm, and the thickness of the other closed groove is 0.35μm to 0.4μm; or the gate insulating layer GI and the passivation layer PVX are combined to form a stacked closed through-groove V with overlapping orthographic projections, so that the depth of the closed groove can be increased to 0.6 to 1μm.

[0091] In a specific implementation, in the display panel provided by the embodiment of the present disclosure, as shown in FIG13 , FIG13 is a cross-sectional schematic diagram of a closed through-groove V formed solely on the passivation layer PVX. The number of closed grooves (i.e., blocking structures 11) is one, and any one of the at least two inorganic insulating layers (gate insulating layer GI and passivation layer PVX) (e.g., the passivation layer PVX) has a closed through-groove V at the location of the closed groove (i.e., blocking structures 11). The closed through-groove V formed on the passivation layer PVX is the blocking structure 11. As shown in FIG14 , FIG14 is a cross-sectional schematic diagram of a closed through-groove V formed solely on the gate insulating layer GI. The number of closed through-groove (i.e., blocking structures 11) is one, and any one of the at least two inorganic insulating layers (gate insulating layer GI and passivation layer PVX) (e.g., the gate insulating layer GI) has a closed through-groove V at the location of the closed groove (i.e., blocking structures 11). Thus, when the passivation layer PVX is fabricated, the passivation layer PVX forms a closed through-groove (i.e., blocking structures 11) at the closed through-groove V.

[0092] In a specific implementation, in the above-mentioned display panel provided by the embodiment of the present disclosure, as shown in Figure 15, Figure 15 is a cross-sectional schematic diagram of a closed through-groove V with overlapping orthographic projections formed on the gate insulating layer GI and the passivation layer PVX, the number of the closed groove (i.e., the blocking structure 11) is one, and each of the at least two inorganic insulating layers (the gate insulating layer GI and the passivation layer PVX) has a closed through-groove V at the position where the closed groove (i.e., the blocking structure 11) is located. In this way, a stacked closed through-groove V with overlapping orthographic projections is formed on the gate insulating layer GI and the passivation layer PVX, so that the depth of the finally formed closed groove (i.e., the blocking structure 11) is the sum of the thicknesses of the gate insulating layer GI and the passivation layer PVX, which can increase the liquid crystal capacity of the closed groove and further prevent excess liquid crystal from overflowing to the outside of the area where the frame sealant 4 is located.

[0093] In a specific implementation, in the display panel provided in the embodiment of the present disclosure, as shown in Figures 17 and 18 , the number of closed trenches (i.e., blocking structures 11) is the same as the number of inorganic insulating layers (gate insulating layer GI and passivation layer PVX), that is, there are two closed trenches (i.e., blocking structures 11), and each inorganic insulating layer has a closed through-groove V corresponding to one of the closed trenches (i.e., blocking structures 11). Specifically, the structures shown in Figures 17 and 18 each form a closed through-groove V on the passivation layer PVX and the gate insulating layer GI. In Figure 17 , the closed through-groove V formed on the passivation layer PVX is closer to the display area AA, while the closed through-groove V formed on the gate insulating layer GI is closer to the display area AA in Figure 18 . In this way, the passivation layer PVX and the gate insulating layer GI can be used to form a double inner and outer trench, thereby increasing the capacity of the trench liquid crystal and diffusing excess liquid crystal into the trench for storage to prevent overflow.

[0094] In a specific implementation, in the above-mentioned display panel provided in the embodiment of the present disclosure, as shown in Figures 19 and 20, the number of closed grooves (i.e., blocking structures 11) is at least two, and any one of the at least two inorganic insulating layers (passivation layer PVX and gate insulating layer GI) has a closed through-groove V that corresponds one-to-one with the closed groove (i.e., blocking structure 11). Specifically, as shown in Figure 19, the passivation layer PVX has a closed through-groove V that corresponds one-to-one with the closed groove (i.e., blocking structure 11); as shown in Figure 20, the gate insulating layer GI has a closed through-groove V that corresponds one-to-one with the closed groove (i.e., blocking structure 11); that is, the same inorganic insulating layer can be used to form inner and outer double grooves, thereby increasing the liquid crystal capacity of the grooves and diffusing excess liquid crystal into the grooves for storage to prevent overflow.

[0095] In a specific implementation, since the thickness of inorganic insulating layers such as the gate insulating layer GI and the passivation layer PVX is generally thin, the depth of the closed through-groove V formed on each inorganic insulating layer is also relatively shallow. Even if the closed through-grooves V are stacked and overlapped as shown in FIG15 , the depth of the closed groove is only increased to 0.6 to 1 μm. If the size of the display panel is very small and the liquid crystal droplet injection accuracy is insufficient, more liquid crystal will diffuse outside the area where the frame sealant 4 is located. In this case, a deeper groove is required to store more liquid crystal. Therefore, in the above-mentioned display panel provided in the embodiment of the present disclosure, as shown in FIG16 , the first substrate 1 includes: a base substrate 12, at least two inorganic insulating layers (such as the gate insulating layer GI and the passivation layer PVX described above) stacked in sequence on the side of the base substrate 12 facing the liquid crystal 3, and a second organic insulating layer 16 disposed between the two adjacent inorganic insulating layers;

[0096] At least the second organic insulating layer 16 has a closed through-groove V at the location of the closed groove (i.e., the blocking structure 11). Specifically, the material of the second organic insulating layer 16 can be resin. The thickness of the second organic insulating layer 16 is relatively thick, generally ranging from 2.5 μm to 4 μm. In this way, the depth of the closed groove (i.e., the blocking structure 11) can reach 2.5 μm to 4 μm, thereby accommodating more liquid crystal.

[0097] In specific implementation, in the above-mentioned display panel provided in the embodiment of the present disclosure, the second organic insulating layer 16 can be used alone to form at least one closed through groove V, or the second organic insulating layer 16 + passivation layer PVX, the second organic insulating layer 16 + gate insulating layer GI can be used to form inner and outer grooves, or the second organic insulating layer 16 + passivation layer PVX + gate insulating layer GI can be used to form three circles of closed grooves from the inside to the outside. The more grooves there are, the greater the liquid crystal storage capacity.

[0098] In a specific implementation, in the above-mentioned display panel provided in the embodiment of the present disclosure, as shown in Figure 16, the number of closed grooves (i.e., blocking structures 11) is at least one (taking one as an example), and the second organic insulating layer 16 has closed through-grooves V corresponding one to one to the closed grooves (i.e., blocking structures 11), so that when the passivation layer PVX is formed, the passivation layer PVX forms a corresponding closed groove (i.e., blocking structure 11) at the position of the closed through-grooves V.

[0099] In a specific implementation, in the above-mentioned display panel provided by the embodiment of the present disclosure, the number of closed grooves (i.e., blocking structures) is at least two (taking two as an example), one of which is formed by providing a closed through-groove on the second organic insulating layer, and the remaining closed grooves are formed by providing a closed through-groove on at least one of the at least two inorganic insulating layers (passivation layer and gate insulating layer). Specifically, one of the closed grooves can be formed by providing a closed through-groove on the second organic insulating layer, and the other closed groove can be formed by providing a closed through-groove on the passivation layer, that is, the second organic insulating layer + passivation layer are used to form two circles of closed grooves from the inside out, and the position of each closed through-groove is not limited, as long as the two closed through-grooves are spaced and arranged between the frame sealant and the display area; or one of the closed grooves can be formed by providing a closed through-groove on the second organic insulating layer, and the other closed groove can be formed by providing a closed through-groove on the gate insulating layer, that is, the second organic insulating layer + gate insulating layer are used to form two circles of closed grooves from the inside out, and the position of each closed through-groove is not limited, as long as the two closed through-grooves are spaced and arranged between the frame sealant and the display area.

[0100] In specific implementations, in the display panel provided by the embodiments of the present disclosure, the number of closed grooves (i.e., blocking structures) is equal to the sum of the number of inorganic insulating layers (passivation layer and gate insulating layer) and the second organic insulating layer, i.e., the number of closed grooves (i.e., blocking structures) is three. The second organic insulating layer and each inorganic insulating layer (passivation layer and gate insulating layer) each have a closed through-groove corresponding to one of the closed grooves. In other words, three circles of closed grooves are formed from the inside out using the second organic insulating layer + passivation layer + gate insulating layer. The position of each closed through-groove is not limited, as long as the three closed through-grooves are spaced and arranged between the frame sealant and the display area.

[0101] It should be noted that Figures 13 to 20 provided in the embodiments of the present disclosure are several of the settings of the closed grooves (i.e., the blocking structure 11) listed in the present disclosure. Of course, it is not limited to this. The closed grooves can use GI, PVX or a second organic insulating layer to make at least one closed groove separately, or combine two to form inner and outer grooves, or combine the three to form three grooves from the inside to the outside.

[0102] In a specific implementation, in the display panel provided in the embodiment of the present disclosure, as shown in FIG19 and FIG20 , there are at least two closed grooves (i.e., blocking structures 11), and each closed groove is formed by providing a closed through-groove V on the same insulating layer. The spacing between the grooves must ensure that the grooves are not connected (two grooves connected together become a single groove), and the spacing between two grooves in the same layer must be greater than the equipment tolerance. Generally, the equipment tolerance of through holes is 2.0 μm. Therefore, the distance between two adjacent blocking structures 11 is greater than 2 μm.

[0103] As shown in FIG17 and FIG18, the number of closed trenches (i.e., blocking structures 11) is at least two, and each closed trench is formed by setting a closed through-groove V on a different insulating layer. In addition to considering the device tolerance, the overlay tolerance of each insulating layer to the film layer where the gate G is located must also be considered. The calculation formula is: Among them, 1.5 is the overlay tolerance of each insulating layer to the film layer where the gate G is located, 2 is the device tolerance, and dividing by 2 means one side, Therefore, the distance between the two layers of grooves can be set to be greater than 5 μm, that is, the distance between two adjacent blocking structures 11 is greater than 5 μm.

[0104] In specific implementations, in the display panel provided by the embodiments of the present disclosure, as shown in Figures 1-20, if the distance between the barrier structure 11 and the display area AA is too close, the PI (alignment layer, described later) of the display area AA may accumulate at the barrier structure 11, causing abnormal initial liquid crystal alignment. Therefore, to prevent PI mura, the distance between the barrier structure 11 closest to the display area AA and the display area AA may be 100 μm to 300 μm. Alternatively, if the distance between the barrier structure 11 and the frame sealant 4 is too close, the frame sealant 4 may "climb the wall," i.e., the frame sealant 4 may fluctuate above the barrier structure 11 during coating, causing the BB box thickness in the peripheral area of ​​the display panel to be too high and yellow. Therefore, to prevent this phenomenon from occurring, the distance between the barrier structure 11 closest to the frame sealant 4 and the frame sealant 4 may be 200 μm to 250 μm.

[0105] In a specific implementation, in the above-mentioned display panel provided in the embodiment of the present disclosure, as shown in Figures 1 to 3, 5 and 7, the shape of the blocking structure 11 can be adjusted according to the shape of the display area AA. For example, in the embodiment of the present disclosure, if the shape of the display area AA is square, then the shape of the blocking structure 11 is square; for example, if the shape of the display area AA is circular, then the shape of the blocking structure 11 is circular; for example, if the shape of the display area AA is irregular, then the shape of the blocking structure is irregular.

[0106] During specific implementation, in the above-mentioned display panel provided by the embodiment of the present disclosure, as shown in Figures 4, 6, 8-10, in order to provide support between the first substrate 1 and the second substrate 2 after the cell is aligned, it is often necessary to make a spacer (PS) that plays a supporting role. Optionally, the spacer (PS) can be made on the side of the second substrate 2 facing the first substrate 1. The spacer (PS) generally includes a main spacer (Main PS, MPS for short) with a larger height and a supplementary spacer (Sub PS) with a smaller height. The main spacer (MPS) plays the main supporting role, that is, the main spacer (MPS) is mainly used to maintain the gap between the first substrate 1 and the second substrate 2; the supplementary spacer (Sub PS) plays the role of auxiliary support, for example, the supplementary spacer (Sub PS) is used to make the liquid crystal display device recover quickly after being subjected to external force. During cell alignment, the end of the main spacer (MPS) away from the second substrate 2 is pressed against the first substrate 1 to maintain a certain cell alignment thickness. The main spacer (MPS) and the auxiliary spacer (SubPS) can be arranged in the display area 10, and can also be arranged in the area of ​​the peripheral area BB where the frame sealant 4 and the barrier structure 11 are not arranged.

[0107] In a specific implementation, the above-mentioned display panel provided in the embodiment of the present disclosure, as shown in Figures 4, 6, 8-10, also includes: a first orientation layer (not shown) arranged on the side of the blocking structure 11 facing the liquid crystal 3 and corresponding to the display area AA, and a second orientation layer (not shown) arranged on the side of the spacer (PS) facing the liquid crystal 3 and corresponding to the display area AA; wherein the materials of the first orientation layer and the second orientation layer can be PI (polyimide) materials.

[0108] It should be noted that the embodiment of the present disclosure is described using a liquid crystal display panel as an example, but the display panel provided by the embodiment of the present disclosure is not limited to a liquid crystal display panel, but can also be other display panels including a first substrate and a second substrate, and the first substrate and the second substrate are paired, such as an electrowetting display panel or an electrophoretic display panel.

[0109] It should be noted that thin-film transistor liquid crystal displays are the mainstream product among liquid crystal displays, especially small-sized liquid crystal displays. Due to size limitations, it is more difficult to prevent liquid crystal from dripping outside the area where the frame sealant is located, causing box assembly failure. Therefore, the display panel provided in the embodiment of the present disclosure is more suitable for small-sized thin-film transistor liquid crystal displays.

[0110] In specific implementation, the display panel provided by the embodiment of the present disclosure may further include other functional structures well known to those skilled in the art, which will not be described in detail here.

[0111] Based on the same inventive concept, an embodiment of the present disclosure further provides a method for manufacturing a display panel, as shown in FIG21 , comprising:

[0112] S2101, forming a second substrate;

[0113] S2102, applying a frame sealing material surrounding the display area at a position corresponding to the peripheral area of ​​the second substrate;

[0114] S2103, forming a first substrate; wherein a blocking structure is provided in the peripheral area of ​​the first substrate, the blocking structure being located between the area where the frame sealant is located and the display area and surrounding the display area;

[0115] S2104, dripping liquid crystal into the blocking structure of the first substrate; the blocking structure is used to prevent the liquid crystal from overflowing from the area corresponding to the frame sealant material and away from the outside of the display area when dripping onto the first substrate;

[0116] S2105 , aligning the second substrate and the first substrate, and curing the frame-sealing glue material to form a frame-sealing glue for sealing the liquid crystal.

[0117] In the method for manufacturing the above-mentioned display panel provided by the embodiment of the present disclosure, a barrier structure is provided in the peripheral area of ​​the first substrate, which is located between the area where the frame sealant is located and the display area and surrounds the display area. In this way, when liquid crystal is dripped onto the first substrate, the barrier structure can prevent the liquid crystal from diffusing into the area where the frame sealant is located, thereby preventing the liquid crystal from overflowing the frame sealant away from the outside of the display area, that is, preventing the liquid crystal from crossing the area where the frame sealant is located. Therefore, the present disclosure can avoid the problem of the first substrate and the second substrate being unable to be successfully assembled due to the liquid crystal diffusing to the outside of the area corresponding to the frame sealant during liquid crystal dripping.

[0118] The following describes a method for manufacturing a display panel in detail, taking the display panel corresponding to the first substrate 1 shown in FIG. 11 as an example. The specific steps are as follows:

[0119] (1) Forming a second substrate 2, which may include a substrate and structures such as a color filter and a black matrix formed on one side of the substrate; then forming a main spacer (MPS) and a sub-spacer (SubPS) on the second substrate 2 corresponding to the display area AA, as shown in FIG22A.

[0120] (2) A sealing glue material 4 ′ surrounding the display area AA is applied to the position of the second substrate 2 corresponding to the peripheral area BB, as shown in FIG. 22B .

[0121] (3) A gate electrode G, a gate insulating layer GI, an active layer Act, a pixel electrode 13, a source electrode S and a drain electrode D, a passivation layer PVX, and a common electrode 14 are sequentially stacked on the base substrate 12, as shown in FIG22C.

[0122] (4) A whole layer of resin material 11 ′ is coated on the common electrode 14 , as shown in FIG. 22D .

[0123] (5) A whole layer of resin material 11' is patterned by a photolithography process, and the resin material in the display area AA is removed to form a first organic insulating layer 15 in the peripheral area BB between the area where the frame sealant 4 is located and the display area AA. The first organic insulating layer 15 is the blocking structure 11, thereby forming a first substrate 1, as shown in FIG22E.

[0124] (6) Liquid crystal 3 is dropped into the barrier structure 11 of the first substrate 1, as shown in FIG22F.

[0125] (7) The second substrate 2 and the first substrate 1 are assembled into a cell, and the sealant material 4' is cured to form a sealant 4 for sealing the liquid crystal 3, as shown in FIG22G.

[0126] It should be noted that the manufacturing method of the display panel corresponding to the first substrate 1 shown in Figures 12 to 20 is similar to the manufacturing method of the display panel corresponding to the first substrate 1 shown in Figure 11 above. The only difference lies in the connection method between the pixel electrode 13 and the drain D and the position of the film layer of the blocking structure 11. For details, please refer to the manufacturing method of the display panel corresponding to the structure shown in Figure 11 above for manufacturing.

[0127] Based on the same inventive concept, embodiments of the present invention further provide a display device comprising the display panel described above. The principles of this display device are similar to those of the aforementioned display panel, and thus the implementation of this display device can refer to the implementation of the aforementioned display panel, and any repetitions will not be repeated here.

[0128] In a specific implementation, the display device provided in the embodiment of the present invention may be a liquid crystal display device, and the liquid crystal display device further includes other functional structures such as a backlight module.

[0129] In specific implementation, the display device provided in the embodiment of the present invention may be a full-screen display device, or may be a flexible display device, etc., which is not limited here.

[0130] In a specific implementation, the display device provided in the embodiment of the present invention may be a full-screen mobile phone as shown in FIG23 . Of course, the display device provided in the embodiment of the present invention may also be any product or component with a display function, such as a tablet computer, a television, a monitor, a laptop computer, a digital photo frame, a navigator, or the like. Other essential components of the display device are well understood by those skilled in the art and are not described here in detail, nor should they be construed as limiting the present invention.

[0131] The embodiments of the present disclosure provide a display panel, a manufacturing method thereof, and a display device, wherein a first substrate is provided with a blocking structure in a peripheral area, which is located between the frame sealant and the display area and surrounds the display area. In this way, when liquid crystal is dripped onto the first substrate, the blocking structure can prevent the liquid crystal from diffusing into the area where the frame sealant is located, thereby preventing the liquid crystal from overflowing the frame sealant away from the outside of the display area, that is, preventing the liquid crystal from crossing the area where the frame sealant is located. Therefore, the present disclosure can avoid the problem of the first substrate and the second substrate being unable to be successfully assembled due to the liquid crystal diffusing to the outside of the area corresponding to the frame sealant during liquid crystal dripping.

[0132] Although the preferred embodiments of the present disclosure have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concepts. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the present disclosure.

[0133] Obviously, those skilled in the art may make various changes and modifications to the embodiments of the present disclosure without departing from the spirit and scope of the embodiments of the present disclosure. Thus, if such changes and modifications of the embodiments of the present disclosure fall within the scope of the claims of the present disclosure and their equivalents, the present disclosure is intended to include such changes and modifications.

Claims

1. A display panel, wherein: The method comprises a first substrate and a second substrate arranged in a box, wherein liquid crystal is filled between the first substrate and the second substrate, wherein the first substrate and the second substrate arranged in a box have a display area and a peripheral area surrounding the display area, wherein a frame sealant is arranged between the first substrate and the second substrate and surrounding the display area, and the frame sealant is used to seal the liquid crystal; wherein The first substrate is provided with a blocking structure in the peripheral area, which is located between the area where the frame sealant is located and the display area and surrounds the display area. The blocking structure is used to prevent the liquid crystal from overflowing the frame sealant away from the outside of the display area when dripping onto the first substrate.

2. The display panel according to claim 1, wherein: The number of the blocking structure is one; Alternatively, the number of the blocking structures is at least two, and at least two of the blocking structures are spaced apart and sleeved between the frame sealing glue and the display area.

3. The display panel according to claim 2, wherein: The blocking structure is a protruding structure in which a surface of the first substrate corresponding to the peripheral area protrudes from a surface corresponding to the display area.

4. The display panel according to claim 3, wherein: The first substrate comprises: a base substrate, and a plurality of film layers stacked in sequence on a side of the base substrate facing the liquid crystal; wherein, The first substrate also includes a first organic insulating layer in the peripheral area, which is arranged on the side of any one of the multiple film layers facing the liquid crystal. The first organic insulating layer is an internal film layer of the protruding structure, and the first organic insulating layer makes the surface of the first substrate corresponding to the peripheral area protrude from the surface corresponding to the display area.

5. The display panel according to claim 4, wherein: The first organic insulating layer is a closed structure disposed around the display area.

6. The display panel according to claim 4, wherein: The first organic insulating layer is disposed around the display area, the first organic insulating layer has a long side and a short side, and at least one opening that disconnects the first organic insulating layer is disposed at least at the short side.

7. The display panel according to claim 6, wherein: Each side of the first organic insulating layer has a plurality of openings that disconnect the first organic insulating layer.

8. The display panel according to claim 2, wherein: The blocking structure is a closed groove in which a surface of the first substrate corresponding to the peripheral area is recessed from a surface corresponding to the display area.

9. The display panel according to claim 8, wherein: The first substrate comprises: a base substrate, and at least two inorganic insulating layers stacked in sequence and arranged on a side of the base substrate facing the liquid crystal; At least one of the at least two inorganic insulating layers has a closed through groove at the location of the closed groove.

10. The display panel according to claim 9, wherein: The number of the closed groove is one, and any one of the at least two inorganic insulating layers has a closed through groove at the location of the closed groove.

11. The display panel according to claim 9, wherein: The number of the closed groove is one, and each of the at least two inorganic insulating layers has a closed through groove at the location of the closed groove.

12. The display panel according to claim 9, wherein: The number of the closed grooves is at least two, and any one of the at least two inorganic insulating layers has closed through grooves corresponding to the closed grooves one by one.

13. The display panel according to claim 9, wherein: The number of the closed grooves is the same as the number of the inorganic insulating layers, and each of the inorganic insulating layers has a closed through groove corresponding to one of the closed grooves.

14. The display panel according to claim 8, wherein: The first substrate comprises: a base substrate, at least two inorganic insulating layers stacked in sequence and arranged between the base substrate and the liquid crystal, and a second organic insulating layer arranged between two adjacent inorganic insulating layers; At least the second organic insulating layer has a closed through groove at the location of the closed groove.

15. The display panel according to claim 14, wherein: The number of the closed groove is at least one, and the second organic insulating layer has closed through grooves corresponding to the closed grooves one by one.

16. The display panel according to claim 14, wherein: The number of the closed grooves is at least two, one of which is formed by providing a closed through groove on the second organic insulating layer, and the other closed grooves are formed by providing a closed through groove in at least one of the at least two inorganic insulating layers.

17. The display panel according to claim 14, wherein: The number of the closed grooves is the same as the sum of the number of the inorganic insulating layers and the second organic insulating layers, and the second organic insulating layer and each of the inorganic insulating layers respectively have a closed through groove corresponding to one of the closed grooves.

18. The display panel according to any one of claims 8 to 17, wherein: The number of the closed grooves is at least two, and each of the closed grooves is formed by providing a closed through groove on the same insulating layer, and the distance between two adjacent blocking structures is greater than 2 μm; The number of the closed grooves is at least two, and each of the closed grooves is formed by arranging a closed through groove on a different insulating layer, and the distance between two adjacent blocking structures is greater than 5 μm.

19. The display panel according to any one of claims 2 to 18, wherein: The distance between the blocking structure closest to the display area and the display area is 100 μm to 300 μm, and the distance between the blocking structure closest to the frame-sealing glue and the frame-sealing glue is 200 μm to 250 μm.

20. The display panel according to any one of claims 1 to 19, wherein: The first substrate is an array substrate, and the second substrate is an opposite substrate.

21. A display device, wherein: Comprising a display panel as shown in any one of claims 1-20.

22. A method for manufacturing a display panel, wherein: include: forming a second substrate; Applying a frame sealing glue material surrounding the display area at a position corresponding to the peripheral area of ​​the second substrate; A first substrate is formed; wherein the first substrate is provided with a blocking structure corresponding to the peripheral area, which is located between the area where the frame sealant is located and the display area and surrounds the display area; The liquid crystal is dripped into the blocking structure of the first substrate; the blocking structure is used to prevent the liquid crystal from overflowing from the area corresponding to the frame sealing material and away from the outside of the display area when dripping onto the first substrate; The second substrate and the first substrate are assembled into a box, and the frame-sealing glue material is cured to form a frame-sealing glue for sealing the liquid crystal.

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