Display panel and display device

Abstract

The present application provides a display panel and a display device. The display panel comprises a plurality of fan-out lines, the plurality of fan-out lines comprising a first fan-out line and second fan-out lines disposed at two sides of the first fan-out line, the resistance values of the first fan-out line and the second fan-out lines being the same. Each second fan-out line comprises a first fan-out sub-line and at least one auxiliary line, which are spaced apart from each other, the first fan-out sub-line and the auxiliary line being disposed in parallel, and the line widths of the first fan-out sub-line, the auxiliary line and the first fan-out line being equal.

Description

Display panel and display device Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] With the development of display technology, display panels have developed rapidly. At present, in order to increase the display area of ​​the display panel, the wires between the display area and the driving circuit area are usually designed to be concentrated toward the driving circuit area with a smaller area, so that the wires between the two areas are gathered into a fan-shaped structure. This area is commonly called the fan-out area (Fan-out).

[0003] In the prior art, within a fan-out area, the lengths of multiple fan-out lines are not the same. Along the arrangement direction of the multiple fan-out lines, the length of the fan-out line closer to the center of the multiple fan-out lines will be shorter than the length of the fan-out line closer to the sides of the multiple fan-out lines. Due to the length difference between the fan-out lines at different positions, there will be a large impedance difference between the fan-out lines. The greater the length difference between the different fan-out lines, the greater the impedance difference. As a result, when the display panel is displaying, the signal delay on the fan-out line at the outer position will be greater than the signal delay of the fan-out line at the middle position, reducing the charging uniformity of the sub-pixels in the display area, causing the displayed image to have undesirable phenomena such as uneven brightness, affecting the display effect. SUMMARY OF THE INVENTION

[0004] Embodiments of the present application provide a display panel and a display device to alleviate the deficiencies in the related art.

[0005] To achieve the above functions, the technical solutions provided in the embodiments of the present application are as follows:

[0006] An embodiment of the present application provides a display panel, comprising a display area and a non-display area connected to the display area, the display panel comprising:

[0007] A plurality of fan-out lines are provided in the non-display area, wherein two ends of each of the fan-out lines are respectively connected to corresponding data lines and binding leads, and the plurality of fan-out lines include at least one first fan-out line and at least two second fan-out lines arranged on both sides of the first fan-out line;

[0008] The first fan-out line and the second fan-out line have the same resistance value, the second fan-out line includes a first fan-out sub-route and at least one auxiliary route arranged at intervals, the first fan-out sub-route and the auxiliary route are arranged in parallel, and the line width of the first fan-out sub-route, the line width of the auxiliary route and the line width of the first fan-out line are equal.

[0009] In the display panel provided in the embodiment of the present application, the display panel includes a first metal layer, and the first metal layer includes the first fan-out lines, the first fan-out sub-routings, and the auxiliary routings that are arranged at intervals.

[0010] In the display panel provided in the embodiment of the present application, the first fan-out sub-line and the auxiliary line are parallel to each other and connected at both ends.

[0011] In the display panel provided in the embodiment of the present application, the display panel includes a first metal layer and a second metal layer stacked together, the first metal layer includes the auxiliary routing, and the second metal layer includes the first fan-out line and the first fan-out sub-routing.

[0012] In the display panel provided in the embodiment of the present application, two ends of the first fan-out sub-line are connected to two ends of the auxiliary line.

[0013] In the display panel provided in the embodiment of the present application, the display panel further includes a chip-on-film (COF), the COF being connected to the non-display area and disposed on a side of the fan-out line away from the display area;

[0014] The second fan-out line includes a fan-out routing group and a second fan-out sub-routing, the fan-out routing group is located between the second fan-out sub-routing and the chip-on-film, the fan-out routing group includes the first fan-out sub-routing and the auxiliary routing, one end of the fan-out routing group is connected to the chip-on-film through the binding lead, and the other end of the fan-out routing group is connected to the data line through the second fan-out sub-routing.

[0015] In the display panel provided in the embodiment of the present application, at least a portion of the first fan-out line is a serpentine line.

[0016] In the display panel provided in the embodiment of the present application, the first fan-out line includes a third fan-out sub-route and a fourth fan-out sub-route, the third fan-out sub-route is located between the fourth fan-out sub-route and the chip-on-chip film, one end of the third fan-out sub-route is connected to the chip-on-chip film through the binding lead, and the other end of the third fan-out sub-route is connected to the data line through the fourth fan-out sub-route; wherein, the third fan-out sub-route is a serpentine corrugated structure.

[0017] In the display panel provided in the embodiment of the present application, the second fan-out line includes a plurality of the auxiliary lines, a first fan-out sub-line is arranged corresponding to the plurality of the auxiliary lines, and a first fan-out sub-line is arranged in parallel with the plurality of the auxiliary lines.

[0018] In the display panel provided in the embodiment of the present application, the display panel includes a first metal layer and a second metal layer stacked on the substrate, the first metal layer includes the auxiliary wiring, and the second metal layer includes the first fan-out line and the first fan-out sub-wiring.

[0019] An embodiment of the present application provides a display device, comprising a terminal body and a display panel, wherein the terminal body and the display panel are integrated into one body, the display panel comprising a display area and a non-display area connected to the display area, and the display panel comprises:

[0020] A plurality of fan-out lines are provided in the non-display area, wherein two ends of each of the fan-out lines are respectively connected to corresponding data lines and binding leads, and the plurality of fan-out lines include at least one first fan-out line and at least two second fan-out lines arranged on both sides of the first fan-out line;

[0021] The first fan-out line and the second fan-out line have the same resistance value, the second fan-out line includes a first fan-out sub-route and at least one auxiliary route arranged at intervals, the first fan-out sub-route and the auxiliary route are arranged in parallel, and the line width of the first fan-out sub-route, the line width of the auxiliary route and the line width of the first fan-out line are equal.

[0022] In the display device provided in the embodiment of the present application, the display panel includes a first metal layer, and the first metal layer includes the first fan-out lines, the first fan-out sub-routings, and the auxiliary routings that are arranged at intervals.

[0023] In the display device provided in the embodiment of the present application, the first fan-out sub-line and the auxiliary line are parallel to each other and connected at both ends.

[0024] In the display device provided in the embodiment of the present application, the display panel includes a first metal layer and a second metal layer stacked together, the first metal layer includes the auxiliary routing, and the second metal layer includes the first fan-out line and the first fan-out sub-routing.

[0025] In the display device provided in the embodiment of the present application, two ends of the first fan-out sub-line are connected to two ends of the auxiliary line.

[0026] In the display device provided in the embodiment of the present application, the display panel further includes a chip-on-film (COF), the COF being connected to the non-display area and disposed on a side of the fan-out line away from the display area;

[0027] The second fan-out line includes a fan-out routing group and a second fan-out sub-routing, the fan-out routing group is located between the second fan-out sub-routing and the chip-on-film, the fan-out routing group includes the first fan-out sub-routing and the auxiliary routing, one end of the fan-out routing group is connected to the chip-on-film through the binding lead, and the other end of the fan-out routing group is connected to the data line through the second fan-out sub-routing.

[0028] In the display device provided in the embodiment of the present application, at least a portion of the first fan-out line is a serpentine line.

[0029] In the display device provided in the embodiment of the present application, the first fan-out line includes a third fan-out sub-route and a fourth fan-out sub-route, the third fan-out sub-route is located between the fourth fan-out sub-route and the chip-on-film, one end of the third fan-out sub-route is connected to the chip-on-film through the binding lead, and the other end of the third fan-out sub-route is connected to the data line through the fourth fan-out sub-route; wherein, the third fan-out sub-route is a serpentine corrugated structure.

[0030] In the display device provided in the embodiment of the present application, the second fan-out line includes a plurality of the auxiliary lines, a first fan-out sub-line is arranged corresponding to the plurality of the auxiliary lines, and a first fan-out sub-line is arranged in parallel with the plurality of the auxiliary lines.

[0031] In the display device provided in the embodiment of the present application, the display panel includes a first metal layer and a second metal layer stacked on the substrate, the first metal layer includes the auxiliary wiring, and the second metal layer includes the first fan-out line and the first fan-out sub-wiring. Beneficial effects

[0032] An embodiment of the present application provides a display panel and a display device, wherein the display panel includes a display area and a non-display area connected to the display area, the display panel includes multiple fan-out lines, which are arranged in the non-display area, and the two ends of each fan-out line are respectively connected to the corresponding data line and the binding lead, and the multiple fan-out lines include at least one first fan-out line and at least two second fan-out lines arranged on both sides of the first fan-out line; wherein the first fan-out line and the second fan-out line have the same resistance value, and the second fan-out line includes a first fan-out sub-line and at least one auxiliary line arranged at intervals, the first fan-out sub-line and the auxiliary line are arranged in parallel, and the line width of the first fan-out sub-line, the line width of the auxiliary line and the line width of the first fan-out line are equal, so that the impedance of each fan-out line is basically consistent, thereby improving the display effect of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] The following detailed description of the specific embodiments of the present application in conjunction with the accompanying drawings will make the technical solutions and other beneficial effects of the present application apparent.

[0034] FIG1 is a first cross-sectional top view of a display panel provided in an embodiment of the present application;

[0035] FIG2 is a second cross-sectional top view of a display panel provided in an embodiment of the present application;

[0036] FIG3 is a third cross-sectional top view of the display panel provided in the embodiment of the present application. Modes for Carrying Out the Invention

[0037] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without making creative efforts are within the scope of protection of this application.

[0038] The embodiments of the present application provide a display panel and a display device. Detailed descriptions are provided below. It should be noted that the order in which the following embodiments are described does not limit the preferred order of the embodiments.

[0039] Referring to Figures 1 to 3, this embodiment provides a display panel and a display device. The display panel 1 includes a display area 100 and a non-display area 200 adjacent to the display area 100. The display panel 1 includes a plurality of fan-out lines 20. The plurality of fan-out lines 20 are arranged in the non-display area 200. The two ends of each fan-out line 20 are respectively connected to the corresponding data line 40 and the binding lead 50. The plurality of fan-out lines 20 include at least one first fan-out line 21 and at least two second fan-out lines 22 arranged on both sides of the first fan-out line 21; wherein the first fan-out line 21 and the second fan-out line 22 have the same resistance value, and the second fan-out line 22 includes a first fan-out sub-line 22A and at least one auxiliary line 22B arranged at intervals. The first fan-out sub-line 22A and the auxiliary line 22B are arranged in parallel, and the line width of the first fan-out sub-line 22A, the line width of the auxiliary line 22B, and the line width of the first fan-out line 21 are equal.

[0040] It should be noted that in order to increase the display area of ​​the existing display panel, the wires between the display area and the driving circuit area are usually designed to be concentrated toward the driving circuit area with a smaller area, so that the wires located between the two areas are gathered into a fan-shaped structure, which is commonly referred to as the fan-out area. In the fan-out area, the lengths of the multiple fan-out lines are not the same. Along the arrangement direction of the multiple fan-out lines, the length of the fan-out line closer to the middle of the multiple fan-out lines will be shorter than the length of the fan-out line closer to the two sides of the multiple fan-out lines. Due to the length difference between the fan-out lines at different positions, there is a large impedance difference between the fan-out lines. The greater the length difference between different fan-out lines, the greater the impedance difference. As a result, when the display panel is displaying, the signal delay of the fan-out line at the outer position will be greater than the signal delay of the fan-out line at the middle position, reducing the charging uniformity of the sub-pixels in the display area, causing the displayed image to have undesirable phenomena such as uneven brightness, affecting the display effect.

[0041] It can be understood that in this embodiment, by setting the resistance value of the first fan-out line and the second fan-out line to be the same, the second fan-out line includes a first fan-out sub-line and at least one auxiliary line arranged at intervals, the first fan-out sub-line and the auxiliary line are arranged in parallel, and the line width of the first fan-out sub-line, the line width of the auxiliary line and the line width of the first fan-out line are equal, so that the impedance of each fan-out line is basically consistent, thereby improving the display effect of the display panel.

[0042] The technical solution of this application is now described in conjunction with specific embodiments.

[0043] Please refer to FIG. 1 , which is a first cross-sectional top view of a display panel provided in an embodiment of the present application.

[0044] This embodiment provides a display panel 1 including a display area 100 and a non-display area 200 adjacent to the display area 100 . The display panel 1 includes a substrate 10 and a plurality of fan-out lines 20 located on the substrate 10 .

[0045] The substrate 10 may include a flexible substrate or a rigid substrate. Specifically, when the substrate 10 is a flexible substrate, the material of the flexible substrate may include at least one of acrylic resin, methacrylic resin, polyisoprene, vinyl resin, epoxy resin, polyurethane resin, cellulose resin, silicone resin, polyimide resin, and polyamide resin. When the substrate 10 includes a rigid substrate, the material of the rigid substrate may include one of metal or glass. The material of the substrate 10 may be selected according to actual conditions, and this embodiment does not impose any specific restrictions on this.

[0046] In this embodiment, a plurality of fan-out lines 20 are arranged in the non-display area 200, and the two ends of each fan-out line 20 are respectively connected to the corresponding data line 40 and the binding lead 50, and the plurality of fan-out lines 20 include at least one first fan-out line 21 and at least two second fan-out lines 22 arranged on both sides of the first fan-out line 21; wherein, the first fan-out line 21 and the second fan-out line 22 have the same resistance value, and the second fan-out line 22 includes a first fan-out sub-line 22A and at least one auxiliary line 22B arranged at intervals, and the first fan-out sub-line 22A and the auxiliary line 22B are arranged in parallel.

[0047] For the convenience of explanation, six fan-out line structures are shown in FIG1 , wherein the second fan-out line 22 includes one of the first fan-out sub-lines 22A and one of the auxiliary lines 22B; it should be noted that this embodiment does not impose any specific restrictions on the number of the fan-out lines 20, and the number of the fan-out lines 20 can be selected according to actual conditions.

[0048] Furthermore, the display panel 1 includes a first metal layer, which is located on the substrate 10, and the first metal layer includes the first fan-out line 21, the first fan-out sub-line 22A and the auxiliary line 22B that are arranged at intervals; that is, the first fan-out line 21, the first fan-out sub-line 22A and the auxiliary line 22B are in the same layer and are arranged at intervals.

[0049] Among them, the material of the first metal layer includes but is not limited to at least one metal selected from molybdenum (Mo), aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), calcium (Ca), titanium (Ti), tantalum (Ta) and tungsten (W), and this embodiment does not impose specific restrictions on this.

[0050] It can be understood that this embodiment makes the process of the fan-out line 20 simple and convenient by arranging the first fan-out line 21, the first fan-out sub-route 22A and the auxiliary route 22B on the same layer and at intervals; at the same time, the first fan-out sub-route 22A and the auxiliary route 22B are arranged on the same layer. Compared with the structure in which the first fan-out sub-route 22A and the auxiliary route 22B are stacked, the first fan-out sub-route 22A and the auxiliary route 22B provided in this embodiment do not need to be connected by connection methods such as vias, thereby further reducing the difficulty of manufacturing the second fan-out line 22.

[0051] Specifically, in this embodiment, both ends of the first fan-out sub-line 22A are connected to both ends of the auxiliary line 22B, so that the routing rules of the second fan-out line 22 are simple, which is convenient for etching and wiring and conducive to uniform coating of the film layer.

[0052] Furthermore, in this embodiment, the line width of the first fan-out sub-line 22A, the line width of the auxiliary line 22B, and the line width of the first fan-out line 21 are equal.

[0053] It should be noted that in order to improve the display of existing display panels, due to the large signal delay on the fan-out line, the charging rate of the sub-pixel is reduced, resulting in uneven brightness of the displayed picture and other undesirable phenomena, which affects the display effect. In the prior art, it is usually adopted to increase the line width of the fan-out line in the two side areas and reduce the line width of the fan-out line in the center area, so as to reduce the impedance difference between the fan-out line in the center area and the fan-out lines on the two side areas; however, in the actual design and production process, it will be affected by process fluctuations, resulting in the existing display panels produced. There is still a difference in the impedance of the fan-out line in the center area and the fan-out line in the two side areas, and the problem of uneven brightness cannot be eliminated. Especially for display devices with large size, high resolution and high refresh rate, the impact of process fluctuations is more obvious.

[0054] It can be understood that in this embodiment, the second fan-out line 22 is provided to include a first fan-out sub-line 22A and at least one auxiliary line 22B. The first fan-out sub-line 22A and the auxiliary line 22B are provided in parallel, thereby reducing the resistance of the first fan-out sub-line 22A. Furthermore, by adjusting the resistance of the auxiliary line 22B, the overall resistance of the second fan-out line 22 can be controlled, so that the impedance of the first fan-out line 21 and the second fan-out line 22 are basically the same, thereby avoiding the problem in the prior art that when the display panel is displaying, the signal delay on the fan-out line is large, the charging rate of the sub-pixel is reduced, and the displayed picture has color deviation, uneven brightness and other undesirable phenomena.

[0055] At the same time, it should be noted that the process fluctuation refers to the fact that the exposure process and the etching process cannot achieve perfect stability in actual operation, which will cause the line width of the fan-out line actually produced to be larger or smaller than the preset fan-out line width value, thereby affecting the impedance of the fan-out line in the middle area and the impedance of the fan-out lines in the two side areas. For display devices with large size, high resolution, and high refresh rate, due to their poor charging rate, the fan-out line is very sensitive to process fluctuations or local changes. Small fluctuations may affect the stability of the process and the quality of the product, thereby affecting the display effect.

[0056] It can be understood that in this embodiment, by setting the line width of the first fan-out sub-route 22A, the line width of the auxiliary route 22B and the line width of the first fan-out line 21 to be equal, when the fan-out line 20 undergoes process fluctuations in actual production, the line width change amplitude of the first fan-out line 21 is the same as the line width change amplitude of the first fan-out sub-route 22A, and the line width change amplitude of the first fan-out sub-route 22A is the same as the line width of the auxiliary route 22B, thereby offsetting the color cast, uneven brightness (fanout mura) and other undesirable phenomena displayed on the display panel 1 due to the line width change of the fan-out line 20 in the prior art.

[0057] Furthermore, in this embodiment, the display panel 1 also includes a chip-on-chip film 30, which is connected to the non-display area 200, and the chip-on-chip film 30 is arranged on the side of the fan-out line 20 away from the display area 100, one end of the fan-out line 20 is connected to the data line 40, and the other end of the fan-out line 20 is connected to the chip-on-chip film 30 through the binding lead 50.

[0058] Among them, the second fan-out line 22 includes a fan-out line group 221 and a second fan-out sub-route 222, the fan-out line group 221 is located between the second fan-out sub-route 222 and the flip chip film 30, the fan-out line group 221 includes the first fan-out sub-route 22A and the auxiliary route 22B, one end of the fan-out line group 221 is connected to the flip chip film 30 through the binding lead 50, and the other end of the fan-out line group 221 is connected to the data line 40 through the second fan-out sub-route 222.

[0059] It can be understood that in this embodiment, the second fan-out line 22 includes a fan-out line group 221 and a second fan-out sub-line 222, and the fan-out line group 221 includes the first fan-out sub-line 22A and the auxiliary line 22B arranged in parallel. The fan-out line group 221 can reduce the impedance of the second fan-out line 22, and by adjusting the length of the fan-out line group 221, the overall resistance of the second fan-out line 22 can be controlled.

[0060] Furthermore, at least a portion of the first fan-out line 21 is a serpentine route; specifically, the first fan-out line 21 includes a third fan-out sub-route 211 and a fourth fan-out sub-route 212, the third fan-out sub-route 211 is located between the fourth fan-out sub-route 212 and the chip-on-cover film 30, one end of the third fan-out sub-route 211 is connected to the chip-on-cover film 30 through the binding lead 50, and the other end of the third fan-out sub-route 211 is connected to the data line 40 through the fourth fan-out sub-route 212; wherein, the third fan-out sub-route 211 is a serpentine corrugated structure.

[0061] It should be noted that in the existing display panel, the length of the fan-out line of the non-display area gradually becomes longer from the middle of the non-display area to the two sides. The longer the fan-out line, the greater the resistance of the fan-out line, which leads to different impedances between the fan-out lines, resulting in differences in the signal transmission of multiple fan-out lines, affecting the display effect; it can be understood that this embodiment increases the length of the third fan-out sub-line 211 by setting the third fan-out sub-line 211 to a serpentine corrugated structure, thereby reducing the length difference between the first fan-out line 21 and the second fan-out line 22, and the length of the first fan-out sub-line 22A is equal to the length of the auxiliary line 22B, and the line width of the first fan-out sub-line 22A is equal to the line width of the auxiliary line 22B, thereby reducing the impedance difference between the fan-out lines 20.

[0062] At the same time, in this embodiment, the length of the fan-out line group 221 and the length of the third fan-out sub-line 211 can be reduced, thereby saving space in the non-display area 200, realizing a narrow-border design, and improving the applicability of the fan-out line 20; for example, as shown in Figure 2, which is a second cross-sectional top view of the display panel provided in an embodiment of the present application, the fan-out line 20 provided in this embodiment is also suitable for a narrow-border display panel 1.

[0063] It should be noted that, in this embodiment, the second fan-out line 22 includes one of the first fan-out sub-routing 22A and one of the auxiliary routing 22B for illustration only. In another embodiment, the second fan-out line 22 includes multiple auxiliary routings 22B, and the multiple auxiliary routings 22B are arranged in parallel with the first fan-out sub-routing 22A. In this embodiment, the impedance of each fan-out line 20 can be made basically consistent by controlling the number of the auxiliary routings 22B, thereby improving the display effect of the display panel 1. It can be understood that this embodiment does not impose any specific restrictions on the number of the auxiliary routings 22B.

[0064] Furthermore, in another embodiment, the display panel 1 includes a first metal layer and a second metal layer stacked on the substrate 10, the first metal layer includes the auxiliary routing 22B, and the second metal layer includes the first fan-out line 21 and the first fan-out sub-routing 22A. By stacking the first fan-out sub-routing 22A and the auxiliary routing 22B, the space occupied by the second fan-out line 22 is avoided from being increased, which is conducive to realizing a narrow bezel design of the display panel 1.

[0065] Please refer to FIG. 3 , which is a third cross-sectional top view of the display panel provided in the embodiment of the present application.

[0066] In this embodiment, the structure of the display module is similar to / the same as the first structure of the display panel provided in the above embodiment. For details, please refer to the description of the display module in the above embodiment, which will not be repeated here. The only difference between the two is:

[0067] In this embodiment, the fan-out line group 221 includes a plurality of fan-out line sub-groups 221A, and the plurality of fan-out line sub-groups 221A are arranged at intervals along the direction from the non-display area 200 to the display area 100; wherein, one of the fan-out line sub-groups 221A includes one of the first fan-out sub-routing 22A and one of the auxiliary routing 22B, and two adjacent fan-out line sub-groups 221A are arranged in series through the second fan-out sub-routing 222.

[0068] It can be understood that in this embodiment, the fan-out line group 221 includes multiple fan-out line sub-groups 221A, wherein one fan-out line sub-group 221A includes one first fan-out sub-route 22A and one auxiliary route 22B. By adjusting the resistance of the fan-out line sub-group 221A, the overall resistance of the second fan-out line 22 can be controlled, so that the impedance of the first fan-out line 21 and the second fan-out line 22 are basically the same, thereby avoiding the problem in the prior art that when the display panel is displaying, the signal delay on the fan-out line is large, the charging rate of the sub-pixel is reduced, and the displayed picture has color deviation, uneven brightness and other undesirable phenomena; and, the two adjacent fan-out line sub-groups 221A are arranged in series through the second fan-out sub-route 222, which can reduce malfunction caused by circuit breakage, thereby making the display effect of the display panel 1 more stable.

[0069] This embodiment provides a display device, which includes a terminal body and the display panel described in any one of the above embodiments, wherein the terminal body and the display panel are integrated into one body.

[0070] It can be understood that the display panel has been described in detail in the above embodiments and will not be repeated here.

[0071] In specific applications, the display device can be a display screen of a smartphone, tablet computer, laptop computer, smart bracelet, smart watch, smart glasses, smart helmet, desktop computer, smart TV or digital camera, and can even be used on electronic devices with flexible display screens.

[0072] In summary, although the present application has been disclosed above with preferred embodiments, the above preferred embodiments are not intended to limit the present invention. Ordinary technicians in this field can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of this application shall be based on the scope defined by the claims.

Claims

1. A display panel, wherein: The display panel includes a display area and a non-display area connected to the display area, and the display panel includes: A plurality of fan-out lines are arranged in the non-display area, two ends of each of the fan-out lines are respectively connected to the corresponding data line and the binding lead, and the plurality of fan-out lines include at least one first fan-out line and at least two second fan-out lines arranged on both sides of the first fan-out line; Among them, the first fan-out line and the second fan-out line have the same resistance value, the second fan-out line includes a first fan-out sub-route and at least one auxiliary route arranged at intervals, the first fan-out sub-route and the auxiliary route are arranged in parallel, and the line width of the first fan-out sub-route, the line width of the auxiliary route and the line width of the first fan-out line are equal.

2. The display panel according to claim 1, wherein: The display panel includes a first metal layer, and the first metal layer includes the first fan-out lines, the first fan-out sub-lines, and the auxiliary lines that are arranged at intervals.

3. The display panel according to claim 1, wherein: The display panel includes a first metal layer and a second metal layer which are stacked, the first metal layer includes the auxiliary routing line, and the second metal layer includes the first fan-out line and the first fan-out sub-routing line.

4. The display panel according to claim 1, wherein: Two ends of the first fan-out sub-route are connected to two ends of the auxiliary route.

5. The display panel according to claim 1, wherein: The display panel further comprises a chip-on-chip film, the chip-on-chip film is connected to the non-display area, and the chip-on-chip film is arranged on a side of the fan-out line away from the display area; The second fan-out line includes a fan-out routing group and a second fan-out sub-routing, the fan-out routing group is located between the second fan-out sub-routing and the chip-on-film, the fan-out routing group includes the first fan-out sub-routing and the auxiliary routing, one end of the fan-out routing group is connected to the chip-on-film through the binding lead, and the other end of the fan-out routing group is connected to the data line through the second fan-out sub-routing.

6. The display panel according to claim 5, wherein: The fan-out routing group includes a plurality of fan-out routing sub-groups, and the plurality of fan-out routing sub-groups are arranged at intervals along a direction from the non-display area to the display area; wherein, one of the fan-out routing sub-groups includes one of the first fan-out sub-routing and one of the auxiliary routing, and two adjacent fan-out routing sub-groups are connected via the second fan-out sub-routing.

7. The display panel according to claim 5, wherein: At least a portion of the first fan-out line is a serpentine line.

8. The display panel according to claim 7, wherein: The first fan-out line includes a third fan-out sub-route and a fourth fan-out sub-route, the third fan-out sub-route is located between the fourth fan-out sub-route and the flip chip film, one end of the third fan-out sub-route is connected to the flip chip film through the binding lead, and the other end of the third fan-out sub-route is connected to the data line through the fourth fan-out sub-route; wherein the third fan-out sub-route is a serpentine corrugated structure.

9. The display panel according to claim 1, wherein: The second fan-out line includes a plurality of the auxiliary routing lines, a first fan-out sub-routing line is arranged corresponding to the plurality of the auxiliary routing lines, and a first fan-out sub-routing line is arranged in parallel with the plurality of the auxiliary routing lines.

10. The display panel according to claim 1, wherein: The display panel includes a first metal layer and a second metal layer stacked on the substrate, the first metal layer includes the auxiliary routing line, and the second metal layer includes the first fan-out line and the first fan-out sub-routing line.

11. A display device, wherein: The display device includes a terminal body and a display panel, wherein the terminal body and the display panel are integrated into one, the display panel includes a display area and a non-display area connected to the display area, and the display panel includes: A plurality of fan-out lines are arranged in the non-display area, two ends of each of the fan-out lines are respectively connected to the corresponding data line and the binding lead, and the plurality of fan-out lines include at least one first fan-out line and at least two second fan-out lines arranged on both sides of the first fan-out line; Among them, the first fan-out line and the second fan-out line have the same resistance value, the second fan-out line includes a first fan-out sub-route and at least one auxiliary route arranged at intervals, the first fan-out sub-route and the auxiliary route are arranged in parallel, and the line width of the first fan-out sub-route, the line width of the auxiliary route and the line width of the first fan-out line are equal.

12. The display device according to claim 1, wherein: The display panel includes a first metal layer, and the first metal layer includes the first fan-out lines, the first fan-out sub-lines, and the auxiliary lines that are arranged at intervals.

13. The display device according to claim 11, wherein: The display panel includes a first metal layer and a second metal layer which are stacked, the first metal layer includes the auxiliary routing line, and the second metal layer includes the first fan-out line and the first fan-out sub-routing line.

14. The display device according to claim 11, wherein: Two ends of the first fan-out sub-route are connected to two ends of the auxiliary route.

15. The display device according to claim 11, wherein: The display panel further comprises a chip-on-chip film, the chip-on-chip film is connected to the non-display area, and the chip-on-chip film is arranged on a side of the fan-out line away from the display area; The second fan-out line includes a fan-out routing group and a second fan-out sub-routing, the fan-out routing group is located between the second fan-out sub-routing and the chip-on-film, the fan-out routing group includes the first fan-out sub-routing and the auxiliary routing, one end of the fan-out routing group is connected to the chip-on-film through the binding lead, and the other end of the fan-out routing group is connected to the data line through the second fan-out sub-routing.

16. The display device according to claim 15, wherein: The fan-out routing group includes a plurality of fan-out routing sub-groups, and the plurality of fan-out routing sub-groups are arranged at intervals along a direction from the non-display area to the display area; wherein, one of the fan-out routing sub-groups includes one of the first fan-out sub-routing and one of the auxiliary routing, and two adjacent fan-out routing sub-groups are connected via the second fan-out sub-routing.

17. The display device according to claim 15, wherein: At least a portion of the first fan-out line is a serpentine line.

18. The display device according to claim 17, wherein: The first fan-out line includes a third fan-out sub-route and a fourth fan-out sub-route, the third fan-out sub-route is located between the fourth fan-out sub-route and the flip chip film, one end of the third fan-out sub-route is connected to the flip chip film through the binding lead, and the other end of the third fan-out sub-route is connected to the data line through the fourth fan-out sub-route; wherein the third fan-out sub-route is a serpentine corrugated structure.

19. The display device according to claim 11, wherein: The second fan-out line includes a plurality of the auxiliary routing lines, a first fan-out sub-routing line is arranged corresponding to the plurality of the auxiliary routing lines, and a first fan-out sub-routing line is arranged in parallel with the plurality of the auxiliary routing lines.

20. The display device according to claim 1, wherein: The display panel includes a first metal layer and a second metal layer stacked on the substrate, the first metal layer includes the auxiliary routing line, and the second metal layer includes the first fan-out line and the first fan-out sub-routing line.

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