Surface acoustic wave resonator device and manufacturing method therefor, and filter

Abstract

A surface acoustic wave resonator device and a manufacturing method therefor, and a filter. The surface acoustic wave resonator device comprises: a piezoelectric substrate; an interdigital transducer, which is located on one side of the piezoelectric substrate, is provided with an interdigital electrode area, and comprises first interdigital electrodes and a first interdigital electrode leading-out part which are connected to each other, and second interdigital electrodes and a second interdigital electrode leading-out part which are connected to each other, wherein the first interdigital electrodes and the second interdigital electrodes are located in the interdigital electrode area, extend in a first direction and are alternately arranged in a second direction, and the first interdigital electrode leading-out part and the second interdigital electrode leading-out part are located on the opposite sides of the interdigital electrode area in the first direction; a first intermediate layer, which covers the interdigital transducer; and a first conductive structure and a second conductive structure, which are located on the side of the first intermediate layer distant from the piezoelectric substrate, wherein in a third direction, the first conductive structure and the second conductive structure are each overlapped with the tail end portions of the first interdigital electrodes and the second interdigital electrodes.

Description

Surface acoustic wave resonator device, manufacturing method thereof, and filter

[0001] This application claims priority to Chinese patent application No. 202311116941.7 filed on September 1, 2023, and the contents of the above-mentioned Chinese patent application disclosure are hereby incorporated by reference in their entirety as part of this application. Background Art

[0002] With the rapid development of mobile communication technology, filters based on resonators are becoming increasingly widespread and widely used in communication devices such as smartphones. Surface acoustic wave (SAW) filters, as acoustic wave filters, have the advantages of small size and light weight. In SAW resonators, noise suppression can be achieved by providing a metal structure above the interdigital electrodes. However, while this metal structure suppresses noise, it can also adversely affect the reliability of the resonator device.

[0003] Summary of the Invention

[0004] According to at least one embodiment of the present disclosure, a surface acoustic wave resonator device, a manufacturing method thereof, and a filter are provided, which can suppress clutter in the resonator device and the filter, and in some embodiments, can also ensure the device reliability of the resonator device.

[0005] At least one embodiment of the present disclosure provides a surface acoustic wave resonator device, comprising: a piezoelectric substrate; an interdigital transducer, arranged on one side of the piezoelectric substrate, having an interdigital electrode area, and comprising a first interdigital electrode and a first interdigital electrode lead-out portion connected to each other, and a second interdigital electrode and a second interdigital electrode lead-out portion connected to each other; the first interdigital electrode and the second interdigital electrode are located in the interdigital electrode area, extend along a first direction and are alternately arranged in a second direction, the first direction and the second direction intersecting; the first interdigital electrode lead-out portion and the second interdigital electrode lead-out portion are located on opposite sides of the interdigital electrode area in the first direction; a first intermediate layer, arranged on one side of the piezoelectric substrate, and covering the interdigital transducer; and a first conductive structure and a second conductive structure, located on a side of the first intermediate layer away from the piezoelectric substrate, spaced apart from each other in the first direction, and each overlapping with an end portion of the first interdigital electrode and the second interdigital electrode in a third direction perpendicular to the main surface of the piezoelectric substrate; and a passivation layer, arranged on a side of the first intermediate layer away from the piezoelectric substrate, covering and contacting the first conductive structure and the second conductive structure.

[0006] In the surface acoustic wave resonator device provided according to at least one embodiment of the present disclosure, the passivation layer and the first intermediate layer include different materials, and the side walls of the first conductive structure and the surface thereof away from the piezoelectric substrate as well as the side walls of the second conductive structure and the surface thereof away from the piezoelectric substrate are covered by the passivation layer and are in contact with the passivation layer.

[0007] In the surface acoustic wave resonator device provided according to at least one embodiment of the present disclosure, the first conductive structure is electrically connected to one of the first interdigital electrode and the second interdigital electrode, and the second conductive structure is electrically connected to the other of the first interdigital electrode and the second interdigital electrode.

[0008] In the surface acoustic wave resonator device provided according to at least one embodiment of the present disclosure, the first interdigitated electrode and the second interdigitated electrode each include a central portion, a first end portion, a second end portion and a connecting portion, and in each interdigitated electrode, the first end portion and the second end portion are located on opposite sides of the central portion in the first direction, and the connecting portion is located on the side of the second end portion away from the central portion, and is connected to a corresponding one of the first interdigitated electrode lead-out portion and the second interdigitated electrode lead-out portion; the first conductive structure includes a first conductive main portion and a first conductive extension portion connected to each other, the first conductive main portion overlaps with the second end portion of the first interdigitated electrode and the first end portion of the second interdigitated electrode in the third direction, and the first conductive main portion is electrically connected to the first interdigitated electrode through the first conductive extension portion; and the second conductive structure includes a second conductive main portion and a second conductive extension portion connected to each other, the second conductive main portion overlaps with the first end portion of the first interdigitated electrode and the second end portion of the second interdigitated electrode in the third direction, and the second conductive main portion is electrically connected to the second interdigitated electrode through the second conductive extension portion.

[0009] The surface acoustic wave resonator device provided according to at least one embodiment of the present disclosure also includes: a first conductive connector, extending through the first intermediate layer to be connected to the first interdigitated electrode lead-out portion, and electrically connected to the first interdigitated electrode through the first interdigitated electrode lead-out portion; and a second conductive connector, extending through the first intermediate layer to be connected to the second interdigitated electrode lead-out portion, and electrically connected to the second interdigitated electrode through the second interdigitated electrode lead-out portion, wherein the first conductive structure and the second conductive structure are electrically connected to the first interdigitated electrode and the second interdigitated electrode respectively through the first conductive connector and the second conductive connector.

[0010] In the surface acoustic wave resonator device provided according to at least one embodiment of the present disclosure, the first conductive extension portion and the second conductive extension portion are located on a side of the first intermediate layer away from the piezoelectric substrate, and extend from the first conductive main portion and the second conductive main portion to connect the first conductive connector and the second conductive connector, respectively, and then are electrically connected to the first interdigitated electrode and the second interdigitated electrode through the first conductive connector and the second conductive connector.

[0011] In the surface acoustic wave resonator device provided according to at least one embodiment of the present disclosure, the orthographic projection of the first conductive extension portion on the piezoelectric substrate and the orthographic projection of the first conductive connecting member on the piezoelectric substrate are connected to or overlap with each other, and the orthographic projection of the second conductive extension portion on the piezoelectric substrate and the orthographic projection of the second conductive connecting member on the piezoelectric substrate are connected to or overlap with each other.

[0012] In the surface acoustic wave resonator device provided according to at least one embodiment of the present disclosure, the first conductive connection member and the second conductive connection member are in contact with the sidewall of the first conductive extension portion and the sidewall of the second conductive extension portion, respectively.

[0013] In the surface acoustic wave resonator device provided according to at least one embodiment of the present disclosure, the first conductive connector also covers a portion of the surface of the first conductive extension away from the first intermediate layer; or the second conductive connector also covers a portion of the surface of the second conductive extension away from the first intermediate layer.

[0014] In the surface acoustic wave resonator device provided according to at least one embodiment of the present disclosure, the first conductive extension portion overlaps with the connecting portion of the first interdigital electrode in the third direction; or the second conductive extension portion overlaps with the connecting portion of the second interdigital electrode in the third direction.

[0015] In the surface acoustic wave resonator device provided according to at least one embodiment of the present disclosure, the first conductive extension portion overlaps with the first interdigital electrode lead portion in the third direction; or the second conductive extension portion overlaps with the second interdigital electrode lead portion in the third direction.

[0016] In the surface acoustic wave resonator device provided according to at least one embodiment of the present disclosure, the side wall of the first conductive body portion is aligned with the side wall of the first end portion of the second interdigitated electrode in the third direction; or the side wall of the second conductive body portion is aligned with the side wall of the first end portion of the first interdigitated electrode in the third direction.

[0017] In the surface acoustic wave resonator device provided according to at least one embodiment of the present disclosure, the first conductive extension portion is located between the first conductive main body portion and the first interdigitated electrode in the third direction, and extends through the first intermediate layer to connect the first conductive main body portion to the first interdigitated electrode; or the second conductive extension portion is located between the second conductive main body portion and the second interdigitated electrode in the third direction, and extends through the first intermediate layer to connect the second conductive main body portion to the second interdigitated electrode.

[0018] In the surface acoustic wave resonator device provided according to at least one embodiment of the present disclosure, the first conductive structure and the second conductive structure constitute a noise suppression structure.

[0019] In the surface acoustic wave resonator device provided according to at least one embodiment of the present disclosure, the first intermediate layer includes a temperature compensation layer.

[0020] In the surface acoustic wave resonator device provided according to at least one embodiment of the present disclosure, the first intermediate layer includes: a first intermediate sublayer, extending along the surface of the interdigital transducer on the piezoelectric substrate; and a second intermediate sublayer, located on a side of the first intermediate sublayer away from the piezoelectric substrate, and the first intermediate sublayer and the second intermediate sublayer include different materials; wherein the interdigital transducer and the second intermediate sublayer are separated by the first intermediate sublayer.

[0021] According to at least one embodiment of the present disclosure, a surface acoustic wave resonator device is provided, comprising: a piezoelectric substrate; an interdigital transducer, arranged on one side of the piezoelectric substrate, having an interdigital electrode area, and comprising a first interdigital electrode and a first interdigital electrode lead portion connected to each other, a second interdigital electrode and a second interdigital electrode lead portion connected to each other; the first interdigital electrode and the second interdigital electrode are located in the interdigital electrode area, extend along a first direction and are alternately arranged in a second direction, the first direction and the second direction intersecting; the first interdigital electrode lead portion and the second interdigital electrode lead portion are located in the interdigital electrode area in the first direction two opposite sides of the interdigital electrode area; a first intermediate layer, arranged on one side of the piezoelectric substrate and covering the interdigital transducer; and a first conductive structure and a second conductive structure, located on a side of the first intermediate layer away from the piezoelectric substrate, spaced apart from each other in the first direction, and each overlapping with the end portion of the first interdigital electrode and the second interdigital electrode in a third direction perpendicular to the main surface of the piezoelectric substrate, wherein the first conductive structure is electrically connected to one of the first interdigital electrode and the second interdigital electrode, and the second conductive structure is electrically connected to the other of the first interdigital electrode and the second interdigital electrode.

[0022] The surface acoustic wave resonator device provided according to at least one embodiment of the present disclosure further includes: a second intermediate layer located on a side of the first intermediate layer away from the piezoelectric substrate and covering the first conductive structure and the second conductive structure.

[0023] In the surface acoustic wave resonator device provided according to at least one embodiment of the present disclosure, at least a portion of the first intermediate layer and at least a portion of the second intermediate layer together constitute a temperature compensation layer.

[0024] In the surface acoustic wave resonator device provided according to at least one embodiment of the present disclosure, the second intermediate layer includes: a third intermediate sublayer, covering the first conductive structure and the second conductive structure on the first intermediate layer; and a fourth intermediate sublayer, located on a side of the third intermediate sublayer away from the first intermediate layer, and the third intermediate sublayer and the fourth intermediate sublayer include different materials, wherein the third intermediate sublayer separates the first conductive structure and the fourth intermediate sublayer, and separates the second conductive structure and the fourth intermediate sublayer.

[0025] At least one embodiment of the present disclosure provides a filter comprising any of the surface acoustic wave resonator devices described above.

[0026] At least one embodiment of the present disclosure provides a method for manufacturing a surface acoustic wave resonator device, comprising: providing a piezoelectric substrate; forming an interdigital transducer on the piezoelectric substrate, wherein the interdigital transducer has an interdigital electrode area and includes a first interdigital electrode and a first interdigital electrode lead portion connected to each other, and a second interdigital electrode and a second interdigital electrode lead portion connected to each other; the first interdigital electrode and the second interdigital electrode are located in the interdigital electrode area, extend along a first direction and are alternately arranged in a second direction, and the first direction and the second direction intersect; the first interdigital electrode lead portion and the second interdigital electrode lead portion are located in the first direction and the second direction intersect; two opposite sides of the interdigital electrode area; forming a first intermediate layer on one side of the piezoelectric substrate to cover the interdigital transducer; and forming a first conductive structure and a second conductive structure on a side of the first intermediate layer away from the piezoelectric substrate, the first conductive structure and the second conductive structure being spaced apart from each other in the first direction and each overlapping with an end portion of the first interdigital electrode and the second interdigital electrode in a third direction perpendicular to the main surface of the piezoelectric substrate; and forming a passivation layer on a side of the first intermediate layer away from the piezoelectric substrate, wherein the passivation layer covers and contacts the first conductive structure and the second conductive structure.

[0027] In the method for manufacturing a surface acoustic wave resonator device provided according to at least one embodiment of the present disclosure, the first conductive structure is electrically connected to one of the first interdigital electrode and the second interdigital electrode, and the second conductive structure is electrically connected to the other of the first interdigital electrode and the second interdigital electrode.

[0028] The manufacturing method of the surface acoustic wave resonator device provided according to at least one embodiment of the present disclosure also includes: forming a first conductive connection, which extends through the first intermediate layer to connect to the first interdigitated electrode lead-out portion; and forming a second conductive connection, which extends through the first intermediate layer to connect to the second interdigitated electrode lead-out portion, wherein the first conductive connection and the second conductive connection are also connected to the first conductive structure and the second conductive structure, respectively.

[0029] In the method for manufacturing a surface acoustic resonator device provided according to at least one embodiment of the present disclosure, the first conductive connection at least contacts a sidewall of the first conductive structure, and the second conductive connection at least contacts a sidewall of the second conductive structure.

[0030] The manufacturing method of the surface acoustic wave resonator device provided according to at least one embodiment of the present disclosure also includes: forming a second intermediate layer on the side of the first intermediate layer away from the piezoelectric substrate to cover the first conductive structure and the second conductive structure, wherein forming the first conductive connector and the second conductive connector includes: patterning the second intermediate layer and the first intermediate layer to form a first opening and a second opening, the first opening extending through the second intermediate layer and the first intermediate layer to expose a portion of the surface of the first interdigitated electrode lead-out portion and also expose at least the side wall of the first conductive structure, the second opening extending through the second intermediate layer and the first intermediate layer to expose a portion of the surface of the second interdigitated electrode lead-out portion and also expose at least the side wall of the second conductive structure; and forming the first conductive connector and the second conductive connector in the first opening and the second opening, respectively.

[0031] In the manufacturing method of the surface acoustic wave resonator device provided according to at least one embodiment of the present disclosure, the first opening also exposes a portion of the surface of the first conductive structure away from the first intermediate layer, so that the first conductive connection also contacts the portion of the surface of the first conductive structure, or the second opening also exposes a portion of the surface of the second conductive structure away from the first intermediate layer, so that the second conductive connection also contacts the portion of the surface of the second conductive structure.

[0032] In the manufacturing method of the surface acoustic wave resonator device provided according to at least one embodiment of the present disclosure, forming the first conductive structure and the second conductive structure includes: performing a patterning process on the first intermediate layer to form a first via and a second via, the first via and the second via respectively exposing part of the surface of the first interdigitated electrode and the second interdigitated electrode; and forming a conductive material on the first intermediate layer and in the first via and the second via, and patterning the conductive material to form the first conductive structure and the second conductive structure, wherein the first conductive structure and the second conductive structure are electrically connected to the first interdigitated electrode and the second interdigitated electrode through the first via and the second via, respectively.

[0033] In the manufacturing method of the surface acoustic wave resonator device provided according to at least one embodiment of the present disclosure, forming the first intermediate layer includes: forming a first intermediate sublayer on the piezoelectric substrate to cover the interdigital transducer; and forming a second intermediate sublayer on a side of the first intermediate sublayer away from the piezoelectric substrate, wherein the first intermediate sublayer and the second intermediate sublayer include different materials.

[0034] In the manufacturing method of the surface acoustic wave resonator device provided according to at least one embodiment of the present disclosure, the second intermediate sublayer includes silicon oxide and is formed by a deposition process; and during the formation of the second intermediate sublayer, the first intermediate sublayer isolates the interdigital transducer from oxygen in the deposition chamber. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings of the embodiments will be briefly introduced below. Obviously, the drawings in the following description only relate to some embodiments of the present disclosure, rather than limiting the present disclosure.

[0036] Figure 1A is a schematic top view of a surface acoustic wave resonator structure according to some embodiments of the present disclosure; Figure 1B is a schematic cross-sectional view of a surface acoustic wave resonator structure according to some embodiments of the present disclosure, taken along line II-I' of Figure 1A; and Figure 1C is a schematic cross-sectional view of a surface acoustic wave resonator structure according to some embodiments of the present disclosure, taken along line II-II' of Figure 1B.

[0037] Figure 2A is a schematic top view of a surface acoustic wave resonator device according to some embodiments of the present disclosure; Figure 2B is a schematic cross-sectional view of a surface acoustic wave resonator device according to some embodiments of the present disclosure, taken along line BB' of Figure 2A; and Figure 2C is a schematic cross-sectional view of a surface acoustic wave resonator device according to some embodiments of the present disclosure, taken along line C-C' of Figure 2A.

[0038] 3A to 3L are schematic cross-sectional views illustrating structures of various process steps in a method for manufacturing a surface acoustic wave resonator device according to some embodiments of the present disclosure.

[0039] Figure 4A shows a schematic top view of a surface acoustic wave resonator device according to some other embodiments of the present disclosure; Figure 4B shows a schematic top view of a surface acoustic wave resonator device according to some other embodiments of the present disclosure; Figure 4C shows a schematic top view of a surface acoustic wave resonator device according to some other embodiments of the present disclosure.

[0040] Figure 5A shows a schematic cross-sectional view of an intermediate structure in a method for manufacturing a surface acoustic wave resonator device according to some other embodiments of the present disclosure; Figure 5B shows a schematic cross-sectional view of a surface acoustic wave resonator device according to some other embodiments of the present disclosure, taken along line BB' of Figure 2A; and Figure 5C shows a schematic cross-sectional view of a surface acoustic wave resonator device according to some other embodiments of the present disclosure, taken along line C-C' of Figure 2A.

[0041] 6A is a schematic top view of a surface acoustic wave resonator device according to yet further embodiments of the present disclosure; FIG. 6B is a schematic cross-sectional view of the surface acoustic wave resonator device according to yet further embodiments of the present disclosure, taken along line BB′ of FIG. 6A .

[0042] Figure 7A is a schematic cross-sectional view of a surface acoustic wave resonator device according to some other embodiments of the present disclosure, taken along line BB' of Figure 2A; Figure 7B is a schematic cross-sectional view of a surface acoustic wave resonator device according to some other embodiments of the present disclosure, taken along line CC' of Figure 2A. DETAILED DESCRIPTION

[0043] To make the purpose, technical solutions, and advantages of the embodiments of the present disclosure more clear, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the accompanying drawings of the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.

[0044] Unless otherwise defined, the technical or scientific terms used in this disclosure should have the usual meanings understood by persons of ordinary skill in the field to which this disclosure belongs. The words "first", "second" and similar terms used in this disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. Words such as "include" or "comprise" mean that the elements or objects preceding the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects. Words such as "connect" or "connected" are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect.

[0045] The embodiment of the present disclosure provides a surface acoustic wave resonator device and a manufacturing method thereof, and a filter including the same, wherein the surface acoustic wave resonator device comprises: a piezoelectric substrate; an interdigital transducer, which is arranged on one side of the piezoelectric substrate, has an interdigital electrode area, and comprises a first interdigital electrode and a first interdigital electrode lead portion connected to each other, a second interdigital electrode and a second interdigital electrode lead portion connected to each other; the first interdigital electrode and the second interdigital electrode are located in the interdigital electrode area, extend along a first direction and are alternately arranged in a second direction, and the first direction and the second direction intersect; the first interdigital electrode lead portion and the second interdigital electrode lead portion are connected to each other, The electrode lead-out portions are located on opposite sides of the interdigital electrode area in the first direction; a first intermediate layer is arranged on one side of the piezoelectric substrate and covers the interdigital transducer; a first conductive structure and a second conductive structure are located on a side of the first intermediate layer away from the piezoelectric substrate, are spaced apart from each other in the first direction, and each overlaps with the end portion of the first interdigital electrode and the second interdigital electrode in a third direction perpendicular to the main surface of the piezoelectric substrate; and a passivation layer is arranged on a side of the first intermediate layer away from the piezoelectric substrate, covering and contacting the first conductive structure and the second conductive structure.

[0046] In some embodiments, the passivation layer and the first intermediate layer include different materials, and the sidewalls of the first conductive structure and the surface thereof away from the piezoelectric substrate as well as the sidewalls of the second conductive structure and the surface thereof away from the piezoelectric substrate are covered by the passivation layer and in contact with the passivation layer.

[0047] In some embodiments, the passivation layer is directly formed on the first intermediate layer to cover the first conductive structure and the second conductive structure, which can simplify the process and save costs.

[0048] Figure 1A shows a schematic top view of a surface acoustic wave resonator structure according to some embodiments of the present disclosure; Figures 1B and 1C show schematic cross-sectional views of the surface acoustic wave resonator structure according to some embodiments of the present disclosure, and Figures 1B and 1C are cross-sectional views taken along line I-I' and line II-II' in Figure 1A, respectively.

[0049] 1A to 1C , in some embodiments, a surface acoustic wave resonator structure 50 may be or include a temperature-compensated surface acoustic wave (TC-SAW) resonator. For example, the surface acoustic wave resonator structure 50 includes a piezoelectric substrate 10, an interdigital transducer (IDT) 15, a temperature compensation layer 17, a floating metal structure 18, conductive connectors 22 a and 22 b, and a passivation layer 26.

[0050] In some embodiments, the interdigital transducer 15 is disposed on the piezoelectric substrate 10 and includes an interdigital electrode structure 15a and an interdigital electrode structure 15b. The interdigital electrode structure 15a includes a plurality of interdigital electrodes 12a and an interdigital electrode lead-out portion 13a connected to each other; the plurality of interdigital electrodes 12a extend approximately parallel to each other along a direction D1 and are arranged along a direction D2, and the directions D1 and D2 are parallel to the main surface of the piezoelectric substrate 100 and intersect with each other, for example, are approximately perpendicular to each other. The interdigital electrode lead-out portion 13a is located at the end of the plurality of interdigital electrodes 12a in the direction D1 and is connected to the plurality of interdigital electrodes 12a, so that the plurality of interdigital electrodes 12a are electrically connected to each other through the interdigital electrode lead-out portion 13a. Similar to the interdigital electrode structure 15a, the interdigital electrode structure 15b includes a plurality of interdigital electrodes 12b and an interdigital electrode lead-out portion 13b connected to each other. The plurality of interdigital electrodes 12b extend along a direction D1 and are arranged along a direction D2. The interdigital electrode lead portions 13b are located at ends of the plurality of interdigital electrodes 12b in the direction D1 and are connected to the plurality of interdigital electrodes 12b.

[0051] In some embodiments, the plurality of interdigital electrodes 12a and the plurality of interdigital electrodes 12b are alternately arranged along direction D2 and spaced apart from each other. The interdigital electrode lead portions 13a and the interdigital electrode lead portions 13b are located on both sides of the plurality of interdigital electrodes 12a and 12b in direction D1, and are respectively connected to the ends (e.g., first ends) of the corresponding plurality of interdigital electrodes 12a and the ends (e.g., first ends) of the plurality of interdigital electrodes 12a; the other ends (e.g., second ends opposite to the first ends in direction D1) of the plurality of interdigital electrodes 12a and the other ends (e.g., second ends opposite to the first ends in direction D1) of the plurality of interdigital electrodes 12b face or are close to the interdigital electrode lead portions 13b and the interdigital electrode lead portions 13a, respectively, and are spaced apart from the interdigital electrode lead portions 13b and the interdigital electrode lead portions 13a.

[0052] In some embodiments, a temperature compensation layer 17 is disposed on the side of the piezoelectric substrate 10 having the IDT 15 and may cover the sidewalls of the IDT's multiple interdigital electrodes and the interdigital electrode lead-out portions, as well as the surface away from the piezoelectric substrate 10. The temperature compensation layer 17 may comprise, for example, silicon oxide or other materials. The temperature compensation layer 17 may also be referred to as an intermediate layer or a first intermediate layer.

[0053] In some embodiments, a metal structure 18 is disposed on a side of the temperature compensation layer 17 away from the piezoelectric substrate 10. The metal structure 18 is electrically floating and electrically isolated from the interdigital transducers. For example, the metal structure 18 includes a plurality of metal strips 18a and 18b. The metal strips 18a and 18b may extend substantially parallel to each other along a direction D2 and each extend across the plurality of interdigital electrodes 12a and 12b. In other words, the metal strips 18a and 18b each overlap with the plurality of interdigital electrodes 12a and 12b in a direction perpendicular to the main surface of the piezoelectric substrate 10 (e.g., direction D3); that is, the orthographic projections of the metal strips 18a and 18b onto the main surface of the piezoelectric substrate 10 each overlap (e.g., partially overlap) with the orthographic projections of the plurality of interdigital electrodes 12a and 12b onto the main surface of the piezoelectric substrate 10 in a direction perpendicular to the main surface of the piezoelectric substrate 10. Direction D3 may also be referred to as a third direction. The metal strip 18a and the metal strip 18b may also be referred to as a first conductive structure and a second conductive structure, respectively, or vice versa.

[0054] In some embodiments, the metal strip 18a extends across multiple interdigital electrodes 12a and 12b and is located above the end (or edge) of the interdigital electrode 12b away from the interdigital electrode lead-out portion 13b; for example, the metal strip 18a has side walls (or edges) opposite to each other in direction D1, and its side wall (or edge) sa1 away from the interdigital electrode lead-out portion 13b and close to the interdigital electrode lead-out portion 13a and the side wall (or edge) sa2 of one or more interdigital electrodes 12b away from the interdigital electrode lead-out portion 13b can be roughly aligned with each other in a direction perpendicular to the main surface of the piezoelectric substrate 100 (for example, direction D3). The metal strip 18b extends across multiple interdigital electrodes 12a and 12b and is located above the end (or edge) of one or more interdigital electrodes 12a away from the interdigital electrode lead-out portion 13a; for example, the metal strip 18b has side walls opposite to each other in direction D1, and its side wall (or edge) sb1 near the interdigital electrode lead-out portion 13b and the side wall (or edge) sb2 near the interdigital electrode lead-out portion 13b of one or more interdigital electrodes 12a can be roughly aligned with each other in a direction perpendicular to the main surface of the piezoelectric substrate 100 (for example, direction D3).

[0055] In some embodiments, the conductive connectors 22a and 22b are respectively disposed on a side of the interdigital electrode lead-out portions 13a and 13b that is away from the piezoelectric substrate 100. The conductive connectors 22a and 22b are respectively electrically connected to the interdigital electrode lead-out portions 13a and 13b, and overlap with the interdigital electrode lead-out portions 13a and 13b in a direction D3 perpendicular to the main surface of the piezoelectric substrate 100. For example, the conductive connectors 22a and 22b extend through the temperature compensation layer 17 to electrically connect to the corresponding interdigital electrode lead-out portions 13a and 13b. The conductive connectors 22a and 22b each protrude from the surface of the temperature compensation layer 17 that is away from the piezoelectric substrate 10 in a direction perpendicular to the piezoelectric substrate 10, away from the piezoelectric substrate 10.

[0056] In some embodiments, a passivation layer 26 is disposed over the piezoelectric substrate 10. The passivation layer 26 covers and contacts the conductive connector 22a, portions of the sidewalls of the conductive connector 22b and portions of their surfaces away from the piezoelectric substrate 100, the surface of the temperature compensation layer 17 away from the piezoelectric substrate 10, and the sidewalls of the metal structure 18 and its surfaces away from the piezoelectric substrate 10. The passivation layer 116 may have a plurality of openings that expose portions of the surfaces of the conductive connectors 22a and 22b away from the piezoelectric substrate 10, respectively, to provide external connection windows.

[0057] In this example, the floating metal structure 18 can serve as a noise suppression structure to suppress noise in the resonator device, for example, it can suppress noise (or stray transverse waves) propagating in a direction parallel to the extension direction of the interdigital electrodes (e.g., direction D1). For example, during operation of the surface acoustic wave resonator structure 50, the surface acoustic wave propagates along the arrangement direction of the multiple interdigital electrodes 12a and 12b of the interdigital transducer 15 (e.g., direction D2). However, there may also be some noise propagating along the extension direction of the interdigital electrodes (e.g., direction D1), and such noise may cause energy loss, thereby causing the performance of the resonator and / or the filter including the same to be reduced. The noise suppression structure including the metal strips 18a and 18b disposed above the edges of the two sets of interdigital electrodes can create a region or interface where the acoustic wave propagation impedance changes, thereby suppressing noise propagating in direction D1 and reflecting the noise propagating in direction D1 back into the resonator, thereby reducing energy loss.

[0058] In this example, the floating metal structure 18 overlaps the interdigital electrodes and the temperature compensation layer 17 in a direction perpendicular to the piezoelectric substrate 10, forming an equivalent capacitor between the floating metal structure 18 and the interdigital transducer 15. For example, the portion of the floating metal structure 18 that overlaps the interdigital electrodes 12a and 12b in a direction perpendicular to the main surface of the piezoelectric substrate 10, and the temperature compensation layer (e.g., silicon oxide material) 17 located between the floating metal structure 18 and the interdigital electrodes 12a and 12b, can form an equivalent capacitor. However, at certain voltages (e.g., relatively high voltages), a capacitor breakdown effect may occur. For example, when the electric field strength formed between the floating metal structure 18 and the interdigital electrodes is too strong, the temperature compensation layer 17 may break down. This capacitor breakdown effect can affect the reliability of the resonator and / or the filter including the resonator.

[0059] In response to the above technical problems, the embodiments of the present disclosure further provide a surface acoustic wave resonator device, a manufacturing method thereof, and a filter including the same, wherein the surface acoustic wave resonator device comprises: a piezoelectric substrate; an interdigital transducer, which is arranged on one side of the piezoelectric substrate, has an interdigital electrode area, and includes a first interdigital electrode and a first interdigital electrode lead portion connected to each other, a second interdigital electrode and a second interdigital electrode lead portion connected to each other; the first interdigital electrode and the second interdigital electrode are located in the interdigital electrode area, extend along a first direction and are alternately arranged in a second direction, and the first direction and the second direction intersect; the first interdigital electrode lead portion and the second interdigital electrode lead portion are connected to each other. The pole lead portions are located on opposite sides of the interdigital electrode area in the first direction; a first intermediate layer is arranged on one side of the piezoelectric substrate and covers the interdigital transducer; and a first conductive structure and a second conductive structure are located on a side of the first intermediate layer away from the piezoelectric substrate, spaced apart from each other in the first direction, and each overlaps with the end portion of the first interdigital electrode and the second interdigital electrode in a third direction perpendicular to the main surface of the piezoelectric substrate, wherein the first conductive structure is electrically connected to one of the first interdigital electrode and the second interdigital electrode, and the second conductive structure is electrically connected to the other of the first interdigital electrode and the second interdigital electrode.

[0060] In the embodiments of the present disclosure, the following technical effects can be achieved: the first conductive structure and the second conductive structure can together constitute a noise suppression structure to achieve the suppression of noise in the resonator device; moreover, the first conductive structure and the second conductive structure are also electrically connected to the corresponding interdigital electrodes, so that the first conductive structure and the second conductive structure can form an equivalent potential with the corresponding interdigital electrodes, thereby avoiding or reducing the possibility of breakdown of the intermediate layer between the first conductive structure and the second conductive structure and the interdigital electrodes. In other words, the first conductive structure and the second conductive structure of the embodiment of the present disclosure can suppress noise while avoiding the formation of a capacitive breakdown effect. In this article, the formation of "equivalent potential" by two components means that the potentials of the two components are equal and the potential difference between the two is zero.

[0061] Figures 2A to 2C show schematic top views of surface acoustic wave resonator devices according to some embodiments of the present disclosure; Figures 2B and 2C are schematic cross-sectional views of surface acoustic wave resonator devices according to some embodiments of the present disclosure, and Figures 2B and 2C are cross-sectional views taken along line BB' and line CC' in Figure 2A, respectively.

[0062] 2A to 2C , in some embodiments, a surface acoustic wave resonator device 500a includes a piezoelectric substrate 100, an interdigital transducer (IDT) 105, an intermediate layer 107, a conductive layer 108, an intermediate layer 109, conductive connectors 112a, 112b, and a passivation layer 116. The intermediate layer 107 and the intermediate layer 109 may also be referred to as a first intermediate layer and a second intermediate layer, respectively. The conductive connectors 112a and 112b may also be referred to as first conductive connectors and second conductive connectors, respectively.

[0063] In some embodiments, the interdigital transducer 105 is disposed on one side of the piezoelectric substrate 100 and includes an interdigital electrode structure 105a and an interdigital electrode structure 105b. The interdigital electrode structure 105a includes a plurality of interdigital electrodes 102a and an interdigital electrode lead portion 103a connected to each other; the plurality of interdigital electrodes 102a extend substantially parallel to each other along a direction D1 and are arranged along a direction D2, wherein the directions D1 and D2 are parallel to the main surface of the piezoelectric substrate 100 (e.g., a surface close to or in contact with the interdigital transducer 105) and intersect with each other, for example, being substantially perpendicular to each other. In some embodiments, the interdigital electrode lead portion 103a is located on one side of the plurality of interdigital electrodes 102a in the direction D1 and is connected to the plurality of interdigital electrodes 102a, so that the plurality of interdigital electrodes 102a are electrically connected to each other through the interdigital electrode lead portion 103a. The interdigital electrode lead portion may also be referred to as a busbar. Directions D1 and D2 may be referred to as the first direction and the second direction, respectively, or vice versa. Similar to interdigital electrode structure 105a, interdigital electrode structure 105b includes a plurality of interconnected interdigital electrodes 102b and interdigital electrode lead portions 103b. The plurality of interdigital electrodes 102b extend along direction D1 and are arranged along direction D2. The interdigital electrode lead portions 103b are located on one side of the plurality of interdigital electrodes 102b in direction D1 and are connected to the plurality of interdigital electrodes 102b.

[0064] In some embodiments, a plurality of interdigital electrodes 102a and a plurality of interdigital electrodes 102b are alternately arranged along direction D2 and spaced apart from each other. The interdigital electrode lead-out portion 103a and the interdigital electrode lead-out portion 103b are located on both sides of the plurality of interdigital electrodes 102a and 102b in direction D1 and are connected to one end of the corresponding interdigital electrode. For example, each interdigital electrode 102a has a first edge and a second edge opposite to each other in direction D1, wherein the first edge is close to and faces the interdigital electrode lead-out portion 103b and is spaced apart from the interdigital electrode lead-out portion 103b, and the second edge is connected to the interdigital electrode lead-out portion 103a; each interdigital electrode 102b has a first edge and a second edge opposite to each other in direction D1, wherein the first edge is close to and faces the interdigital electrode lead-out portion 103a and is spaced apart from the interdigital electrode lead-out portion 103a, and the second edge is connected to the interdigital electrode lead-out portion 103b.

[0065] In some embodiments, the interdigitated electrode structure 105a and the interdigitated electrode structure 105b may be respectively referred to as the first interdigitated electrode structure and the second interdigitated electrode structure, the interdigitated electrodes 102a and 102b may be respectively referred to as the first interdigitated electrode and the second interdigitated electrode, and the interdigitated electrode lead-out portion 103a and the interdigitated electrode lead-out portion 103b may be respectively referred to as the first interdigitated electrode lead-out portion and the second interdigitated electrode lead-out portion.

[0066] In some embodiments, the conductive connector 112a and the conductive connector 112b are respectively disposed on a side of the interdigital electrode lead portion 103a and the interdigital electrode lead portion 103b away from the piezoelectric substrate 100, and are electrically connected to the interdigital electrode lead portions 103a and 103b. The conductive connectors 112a and 112b may at least partially overlap with the interdigital electrode lead portions 103a and 103b, respectively, in a direction D3 perpendicular to the main surface of the piezoelectric substrate 100. For example, the orthographic projection of the conductive connector 112a on the piezoelectric substrate 100 may be located within the orthographic projection range of the interdigital electrode lead portion 103a on the piezoelectric substrate 100; the orthographic projection of the conductive connector 112b on the piezoelectric substrate 100 may be located within the orthographic projection range of the interdigital electrode lead portion 103b on the piezoelectric substrate 100, but the present disclosure is not limited to this. Herein, two members overlapping each other in a direction perpendicular to the piezoelectric substrate means that orthographic projections of the two members on the piezoelectric substrate in the direction overlap each other.

[0067] In some embodiments, an intermediate layer 107 is disposed on the side of the piezoelectric substrate 100 having the IDT 105 and may cover the sidewalls of the multiple interdigital electrodes and the interdigital electrode lead-out portions of the IDT 105, as well as the surface thereof away from the piezoelectric substrate 100. The intermediate layer 107 may comprise one or more materials selected from the group consisting of silicon oxide (SiO2), silicon nitride (SiN), aluminum nitride (AlN), amorphous silicon, and gallium nitride. The intermediate layer 107 may be a single layer or a multilayer structure. For example, the intermediate layer 107 may be a single layer structure comprising silicon oxide; or the intermediate layer 107 may be a multilayer structure comprising a stack of a silicon oxide layer and a non-silicon oxide layer formed of a material such as silicon nitride (SiN), aluminum nitride (AlN), amorphous silicon, and gallium nitride (GaN), for example (as shown in FIG. 3E ), wherein the non-silicon oxide layer is disposed between the silicon oxide layer and the IDT. The thickness of the silicon oxide layer may be greater than that of the non-silicon oxide layer. In some embodiments, the surface acoustic wave resonator device 500a may be or include a temperature compensated SAW (TC-SAW) resonator device, and the intermediate layer may include a temperature compensation layer. For example, at least a portion of the intermediate layer 107 (the silicon oxide layer thereof) may serve as the temperature compensation layer.

[0068] In some embodiments, the conductive layer 108 is disposed on a side of the intermediate layer 107 away from the piezoelectric substrate 100 and overlaps the IDT 105 in a direction perpendicular to the main surface of the piezoelectric substrate 100 (e.g., direction D3). It should be understood that in FIG2A , the conductive layer 108 is shown as transparent to clearly illustrate the positional relationship between the conductive layer 108 and the IDT 105, but this does not necessarily mean that the structure must be made of a transparent material. For example, the conductive layer 108 may include any suitable metal material. The conductive layer 108 may include a first conductive structure 108a and a second conductive structure 108b spaced apart from each other in the direction D1.

[0069] The first conductive structure 108a and the second conductive structure 108b may each overlap with the end portions of the interdigital electrodes 102a and 102b in a direction perpendicular to the main surface of the piezoelectric substrate 100 (e.g., direction D3). For example, the first conductive structure 108a may extend across the plurality of interdigital electrodes 102a and 102b in direction D2 and be electrically connected to the conductive connector 112a, and may be electrically connected to the interdigital electrode 102a through the conductive connector 112a. The second conductive structure 108b may extend across the plurality of interdigital electrodes 102a and 102b in direction D2 and be electrically connected to the conductive connector 112b, and may be electrically connected to the interdigital electrode 102b through the conductive connector 112b.

[0070] For example, the interdigital transducer 105 has an interdigital electrode region and an extraction region, and the extraction region is arranged on opposite sides of the interdigital electrode region in direction D1. A plurality of interdigital electrodes 102a and 102b are arranged in the interdigital electrode region and overlap along direction D2 in the interdigital electrode region. The interdigital electrode extraction portions 103a and 103b are respectively arranged in the extraction regions on opposite sides of the interdigital electrode region. For example, the interdigital electrode region may include a central region C, a first end region E1, a second end region E2, a first connection region R1, and a second connection region R2. The first end region E1 and the second end region E2 are located on opposite sides of the central region C in direction D1 and are connected to the central region C; the first connection region R1 is located on a side of the first end region E1 away from the central region C in direction D1 and is connected to the first end region E1; the second connection region R2 is located on a side of the second end region E2 away from the central region C in direction D1 and is connected to the second end region E2. The end region and the connection region in the interdigital electrode region may both be referred to as an interdigital electrode edge region.

[0071] In some embodiments, each interdigitated electrode includes a central portion located in the central region C, a first end portion located in one of the first end region E1 and the second end region E2, a second end portion located in the other of the first end region E1 and the second end region E2, and a connecting portion located in one of the first connection region R1 and the second connection region R2. In each interdigitated electrode, the first end portion and the second end portion are located on opposite sides of the central portion in a first direction (for example, direction D1), and the connecting portion is located on a side of the second end portion away from the central portion and is connected to a corresponding one of the first interdigitated electrode lead-out portion and the second interdigitated electrode lead-out portion. It should be understood that the central portion, the first end portion, the second end portion and the connecting portion of each interdigitated electrode are connected to each other and are continuous, and can be integrally formed. In some embodiments, in each interdigitated electrode structure, the interdigitated electrode and the interdigitated electrode lead-out portion can also be integrally formed. The first end portion and the second end portion of the interdigitated electrode can be collectively referred to as the end portion of the interdigitated electrode.

[0072] For example, each interdigital electrode 102a may include a central portion a1 located in the central region C, a first end portion ap1 located in the second end region E2, a second end portion ap2 located in the first end region E1, and a connection portion a3 located in the first connection region R1. Each interdigital electrode 102b may include a central portion b1 located in the central region C, a first end portion bp1 located in the first end region E1, a second end portion bp2 located in the second end region E2, and a connection portion b3 located in the second connection region R2.

[0073] In some embodiments, each of the first conductive structure 108a and the second conductive structure 108b includes a conductive main body portion and one or more conductive extension portions connected to each other. The position of the conductive main body portion is similar to the metal structure 18 shown in Figure 1A. For example, each conductive main body portion extends along the direction D2 and extends across the end portions of multiple interdigital electrodes; the conductive extension portion may be located on the side of the conductive main body portion away from the center portion in a direction parallel to the main surface of the piezoelectric substrate (for example, direction D1), and electrically connects the conductive main body portion to the corresponding interdigital electrode lead-out portion. In the direction D3 perpendicular to the main surface of the piezoelectric substrate 100, the one or more conductive extension portions of each conductive structure may not overlap with the interdigital electrode 102a or 102b, or the conductive extension portion may overlap with the corresponding connection portion.

[0074] For example, the first conductive structure 108a may include a conductive main portion 108a1 and at least one conductive extension portion 108a2. The conductive main portion 108a1 may be located on a side of the first end region E1 of the interdigital electrode region that is away from the piezoelectric substrate 100 (e.g., directly above the structure as shown in the figure). The conductive extension portion 108a2 may be located on a side of the first connection region R1 of the interdigital electrode region that is away from the piezoelectric substrate 100 (e.g., directly above the structure as shown in the figure). The conductive main portion 108a1 is electrically connected to the conductive connector 112a through the at least one conductive extension portion 108a2, and further electrically connected to the plurality of interdigital electrodes 102a through the conductive connector 112a.

[0075] In a direction D3 perpendicular to the main surface of the piezoelectric substrate 100, the conductive body portion 108a1 may overlap with the first end portions bp1 of the plurality of interdigital electrodes 102b and the second end portions ap2 of the plurality of interdigital electrodes 102a. For example, the orthographic projections of the first end portions bp1 of the plurality of interdigital electrodes 102b and the second end portions ap2 of the plurality of interdigital electrodes 102a on the piezoelectric substrate 100 may be within the orthographic projection of the conductive body portion 108a1 on the piezoelectric substrate 100. In some embodiments, a sidewall S1a of the conductive body portion 108a1 near the conductive connector 112a may be aligned with a sidewall S2a of one or more interdigital electrodes 102b near the interdigital electrode lead-out portion 103a (i.e., the sidewall of the first end portion bp1) in the direction D3, but the present disclosure is not limited thereto.

[0076] In some embodiments, the first conductive structure 108a includes a plurality of conductive extensions 108a2. For example, the plurality of conductive extensions 108a2 may each extend along a direction D1 and may be arranged along a direction D2. Each conductive extension 108a2 is located between the conductive body 108a and the conductive connector 112a in the direction D1 and electrically connects the conductive body 108a1 to the conductive connector 112a.

[0077] In some embodiments, in a direction D3 perpendicular to the major surface of the piezoelectric substrate 100, the conductive extension 108a2 may or may not overlap (e.g., partially overlap or completely overlap) the connection portion a3 of the interdigital electrode 102a, and may or may not overlap (e.g., partially overlap) the interdigital electrode lead portion 103a. The conductive extension 108a2 may not overlap the interdigital electrode 102b. In some embodiments, the orthographic projection of the conductive extension 108a on the piezoelectric substrate 100 may be in contact with the orthographic projection of the conductive connector 112a on the piezoelectric substrate 100. For example, the conductive connector 112a may contact a sidewall of the conductive extension 108a2 (e.g., a sidewall distal from the conductive main portion 108a1).

[0078] For example, the second conductive structure 108b may include a conductive main portion 108b1 and at least one conductive extension portion 108b2. The conductive main portion 108b1 may be located on a side of the second end region E2 of the interdigital electrode region that is away from the piezoelectric substrate 100 (e.g., directly above as shown in the figure); the conductive extension portion 108b2 may be located on a side of the second connection region R2 of the interdigital electrode region that is away from the piezoelectric substrate 100 (e.g., directly above as shown in the figure). The conductive main portion 108b1 is electrically connected to the conductive connector 112b through the at least one conductive extension portion 108b2, and is further electrically connected to the plurality of interdigital electrodes 102b through the conductive connector 112b.

[0079] In a direction D3 perpendicular to the main surface of the piezoelectric substrate 100, the conductive body portion 108b1 may overlap with the first end portions ap1 of the plurality of interdigital electrodes 102a and the second end portions bp2 of the plurality of interdigital electrodes 102b. For example, the orthographic projections of the first end portions ap1 of the plurality of interdigital electrodes 102a and the second end portions bp2 of the plurality of interdigital electrodes 102b on the piezoelectric substrate 100 may be within the orthographic projection of the conductive body portion 108b1 on the piezoelectric substrate 100. In some embodiments, a sidewall S1b of the conductive body portion 108b1 near the conductive connector 112b may be aligned with a sidewall S2b of one or more interdigital electrodes 102a near the interdigital electrode lead-out portion 103b (i.e., the sidewall of the first end portion ap1) in direction D3, but the present disclosure is not limited thereto.

[0080] In some embodiments, the second conductive structure 108b includes a plurality of conductive extensions 108b2. For example, the plurality of conductive extensions 108b2 may each extend along a direction D1 and may be arranged along a direction D2. Each conductive extension 108b2 is located between the conductive body 108b and the conductive connector 112b in the direction D1 and electrically connects the conductive body 108b1 to the conductive connector 112b.

[0081] In some embodiments, in a direction D3 perpendicular to the major surface of the piezoelectric substrate 100, the conductive extension 108b2 may or may not overlap (e.g., partially overlap or completely overlap) the connection portion b3 of the interdigital electrode 102b, and may or may not overlap (e.g., partially overlap) the interdigital electrode lead portion 103b. The conductive extension 108b2 may not overlap the interdigital electrode 102a. The orthographic projection of the conductive extension 108b on the piezoelectric substrate 100 may be in contact with the orthographic projection of the conductive connector 112b on the piezoelectric substrate 100. For example, the conductive connector 112b may contact a sidewall of the conductive extension 108b2 (e.g., a sidewall distal from the conductive main portion 108b1).

[0082] In some embodiments, the conductive body portion 108a1 and the conductive body portion 108a2 may extend parallel to each other along direction D2 and be spaced apart in direction D1. For example, the orthographic projections of the plurality of central portions a1 and b1 located in the central region C on the piezoelectric substrate 100 may be located between the orthographic projections of the conductive body portions 108a1 and 108a2 on the piezoelectric substrate 100 in direction D1. The conductive layer 108 may not overlap the plurality of central portions a1 and b1 in direction D3. In some embodiments, the opposing sidewalls of the conductive body portions 108a1 and 108a2 in direction D2 may be aligned with the sidewalls of the outermost interdigital electrodes in direction D3, or one or both of the opposing sidewalls of the conductive body portions 108a1 and 108a2 in direction D2 may extend beyond the sidewalls of the outermost interdigital electrodes in direction D2. It should be understood that the outermost interdigital electrodes refer to the outermost interdigital electrodes among the multiple interdigital electrodes 102a and 102b arranged in direction D2. For example, the outermost interdigital electrodes in FIG2A are the two interdigital electrodes 102a. However, the present disclosure is not limited to this. In some embodiments, the conductive body portion 108a1 and the conductive body portion 108a2 may also be referred to as the first conductive body portion and the second conductive body portion, respectively.

[0083] In this embodiment, the conductive extensions 108a2 and 108b2 and the conductive main bodies 108a1 and 108a2 are both located on a side of the intermediate layer 107 away from the piezoelectric substrate 100, and extend from the conductive main bodies 108a1 and 108a2, respectively, in a direction parallel to the main surface of the piezoelectric substrate 100 (e.g., a horizontal direction such as direction D1) to connect to the corresponding conductive connectors 112a and 112b. In some embodiments, in a direction D3 perpendicular to the main surface of the piezoelectric substrate 100, the distance between the conductive extensions and the main surface of the piezoelectric substrate 100 can be substantially equal to the distance between the conductive main bodies and the main surface of the piezoelectric substrate 100. However, the present disclosure is not limited to this.

[0084] In some embodiments, the first conductive structure 108a and the second conductive structure 108b may be symmetrical with each other, for example, they may be symmetrical with respect to a center line extending through the center of the central portion a1 or b1 in a direction parallel to the piezoelectric substrate 100 (e.g., direction D2). For example, one or more conductive extensions 108a2 may be aligned with one or more conductive extensions 108b2 in direction D1, but the present disclosure is not limited thereto.

[0085] Continuing with reference to Figures 2A to 2C, in some embodiments, intermediate layer 109 is disposed on a side of intermediate layer 107 facing away from piezoelectric substrate 100 and covers the sidewalls of first and second conductive structures 108a, 108b and their surfaces facing away from piezoelectric substrate 100. The material selection for intermediate layer 109 is similar to that for intermediate layer 107 and will not be further described here. In some embodiments, at least a portion of intermediate layer 107 and at least a portion of intermediate layer 109 may function together as a temperature compensation layer. Conductive connectors 112a and 112b extend through intermediate layers 109 and 107 in a direction D3 perpendicular to the main surface of piezoelectric substrate 100 and are electrically connected to interdigital electrode lead-out portions 103a and 103b, respectively. Conductive connectors 112a and 112b may protrude from the surface of intermediate layer 109 facing away from piezoelectric substrate 100 in direction D3 and away from piezoelectric substrate 100. That is, the conductive connection member 112 a may have a portion embedded in the temperature compensation layer and a protruding portion protruding from the temperature compensation layer.

[0086] In some embodiments, a passivation layer 116 is provided on the side of the temperature compensation layer (e.g., the intermediate layer 109) away from the piezoelectric substrate 100. For example, the passivation layer 116 covers the sidewalls of the protruding portions of the conductive connectors 112a and 112b and a portion of their surface away from the piezoelectric substrate 100, as well as the surface of the temperature compensation layer (e.g., the intermediate layer 109) away from the piezoelectric substrate 100. The passivation layer 116 may have a plurality of openings that respectively expose a portion of the surface of the conductive connectors 112a and 112b away from the piezoelectric substrate 100, thereby providing external connection windows.

[0087] In this embodiment, the conductive layer 108 can serve as a noise suppression structure to achieve the effect of suppressing noise, such as suppressing noise (or stray shear waves) propagating in a direction parallel to the extension direction of the interdigital electrodes (e.g., direction D1). For example, during operation of the surface acoustic wave resonator device 500a, the surface acoustic wave propagates along the arrangement direction of the multiple interdigital electrodes 102a and 102b of the interdigital transducer 105 (e.g., direction D2). However, some noise may also propagate along the extension direction of the interdigital electrodes (e.g., direction D1). Such noise can cause energy loss, thereby reducing the performance of the resonator and / or the filter including the same. In the embodiment of the present disclosure, the conductive structure (e.g., metal structure) 108 disposed above the end regions of the two interdigital electrodes can create a region or interface with a changed acoustic wave propagation impedance, thereby suppressing noise propagating in direction D1 and reflecting the noise propagating in direction D1 back into the resonator, thereby reducing energy loss.

[0088] On the other hand, in the conductive layer 108, the first conductive structure 108a is electrically connected to the conductive connector 112a, and then electrically connected to the interdigital electrode structure 105a through the conductive connector 112a, so that the first conductive structure 108a and the interdigital electrode 102a are electrically connected to each other and have an equivalent potential, so that the electric field strength between the two is zero; the second conductive structure 108b is electrically connected to the conductive connector 112b, and then electrically connected to the interdigital electrode structure 105b through the conductive connector 112b, so that the second conductive structure 108b and the interdigital electrode 102b are electrically connected to each other and have an equivalent potential, so that the electric field strength between the two is zero. In this way, the effect of improving breakdown can be achieved, that is, the possibility of electrical breakdown in the intermediate layer 107 located between the conductive layer 108 and the interdigital transducer 105 can be avoided or reduced, thereby improving the device reliability of the resonator device. That is, in the embodiment of the present disclosure, the first conductive structure 108 a and the second conductive structure 108 b of the conductive layer 108 can suppress noise while avoiding the capacitance breakdown effect.

[0089] 3A to 3L are schematic cross-sectional views illustrating structures of various process steps in a method for manufacturing a surface acoustic wave resonator device 500 a according to some embodiments of the present disclosure.

[0090] 3A , a piezoelectric substrate 100 is provided. The piezoelectric substrate 100 may include a suitable piezoelectric material, such as a piezoelectric crystal or a piezoelectric ceramic. For example, the material of the piezoelectric substrate 100 may include aluminum nitride (AlN), doped aluminum nitride, zinc oxide (ZnO), lead zirconate titanate (PZT), lithium niobate (LiNbO 3 ), quartz, potassium niobate (KNbO 3 ), lithium tantalate (LiTaO 3 ), the like, or a combination thereof. In some embodiments, the piezoelectric substrate 100 may have a single-layer structure or a multi-layer structure, such as a piezoelectric thin film composite structure, such as a composite structure of lithium tantalate piezoelectric film / silicon dioxide / silicon substrate. In some embodiments, the piezoelectric substrate 100 may be a single crystal piezoelectric substrate. However, the present disclosure is not limited thereto.

[0091] 3B , a mask layer 80 is formed on the piezoelectric substrate 100. The mask layer 80 may be or include a patterned photoresist layer. For example, the mask layer 80 may be formed by coating a mask material layer (e.g., including a photoresist layer) on the piezoelectric substrate 100, and then performing a photolithography process including exposure and development on the mask material layer to pattern the mask material layer and form the mask layer 80. In some embodiments, the mask layer 80 has a pattern corresponding to the subsequently formed interdigital transducer. For example, the mask layer 80 has a plurality of openings, and the pattern of the plurality of openings is consistent with the pattern of the interdigital transducer. For example, the plurality of openings may include a first interdigital electrode region and a first interdigital electrode lead-out region corresponding to the interdigital electrodes and the interdigital electrode lead-out portion of the subsequently formed first interdigital electrode structure; and a second interdigital electrode region and a second interdigital electrode lead-out region corresponding to the interdigital electrodes and the interdigital electrode lead-out portion of the subsequently formed second interdigital electrode structure.

[0092] Referring to FIG3C , an electrode material layer ML is formed on the piezoelectric substrate 100 and the mask layer 80. The electrode material layer ML is formed in the opening of the mask layer 80 and on the surface of the mask layer 80 away from the piezoelectric substrate 100. The portion of the electrode material layer ML formed in the opening of the mask layer 80 constitutes the interdigital transducer 105. For example, the portions of the electrode material layer ML formed in the first interdigital electrode region, the first interdigital electrode lead region, the second interdigital electrode region, and the second interdigital electrode lead region of the opening of the mask layer 80 respectively form the interdigital electrode 102a, the interdigital electrode lead portion 103a, the interdigital electrode 102b, and the interdigital electrode lead portion 103b. The portion 104 of the electrode material layer ML formed on the surface of the mask layer 80 away from the piezoelectric substrate 100 will be removed in subsequent processes and can also be referred to as a sacrificial portion.

[0093] In some embodiments, the electrode material layer ML may include a metal material, such as one or more of Ti, Cr, Ag, Cu, Mo, Pt, W, and Al. The electrode material layer ML may have a single layer or a multilayer structure, such as a combination of two or more of the aforementioned metal materials. The electrode material layer ML may be formed by a deposition process such as evaporation, but the present disclosure is not limited thereto.

[0094] 3C and 3D , the mask layer 80 and the sacrificial portion 104 of the electrode material layer ML covering the mask layer 80 are removed, and the remaining electrode material layer constitutes an IDT 105 including interdigital electrodes 102 a, 103 b and interdigital electrode lead portions 103 a, 103 b. In some examples, the mask layer 80 includes a photoresist material, and the mask layer 80 and the sacrificial portion 104 of the electrode material layer ML thereover can be removed by a lift-off process.

[0095] In the embodiments shown in Figures 3B to 3D, a photoresist stripping process is used to pattern the electrode material layer ML to form the IDT 105, but the present disclosure is not limited thereto. In other embodiments, a full-layer electrode material layer ML may be formed on the piezoelectric substrate 100, a patterned mask layer may be formed on the electrode material layer ML, and the patterned mask layer may be used as an etching mask to etch the electrode material layer, thereby patterning the electrode material layer into the IDT; the patterned mask layer may then be removed.

[0096] 3E , an intermediate layer 107 is formed on the piezoelectric substrate 100 and the IDT 105. The intermediate layer 107 covers the surface of one side of the piezoelectric substrate 100, and covers the sidewalls of the multiple interdigital electrodes and the interdigital electrode lead-out portions of the IDT 105, as well as the surface on the side away from the piezoelectric substrate 100. The intermediate layer 107 may include one or more dielectric materials and / or semiconductor materials, such as oxide materials such as silicon oxide (SiO2), non-oxide materials such as silicon nitride (SiN), aluminum nitride (AlN), amorphous silicon, gallium nitride (GaN), or combinations thereof. For example, one or more intermediate material layers may be formed by a deposition process such as CVD or PVD, and then the intermediate material layers may be subjected to a planarization process (e.g., a chemical mechanical polishing (CMP) process) to form the intermediate layer 107 having a substantially flat surface.

[0097] In some embodiments, the intermediate layer 107 is a single-layer structure and may include silicon oxide to serve as a temperature compensation layer. In alternative embodiments, the intermediate layer 107 is a multi-layer structure and may include a first intermediate sublayer 107a and a second intermediate sublayer 107b. The first intermediate sublayer 107a may extend along the surface of the IDT 105, covering at least the sidewalls of the IDT 105 and the surface of the side away from the piezoelectric substrate 100. The second intermediate sublayer 107b is located on the side of the first intermediate sublayer 107a away from the piezoelectric substrate 100 and the IDT 105. The IDT 105 and the second intermediate sublayer 107b may be separated by the first intermediate sublayer 107a located therebetween.

[0098] For example, the first intermediate sublayer 107a may extend (e.g., continuously) along the surface of the piezoelectric substrate 100 and the IDT 105, covering and contacting the surface of the piezoelectric substrate 100 and the sidewalls of the IDT 105 and the surface thereof away from the piezoelectric substrate 100; for example, the first intermediate sublayer 107a may be a conformal layer and conform to the piezoelectric substrate 100 and the IDT 105, but the present disclosure is not limited to this. In some embodiments, the second intermediate sublayer 107b may include an oxide material such as silicon oxide and may serve as a temperature compensation layer. The first intermediate sublayer 107a may be a non-silicon oxide layer and may include one or more of a dielectric material such as silicon nitride (SiN) or aluminum nitride (AlN), a semiconductor material such as amorphous silicon, or gallium nitride (GaN); the first intermediate sublayer 107a may not include an oxide material. For example, the first intermediate sublayer 107a may serve as a protective layer to protect the IDT 105 from being oxidized. For example, the IDT 105 may be protected to prevent oxidation during the formation of the second intermediate sublayer 107b.

[0099] For example, in one embodiment, the second intermediate sublayer 107b may be or include a silicon oxide layer and may be deposited by a PVD process. In the PVD process, a silicon target is used as a sputtering target and an appropriate amount of oxygen (O2) is introduced into the deposition chamber to deposit the silicon oxide layer. In this embodiment, because the first intermediate sublayer 107a is formed before the second intermediate sublayer 107b is formed, and the first intermediate sublayer 107a completely covers the sidewalls of the IDT 105 and the surface thereof away from the piezoelectric substrate 100, during the formation of the second intermediate sublayer 107b (e.g., a silicon oxide layer), the first intermediate sublayer 107a isolates the metal material of the IDT 105 from the oxygen in the deposition chamber, thereby preventing the IDT 105 from being oxidized during the formation of the intermediate layer 107, thereby preventing problems such as device performance degradation caused by oxidation of the IDT 105.

[0100] Referring to FIG3F , a mask layer 81 is formed on the side of the intermediate layer 107 facing away from the piezoelectric substrate 100. The mask layer 81 may be a patterned photoresist layer having a pattern corresponding to the subsequently formed conductive layer 108. For example, the mask layer 81 may have a plurality of openings that expose a portion of the surface of the intermediate layer 107 facing away from the piezoelectric substrate 100, and the pattern of the plurality of openings may be consistent with the pattern of the conductive layer 108. For simplicity, the intermediate layer 107 is shown as a single layer in FIG3F and subsequent figures. However, it should be understood that the intermediate layer 107 may include a dual-layer structure as shown in FIG3E .

[0101] A conductive material layer ML2 is formed over the intermediate layer 107. The conductive material layer ML2 fills the openings in the mask layer 81 and covers the surface of the mask layer 81 on a side away from the intermediate layer 107. For example, the conductive material layer ML2 includes a portion formed in the openings in the mask layer 81 and serving as the first conductive structure 108a, a portion formed in the openings in the mask layer 81 and serving as the second conductive structure 108b, and a sacrificial portion 108c formed on a side of the mask layer 81 away from the intermediate layer 107. For example, the conductive material layer ML2 may include a metal material such as gold, tungsten, silver, titanium, platinum, aluminum, copper, molybdenum, the like, alloys thereof, or combinations thereof, and may be formed by a deposition process such as evaporation.

[0102] 3F and 3G , the mask layer 81 and the sacrificial portion 108c of the conductive material layer ML2 thereon are removed, and the remaining first conductive structure 108a and second conductive structure 108b constitute the conductive layer 108. For example, the mask layer 81 and the sacrificial portion 108c may be removed by a lift-off process.

[0103] In this example, the conductive material layer ML2 is patterned by a photoresist stripping process, but the present disclosure is not limited thereto. In alternative embodiments, the conductive material layer may be patterned by first forming a conductive material layer on the intermediate layer 107, then forming a patterned photoresist layer on the conductive material layer, and then etching the conductive material layer using the patterned photoresist layer as an etching mask.

[0104] 3G and 3H , an intermediate layer 109 is formed on the side of the intermediate layer 107 facing away from the piezoelectric substrate 100. The intermediate layer 109 covers the surface of the intermediate layer 107 facing away from the piezoelectric substrate 100, and covers the sidewalls of the conductive layer 108 and its surface facing away from the intermediate layer 107. The intermediate layer 109 may include one or more dielectric and / or semiconductor materials, such as silicon oxide (SiO2), silicon nitride (SiN), aluminum nitride (AlN), amorphous silicon, gallium nitride (GaN), or a combination thereof. The material of the intermediate layer 109 may be the same as or different from that of the intermediate layer 107. For example, the intermediate material layer may be formed by a deposition method such as CVD or PVD, and then the intermediate material layer may be planarized (e.g., by chemical mechanical polishing (CMP)) to form the intermediate layer 109 having a substantially flat surface.

[0105] In some embodiments, the intermediate layer 109 is a single-layer structure and may include silicon oxide to serve as a temperature compensation layer. In alternative embodiments, the intermediate layer 109 is a multi-layer structure and may include a third intermediate sublayer 109a and a fourth intermediate sublayer 109b. The third intermediate sublayer 109a is located on the intermediate layer 107 and covers at least the sidewalls of the first and second conductive structures 108a, 108b and their surfaces away from the intermediate layer 107. In some examples, it may also cover the surface of the intermediate layer 107 away from the piezoelectric substrate 100. The fourth intermediate sublayer 109b is located on the third intermediate sublayer 109a, for example, on the side of the third intermediate sublayer 109a away from the intermediate layer 107. The third and fourth intermediate sublayers 109a, 109b are made of different materials, and the conductive layer 108 and the fourth intermediate sublayer 109b are separated by the third intermediate sublayer 109a.

[0106] For example, the third intermediate sublayer 109a extends continuously along the surfaces of the intermediate layer 107 and the conductive layer 108, covering and contacting the surface of the intermediate layer 107 away from the piezoelectric substrate 100, as well as the sidewalls of the conductive layer 108 and its surface away from the piezoelectric substrate 100. For example, the third intermediate sublayer 109a may be a conformal layer and conform to the piezoelectric substrate 100 and the conductive structure 108. The fourth intermediate sublayer 109b is formed on the side of the third intermediate sublayer 109a away from the conductive structure 108 and the intermediate layer 107. In some embodiments, the fourth intermediate sublayer 109b may include an oxide material such as silicon oxide to serve as a temperature compensation layer. The third intermediate sublayer 109a may include a non-silicon oxide material such as silicon nitride (SiN), aluminum nitride (AlN), amorphous silicon, or gallium nitride (GaN), and may not include an oxide material. The third intermediate sublayer 109a can serve as a protective layer to protect the conductive layer 108 from being oxidized. For example, during the formation of the fourth intermediate sublayer 109b, the conductive layer 108 can be protected to prevent the conductive layer 108 from being oxidized, thereby avoiding problems such as decreased noise suppression performance due to oxidation of the conductive layer.

[0107] For example, in one embodiment, the fourth intermediate sublayer 109b may be or include a silicon oxide layer and may be deposited by a PVD process. In the PVD process, a silicon target is used as a sputtering target and an appropriate amount of oxygen (O2) is introduced into the deposition chamber to deposit the silicon oxide layer. In this embodiment, because the third intermediate sublayer 109a is formed before the fourth intermediate sublayer 109b is formed, and the third intermediate sublayer 109a can completely cover the sidewalls of the conductive layer 108 and the surface of the conductive layer 108 away from the piezoelectric substrate 100, during the formation of the fourth intermediate sublayer 109b (e.g., a silicon oxide layer), the third intermediate sublayer 109a isolates the metal material of the conductive layer 108 from the introduced oxygen, thereby preventing oxidation of the conductive layer 108 during the formation of the fourth intermediate sublayer 109b, thereby avoiding problems such as decreased noise suppression performance caused by oxidation of the conductive layer 108.

[0108] At least a portion of intermediate layer 107 and at least a portion of intermediate layer 109 together constitute a temperature compensation layer. For example, when intermediate layers 107 and 109 are both single-layer structures, intermediate layers 107 and 109 as a whole together constitute the temperature compensation layer. When at least one of intermediate layers 107 and 109 is a double-layer structure, the portions of intermediate layers 107 and 109 comprising oxide material layers such as silicon oxide together constitute the temperature compensation layer, while the remaining portions serve as a protective layer to protect the metal material from oxidation.

[0109] In this example, the third intermediate sublayer 109a extends continuously above the intermediate layer 107, and the intermediate layer 107 and the fourth intermediate sublayer 109b are separated by the third intermediate sublayer 109a located therebetween, but the present disclosure is not limited thereto. In alternative embodiments, the third intermediate sublayer 109a may be formed to cover only the sidewalls of the conductive structure 108 and its surface away from the intermediate layer 107, without covering the portion of the intermediate layer 107 surface not covered by the conductive structure 108, thereby allowing the formed fourth intermediate sublayer 109b to contact the surface of the intermediate layer 107 (e.g., the second intermediate sublayer 107b) away from the piezoelectric substrate 100 (not shown).

[0110] 3H and 3I , a patterning process is performed on intermediate layers 109 and 107 to form openings 110a and 110b in intermediate layers 109 and 107. The patterning process may include photolithography and etching processes. For simplicity, intermediate layer 109 is shown as a single-layer structure in FIG3I and subsequent figures. However, it should be understood that intermediate layer 109 may include a double-layer structure as shown in FIG3H .

[0111] 3I , the opening 110a extends through the intermediate layers 109 and 107 to expose a portion of the surface of the interdigitated electrode lead-out portion 103a on the side away from the piezoelectric substrate 100, and also exposes at least the side wall of the first conductive structure 108a (e.g., the side wall on the side away from the second conductive structure 108b); the opening 110b extends through the intermediate layers 109 and 107 to expose a portion of the surface of the interdigitated electrode lead-out portion 103b on the side away from the piezoelectric substrate 100, and also exposes at least the side wall of the second conductive structure 108b (e.g., the side wall on the side away from the first conductive structure 108a).

[0112] 3I and 3J , conductive connectors 112a and 112b are formed in openings 110a and 110b, respectively, on the exposed portions of interdigital electrode lead-out portions 103a and 103b. Conductive connector 112a contacts and is electrically connected to interdigital electrode lead-out portion 103a at the bottom of opening 110a, and contacts and is electrically connected to first conductive structure 108a at the sidewalls of opening 110a. Conductive connector 112b contacts and is electrically connected to interdigital electrode lead-out portion 103b at the bottom of opening 110b, and contacts and is electrically connected to second conductive structure 108b at the sidewalls of opening 110b. Conductive connectors 112a and 112b are electrically connected to interdigital electrodes 102a and 102b through interdigital electrode lead-out portions 103a and 103b, respectively. First conductive structure 108a and second conductive structure 108b can be electrically connected to interdigital electrodes 102a and 102b through conductive connectors 112a and 112b, respectively.

[0113] In a direction perpendicular to the main surface of the piezoelectric substrate 100, the conductive connectors 112a and 112b at least partially overlap with the corresponding interdigital electrode lead-out portions 103a and 103b. In some embodiments, the conductive connectors 112a and 112b may protrude from the surface of the intermediate layer 109 that is one layer away from the piezoelectric substrate 100. The material of the conductive connectors 112a and 112b may include metal materials such as Ti, Cr, Al, Cu, Ni, Ag, Au, or a combination stack of the foregoing materials. The material of the conductive connector may be the same as or different from the material of the interdigital transducer 105. In some embodiments, the method for forming the conductive connectors 112a and 112b may include a deposition process such as PVD and a patterning process (for example, a lift-off process).

[0114] 3K , a passivation layer 116 is then formed on the intermediate layer 109 and the conductive connectors 112 a and 112 b to cover the surface of the intermediate layer 109 away from the piezoelectric substrate 100, as well as the sidewalls of the conductive connectors 112 a and 112 b that protrude from the intermediate layer 109 and their surfaces away from the piezoelectric substrate 100. In some embodiments, the material of the passivation layer 116 may include a dielectric material such as silicon nitride, aluminum nitride, the like, or a combination thereof.

[0115] 3K and 3L , in some embodiments, the passivation layer 116 is patterned to remove portions of the passivation layer 116 and form a plurality of openings in the passivation layer 116. The plurality of openings expose portions of the surfaces of the conductive connectors 112 a and 112 b on a side away from the interdigital electrode lead-out portions 103 a and 103 b for external connection.

[0116] In this embodiment, the passivation layer 116 is formed on the intermediate layer 109 and is spaced apart from the conductive layer 108, but the present disclosure is not limited thereto. In alternative embodiments, the intermediate layer 109 may be omitted, and the passivation layer 116 may be formed directly on the intermediate layer 107 and the conductive layer 108, similar to those shown in Figures 1B and 1C.

[0117] For example, Figures 7A and 7B schematically illustrate schematic cross-sectional views of a surface acoustic wave resonator device according to an alternative embodiment of the present disclosure, with Figures 7A and 7B being cross-sectional views taken along lines BB' and CC' of Figure 2A, respectively. In this alternative embodiment, the intermediate layer 109 of the above-described embodiment is omitted.

[0118] As shown in Figures 7A and 7B, a passivation layer 116 is formed on the side of the intermediate layer 107 facing away from the piezoelectric substrate 100, covering and contacting the first conductive structure 108a and the second conductive structure 108b. The passivation layer 116 and the intermediate layer 107 may comprise different materials; for example, the intermediate layer 107 may comprise silicon oxide, while the passivation layer 116 may comprise silicon nitride. The passivation layer 116 covers and contacts the surface of the intermediate layer 107 facing away from the piezoelectric substrate, and covers and contacts the sidewalls of the first conductive structure 108a and its surface facing away from the piezoelectric substrate, as well as the sidewalls of the second conductive structure 108b and its surface facing away from the piezoelectric substrate. For example, the first conductive structure 108a is electrically connected to one of the first and second interdigital electrodes, and the second conductive structure 108b is electrically connected to the other of the first and second interdigital electrodes.

[0119] Other structural features of the surface acoustic wave resonator device shown in FIG. 7A and FIG. 7B are similar or substantially the same as those described above with reference to FIG. 2B and FIG. 2C , and are not described again herein.

[0120] An embodiment of the present disclosure provides a method for manufacturing a surface acoustic wave resonator device, comprising: providing a piezoelectric substrate; forming an interdigital transducer on the piezoelectric substrate, the interdigital transducer having an interdigital electrode region, and comprising a first interdigital electrode and a first interdigital electrode lead portion connected to each other, and a second interdigital electrode and a second interdigital electrode lead portion connected to each other; the first interdigital electrode and the second interdigital electrode are located in the interdigital electrode region, extend along a first direction and are alternately arranged in a second direction, the first direction and the second direction intersecting; the first interdigital electrode lead portion and the second interdigital electrode lead portion are located on opposite sides of the interdigital electrode region in the first direction; forming a first intermediate layer on one side of the piezoelectric substrate to cover the interdigital transducer; forming a first conductive structure and a second conductive structure on a side of the first intermediate layer away from the piezoelectric substrate, the first conductive structure and the second conductive structure being spaced apart from each other in the first direction and each overlapping with an end portion of the first interdigital electrode and the second interdigital electrode in a third direction perpendicular to the main surface of the piezoelectric substrate; and forming a passivation layer on a side of the first intermediate layer away from the piezoelectric substrate. The passivation layer covers and contacts the first conductive structure and the second conductive structure.

[0121] For example, the method for manufacturing the surface acoustic wave resonator device shown in FIG7A and FIG7B is similar to the method for manufacturing the surface acoustic wave resonator device shown in FIG3A to FIG3L, except that: in the method for manufacturing the surface acoustic wave resonator device shown in FIG7A and FIG7B, the step of forming the intermediate layer 109 in FIG3H is omitted; for example, after forming the conductive layer 108 including the first conductive structure 108a and the second conductive structure 108b in the step shown in FIG3G, the step shown in FIG3H is skipped, and the steps shown in FIG3I to FIG3L are directly performed; that is, in the intermediate layer 109, the conductive layer 108 including the first conductive structure 108a and the second conductive structure 108b is formed. Openings 110a and 110b are formed in layer 107 to expose portions of the surfaces of interdigital electrode lead-out portions 103a and 103b, respectively. Conductive connectors 112a and 112b are formed. Next, a passivation layer 116 is formed on the side of intermediate layer 107 facing away from piezoelectric substrate 100 to cover and contact the first and second conductive structures 108a and 108b, and to cover conductive connectors 112a and 112b. Finally, openings are formed in passivation layer 116 to expose portions of the surfaces of conductive connectors 112a and 112b. In this embodiment, intermediate layer 109 is omitted, simplifying the process and reducing costs.

[0122] 4A to 4C are schematic top views of surface acoustic wave resonator devices according to other embodiments of the present disclosure.

[0123] In the above embodiment, the first conductive structure 108a and the second conductive structure 108b each include two conductive extensions, and the two conductive extensions are respectively connected to two opposite end portions of the corresponding conductive body portion in the direction D2. However, the present disclosure is not limited to this. In each of the first conductive structure 108a and the second conductive structure 108b, the conductive extensions can be located at any suitable position as long as electrical connection between the conductive body portion and the corresponding interdigital electrode is achieved.

[0124] For example, Figures 4A and 4B illustrate alternative arrangements of conductive extensions in a surface acoustic wave resonator device. Referring to Figure 4A , in a surface acoustic wave resonator device 500b, a first conductive structure 108a includes a conductive main portion 108a1 and a conductive extension 108a2, and a second conductive structure 108b includes a conductive main portion 108b1 and a conductive extension 108b2. Conductive extensions 108a2 and 108b2 connect conductive main portions 108a1 and 108b1 to corresponding conductive connectors 112a and 112b, respectively. In each of the first conductive structure 108a and the second conductive structure 108b, the conductive extension can be located anywhere on the side of the corresponding conductive main portion that is close to the conductive connector, as long as electrical connection between the conductive main portion and the conductive connector, and thus between the conductive main portion and the corresponding interdigital electrodes, is achieved. For example, the conductive extensions 108a2 and 108b2 may be connected to the center portion of the conductive body 108a1 (i.e., the portion located between its two opposite ends in direction D2). In some embodiments, as shown in FIG4A , the first conductive structure 108a1 and the second conductive structure 108a2 (e.g., the conductive body portions thereof) may extend in direction D2 beyond the edge (e.g., the outer sidewall) of the outermost interdigital electrode in the plurality of interdigital electrodes in direction D2.

[0125] In the above embodiments, in each conductive structure, the size of the conductive extension portion in the direction D2 is smaller than the size of the conductive main portion in the direction D2, but the present disclosure is not limited to this. Referring to Figure 4B, for example, in the first conductive structure 108a, the size of the conductive extension portion 108a2 in the direction D2 can be approximately equal to the size of the conductive main portion 108a1; that is, the first conductive structure 108a can be a block-shaped or planar structure as a whole, and continuously extend from above the first end region E1, across the first connection region R1, and extend to connect with the conductive connector 112a. Similarly, in the second conductive structure 108b, the size of the conductive extension portion 108b2 in the direction D2 can also be approximately equal to the size of the conductive main portion 108b1; that is, the second conductive structure 108b can be a block-shaped or planar structure as a whole, and continuously extend from above the second end region E2, across the second connection region R2, and extend to connect with the conductive connector 112b.

[0126] It should be understood that the first conductive structure 108a and the second conductive structure 108b may each select any type of conductive extension, and the type, size, quantity, etc. of the conductive extensions of the two structures may be the same or different.

[0127] In addition, the number of interdigital electrodes included in the interdigital electrode structures 105a and 105b may be the same or different. For example, in the aforementioned embodiment, the number of interdigital electrodes included in the interdigital electrode structures 105a and 105b is different. In other embodiments, for example, as shown in FIG4C , the number of interdigital electrodes included in the interdigital electrode structures 105a and 105b may be the same as each other. It should be understood that in the figures of the embodiments of the present disclosure, the number of interdigital electrodes included in the interdigital electrode structures 105a and 105b is for illustration only, and the present disclosure is not limited thereto. The number of interdigital electrodes in the interdigital electrode structure can be designed and adjusted according to actual product needs, and the size of the conductive structure can be set accordingly according to the setting of the interdigital electrodes, so that the orthographic projections of the end portions of the plurality of interdigital electrodes on the piezoelectric substrate can all be located within the orthographic projection range of the corresponding conductive structure on the piezoelectric substrate.

[0128] In the embodiment shown in FIG. 4A to FIG. 4C , other features of the SAW resonator devices 500 b - 500 d are similar to those of the SAW resonator device 500 a and are not described again herein.

[0129] FIG5A is a schematic cross-sectional view of an intermediate structure in which openings 110 a and 110 b are formed in intermediate layers 109 and 107 in a method for fabricating a surface acoustic wave resonator device according to other embodiments of the present disclosure. This embodiment is similar to the corresponding intermediate structure shown in FIG3I , except that the openings 110 a and 110 b in this embodiment also expose the surface of the conductive structure facing away from the piezoelectric substrate.

[0130] 3I and 5A , in some embodiments, the process for forming conductive connectors 112 a and 112 b includes forming openings in intermediate layers 109 and 107, followed by forming a conductive material, which is then filled into the openings to form the conductive connectors. For example, intermediate layers 109 and 107 are patterned to form openings 110 a and 110 b. The patterning process may include forming a mask layer on a side of intermediate layer 109 away from intermediate layer 107. The mask layer may, for example, include a patterned photoresist layer formed by a photolithography process, the mask layer having mask openings corresponding to openings 110 a and 110 b. Subsequently, the mask layer is used as an etching mask to etch intermediate layers 109 and 107 to remove portions of the intermediate layers exposed by the mask openings. The etching process can have a high etching selectivity ratio for dielectric materials and conductive materials (for example, metal materials), so that the etching process removes the portions of the intermediate layers 109 and 107 exposed by the mask openings, and the conductive layer 108 and the interdigitated electrode lead portions 103a and 103b are not substantially removed by the etching process.

[0131] In some embodiments, the mask opening is positioned at least directly above the interdigital electrode lead-out portions 103a and 103b and adjacent to at least the conductive layers 108a and 108b in a horizontal direction parallel to the main surface of the piezoelectric substrate 100, such that the formed openings 110a and 110b expose at least the sidewalls of the conductive structures. For example, as shown in FIG3I , the openings 110a and 110b in the intermediate layer just expose the sidewalls of the first conductive structure 108a and the second conductive structure 108b, such that the subsequently formed conductive connectors 112a and 112b contact only the sidewalls of the first conductive structure 108a and the second conductive structure 108b. The orthographic projection of the conductive connecting member 112a on the piezoelectric substrate 100 and the orthographic projection of the first conductive structure 108a on the piezoelectric substrate 100 are adjacent to and connected to each other, but do not overlap with each other; the orthographic projection of the conductive connecting member 112b on the piezoelectric substrate 100 and the orthographic projection of the second conductive structure 108b on the piezoelectric substrate 100 are adjacent to and connected to each other, but do not overlap with each other.

[0132] In other embodiments, portions of the mask openings of the mask layer may also be located directly above the corresponding conductive structures, such that the openings formed in the intermediate layer can expose the sidewalls of the corresponding conductive structures and also expose portions of the surfaces of the corresponding conductive structures on the side away from the intermediate layer 107. For example, as shown in FIG5A , openings 110 a and 110 b extend through the intermediate layer 109, respectively, to expose the sidewalls of the first conductive structure 108 a and the second conductive structure 108 b and portions of their surfaces on the side away from the piezoelectric substrate 100. They further extend through the intermediate layer 107 to expose portions of the surfaces of the interdigitated electrode lead-out portions 103 a and 103 b. In this embodiment, because the etching process has a high etch selectivity for dielectric and conductive materials and does not substantially remove the conductive structures, the exposed portions of the first conductive structures 108 a and the second conductive structures 108 b can also serve as etching masks, preventing portions of the intermediate layer 107 directly below them from being etched away. As such, in each of the openings 110 a and 110 b , the size of the portion of the opening located in the middle layer 109 in the horizontal direction may be larger than the size of the portion of the opening located in the middle layer 107 .

[0133] Referring to FIG5B , in some embodiments, substantially the same process steps as described above with reference to FIG3J through FIG3L are then performed to form components such as conductive connectors 112 a and 112 b and passivation layer 116, thereby forming a surface acoustic wave resonator device 500 e. FIG5C is another cross-sectional view of the surface acoustic wave resonator device 500 e. For example, FIG5B and FIG5C are cross-sectional views taken along line BB′ and line CC′ of FIG2A , respectively.

[0134] 5B and 5C , in a surface acoustic wave resonator device 500e, conductive connectors 112a and 112b extend through intermediate layer 109 to connect to first conductive structure 108a and second conductive structure 108b, respectively, and further extend through intermediate layer 107 to connect to interdigitated electrode lead-out portions 103a and 103b. In this example, conductive connector 112a contacts the sidewalls of first conductive structure 108a and also covers and contacts a portion of the surface of first conductive structure 108a facing away from intermediate layer 107. Conductive connector 112b contacts the sidewalls of second conductive structure 108b and also covers and contacts a portion of the surface of second conductive structure 108b facing away from intermediate layer 107. In some embodiments, the sidewall of the conductive extension 108a2 of the first conductive structure 108a, which is remote from the end portion of the conductive main body 108a1, and a portion of its surface remote from the intermediate layer 107, are covered by the conductive connector 112a and are in direct contact with the conductive connector 112a; the orthographic projection of the end portion of the conductive extension 108a2 of the first conductive structure 108a on the piezoelectric substrate 100 overlaps with the orthographic projection of the conductive connector 112a on the piezoelectric substrate 100. Similarly, the sidewall of the conductive extension 108b2 of the second conductive structure 108b, which is remote from the end portion of the conductive main body 108b1, and a portion of its surface remote from the intermediate layer 107, are covered by the conductive connector 112b and are in direct contact with the conductive connector 112b; the orthographic projection of the end portion of the conductive extension 108b2 of the second conductive structure 108b on the piezoelectric substrate 100 overlaps with the orthographic projection of the conductive connector 112b on the piezoelectric substrate 100.

[0135] In some embodiments, in the region where the conductive connector 112a overlaps the end of the conductive extension 108b2, the conductive connector 112a has a top portion and a bottom portion, and the top portion has a larger horizontal dimension (e.g., width) than the bottom portion in the same horizontal direction (e.g., width). The top portion is located on a side of the first conductive structure 108a away from the piezoelectric substrate 100 and covers the surface of the end of the conductive extension 108a2 away from the intermediate layer 107. The bottom portion is located on a side edge of the first conductive structure 108a and on a side thereof closer to the piezoelectric substrate 100, covers the sidewalls of the conductive extension 108a2, and extends toward the piezoelectric substrate to the interdigital electrode lead-out portion 103a. Similarly, the conductive connector 112b may also have top and bottom portions of different sizes. These features are similar to those described above for the conductive connector 112a and are not further described here.

[0136] In some embodiments, as shown in FIG. 5C , in a region where the conductive connector does not overlap with the corresponding conductive structure, the top portion and the bottom portion of the conductive connector may have substantially the same size in the horizontal direction, but the present disclosure is not limited thereto.

[0137] FIG6A shows a schematic top view of a surface acoustic wave resonator device 500 f according to other embodiments of the present disclosure, and FIG6B shows a schematic cross-sectional view of the surface acoustic wave resonator device 500 f according to other embodiments of the present disclosure. FIG6B is a cross-sectional view taken along line BB' in FIG6A . The cross-sectional view taken along line CC' in FIG6A is substantially the same as the cross-sectional view of FIG2C and is not shown again in this embodiment. The surface acoustic wave resonator device 500 f is similar to the surface acoustic wave resonator device of the previous embodiment, differing in the arrangement of the conductive extension.

[0138] 6A and 6B , in the surface acoustic wave resonator device 500 f , the first conductive structure 108 a includes a conductive main portion 108 a 1 and a conductive extension portion 108 a 2 , and the second conductive structure 108 b includes a conductive main portion 108 b 1 and a conductive extension portion 108 b 2 ; the relevant features of the conductive main portions 108 a 1 and 108 b 1 are substantially the same as those described in the aforementioned embodiments and are not further described herein.

[0139] In some embodiments, the conductive extensions 108a1 and 108b2 may each include one or more conductive vias embedded in the intermediate layer 107. For example, the conductive extension 108a2 may extend in direction D3 from the surface of the conductive main portion 108a1 on the side closer to the piezoelectric substrate 100, through the intermediate layer 107, and to the interdigital electrodes 102a, for example, until it contacts the surface of the interdigital electrodes 102a on the side farther from the piezoelectric substrate 100. In other words, the conductive extension 108a2 is located between the conductive main portion 108a1 and the interdigital electrodes 102a in direction D3, and electrically connects the conductive main portion 108a1 to the interdigital electrodes 102a. For example, the conductive extension 108b2 may extend in direction D3 from the surface of the conductive main portion 108a2 on the side closer to the piezoelectric substrate 100, through the intermediate layer 107, and to the interdigital electrodes 102b, for example, until it contacts the surface of the interdigital electrodes 102b on the side farther from the piezoelectric substrate 100. That is, the conductive extension portion 108b2 is located between the conductive body portion 108b1 and the interdigital electrode 102b in the direction D3, and electrically connects the conductive body portion 108b1 to the interdigital electrode 102b.

[0140] In the embodiments shown in Figures 6A and 6B, the conductive extensions 108a2 and 108b2 each include a conductive via, such that in each of the first conductive structure 108a1 and the second conductive structure 108a2, the conductive body portion can be directly connected to a corresponding interdigital electrode via a conductive via, and can further be electrically connected to other corresponding interdigital electrodes via the interdigital electrode and the interdigital electrode lead portion. However, the present disclosure is not limited to this. In other embodiments, the conductive extensions 108a2 and 108b2 may each include multiple conductive vias; for example, the multiple conductive vias of the conductive extension 108a2 may be located between the conductive body portion 108a1 and the corresponding interdigital electrode 102a; and the multiple conductive vias of the conductive extension 108b2 may be located between the conductive body portion 108b2 and the corresponding interdigital electrode 102b.

[0141] In this embodiment, the method for forming the surface acoustic wave resonator device 500f is similar to the method for forming the surface acoustic wave resonator device 500a, except that the method for forming the first conductive structure 108a and the second conductive structure 108b is slightly different. For example, forming the first conductive structure and the second conductive structure may include: patterning the first intermediate layer to form a first via hole and a second via hole, wherein the first via hole and the second via hole respectively expose a portion of the surface of the first interdigital electrode and the second interdigital electrode; forming a conductive material on the first intermediate layer and in the first via hole and the second via hole, and patterning the conductive material to form the first conductive structure and the second conductive structure, wherein the first conductive structure and the second conductive structure are electrically connected to the first interdigital electrode and the second interdigital electrode through the first via hole and the second via hole, respectively.

[0142] For example, the method for forming the first conductive structure 108a and the second conductive structure 108b may include: before the step of Figure 3F, it also includes a patterning process for the intermediate layer 107 to form vias in the intermediate layer 107 that respectively expose part of the surface of the interdigitated electrodes 102a and 102b; thereafter, in the step of Figure 3F, the conductive material layer ML2 formed is also filled into the vias, so that in the step of Figure 3G, the first conductive structure 108a and the second conductive structure 108b formed have the structure shown in Figure 6B, and are respectively electrically connected to the corresponding interdigitated electrodes through the vias in the intermediate layer 107; in addition, in the subsequent process step of forming the conductive connector, the opening in the intermediate layer may not expose the first and second conductive structures, and the conductive connector formed may not be directly connected to the first and second conductive structures.

[0143] It should be understood that in the embodiments shown in Figures 4A to 6B, the intermediate layer 109 can also be omitted, so that the passivation layer 116 can be directly arranged on the side of the intermediate layer 107 away from the piezoelectric substrate, and cover and contact the first conductive structure 108a and the second conductive structure 108b.

[0144] In the surface acoustic wave resonator devices of various embodiments of the present disclosure, a conductive layer comprising a first conductive structure and a second conductive structure is provided above the edge regions of the interdigital electrodes to serve as a noise suppression structure, thereby suppressing noise in the resonator device. Furthermore, the first conductive structure and the second conductive structure are electrically connected to the corresponding interdigital electrodes, respectively, so that equivalent potentials are formed between the first conductive structure and the corresponding interdigital electrodes, and between the second conductive structure and the corresponding interdigital electrodes. This reduces or avoids the possibility of breakdown in the intermediate layer (e.g., including the temperature compensation layer) between the conductive layer and the interdigital electrodes, thereby ensuring the temperature compensation performance and device reliability of the resonator device. In other words, the surface acoustic wave resonator devices of the present disclosure can suppress noise while improving device reliability.

[0145] There are a few points to note:

[0146] (1) The drawings of the embodiments of the present disclosure only relate to the structures related to the embodiments of the present disclosure, and other structures may refer to conventional designs.

[0147] (2) Unless there is any conflict, the features of the same embodiment and different embodiments of the present disclosure may be combined with each other.

[0148] The above are only specific embodiments of the present disclosure, but the scope of protection of the present disclosure is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this disclosure should be included in the scope of protection of the present disclosure. Therefore, the scope of protection of the present disclosure should be based on the scope of protection of the claims.

Claims

1. A surface acoustic wave resonator device, comprising: Piezoelectric substrate; An interdigital transducer is disposed on one side of the piezoelectric substrate, has an interdigital electrode region, and includes first interdigital electrodes and first interdigital electrode lead-out portions connected to each other, and second interdigital electrodes and second interdigital electrode lead-out portions connected to each other; the first interdigital electrodes and the second interdigital electrodes are located in the interdigital electrode region, extend along a first direction and are alternately arranged in a second direction, and the first direction and the second direction intersect; The first interdigital electrode lead-out portion and the second interdigital electrode lead-out portion are located at opposite sides of the interdigital electrode region in the first direction; A first intermediate layer is disposed on one side of the piezoelectric substrate and covers the interdigital transducer; A first conductive structure and a second conductive structure are located on a side of the first intermediate layer away from the piezoelectric substrate, are spaced apart from each other in the first direction, and each overlaps an end portion of the first interdigital electrode and the second interdigital electrode in a third direction perpendicular to the main surface of the piezoelectric substrate; as well as The passivation layer is disposed on a side of the first intermediate layer away from the piezoelectric substrate, and covers and contacts the first conductive structure and the second conductive structure.

2. The surface acoustic wave resonator device according to claim 1, wherein the passivation layer and the first intermediate layer comprise different materials, and the side walls of the first conductive structure and the surface thereof away from the piezoelectric substrate as well as the side walls of the second conductive structure and the surface thereof away from the piezoelectric substrate are covered by the passivation layer and are in contact with the passivation layer.

3. The surface acoustic wave resonator device according to claim 1, wherein the first conductive structure is electrically connected to one of the first interdigital electrode and the second interdigital electrode, and the second conductive structure is electrically connected to the other of the first interdigital electrode and the second interdigital electrode.

4. The surface acoustic wave resonator device according to any one of claims 1 to 3, wherein The first interdigital electrode and the second interdigital electrode each include a central portion, a first terminal portion, a second terminal portion, and a connecting portion. In each interdigital electrode, the first terminal portion and the second terminal portion are located at opposite sides of the central portion in the first direction, and the connecting portion is located at a side of the second terminal portion away from the central portion and is connected to a corresponding one of the first interdigital electrode lead-out portion and the second interdigital electrode lead-out portion. The first conductive structure includes a first conductive main portion and a first conductive extension portion connected to each other, The first conductive body portion overlaps the second end portion of the first interdigital electrode and the first end portion of the second interdigital electrode in the third direction, and the first conductive body portion is electrically connected to the first interdigital electrode through the first conductive extension portion; and The second conductive structure includes a second conductive main body portion and a second conductive extension portion connected to each other, the second conductive main body portion overlaps with the first end portion of the first interdigitated electrode and the second end portion of the second interdigitated electrode in the third direction, and the second conductive main body portion is electrically connected to the second interdigitated electrode through the second conductive extension portion.

5. The surface acoustic wave resonator device according to claim 4, further comprising: a first conductive connection member extending through the first intermediate layer to be connected to the first interdigital electrode lead-out portion, and electrically connected to the first interdigital electrode through the first interdigital electrode lead-out portion; as well as a second conductive connection member extending through the first intermediate layer to be connected to the second interdigital electrode lead-out portion, and electrically connected to the second interdigital electrode through the second interdigital electrode lead-out portion, The first conductive structure and the second conductive structure are electrically connected to the first interdigital electrode and the second interdigital electrode through the first conductive connection member and the second conductive connection member, respectively.

6. The surface acoustic wave resonator device according to claim 5, wherein the first conductive extension portion and the second conductive extension portion are located on a side of the first intermediate layer away from the piezoelectric substrate, and extend from the first conductive main portion and the second conductive main portion to connect the first conductive connecting member and the second conductive connecting member, respectively, and then are electrically connected to the first interdigitated electrode and the second interdigitated electrode through the first conductive connecting member and the second conductive connecting member.

7. A surface acoustic wave resonator device according to claim 5, wherein the orthographic projection of the first conductive extension portion on the piezoelectric substrate and the orthographic projection of the first conductive connecting member on the piezoelectric substrate are connected to or overlapped with each other, and the orthographic projection of the second conductive extension portion on the piezoelectric substrate and the orthographic projection of the second conductive connecting member on the piezoelectric substrate are connected to or overlapped with each other. 8 . The surface acoustic wave resonator device according to claim 5 , wherein the first conductive connection member and the second conductive connection member are in contact with a side wall of the first conductive extension portion and a side wall of the second conductive extension portion, respectively.

9. The surface acoustic wave resonator device according to claim 8, wherein The first conductive connecting member also covers a portion of the surface of the first conductive extension portion away from the first intermediate layer; or The second conductive connecting member also covers a portion of the surface of the second conductive extension away from the first intermediate layer.

10. The surface acoustic wave resonator device according to claim 5, wherein the first conductive extension portion overlaps the connection portion of the first interdigital electrode in the third direction; or The second conductive extension portion overlaps the connection portion of the second interdigital electrode in the third direction.

11. The surface acoustic wave resonator device according to claim 5, wherein the first conductive extension portion overlaps the first interdigital electrode lead-out portion in the third direction; or The second conductive extension portion overlaps the second interdigital electrode lead-out portion in the third direction.

12. The surface acoustic wave resonator device according to claim 4, wherein a side wall of the first conductive body portion is aligned with a side wall of the first end portion of the second interdigital electrode in the third direction; or The sidewall of the second conductive body portion is aligned with the sidewall of the first end portion of the first interdigital electrode in the third direction.

13. The surface acoustic wave resonator device according to claim 4, wherein The first conductive extension portion is located between the first conductive body portion and the first interdigital electrode in the third direction and extends through the first intermediate layer to connect the first conductive body portion to the first interdigital electrode; or The second conductive extension portion is located between the second conductive body portion and the second interdigital electrode in the third direction and extends through the first intermediate layer to connect the second conductive body portion to the second interdigital electrode.

14. The surface acoustic wave resonator device according to any one of claims 1 to 13, wherein the first conductive structure and the second conductive structure constitute a noise suppression structure.

15. The surface acoustic wave resonator device according to any one of claims 1 to 13, wherein the first intermediate layer comprises a temperature compensation layer.

16. The surface acoustic wave resonator device according to claim 15, wherein the first intermediate layer comprises: A first intermediate sublayer extending along the surface of the IDT on the piezoelectric substrate; as well as A second intermediate sublayer is located on a side of the first intermediate sublayer away from the piezoelectric substrate, and the first intermediate sublayer and the second intermediate sublayer include different materials; The interdigital transducer and the second intermediate sublayer are separated by the first intermediate sublayer.

17. A surface acoustic wave resonator device, comprising: Piezoelectric substrate; An interdigital transducer is disposed on one side of the piezoelectric substrate, has an interdigital electrode region, and includes first interdigital electrodes and first interdigital electrode lead-out portions connected to each other, and second interdigital electrodes and second interdigital electrode lead-out portions connected to each other; the first interdigital electrodes and the second interdigital electrodes are located in the interdigital electrode region, extend along a first direction and are alternately arranged in a second direction, and the first direction and the second direction intersect; The first interdigital electrode lead-out portion and the second interdigital electrode lead-out portion are located at opposite sides of the interdigital electrode region in the first direction; A first intermediate layer is disposed on one side of the piezoelectric substrate and covers the interdigital transducer; as well as The first conductive structure and the second conductive structure are located on a side of the first intermediate layer away from the piezoelectric substrate, are spaced apart from each other in the first direction, and each overlaps with an end portion of the first interdigital electrode and the second interdigital electrode in a third direction perpendicular to the main surface of the piezoelectric substrate, The first conductive structure is electrically connected to one of the first interdigital electrode and the second interdigital electrode, and the second conductive structure is electrically connected to the other of the first interdigital electrode and the second interdigital electrode.

18. The surface acoustic wave resonator device according to claim 17, further comprising: The second intermediate layer is located at a side of the first intermediate layer away from the piezoelectric substrate and covers the first conductive structure and the second conductive structure.

19. The surface acoustic wave resonator device according to claim 18, wherein at least a portion of the first intermediate layer and at least a portion of the second intermediate layer together constitute a temperature compensation layer.

20. The surface acoustic wave resonator device according to claim 18, wherein The second intermediate layer comprises: a third intermediate sublayer, covering the first conductive structure and the second conductive structure on the first intermediate layer; as well as a fourth intermediate sublayer, located on a side of the third intermediate sublayer away from the first intermediate layer, and the third intermediate sublayer and the fourth intermediate sublayer include different materials, The third intermediate sublayer separates the first conductive structure from the fourth intermediate sublayer, and separates the second conductive structure from the fourth intermediate sublayer.

21. A filter comprising the surface acoustic wave resonator device according to any one of claims 1 to 20.

22. A method for manufacturing a surface acoustic wave resonator device, comprising: providing a piezoelectric substrate; An interdigital transducer is formed on the piezoelectric substrate, wherein the interdigital transducer has an interdigital electrode region and includes first interdigital electrodes and first interdigital electrode lead-out portions connected to each other, and second interdigital electrodes and second interdigital electrode lead-out portions connected to each other; the first interdigital electrodes and the second interdigital electrodes are located in the interdigital electrode region, extend along a first direction and are alternately arranged in a second direction, and the first direction and the second direction intersect; The first interdigital electrode lead-out portion and the second interdigital electrode lead-out portion are located at opposite sides of the interdigital electrode region in the first direction; forming a first intermediate layer on one side of the piezoelectric substrate to cover the interdigital transducer; forming a first conductive structure and a second conductive structure on a side of the first intermediate layer away from the piezoelectric substrate, the first conductive structure and the second conductive structure being spaced apart from each other in the first direction and respectively overlapping with end portions of the first interdigital electrode and the second interdigital electrode in a third direction perpendicular to the main surface of the piezoelectric substrate; as well as A passivation layer is formed on a side of the first intermediate layer away from the piezoelectric substrate, wherein the passivation layer covers and contacts the first conductive structure and the second conductive structure.

23. The method for manufacturing a surface acoustic wave resonator device according to claim 22, wherein the first conductive structure is electrically connected to one of the first interdigital electrode and the second interdigital electrode, and the second conductive structure is electrically connected to the other of the first interdigital electrode and the second interdigital electrode.

24. The method for manufacturing a surface acoustic wave resonator device according to claim 22 or 23, further comprising: forming a first conductive connection member, wherein the first conductive connection member extends through the first intermediate layer to be connected to the first interdigital electrode lead-out portion; as well as forming a second conductive connection member, the second conductive connection member extending through the first intermediate layer to be connected to the second interdigital electrode lead-out portion, The first conductive connection member and the second conductive connection member are also connected to the first A conductive structure and the second conductive structure. 25 . The method for manufacturing a surface acoustic wave resonator device according to claim 24 , wherein the first conductive connection member at least contacts a sidewall of the first conductive structure, and the second conductive connection member at least contacts a sidewall of the second conductive structure.

26. The method for manufacturing a surface acoustic wave resonator device according to claim 24 or 25, further comprising: A second intermediate layer is formed on a side of the first intermediate layer away from the piezoelectric substrate to cover the first conductive structure and the second conductive structure, wherein forming the first conductive connection member and the second conductive connection member comprises: Performing a patterning process on the second intermediate layer and the first intermediate layer to form a first opening and a second opening, wherein the first opening extends through the second intermediate layer and the first intermediate layer to expose a portion of the surface of the first interdigitated electrode lead-out portion and also exposes at least a sidewall of the first conductive structure, and the second opening extends through the second intermediate layer and the first intermediate layer to expose a portion of the surface of the second interdigitated electrode lead-out portion and also exposes at least a sidewall of the second conductive structure; and The first conductive connection member and the second conductive connection member are formed in the first opening and the second opening, respectively.

27. The method for manufacturing a surface acoustic wave resonator device according to claim 26, wherein the first opening further exposes a portion of the surface of the first conductive structure away from the first intermediate layer, so that the first conductive connection member further contacts the portion of the surface of the first conductive structure, or The second opening further exposes a portion of the surface of the second conductive structure away from the first intermediate layer, so that the second conductive connection member further contacts the portion of the surface of the second conductive structure.

28. The method for manufacturing a surface acoustic wave resonator device according to claim 22, wherein Forming the first conductive structure and the second conductive structure includes: Performing a patterning process on the first intermediate layer to form a first via hole and a second via hole, wherein the first via hole and the second via hole respectively expose a portion of the surface of the first interdigital electrode and the second interdigital electrode; as well as forming a conductive material on the first intermediate layer and in the first via hole and the second via hole, and performing a patterning process on the conductive material to form the first conductive structure and the second conductive structure, The first conductive structure and the second conductive structure are electrically connected to the first interdigital electrode and the second interdigital electrode through the first via hole and the second via hole, respectively.

29. The method for manufacturing a surface acoustic wave resonator device according to any one of claims 22 to 28, wherein forming the first intermediate layer comprises: forming a first intermediate sublayer on the piezoelectric substrate to cover the interdigital transducer; as well as forming a second intermediate sublayer on a side of the first intermediate sublayer away from the piezoelectric substrate, The first intermediate sublayer and the second intermediate sublayer include different materials.

30. The method for manufacturing a surface acoustic wave resonator device according to claim 29, wherein The second intermediate sublayer includes silicon oxide and is formed by a deposition process; and During the formation of the second intermediate sub-layer, the first intermediate sub-layer isolates the IDT from oxygen in a deposition chamber.

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