Photon computing method and apparatus, and computer device

Abstract

Provided in the present invention are a photon computing method and apparatus, and a computer device. The method comprises: acquiring first data, wherein the first data comprises a plurality of first elements, and each first element represents a number; in an electron domain, splitting each first element in the first data into a plurality of parts; in a photon domain, using optical signals to represent the plurality of parts after each first element of the first data is split; and performing optical processing on the optical signals, so as to indicate that computing is performed on the plurality of first elements.

Description

Photon computing method, device, and computer equipment

[0001] This application claims priority to the Chinese patent application filed with the China Patent Office on September 8, 2023, with application number 202311165861.0 and application name “Photonic Computing Method, Device, and Computer Equipment,” the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present invention relates to the field of photon computing technology, and more specifically, to a photon computing method, a photon computing device, and a computer device. Background Art

[0003] Modern society's demand for computing power is ever-increasing. Chips are the hardware foundation of computing. Traditional chips use electrical signals to represent information and perform calculations (processing information). Physically, these chips are primarily based on integrated circuits composed of CMOS transistors. For decades, integrated circuit chip development has largely followed the empirical law outlined by Moore, which states that the number of transistors that can be accommodated on an integrated circuit doubles approximately every 18 to 24 months. To support this growth, the feature size of transistors has also been shrinking, approaching physical limits.

[0004] Currently, it has been proposed to use light for computing.

[0005] Summary of the Invention

[0006] The present invention provides a photon computing method, a photon computing device, and a computer device to solve the above-mentioned defects in the prior art.

[0007] In a first aspect, an embodiment of the present invention provides a method for photonic computing, the method comprising: acquiring first data, the first data comprising a plurality of first elements, each first element representing a number; in an electronic domain, splitting each first element in the first data into a plurality of parts; in a photon domain, using an optical signal to represent the plurality of parts after each first element of the first data is split, and optically processing the optical signal to thereby represent calculations on the plurality of first elements.

[0008] In some embodiments of the present invention, splitting each first element in the first data into multiple parts in the electronic domain includes: splitting the first element along bits in the electronic domain.

[0009] In some embodiments of the present invention, splitting each first element in the first data into multiple parts includes: using a group of first electrical signals to represent the multiple parts after the first element is split, and using multiple groups of first electrical signals to represent the multiple first elements respectively.

[0010] In some embodiments of the present invention, using optical signals to represent the multiple parts of each first element of the first data includes: using a group of optical signals to represent the multiple parts of the first element, and using multiple groups of optical signals to respectively represent the multiple first elements. Using multiple groups of optical signals to respectively represent the multiple first elements may include: modulating multiple light channels according to the multiple groups of first electrical signals to generate multiple groups of optical signals respectively representing the multiple first elements.

[0011] In some embodiments of the present invention, the method further includes: obtaining second data, the second data including a plurality of second elements, each second element representing a number. The calculation includes multiplying each first element of the first data by a corresponding second element of the second data. In some embodiments of the present invention, multiplying each first element of the first data by a corresponding second element of the second data includes: representing the second data using an electrical signal; using the electrical signal representing the second data as a control signal for an optical computing unit; and optically processing the plurality of optical signals using the optical computing unit under control of the control signal.

[0012] In some embodiments of the present invention, the method further comprises: splitting each second element in the second data into a plurality of parts in the electronic domain. In some embodiments of the present invention, splitting each second element in the second data into a plurality of parts in the electronic domain comprises: splitting the second element along bits in the electronic domain.

[0013] In some embodiments of the present invention, splitting each second element in the second data into multiple parts in the electronic domain includes: using a group of second electrical signals to represent the multiple parts after the second element is split, and using multiple groups of second electrical signals to respectively represent the multiple second elements.

[0014] In some embodiments of the present invention, multiplying each first element of the first data by the corresponding second element of the second data includes: using the multiple sets of second electrical signals as control signals for an optical computing unit; and optically processing the multiple sets of optical signals using the optical computing unit under control of the control signals. Optionally, the optical computing unit includes a Mach-Zehnder interferometer.

[0015] In some embodiments of the present invention, the first data includes at least a portion of elements in a vector or a matrix, and the second data includes at least a portion of elements in a vector or a matrix.

[0016] In some embodiments of the present invention, the method further includes: converting the optical signal output after the optical processing into a plurality of digital electrical signals; and performing an accumulation operation on the numbers represented by the plurality of digital electrical signals. In some embodiments of the present invention, the method further includes: before performing the accumulation operation, performing a scaling operation on the numbers represented by the digital electrical signals, or performing a shift operation on the numbers represented in binary form.

[0017] In some embodiments of the present invention, multiplying each first element of the first data by the corresponding second element of the second data includes: performing optical processing representing a multiplication operation on the multiple parts after the first element is split and the multiple parts after the second element is split in the photon domain. In some embodiments of the present invention, the method also includes converting the optical signal after the optical processing into an analog electrical signal, and performing a summation operation on the numbers represented by the analog electrical signal to obtain multiple first summation results, each of which represents the sum of multiple products obtained by multiplying a certain part after the first elements are split by a certain part after the corresponding second elements are split.

[0018] In some embodiments of the present invention, the method further includes: performing a mapping operation on the plurality of first summation results to obtain a plurality of intermediate results, wherein the mapping operation is to scale the first summation results or to keep them unchanged, and at least one of the mapping operations is a scaling operation; and performing an accumulation operation on the plurality of intermediate results to obtain a second summation result, wherein at least one of the plurality of intermediate results is to keep its corresponding first summation result unchanged.

[0019] In some embodiments of the present invention, the method includes: converting analog electrical signals representing the multiple first summation results into digital electrical signals, and representing the multiple first summation results in binary form; and performing shift processing on at least two of the binary first summation results.

[0020] In a second aspect, embodiments of the present invention provide a photonic computing device, comprising: a first data splitting module configured to split each first element in first data into multiple parts in an electronic domain, wherein the first data includes multiple first elements, each of which represents a number; and an optical processing module configured to use an optical signal in the photon domain to represent the multiple parts of each first element of the first data after being split, and to optically process the optical signal to represent a calculation on the multiple first elements. In some embodiments of the present invention, in the electronic domain, the first element is split along the bit position.

[0021] In some embodiments of the present invention, the first data splitting module splits each first element in the first data into multiple parts in the electronic domain, including: using a group of first electrical signals to represent the multiple parts after the first element is split, and using multiple groups of first electrical signals to respectively represent the multiple first elements.

[0022] In some embodiments of the present invention, the optical processing module uses optical signals in the photon domain to represent the multiple parts after each first element of the first data is split, including: using a group of optical signals to represent the multiple parts after the first element is split, and using multiple groups of optical signals to represent the multiple first elements respectively.

[0023] In some embodiments of the present invention, using multiple groups of optical signals to respectively represent the multiple first elements includes: modulating multiple paths of light according to the multiple groups of first electrical signals to generate multiple groups of optical signals respectively representing the multiple first elements.

[0024] In some embodiments of the present invention, the photonic computing device further includes a second data splitting module configured to split each second element in the second data into a plurality of parts in the electronic domain, wherein the second data includes a plurality of second elements, each second element representing a number. In some embodiments of the present invention, the second element is split along the bit direction in the electronic domain.

[0025] In some embodiments of the present invention, the second data splitting module splits each second element in the second data into multiple parts in the electronic domain, including: using a group of second electrical signals to represent the multiple parts after the second element is split, and using multiple groups of second electrical signals to respectively represent the multiple second elements.

[0026] In some embodiments of the present invention, the optical processing module includes an optical computing unit. The optical processing of the optical signals by the optical module includes: using the multiple sets of second electrical signals as control signals for the optical computing unit; and optically processing the multiple sets of optical signals using the optical computing unit under the control of the control signals. Optionally, the optical computing unit includes a Mach-Zehnder interferometer.

[0027] In some embodiments of the present invention, the first data includes a vector, and the second data includes a matrix.

[0028] In some embodiments of the present invention, the photonic computing device further comprises:

[0029] an optical-to-electrical conversion module configured to convert the optical signal output after the optical processing into an analog electrical signal;

[0030] a summation processing module, configured to perform summation processing on the numbers represented by the analog electrical signals to obtain a plurality of summation results;

[0031] a scaling processing module configured to perform scaling processing on at least one of the plurality of summation results respectively; and

[0032] The accumulation module is configured to accumulate the summation result after the scaling process and the summation result before the scaling process.

[0033] In some embodiments of the present invention, the photonic computing device further comprises:

[0034] an optical-to-electrical conversion module configured to convert the optical signal output after the optical processing into an analog electrical signal;

[0035] a summation processing module, configured to perform summation processing on the numbers represented by the analog electrical signals to obtain a plurality of summation results;

[0036] an analog-to-digital conversion module configured to convert the analog electrical signal representing the summation result into a digital electrical signal and represent the summation result in binary form;

[0037] a shift module configured to perform a shift operation on at least one of the binary summation results; and

[0038] The accumulation module is configured to accumulate the summation results that have undergone the shift operation and the summation results that have not undergone the shift operation among the multiple summation results.

[0039] In a third aspect, an embodiment of the present invention further provides a method for photonic computing, comprising: acquiring first data, the first data comprising a plurality of first elements, each first element representing a number; in a photon domain, using an optical signal to represent the first data; optically processing the optical signal to thereby represent calculations on the corresponding plurality of first elements; in an analog electronic domain, performing a first summation operation on the processing result represented by the analog electrical signal; and in a digital electronic domain, performing a second summation operation on the processing result represented by the digital electrical signal.

[0040] In some embodiments of the present invention, the method further includes converting the optically processed optical signal into the analog electrical signal; the first summation operation includes performing a summation operation according to the number represented by the analog electrical signal to obtain multiple first summation results.

[0041] In some embodiments of the present invention, the processing result represented by the digital electrical signal includes the first summation result; wherein the second summation operation includes: generating a second summation result based on the first summation result.

[0042] In some embodiments of the present invention, the method further includes performing a shift operation on at least one of the first summation results represented by the digital electrical signal, and performing the second summation operation after the shift operation.

[0043] In some embodiments of the present invention, the method further includes performing scaling processing on at least one of the multiple first summation results to obtain at least one corresponding intermediate result.

[0044] In a fourth aspect, an embodiment of the present invention provides a computer device comprising the photonic computing device described in any embodiment of the present invention.

[0045] According to embodiments of the present invention, at least one of the following technical effects can be achieved: improving optical computing efficiency or accuracy, reducing the difficulty of hardware implementation of computing systems, for example, reducing the performance requirements of related hardware such as photoelectric conversion, electro-optical conversion, or modulators, or being more suitable for specific computing tasks such as multiplication, multiplication-then-summation calculations, or matrix calculations. Various aspects, features, and advantages of the embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings. The above-mentioned aspects, features, and advantages of the present invention will become more apparent from the detailed description below in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] FIG1 is a flow chart of a method for photon computing according to an embodiment of the present invention.

[0047] FIG2 is a flow chart of a method for photon computing according to another embodiment of the present invention.

[0048] FIG3 is a flow chart of a method for photon computing according to another embodiment of the present invention.

[0049] FIG4 is a block diagram of a photonic computing device according to an embodiment of the present invention.

[0050] FIG5 is a block diagram of a photonic computing device according to another embodiment of the present invention.

[0051] FIG6 is a block diagram of a photonic computing device according to another embodiment of the present invention.

[0052] FIG. 7 is a diagram illustrating an example of splitting an input number according to an embodiment of the present invention.

[0053] FIG8 is a schematic diagram illustrating an example architecture of a photonic computing device according to an embodiment of the present invention.

[0054] FIG. 9 is a diagram illustrating an example of input vectors and matrices according to an embodiment of the present invention.

[0055] FIG. 10 is a schematic diagram illustrating the logic of the photon computing method of the present invention for processing the input data shown in FIG. 9 . DETAILED DESCRIPTION

[0056] In order to facilitate understanding of the various aspects, features and advantages of the technical solution of the present invention, the present invention is described in detail below with reference to the accompanying drawings. It should be understood that the various embodiments described below are only for illustration and are not intended to limit the scope of protection of the present invention.

[0057] The terms used herein are for the purpose of describing specific embodiments and are not intended to limit the present invention. As used herein, the wording "a" is intended to include plural cases unless the context clearly indicates a single quantity. The terms "first," "second," or other similar expressions are used to distinguish objects and do not imply an order or sequence unless the order is clearly indicated. When referring to an inventor, this refers to the inventor of the present disclosure (this application).

[0058] The embodiments of the present invention do not impose any particular limitation on the order in which the steps are executed, as long as the purpose or function of the invention can be achieved. Some steps or orders may be executed in parallel, sequentially, or alternately.

[0059] The inventors have conducted research on photonic computing. They have discovered that, in some cases, certain aspects of current photonic computing still require the input / output of electrical signals, such as the need to communicate electrical signals with traditional electrical signal chips. Consequently, signals require conversions such as electro-optical conversion, photoelectric conversion, and analog-to-digital conversion. For example, signals need to undergo analog-to-digital conversion from the photonic domain / analog electronic domain to the digital electronic domain. However, current analog-to-digital conversion technology struggles to achieve high-speed and high-precision signal conversion (e.g., greater than 8-bit accuracy), meaning that high-speed and high-precision analog-to-digital conversion has reached its limit. On the other hand, sufficient data accuracy is required in some calculations to ensure the accuracy of the calculation results. For example, some artificial intelligence calculations require 8-bit data precision input to maintain accuracy. However, after various calculations and processing, the data representing the calculation results requires at least 16-bit precision to ensure accuracy. Therefore, in optical computing, using optical signals to represent 16-bit data, and using a conventional 8-bit analog-to-digital converter during the conversion of the optical signal into the final digital electrical signal, will obviously reduce data accuracy, resulting in a decrease in the overall accuracy of the calculation model or algorithm.

[0060] In addition, in some systems that implement photonic computing, it is also beneficial to reduce the design / manufacturing difficulty of hardware such as electro-optical conversion and modulators.

[0061] The primary purpose of this invention is to provide a photonic computing solution suitable for practical computing scenarios. This solution can achieve at least one of the following technical effects: improving the efficiency or accuracy of optical computing; reducing the difficulty of hardware implementation for computing systems, such as lowering the performance requirements for related hardware such as photoelectric conversion, electro-optical conversion, or modulators; or improving suitability for specific computing tasks such as multiplication, multiplication-then-summation, and matrix calculations.

[0062] FIG1 shows the processing process of the photon computing method according to one embodiment of the present invention. In this embodiment, the photon computing method proposed by the present invention includes: S101, obtaining first data, wherein the first data includes multiple first elements, each of which represents a number; S102, in the electronic domain, splitting each first element in the first data into multiple parts; S103, in the photon domain, using an optical signal to represent the multiple parts after each first element of the first data is split; S104, optically processing the optical signal to represent the calculation of the multiple first elements. In some embodiments of the present invention, step S101 is performed in the electronic domain, for example, the first data to be processed in the form of an analog electrical signal or a digital electrical signal is input.

[0063] In some embodiments of the present invention, in step S102, each first element in the first data may be split into multiple parts in the digital electronic domain.

[0064] In some embodiments of the present invention, in step S102, splitting each first element in the first data into multiple parts includes: using a group of first electrical signals to represent the multiple parts after the first element is split, and using multiple groups of first electrical signals to represent the multiple first elements respectively. That is, for the multiple first elements, since each of the first elements is split, it is necessary to use multiple groups of first electrical signals to represent the multiple first elements. The first element can be in the form of a binary number or a decimal number, for example, but is not limited thereto. The group of electrical signals can include at least 2 electrical signals, and the electrical signals can be current signals, voltage signals, digital electrical signals, or analog electrical signals. As shown in Figure 7, the binary number "11010100" is split into the high-order part: "1101" and the low-order part: "0100". For example, the low-order portion can be represented by an analog electrical signal A1, and the high-order portion can be represented by an analog electrical signal A2. A set of electrical signals including A1 and A2 can completely represent the two parts of the first element "11010100" after being split, thereby representing the first element "11010100". In some embodiments, multiple electrical signals are required to fully represent the low-order portion, or multiple electrical signals are required to fully represent the high-order portion. For example, to represent the low-order portion, two analog electrical signals A1 and A2 are used, and to represent the high-order portion, two analog electrical signals A3 and A4 are used. In this case, the set of electrical signals representing the first element includes four electrical signals: A1, A2, A3, and A4. In some embodiments, the low-order portion can be represented by multiple digital electrical signals, and the high-order portion can be represented by another multiple digital electrical signals. Thus, a set of first electrical signals can be used to represent the multiple parts (high-order portion, low-order portion) after the first element is split. The set of first electrical signals, or the electrical signals used to represent the high-order part and the low-order part, can be used as driving signals of the modulator to modulate light, thereby using optical signals to represent the multiple parts after each first element of the first data is split.

[0065] In some embodiments of the present invention, in step S103, the use of optical signals to represent the multiple parts after each first element of the first data is split includes: using a group of optical signals to represent the multiple parts after the first element is split, and using multiple groups of optical signals to respectively represent the multiple first elements. In an exemplary embodiment of the present invention, the use of multiple groups of optical signals to respectively represent the multiple first elements may include: modulating multiple channels of light according to the multiple groups of first electrical signals to generate multiple groups of optical signals respectively representing the multiple first elements. Modulating multiple channels of light according to the multiple groups of first electrical signals may, for example, be the first electrical signal directly driving a modulator to modulate the light, or may be, for example, converting the first electrical signal into a suitable electrical signal to drive the modulator through a signal conversion circuit. The present invention is not limited to this, and the present invention may also use other electro-optical conversion methods known in the art to convert the multiple groups of first electrical signals into multiple groups of optical signals.

[0066] In some embodiments of the present invention, in step S104, optically processing the optical signal includes performing optical processing such as modulation and interference on the optical signal. For example, a Mach-Zehnder interferometer may be used to perform interference processing on the optical signal to represent calculation of the corresponding multiple first elements.

[0067] By decomposing input data in the electronic domain and then performing computational processing in the photon domain, this method improves computing power through photon-domain calculations, achieving good accuracy even with long input data bit widths. Furthermore, it can reduce the hardware implementation complexity of computing systems, for example, lowering the performance requirements for related hardware such as photoelectric converters, analog-to-digital converters, and digital-to-analog converters, and thus reducing design and manufacturing complexity.

[0068] FIG2 shows a processing process of a photon computing method according to another embodiment of the present invention. In this embodiment, the photon computing method proposed by the present invention includes: S101, obtaining first data, wherein the first data includes multiple first elements, each of which represents a number; S102, in the electronic domain, splitting each first element in the first data into multiple parts; S103, in the photon domain, using optical signals to represent the multiple parts of each first element of the first data; S104, optically processing the optical signals to represent the calculation of the multiple first elements; S105, converting the optical signals output after the optical processing into multiple groups of digital electrical signals; S106, performing an accumulation operation on the numbers represented by the multiple groups of digital electrical signals.

[0069] Here, performing an accumulation operation on the numbers represented by the multiple groups of digital electrical signals means performing the accumulation operation in the digital electronic domain.

[0070] In some embodiments of the present invention, in step S105, converting the optical signal output after the optical processing into a plurality of digital electrical signals includes converting the optical signal output after the optical processing into an analog electrical signal through photoelectric conversion, such as using a photodiode, and then converting the analog electrical signal into a plurality of digital electrical signals through analog-to-digital conversion. In some embodiments of the present invention, since the first element is split and then calculated separately, scaling operations need to be performed on the split numbers in subsequent steps to restore the actual calculation results.

[0071] FIG3 shows a processing process of a photon computing method according to another embodiment of the present invention. In this embodiment, the photon computing method proposed by the present invention includes: S101, obtaining first data (e.g., a vector), the first data including multiple first elements, each of which represents a number; S102, in the electronic domain, splitting each first element in the first data into multiple parts; S103, in the photon domain, using an optical signal to represent the multiple parts of each first element of the first data after being split; S201, obtaining second data (e.g., a matrix), the second data including multiple second elements, each of which represents a number; S202, in the electronic domain, splitting each second element in the second data into multiple parts; S203, using a group of second electrical signals to represent the multiple parts of the second element after being split, and using multiple groups of second electrical signals to represent the multiple second elements respectively; S301, using the multiple groups of second electrical signals as control signals of an optical computing unit (e.g., a Mach-Zehnder interferometer). signal, the optical computing unit optically processes the multiple groups of optical signals under the control of the control signal to represent multiplying each part of the first element of the first data by each part of the corresponding second element in the second data; S302, converting the optically processed optical signal into an analog electrical signal, and performing a summation operation on the number (processing result) represented by the analog electrical signal to obtain a plurality of first summation results, wherein each first summation result represents the sum of a plurality of products obtained by multiplying a certain part after the first elements are split by a certain part after the corresponding second elements are split; S303, obtaining a plurality of intermediate results according to the plurality of first summation results by respectively performing a mapping operation, wherein the mapping operation is to scale the first summation result or keep it unchanged, and at least one mapping operation is a scaling operation; S304, performing an accumulation operation on the plurality of intermediate results to obtain a second summation result.

[0072] The “sum operation” in step S302 may also be referred to as a first sum operation; and the accumulation operation in step S304 may be referred to as a second sum operation.

[0073] For example, in step S102, each first element in the first data may be split into multiple parts in the digital electronic domain. In step S202, each second element in the second data may be split into multiple parts in the digital electronic domain.

[0074] In some embodiments, the first summation operation and the second summation operation are performed in the analog electronic domain and the digital electronic domain, respectively, which can improve the efficiency of the calculation and reduce the requirements for the design of the analog-to-digital conversion circuit. The present invention does not specifically limit the order in which the steps are executed, as long as the purpose or function of the invention can be achieved. Some steps or sequences can be executed in parallel, sequentially, or alternately. For example, the execution order of steps S201 to S203 and steps S101 to S103 is not limited and can be executed in parallel, sequentially, or alternately.

[0075] Exemplarily, the first data may include elements in a tensor, and the second data may include elements in a tensor. Exemplarily, the first data includes multiple elements in a vector or a matrix, and the second data includes multiple elements in a vector or a matrix. Exemplarily, the elements of the first data may include each element in a vector V, and the second data may include each element of a column in a matrix M. By performing a dot product operation (dot product operation) on the first data and the second data, at least part of the multiplication calculation of the vector V and the matrix M can be completed. Among them, the dot product operation generally includes first performing multiplication operations on multiple first elements and corresponding multiple second elements respectively, and then summing the results of each multiplication operation.

[0076] In some embodiments of the present invention, the scaling process performed in step S303 may include or be replaced by the following process: converting the analog electrical signal representing the first summation result into a digital electrical signal and representing the first summation result in binary form; and performing a shift process on the first summation result in binary form. For example, in steps S102 and S202, similar to FIG7 , the 8-bit first element is split into the first upper 4 bits and the first lower 4 bits, and the 8-bit second element is split into the second upper 4 bits and the second lower 4 bits, wherein the dot product of the portion corresponding to the first upper 4 bits and the portion corresponding to the second upper 4 bits (i.e., the binary summation result) is shifted left by 8 bits, the dot product of the portion corresponding to the first upper 4 bits and the portion corresponding to the second lower 4 bits is shifted left by 4 bits, the dot product of the portion corresponding to the second lower 4 bits and the portion corresponding to the second upper 4 bits is shifted left by 4 bits, and the dot product of the portion corresponding to the second lower 4 bits and the portion corresponding to the second upper 4 bits is shifted left by 4 bits. The dot product of the portion corresponding to the second lower 4 bits and the portion corresponding to the second lower 4 bits is not shifted.

[0077] In step S304, the embodiment of the present invention performs a cumulative operation (second summation operation) on the plurality of intermediate results, and outputs the result as the calculation result of the mathematical operation required for the first data and the second data. It should be understood that the present invention is applicable not only to binary data, but also to data in other bases.

[0078] In one exemplary embodiment, a photonic computing method includes obtaining first data, the first data comprising multiple first elements, each of which represents a number; representing the first data in a photonic domain using an optical signal; optically processing the optical signal to represent a calculation performed on the corresponding multiple first elements; performing a first summation operation on the processing result represented by the analog electrical signal in an analog electronic domain; and performing a second summation operation on the processing result represented by the digital electrical signal in a digital electronic domain. The first and second summation operations can improve the accuracy of photonic computing and reduce the performance requirements of certain hardware in the photonic computing device.

[0079] In some embodiments of the present invention, the method further includes converting the optically processed optical signal into the analog electrical signal; and the first summation operation includes performing a summation operation based on the analog electrical signal to obtain a plurality of first summation results.

[0080] In some embodiments of the present invention, the processing result represented by the digital electrical signal includes the first summation result; wherein the second summation operation includes: generating a second summation result based on the first summation result.

[0081] In some embodiments of the present invention, the method further includes performing a shift operation on at least one of the first summation results represented by the digital electrical signal, and performing the second summation operation after the shift operation.

[0082] Corresponding to the photonic computing method, the present invention also provides a photonic computing device. Figure 4 shows a photonic computing device 10 according to one embodiment of the present invention, which includes: a first data splitting module 100, configured to split each first element in first data into multiple parts in the electronic domain, wherein the first data includes multiple first elements, each of which represents a number; and an optical processing module 300, configured to use optical signals in the photonic domain to represent the multiple parts of each first element of the first data after splitting, and optically process the optical signals to represent the calculation of the multiple first elements.

[0083] In some embodiments of the present invention, the first data splitting module 100 splits each first element in the first data into multiple parts in the electronic domain, including: using a group of first electrical signals to represent the multiple parts after the first element is split, and using multiple groups of first electrical signals to respectively represent the multiple first elements.

[0084] In some embodiments of the present invention, the optical processing module 300 uses optical signals in the photon domain to represent the multiple parts of each first element of the first data, including: using a group of optical signals to represent the multiple parts of the first element, and using multiple groups of optical signals to represent the multiple first elements. In some embodiments of the present invention, the optical processing module 300 includes an optical modulator configured to modulate multiple light paths according to the multiple groups of first electrical signals to generate multiple groups of optical signals representing the multiple first elements. Modulating the multiple light paths according to the multiple groups of first electrical signals can, for example, involve directly driving the modulator with the first electrical signals to modulate the light, or can also involve converting the first electrical signals into suitable electrical signals via a signal conversion circuit to drive the modulator. In some embodiments of the present invention, the optical processing module 300 includes an optical computing unit configured to optically process the optical signals to represent the calculation of the multiple first elements. Optically processing the optical signals includes performing optical processing such as modulation and interference on the optical signals. For example, the optical computing unit includes a Mach-Zehnder interferometer to perform interference processing on the optical signals.

[0085] FIG5 shows a photonic computing device 20 according to another embodiment of the present invention. Compared with FIG4 , the main difference between the two is that the photonic computing device of this embodiment further includes a second data splitting module 200, which is configured to split each second element in the second data into multiple parts in the electronic domain, wherein the second data includes multiple second elements, each of which represents a number. In some embodiments, the second data splitting module 200 splits each second element in the second data into multiple parts in the electronic domain, including: using a group of second electrical signals to represent the multiple parts after the second element is split, and using multiple groups of second electrical signals to respectively represent the multiple second elements.

[0086] In some embodiments of the present invention, the optical processing module 300 includes an optical computing unit. The optical processing of the optical signals by the optical module 300 includes: using the multiple sets of second electrical signals from the second data splitting module 200 as control signals for the optical computing unit; and, under the control of the control signals, using the optical computing unit to optically process the multiple sets of optical signals from the first data splitting module 100. The optical computing unit may include multiple optical multipliers. Optionally, the optical computing unit includes a Mach-Zehnder interferometer.

[0087] In some embodiments of the present invention, the first data includes multiple elements in a vector or a matrix, and the second data includes multiple elements in a vector or a matrix.

[0088] FIG6 shows a photonic computing device 30 according to another embodiment of the present invention. Compared to the device shown in FIG5 , the photonic computing device 30 of this embodiment further includes: a photoelectric conversion module 400 configured to convert the optical signal processed by the optical processing module 300 and outputted into an analog electrical signal; a summation processing module 500 configured to perform summation processing (summation operation) on the numbers represented by the analog electrical signal to obtain multiple summation results; a scaling processing module 600 configured to perform scaling processing on at least one of the multiple summation results; and an accumulation module 700 configured to accumulate the scaled and unscaled summation results.

[0089] In some embodiments of the present invention, instead of the scaling processing module 600, an analog-to-digital conversion module and a shift module (e.g., the analog-to-digital conversion module 800 and the shift module 900 in FIG8 ) are provided between the summing processing module 500 and the accumulation module 700, wherein the analog-to-digital conversion module includes an analog-to-digital converter (ADC) configured to convert an analog electrical signal representing the summing result into a digital electrical signal and represent the summing result in binary form; the shift module is configured to perform a shift operation on at least one of the binary summing results; and the accumulation module 700 is configured to accumulate the summing results that have undergone the shift operation and the summing results that have not undergone the shift operation among the multiple summing results. In an optional embodiment, the scaling processing module 600 may include the shift module.

[0090] Accordingly, embodiments of the present invention further provide a computer device comprising the photonic computing device described in any embodiment of the present invention. In some embodiments, the computer device may include, but is not limited to, a personal computer, a server, or a network device.

[0091] Embodiments of the present invention can be used for dot product calculations, which can generally be used for vector-vector multiplication, vector-matrix multiplication, and matrix-matrix multiplication. Taking vector multiplication by matrix as an example, according to the multiplication rules of vectors and matrices, taking the multiplication of a 1×2 vector V1 and a 2×2 matrix M1 as an example (i.e., the vector has 1 row and 2 columns; the matrix has 2 rows and 2 columns), the dot product operation is mainly involved. Each column of the matrix can be regarded as a vector. During the calculation, it can be considered that the vector V1 is dot-producted with the first column and the second column of the matrix M1, respectively, and two dot products are performed.

[0092] As shown in Figure 8, taking the implementation of a dot product calculation as an example, for example, taking the implementation of the dot product of vector V1 and the first column of matrix M1 as an example, it is necessary to multiply each element in vector V1 with the corresponding element in the first column of matrix M1 (scalar multiplication), and then sum each product. Figure 8 shows part of the structure of the photonic computing device and some data flows. For example, each element in the vector and matrix is ​​8 bits wide.

[0093] In the electronic domain, input data is received, such as an 8-bit vector, that is, each element in the vector is represented by an 8-bit wide number, and each element of the vector is split into two parts: the lower 4 bits and the upper 4 bits (that is, the lower part and the upper part). For each element of the vector, the lower 4 bits are converted into an analog electrical signal A1 by a digital-to-analog converter (DAC) 811, and the lower 4 bits are represented by the analog electrical signal A1; the upper 4 bits are converted into an analog electrical signal A2 by a DAC 812, and the upper 4 bits are represented by the analog electrical signal A2. For vector V1, it contains two elements. In order to represent each part after the two elements are split, 4 analog electrical signals are required. Figure 8 only shows the digital-to-analog converter 811 and the digital-to-analog converter 812. The number of digital-to-analog converters can be determined according to needs, such as the number of elements in the vector and the number of multiple parts after splitting.

[0094] In the photon domain, an optical modulator (not shown in FIG8 ) can be used to modulate a light path according to an analog electrical signal A1 representing the lower 4 bits to obtain an optical signal representing the lower 4 bits, and to modulate a light path according to an analog electrical signal A2 representing the upper 4 bits to obtain an optical signal representing the upper 4 bits. The optical modulator is coupled to a DAC and an optical multiplier (not shown in FIG8 ). For each element of vector V1, the optical signal representing the lower 4 bits is input to optical multiplier 821 of optical processing module 300, and the optical signal representing the upper 4 bits is input to optical multiplier 822 of optical processing module 300. Furthermore, the elements of the first column of matrix M1 are also input to optical multipliers 821 and 822.

[0095] Exemplarily, the first column of the 2×2 matrix M1 is used as the second data, and each element of the first column is also split into a high-order part (higher 4 bits) and a low-order part (lower 4 bits).

[0096] Exemplarily, in the optical multiplier 821, the low-order parts of each element of the vector V1 are multiplied with the low-order parts of (each element of) the first column of the 2×2 matrix respectively, and the results of multiple multiplication calculations can be represented by multiple light paths and then input into the photoelectric conversion submodule 831 for processing; in addition, in the optical multiplier 821, the low-order parts of each element of the vector V1 are multiplied with the high-order parts of (each element of) the first column of the 2×2 matrix respectively, and the results of multiple multiplication calculations can be represented by multiple light paths and then input into the photoelectric conversion submodule 832 for processing.

[0097] Exemplarily, in the optical multiplier 822, the high-order parts of each element of the vector V1 are multiplied with the low-order parts of the first column (each element) of the 2×2 matrix respectively, and the results of multiple multiplication calculations can be represented by multiple light paths and then input into the photoelectric conversion submodule 833 for processing; in addition, in the optical multiplier 822, the high-order parts of each element of the vector V1 are multiplied with the high-order parts of the first column (each element) of the 2×2 matrix respectively, and the results of multiple multiplication calculations can be represented by multiple light paths and then input into the photoelectric conversion submodule 834 for processing.

[0098] The first column of the 2×2 matrix is ​​used as the second data and is split into a high-order portion and a low-order portion. In some embodiments, the multiplication calculation includes: using an analog electrical signal corresponding to the high-order portion or the low-order portion of an element of the 2×2 matrix as a control signal to control an optical multiplier to process an optical signal input to the optical multiplier, for example, controlling a Mach-Zehnder interferometer in the optical multiplier to process each optical signal input to the optical multiplier.

[0099] Among them, the optical multipliers 821 and 822 can be used as part of the optical computing unit of each embodiment of the present invention. The optical multiplier 821 can realize the multiplication of multiple numbers by multiple other numbers, and the optical multiplier 822 can realize the multiplication of multiple numbers by multiple other numbers. Exemplarily, in each embodiment of the present invention, the optical computing unit may include multiple optical multipliers, and the optical multipliers can realize the multiplication of multiple numbers by multiple other numbers, and the optical processing module may include multiple optical computing units. Exemplarily, the number of optical multipliers can be determined based on the multiple parts into which the elements of the first data are split, for example, the multiple parts after the split correspond to multiple optical multipliers respectively.

[0100] The output of the optical multiplier 821 (i.e., the processed optical signal) is converted into an analog electrical signal by the photoelectric conversion submodules 831 and 832 of the photoelectric conversion module 400; the output of the optical multiplier 822 (i.e., the processed optical signal) is converted into an analog electrical signal by the photoelectric conversion submodules 833 and 834. In some embodiments, each photoelectric conversion submodule includes two photodiodes and outputs two analog electrical signals. Specifically, the photoelectric conversion submodules 831, 832, 833, and 834 each output two analog electrical signals, which are then input into the summation processing module 500 for summation processing to obtain a summation result (which belongs to the dot product), and the summation result is input into the analog-to-digital conversion module 800 for analog-to-digital conversion to obtain a dot product represented by a digital signal. As shown in Figure 8, the summation processing module 500 includes summing units 871, 872, 873, and 874, and the analog-to-digital conversion module 800 includes ADCs 841, 842, 843, and 844. The two analog electrical signals output by the photoelectric conversion submodule 831 are input to the summing unit 871 for summing processing to obtain a summation result (first dot product), which is converted into a first dot product in 8-bit binary form by the analog-to-digital converter (ADC) 841. The first dot product is the dot product of the low-order part of the vector and the low-order part of the first column of the matrix; the two analog electrical signals output by the photoelectric conversion submodule 832 are input to the summing unit 872 for summing processing to obtain a summation result (second dot product), which is converted into a second dot product in 8-bit binary form by the ADC 842. The second dot product is the dot product of the high-order part of the vector and the low-order part of the first column of the matrix; the two analog electrical signals output by the photoelectric conversion submodule 833 are input to the summing unit 873 for summing processing to obtain a summation result (third dot product), which is converted into a second dot product in 8-bit binary form by the ADC 842. 843 converts the analog electrical signals into an 8-bit binary third dot product, which is the dot product of the low-order portion of the vector and the high-order portion of the first column of the matrix. The two analog electrical signals output by the photoelectric conversion submodule 834 are input into the summing unit 874 for summation processing to obtain a summation result (a fourth dot product). This summation result is converted into an 8-bit binary fourth dot product by ADC 844, which is the dot product of the high-order portion of the vector and the high-order portion of the first column of the matrix. In some embodiments, before each dot product analog electrical signal is input into the ADC, it can be amplified. For example, a transimpedance amplifier can be used to amplify the amplitude of the analog electrical signal.

[0101] In the digital electronics domain, the first dot product output by ADC 841 is the dot product of the low-order portion of the vector and the low-order portion of the first column of the matrix. Therefore, this first dot product does not require shifting. As a result, the 8-bit data output by ADC 841 is directly input to accumulator 860 without passing through shift module 900.

[0102] The second dot product output by ADC 842 is the dot product of the high-order portion of the vector and the low-order portion of the first column of the matrix. Therefore, this second dot product needs to be shifted left by 4 bits. Consequently, the 8-bit data output by ADC 842 is input to shift module 900, which performs a 4-bit left shift (expanding it by a factor of 2^4) 851 on it. The shifted data is then input to accumulator 860.

[0103] The third dot product output by ADC 843 is the dot product of the low-order portion of the vector and the high-order portion of the first column of the matrix. Therefore, this third dot product needs to be shifted left by 4 bits. As a result, the 8-bit data output by ADC 843 is input to shift module 900, which performs a 4-bit left shift operation 852 on it (expanding it by a factor of 2^4). The shifted data is then input to accumulator 860.

[0104] The fourth dot product output by ADC 844 is the product of the high-order portion of the vector and the high-order portion of the first column of the matrix. Therefore, this fourth dot product needs to be shifted left by 8 bits. As a result, the 8-bit data output by ADC 844 is input to shift module 900, which performs an 8-bit left shift operation 853 on it (expanding it by a factor of 2^8). The shifted data is then input to accumulator 860.

[0105] The accumulator 860 accumulates the received unshifted and shifted summation results to obtain a 16-bit result, and outputs the 16-bit result as the calculation result of a column (e.g., the first column) in a 1×2 vector and a 2×2 matrix, where each element in the vector and matrix is ​​8 bits. The accumulator 860 can be used as an example of the accumulation module 700 shown in Figure 6, or the accumulation module 700 can include the accumulator 860.

[0106] For ease of understanding, the following describes a specific example of the present invention, in conjunction with Figures 9 and 10, in which a vector V1 is multiplied by a complete matrix M1. As shown in Figure 9, the first data is a vector V1, which is (23 204). The first data includes two first elements, 32 and 204 respectively; the second data includes a 2×2 matrix M1, namely:

[0107] As shown in Figure 10, the elements of vectors and matrices are split into two parts based on their bit positions: the first part, which is the upper 4 bits (the high-order part), and the second part, which is the lower 4 bits (the low-order part). After the split, the upper-order parts of each vector element form a new vector, and the lower-order parts of each element form another new vector. Similarly, after the split, the upper-order parts of each matrix element form a new matrix, and the lower-order parts of each matrix element form another new matrix.

[0108] Specifically, the binary number of element 32 in the vector is 0b00100000, which is split into: 0b0010 (high-order part) (corresponding to the decimal number 2), 0b0000 (low-order part) (corresponding to the decimal number 0); the binary number of element 204 in the vector is 0b11001100, which is split into: 0b1100 (high-order part) (corresponding to the decimal number 12), 0b1100 (low-order part) (corresponding to the decimal number 12). In a similar manner, each element in the 2×2 matrix is ​​split (see Figure 10). Here, "0b" represents the binary form of the number.

[0109] For ease of explanation, the following description is in the form of decimal numbers. It should be understood that the system may actually process binary numbers.

[0110] After splitting, the first part (high-order part) of the plurality of first elements in the vector includes (2 12), and the second part (low-order part) of the plurality of first elements includes (0 12).

[0111] The first part (high-order part) corresponding to each second element in the matrix after splitting is:

[0112] The second part (low-order part) corresponding to each second element in the matrix after splitting is:

[0113] The two parts of the first element are multiplied with the corresponding parts of the second element in pairs and then summed (i.e., dot products) to obtain four groups of results, where the two-by-two multiplication operation can be implemented in the photon domain, and each group of the four groups of results includes two first summation results (two dot products), each of which represents the sum of multiple products obtained by multiplying a certain part of the first element after being split with a certain part of the corresponding second element after being split. As shown in Figure 10, according to the dot product of the vector and the matrix, they are:

[0114] The dot product of the high-order parts of the first elements and the high-order parts of the corresponding second elements is 72 and 58, where 72 = 2 × 6 + 12 × 5 and 58 = 2 × 11 + 12 × 3.

[0115] The dot product of the low-order parts of multiple first elements and the high-order parts of the corresponding second elements: 60 and 36;

[0116] The dot product of the high-order parts of multiple first elements and the low-order parts of the corresponding second elements: 196 and 12;

[0117] The dot product results of the low-order parts of multiple first elements and the low-order parts of the corresponding second elements are: 168 and 12.

[0118] In the electronic domain, as shown in Figure 10, due to the splitting, the dot product results of the high-order parts of multiple first elements and the high-order parts of the corresponding second elements should be shifted left by 8 bits, and for decimal numbers, they should be multiplied by 2^8. Therefore, the dot product results of the two become: 72×(2^8)=18432 and 58×(2^8)=14848.

[0119] Due to the splitting, the dot product results of the low-order parts of multiple first elements and the high-order parts of the corresponding second elements should be shifted left by 4 bits. For decimal numbers, they should be multiplied by 2^4. Therefore, the dot product results of the two become: 60×(2^4)=960 and 36×(2^4)=576.

[0120] Due to the splitting, the dot product results of the high-order parts of multiple first elements and the low-order parts of the corresponding second elements should be shifted left by 4 bits. For decimal numbers, they should be multiplied by 2^4. Therefore, the dot product results of the two become: 196×(2^4)=3136 and 12×(2^4)=192.

[0121] Due to the splitting, the dot product results of the low-order parts of multiple first elements and the corresponding low-order parts of the second elements do not need to be shifted, so the dot product results of the two are still: 168 and 12.

[0122] Finally, the above results are accumulated (summed up) to obtain two second summation results, namely:

[0123] 18432+960+3136+168=22696, 14848+576+192+12=15628

[0124] Therefore, the vector (32 204) and the matrix The result of the multiplication is (22696 15628).

[0125] The above example uses splitting an 8-bit number into two parts and a 2×2 matrix as an example, but the present invention is not limited to this. The number of parts into which the elements in the vector and matrix are split and the number of bits in each part can be the same or different. For example, an 8-bit number can be split into two parts of 3 bits and 5 bits based on the bit position. Another example is splitting a 16-bit number into three parts of 5 bits, 5 bits, and 6 bits based on the bit position.

[0126] Those skilled in the art should understand that what is disclosed above is merely an embodiment of the present invention, and certainly cannot be used to limit the scope of rights for which the present invention is requested for patent protection. Equivalent changes made based on the embodiment of the present invention still fall within the scope covered by the claims of the present invention.

Claims

1. A method for photon computing, comprising: Acquire first data, where the first data includes a plurality of first elements, each of which represents a number; In the electronic domain, splitting each first element in the first data into a plurality of parts; In the photon domain, an optical signal is used to represent the multiple parts after each first element of the first data is split; The optical signal is optically processed to represent a calculation performed on the plurality of first elements.

2. The method according to claim 1, characterized in that The splitting each first element in the first data into a plurality of parts comprises: A group of first electrical signals is used to represent the multiple parts after the first element is split, and multiple groups of first electrical signals are used to represent the multiple first elements respectively.

3. The method according to claim 2, characterized in that The multiple parts obtained by splitting each first element of the first data using an optical signal include: A group of optical signals is used to represent the multiple parts after the first element is split, and multiple groups of optical signals are used to represent the multiple first elements respectively.

4. The method according to claim 3, characterized in that The using a plurality of groups of optical signals to respectively represent the plurality of first elements comprises: The multiple paths of light are modulated according to the multiple groups of first electrical signals to generate multiple groups of optical signals respectively representing multiple first elements.

5. The method according to claim 3, characterized in that: The method further comprises: Acquire second data, where the second data includes a plurality of second elements, and each second element represents a number; The calculation includes multiplying each first element of the first data by a corresponding second element of the second data.

6. The method according to claim 5, characterized in that The multiplying each first element of the first data by the corresponding second element of the second data comprises: using an electrical signal to represent the second data; using the electrical signal representing the second data as a control signal of the optical computing unit, Under the control of the control signal, the optical computing unit is used to optically process the plurality of groups of optical signals.

7. The method according to claim 5, characterized in that The method further comprises: In the electronic domain, each second element in the second data is split into a plurality of parts.

8. The method according to claim 7, characterized in that In the electronic domain, splitting each second element in the second data into a plurality of parts comprises: A group of second electrical signals is used to represent the multiple parts after the second element is split, and multiple groups of second electrical signals are used to represent the multiple second elements respectively.

9. The method according to claim 8, characterized in that The multiplying each first element of the first data by the corresponding second element of the second data comprises: using the plurality of sets of second electrical signals as control signals of the optical computing unit, Under the control of the control signal, the optical computing unit is used to optically process the plurality of groups of optical signals.

10. The method according to claim 9, characterized in that The optical computing unit includes a Mach-Zehnder interferometer.

11. The method according to claim 9, characterized in that The first data includes at least a portion of elements in a vector or a matrix, and the second data includes at least a portion of elements in a vector or a matrix.

12. The method according to claim 1, characterized in that The method further comprises: Converting the optical signal output after the optical processing into a plurality of sets of digital electrical signals; An accumulation operation is performed on the numbers represented by the multiple groups of digital electrical signals.

13. The method according to claim 12, characterized in that The step of splitting each first element in the first data into a plurality of parts in the electronic domain comprises: In the electronic domain, the first element is split along the bits.

14. The method according to claim 12, characterized in that The method further comprises: Before performing the accumulation operation, a scaling process is performed on the number represented by the digital electrical signal, or a shift operation is performed on the number represented in binary form.

15. The method according to claim 7, characterized in that The splitting operation on the first element and the second element includes: in the electronic domain, splitting the first element and the second element along the bit position.

16. The method according to claim 15, characterized in that The multiplying each first element of the first data by the corresponding second element of the second data comprises: In the photon domain, optical processing representing a multiplication operation is performed on the multiple parts obtained by splitting the first element and the multiple parts obtained by splitting the second element.

17. The method according to claim 16 further comprises: The optical signal after the optical processing is converted into an analog electrical signal, and the numbers represented by the analog electrical signal are summed to obtain multiple first summation results, each of which represents the sum of multiple products obtained by multiplying a certain part of the first elements after being split by a certain part of the corresponding second elements after being split.

18. The method according to claim 17, characterized in that The method further comprises: A plurality of intermediate results are obtained by respectively performing mapping operations on the plurality of first summation results, wherein the mapping operations are scaling the first summation results or keeping them unchanged, and at least one of the mapping operations is scaling; And performing an accumulation operation on the multiple intermediate results to obtain a second summation result.

19. The method according to claim 18, characterized in that At least one of the plurality of intermediate results remains unchanged as its corresponding first summation result.

20. The method according to claim 17, characterized in that The method further comprises: converting the analog electrical signals representing the plurality of first summation results into digital electrical signals, and representing the plurality of first summation results in binary form; A shift process is performed on at least two first summation results in binary form.

21. A photonic computing device, comprising: A first data splitting module is configured to split each first element in the first data into a plurality of parts in the electronic domain, wherein the first data includes a plurality of the first elements, and each of the first elements represents a number; and The optical processing module is configured to use an optical signal in a photon domain to represent the multiple parts of each first element of the first data after being split, and optically process the optical signal to represent calculation of the multiple first elements.

22. The photonic computing device according to claim 21, characterized in that: The first data splitting module splits each first element in the first data into multiple parts in the electronic domain, including: A group of first electrical signals is used to represent the multiple parts after the first element is split, and multiple groups of first electrical signals are used to represent multiple first elements respectively.

23. The photonic computing device according to claim 22, characterized in that: The optical processing module uses an optical signal in the photon domain to represent the multiple parts after each first element of the first data is split, including: A group of optical signals is used to represent the multiple parts after the first element is split, and multiple groups of optical signals are used to represent the multiple first elements respectively.

24. The photonic computing device according to claim 23, characterized in that: The using a plurality of groups of optical signals to respectively represent the plurality of first elements comprises: The multiple paths of light are modulated according to the multiple groups of first electrical signals to generate multiple groups of optical signals respectively representing multiple first elements.

25. The photonic computing device according to claim 23, characterized in that: The photonic computing device further comprises: The second data splitting module is configured to split each second element in the second data into multiple parts in the electronic domain, wherein the second data includes multiple second elements, and each second element represents a number.

26. The photonic computing device according to claim 25, characterized in that: The second data splitting module splits each second element in the second data into multiple parts in the electronic domain, including: A group of second electrical signals is used to represent the multiple parts of the second element, and multiple groups of second electrical signals are used to represent the multiple second elements respectively.

27. The photonic computing device according to claim 26, characterized in that: The optical processing module includes an optical computing unit; The optical processing module optically processes the optical signal, including: using the plurality of sets of second electrical signals as control signals of the optical computing unit, Under the control of the control signal, the optical computing unit is used to optically process the plurality of groups of optical signals.

28. The photonic computing device according to claim 27, characterized in that: The optical computing unit includes a Mach-Zehnder interferometer.

29. The photonic computing device according to claim 27, characterized in that: The first data includes at least a portion of elements in a vector or a matrix, and the second data includes at least a portion of elements in a vector or a matrix.

30. The photonic computing device according to any one of claims 21 to 29, characterized in that: The photonic computing device further comprises: an optical-electrical conversion module, configured to convert the optical signal output after the optical processing into an analog electrical signal; A summing processing module is configured to perform summing processing on the numbers represented by the analog electrical signals to obtain a plurality of summing results; a scaling processing module configured to perform scaling processing on at least one of the plurality of summation results; and The accumulation module is configured to accumulate the summation result after the scaling process and the summation result before the scaling process.

31. The photonic computing device according to any one of claims 21 to 29, characterized in that: The photonic computing device further comprises: an optical-electrical conversion module, configured to convert the optical signal output after the optical processing into an analog electrical signal; A summing processing module is configured to perform summing processing on the numbers represented by the analog electrical signals to obtain a plurality of summing results; an analog-to-digital conversion module, configured to convert the analog electrical signal representing the summation result into a digital electrical signal, and represent the summation result in binary form; a shift module configured to perform a shift operation on at least one of the summation results in binary form; and The accumulation module is configured to accumulate the summation results that have undergone the shift operation and the summation results that have not undergone the shift operation among the multiple summation results.

32. A method of photon computing, comprising: Acquire first data, where the first data includes a plurality of first elements, each of which represents a number; In the photon domain, using an optical signal to represent the first data; Optically processing the optical signal, thereby indicating that calculations are performed on the corresponding plurality of first elements; In the analog electronic domain, a first summation operation is performed on the processing result represented by the analog electrical signal; In the digital electronic domain, a second summing operation is performed on the processing result represented by the digital electrical signal.

33. The method according to claim 32, characterized in that It also includes converting the optical signal that has undergone the optical processing into the analog electrical signal; the first summing operation includes performing a summing operation according to the number represented by the analog electrical signal to obtain a plurality of first summing results.

34. The method according to claim 33, characterized in that The processing result represented by the digital electrical signal includes the first summation result; wherein the second summation operation includes: generating a second summation result according to the first summation result.

35. The method according to claim 34, characterized in that The method further includes performing a shift operation on at least one of the first summation results represented by the digital electrical signal, and performing the second summation operation after the shift operation.

36. The method according to claim 33, characterized in that The method also includes performing scaling processing on at least one of the plurality of first summation results to obtain at least one corresponding intermediate result.

37. A computer device, characterized in that: A photonic computing device comprising any one of claims 21 to 31.

Images