Digital controller and digital control power supply

Abstract

A digital controller (10) performs feedback control on a control target (20) that outputs a control amount corresponding to an operation amount. The digital controller (10) comprises a detector (110), an error amplifier (120), a compensator (130), and a PWM modulator (140). The detector (110) detects the control amount as a first digital signal. The error amplifier (120) calculates a deviation between the first digital signal and a command value. From said deviation, the compensator (130) outputs the operation amount to the control target (20). The PWM modulator (140) outputs, to the control target (20), a PWM signal having a duty that corresponds to the operation amount. The value obtained by multiplying the quantization resolution of the detector (110) by the gain of the compensator (130) is equal to the quantization resolution of the PWM modulator (140). The average value of the first digital signal includes information about signals having a value less than the quantization step width of the detector (110).

Description

Digital Controllers and Digitally Controlled Power Supplies

[0001] The present disclosure relates to digital controllers and digitally controlled power supplies.

[0002] Conventionally, digital control systems have been known that control a controlled object using signals generated in discrete time by a digital circuit. For example, Japanese Patent Laid-Open Publication No. 6-225526 (Patent Document 1) discloses a switching power supply device that stabilizes an output voltage by turning a switching element on and off using an output signal from a digital modulator.

[0003] Japanese Patent Application Publication No. 6-225526

[0004] In digital control systems, switching pulses are often generated by performing pulse width modulation (PWM) through digital circuit calculations. Gate signals are generated based on the switching pulses, and power conversion in the power supply to be controlled (digitally controlled power supply) is controlled by driving a switching device (e.g., a power transistor) based on the gate signals.

[0005] In a digital PWM circuit, a PWM signal is generated by comparing a carrier wave (carrier) numerically generated by a counter or the like with a signal wave (operating variable) that determines the duty ratio. Because the carrier frequency is generated by dividing the clock frequency using a counter, if the clock frequency is constant, the higher the carrier frequency, the fewer clocks there are per carrier cycle. As a result, the duty resolution becomes coarser.

[0006] In a typical step-down switching power supply, the duty cycle is proportional to the output voltage, so as the duty resolution becomes coarser, the output voltage resolution also becomes coarser. In a digitally controlled power supply, a limit cycle operation is performed that fluctuates between the two closest duty cycle values ​​to achieve the desired output voltage in a steady state. The limit cycle operation makes it possible to achieve the desired output voltage as the average value of the output voltage. However, this results in the generation of output voltage pulsation (ripple). When the duty resolution is coarse, the ripple amplitude also increases.

[0007] In switching power supplies other than step-down types, the relationship between duty and output voltage is often not proportional. However, because there is a correlation between duty and output voltage, switching power supplies other than step-down types also have the same issues as switching power supplies other than step-down types.

[0008] Even in a switching power supply in which there is no proportional relationship between the duty and the output voltage, the correlation between the duty and the output voltage can cause problems similar to those encountered in a step-down switching power supply.

[0009] Furthermore, in a switching power supply that uses a wide band gap semiconductor instead of a conventional silicon semiconductor, the switching frequency can be made higher than before, so the duty resolution tends to be coarser.

[0010] The duty resolution can be finer by increasing the clock frequency that generates the carrier in the PWM modulator or by combining a delay time element with a shorter delay than the clock period. However, there is a limit to how much the duty resolution can be improved due to hardware constraints.

[0011] The essence of this issue is that the quantization error that occurs when the control variable that determines the on-duty cycle is quantized can contain low-frequency components such as direct current, depending on the frequency components of the original signal. One possible solution to this issue is to diffuse the quantization error into higher frequency components. Random dither, for example, is one such method, which generates quantization error with uniform probability by adding a random number before quantizing the control variable. Another solution, delta-sigma modulation, integrates the quantization error and feeds it back, allowing the quantization error to be concentrated in the high-frequency region rather than uniformly (noise shaping). All of the solutions mentioned above can express changes that are finer than their resolution by using the average value of the on-duty cycle.

[0012] In these solutions, the quantization error, which has conventionally existed as a low-frequency component including a direct current, is merely shifted to a higher frequency component, and the total amount (effective value) of the error is not reduced.

[0013] However, switching power supplies are generally equipped with a smoothing filter that attenuates high-frequency components and extracts low-frequency components as output. This removes the high-frequency components of the quantization error, making it possible to obtain an output voltage with a reduced total amount of quantization error. As a result, it becomes possible to control the output voltage more precisely than the duty resolution of a PWM modulator. Because the attenuation rate of a switching power supply's smoothing filter increases with increasing frequency, applying ΔΣ modulation with noise shaping characteristics is effective.

[0014] The digitally controlled power supply disclosed in Patent Document 1 does not perform PWM, but instead selects one of two values, 0 or 1, for each control period to drive the switching element. However, the control method of the digitally controlled power supply disclosed in Patent Document 1 can be considered equivalent to a method with a 1-bit PWM resolution. The digital modulator 25 in Patent Document 1 converts a multi-bit control output into a 1-bit output signal and performs ΔΣ modulation so that the average value of the output signal is proportional to the control output. In terms of PWM duty, the digital modulator 25 only has 1-bit resolution. However, the output voltage of the digitally controlled power supply can be continuously controlled by the average value of the output signal from the digital modulator 25.

[0015] In a digitally controlled power supply, when reducing output voltage ripple by improving the output voltage resolution, which is determined by the PWM resolution, it is necessary to refine the resolution of the A / D (Analog / Digital) converter that detects the feedback signal or the resolution of the compensator that calculates the duty cycle, which is the manipulated variable. This fine resolution can be achieved by increasing the bit width of the digital signal. However, increasing the bit width of the digital signal increases the circuit size of the digital controller that implements the A / D converter or compensator, thereby hindering cost reduction of the digital controller. However, Patent Document 1 does not consider the fact that improving the output voltage resolution hinders cost reduction of the digital controller in a digital control system.

[0016] The present disclosure has been made to solve the above-mentioned problems, and its purpose is to reduce the cost of a digital controller in a digital control system while suppressing output voltage ripple.

[0017] A digital controller according to the present disclosure performs feedback control on a controlled object, outputting a control amount corresponding to a manipulated variable. The digital controller includes a detector, an error amplifier, a compensator, and a PWM modulator. The detector detects the controlled variable as a first digital signal. The error amplifier calculates the deviation between the first digital signal and a command value. The compensator outputs a manipulated variable for the controlled object from the deviation. The PWM modulator outputs a PWM signal having a duty corresponding to the manipulated variable to the controlled object. The value obtained by multiplying the quantization resolution of the detector by the gain of the compensator is equal to the quantization resolution of the PWM modulator. The average value of the first digital signal includes signal information less than the quantization step width of the detector.

[0018] According to the digital controller of the present disclosure, the value obtained by multiplying the quantization resolution of the detector by the gain of the compensator is equal to the quantization resolution of the PWM modulator, and the average value of the first digital signal contains signal information that is less than the quantization step width of the detector. This makes it possible to reduce the cost of the digital controller while suppressing output voltage ripple in a digital control system.

[0019] Fig. 1 is a block diagram showing an example of the configuration of a digitally controlled power supply according to embodiment 1. Fig. 2 is a diagram showing a time chart showing an example of the operation of the digitally controlled power supply of Fig. 1 together with a time chart showing an example of the operation of a digitally controlled power supply of a comparative example. Fig. 3 is a block diagram showing an example of the configuration of a digitally controlled power supply according to embodiment 2. Fig. 4 is a block diagram showing an example of the configuration of a digitally controlled power supply according to embodiment 3.

[0020] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. In the drawings, the same or corresponding parts are designated by the same reference numerals, and their description will not be repeated in principle.

[0021] Embodiment 1. Fig. 1 is a block diagram showing an example of the configuration of a digitally controlled power supply 1 according to embodiment 1. As shown in Fig. 1, the digitally controlled power supply 1 includes a digital controller 10 and a power conversion circuit 20 (controlled object). In Fig. 1, a step-down chopper circuit is shown as an example of the power conversion circuit 20. The digital controller 10 performs feedback control on the power conversion circuit 20, which outputs a control amount corresponding to a manipulation amount.

[0022] The digital controller 10 includes an input terminal Pi1, an output terminal Po1, an A / D converter 110, an error amplifier 120, a compensator 130, and a PWM modulator 140. The input terminal Pi1 receives a control amount, which is an analog signal, from the power conversion circuit 20.

[0023] The A / D converter 110 receives a control amount from the input terminal Pi1. The A / D converter 110 functions as a detector that detects the control amount from the input terminal Pi1 as a digital signal. The A / D converter 110 performs sampling and quantization, and discretizes the control amount from the input terminal Pi1 on both the time axis and the numerical axis. If the number of quantization bits (number of effective bits) of the A / D converter 110 is a natural number m, the quantization resolution of the A / D converter 110 is 2 ｍ and the quantization step width (the inverse of the quantization resolution) is 2 －ｍ This becomes:

[0024] The average value (output average value) of the digital signal output from the A / D converter 110 contains information about a signal smaller than the quantization step width. For example, when a signal one-third the quantization step width is input to the A / D converter 110, the A / D converter 110 outputs detected values ​​of 0 and 1 in a ratio of 2:1. Such A / D conversion methods include, for example, superposition of random noise, pulse density modulation using ΔΣ modulation, and pulse width modulation using carrier comparison.

[0025] The error amplifier 120 calculates the deviation between the command value Cm and the controlled variable detected by the A / D converter 110. The command value Cm may be generated and held inside the digital controller 10, or may be input from outside the digital controller 10.

[0026] The compensator 130 calculates and outputs a manipulated variable from the deviation output from the error amplifier 120. The compensator 130 has a transfer function Gc(s) (s is a complex number).

[0027] The PWM modulator 140 includes a comparator 141 and a carrier generator 142. The comparator 141 compares the carrier signal generated by the carrier generator 142 with the manipulated variable from the compensator 130, and generates a PWM signal having a duty corresponding to the manipulated variable. ｎ (n is a natural number), the number of quantization bits of the PWM modulator 140 is n, and the quantization step width is 2 －ｎ The PWM signal generated by the PWM modulator 140 is output to the power conversion circuit 20 from the output terminal Po1.

[0028] The power conversion circuit 20 includes an input terminal Pi2, output terminals Po21 and Po22, an amplifier 200, capacitors 210 and 220, an N-channel MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) 230, a coil 240, and a diode 250. The input terminal of the amplifier 200 is connected to the input terminal Pi2. The output terminal of the amplifier 200 is connected to a gate G of the MOSFET 230. The gate G and drain D of the MOSFET 230 are each connected to a DC power supply Vdc. The capacitor 210 is connected between the gate of the MOSFET 230 and signal ground SG. The source S of the MOSFET 230 is connected to the cathode of the diode 250. The anode of the diode 250 is connected to signal ground SG. The capacitor 220 is connected between the output terminals Po21 and Po22. The coil 240 is connected between the source S of the MOSFET 230 and the output terminal Po21. The power conversion circuit 20 performs power conversion based on the PWM signal output from the digital controller 10, and outputs a desired voltage or current from the output terminals Po21 and Po22.

[0029] An output terminal Po21 of the power conversion circuit 20 is connected to an input terminal Pi1 of the digital controller 10. In the digital control power supply 1, a feedback control system is formed in which the output signal of the power conversion circuit 20 is fed back to the digital controller 10.

[0030] In the digital controller 10, the quantization resolution (=2 ｍ ) multiplied by the gain of the compensator 130 is the quantization resolution (=2 ｎ ) That is, the following equation (1) holds true.

[0031]

[0032] In the digital controller 10 in which equation (1) holds, when the detection value of the A / D converter 110 changes by one step, the duty generated by the PWM modulator 140 changes by one step. The digital controller 10 can prevent information about the control amount (analog signal) from being lost from the PWM signal and can prevent redundant signal bits from being generated in the PWM signal.

[0033] Note that if it is difficult to precisely match the value obtained by multiplying the quantization resolution of the A / D converter 110 by the gain of the compensator 130 with the quantization resolution of the PWM modulator 140 due to hardware constraints of the A / D converter 110, the gain of the compensator 130, or constraints on the quantization resolution of the PWM modulator 140, it is desirable to determine the number of quantization bits so that the quantization resolutions of the A / D converter 110 and the gain of the compensator 130 are as close as possible, in order to prevent loss of information and the generation of redundant signal bits. Specifically, it is desirable to set the number of quantization bits so that the ratio of the value obtained by multiplying the quantization resolution of the A / D converter 110 by the gain of the compensator 130 to the quantization resolution of the PWM modulator 140 is more than 0.5 and less than 2.

[0034] The gain of the compensator 130 is used when determining the quantization resolution of each component. However, the gain of the compensator 130 depends on the transfer function of the compensator 130 and is not necessarily a constant value with respect to frequency. When the compensator 130 has a constant gain with respect to frequency, the feedback control system is called proportional (P) control, and the gain is a scalar constant. In this case, the proportional gain can be used as the gain of the compensator 130 to determine the quantization resolution.

[0035] On the other hand, when proportional control is performed, a steady-state deviation occurs between the controlled variable and the command value in a steady state. Since it is preferable to have no steady-state deviation in constant-value control of switching power supplies and the like, proportional-integral (PI) control, which integrally compensates for the steady-state deviation, is often adopted instead of proportional control. PI control is composed of the sum of a proportional term and an integral term, and the gain of the compensator 130 has frequency dependency, being high at low frequencies and constant at medium to high frequencies. Therefore, when determining the quantization resolution of each component, it becomes an issue to determine at which frequency the gain of the compensator 130 should be used.

[0036] On the other hand, proportional integral differential (PID) control, which performs phase lead compensation using a differential term, is sometimes employed in control systems of switching power supplies that require high-speed response. PID control is composed of the sum of a proportional term, an integral term, and a differential term, and the gain of the compensator 130 has frequency characteristics that are high at low frequencies, low at medium frequencies, and high again at high frequencies. When a compensator 130 with a more complex transfer function is employed, determining at which frequency the gain of the compensator 130 should be used when determining the quantization resolution of each component becomes even more difficult.

[0037] In a feedback control system, limit cycle oscillation due to quantization occurs near the frequency where the phase delay of the loop transfer function is 360° (phase margin is 0). To ensure the stability of the feedback control system, the phase margin at the frequency Fc where the gain of the loop transfer function is 0 (crossover) must be a positive value. The maximum (Nyquist) frequency that can be expressed in a discrete-time system with a sampling frequency Fs is Fs / 2. Therefore, the frequency f where the phase margin becomes 0 and limit cycle oscillation occurs is usually equal to or greater than the frequency Fc and equal to or less than Fs / 2.

[0038] In order to suppress ripples due to limit cycle oscillation, it is desirable to use a value at the frequency f (specific frequency) of limit cycle oscillation as the gain of the compensator 130 used when determining the quantization resolution of each part. In the transfer function Gc(s) of equation (1), when jω (ω is angular velocity) is substituted for the complex number s, the frequency transfer function Gc(jω) is obtained. Since the angular velocity ω is expressed as 2πf, equation (1) can be expressed as the following equation (2).

[0039]

[0040] Taking the binary logarithm (logarithm to the base 2) of both sides of equation (2) leads to the following equation (3): From equation (3) below, the gain of compensator 130 can be determined.

[0041]

[0042] Next, the operation of the digitally controlled power supply 1 of Fig. 1 will be described in comparison with the operation of a digitally controlled power supply according to a comparative example. Fig. 2 is a time chart showing an example of the operation of the digitally controlled power supply 1 of Fig. 1, together with a time chart showing an example of the operation of a digitally controlled power supply according to a comparative example. The upper part of Fig. 2 shows operating waveforms obtained by circuit simulation of the digitally controlled power supply according to the comparative example, and the lower part of Fig. 2 shows operating waveforms obtained by circuit simulation of the digitally controlled power supply 1 of Fig. 1. Rectangular waveforms (solid lines) Mv1 and Mv9 represent PWM signals, which are manipulated variables. Smooth waveforms (dotted lines) Cv1 and Cv9 represent output voltages, which are controlled variables.

[0043] In the circuit simulation shown in Fig. 2, the operation of the step-down chopper circuit of the power conversion circuit 20 in Fig. 1 is simulated. The DC power supply Vdc is 16 V, the cutoff frequency of the LC filter formed by the coil 240 and the capacitor 220 is 1 kHz, and the carrier frequency is 100 kHz. To make the effect easier to see, the number of quantization bits of the PWM signal is set to 4 (quantization resolution is 2 ４ = 16), and the full scale is 16. The gain at the limit cycle oscillation frequency of the compensator 130 is 16, and the number of quantization bits of the A / D converter 110 is 8 (quantization resolution is 2８ = 256 = 16 x 16).

[0044] In the case of the characteristics of the comparative example, where the detection value is uniquely determined by the threshold of the quantization element (corresponding to A / D converter 110 in Figure 1) in the control system, it can be confirmed that limit cycle oscillation occurs at approximately 5 to 7 kHz. Each time the deviation between the controlled variable Cv9 and the command value exceeds the quantization step width of the digital controller, the duty cycle of the PWM signal changes by the quantization step width. This causes limit cycle oscillation, the amplitude of which is proportional to the quantization step width. When using the same PWM modulator, the higher the carrier frequency, the larger the quantization step width, and therefore the larger the amplitude of the limit cycle oscillation.

[0045] On the other hand, when the average value of the digital signal output from a quantization element in a control system, such as the digital controller 10, contains information on a signal smaller than the quantization step width, the component of the deviation between the controlled variable Cv1 and the command value Cm that is smaller than the quantization step width of the digital controller 10 is expressed by the fineness of the manipulated variable. Even if the deviation between the controlled variable Cv1 and the command value Cm changes by less than the quantization step width of the digital controller 10, the average duty changes depending on the fineness of the quantization step width of the manipulated variable Mv1, so control can be performed while suppressing limit cycle oscillation.

[0046] In this way, it is possible to suppress ripples caused by limit cycle oscillation while minimizing the quantization resolution of each of the A / D converter 110, which is a detector of the digital controller 10, the error amplifier 120, which calculates the deviation, the compensator 130, which calculates the manipulated variable, and the PWM modulator 140, which performs switching control based on the manipulated variable. As a result, the circuit scale of the digital controller 10 is reduced, and the cost of the components of the digital controller 10 can be reduced.

[0047] The digital controller 10 may be constructed using discrete electronic circuit elements as components, or may be constructed using programmable logic devices, or microprocessors and memory.

[0048] The plant to be controlled by the digital controller 10 is not limited to a step-down chopper circuit, which is an example of the power conversion circuit 20. The plant to be controlled may be any power conversion circuit whose output can be controlled. Furthermore, the plant may be other than a power conversion circuit as long as it outputs a control amount corresponding to a discretized manipulated variable.

[0049] In the power conversion circuit 20, a wide bandgap semiconductor such as gallium nitride or silicon carbide may be used instead of a silicon semiconductor such as the MOSFET 230. In this case, the switching frequency can be made higher than with a silicon semiconductor, so that the digital controller according to the first embodiment can effectively suppress limit cycle oscillation even if the PWM resolution becomes coarser.

[0050] As described above, the digital controller according to the first embodiment can reduce the cost of the digital controller while suppressing output voltage ripple in a digital control system. Note that the first embodiment is merely a preferred example, and can be modified as needed.

[0051] Second Embodiment Fig. 3 is a block diagram showing an example of the configuration of a digitally controlled power supply 2 according to a second embodiment. In the configuration of the digitally controlled power supply 2, the digital controller 10 in Fig. 1 is replaced with a digital controller 10A. In the configuration of the digital controller 10A, the A / D converter 110 in Fig. 1 is replaced with a detector 110A. Other than this, the configuration of the digitally controlled power supply 2 is the same as the configuration of the digitally controlled power supply 1, and therefore description of the similar configuration will not be repeated.

[0052] As shown in FIG. 3, the detector 110A includes an A / D converter 111 and a requantizer 112. The A / D converter 111 receives a control amount, which is an analog signal, from an input terminal Pi1. The A / D converter 111 performs sampling and quantization, and discretizes the control amount from the input terminal Pi1 on both the time axis and the numerical axis. The A / D converter 111 converts the control amount from the input terminal Pi1 into a digital signal. If the number of quantization bits of the A / D converter 111 is a natural number j, the quantization resolution of the A / D converter 111 is 2ｊ and the quantization step width is 2 －ｊ The output value of the A / D converter 111 does not need to include signal information smaller than the quantization step width.

[0053] The requantizer 112 requantizes the digital signal output from the A / D converter 111 and converts it into a digital signal (detection value). If the number of quantization bits of the requantizer 112 is m, the quantization resolution of the digital signal output from the requantizer 112 is 2 ｍ and the quantization step width is 2 －ｍ The number of quantization bits m of the requantizer 112 is smaller than the number of quantization bits j of the A / D converter 111.

[0054] Information about signals smaller than the quantization step width is included in the average value of the digital signal output from the requantizer 112. For example, when a signal having a width one-third the quantization step width is input to the A / D converter 111, the requantizer 112 outputs detection values ​​of 0 and 1 in a ratio of 2:1.

[0055] In the digital controller 10A, the value obtained by multiplying the quantization step width of the requantizer 112 by the gain of the compensator 130 is equal to the quantization step width of the PWM modulator 140. Therefore, when the detected value of the requantizer 112 changes by one step, the duty generated by the PWM modulator 140 changes by one step. The digital controller 10A can prevent information about the control amount from being lost from the PWM signal and can prevent redundant signal bits from being generated in the PWM signal.

[0056] If it is difficult to precisely match the value obtained by multiplying the quantization resolution of requantizer 112 by the gain of compensator 130 with the quantization resolution of PWM modulator 140 due to hardware constraints of requantizer 112, the gain of compensator 130, or constraints on PWM resolution, it is desirable to determine the number of quantization bits so that the quantization resolutions of both are as close as possible, from the viewpoint of preventing loss of information and generation of redundant signal bits. Specifically, it is desirable to set the number of quantization bits so that the ratio of the value obtained by multiplying the quantization resolution of requantizer 112 by the gain of compensator 130 to the quantization resolution of carrier generation unit 142 is more than 0.5 and less than 2.

[0057] The A / D converter 111 must have a fine quantization resolution, but the digitally controlled power supply 2 can be configured using general components that do not contain signal information smaller than the quantization step width.

[0058] As described above, the digital controller according to the second embodiment can reduce the cost of the digital controller while suppressing output voltage ripple in a digital control system. Note that the second embodiment is merely a preferred example, and can be implemented by making appropriate modifications to the second embodiment.

[0059] Third Embodiment Fig. 4 is a block diagram showing an example of the configuration of a digitally controlled power supply 3 according to a third embodiment. In the configuration of the digitally controlled power supply 3, the digital controller 10 in Fig. 1 is replaced with a digital controller 10B. In the configuration of the digital controller 10B, the A / D converter 110 in Fig. 1 is replaced with a detector 110B. Other than this, the configuration of the digitally controlled power supply 3 is the same as the configuration of the digitally controlled power supply 1, and therefore description of the similar configuration will not be repeated.

[0060] As shown in FIG. 4, the detector 110B includes an A / D converter 113 and a digital filter 114. The A / D converter 113 receives a control amount, which is an analog signal, from an input terminal Pi1. The A / D converter 113 performs sampling and quantization, and discretizes the control amount from the input terminal Pi1 on both the time axis and the numerical axis. The A / D converter 113 converts the control amount from the input terminal Pi1 into a digital signal. If the number of quantization bits of the A / D converter 113 is a natural number k, the quantization resolution of the A / D converter 113 is 2 ｋ and the quantization step width is 2 －ｋ The average value of the digital signal output from A / D converter 113 includes information on a signal smaller than the quantization step width of A / D converter 113. Methods of A / D conversion by A / D converter 113 include, for example, superposition of random noise, pulse density modulation using ΔΣ modulation, or pulse width modulation using carrier comparison.

[0061] The digital filter 114 operates as a low pass filter (LPF) that removes high frequency components from the digital signal from the A / D converter 113, and converts the digital signal into a quantization signal with a quantization bit number m and a quantization resolution 2 ｍ , and the quantization step width 2 －ｍ The number of quantization bits m of the digital filter 114 is greater than the number of quantization bits k of the A / D converter 113.

[0062] Information about signals smaller than the quantization step width remains in the average value of the digital signal output from digital filter 114. For example, when a signal having a width one-third of the quantization step width is input to A / D converter 113, the detected values ​​output by digital filter 114 are 0 and 1 in a ratio of 2:1.

[0063] In the digital controller 10B, the value obtained by multiplying the quantization resolution of the digital filter 114 by the gain of the compensator 130 is equal to the quantization resolution of the PWM modulator 140. Therefore, when the detection value output by the digital filter 114 changes by one step, the duty generated by the PWM modulator 140 changes by one step. The digital controller 10B can prevent information about the control amount from being lost from the PWM signal and can prevent redundant signal bits from being generated in the PWM signal.

[0064] If it is difficult to precisely match the value obtained by multiplying the quantization resolution of digital filter 114 by the gain of compensator 130 with the quantization resolution of PWM modulator 140 due to hardware constraints of digital filter 114, the gain of compensator 130, or constraints on PWM resolution, it is desirable to determine the number of quantization bits so that the quantization resolutions of both are as close as possible, from the viewpoint of preventing information loss and the generation of redundant signal bits. Specifically, it is desirable to set the number of quantization bits so that the ratio of the value obtained by multiplying the quantization resolution of digital filter 114 by the gain of compensator 130 to the quantization resolution of carrier generation unit 142 is more than 0.5 and less than 2.

[0065] As described above, the digital controller according to the third embodiment can reduce the cost of the digital controller while suppressing output voltage ripple in a digital control system. Note that the third embodiment is merely a preferred example, and can be implemented by making appropriate modifications to the third embodiment.

[0066] The embodiments disclosed herein are intended to be combined as appropriate within the scope of compatibility. The embodiments disclosed herein should be considered to be illustrative and not restrictive in all respects. The scope of the present disclosure is defined by the claims, not the above description, and is intended to include all modifications within the meaning and scope of the claims.

[0067] 1 to 3 Digital control power supply, 10, 10A, 10B Digital controller, 20 Power conversion circuit, 110, 111, 113 A / D converter, 110A, 110B Detector, 112 Requantizer, 114 Digital filter, 120 Error amplifier, 130 Compensator, 140 PWM modulator, 141 Comparator, 142 Carrier generator, 200 Amplifier, 210, 220 Capacitor, 230 MOSFET, 240 Coil, 250 Diode, Cm Command value, Cv1, Cv9 Control amount, G Gate, D Drain, S Source, Fc, f Frequency, Fs Sampling frequency, Gc Transfer function, Mv1, Mv9 Control amount, Pi1, Pi2 Input terminal, Po1, Po21, Po22 Output terminal, SG Signal ground, Vdc DC power supply.

Claims

1. A digital controller performing feedback control on a controlled object that outputs a control amount corresponding to a manipulated variable, comprising: a detector that detects the controlled variable as a first digital signal; an error amplifier that calculates the deviation between the first digital signal and a command value; a compensator that outputs a controlled variable for the controlled object from the deviation; and a PWM modulator that outputs a PWM signal having a duty corresponding to the manipulated variable to the controlled object, wherein the value obtained by multiplying the quantization resolution of the detector by the gain of the compensator is equal to the quantization resolution of the PWM modulator, and the average value of the first digital signal includes signal information less than the quantization step width of the detector.

2. The digital controller according to claim 1, wherein the gain is a value corresponding to a specific frequency, and the specific frequency is included in a range equal to or higher than a crossover frequency of a loop transfer function of the feedback control and equal to or lower than half a sampling frequency of the feedback control.

3. A digital controller as described in claim 1 or 2, wherein the detector includes an A / D converter that converts the control amount into a second digital signal, and a requantizer that converts the second digital signal into the first digital signal, and the number of quantization bits of the requantizer is smaller than the number of quantization bits of the A / D converter.

4. A digital controller as described in claim 1 or 2, wherein the detector includes an A / D converter that converts the control amount into a second digital signal and a digital filter that converts the second digital signal into the first digital signal, an average value of the second digital signal includes signal information that is less than a quantization step width of the A / D converter, and the number of quantization bits of the digital filter is greater than the number of quantization bits of the A / D converter.

5. A digitally controlled power supply comprising: a digital controller according to any one of claims 1 to 4; and a controlled object, wherein the controlled object includes a switch element controlled by the PWM signal.

6. The digitally controlled power supply of claim 5, wherein the switch element includes a wide band gap semiconductor.

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