Manufacturing method for three-electrode LED chip applied to optical communication system

Abstract

The present disclosure provides a manufacturing method for a three-electrode LED chip applied to an optical communication system, comprising: growing an LED epitaxial structure to obtain an epitaxial wafer; on the basis of the epitaxial wafer, manufacturing a first electrode, a second electrode, and a third electrode; and depositing metal, and interconnecting the first electrode, the second electrode, and the third electrode to obtain a three-electrode LED monolithic integrated chip. The three-electrode LED chip provided by the present disclosure is applied to a wireless communication system, loads and transmits information, and solves the problems of low optical communication bandwidth, high cost, complex system and the like.

Description

A method for preparing a three-electrode LED chip used in an optical communication system Technical Field

[0001] The present disclosure belongs to the field of semiconductor technology, and in particular relates to a method for preparing a three-electrode LED chip used in an optical communication system. Background Art

[0002] Wireless optical communication utilizes rapid light and dark flashes, imperceptible to the human eye, to transmit information. This technology offers advantages such as strong confidentiality, wide bandwidth, high communication capacity, and robustness against electromagnetic interference. Optical communication generally involves three steps: conversion of electrical signals into optical signals, transmission of the optical signals through free space, and conversion of the optical signals into electrical signals. Currently, the first step in optical communication systems—conversion of electrical signals into optical signals—requires additional transmitter driver circuitry to load the communication signal onto the LED signal transmitter. There are two primary methods for transmitter driver functionality: external mixer circuits and integrated power electronics.

[0003] The first method uses a separate external bias tree (Bias-Tee) system to switch and modulate the LEDs, thereby enabling signal transmission. The Bias-Tee system couples AC communication signals with DC drive current. Through the principle of superposition, the AC communication signal and DC drive current are loaded onto the LED, allowing the LED to both operate and transmit optical communication signals. However, this system is relatively large, limiting the integration of the optical communication system. The complex wiring system also results in bandwidth loss, increasing the complexity and installation cost of the optoelectronic communication system.

[0004] The second method is to connect a transistor, such as a HEMT (High Electron Mobility Transistor) or a MOSFET (Metal-Oxide Semiconductor Field-Effect Transistor), in series with an LED, and by applying an AC voltage signal to the gate or base of the transistor, the current flowing into the LED will have a high-frequency AC communication signal. However, integrating transistors and LEDs requires redesigning a special epitaxial layer based on the LED epitaxial layer structure. This solution has a complex process flow, is difficult to prepare, and is costly, increasing the complexity and construction cost of on-chip integrated optical communication chip preparation. More importantly, in a high-frequency working environment, the heating effect of the transistor is very large, resulting in increased energy consumption, and the modulation frequency will also be limited by the preparation level of the transistor. Therefore, the field of optical communications urgently needs a new way to apply a modulated signal to the light source that can solve the problems of low optical communication bandwidth, high cost, and complex system.

[0005] Summary of the Invention

[0006] To achieve the above objectives, the present disclosure provides the following solution: a method for preparing a three-electrode LED chip for use in an optical communication system, comprising:

[0007] Growing an LED epitaxial structure to obtain an epitaxial wafer; and manufacturing a first electrode, a second electrode, and a third electrode based on the epitaxial wafer;

[0008] Depositing metal, interconnecting the first electrode, the second electrode, and the third electrode to obtain a three-electrode LED monolithic integrated chip.

[0009] Preferably, the epitaxial structure includes a thin film, a nanocolumn, or a nanowire.

[0010] Preferably, the epitaxial wafer includes, from bottom to top, a substrate, a buffer layer, an N-type semiconductor material, a multi-quantum well layer and a P-type semiconductor material.

[0011] Preferably, the substrate is any one of an epitaxial substrate of sapphire, Si, SiC, AlN, GaN or quartz glass;

[0012] The buffer layer, N-type semiconductor material, multi-quantum well layer material, and P-type semiconductor material are any one of GaN, AlN, InN, and their ternary alloy materials or quaternary alloy materials, GaAs, AlAs, InAs, and their ternary alloy materials or quaternary alloy materials, or GaP, AlP, InP, and their ternary alloy materials or quaternary alloy materials.

[0013] Preferably, the process of obtaining the first electrode and the second electrode based on the epitaxial wafer comprises etching the P-type semiconductor material, the multi-quantum well layer and the N-type semiconductor material of the epitaxial wafer using photolithography and dry etching processes to expose the surface of the N-type semiconductor material;

[0014] Based on photolithography, evaporation and annealing processes, a first electrode is fabricated on the exposed surface of the N-type semiconductor, and a second electrode is fabricated on the surface of the P-type semiconductor.

[0015] Preferably, the process of obtaining the third electrode based on the epitaxial wafer includes:

[0016] A dielectric layer with a high dielectric constant is deposited using an oxide deposition device;

[0017] Based on photolithography and evaporation processes, a third electrode is manufactured on the high dielectric constant dielectric layer.

[0018] Preferably, the third electrode can be not only formed on the LED etching mesa, but also on the sidewall of the etching mesa to obtain a better current injection effect.

[0019] Preferably, the third electrode is prepared on an N-type semiconductor material to achieve the same technical effect as the technical solution of preparing the third electrode on a P-type semiconductor material.

[0020] Preferably, the first electrode is made of any one of Ti / Al / Ti / Au multi-metal, Ti / Au multi-metal, Ti / Al / Ni / Au multi-metal, Cr / Au multi-metal or Cr / Al / Ti / Au multi-metal;

[0021] The second electrode is made of any one of Ni / Au multi-metal, Ti / Au multi-metal, ITO conductive layer or Cr / Au multi-metal;

[0022] The third electrode is a conductive contact layer, and the conductive contact layer at least includes Ni / Au multi-metal, Ti / Au multi-metal, ITO conductive layer, and Cr / Au multi-metal.

[0023] Preferably, the process of depositing metal and interconnecting the first electrode, the second electrode and the third electrode to obtain a three-electrode LED monolithic integrated chip includes:

[0024] An insulating layer is obtained by depositing using an oxide deposition device;

[0025] Based on photolithography, dry etching, and wet etching processes, the insulating layer is etched to expose the pad windows and the dielectric layer of the first electrode and the second electrode;

[0026] Based on the photolithography and evaporation process, link electrodes are made on the dielectric layer with a high dielectric constant to deposit metal interconnect electrodes to obtain a three-electrode LED monolithic integrated chip.

[0027] Preferably, the high-dielectric-constant dielectric layer and the insulating layer are both made of one or any combination of aluminum oxide, silicon oxide, hafnium oxide, carbon nanotubes, and barium titanate, and the high-dielectric-constant dielectric layer and the insulating layer are made of different materials.

[0028] The present disclosure can achieve the following technical effects:

[0029] This disclosure provides a method for fabricating a three-electrode LED chip for use in optical communication systems. By applying an AC voltage to a capacitor electrode (i.e., the third electrode), the DC voltage and high-frequency AC voltage are coupled within the semiconductor device, thereby modulating the luminous intensity of the light-emitting chip. This method overcomes the difficulties associated with monolithic integration of LEDs and power electronics devices, which typically require complex external frequency mixing circuits or epitaxial structures for high-frequency modulation of LED luminous intensity.

[0030] The present disclosure has a simple preparation method and good integration, thus avoiding bandwidth loss caused by complex circuits and greatly improving the communication speed and reliability of the optical communication system.

[0031] Since the present disclosure does not require the design of a special epitaxial structure, it overcomes the defects of complex process, poor repeatability and high cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] FIG1 is a flow chart of a method according to an embodiment of the present disclosure;

[0033] FIG2 is a top view of a three-electrode LED monolithic integrated chip used in an optical communication system according to an embodiment of the present disclosure;

[0034] FIG3 is a schematic diagram of a general optical communication system in the prior art;

[0035] FIG4 is a schematic diagram of an optical communication system using a three-electrode LED monolithic integrated chip according to an embodiment of the present disclosure;

[0036] FIG5 is a spectrum response diagram of a conventional circuit and a three-electrode LED monolithic integrated chip according to an embodiment of the present disclosure;

[0037] Figure numerals: 1. substrate, 2. buffer layer, 3. N-type electron injection layer, 4. multi-quantum well layer, 5. P-type hole injection layer, 6. N-type first electrode, 7. P-type second electrode, 8. dielectric layer, 9. third electrode, 10. insulating layer, 11. third electrode interconnection layer. DETAILED DESCRIPTION

[0038] The following will be combined with the accompanying drawings in the embodiments of the present disclosure to clearly and completely describe the technical solutions in the embodiments of the present disclosure. Obviously, the embodiments described are only part of the embodiments of the present disclosure, not all of the embodiments. Based on the embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without making any creative efforts are within the scope of protection of the present disclosure.

[0039] In order to make the above-mentioned objects, features and advantages of the present disclosure more obvious and easy to understand, the present disclosure is further described in detail below with reference to the accompanying drawings and specific embodiments.

[0040] In response to the problems of low bandwidth, high cost, and complex system in optical communication systems, the present disclosure provides a three-electrode LED monolithic integrated chip for use in optical communication systems. The integrated chip is constructed by vertically integrating an LED and a capacitor. The capacitor is composed of the semiconductor material of the LED itself, a dielectric layer, and a metal contact layer on the surface. By applying a DC voltage to the P-type electrode of the LED itself, the LED can emit light normally, and a high-frequency AC voltage signal is applied to the integrated capacitor to modulate the luminous intensity of the LED. Based on the principle that the capacitor is low-frequency isolation and high-frequency conduction, by applying high-frequency AC voltage signals of different frequencies, amplitudes, and waveforms to the capacitor, the DC bias and high-frequency signal voltage are coupled inside the semiconductor, so that the luminous intensity of the device can be artificially modulated at high speed. Since this modulation method does not require complex semiconductor epitaxy and preparation processes, and also avoids a large number of complex circuits, the three-electrode LED integrated chip proposed in the present disclosure greatly improves the bandwidth, integration, and cost advantages of the optical communication system.

[0041] As shown in FIG1 , the present disclosure provides a method for preparing a three-electrode LED chip for use in an optical communication system, comprising the following steps:

[0042] Step 1: growing an LED epitaxial structure, which is from bottom to top: substrate 1, buffer layer 2, N-type semiconductor material 3, multi-quantum well layer 4 and P-type semiconductor material 5.

[0043] Step 2: etching a portion of the material to expose the surface of the N-type semiconductor 3 material.

[0044] Step 3: forming a first electrode 6 on the exposed surface of the N-type semiconductor 3 .

[0045] Step 4: fabricate a second electrode 7 on the surface of the P-type semiconductor material 5 .

[0046] Step 5: depositing a dielectric layer 8 with a high dielectric constant.

[0047] Step 6: etching and removing a portion of the dielectric layer 8.

[0048] Step 7: depositing a third electrode 9 on the dielectric layer 8.

[0049] Step 8: depositing an insulating layer 10.

[0050] In step 9 , a portion of the insulating layer 10 is etched to expose the first electrode 6 , the second electrode 7 , and the third electrode 9 .

[0051] Step 10: depositing metal interconnect electrodes 11.

[0052] Thus, a three-electrode LED monolithic integrated chip for use in optical communication is obtained, which can directly couple the bias voltage and bias signal source.

[0053] When the three-electrode LED monolithic integrated chip is in operation, the first electrode is connected to a negative voltage, the second electrode is connected to a positive voltage, and the third electrode is connected to an AC signal voltage.

[0054] The present disclosure tests the communication bandwidth of a traditional optical communication system and the communication bandwidth of the novel three-electrode LED monolithic integrated chip proposed in the present disclosure.

[0055] A traditional optical communication system is shown in Figure 3, where the AC signal voltage and DC voltage are coupled through an external circuit and then applied to the P-type electrode of the LED, completing the conversion of the electrical signal into an optical signal. The optical signal is then received by a detector and converted into an electrical signal, which is displayed and analyzed by an oscilloscope.

[0056] The novel optical communication system disclosed herein is shown in Figure 4. An AC signal voltage is applied to the third electrode of a three-electrode LED monolithic integrated chip, while a DC voltage is applied to the second electrode, the P-type electrode. Within the semiconductor device, these two voltages are coupled, converting electrical and optical signals. The optical signal is then received by a detector and converted into an electrical signal, which is then displayed and analyzed by an oscilloscope.

[0057] The final test results are shown in FIG5 . The -3dB bandwidths of the conventional optical communication system and the optical communication system using a three-electrode LED monolithic integrated chip proposed in the present disclosure are 140 MHz and 194 MHz, respectively.

[0058] Furthermore, as shown in FIG1 , the present disclosure provides a method for applying a three-electrode LED monolithic integrated chip in an optical communication system, comprising the following steps:

[0059] Step 1: In an epitaxial growth device, including an MOCVD (metal organic chemical vapor deposition) device or an MBE (molecular beam epitaxy) device, a buffer layer 2 with a thickness of 10-100 nm is epitaxially grown on a substrate 1, including an epitaxial substrate such as sapphire, Si, SiC, AlN, GaN, or quartz glass. Then, an N-type semiconductor material 3 with a thickness of 1000-2000 nm, a multi-quantum well layer 4 with a thickness of 50-100 nm, and a P-type semiconductor material 5 with a thickness of 100-500 nm are epitaxially grown on the buffer layer 2. The semiconductor materials include GaN, AlN, InN, and ternary or quaternary alloys thereof, and can also be GaAs, AlAs, InAs, and ternary or quaternary alloys thereof, or GaP, AlP, InP, and ternary or quaternary alloys thereof. The epitaxial structure can be a thin film, a nanorod, or a nanowire.

[0060] Step 2: Etch the P-type semiconductor material 5, the multi-quantum well layer 4 and a portion of the N-type semiconductor material 3 on the epitaxial wafer obtained in step 1 by photolithography and dry etching, so that the surface of the N-type semiconductor material 3 is exposed.

[0061] Step 3: On the product obtained in step 2, a first electrode 6 is formed on the exposed surface of the N-type semiconductor by photolithography, evaporation, and annealing processes. The first electrode 6 is Ti / Al / Ti / Au multimetal, Ti / Au multimetal, Ti / Al / Ni / Au multimetal, Cr / Au multimetal, or Cr / Al / Ti / Au multimetal.

[0062] Step 4: On the product obtained in step 3, a second electrode 7 is made on the surface of the P-type semiconductor 5 by photolithography, evaporation, and annealing processes. The second electrode 7 is Ni / Au multimetal, Ti / Au multimetal, ITO conductive layer, or Cr / Au multimetal.

[0063] Step 5: Deposit a 5-50 nm high dielectric constant dielectric layer 7 on the product obtained in step 4 using an oxide deposition device; the dielectric layer 7 may be one or any combination of aluminum oxide, silicon oxide, hafnium oxide, carbon nanotubes, and barium titanate.

[0064] Step 6: Remove a portion of the dielectric layer 7 on the product obtained in step 5 by photolithography and etching processes, leaving only a partial area as shown in FIG. 1 .

[0065] In step 7, a third electrode 9 is formed on the dielectric layer 7 by photolithography and evaporation process on the product obtained in step 6. The third electrode can be any conductive contact layer such as Ni / Au multimetal, Ti / Au multimetal, ITO conductive layer, Cr / Au multimetal, etc.

[0066] Furthermore, the third electrode can be fabricated not only on the LED etched mesa, but also on the sidewalls of the etched mesa to achieve better current injection. Changes in the LED device etched mesa size, electrode pattern design, and epitaxial structure do not affect the technical performance of the three-electrode LED.

[0067] Furthermore, the third electrode is prepared on an N-type semiconductor material, which can achieve the same technical effect as the technical solution of preparing it on a P-type semiconductor material.

[0068] In step 8, a 200-600 nm thick insulating layer 10 is deposited on the product obtained in step 7 using an oxide deposition apparatus. The insulating layer 10 can be made of one or any combination of silicon oxide, silicon nitride, aluminum nitride, scandium nitride, gallium oxide, and aluminum oxide. To facilitate selective etching, the dielectric layer 8 and insulating layer 10 are made of different materials.

[0069] Step 9, etching the insulating layer on the product obtained in step 8 by photolithography, dry etching, and wet etching processes to expose the pad windows of the first electrode and the second electrode and a portion of the dielectric layer;

[0070] In step 10, a link electrode 11 is made on the high dielectric constant dielectric layer 9 by photolithography and evaporation process on the product obtained in step 9. The link electrode 11 can be any conductive contact layer such as Ni / Au multi-metal, Ti / Au multi-metal, Cr / Au multi-metal, etc.

[0071] Thus, a three-electrode LED monolithic integrated chip for use in optical communication, which can directly couple a bias source and a signal source, is obtained. A top view of the chip is shown in FIG2 .

[0072] The chip produced by the above method is a monolithic integrated capacitor based on an LED structure. The capacitor is composed of the semiconductor material of the hole injection layer in the LED structure, and the subsequently deposited insulating dielectric layer and metal contact layer. Based on the principle that the capacitor is cut off at low frequencies and turned on at high frequencies, by applying high-frequency AC voltage signals of different frequencies, amplitudes, and waveforms to the capacitor, the DC bias and high-frequency signal voltage are coupled inside the semiconductor, thereby artificially modulating the luminous intensity of the device at high speed. This three-electrode LED chip can be used in wireless optical communication systems to load and transmit information. The present disclosure solves the problems of low optical communication bandwidth, high cost, and complex system.

[0073] The specific embodiments of the present disclosure described above do not limit the scope of protection of the present disclosure. Any other corresponding changes and modifications made based on the technical concept of the present disclosure should be included in the scope of protection of the claims of the present disclosure.

Claims

1. A method for preparing a three-electrode LED chip used in an optical communication system, comprising: Growing LED epitaxial structures to obtain epitaxial wafers; Based on the epitaxial wafer, a first electrode, a second electrode and a third electrode are obtained; Depositing metal, interconnecting the first electrode, the second electrode, and the third electrode, to obtain a three-electrode LED monolithic integrated chip.

2. According to the method for preparing a three-electrode LED chip used in an optical communication system according to claim 1, the epitaxial structure includes a thin film, a nanocolumn, and a nanowire.

3. According to the method for preparing a three-electrode LED chip used in an optical communication system according to claim 1, the epitaxial wafer includes a substrate, a buffer layer, an N-type semiconductor material, a multi-quantum well layer and a P-type semiconductor material from bottom to top.

4. The method for preparing a three-electrode LED chip for use in an optical communication system according to claim 3, The substrate is any one of sapphire, Si, SiC, AlN, GaN or quartz glass epitaxial substrates; The buffer layer, N-type semiconductor material, multi-quantum well layer material, and P-type semiconductor material are any one of GaN, AlN, InN, and their ternary alloy materials or quaternary alloy materials, GaAs, AlAs, InAs, and their ternary alloy materials or quaternary alloy materials, or GaP, AlP, InP, and their ternary alloy materials or quaternary alloy materials.

5. According to the method for preparing a three-electrode LED chip used in an optical communication system according to claim 1, the process of obtaining the first electrode and the second electrode based on the epitaxial wafer comprises: Etching the P-type semiconductor material, the multi-quantum well layer and the N-type semiconductor material of the epitaxial wafer by photolithography and dry etching processes, so that the surface of the N-type semiconductor material is exposed; Based on photolithography, evaporation and annealing processes, a first electrode is fabricated on the exposed surface of the N-type semiconductor, and a second electrode is fabricated on the surface of the P-type semiconductor.

6. According to the method for preparing a three-electrode LED chip used in an optical communication system according to claim 1, the process of obtaining the third electrode based on the epitaxial wafer manufacturing comprises: A dielectric layer with a high dielectric constant is deposited using an oxide deposition device; Based on photolithography and evaporation processes, a third electrode is manufactured on the high dielectric constant dielectric layer.

7. The method for preparing a three-electrode LED chip for use in an optical communication system according to claim 1, The first electrode is any one of Ti / Al / Ti / Au multi-metal, Ti / Au multi-metal, Ti / Al / Ni / Au multi-metal, Cr / Au multi-metal or Cr / Al / Ti / Au multi-metal; The second electrode is any one of Ni / Au multi-metal, Ti / Au multi-metal, ITO conductive layer or Cr / Au multi-metal; The third electrode is a conductive contact layer, and the conductive contact layer at least includes Ni / Au multi-metal, Ti / Au multi-metal, ITO conductive layer, and Cr / Au multi-metal.

8. According to the method for preparing a three-electrode LED chip used in an optical communication system in claim 1, the process of depositing metal, interconnecting the first electrode, the second electrode, and the third electrode to obtain a three-electrode LED monolithic integrated chip comprises: The insulating layer is deposited by using an oxide deposition device; Based on photolithography, dry etching, and wet etching processes, the insulating layer is etched to expose the pad windows and the dielectric layer of the first electrode and the second electrode; Based on the photolithography and evaporation process, link electrodes are made on the dielectric layer with a high dielectric constant to deposit metal interconnect electrodes to obtain a three-electrode LED monolithic integrated chip.

9. According to the method for preparing a three-electrode LED chip for use in an optical communication system as described in claim 8, the high dielectric constant dielectric layer and the insulating layer are both made of one or any combination of aluminum oxide, silicon oxide, hafnium oxide, carbon nanotubes, and barium titanate, and the high dielectric constant dielectric layer and the insulating layer are made of different materials.

10. According to the method for preparing a three-electrode LED chip for use in an optical communication system as described in claim 1, the third electrode is prepared on an N-type semiconductor material or on the side wall of an etched mesa, and is constructed to achieve the same technical effect as the technical solution prepared on a P-type semiconductor material.

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