Light-emitting device

Abstract

[Problem] To provide a light emitting device having a small impedance for a light-emitting element and high distance measuring accuracy. [Solution] A light-emitting device according to the present disclosure comprises: a plurality of light-emitting elements arranged in a two-dimensional array with each light-emitting element of the plurality of light-emitting elements having a first and a second terminal; a plurality of first terminal wirings electrically connecting to the first terminals of the light-emitting elements and including a quantity M of first wirings extending in a first direction and a quantity N of second wirings extending in a second direction and electrically connected to each of the quantity M of first wirings; a plurality of second terminal wirings electrically connecting to the second terminals of the light-emitting elements with each second terminal wiring electrically connecting to a quantity P of the light-emitting elements; a plurality of selection circuits electrically connecting to the plurality of first terminal wirings or the plurality of second terminal wirings and selecting a light-emitting element to emit light; a plurality of drive circuits electrically connecting to the other of the plurality of first terminal wirings and the plurality of second terminal wirings and driving the plurality of light-emitting elements; and a plurality of light emission pulse control mechanisms electrically connecting to gates of the plurality of drive circuits and controlling light emission pulses.

Description

Light-emitting device

[0001] The present disclosure relates to a light emitting device.

[0002] Surface-emitting lasers, such as vertical cavity surface-emitting lasers (VCSELs), are known as one type of semiconductor laser. Generally, in a light-emitting device using a surface-emitting laser, a plurality of light-emitting elements are provided in a two-dimensional array on the front or back surface of a substrate.

[0003] Japanese Patent Application Laid-Open No. 2020-96169

[0004] When VCSEL light emitting elements are individually driven, the wiring for the light emitting elements becomes longer as the number of light emitting elements increases, which results in problems such as an increase in the impedance of each wiring and a large difference in impedance between the wirings.

[0005] Furthermore, the pulse width during light emission is limited by the drive voltage of the drive circuit that drives the light-emitting element used in the VCSEL, making it impossible to shorten the pulse, and thus making it impossible to improve distance measurement accuracy in the time direction.

[0006] Furthermore, when comparing multiple channels containing light-emitting elements, variations in the on-resistance of the transistors in the driver circuit, as well as variations in operating temperature and power supply voltage, result in variations in the light-emitting timing, pulse width, and driving capacity of the driver circuit for the light-emitting elements for each channel. This makes it difficult to determine which measurement result is correct among multiple channels, resulting in a decrease in distance measurement accuracy.

[0007] In view of these problems, the present disclosure provides a light emitting device that has a low impedance for the light emitting element and high distance measurement accuracy.

[0008] A light emitting device according to a first aspect of the present disclosure includes a plurality of light emitting elements arranged in a two-dimensional array, each having a first and second terminal; M first wirings (M is an integer of 2 or more) extending in a first direction; and N second wirings (N is an integer of 2 or more) extending in a second direction intersecting the first direction and electrically connected to the M first wirings, respectively, and includes a plurality of first terminal wirings electrically connected to the first terminals of the light emitting elements; a plurality of second terminal wirings electrically connected to the second terminals of the light emitting elements and each electrically connected to P (P is an integer of 2 or more) of the light emitting elements; and a plurality of first terminal wirings and a plurality of second terminal wirings. a plurality of selection circuits electrically connected to one of the plurality of first terminal wirings and the plurality of second terminal wirings and for selecting the light emitting elements to be light-emitting, a plurality of drive circuits electrically connected to the other of the plurality of first terminal wirings and the plurality of second terminal wirings and for driving the plurality of light emitting elements, and a plurality of light emitting pulse control mechanisms electrically connected to gates of the plurality of drive circuits and for controlling the output of light emitting pulses of the plurality of light emitting elements, or a charge pump circuit electrically connected to a capacitor that accumulates electric charge to be supplied to the light emitting elements and for boosting an applied voltage, wherein N is an integer that may be the same as or different from M, and P is an integer that may be the same as or different from at least one of M and N. As a result, for example, by reducing the impedance of each wiring or the difference in impedance between wirings, it is possible to reduce the peak value I peak It is possible to increase the pulse width W (or half-width W') and shorten the pulse width W.

[0009] In addition, in this first aspect, the light emission pulse control mechanism is a delay circuit that receives an input of a trigger signal TRIG_O that drives the drive circuit and generates a delay signal Delay that is a delayed signal of the trigger signal TRIG_O. This allows the light emitting device to change the light emission period of the light emitting element and correct the light emission pulse width to be shorter, for example.

[0010] In this first aspect, the delay circuit is an inverter chain circuit, a delay locked loop circuit, or an RC circuit, which allows the light emitting device to change the light emitting period of the light emitting element and correct the light emitting pulse width W to be shorter, for example.

[0011] In addition, in this first aspect, the light emission pulse control mechanism is a light emission timing adjustment circuit that generates a timing adjustment signal TA by adjusting the output timing of a trigger signal TRIG_O that drives the drive circuit, thereby enabling, for example, the light emitting device to vary the light emission timing of a light emitting element.

[0012] In the first aspect, the light emission timing adjustment circuit is an inverter chain circuit, which allows the light emitting device to vary the light emission timing of the light emitting element, for example.

[0013] In addition, in this first aspect, the light emitting pulse control mechanism controls an LDD output current I, which is an output current of the light emitting element, based on an LDD capability switching signal. DLF The peak value I peak This allows the light emitting device to, for example, DLF The peak value I peak can be corrected.

[0014] In this first aspect, the LDD capability switching circuit includes one or more selective drive circuits connected in parallel with the drive circuit on the cathode side of the light emitting element, and the one or more selective drive circuits are driven by the LDD capability switching signal. DLF The peak value I peak can be corrected.

[0015] In this first aspect, the LDD capability switching circuit includes a pre-driver that varies an output voltage based on the LDD capability switching signal. DLF The peak value I peak can be corrected.

[0016] In addition, in this first aspect, the LDD capability switching circuit includes a current mirror circuit that amplifies a current output from a control current source IDAC, the current value of which is controlled by the LDD capability switching signal, and causes the amplified current to flow to the cathode side of the light emitting element.DLF The peak value I peak can be corrected.

[0017] A light emitting device according to a second aspect of the present disclosure includes a plurality of light emitting elements arranged in a two-dimensional array, each having a first and second terminal; M first wirings (M is an integer of 2 or more) extending in a first direction; and N second wirings (N is an integer of 2 or more) extending in a second direction intersecting the first direction and electrically connected to the M first wirings, respectively, and includes a plurality of first terminal wirings electrically connected to the first terminals of the light emitting elements, a plurality of second terminal wirings electrically connected to the second terminals of the light emitting elements and each electrically connected to P (P is an integer of 2 or more) of the light emitting elements, and a plurality of first terminal wirings and the plurality of second terminal wirings. the light emitting device 1 includes a plurality of selection circuits electrically connected to one of the plurality of first terminal wirings and the plurality of second terminal wirings and configured to select the light emitting element to be emitted, a plurality of drive circuits electrically connected to one of the plurality of first terminal wirings and the plurality of second terminal wirings and configured to drive the plurality of light emitting elements, and a feedback circuit including an operational amplifier, the output side of the operational amplifier being connected to the gate of the drive circuit, the non-inverting input terminal side of the operational amplifier being connected to the source of the drive circuit, and configured to control a current flowing through the light emitting element, wherein N is an integer that may be the same as or different from M, and P is an integer that may be the same as or different from at least one of M and N. DLF The peak value I peak can be corrected.

[0018] In this second aspect, the feedback circuit further includes a first resistor connected to the inverting input terminal side and a second resistor connected to the non-inverting input terminal side, and a control current source IDAC controls the value of the current flowing through the second resistor according to the value of the current flowing through the first resistor. DLF The peak value I peak can be corrected.

[0019] a plurality of first terminal wirings electrically connected to the first terminals of the light-emitting elements; a plurality of second terminal wirings electrically connected to the second terminals of the light-emitting elements, each of the first terminal wirings electrically connected to P (P is an integer of 2 or more) of the light-emitting elements; a plurality of selection circuits electrically connected to one of the plurality of first terminal wirings and the plurality of second terminal wirings and configured to select the light-emitting elements to be light-emitting; and a plurality of drive circuits electrically connected to the other of the plurality of first terminal wirings and the plurality of second terminal wirings and configured to drive the plurality of light-emitting elements, wherein the wiring lengths of the gate wirings connected to the plurality of drive circuits are equal, N is an integer that is the same as or different from M, and P is an integer that is the same as or different from at least one of M and N. This makes it possible to reduce variations in light emission timing between light emitting elements, for example.

[0020] In addition, in the first aspect, there is provided a light emitting device that is a part of a distance measuring device, wherein the LDD capability switching circuit provided in the light emitting device controls the LDD output current I based on a value of a light reception level of light irradiated onto a measurement object and reflected light. DLF The peak value I peak This allows, for example, the LDD performance setting to be changed based on the measurement of the received light level, and the LDD output current I DLF The peak value I peak can be corrected.

[0021] In addition, in this first aspect, the LDD capacity switching circuit lowers the LDD capacity setting by one step when the value of the received light level exceeds a set reference amount, and raises the LDD capacity setting by one step when the value of the received light level does not exceed the set reference amount. This makes it possible to change the LDD capacity setting based on the measurement of the received light level, and to control the LDD output current I for each channel of the light-emitting element.DLF The peak value I peak can be corrected.

[0022] In addition, in the first aspect, in a light emitting device that is part of a distance measuring device, the light emission timing adjustment circuit provided in the light emitting device corrects the light emission timing of the light emitting element based on a bin position of a histogram generated from light irradiated onto a measurement object and reflected light. This makes it possible to change the light emission timing setting based on the measurement of the bin position, and to correct the light emission timing for each channel of the light emitting element.

[0023] In addition, in this first aspect, the light emission timing adjustment circuit delays the light emission timing setting by one step when the Bin position is earlier than a set reference, and advances the light emission timing setting by one step when the Bin position is not earlier than the set reference. This makes it possible to change the light emission timing setting based on the measurement of the Bin position, for example, and to correct the light emission timing for each channel of the light-emitting element.

[0024] In addition, in the first aspect, there is provided a light emitting device that is a part of a distance measuring device, wherein the delay circuit provided in the light emitting device adjusts an LDD output current I based on a bin width of a histogram generated from reflected light of light irradiated onto a measurement object. DLF This allows, for example, the light emission pulse width setting to be changed based on the measurement of the Bin width, and the light emission pulse width can be corrected for each channel of the light emitting element 23.

[0025] In addition, in this first aspect, the delay circuit increases the light emission pulse width setting by one step when the bin width is shorter than the setting reference, and decreases the light emission pulse width setting by one step when the bin width is not shorter than the setting reference. This makes it possible to change the light emission pulse width setting based on the measurement of the bin width, and to correct the light emission pulse width for each channel of the light emitting element 23, for example.

[0026] In addition, in this first aspect, the light emitting device is a part of a distance measuring device, and the light emission timing adjustment circuit provided in the light emitting device corrects the light emission timing of the light emitting element based on the bin number of a histogram generated from the reflected light of light irradiated onto a measurement object. Thereby, for example, it is possible to change the LDD capacity setting and the light emission timing setting based on the measurement of the light receiving level and the measurement of the bin number, and for each channel of the light emitting element 23, it is possible to change the peak value I peak And the light emission timing can be corrected.

[0027] In addition, in this first aspect, the light emission timing adjustment circuit delays the light emission timing setting by one step when the bin number satisfies the setting criterion, and advances the light emission timing setting by one step when the bin number does not satisfy the setting criterion. As a result, for example, the LDD capability setting and the light emission timing setting can be changed based on the measurement of the light reception level and the measurement of the bin number, and the peak value I peak And the light emission timing can be corrected.

[0028] 1 is a cross-sectional view of a light emitting device 1a according to a first embodiment. FIG. 2 is a block diagram showing a configuration example of a distance measuring device 100 as an implementation example of the light emitting device 1 according to the first embodiment. FIG. 3 is a diagram for explaining the STL (Structured Light) system of the first embodiment. FIG. 4 is a circuit diagram of the light emitting device 1 according to the first embodiment. FIG. 5 is an example of a circuit diagram showing the connection relationship between selection circuits 37, 38, 39, a light emitting element 23, a drive circuit E, and a light emitting pulse control mechanism 70 according to the first embodiment. FIG. 6 is a diagram for explaining the operation of the light emitting device 1 according to the first embodiment. FIG. 7 is a graph for explaining the performance of the light emitting device 1a according to the first embodiment. FIG. 7 is a diagram for explaining the operation of a delay circuit 50 of the light emitting device 1 according to the first embodiment. FIG. 8 is a circuit diagram of the delay circuit 50 according to the first embodiment. FIG. 9 is a diagram for explaining the operation of a timing adjustment circuit 64 according to the second embodiment. FIG. 10 is a circuit diagram of the timing adjustment circuit 64 according to the second embodiment. FIG. 11 is a circuit diagram showing the structure of the light emitting device 1 according to a modified example of the second embodiment. FIG. 12 is a diagram for explaining the operation of an LDD capability switching circuit 65 of the light emitting device 1 according to a third embodiment. FIG. 13 is a circuit diagram of the LDD capability switching circuit 65 according to the third embodiment. FIG. 14 is a circuit diagram of the LDD capability switching circuit 65 according to a first modified example of the third embodiment. 10 is a circuit diagram of a light emitting device 1 in a second modified example of the third embodiment. FIG. 11 is an example of a flowchart of a distance measuring device 100 according to a fourth embodiment. FIG. 12 is an example of a flowchart of a distance measuring device 100 according to a fifth embodiment. FIG. 13 is an example of a flowchart of a distance measuring device 100 according to a sixth embodiment. FIG. 14 is an example of a flowchart of a distance measuring device 100 according to a seventh embodiment. FIG. 15 is a circuit diagram showing the structure of a light emitting device 1a according to an eighth embodiment. FIG. 16 is a circuit diagram showing the structure of a light emitting device 1a according to a first modified example of the eighth embodiment. FIG. 17 is a circuit diagram showing the structure of a light emitting device 1a according to a second modified example of the eighth embodiment. FIG. 18 is a circuit diagram showing the structure of a light emitting device 1a according to a third modified example of the eighth embodiment. FIG. 19 is another circuit diagram showing the structure of a light emitting device 1a according to a fourth modified example of the eighth embodiment. FIG. 19 is another circuit diagram showing the structure of a light emitting device 1a according to a fourth modified example of the eighth embodiment. FIG. 19 is a circuit diagram showing various examples of the structure of a light emitting device 1a according to a fifth modified example of the eighth embodiment. FIG. 19 is a circuit diagram showing the structure of a light emitting device 1a according to a sixth modified example of the eighth embodiment. FIG. 19 is a timing chart showing the operation of a light emitting device 1a according to a sixth modified example of the eighth embodiment. FIG. 19 is a circuit diagram showing the structure of a light emitting device 1a according to a ninth embodiment.31 is a block diagram showing an example of the configuration of a vehicle control system, and FIG. 32 is a diagram showing an example of a sensing area of ​​an external recognition sensor of the vehicle control system of FIG. 31.

[0029] Hereinafter, an embodiment of a light emitting device will be described with reference to the drawings. The following description will focus on the main components of the light emitting device, but the light emitting device may include components and functions that are not shown or described. The following description does not exclude components and functions that are not shown or described.

[0030] (First embodiment) (1) Distance measuring device of the first embodiment (1.1) Configuration of the distance measuring device The light emitting device 1 according to this embodiment can be used, for example, in a distance measuring device (also called a distance measuring module) that measures the distance to an object in a non-contact manner. In a distance measuring device, an emission signal from the light emitting device 1 is reflected by the object, and a light receiving device is required to receive the reflected light signal. The light emitting device 1 and the light receiving device may be arranged separately or on a common support member.

[0031] Fig. 1 is a cross-sectional view of a light-emitting device 1a. The light-emitting device 1a in Fig. 1 includes an LD (Laser Diode) chip 11 including the above-mentioned light-emitting unit 2, an LDD (Laser Diode Driver) substrate 12 including the above-mentioned drive unit 3, a mounting substrate 13, a heat dissipation substrate 14, a correcting lens holder 15, one or more correcting lenses 16, and wiring 17. The LD chip 11 is also called a VCSEL substrate.

[0032] 1 shows X-axis, Y-axis, and Z-axis that are perpendicular to each other. The +Z direction corresponds to the upward direction, and the −Z direction corresponds to the downward direction. Note that the −Z direction may or may not strictly coincide with the direction of gravity.

[0033] The LD chip 11 is disposed on a mounting substrate 13 via a heat dissipation substrate 14, and the LDD substrate 12 is also disposed on the mounting substrate 13. The mounting substrate 13 is, for example, a printed circuit board. A light receiving unit and a signal processing unit may also be disposed on the mounting substrate 13. The heat dissipation substrate 14 is, for example, a ceramic substrate such as an aluminum oxide substrate or an aluminum nitride substrate.

[0034] The correction lens holding portion 15 is disposed on the heat dissipation substrate 14 so as to surround the LD chip 11, and holds one or more correction lenses 16 above the LD chip 11. These correction lenses 16 are included in the light-emitting side optical system described below. Light emitted from the light-emitting portion 2 in the LD chip 11 is corrected by these correction lenses 16 and then irradiated onto the subject S described above. FIG. 1 shows two correction lenses 16 held by the correction lens holding portion 15 as an example.

[0035] The wiring 17 is provided on the front, back, inside, etc. of the mounting substrate 13, and electrically connects the LD chip 11 and the LDD substrate 12. The wiring 17 is, for example, a printed wiring provided on the front or back surface of the mounting substrate 13, or a via wiring that penetrates the mounting substrate 13. In this embodiment, the wiring 17 also passes through the inside or near the heat dissipation substrate 14.

[0036] FIG. 2 is a block diagram showing an example of the configuration of a distance measuring device 100 as an example of implementation of the light emitting device 1 according to this embodiment.

[0037] As shown in the figure, the distance measuring device 100 includes an emitting unit 101, a driving unit 102, a power supply circuit 103, an emitting side optical system 104, a receiving side optical system 105, a light receiving unit 106, a signal processing unit 107, a control unit 108, and a temperature detection unit 109.

[0038] The light-emitting unit 101 emits light from a plurality of light sources. The light-emitting unit 101 and the light-emitting side optical system 104 correspond to the above-described light-emitting device 1. As will be described later, the light-emitting unit 101 in this example has light-emitting elements such as VCSELs as light sources, and these light-emitting elements are arranged in a predetermined pattern, such as a matrix.

[0039] The driving unit 102 is configured to include a power supply circuit 103 for driving the light emitting unit 101. The power supply circuit 103 generates a power supply voltage for the driving unit 102 based on an input voltage from, for example, a battery (not shown) or the like provided in the distance measuring device 100. The driving unit 102 drives the light emitting unit 101 based on the power supply voltage.

[0040] Light emitted from the light-emitting unit 101 is irradiated onto a subject (object) S, which is the object of distance measurement, via a light-emitting side optical system 104. The light thus irradiated is reflected from the subject S and enters the light-receiving surface of the light-receiving unit 106 via a light-receiving side optical system 105.

[0041] The light receiving unit 106 is a light receiving element such as a CCD (Charge Coupled Device) sensor or a CMOS (Complementary Metal Oxide Semiconductor) sensor, and receives reflected light from the subject S that enters through the light receiving side optical system 105 as described above, converts it into an electrical signal, and outputs it.

[0042] The light receiving unit 106 performs, for example, CDS (Correlated Double Sampling) processing, AGC (Automatic Gain Control) processing, etc. on the electrical signal obtained by photoelectrically converting the received light, and further performs A / D (Analog / Digital) conversion processing, and then outputs the signal as digital data to the signal processing unit 107 at the subsequent stage.

[0043] Furthermore, the light receiving unit 106 in this example outputs a frame synchronization signal Fs to the driving unit 102. This enables the driving unit 102 to cause the light emitting element in the light emitting unit 101 to emit light at a timing according to the frame period of the light receiving unit 106.

[0044] The signal processing unit 107 is configured as a signal processor, for example, a DSP (Digital Signal Processor), etc. The signal processing unit 107 performs various signal processes on the digital signal input from the light receiving unit 106.

[0045] The control unit 108 is configured with, for example, a microcomputer having a CPU (Central Processing Unit), ROM (Read Only Memory), RAM (Random Access Memory), etc., or an information processing device such as a DSP, and controls the drive unit 102 for controlling the light-emitting operation by the light-emitting unit 101, and controls the light-receiving operation by the light-receiving unit 106.

[0046] The control unit 108 has a function as a distance measuring unit 108a. The distance measuring unit 108a detects the distance to the subject S based on a signal input via the signal processing unit 107 (i.e., a signal obtained by receiving reflected light from the subject S). The distance measuring unit 108a in this example detects the distance to each part of the subject S in order to be able to identify the three-dimensional shape of the subject S.

[0047] A specific distance measurement method used by the distance measuring device 100 will be described later.

[0048] The temperature detection unit 109 detects the temperature of the light emitting unit 101. The temperature detection unit 109 may be configured to detect temperature using, for example, a diode.

[0049] In this example, information about the temperature detected by the temperature detection unit 109 is supplied to the drive unit 102, which enables the drive unit 102 to drive the light emitting unit 101 based on the temperature information.

[0050] (1.2) Distance Measurement Method The distance measurement method used in the distance measuring device 100 may be, for example, a STL (Structured Light) method or a ToF (Time of Flight) method.

[0051] The STL method is a method for detecting distance based on an image of a subject S illuminated with light having a predetermined light / dark pattern, such as a dot pattern or a grid pattern.

[0052] FIG. 3 is a diagram for explaining the STL system of the first embodiment.

[0053] 3A is an explanatory diagram of the STL method. In the STL method, pattern light Lp having a dot pattern such as that shown in Fig. 3A is irradiated onto a subject S. The pattern light Lp is divided into a plurality of blocks BL, and a different dot pattern is assigned to each block BL (dot patterns are arranged not to overlap between blocks BL).

[0054] FIG. 3B is an explanatory diagram of the distance measurement principle of the STL system.

[0055] In this example, a wall W and a box BX placed in front of it are treated as the subject S, and pattern light Lp is irradiated onto the subject S. "G" in the figure schematically represents the angle of view of the light receiving unit 106.

[0056] In addition, "BLn" in the drawing denotes light of a certain block BL in the pattern light Lp, and "dn" denotes the dot pattern of the block BLn projected on the light-receiving image by the light-receiving unit 106.

[0057] Here, if there is no box BX in front of the wall W, the dot pattern of the block BLn is projected at the position "dn'" in the figure in the received light image. In other words, the position at which the pattern of the block BLn is projected in the received light image differs depending on whether the box BX is present or not, and specifically, the pattern is distorted.

[0058] The STL method is a method for determining the shape and depth of the subject S by utilizing the fact that the irradiated pattern is distorted by the object shape of the subject S. Specifically, it is a method for determining the shape and depth of the subject S from the way the pattern is distorted.

[0059] When the STL system is adopted, for example, a global shutter type IR (Infrared) light receiving unit is used as the light receiving unit 106. In the case of the STL system, the distance measuring unit 108a controls the drive unit 102 so that the light emitting unit 101 emits pattern light, detects distortion of the pattern in the image signal obtained via the signal processing unit 107, and calculates the distance based on the distortion of the pattern.

[0060] Next, the ToF method is a method for detecting the distance to an object by detecting the time of flight (time difference) of light emitted from the light-emitting unit 101, reflected by the object, and reaching the light-receiving unit 106.

[0061] When a so-called direct ToF (dTOF) method is adopted as the ToF method, a SPAD (Single Photon Avalanche Diode) is used as the light receiving unit 106, and the light emitting unit 101 is pulse-driven. In this case, the distance measuring unit 108a calculates the time difference between light emission and reception of light emitted from the light emitting unit 101 and received by the light receiving unit 106, based on a signal input via the signal processing unit 107, and calculates the distance to each part of the subject S based on the time difference and the speed of light.

[0062] When the so-called indirect ToF (iTOF) method (phase difference method) is adopted as the ToF method, a light receiving unit capable of receiving, for example, IR light is used as the light receiving unit 106 .

[0063] (2) Light Emitting Device 1 of First Embodiment FIG. 4 is a circuit diagram of the light emitting device 1 according to the first embodiment.

[0064] As shown in Fig. 4, the light-emitting device 1 according to the first embodiment includes a plurality of light-emitting elements 23 arranged in a two-dimensional array and a plurality of transistors 24 electrically connected to these light-emitting elements 23. These transistors 24 are, for example, N-type MOS (Metal-Oxide-Semiconductor) transistors. Fig. 4 shows an example in which the light-emitting device 1 according to the first embodiment includes 9 x 9 light-emitting elements 23 and 9 x 9 transistors 24. Therefore, the light-emitting device 1 shown in Fig. 4 includes a 9ch x 9ch light-emitting element array. The number of channels in the light-emitting element array may be any number.

[0065] As shown in FIG. 4 , the light-emitting device 1 according to the first embodiment further includes a first anode wiring 31, a second anode wiring 32, a third anode wiring 33, a plurality of first capacitors 34, a plurality of second capacitors 35, a plurality of third capacitors 36, a first selection circuit 37, a second selection circuit 38, a third selection circuit 39, a plurality of cathode wirings 41, and a plurality of gate wirings 42. The first to third anode wirings 31 to 33 are an example of the first terminal wiring of the present disclosure, and the cathode wiring 41 is an example of the second terminal wiring of the present disclosure. The first to third capacitors 34 to 36 are an example of the first to M-th capacitors of the present disclosure, and the first to third selection circuits 37 to 39 are an example of the first to M-th selection circuits of the present disclosure (M is an integer of 2 or greater). FIG. 4 shows an example in which M is 3.

[0066] The first terminal wirings include M first wirings (M is an integer of 2 or greater) 31a, 32a, and 33a extending in a first direction X, and N second wirings (N is an integer of 2 or greater) 31b, 32b, and 33b extending in a second direction Y intersecting the first direction X and electrically connected to the M first wirings 31a, 32a, and 33a, respectively. FIG. 4 shows an example where M=3 and N=3. The first terminal wirings are electrically connected to first terminals of a plurality of light-emitting elements 23. In this specification, the first wirings 31a and the second wirings 31b connected to each other are referred to as first anode wirings 31, the second wirings 32a and 32b connected to each other are referred to as second anode wirings 32, and the third wirings 33a and 33b connected to each other are referred to as third anode wirings 33. In this specification, the first direction X may be referred to as the horizontal direction, and the second direction Y may be referred to as the vertical direction. In the following, the first terminal wiring and one of the plurality of second terminal wirings may be referred to as an anode wiring, and the other of the first terminal wiring and the plurality of second terminal wirings may be referred to as a cathode wiring.

[0067] The light emitting device 1 according to the first embodiment includes L (L is an integer of 1 or more) sets of the first to third anode wirings 31 to 33. Figure 4 shows an example in which L=5.

[0068] The five sets of first anode wirings 31 include a plurality of (e.g., five) first wirings 31a each extending in the first direction X (horizontal direction) and arranged along the second direction Y (vertical direction), and a plurality of (e.g., five) second wirings 31b each extending in the second direction Y (vertical direction) and arranged along the first direction X (horizontal direction). In this specification, the first wirings 31a may be referred to as first horizontal wirings 31a, and the second wirings 31b may be referred to as first vertical wirings 31b.

[0069] The five sets of second anode wirings 32 each include a plurality of (e.g., five) first wirings 32a each extending in the first direction X (horizontal direction) and arranged along the second direction Y (vertical direction), and a plurality of (e.g., five) second wirings 32b each extending in the second direction Y (vertical direction) and arranged along the first direction X (horizontal direction). In this specification, the first wirings 32a may be referred to as second horizontal wirings 32a, and the second wirings 32b may be referred to as second vertical wirings 32b.

[0070] The five sets of third anode wirings 33 each include a plurality of (e.g., five) first wirings 33a each extending in the first direction X (horizontal direction) and arranged along the second direction Y (vertical direction), and a plurality of (e.g., five) second wirings 33b each extending in the second direction Y (vertical direction) and arranged along the first direction X (horizontal direction). In this specification, the first wirings 33a may be referred to as third horizontal wirings 33a, and the second wirings 33b may be referred to as third vertical wirings 33b.

[0071] 4 shows an example in which the light-emitting device 1 according to the first embodiment includes five first horizontal wires 31a, five first vertical wires 31b, five second horizontal wires 32a, five second vertical wires 32b, five third horizontal wires 33a, and five third vertical wires 33b. Fig. 4 shows an example in which L sets of M first wires and N second wires are provided. The number of light-emitting elements 23 shown in Fig. 4 is M(L-2) x N(L-2), where N and L are symbols.

[0072] The first to third anode wirings 31 to 33 may include La sets of first to M-th horizontal wirings and Lb sets of first to N-th vertical wirings (La and Lb are integers of 2 or greater that satisfy La≠Lb). In this case, the number of light-emitting elements 23 in the light-emitting device 1 is M(La-2)×N(Lb-2).

[0073] The first selection circuit 37 includes transistors 37a and 37b connected in series. Similarly, the second selection circuit 38 includes transistors 38a and 38b connected in series. Similarly, the third selection circuit 39 includes transistors 39a and 39b connected in series. The transistors 37a, 38a, and 39a are, for example, P-type MOS transistors. The transistors 37b, 38b, and 39b are, for example, N-type MOS transistors. The transistors 37a, 38a, and 39a are examples of first switches of the present disclosure. The transistors 37b, 38b, and 39b are examples of second switches of the present disclosure.

[0074] [First to third anode wirings 31 to 33] In FIG. 4, in order to distinguish the first to third anode wirings 31 to 33 from one another, the first anode wiring 31 is shown by a thick solid line, the second anode wiring 32 is shown by a thick dashed line, and the third anode wiring 33 is shown by a thin solid line.

[0075] The first anode wiring 31 has a structure in which a plurality of first horizontal wirings 31a and a plurality of first vertical wirings 31b are arranged in a mesh pattern. These first horizontal wirings 31a and first vertical wirings 31b are electrically connected to each other at the locations where the first horizontal wirings 31a and first vertical wirings 31b intersect. Similarly, the second anode wiring 32 includes a plurality of second horizontal wirings 32a and a plurality of second vertical wirings 32b that are electrically connected to each other, and the third anode wiring 33 includes a plurality of third horizontal wirings 33a and a plurality of third vertical wirings 33b that are electrically connected to each other. Meanwhile, the first to third anode wirings 31 to 33 are electrically insulated from each other.

[0076] The first to third horizontal wires 31a to 33a extend in the first direction X (horizontal direction) and are adjacent to each other in the second direction Y (vertical direction). Although the first to third horizontal wires 31a to 33a extend linearly in the first direction X in FIG. 4, they may extend in a curved manner in the first direction X. That is, the first to third horizontal wires 31a to 33a may include bent portions.

[0077] On the other hand, the first to third vertical wirings 31b to 33b extend in the second direction Y and are adjacent to each other in the first direction X. Although the first to third vertical wirings 31b to 33b extend linearly in the second direction Y in FIG. 4, they may also extend in a curved manner in the second direction Y. That is, the first to third vertical wirings 31b to 33b may also include bent portions.

[0078] FIG. 4 shows five sets of first to third horizontal wirings (first wirings) 31a to 33a. In FIG. 4, the first, second, third, fourth, and fifth sets of first to third horizontal wirings 31a to 33a are arranged in order from top to bottom. In each set, the first horizontal wiring 31a, the second horizontal wiring 32a, and the third horizontal wiring 33a are arranged in order from top to bottom. The first set of first to third horizontal wirings 31a to 33a and the fifth set of first to third horizontal wirings 31a to 33a are arranged so as to sandwich 9 × 9 light-emitting elements 23 therebetween. Each of the second to fourth sets of first to third horizontal wirings 31a to 33a is arranged along one row (nine light-emitting elements) 23.

[0079] FIG. 4 further shows five sets of first to third vertical wirings (second wirings) 31b to 33b. In FIG. 4, the first, second, third, fourth, and fifth sets of first to third vertical wirings 31b to 33b are arranged in order from left to right. In each set, the first vertical wiring 31b, the second vertical wiring 32b, and the third vertical wiring 33b are arranged in order from left to right. The first set of first to third vertical wirings 31b to 33b and the fifth set of first to third vertical wirings 31b to 33b are arranged so as to sandwich 9×9 light-emitting elements 23 therebetween. Each of the second to fourth sets of first to third vertical wirings 31b to 33b is arranged along one column (nine light-emitting elements) 23.

[0080] The anode of each light-emitting element 23 is electrically connected to one of the first to third vertical wirings 31b to 33b. For example, the light-emitting element 23 in the leftmost column is electrically connected to the first vertical wiring 31b in the second set of first to third vertical wirings 31b to 33b. The light-emitting element 23 in the rightmost column is electrically connected to the third vertical wiring 33b in the fourth set of first to third vertical wirings 31b to 33b. The anode of each light-emitting element 23 may be electrically connected to one of the first to third horizontal wirings 31a to 33a instead of being electrically connected to one of the first to third vertical wirings 31b to 33b. The anode is an example of a first terminal in the present disclosure.

[0081] [Cathode Wiring 41] Each cathode wiring 41 extends in the first direction X and is electrically connected to the cathodes of three light-emitting elements 23. Specifically, each cathode wiring 41 is electrically connected to one light-emitting element 23 electrically connected to the first vertical wiring 31b, one light-emitting element 23 electrically connected to the second vertical wiring 32b, and one light-emitting element 23 electrically connected to the third vertical wiring 33b. These three light-emitting elements 23 are adjacent to each other in the first direction X. FIG. 4 shows 27 cathode wirings 41 for 81 light-emitting elements 23. The cathodes are an example of the second terminals of the present disclosure. The number of light-emitting elements 23 connected to each cathode wiring 41 is not limited to three. Each cathode wiring 41 may be electrically connected to the cathodes of P light-emitting elements 23 (P is an integer greater than or equal to 2).

[0082] In the above description, an example has been described in which a plurality of light-emitting elements 23 are connected to first to M-th horizontal wires, first to N-th vertical wires, and a plurality of second terminal wires electrically connected in P units, but the light-emitting device according to the present disclosure does not need to include all of the first to M-th horizontal wires, first to N-th vertical wires, and a plurality of second terminal wires electrically connected in P units. For example, a configuration in which a plurality of light-emitting devices are connected to first to M-th horizontal wires, a single vertical wire, and a single second terminal wire may also be employed.

[0083] Each light-emitting element 23 is provided between a corresponding anode wiring, i.e., any one of the first to third anode wirings 31 to 33, and a corresponding cathode wiring, i.e., any one of the plurality of cathode wirings 41. Each light-emitting element 23 emits light when a current flows between the corresponding anode wiring and the corresponding cathode wiring.

[0084] [Gate Wiring 42] Each gate wiring 42 extends in the first direction X and is electrically connected to the gates of three transistors 24. The sources of these three transistors 24 are electrically connected to the ground wiring (GND), and the drains of these three transistors 24 are electrically connected to the same single cathode wiring 41. These three transistors 24 form one drive circuit E. FIG. 4 shows 27 gate wirings 42 for 81 transistors 24.

[0085] Each drive circuit E is electrically connected to the cathodes of three light-emitting elements 23 via one cathode wiring 41. Each drive circuit E (output stage) E is used to drive the light-emitting elements 23 to generate (output) light from the light-emitting elements 23. For example, to generate light from a certain light-emitting element 23, a predetermined signal is applied to the gate wiring 42 of the drive circuit E for that light-emitting element 23. This brings the source and drain of each transistor 24 in that drive circuit E into conduction, allowing current to flow through that light-emitting element 23. When current flows through that light-emitting element 23, light is generated from that light-emitting element 23. The light-emitting device 1 shown in FIG. 4 has 27 drive circuits E for 81 light-emitting elements 23.

[0086] [First to Third Selection Circuits 37 to 39] The first to third selection circuits 37 to 39 are electrically connected to the first to third horizontal wirings 31a to 33a of the first to third anode wirings 31 to 33, respectively. The first selection circuit 37 is used to select the light-emitting element 23 electrically connected to the first anode wiring 31 as the light-emitting element 23 that generates light. The second selection circuit 38 is used to select the light-emitting element 23 electrically connected to the second anode wiring 32 as the light-emitting element 23 that generates light. The third selection circuit 39 is used to select the light-emitting element 23 electrically connected to the third anode wiring 33 as the light-emitting element 23 that generates light. The first to third selection circuits 37 to 39 may be electrically connected to the first to third vertical wirings 31b to 33b of the first to third anode wirings 31 to 33, respectively, instead of the first to third horizontal wirings 31a to 33a of the first to third anode wirings 31 to 33.

[0087] The first selection circuit 37 includes a transistor 37a having a source electrically connected to the power supply wiring (VDD) and a transistor 37b having a source electrically connected to the ground wiring. The drains of the transistors 37a and 37b are electrically connected to the first anode wiring 31. The first selection circuit 37 is electrically connected to each of the first capacitors 34 via the first anode wiring 31.

[0088] The transistor 37a is used to store charge in each first capacitor 34. The transistor 37b is used to discharge charge from each first capacitor 34. When a predetermined signal is applied to the gate of the transistor 37a, charge is stored in each first capacitor 34. When a predetermined signal is applied to the gate of the transistor 37b, charge is discharged from each first capacitor 34. Therefore, according to this embodiment, by selectively storing charge in the first capacitor 34 of the first to third capacitors 34 to 36 using the first selection circuit 37, it is possible to pass a current to each light-emitting element 23 electrically connected to the first anode wiring 31.

[0089] 4, the second and third selection circuits 38, 39 have the same structure as the first selection circuit 37. Therefore, according to this embodiment, by storing charge in each second capacitor 35 by the second selection circuit 38, it is possible to pass a current to each light-emitting element 23 electrically connected to the second anode wiring 32. Furthermore, according to this embodiment, by storing charge in each third capacitor 36 by the third selection circuit 39, it is possible to pass a current to each light-emitting element 23 electrically connected to the third anode wiring 33.

[0090] [First to Third Capacitors 34 to 36] The first to third capacitors 34 to 36 are electrically connected to the first to third anode wirings 31 to 33, respectively. Each first capacitor 34 stores charge to be supplied to the light-emitting element 23 electrically connected to the first anode wiring 31. Each second capacitor 35 stores charge to be supplied to the light-emitting element 23 electrically connected to the second anode wiring 32. Each third capacitor 36 stores charge to be supplied to the light-emitting element 23 electrically connected to the third anode wiring 33. According to this embodiment, by supplying charge to each light-emitting element 23 from the first to third capacitors 34 to 36, a current can be passed through each light-emitting element 23. Each of the first to third capacitors 34 to 36 has one electrode electrically connected to one of the first to third anode wirings 31 to 33 and the other electrode electrically connected to a ground wiring.

[0091] The light-emitting device 1 shown in FIG. 4 includes a light-emitting element array including 9×9 light-emitting elements 23 arranged in a two-dimensional array. As shown in FIG. 4, the shape of this light-emitting element array is roughly square in plan view. The light-emitting device 1 shown in FIG. 4 includes four sets of first to third capacitors 34-36 near the four sides of the square. Specifically, the light-emitting device 1 shown in FIG. 4 includes a first set of first to third capacitors 34-36 near the top side of the square, a second set of first to third capacitors 34-36 near the right side of the square, a third set of first to third capacitors 34-36 near the bottom side of the square, and a fourth set of first to third capacitors 34-36 near the left side of the square. These first to third capacitors 34-36 are examples of the K sets of first to M-th capacitors of the present disclosure (K is an integer greater than or equal to 2). FIG. 4 shows an example where K is 4.

[0092] The first to third capacitors 34 to 36 of the first and third sets are electrically connected to the first to third horizontal wirings 31 a to 33 a of the first to third anode wirings 31 to 33, respectively. On the other hand, the first to third capacitors 34 to 36 of the second and fourth sets are electrically connected to the first to third vertical wirings 31 b to 33 b of the first to third anode wirings 31 to 33, respectively. As a result, the first to third capacitors 34 to 36 shown in FIG. 4 are electrically connected to the first to third anode wirings 31 to 33, respectively.

[0093] In each set, the first to third capacitors 34 to 36 are arranged in clockwise order. For example, the first capacitor 34, the second capacitor 35, and the third capacitor 36 of the first set are respectively arranged on the left, center, and right sides near the top edge of the square. The first capacitor 34, the second capacitor 35, and the third capacitor 36 of the second set are respectively arranged on the upper, center, and lower sides near the right edge of the square. As a result, the four sets of first to third capacitors 34 to 36 shown in FIG. 4 are arranged symmetrically with respect to the center of the square. The center of the square is approximately located at the position of the light-emitting element 23 in the fifth row and fifth column of the 9×9 light-emitting elements 23. In FIG. 4, the four sets of first to third capacitors 34 to 36 are arranged in four-fold rotational symmetry (90-degree rotational symmetry).

[0094] According to this embodiment, it is possible to set the average distance between each light-emitting element 23 and the corresponding four capacitors to a value close to the average distance between another light-emitting element 23 and the corresponding four capacitors.

[0095] For example, the light-emitting element 23 at the upper left is close to the first capacitor 34 above but far from the first capacitor 34 below. On the other hand, the light-emitting element 23 at the lower right is close to the third capacitor 36 on the right but far from the third capacitor 36 on the left. Therefore, the average distance between the light-emitting element 23 at the upper left and the four first capacitors 34 is close to the average distance between the light-emitting element 23 at the lower right and the four third capacitors 36. This is also true for the other 79 light-emitting elements 23. This makes it possible to reduce the difference in impedance between the wiring of different light-emitting elements 23 with respect to the anode wiring between each light-emitting element 23 and the corresponding four capacitors.

[0096] The light emitting device 1 of this embodiment may include the first to third capacitors 34 to 36 only near one, two, or three of the four sides of the square. However, in this case, it is desirable that the first to third capacitors 34 to 36 are also arranged symmetrically or nearly symmetrically with respect to the center of the square. Therefore, it is desirable that the light emitting device 1 of this embodiment include the first to third capacitors 34 to 36 on two or more of the four sides of the square. For example, by arranging two sets of the first to third capacitors 34 to 36 near the top and bottom sides of the square, it is possible to achieve an arrangement with two-fold rotational symmetry (180-degree rotational symmetry).

[0097] Furthermore, the light emitting device 1 of this embodiment has an LDD output current I DLF The peak value I peak , LDD output current I DLF The pulse width W, or the LDD output current I DLF (i.e., the light emitting timing of the light emitting element 23) and controls the output of the light emitting pulse. In this example, the light emitting pulse control mechanism 70 is electrically connected to the gate of each drive circuit E and controls the applied voltage of the drive circuit. The light emitting pulse control mechanism 70 will be described in detail later.

[0098] FIG. 5 is an example of a circuit diagram showing the connection relationship between the selection circuits 37, 38, and 39, the light emitting element 23, the drive circuit E, and the light emitting pulse control mechanism 70 according to the first embodiment.

[0099] 5 shows three selection circuits 37, 38, and 39 arranged in the second direction Y (vertical direction), a plurality of light-emitting elements 23a, 23b, 23c, 23d, 23e, and 23f connected to two drive circuits Ea and Eb arranged in the first direction X (horizontal direction), and light-emitting pulse control mechanisms 70a and 70b connected to the two drive circuits Ea and Eb, respectively. Each of the two drive circuits Ea and Eb has a transistor 24a and 24b.

[0100] 5, the first anode wiring 31 is called Anode1, the second anode wiring 32 is called Anode2, and the third anode wiring 33 is called Anode3. The current flowing through Anode1 is controlled by a first selection circuit 37 and a capacitor 34, the current flowing through Anode2 is controlled by a second selection circuit 38 and a capacitor 35, and the current flowing through Anode3 is controlled by a third selection circuit 39 and a capacitor 36. Also, in FIG. 5, the cathode wiring 41 connected to the drive circuit Ea is called Cathode1, and the cathode wiring 41 connected to the drive circuit Eb is called Cathode2.

[0101] As shown in Fig. 5, a first capacitor 34 is connected to a first selection circuit 37, a second capacitor 35 is connected to a second selection circuit 38, and a third capacitor 36 is connected to a third selection circuit 39. As shown in Fig. 4, a plurality of first capacitors 34 may be connected to the first selection circuit 37, but for simplicity, Fig. 5 shows an example in which one first capacitor 34 is connected to the first selection circuit 37. Similarly, one second capacitor 35 and one third capacitor 36 are connected to the second selection circuit 38 and the third selection circuit 39, respectively.

[0102] The first selection circuit 37 controls the charging and discharging of the first capacitor 34. The charge stored in the first capacitor 34 is used to cause all light-emitting elements 23 (light-emitting elements 23a and 23d in FIG. 5 ) in the row connected to the first capacitor 34 to emit light. More specifically, the discharge current of the first capacitor 34 is supplied to the anodes (Anode 1) of the light-emitting elements 23a and 23d connected to the first capacitor 34. Similarly, the discharge current of the second capacitor 35 is supplied to the anodes (Anode 2) of all light-emitting elements 23 (light-emitting elements 23b and 23e in FIG. 5 ) in the row connected to the second capacitor 35. Furthermore, the discharge current of the third capacitor 36 is supplied to the anodes (Anode 3) of all light-emitting elements 23 (light-emitting elements 23c and 23f in FIG. 5 ) in the row connected to the third capacitor 36.

[0103] The drive circuit Ea controls the driving of the connected light-emitting elements 23 (light-emitting elements 23a, 23b, and 23c in FIG. 5). The drive circuit Ea includes a transistor 24a. The transistor 24a is connected between the cathodes of the light-emitting elements 23a, 23b, and 23c and a reference voltage (e.g., ground voltage) node. When the transistor 24a is turned on, the cathode (Cathode 1) voltage of the light-emitting elements 23 (23a, 23b, and 23c) connected to the drain of the transistor 24a drops to the reference voltage (e.g., GND). For example, if the first capacitor 34 is charged, the discharge current of the first capacitor 34 flows between the anode and cathode of the light-emitting element 23a connected to the first capacitor 34 and the drive circuit Ea, causing the light-emitting element 23a to emit light. Similarly, if the second capacitor 35 or the third capacitor 36 is charged, the drive circuit Ea drives the light-emitting element 23b or 23c to emit light. Similarly to the drive circuit Ea, the drive circuit Eb controls the driving of the light-emitting elements 23 (light-emitting elements 23d, 23e, and 23f in FIG. 5) connected to the drive circuit Eb by lowering the cathode (Cathode 2) voltage. The drive circuit Eb includes a transistor 24b. The transistor 24b is connected between the cathodes of the light-emitting elements 23d, 23e, and 23f and a reference voltage (e.g., ground voltage) node.

[0104] The operation of the drive circuit Ea is controlled by an emission pulse control mechanism 70a. The drive circuit Ea is driven by a trigger signal TRIG_O output from the emission pulse control mechanism 70a, turning on the transistor 24a. This controls the output of an emission pulse generated by the emission of the light-emitting element 23a. Similarly to the drive circuit Ea, the operation of the drive circuit Eb is controlled by an emission pulse control mechanism 70b.

[0105] FIG. 6 is a diagram illustrating the operation of the light emitting device 1 according to the first embodiment.

[0106] 6A and 6B show, as an example, the operation when the light-emitting element 23a emits light. The light-emitting element 23a to be emitted has an anode (Anode 1) connected to the first capacitor 34 and the first selection circuit 37 via the anode wiring 31. The light-emitting element 23a has a cathode (Cathode 1) connected to the drive circuit Ea.

[0107] 6A is a diagram showing the charging of the first capacitor 34. In the first selection circuit 37, the transistor 37a is turned on and the transistor 37b is turned off. As a result, charge is supplied from the power supply wiring (VDD) to the first capacitor 34, and the first capacitor 34 is charged. Also, in the drive circuit Ea, the transistor 24a is turned off. As a result, the cathode voltage of the light-emitting element 23a does not drop, and no current flows between the anode and cathode of the light-emitting element 23a.

[0108] 6B is a diagram showing the light emission of the light-emitting element 23a. After the first capacitor 34 is charged in FIG. 6A, the transistor 24a is turned on in the drive circuit Ea based on the operation of the light-emitting pulse control mechanism 70a. This reduces the cathode voltage of the light-emitting element 23a. The first capacitor 34 is discharged, causing a current to flow between the anode and cathode of the light-emitting element 23a, causing the light-emitting element 23a to emit light. The operation of the light-emitting element 23a and the light-emitting element 23b is similar, so the following description will mainly focus on the operation of the light-emitting element 23a.

[0109] FIG. 7 is a graph for explaining the performance of the light emitting device 1a according to the first embodiment.

[0110] The vertical axis of Fig. 7 represents the LDD (Laser Diode Driver) output current (output current from the LDD substrate to each light emitting element 23), and the horizontal axis of Fig. 7 represents time. Fig. 7 shows the waveform of the LDD output current (light emitting pulse waveform). Fig. 7 further shows the LDD output current I DLF The peak value I peak and the LDD output current I DLF The pulse width W and the LDD output current I DLF and the half-value width W' of the

[0111] In order to improve the performance of the distance measuring device 100, the LDD output current I DLF The peak value I peak It is desirable to increase the peak value I and shorten the pulse width W (or half-value width W'). According to this embodiment, by reducing the impedance of each wiring or the difference in impedance between wirings, peak It is possible to increase the pulse width W (or half-width W') and shorten the pulse width W.

[0112] In this embodiment, a light emitting device 1a having a delay circuit that makes the pulse width W variable will be described.

[0113] FIG. 8 is a diagram illustrating the operation of the delay circuit 50 in the light emitting device 1 of the first embodiment.

[0114] 8A is a circuit diagram showing the connection relationships of the first capacitor 34, the parasitic inductor L1, the light-emitting element 23a, the transistor 24a, the logical product 60, and the delay circuit 50 in the light-emitting device 1 of the first embodiment. The light-emitting device 1 of this embodiment includes, as the light-emitting pulse control mechanism 70, a delay circuit 50 that generates a delay signal Delay, which is a delayed signal of the trigger signal TRIG_O, based on the trigger signal TRIG_O output from the control unit 108. A delay circuit 50 is also provided for each channel. The light-emitting device 1 applies a control signal Vg to the gate wiring 42 of the transistor 24 of the drive circuit E based on the trigger signal TRIG_O and the delay signal Delay. The logical product 60 receives the trigger signal TRIG_O and the logical negation of the delay signal Delay as inputs and outputs the control signal Vg. The control signal Vg becomes high level when the trigger signal TRIG_O is at high level and the delay signal Delay is at low level, and becomes low level when the trigger signal TRIG_O is at high level and the delay signal Delay is at high level.

[0115] In this example, the logical product 60 receives as input the trigger signal TRIG_O and the logical negation of the delay signal Delay, but the circuit configuration of the drive circuit Ea is not limited to this. For example, the logical negation of the trigger signal TRIG_O and the delay signal Delay may be received as input, or various circuit configurations may be used, such as using a negative logical product instead of a logical product.

[0116] 8B is an example of a waveform diagram of the circuit shown in FIG. 8A. As described above, the control signal Vg goes high when the trigger signal TRIG_O goes high, causing the source and drain of the transistor 24a to become conductive and current to flow to the light-emitting element 23. When current flows to the light-emitting element 23, light is generated. Furthermore, the control signal Vg goes low when the delay signal Delay goes high, causing the source and drain of the transistor 24 to become non-conductive and cutting off the current to the light-emitting element 23. tw in FIG. 8B indicates the time when the transistor 24a is on. In this way, by cutting off the current to the light-emitting element 23 using the delay signal Delay, the LDD output current IDLF The pulse width W can be corrected to be shorter.

[0117] FIG. 9 is a circuit diagram of a delay circuit 50 according to the first embodiment.

[0118] 9A to 9C are taken as examples of the delay circuit 50 that generates the delay signal Delay. Fig. 9A shows an inverter chain circuit 55, Fig. 9B shows an RC circuit 58, and Fig. 9C shows a delay locked loop (DLL) circuit 59.

[0119] FIG. 9A illustrates an inverter chain circuit 55 as an example of the delay circuit 50. The inverter chain circuit 55 receives the trigger signal TRIG_O in parallel from the gate wiring 42 of the transistor 24a as an input and generates a delay signal Delay whose output timing is delayed from the trigger signal TRIG_O according to the number of inverter circuits 57. The delay signal Delay is generated based on a pulse width control signal output from the control unit 108. The light emission timing pulse is an example of the trigger signal TRIG_O. The decoder 56 outputs a high-level selection signal to the inverter circuit 57 of the corresponding stage according to the delay time determined by the pulse width control signal. The inverter circuit 57 calculates the logical product of the selection signal and the trigger signal TRIG_O input in parallel. Furthermore, the inverter circuit 57 generates an output signal to the next stage of the high-level signal calculated by the logical product with the high-level signal from the inverter circuit 53 of the previous stage. In this way, the inverter chain circuit 55 can output the delay signal Delay at variable timing by inputting a selection signal to the inverter circuit 53 at a stage corresponding to the delay time.

[0120] In this example, the inverter chain circuit 55 includes a 64-stage inverter chain. The decoder 56 outputs a 6-bit selection signal and outputs a delay signal Delay corresponding to this selection signal. The number of inverter stages is not limited to this, and any number of inverters may be included.

[0121] For example, the inverter chain circuit 55 may variably control the value of the selection signal to be output using the temperature monitoring result by the temperature detection unit 109. This allows the inverter chain circuit 55 to suppress variations in the operation of the circuit elements due to the operating temperature.

[0122] 9B shows an RC circuit 58 as an example of the delay circuit 50. The RC circuit 58 receives the trigger signal TRIG_O in parallel from the gate wiring 42 of the transistor 24a and outputs a delay signal Delay whose output timing is delayed relative to the trigger signal TRIG_O according to the time constant of the resistor R and the capacitor C. In this example, the light-emitting device 1 outputs the delay signal Delay using the RC circuit 58, allowing for a simple circuit configuration. Furthermore, by making the resistor R and the capacitor C variable in resistance and capacitance, the time constant can be changed arbitrarily, allowing the delay signal Delay to be output at variable timing.

[0123] 9C shows a delay-locked loop circuit 59 as an example of the delay circuit 50. The delay-locked loop circuit 59 includes multiple delay buffer circuits. The trigger signal TRIG_O is input in parallel from the gate wiring 42 of the transistor 24a, and the delay signal Delay is output with a fixed delay time relative to the trigger signal TRIG_O. To generate the delay signal Delay, the delay-locked loop circuit 59 can operate any number of delay buffer circuits based on the input of a pulse width control signal, and output the delay signal Delay with variable timing. By using the delay-locked loop circuit 59, the light-emitting device 1 can reduce variation in the delay amount compared to the two circuits described above, and can control the delay time with greater precision.

[0124] According to this embodiment, the light emitting device 1 includes a delay circuit 50 that is connected in parallel to the gate wiring 42 of the transistor 24 a and that can variably control the gate of the transistor 24 a. This allows the light emitting device 1 to change the light emitting period of the light emitting element 23 and correct the light emitting pulse width W to be shorter.

[0125] Furthermore, according to this embodiment, the distance measuring device 100 has a shorter light emission pulse width W, which improves the eye-safe margin and also improves the distance measurement capability.

[0126] Second Embodiment FIG. 10 is a diagram for explaining the operation of a timing adjustment circuit 64 according to a second embodiment.

[0127] 10A is a circuit diagram of the light emitting device 1 of the first embodiment, mainly showing the connection relationship between the first capacitor 34, the parasitic inductor L1, the light emitting element 23a, the transistor 24a, the pre-driver preDRV, and the timing adjustment circuit 64. The light emitting device 1 according to this embodiment includes, as the light emitting pulse control mechanism 70, the timing adjustment circuit 64 that generates a timing adjustment signal TA by adjusting the output timing of the trigger signal TRIG_O output from the control unit 108.

[0128] Fig. 10B is an example of a waveform diagram of the circuit shown in Fig. 10A. As described above, after the light emission timing pulse Vpulse goes high, the light emission timing of the control signal Vg is adjusted by the timing adjustment circuit 64, and the control signal Vg goes high with a delay.

[0129] Further, a timing adjustment circuit 64 is provided for each channel. Based on the operation of the timing adjustment circuit 64, the light emitting device 1 varies the light emission timing of the light emitting element 23a.

[0130] FIG. 11 is a circuit diagram of a timing adjustment circuit 64 according to the second embodiment.

[0131] FIG. 11 illustrates an inverter chain circuit 55 as the timing adjustment circuit 64. The inverter chain circuit 55 receives the trigger signal TRIG_O in parallel from the gate wiring 42 of the transistor 24a and delays the output timing of the trigger signal TRIG_O according to the number of inverter circuits 57. The decoder 56 outputs a high-level selection signal to the inverter circuit 57 of the corresponding stage according to the delay time of the trigger signal TRIG_O. The inverter circuit 57 calculates the logical product of the selection signal and the parallel-input trigger signal TRIG_O. The inverter circuit 57 then generates an output signal to the next stage that is the logical sum of the high-level signal from the inverter circuit 53 of the previous stage and the high-level signal calculated by the logical product. In this way, the inverter chain circuit 55 can output a timing adjustment signal TA in which the output timing of the trigger signal TRIG_O is adjusted by inputting the selection signal to the inverter circuit 53 of the stage corresponding to the delay time.

[0132] In this example, the inverter chain circuit 55 includes a 64-stage inverter chain. The decoder 56 outputs a 6-bit selection signal based on a pulse delay control signal output from the control unit 108, and outputs a timing adjustment signal TA corresponding to this selection signal. The number of inverter stages is not limited to this, and any number of inverters may be included. Furthermore, the circuit configuration of the timing adjustment circuit 64 is not limited to this, and other circuit configurations may be used.

[0133] For example, the inverter chain circuit 55 may variably control the value of the selection signal to be output using the temperature monitoring result by the temperature detection unit 109. This allows the inverter chain circuit 55 to suppress variations in the operation of the circuit elements due to the operating temperature.

[0134] FIG. 12 is a circuit diagram showing the structure of a light emitting device 1 according to a modified example of the second embodiment.

[0135] In this modification, instead of including a light emitting pulse control mechanism 70, the light emitting device 1 reduces timing differences between channels by making the wiring for pulse signals supplied to each light emitting element 23 in the light emitting element array equal in length. For example, it is conceivable to make the gate wiring 42 connected to the pre-driver preDRV have a tree-like structure. In this example, the gate wiring 42 has a binary tree structure. Furthermore, in this modification, the light emitting device 1 generates light emitting timing pulses using the control unit 108 to cause each light emitting element 23 to emit light. As a result, each wiring has equal length, making it possible to reduce light emitting timing differences between channels.

[0136] According to this embodiment, the light emitting device 1 includes a timing adjustment circuit 64 that is connected in parallel to the gate wiring 42 of the transistor 24 a and that can variably control the gate of the transistor 24 a. This allows the light emitting device 1 to correct the light emission timing of the light emitting element 23.

[0137] Furthermore, according to the modified example of this embodiment, the gate wiring 42 of each light-emitting element 23 arranged in the light-emitting device 1 is wired with the same length, so that the variation in light-emitting timing between the light-emitting elements 23 can be reduced.

[0138] Third Embodiment FIG. 13 is a diagram illustrating the operation of the LDD capability switching circuit 65 of the light emitting device 1 according to the third embodiment.

[0139] 13A is a circuit diagram of the light emitting device 1 of the first embodiment, mainly showing the connection relationship between the first capacitor 34, the parasitic inductor L1, the light emitting element 23a, the transistor 24a, and the LDD capacity switching circuit 65. The light emitting device 1 of this embodiment functions as a light emitting pulse control mechanism 70, and controls the LDD output current I DLF The peak value I peak The LDD power switching circuit 65 is provided for each channel.

[0140] 13B is an example of a waveform diagram of the circuit shown in FIG. 13A. As described above, the light emitting device 1 uses the LDD capability switching circuit 65 to switch the LDD output current I DLF The peak value Ipeak Furthermore, as will be described later, by providing the light emitting device 1 with both the LDD capability switching circuit 65 and the light emission timing adjustment circuit 64, the peak value I peak is corrected, and the light emission timing of the light emitting element 23a can be varied.

[0141] FIG. 14 is a circuit diagram of an LDD capability switching circuit 65 according to the third embodiment.

[0142] 14A shows an example in which the LDD capability switching circuit 65 switches the number of transistors connected in parallel with the transistor 24a, FIG. 14B shows an example in which the LDD capability switching circuit 65 switches the output voltage of the pre-driver preDRV, and FIG. 14C shows an example in which the LDD capability switching circuit 65 switches the output current of the light-emitting element 23.

[0143] 14A, the LDD capacity switching circuit 65 controls the LDD output current I DLF The selective drive circuit 67 varies the level of the light-emitting element 23a. The selective drive circuit 67 also includes a transistor that is turned on based on the light-emission timing pulse and the LDD capability switching signal. In this example, the LDD capability switching circuit 65 also includes a logical AND 68 that performs an operation to turn on the transistor when both the light-emission timing pulse and the LDD capability switching signal are at a high level. In this example, the drive circuit Ea is also called a constant drive circuit, and the constant drive circuit and the selective drive circuit 67 are connected in parallel to the cathode side of the light-emitting element 23a.

[0144] Due to variations in the on-resistance of the transistor 24, the LDD output current I DLF In such a case, the light emitting device 1 operates the selective drive circuit 67 in addition to the constant drive circuit.

[0145] The light emitting device 1 drives the constant drive circuit and the selective drive circuit 67 to generate an LDD output current I DLF The peak value I peak can be corrected.

[0146] Furthermore, the number of parallel selective drive circuits 67 is not limited to 1. The LDD capability switching circuit 65 may include a plurality of selective drive circuits 67, or may have other circuit configurations.

[0147] 14B, the LDD capability switching circuit 65 includes a pre-driver preDRV that varies the output voltage in response to an LDD capability switching signal. DLF The peak value I peak can be corrected.

[0148] 14C , the LDD capability switching circuit 65 includes a control current source IDAC that generates a reference current and a current mirror circuit. The current mirror circuit includes transistors 75, 76, and 77. One source or drain of transistor 75 is connected to the output side of the control current source IDAC, and the other source or drain is connected to transistor 77. One source or drain of transistor 76 is connected to the cathode side of light-emitting element 23 a, and the other source or drain is connected to the drain of transistor 24 a. The gates of transistors 75 and 76 are connected to each other.

[0149] One of the sources or drains of the transistor 77 is connected to the other of the sources or drains of the transistor 77, and the other of the sources or drains is grounded. The gate of the transistor 77 is connected to the gate of the transistor 24a.

[0150] The control current source IDAC is controlled by the control unit 108, and its current value is controlled by the LDD capability switching signal, outputting a variable current. The current mirror circuit outputs a current obtained by amplifying the output current from the control current source IDAC by X times (X is a positive value) based on the variable current. In this example, the output current of the current mirror circuit is 100 times the current output from the control current source IDAC.

[0151] Furthermore, the transistor 77 and the transistor 24a are turned on when the light emission timing pulse goes high.

[0152] The light emitting device 1 amplifies the current output from the control current source IDAC using a current mirror circuit to generate an LDD output current I DLF can be made variable, and the LDD output current I DLF The peak value I peak can be corrected.

[0153] FIG. 15 is a circuit diagram of an LDD capability switching circuit 65 according to a first modification of the third embodiment.

[0154] In this modification, the transistor 24a is a P-type MOS transistor, and its drain is connected to the anode side of the light emitting element 23a. The output side of the LDD capacity switching circuit 65 is connected to the gate of the transistor 24a.

[0155] The LDD capability switching circuit 65 includes a resistor 78, a resistor 79, an operational amplifier 80, and a control current source IDAC. The resistors 78, 79, and the operational amplifier 80 form a feedback circuit, with the resistor 78 connected to the inverting input terminal of the operational amplifier 80 and the control current source IDAC, and the resistor 79 connected to the non-inverting input terminal of the operational amplifier 80 and the source of the transistor 24a. The resistor 78 is also referred to as a first resistor, and the resistor 79 is also referred to as a second resistor.

[0156] In this example, the feedback circuit controls the value of the current flowing through the transistor 24a according to the ratio between the first resistor and the second resistor. Specifically, the current value of the control current source IDAC is controlled by the LD drive capability control signal from the control unit 108, and a variable current is output. This controls the value of the current flowing through the first resistor, and a current value corresponding to this value flows through the second resistor. In this example, the ratio between the first resistor and the second resistor is 1:100, and the LDD output current I is controlled so that a value 100 times the value of the current flowing through the control current source IDAC flows into the source of the transistor 24a. DLF The value of is controlled.

[0157] The light emitting device 1 controls the value of the current flowing from the control current source IDAC to control the LDD output current I DLF The peak value I peak can be corrected.

[0158] FIG. 16 is a circuit diagram of a light emitting device 1 according to a second modification of the third embodiment.

[0159] In this modification, the light emitting device 1 includes, instead of the light emission pulse control mechanism 70, a charge pump circuit 90 that is connected between the power supply wiring (VDD) and the first capacitor 34 and that boosts the voltage applied to the first capacitor 34. A charge pump circuit 90 may also be provided between the power supply wiring (VDD) and the second capacitor 35 and between the power supply wiring (VDD) and the third capacitor 36. In such cases, the operation is similar, so the operation of the charge pump circuit 90 provided between the power supply wiring (VDD) and the first capacitor 34 will be described.

[0160] In this example, the first selection circuit 37 is omitted, and for example, the charge pump circuit 90 is disposed between the power supply wiring (VDD) and the source of the transistor 37a.

[0161] The light emitting device 1 uses the charge pump circuit 90 to boost the output voltage from the power supply line (VDD) and adjust the amount of charge stored in the first capacitor 34. As a result, the light emitting device 1 generates an LDD output current I DLF can be controlled, and the LDD output current I DLF The peak value I peak can be corrected.

[0162] According to this embodiment, the light emitting device 1 is connected to the cathode side of the light emitting element 23, and the LDD output current I DLF As a result, the light emitting device 1 has an LDD output current I DLF The peak value I peak can be corrected.

[0163] Furthermore, according to the first modification of this embodiment, the light emitting device 1 is connected to the anode side of the light emitting element 23, and the LDD output current I DLF As a result, the light emitting device 1 has an LDD output current I DLF The peak value I peak can be corrected.

[0164] Furthermore, according to the second modification of this embodiment, the light emitting device 1 includes a charge pump circuit 90 between the power supply wiring (VDD) and the first capacitor 34, which boosts the output voltage from the power supply wiring (VDD) and adjusts the amount of charge stored in the first capacitor 34. As a result, the LDD output current I DLF can be made variable, and the LDD output current I DLF The peak value I peak can be corrected.

[0165] Fourth Embodiment FIG. 17 is an example of a flowchart of a distance measuring device 100 according to a fourth embodiment.

[0166] In this embodiment, in the distance measuring device 100 including the light emitting device 1 according to the third embodiment, the LDD output current I DLF The peak value I peak The processing flow for correcting the peak value I is described below. The distance measuring device 100 according to this embodiment calculates the peak value I based on the light reception level of the reflected light of the light irradiated onto the measurement object. peak Correct the following.

[0167] Peak value I peak The correction of the peak value I can be performed by, for example, providing a calibration period for the control unit 108 before using the distance measuring device 100. peak The correction is performed under the condition that the distance to the object is known to the distance measuring device 100. Furthermore, since the reflectance differs depending on the type of object, it is desirable that the type of object is also known to the distance measuring device 100.

[0168] In step S11, the control unit 108 first sets any one channel out of O channels (O is an integer equal to or greater than 1) of light-emitting elements 23 arranged in a two-dimensional array as a correction channel, and starts measurement. peakSince the correction is performed under the condition that the distance to the object is known, the control unit 108 may include a process of receiving an input of the distance to the object in advance from the user via a user interface, etc. In step S12, the control unit 108 controls the drive unit 102 to drive the light emitting unit 101 to start irradiating the object with light. The light irradiating the object with light is performed using the light emitting element 23 of the channel selected in step S11.

[0169] In step S13, the control unit 108 controls the drive unit 102 to drive the light receiving unit 106, and the light receiving unit 106 receives reflected light from the object to be measured. In step S14, the control unit 108 measures the level of received light based on the signal input via the signal processing unit 107. The measurement of the level of received light is realized by the control unit 108 having the function of a received light level measuring unit.

[0170] In step S15, the control unit 108 determines whether the measured light reception level exceeds a set reference amount. This determination is achieved by the control unit 108 having the function of a light reception level measurement unit, as described above. The set reference amount is determined based on the light reception level corresponding to a known distance. For example, the set reference amount may be the average light reception level due to reflected light from the object when the object is at a known distance. If the control unit 108 does not determine in step S15 that the light reception level exceeds the set reference amount (No in step S15), in step S16, the control unit 108 controls the drive unit 102 to drive the LDD capacity switching circuit 65 and increase the LDD capacity setting by one level.

[0171] In the example of FIG. 14A , the control unit 108 controls the drive unit 102 to perform LDD capability switching control, sets the LDD capability switching signal to a high level, and operates one selective drive circuit 67. Also, in the example of FIG. 14B , the control unit 108 increases the output voltage of the pre-driver preDRV by one step based on the LDD capability switching signal. Also, in the example of FIG. 14C , the control unit 108 controls the drive unit 102 to increase the current value of the control current source IDAC by one step based on the LDD drive capability switching signal. Similarly, in the examples of FIGS. 15 and 16 , the control unit 108 controls the drive unit 102 to operate the control current source IDAC or the charge pump circuit 90, thereby increasing the LDD capability setting by one step.

[0172] If the control unit 108 determines in step S15 that the received light level exceeds the set reference amount (Yes in step S15), then in step S17, the control unit 108 controls the drive unit 102 to drive the LDD capacity switching circuit 65 and reduce the LDD capacity by one level. As in the example described above, the control unit 108 drives the drive unit 102 to switch the LDD capacity. Although not described in this flowchart, the control unit 108 again controls the irradiation of the workpiece with light, the reception of reflected light, and the measurement of the received light level through the operations of steps S12 to S14. In step S18, the control unit 108 determines whether the measured received light level exceeds the set reference amount again using the switched LDD capacity.

[0173] If the control unit 108 determines in step S18 that the received light level exceeds the set reference amount (Yes in step S18), the process returns to step S17, where the control unit 108 controls the drive unit 102 to drive the LDD capacity switching circuit 65 and lower the LDD capacity by one level. If the control unit 108 does not determine in step S18 that the received light level exceeds the set reference amount (No in step S18), the control unit 108 lowers the LDD capacity setting by one level in step S19.

[0174] In step S20, the control unit 108 determines whether or not there is an unmeasured channel among the N-channel light-emitting elements 23. If the control unit 108 determines in step S20 that there is an unmeasured channel (Yes in step S20), in step S21, the control unit 108 determines whether or not there is an unmeasured channel having a peak value I peak If the control unit 108 determines in step S20 that there is no unmeasured channel (No in step S20), the distance measuring device 100 sets another channel for correcting the LDD output current I DLF The peak value I peak The correction is completed.

[0175] According to this embodiment, the distance measuring device 100 can change the LDD capability setting based on the measurement of the received light level, and can set the LDD output current I DLF The peak value I peak can be corrected.

[0176] Fifth Embodiment FIG. 18 is an example of a flowchart of the distance measuring device 100 according to the fifth embodiment.

[0177] In this embodiment, in the distance measuring device 100 including the light emitting device 1 according to the second embodiment, the timing adjustment circuit 64 is used to adjust the LDD output current I DLF The distance measuring device 100 according to this embodiment corrects the light emission timing based on the bin positions of a histogram generated from the reflected light of light irradiated onto the measurement object.

[0178] The light emission timing may be corrected, for example, by the control unit 108 setting a calibration period before using the distance measuring device 100. The light emission timing is corrected under the condition that the distance to the object is known to the distance measuring device 100.

[0179] In step S31, the control unit 108 first sets any one channel of the O channels of light-emitting elements 23 arranged in a two-dimensional array as a correction channel and starts measurement. As described above, the light-emission timing correction is performed under the condition that the distance to the object is known, so the control unit 108 may include processing to receive input of the distance to the object in advance from the user via a user interface or the like. In step S32, the control unit 108 controls the drive unit 102 to drive the light-emitting unit 101 and start irradiating the object with light. The light-emitting element 23 of the channel selected in step S31 is used to irradiate the object with light.

[0180] In step S33, the control unit 108 controls the drive unit 102 to drive the light receiving unit 106, and the light receiving unit 106 receives reflected light from the object. In step S34, the control unit 108 measures bin positions of a histogram generated based on the irradiated light. The bin positions may be determined, for example, as positions on the time axis of the generated histogram where the appearance frequency included in a certain bin exceeds a predetermined threshold for the first time. The measurement of the bin positions is realized by the control unit 108 having the function of a bin position measurement unit.

[0181] Here, the histogram is a graph showing the detection frequency as a frequency for each detection timing indicated by the digital signal. The signal processing unit 107 generates a histogram showing the intensity of the irradiated light for each time in units of macropixels. The histogram is generated with the horizontal axis representing the light reception timing on the time axis and the vertical axis representing the frequency of occurrence of that light reception timing. The generation of the histogram is realized by the signal processing unit 107 having the function of a histogram generation unit. Hereinafter, the bin position refers to the position of a bin on the time axis.

[0182] In step S35, the control unit 108 determines whether the measured bin position is earlier than the set reference. This determination is achieved by the control unit 108 having the function of a bin position measurement unit, as described above. The set reference is determined based on a known distance. For example, the set reference may be the average light reception timing of light irradiated onto the object when the object is at a known distance. If the control unit 108 does not determine in step S35 that the bin position is earlier than the set reference on the time axis (No in step S35), in step S36, the control unit 108 controls the drive unit 102 to drive the timing adjustment circuit 64 and advance the light emission timing setting by one step.

[0183] 11, the control unit 108 controls the drive unit 102 to perform pulse delay control and transmits a selection signal for changing the number of operations of the inverter circuit 57. For example, the control unit 108 changes the number of "1" bits in the selection signal to reduce the number of operations of the inverter circuit 57. This allows the control unit 108 to advance the light emission timing setting by one step.

[0184] If the control unit 108 determines in step S35 that the bin position on the time axis is earlier than the set reference (Yes in step S35), then in step S37, the control unit 108 controls the drive unit 102 to drive the timing adjustment circuit 64 and delay the light emission timing setting by one stage. As in the specific example described above, the control unit 108 drives the drive unit 102 to switch the timing adjustment circuit 64. Although not described in this flowchart, the control unit 108 again controls the irradiation of light to the measurement object, the reception of reflected light, and the measurement of the bin position through the operations of steps S32 to S34. In step S38, the control unit 108 determines whether the bin position measured again using the switched light emission timing setting is earlier on the time axis than the set reference.

[0185] If the control unit 108 determines in step S38 that the Bin position is earlier than the set reference (Yes in step S38), the process returns to step S37, where the control unit 108 controls the drive unit 102 to drive the timing adjustment circuit 64 and delay the light emission timing setting by one step.If the control unit 108 does not determine in step S38 that the Bin position on the time axis is earlier than the set reference (No in step S38), the control unit 108 performs an operation to return the light emission timing setting by one step in step S39.

[0186] In step S40, the control unit 108 determines whether any unmeasured channels exist among the N-channel light-emitting elements 23. If the control unit 108 determines in step S40 that any unmeasured channels exist (Yes in step S40), in step S41 the control unit 108 sets another channel of the unmeasured channels for which the light emission timing is to be corrected, and the process returns to S31. If the control unit 108 determines in step S40 that any unmeasured channels do not exist (No in step S40), the distance measuring device 100 ends the light emission timing correction.

[0187] According to this embodiment, the distance measuring device 100 can change the light emission timing setting based on the measurement of the Bin position, and can correct the light emission timing for each channel of the light emitting element 23.

[0188] Sixth Embodiment FIG. 19 is an example of a flowchart of the distance measuring device 100 according to the sixth embodiment.

[0189] In this embodiment, in the distance measuring device 100 including the light emitting device 1 according to the first embodiment, the delay circuit 50 is used to delay the LDD output current I DLF The following describes a processing flow for correcting the pulse width W. The distance measuring device 100 according to this embodiment corrects the pulse width W based on the bin width of a histogram generated from the reflected light of light irradiated onto the object.

[0190] The pulse width W can be corrected, for example, by the control unit 108 setting a calibration period before using the distance measuring device 100. The light emission timing is corrected under the condition that the distance to the object is known to the distance measuring device 100.

[0191] In step S51, the control unit 108 first sets any one channel of the O channels of light-emitting elements 23 arranged in a two-dimensional array as a correction channel and starts measurement. As described above, the correction of the pulse width W is performed under the condition that the distance to the object is known, so the control unit 108 may include a process of receiving input of the distance to the object in advance from the user via a user interface or the like. In step S52, the control unit 108 controls the drive unit 102 to drive the light-emitting unit 101 and start irradiating the object with light. The light-emitting element 23 of the channel selected in step S51 is used to irradiate the object with light.

[0192] In step S53, the control unit 108 controls the drive unit 102 to drive the light receiving unit 106, which receives the light reflected from the object. The measurement of the pulse width W is realized by the control unit 108 having the function of a pulse width measurement unit. In step S54, the control unit 108 measures the bin width of the histogram generated based on the reflected light.

[0193] The bin width is expressed as the width of a certain bin or the total width of bins from a certain bin to another certain bin. When the bin width is expressed as the total width of bins from a certain bin to another certain bin, the bin width is expressed as the total width of bins from the bin where the appearance frequency value of the light-receiving timing in the generated histogram first exceeds a predetermined threshold to the bin where the appearance frequency value falls below the threshold, for example.

[0194] In step S55, the control unit 108 determines whether the measured bin width is shorter than the set reference value. This determination is achieved by the control unit 108 having the function of a pulse width measurement unit, as described above. The set reference value may also be the average value of the bin widths obtained when light is irradiated onto the object when the object is at a known distance. If the control unit 108 does not determine in step S55 that the bin width is shorter than the set reference value (No in step S55), in step S56, the control unit 108 drives the drive unit 102 to drive the delay circuit 50, thereby shortening the light emission pulse width setting by one step.

[0195] In the example of FIG. 9A , the control unit 108 controls the drive unit 102, performs pulse width control, and transmits a selection signal to change the number of operations of the inverter circuit 57. For example, the control unit 108 changes the number of "1" bits in the selection signal to reduce the number of operations of the inverter circuit 57. This outputs a delay signal Delay corresponding to the number of operations of the inverter circuit 57. Also, in the example of FIG. 9B , the control unit 108 controls the drive unit 102 and changes the values ​​of the resistor R and capacitor C to output a delay signal Delay corresponding to the value of the time constant. Also, in the example of FIG. 14C , the control unit 108 controls the drive unit 102, performs pulse width control, and transmits a pulse width control signal to change the number of operations of the delay buffer circuit. This outputs a delay signal Delay corresponding to the number of operations of the delay buffer circuit. This allows the control unit 108 to shorten the pulse width setting of the light-emitting device 1 by one stage.

[0196] If the control unit 108 determines in step S55 that the bin width is shorter than the set reference value (Yes in step S55), then in step S57, the control unit 108 controls the drive unit 102 to drive the delay circuit 50 and increase the light emission pulse width setting by one step. As in the example described above, the control unit 108 drives the drive unit 102 to switch the delay circuit 50. Although not described in this flowchart, the control unit 108 again controls the irradiation of the object with light, the reception of reflected light, and the measurement of the bin width through the operations of steps S52 to S54. In step S58, the control unit 108 determines whether the bin width measured again using the switched light emission pulse width setting is shorter than the set reference value.

[0197] If the control unit 108 determines in step S58 that the Bin width is shorter than the set reference value (Yes in step S58), the process returns to step S57, where the control unit 108 controls the drive unit 102 to drive the delay circuit 50, thereby lengthening the light emission pulse width setting by one step. If the control unit 108 does not determine in step S58 that the Bin width is shorter than the set reference value (No in step S58), the control unit 108 returns the light emission pulse width by one step in step S59.

[0198] In step S60, the control unit 108 determines whether or not there is an unmeasured channel among the N-channel light-emitting elements 23. If the control unit 108 determines in step S60 that there is an unmeasured channel (Yes in step S60), in step S61, the control unit 108 selects the peak value I peak If the control unit 108 determines in step S60 that there are no unmeasured channels (No in step S60), the distance measuring device 100 ends the correction of the light emission timing.

[0199] According to this embodiment, the distance measuring device 100 can change the light emission pulse width setting based on the measurement of the Bin width, and can correct the light emission pulse width for each channel of the light emitting element 23.

[0200] Seventh Embodiment FIG. 20 is an example of a flowchart of the distance measuring device 100 according to the seventh embodiment.

[0201] In this embodiment, in a distance measuring device 100 including the timing adjustment circuit 64 according to the second embodiment and the LDD capability switching circuit 65 according to the third embodiment, these circuits are used to adjust the LDD output current I DLF The light emission timing and peak value I peak The processing flow for correcting the above will be described below.

[0202] The processes in steps S71 to S79 ​​are performed to obtain the peak value I peak This is the correction flow, but since it is the same as the processing from steps S11 to S19, the explanation will be omitted.

[0203] The processing from steps S80 to S85 is a flow for correcting the light emission timing. In this flow, the distance measuring device 100 corrects the light emission timing according to the total number of bins measured. In other words, the distance measuring device 100 corrects the light emission timing so that the number of bins matches between the light emitting elements 23. The light emission timing correction flow may be performed in a similar manner to the flow from steps S34 to S39.

[0204] In step S80, the control unit 108 measures the number of bins (Bin No.) included in the histogram generated based on the irradiated light. In step S81, the control unit 108 determines whether the measured total number of bins satisfies a criterion. As described above, this measurement and this determination are realized by the control unit 108 having the function of a bin number measurement unit. Furthermore, the setting criterion is determined based on a known distance. For example, the setting criterion may be determined according to the number of bins that can be obtained when the measurement object is at a known distance.

[0205] If the control unit 108 determines in step S81 that the bin number does not satisfy the criterion (No in step S81), then in step S82 the control unit 108 drives the drive unit 102, which drives the timing adjustment circuit 64, and advances the light emission timing setting by one step. If the control unit 108 determines in step S81 that the bin number satisfies the criterion (Yes in step S81), then in step S83 the control unit 108 controls the drive unit 102, which drives the timing adjustment circuit 64, and delays the light emission timing setting by one step. Although not described in this flowchart, the control unit 108 again controls the irradiation of light to the object, the reception of reflected light, and the measurement of the bin positions through the operations of steps S72 to S73 and step S80.

[0206] In step S84, the control unit 108 determines again whether the measured bin number satisfies the criterion. If the control unit 108 determines in step S84 that the bin number satisfies the criterion (Yes in step S84), the process returns to step S83, where the control unit 108 controls the drive unit 102 to drive the timing adjustment circuit 64 and delay the light emission timing setting by one step. If the control unit 108 does not determine in step S84 that the bin number satisfies the criterion (No in step S84), in step S85, the control unit 108 performs an operation of returning the light emission timing setting by one step.

[0207] In step S86, the control unit 108 determines whether or not there is an unmeasured channel among the N-channel light-emitting elements 23. If the control unit 108 determines in step S86 that there is an unmeasured channel (Yes in step S86), in step S87, the control unit 108 determines whether or not there is an unmeasured channel having a peak value I peak If the control unit 108 determines in step S86 that there is no unmeasured channel (No in step S86), the distance measuring device 100 sets the peak value I peak Then, the light emission timing correction is completed.

[0208] In this flowchart, the flow for changing the LDD capacity setting and the light emission timing setting has been described, but in addition to setting either or both of the LDD capacity setting and the light emission timing setting using the method described above, a light emission pulse width setting flow may also be added.

[0209] According to this embodiment, the distance measuring device 100 can change the LDD capability setting and the light emission timing setting based on the measurement of the light reception level and the measurement of the number of bins, and can set the peak value I peak And the light emission timing can be corrected.

[0210] Eighth Embodiment (1) Light Emitting Device 1a of Eighth Embodiment FIG. 21 is a circuit diagram showing the structure of a light emitting device 1a of the eighth embodiment.

[0211] The light emitting device 1a shown in Fig. 21 has the same structure as the light emitting device 1a shown in Fig. 4. Here, a method for driving the light emitting elements 23 indicated by the reference characters P1 to P6 will be described.

[0212] The light-emitting element 23 designated by symbol P1 is electrically connected to the first anode wiring 31 and the upper left cathode wiring 41. When only this light-emitting element 23 is to be driven (individual drive), only the first selection circuit 37 of the first to third selection circuits 37 to 39 is turned on, and only the drive circuit E for the upper left cathode wiring 41 is turned on. As a result, charge is accumulated only in the first capacitor 34 of the first to third capacitors 34 to 36, and only the three light-emitting elements 23 electrically connected to the upper left cathode wiring 41 are to be driven. As a result, current flows only through the light-emitting element 23 designated by symbol P1, and only this light-emitting element 23 emits light.

[0213] The light-emitting elements 23 indicated by symbols P2 to P4 are electrically connected to the first anode wiring 31 and are electrically connected to mutually different cathode wirings 41. When only these light-emitting elements 23 are to be driven (simultaneous drive), only the first selection circuit 37 of the first to third selection circuits 37 to 39 is turned on, and only the drive circuit E for these cathode wirings 41 is turned on. As a result, charge is accumulated only in the first capacitor 34 of the first to third capacitors 34 to 36, and only the nine light-emitting elements 23 electrically connected to these cathode wirings 41 are to be driven. As a result, current flows only through the light-emitting elements 23 indicated by symbols P2 to P4, and only these light-emitting elements 23 emit light.

[0214] The light-emitting elements 23 indicated by symbols P5 and P6 are electrically connected to the first and second anode wirings 31 and 32, respectively, and are also electrically connected to the same single cathode wiring 41. When only these light-emitting elements 23 are to be driven (simultaneous drive), only the first and second selection circuits 37 and 38 of the first to third selection circuits 37 to 39 are turned on, and only the drive circuit E for this cathode wiring 41 is turned on. As a result, charge is accumulated only in the first and second capacitors 34 and 35 of the first to third capacitors 34 to 36, and only the three light-emitting elements 23 electrically connected to this cathode wiring 41 are to be driven. As a result, current flows only through the light-emitting elements 23 indicated by symbols P5 and P6, and only these light-emitting elements 23 emit light.

[0215] The individual driving of the light-emitting element 23 indicated by reference symbol P1 can also be applied to the other 80 light-emitting elements 23. The same applies to the simultaneous driving of the light-emitting elements 23 indicated by reference symbols P2 to P6. Any number of light-emitting elements 23 may be simultaneously driven. The control of these individual driving and simultaneous driving is performed by, for example, the control unit 9 shown in FIG. 1.

[0216] The above-described individual driving and simultaneous driving can also be applied to the light emitting device 1a described in the first to third embodiments or their modified examples. For example, these controls are performed by the control unit 9 shown in FIG.

[0217] (2) Light Emitting Device 1a of First Modification FIG. 22 is a circuit diagram showing the structure of a light emitting device 1a of a first modification of the eighth embodiment.

[0218] The light-emitting device 1a of this modification includes first to third cathode wirings 31' to 33' in the positions of the first to third anode wirings 31 to 33 shown in FIG. 4 , multiple anode wirings 41' in the positions of the multiple cathode wirings 41, and no multiple gate wirings 42. Similarly to the first to third anode wirings 31 to 33, the first to third cathode wirings 31' to 33' each include first to third horizontal wirings 31a' to 33a' and first to third vertical wirings 31b' to 33b'. The first to third cathode wirings 31' to 33' are an example of the first terminal wiring of the present disclosure. The anode wiring 41' is an example of the second terminal wiring of the present disclosure.

[0219] Each light emitting element 23 of this modified example includes a cathode electrically connected to one of the first to third cathode wirings 31' to 33', and an anode electrically connected to one of the plurality of anode wirings 41'.

[0220] The light-emitting device 1a of this modified example further includes first to third transistors 61 to 63 at the positions of the first to third capacitors 34 to 36 shown in FIG. 4 . The first to third transistors 61 to 63 are, for example, N-type MOS transistors. The gates of the first to third transistors 61 to 63 are electrically connected to the first to third gate wirings 164 to 166, respectively. Each of the first to third transistors 61 to 63 has a drain electrically connected to one of the first to third cathode wirings 31′ to 33′ and a source electrically connected to a ground wiring. Each of the first to third transistors 61 to 63 forms a drive circuit E. The drive circuit E including the first to third transistors 61 to 63 is an example of the first to Mth drive circuits, respectively.

[0221] The light emitting device 1a of this modified example further includes a plurality of capacitors 167 at the positions of the plurality of transistors 24 shown in Fig. 4. Each of these capacitors 167 has one electrode electrically connected to one of the plurality of anode wirings 41' and the other electrode electrically connected to a ground wiring.

[0222] The light emitting device 1a of this modification further includes a plurality of selection circuits 168 instead of the first to third selection circuits 37 to 39. Each selection circuit 168 is electrically connected to a corresponding anode wiring 41′. Each selection circuit 168 includes a transistor 168a having a source electrically connected to a power supply wiring and a transistor 168b having a source electrically connected to a ground wiring. The drain of the transistor 168a and the drain of the transistor 168b are electrically connected to the cathode wiring 41. Each selection circuit 168 is electrically connected to a corresponding capacitor 167 via the anode wiring 41′. The transistor 168a is, for example, a P-type MOS transistor. The transistor 168b is, for example, an N-type MOS transistor. The transistor 168a is an example of a first switch of the present disclosure. The transistor 168b is an example of a second switch of the present disclosure.

[0223] The functions of the capacitor 167, the transistor 168a, and the transistor 168b are similar to those of the first to third capacitors 34 to 36, the transistors 37a to 39a, and the transistors 37b to 39b, respectively. The transistor 168a can store charge in the corresponding capacitor 167. The transistor 168b can discharge charge from the corresponding capacitor 167. The capacitor 167 can supply charge to the light-emitting element 23 via the anode wiring 41′, thereby causing a current to flow through the light-emitting element 23.

[0224] The functions of the first to third transistors 61 to 63 and their drive circuit E are similar to those of the transistor 24 and its drive circuit E. The first to third transistors 61 to 63 can drive the light-emitting elements 23 electrically connected to the first to third cathode wirings 31′ to 33′, respectively.

[0225] Furthermore, the light-emitting pulse control mechanism 70 is electrically connected to the first to third gate wirings 164 to 166. As in the above example, the first to third transistors 61 to 63 included in the drive circuit E are turned on based on the operation of the light-emitting pulse control mechanism 70. Furthermore, the light-emitting device 1a of this modification is also applicable to light-emitting devices 1a including other light-emitting pulse control mechanisms 70 described in the first to third embodiments or their modifications.

[0226] The light emitting device 1a of this modification is also applicable to the structure of the light emitting device 1 according to the modification of the second embodiment, which does not include the light emitting pulse control mechanism 70. That is, the light emitting device 1a may have a structure in which the gate wirings are equal in length, instead of including the light emitting pulse control mechanism 70. The light emitting device 1a of this modification is also applicable to the structure of the light emitting device 1 according to the second modification of the third embodiment, which does not include the light emitting pulse control mechanism 70. That is, the light emitting device 1 may have, instead of the light emitting pulse control mechanism 70, a charge pump circuit 90 connected between the power supply wiring (VDD) and the capacitors 167, which boosts the voltage applied to each capacitor 167.

[0227] According to the light emitting device 1a of this modification, it is possible to realize the same control as that of the light emitting device 1a of the first embodiment, despite having a different structure from that of the light emitting device 1a of the first embodiment.

[0228] (3) Light Emitting Device 1a of Second Modification FIG. 23 is a circuit diagram showing the structure of a light emitting device 1a of a second modification of the eighth embodiment.

[0229] The light-emitting device 1a of this modification includes first to third cathode wirings 31' to 33' at the positions of the first to third anode wirings 31 to 33 shown in FIG. 4 , multiple anode wirings 41' at the positions of the multiple cathode wirings 41, and multiple gate wirings 42' at the positions of the multiple gate wirings 42. Similarly to the first to third anode wirings 31 to 33, the first to third cathode wirings 31' to 33' each include first to third horizontal wirings 31a' to 33a' and first to third vertical wirings 31b' to 33b'. The first to third cathode wirings 31' to 33' are an example of the first terminal wiring of the present disclosure. The anode wiring 41' is an example of the second terminal wiring of the present disclosure. Each light-emitting element 23 of this modification includes a cathode electrically connected to one of the first to third cathode wirings 31' to 33' and an anode electrically connected to one of the multiple anode wirings 41'. Each transistor 24 in this modification includes a gate electrically connected to one of the plurality of gate wirings 42', a drain electrically connected to one of the plurality of anode wirings 41', and a source electrically connected to a power supply wiring. Each transistor 24 in this modification is, for example, a P-type MOS transistor. In this modification, the first to third capacitors 34 to 36 and the first to third selection circuits 37 to 39 are electrically connected to the first to third cathode wirings 31' to 33', respectively.

[0230] The light-emitting pulse control mechanism 70 is electrically connected to each gate wiring 42'. As in the above example, the transistor 24 included in the drive circuit E is turned on based on the operation of the light-emitting pulse control mechanism 70. The light-emitting device 1a of this modification is also applicable to the light-emitting devices 1a including other light-emitting pulse control mechanisms 70 described in the first to third embodiments or their modifications.

[0231] The light emitting device 1a of this modification is also applicable to the structure of the light emitting device 1 according to the modification of the second embodiment, which does not include the light emission pulse control mechanism 70. That is, the light emitting device 1a may have a structure in which the gate wirings are equal in length, instead of including the light emission pulse control mechanism 70. The light emitting device 1a of this modification is also applicable to the structure of the light emitting device 1 according to the second modification of the third embodiment, which does not include the light emission pulse control mechanism 70. That is, the light emitting device 1 may have, instead of the light emission pulse control mechanism 70, a charge pump circuit 90 connected between the power supply wiring (VDD) and the capacitor 34, 35, or 36, which boosts the voltage applied to each of the capacitors 34, 35, or 36.

[0232] According to the light emitting device 1a of this modification, it is possible to realize the same control as that of the light emitting device 1a of the first embodiment, despite having a different structure from that of the light emitting device 1a of the first embodiment.

[0233] (4) Light Emitting Device 1a of Third Modification FIG. 24 is a circuit diagram showing the structure of a light emitting device 1a of a third modification of the eighth embodiment.

[0234] 4, the light emitting device 1a includes six sets of first to third capacitors 34 to 36. The first to third capacitors 34 to 36 of this modification are disposed within the LD chip 11 (or within the LDD substrate 12), and are therefore disposed near the light emitting element 23. In this modification, each first capacitor 34 is electrically connected to one of the horizontal wirings 31a, each second capacitor 35 is electrically connected to one of the horizontal wirings 32a, and each third capacitor 36 is electrically connected to one of the horizontal wirings 33a.

[0235] The light-emitting pulse control mechanism 70 is electrically connected to each gate wiring 42. As in the above example, the transistor 24 included in the drive circuit E is turned on based on the operation of the light-emitting pulse control mechanism 70. The light-emitting device 1a of this modification is also applicable to the light-emitting devices 1a including other light-emitting pulse control mechanisms 70 described in the first to third embodiments or their modifications.

[0236] The light emitting device 1a of this modification is also applicable to the structure of the light emitting device 1 according to the modification of the second embodiment, which does not include the light emission pulse control mechanism 70. That is, the light emitting device 1a may have a structure in which the gate wirings are equal in length, instead of including the light emission pulse control mechanism 70. The light emitting device 1a of this modification is also applicable to the structure of the light emitting device 1 according to the second modification of the third embodiment, which does not include the light emission pulse control mechanism 70. That is, the light emitting device 1 may have, instead of the light emission pulse control mechanism 70, a charge pump circuit 90 connected between the power supply wiring (VDD) and the capacitor 34, 35, or 36, which boosts the voltage applied to each of the capacitors 34, 35, or 36.

[0237] According to the light emitting device 1a of this modification, it is possible to realize the same control as that of the light emitting device 1a of the first embodiment, despite having a different structure from that of the light emitting device 1a of the first embodiment.

[0238] (5) Light Emitting Device 1a of Fourth Modification FIG. 25 is a circuit diagram showing the structure of a light emitting device 1a of a fourth modification of the eighth embodiment.

[0239] The light emitting device 1a of this modified example does not include the first to third capacitors 34 to 36. The light emitting device 1a of this modified example stores the electric charge to be supplied to each light emitting element 23 in a parasitic capacitance, which will be described later, instead of the first to third capacitors 34 to 36.

[0240] FIG. 26 is another circuit diagram showing the structure of a light emitting device 1a according to the fourth modified example of the eighth embodiment.

[0241] FIG. 26 shows a pair of a light-emitting element 23 and a transistor 24 included in the light-emitting device 1a of this modified example. FIG. 26 further shows a parasitic capacitance 23' of the light-emitting element 23 and a parasitic capacitance 24' of the transistor 24. The light-emitting device 1a of this modified example stores charge to be supplied to each light-emitting element 23 in these parasitic capacitances 23', 24'. This allows current to flow through each light-emitting element 23, causing each light-emitting element 23 to emit light. The storage in the parasitic capacitances 23', 24' is controlled by first to third selection circuits 37 to 39.

[0242] The light-emitting pulse control mechanism 70 is electrically connected to each gate wiring 42. As in the above example, the transistor 24 included in the drive circuit E is turned on based on the operation of the light-emitting pulse control mechanism 70. The light-emitting device 1a of this modification is also applicable to the light-emitting devices 1a including other light-emitting pulse control mechanisms 70 described in the first to third embodiments or their modifications.

[0243] The light emitting device 1a of this modification is also applicable to the structure of the light emitting device 1 according to the modification of the second embodiment, which does not include the light emission pulse control mechanism 70. That is, the light emitting device 1a may have a structure in which the gate wirings are equal in length, instead of including the light emission pulse control mechanism 70. The light emitting device 1a of this modification is also applicable to the structure of the light emitting device 1 according to the second modification of the third embodiment, which does not include the light emission pulse control mechanism 70. That is, the light emitting device 1 may have, instead of the light emission pulse control mechanism 70, a charge pump circuit 90 connected between the power supply wiring (VDD) and the parasitic capacitance 23' or 24', which boosts the voltage applied to each parasitic capacitance 23' or 24'.

[0244] According to the light emitting device 1a of this modification, it is possible to realize the same control as that of the light emitting device 1a of the first embodiment, despite having a different structure from that of the light emitting device 1a of the first embodiment.

[0245] (6) Light Emitting Device 1a of Fifth Modification FIG. 27 is a circuit diagram showing various examples of the structure of a light emitting device 1a of a fifth modification of the eighth embodiment.

[0246] The light emitting device 1a of this modification has the same structure as the light emitting device 1a of the first embodiment as shown in Fig. 4. However, while each drive circuit E of the first embodiment has the structure shown in A of Fig. 27, each drive circuit E of this modification has the structure shown in any one of B to D of Fig. 27.

[0247] The drive circuit E shown in B of Fig. 27 includes three transistors 24 electrically connected to a cathode wiring 41 and three transistors 25 electrically connected to these transistors 24. The transistors 24 and 25 shown in B of Fig. 27 are, for example, N-type MOS transistors. The gates of these transistors 24 are electrically connected to a common gate wiring 42, and the gates of these transistors 25 are electrically connected to a common gate wiring 43. The transistors 24 and 25 are examples of the first and second transistors of the present disclosure, respectively.

[0248] Each transistor 24 is used to select a light-emitting element 23 that generates light. Each transistor 25 is used as a current source. For example, to generate light from a certain light-emitting element 23, a predetermined signal is applied to the gate wiring 42 of the drive circuit E for that light-emitting element 23, and a predetermined signal (DC bias voltage) is applied to the gate wiring 43 of the drive circuit E for that light-emitting element 23. This causes the source and drain of each transistor 24 in that drive circuit E to become conductive, and also the source and drain of each transistor 25 in that drive circuit E to become conductive, allowing current to flow through that light-emitting element 23. In this case, each transistor 25 functions as a current source. In this example, the pulse control mechanism 70 may be connected to either the gate wiring 42 or the gate wiring 43, or may be connected to both the gate wiring 42 and the gate wiring 43.

[0249] The drive circuit E shown in FIG. 27C includes three transistors 24 electrically connected to a cathode wiring 41. The transistors 24 shown in FIG. 27C are, for example, NPN-type bipolar transistors. In this case, the wiring 42 is the "base wiring" rather than the "gate wiring." The operation of the drive circuit E shown in FIG. 27C is similar to that of the drive circuit E shown in FIG. 27A. In this example, the pulse control mechanism 70 is electrically connected to the wiring 42, which is the base wiring.

[0250] The drive circuit E shown in FIG. 27D includes three transistors 24 electrically connected to a cathode wiring 41 and three transistors 25 electrically connected to these transistors 24. The transistors 24 and 25 shown in FIG. 27D are, for example, NPN-type bipolar transistors. In this case, the wirings 42 and 43 are "base wirings" rather than "gate wirings." The operation of the drive circuit E shown in FIG. 27D is similar to that of the drive circuit E shown in FIG. 27B. In this example, the pulse control mechanism 70 may be connected to either the wiring 42 or the wiring 43, which are base wirings, or may be connected to both the wiring 42 and the wiring 43.

[0251] According to the light emitting device 1a of this modification, it is possible to realize the same control as that of the light emitting device 1a of the first embodiment, despite having a different structure from that of the light emitting device 1a of the first embodiment.

[0252] (7) Light Emitting Device 1a of Sixth Modification FIG. 28 is a circuit diagram showing the structure of a light emitting device 1a of a sixth modification of the eighth embodiment.

[0253] 4, the light emitting device 1a of this modification includes first to third voltage detection circuits 71 to 73. The first voltage detection circuit 71 is electrically connected to the first horizontal wiring 31a of the first anode wiring 31 and the gate of the transistor 37a. The second voltage detection circuit 72 is electrically connected to the second horizontal wiring 32a of the second anode wiring 32 and the gate of the transistor 38a. The third voltage detection circuit 73 is electrically connected to the third horizontal wiring 33a of the third anode wiring 33 and the gate of the transistor 39a.

[0254] The first voltage detection circuit 71 detects the voltage of the first anode wiring 31 from the first horizontal wiring 31a of the first anode wiring 31. This voltage indicates the amount of charge stored in the four first capacitors 34. Therefore, the first voltage detection circuit 71 controls the gate voltage of the transistor 37a based on the voltage detected from the first anode wiring 31. For example, if the detected voltage is lower than a predetermined voltage, the transistor 37a is turned on to start storing charge. On the other hand, if the detected voltage is higher than the predetermined voltage, the transistor 37a is turned off to end storing charge. According to this modification, the output power of the light-emitting device 1a can be changed by changing the value of this predetermined voltage. The value of this predetermined voltage is adjusted, for example, by the control unit 9 shown in FIG. 1.

[0255] Similarly, the second voltage detection circuit 72 detects the voltage of the second anode wiring 32 and controls the gate voltage of the transistor 38 a based on the detected voltage. The third voltage detection circuit 73 detects the voltage of the third anode wiring 33 and controls the gate voltage of the transistor 39 a based on the detected voltage.

[0256] The light-emitting pulse control mechanism 70 is electrically connected to each gate wiring 42. As in the above example, the transistor 24 included in the drive circuit E is turned on based on the operation of the light-emitting pulse control mechanism 70. The light-emitting device 1a of this modification is also applicable to the light-emitting devices 1a including other light-emitting pulse control mechanisms 70 described in the first to third embodiments or their modifications.

[0257] The light emitting device 1a of this modification is also applicable to the structure of the light emitting device 1 according to the modification of the second embodiment, which does not include the light emission pulse control mechanism 70. That is, the light emitting device 1a may have a structure in which the gate wirings are equal in length, instead of including the light emission pulse control mechanism 70. The light emitting device 1a of this modification is also applicable to the structure of the light emitting device 1 according to the second modification of the third embodiment, which does not include the light emission pulse control mechanism 70. That is, the light emitting device 1 may have, instead of the light emission pulse control mechanism 70, a charge pump circuit 90 connected between the power supply wiring (VDD) and the capacitor 34, 35, or 36, which boosts the voltage applied to each of the capacitors 34, 35, or 36.

[0258] FIG. 29 is a timing chart showing the operation of the light emitting device 1a according to the sixth modified example of the eighth embodiment.

[0259] Curves A1 and A2 represent the gate voltages of the anode-side PMOS, i.e., transistors 37a to 39a. Curve B represents the gate voltages of the anode-side NMOS, i.e., transistors 37b to 39b. Curve C represents the gate voltage of the cathode-side NMOS, i.e., transistor 24. Curves D1 and D2 represent the voltages (anode voltages) of the first to third anode wirings 31 to 32. Curves E1 and E2 represent the output currents (LDD output currents) from the LDD substrate 12 to each light-emitting element 23.

[0260] Curve A1 shows the case where the pulse width of the gate voltage of the transistors 37a to 39a is short, in which case the transistors 37a to 39a are turned off at a low anode voltage (curve D1), resulting in low-power emission (curve E1).

[0261] Curve A2 shows the case where the pulse width of the gate voltage of the transistors 37a to 39a is long, in which case the transistors 37a to 39a are turned off at a high anode voltage (curve D2), resulting in high-power emission (curve E2).

[0262] In this way, according to this modification, it is possible to freely change the output power of the light emitting device 1a.

[0263] Ninth Embodiment FIG. 30 is a circuit diagram showing the structure of a light emitting device 1a according to a ninth embodiment.

[0264] The light emitting device 1a of this embodiment includes, in addition to the components shown in Fig. 4, a fourth anode wiring 81, a plurality of fourth capacitors 82, and a fourth selection circuit 83. The fourth anode wiring 81 includes a plurality of fourth horizontal wirings 81a and a plurality of fourth vertical wirings 81b. The fourth selection circuit 83 includes transistors 83a and 83b. The first to fourth selection circuits 37, 38, 39, and 83 are examples of the first to Mth selection circuits of the present disclosure. Fig. 30 shows an example in which M is 4.

[0265] In FIG. 30, in order to distinguish the first to fourth anode wirings 31, 32, 33, and 81 from one another, the first anode wiring 31 is shown by a thick solid line, the second anode wiring 32 is shown by a thick dashed line, the third anode wiring 33 is shown by a thin solid line, and the fourth anode wiring 81 is shown by a thin dashed line.

[0266] The light-emitting device 1a of this embodiment includes 8 x 8 light-emitting elements 23 arranged in a two-dimensional array. Therefore, the first to fourth anode wirings 31, 32, 33, and 81 of this embodiment include four sets of first to fourth horizontal wirings 31a, 32a, 33a, and 81a and first to fourth vertical wirings 31b, 32b, 33b, and 81b. These are examples of P sets of first to Mth horizontal wirings and first to Nth vertical wirings of the present disclosure. FIG. 30 shows an example where P is 4. The number of light-emitting elements 23 shown in FIG. 30 is M(P-2) x N(P-2). The light-emitting device 1a of this embodiment further includes 8 x 8 transistors 24 electrically connected to these light-emitting elements 23.

[0267] The first to fourth capacitors 34, 35, 36, 82 of this embodiment include four sets of first to fourth capacitors 34, 35, 36, 82. The first to fourth capacitors 34, 35, 36, 82 of each set are arranged in order near one side of the square light-emitting element array. Therefore, the first to fourth capacitors 34, 35, 36, 82 of this embodiment are also arranged symmetrically with respect to this square. The first to fourth capacitors 34, 35, 36, 82 are examples of the first to Mth capacitors of K sets of capacitors of the present disclosure. Figure 30 shows an example where K is 4.

[0268] The fourth anode wiring 81, fourth capacitor 82, and fourth selection circuit 83 of this embodiment have the same structures and functions as the first to third anode wirings 31 to 33, the first to third capacitors 34 to 36, and the first to third selection circuits 37 to 39, respectively. The cathode wiring 41 and gate wiring 42 of this embodiment also have the same structures and functions as the cathode wiring 41 and gate wiring 42 of the first embodiment, respectively. However, since the value of M in this embodiment is 4 instead of 3, each cathode wiring 41 is electrically connected to four light-emitting elements 23, and each gate wiring 42 is electrically connected to four transistors 24.

[0269] It is desirable to set the value of M to an appropriate value depending on the usage of the light-emitting device 1a. For example, reducing the value of M has the advantage of being able to reduce the inductance of the wiring for each light-emitting element 23 and the advantage of being able to reduce the number of capacitors and selection circuits. On the other hand, increasing the value of M has the advantage of being able to reduce the number of cathode wirings 41 and gate wirings 42 and the advantage of being able to increase the number of common cathode wirings 41 connected to transistors 24, thereby increasing the driving capability of transistors 24.

[0270] The light-emitting pulse control mechanism 70 is electrically connected to each gate wiring 42. As in the above example, the transistor 24 included in the drive circuit E is turned on based on the operation of the light-emitting pulse control mechanism 70. The light-emitting device 1a of this modification is also applicable to the light-emitting devices 1a including other light-emitting pulse control mechanisms 70 described in the first to third embodiments or their modifications.

[0271] The light emitting device 1a of this modification is also applicable to the structure of the light emitting device 1 according to the modification of the second embodiment, which does not include the light emission pulse control mechanism 70. That is, the light emitting device 1a may have a structure in which the gate wirings are equal in length, instead of including the light emission pulse control mechanism 70. The light emitting device 1a of this modification is also applicable to the structure of the light emitting device 1 according to the second modification of the third embodiment, which does not include the light emission pulse control mechanism 70. That is, the light emitting device 1 may have, instead of the light emission pulse control mechanism 70, a charge pump circuit 90 connected between the power supply wiring (VDD) and the capacitor 34, 35, or 36, which boosts the voltage applied to each of the capacitors 34, 35, or 36.

[0272] <<1. Configuration Example of Vehicle Control System>> FIG. 31 is a block diagram showing a configuration example of a vehicle control system 111, which is a non-limiting example of a mobility device control system to which the present technology is applied.

[0273] The vehicle control system 111 is provided in the vehicle 10 and performs processing related to automated driving of the vehicle 10. This automated driving includes levels 1 to 5 of automated driving, as well as remote driving and / or remote assistance of the vehicle 10 by a remote driver. The level of automated driving may refer to the Society of Automotive Engineers (SAE) J3016™ APL2021 Levels of Driving Automation, with SAE Level 0 representing the lowest level of automated driving and SAE Level 5 representing the highest level of automated driving. For example, SAE Level 1 automated driving may consist of driver assistance functions that provide steering or braking / acceleration support to the driver, and SAE Level 5 automated driving may consist of automated driving functions that can drive the vehicle under all conditions.

[0274] The vehicle control system 111 includes a vehicle control ECU (Electronic Control Unit) 121, a communication unit 122, a map information storage unit 123, a location information acquisition unit 124, an external recognition sensor 125, an in-vehicle sensor 126, a vehicle sensor 127, a memory unit 128, a driving automation control unit 129, a DMS (Driver Monitoring System) 130, an HMI (Human Machine Interface) 131, and a vehicle control unit 132.

[0275] Two or more (or in some cases, all) of the vehicle control ECU 121, communication unit 122, map information storage unit 123, position information acquisition unit 124, external recognition sensor 125, in-vehicle sensor 126, vehicle sensor 127, memory unit 128, driving automation control unit 129, DMS 130, HMI 131, and vehicle control unit 132 are communicatively connected to each other via a communication network 141. The communication network 141 is configured, for example, by an in-vehicle communication network or bus conforming to a digital two-way communication standard such as a Controller Area Network (CAN), a Local Interconnect Network (LIN), a Local Area Network (LAN), FlexRay (registered trademark), or Ethernet (registered trademark). In some embodiments, the communication network 141 may have two or more types of communication networks, and different types of communication networks may be used depending on the type of data being transmitted. For example, a CAN may be used for data related to vehicle control, and an Ethernet may be used for large-volume data. In some embodiments, two or more (or in some cases, all) units of vehicle control system 111 may be directly connected using wireless communication (e.g., communication over a relatively short distance) without using communication network 141. In some embodiments, the wireless communication may use a short-range wireless communication technology. Non-limiting examples of short-range wireless communication technologies include near field communication (NFC) and Bluetooth (registered trademark). In some embodiments, two or more (or in some cases, all) units of vehicle control system 111 may be connected using communication network 141 and a wireless communication technology (e.g., a short-range wireless communication technology).

[0276] Hereinafter, in an embodiment in which two or more units of the vehicle control system 111 communicate with each other via the communication network 141, the description of the communication network 141 will be omitted. For example, in an embodiment in which the vehicle control ECU 121 and the communication unit 122 communicate with each other via the communication network 141, it will simply be described that the vehicle control ECU 121 and the communication unit 122 communicate with each other.

[0277] The vehicle control ECU 121 is configured with various processors such as a CPU (Central Processing Unit), an MPU (Micro Processing Unit), etc. The vehicle control ECU 121 controls the entire or part of the functions of the vehicle control system 111.

[0278] The communication unit 122 communicates with various devices inside the vehicle 10 (hereinafter referred to as in-vehicle devices), various devices outside the vehicle 10 (hereinafter referred to as out-vehicle devices), other vehicles, base stations, etc., and transmits and receives various types of data. In some embodiments, the communication unit 122 may communicate using multiple communication technologies.

[0279] A non-limiting example of communication between the communication unit 122 and an external device will now be briefly described. In some embodiments, the communication unit 122 may communicate with a server (hereinafter referred to as an external server) or the like on an external network via a base station or an access point using wireless communication technology. Non-limiting examples of wireless communication technology include 5G (fifth generation mobile communication system), LTE (Long Term Evolution), and DSRC (Dedicated Short Range Communications). Examples of external networks with which the communication unit 122 can communicate include the Internet, a cloud network, or a network specific to a carrier. The communication technology used by the communication unit 122 to communicate with the external network is not particularly limited as long as it is a wireless communication technology that enables digital two-way communication at a communication speed equal to or higher than a predetermined distance.

[0280] In some embodiments, the communication unit 122 may use P2P (Peer to Peer) technology to communicate with a terminal located near the vehicle. The terminal located near the vehicle may be, for example, a terminal attached to a mobile object moving at a relatively slow speed, such as a pedestrian or a bicycle, a terminal installed at a fixed location in a store, and / or an MTC (Machine Type Communication) terminal. In some embodiments, the communication unit 122 may perform V2X (Vehicle to Everything) communication. V2X communication generally refers to communication between the vehicle and another entity. Non-limiting examples of V2X communication include vehicle-to-vehicle communication with another vehicle, vehicle-to-infrastructure communication with a roadside unit, vehicle-to-home communication, and vehicle-to-pedestrian communication with a terminal carried or worn by a pedestrian.

[0281] In some embodiments, the communication unit 122 may receive a program for updating software that controls the operation of the vehicle control system 111 from outside the vehicle 10 (e.g., over the air). In some embodiments, the communication unit 122 may receive map information, traffic information, information about the surroundings of the vehicle 10, etc. from outside the vehicle 10. In some embodiments, the communication unit 122 may transmit information about the vehicle 10 or information about the surroundings of the vehicle 10, etc. to an external device or an external network. Non-limiting examples of information about the vehicle 10 that the communication unit 122 transmits to an external device or an external network include data indicating the status of the vehicle 10, recognition results by the recognition unit 173, etc. In some embodiments, the communication unit 122 may communicate with a vehicle emergency notification system. Non-limiting examples of a vehicle emergency notification system include eCall, etc.

[0282] In some embodiments, the communication unit 122 may receive electromagnetic waves transmitted by a road traffic information communication system. In some embodiments, the electromagnetic waves may be transmitted using a radio beacon, an optical beacon, FM multiplex broadcasting, or the like.

[0283] A non-limiting example of communication with the in-vehicle devices that the communication unit 122 can perform will now be briefly described. In some embodiments, the communication unit 122 may communicate with the in-vehicle devices using wireless communication. For example, in some embodiments, the communication unit 122 may communicate with the in-vehicle devices using wireless communication technology that enables bidirectional digital communication at a predetermined communication speed or higher. Non-limiting examples of wireless communication technology include wireless LAN, Bluetooth, NFC, and WUSB (Wireless USB). Alternatively, the communication unit 122 may communicate with the in-vehicle devices using wired communication (in addition to or as an alternative to wireless communication). For example, in some embodiments, the communication unit 122 may communicate with the in-vehicle devices using wired communication via a cable connected to a connection terminal (not shown). In some embodiments, the communication unit 122 may communicate with the in-vehicle devices using wired communication technology that enables bidirectional digital communication at a predetermined communication speed or higher. Non-limiting examples of wired communication technologies include Universal Serial Bus (USB), High-Definition Multimedia Interface (HDMI)®, and Mobile High-definition Link (MHL).

[0284] Here, the in-vehicle devices refer to, for example, devices inside the vehicle 10 that are not connected to the communication network 141. The in-vehicle devices are divided into devices that constitute the vehicle control system 111 and devices that do not constitute the vehicle control system 111. Non-limiting examples of in-vehicle devices that do not constitute the vehicle control system 111 include mobile devices and wearable devices carried by users of the vehicle 10 (e.g., the driver or passengers), and information devices that are temporarily installed inside the vehicle 10. These devices can, for example, be moved outside the vehicle 10 and become external devices.

[0285] The map information storage unit 123 stores maps acquired from an external device or an external network and / or maps created by the vehicle 10. For example, the map information storage unit 123 may store a three-dimensional high-precision map, a global map that has lower precision than a high-precision map and covers a wide area, or the like.

[0286] The high-precision map may be, for example, a dynamic map, a point cloud map, a vector map, etc. The dynamic map may be, for example, a map consisting of four layers of dynamic information, quasi-dynamic information, quasi-static information, and static information, and may be provided to the vehicle 10 from an external server or the like. The point cloud map may be a map composed of a point cloud (point cloud data). The vector map may be, for example, a map adapted for automated driving by associating traffic information such as the positions of lanes and traffic lights with the point cloud map.

[0287] The point cloud map and the vector map may be provided, for example, from an external server or the like, or may be created by the vehicle 10 based on sensing results from the camera 151, radar 152, LiDAR 153, etc. as a map for matching with a local map described later, and stored in the map information storage unit 123. Furthermore, when a high-precision map is provided from an external server or the like, map data of, for example, an area of ​​several hundred square meters related to the planned route along which the vehicle 10 will travel may be acquired from the external server or the like in order to reduce communication capacity.

[0288] The position information acquisition unit 124 acquires position information of the vehicle 10. The acquired position information may be provided to the driving automation control unit 129. In some embodiments, the position information acquisition unit 124 may receive GNSS (Global Navigation Satellite System) signals from GNSS satellites. In some embodiments, the position information acquisition unit 124 may receive signals from beacons or the like.

[0289] The external recognition sensor 125 includes various sensors used to recognize the situation outside the vehicle 10, and supplies sensor data from one or more (or in some cases, all) sensors to one or more (or in some cases, all) units of the vehicle control system 111. The type and number of sensors included in the external recognition sensor 125 are arbitrary.

[0290] In some embodiments, the external recognition sensor 125 may include a camera 151, a radar 152, a LiDAR (Light Detection and Ranging, Laser Imaging Detection and Ranging) 153, and an ultrasonic sensor 154. Without being limited to this, the external recognition sensor 125 may be configured to include one or more types of sensors selected from the camera 151, the radar 152, the LiDAR 153, and the ultrasonic sensor 154. The number of cameras 151, radars 152, LiDARs 153, and ultrasonic sensors 154 is not particularly limited as long as they are numbers that can be realistically installed on the vehicle 10. Furthermore, the types of sensors included in the external recognition sensor 125 are not limited to this example, and the external recognition sensor 125 may include other types of sensors. Examples of sensing areas of each sensor included in the external recognition sensor 125 will be described later.

[0291] Camera 151 may use any suitable imaging method. In some embodiments, camera 151 may use an imaging method capable of distance measurement. Non-limiting examples of cameras using imaging methods capable of distance measurement include a time-of-flight (ToF) camera, a stereo camera, a monocular camera, and an infrared camera. Alternatively, camera 151 may simply acquire an image without distance measurement.

[0292] In some embodiments, the external recognition sensor 125 may include an environmental sensor for detecting characteristics of the environment around the vehicle 10. Non-limiting examples of environmental characteristics that may be detected include weather, climate, brightness, etc. In some embodiments, the environmental sensor may include various sensors such as a rain sensor, a fog sensor, a sunlight sensor, a snow sensor, an illuminance sensor, etc.

[0293] In some embodiments, the external recognition sensor 125 may include a microphone used to detect sounds around the vehicle 10 and the location of sound sources.

[0294] The interior sensor 126 includes various sensors for detecting information about the interior of the vehicle 10, and supplies sensor data from one or more (or in some cases, all) sensors to one or more (or in some cases, all) units of the vehicle control system 111. The types and number of the various sensors included in the interior sensor 126 are not particularly limited as long as they are of the types and number that can be realistically installed in the vehicle 10.

[0295] In some embodiments, the interior sensor 126 may include one or more sensors selected from the group consisting of a camera, radar, a seating sensor, a microphone, and a biometric sensor. In some embodiments, the camera included in the interior sensor 126 may use an imaging method capable of measuring distances. Non-limiting examples of cameras using imaging methods capable of measuring distances include a Time of Flight (ToF) camera, a stereo camera, a monocular camera, and an infrared camera. The camera included in the interior sensor 126 may also be used simply to acquire captured images, regardless of distance measurement. The biometric sensor included in the interior sensor 126 may be provided, for example, on a seat or a steering wheel, and may detect various types of biometric information of the user.

[0296] The vehicle sensor 127 includes various sensors for detecting the state of the vehicle 10, and supplies sensor data from one or more (or in some cases, all) sensors to one or more (or in some cases, all) units of the vehicle control system 111. The types and number of the various sensors included in the vehicle sensor 127 are not particularly limited as long as they are of the types and number that can be realistically installed on the vehicle 10.

[0297] In some embodiments, the vehicle sensor 127 may include a speed sensor, an acceleration sensor, an angular velocity sensor (gyro sensor), and / or an inertial measurement unit (IMU) that integrates these. In some embodiments, the vehicle sensor 127 may include a steering angle sensor that detects the steering angle of the steering wheel, a yaw rate sensor, an accelerator sensor that detects the amount of accelerator pedal operation (e.g., pedal force, pedal stroke), and / or a brake sensor that detects the amount of brake pedal operation (e.g., pedal force, pedal stroke). In some embodiments, the vehicle sensor 127 may include a rotation sensor that detects the number of rotations of the engine or motor, an air pressure sensor that detects tire air pressure, a slip ratio sensor that detects tire slip ratio, and / or a wheel speed sensor that detects the rotation speed of the wheels. In some embodiments, the vehicle sensor 127 may include a battery sensor that detects the remaining battery level and temperature, and / or an impact sensor that can detect external impacts.

[0298] The storage unit 128 includes at least one of a non-volatile storage medium and a volatile storage medium and stores data and programs. Non-limiting examples of storage media include magnetic storage devices such as electrically erasable programmable read-only memory (EEPROM), random access memory (RAM), and / or hard disk drives (HDDs), semiconductor storage devices, optical storage devices, and magneto-optical storage devices. The storage unit 128 stores various programs and data used by one or more (or in some cases, all) units of the vehicle control system 111. In some embodiments, the storage unit 128 may include an event data recorder (EDR) or a data storage system for automated driving (DSSAD) and may store information about the vehicle 10 before and after an event such as an accident, as well as information acquired by the in-vehicle sensors 126.

[0299] The driving automation control unit 129 controls the driving automation function of the vehicle 10. In some embodiments, the driving automation control unit 129 may include an analysis unit 161, an action planning unit 162, and an operation control unit 163.

[0300] The analysis unit 161 performs an analysis process of the vehicle 10 and / or the surrounding situation. The analysis unit 161 includes a self-position estimation unit 171, a sensor fusion unit 172, and a recognition unit 173.

[0301] In some embodiments, the self-position estimation unit 171 may estimate the self-position of the vehicle 10 based on sensor data from the external recognition sensor 125 and a high-precision map stored in the map information storage unit 123. For example, the self-position estimation unit 171 may generate a local map based on the sensor data from the external recognition sensor 125 and estimate the self-position of the vehicle 10 by matching the local map with the high-precision map. The position of the vehicle 10 may be based on, for example, the center of the rear wheel pair axle.

[0302] In some embodiments, the local map may be a three-dimensional high-precision map, an occupancy grid map, or the like created using a technique such as SLAM (Simultaneous Localization and Mapping). The three-dimensional high-precision map may be, for example, the point cloud map described above. The occupancy grid map may be a map obtained by dividing a three-dimensional or two-dimensional space around the vehicle 10 into grids of a predetermined size and indicating the occupancy status of objects on a grid-by-grid basis. The occupancy status of an object may be indicated, for example, by the presence or absence of an object or a probability of its presence. In some embodiments, the local map may also be used, for example, in the detection process and / or recognition process of the situation outside the vehicle 10 by the recognition unit 173.

[0303] In some embodiments, the self-position estimation unit 171 may estimate the self-position of the vehicle 10 based on the position information acquired by the position information acquisition unit 124 and / or sensor data from the vehicle sensor 127.

[0304] The sensor fusion unit 172 performs sensor fusion processing to obtain information by combining multiple different types of sensor data (for example, image data supplied from the camera 151 and sensor data supplied from the radar 152). Methods for combining different types of sensor data include, but are not limited to, compounding, integration, fusion, and association.

[0305] The recognition unit 173 executes a detection process for detecting the situation outside the vehicle 10 and / or a recognition process for recognizing the situation outside the vehicle 10 .

[0306] For example, the recognition unit 173 may perform detection processing and / or recognition processing of the situation outside the vehicle 10 based on information from the external recognition sensor 125, information from the self-position estimation unit 171, information from the sensor fusion unit 172, etc.

[0307] Specifically, for example, the recognition unit 173 may perform detection processing and / or recognition processing of objects around the vehicle 10. The object detection processing may be, for example, processing to detect the presence or absence, size, shape, position, movement, etc. of an object. The object recognition processing may be, for example, processing to recognize attributes such as the type of object, or to identify a specific object. The detection processing and the recognition processing are not necessarily clearly separated, and there may be at least a partial overlap.

[0308] In some embodiments, the recognition unit 173 may detect objects around the vehicle 10 by performing clustering to classify a point cloud based on sensor data from the radar 152 and / or the LiDAR 153, etc. into clusters of points. This makes it possible to detect the presence, size, shape, and position of objects around the vehicle 10.

[0309] In some embodiments, the recognition unit 173 may detect the movement of objects around the vehicle 10 by tracking the movement of clusters of the point cloud classified by clustering. This makes it possible to detect the speed and / or the traveling direction (movement vector) of the objects around the vehicle 10.

[0310] In some embodiments, the recognition unit 173 may detect and / or recognize vehicles (including bicycles), people, obstacles, structures, roads, traffic lights, traffic signs, road markings, etc. based on image data provided by the camera 151. In some embodiments, the recognition unit 173 may recognize the type of object around the vehicle 10 by performing recognition processing such as semantic segmentation.

[0311] In some embodiments, the recognition unit 173 may perform a recognition process of traffic rules around the vehicle 10 based on the map stored in the map information storage unit 123, the result of estimation of the self-position by the self-position estimation unit 171, and / or the result of recognition of objects around the vehicle 10 by the recognition unit 173. Through this process, the recognition unit 173 may recognize the position and / or state of traffic lights, the contents of traffic signs and / or road markings, the contents of traffic regulations, and / or lanes that can be traveled, etc.

[0312] In some embodiments, the recognition unit 173 may perform recognition processing of the environment around the vehicle 10. In some embodiments, the recognition unit 173 may recognize weather characteristics (temperature, humidity, brightness) and / or road surface conditions, etc.

[0313] The behavior planning unit 162 creates a behavior plan for the vehicle 10. For example, the behavior planning unit 162 may create a behavior plan by performing route planning and route tracking.

[0314] In some embodiments, path planning may include global path planning and local path planning. Global path planning may include planning a general path from a start to a goal. Local path planning, also referred to as trajectory planning, may include generating a trajectory that allows the vehicle 10 to travel safely and smoothly along a planned path in the vicinity of the vehicle 10, taking into account the motion characteristics of the vehicle 10 and the presence of any obstacles.

[0315] In some embodiments, path following may be a planning of an operation for safely and accurately traveling along a route planned by a route planner within a planned time. The behavior planning unit 162 may, for example, calculate a target speed and / or a target angular velocity of the vehicle 10 based on the result of the path following process.

[0316] The operation control unit 163 controls the operation of the vehicle 10 in order to realize the action plan created by the action planning unit 162 .

[0317] For example, in some embodiments, the operation control unit 163 may control the steering control unit 181, the brake control unit 182, and / or the drive control unit 183 included in the vehicle control unit 132 (described later) to perform lateral vehicle motion control and / or longitudinal vehicle motion control so that the vehicle 10 travels along the trajectory calculated by the trajectory plan. For example, the operation control unit 163 may perform control (e.g., lateral vehicle motion control, longitudinal vehicle motion control) for one or more driver assistance functions and / or driving automation. Non-limiting examples of driver assistance functions include collision avoidance or impact mitigation, following distance control (e.g., control to maintain a specific distance from a vehicle traveling in front of the vehicle 10), vehicle speed control (e.g., control to maintain a specific speed), vehicle collision warning, and lane departure warning. Non-limiting examples of driving automation include driving without operation by a driver or a remote driver.

[0318] In some embodiments, the DMS 130 may perform a driver authentication process and / or a driver state recognition process based on sensor data from the in-vehicle sensors 126 and / or input data input to the HMI 131 (described later), etc. Non-limiting examples of the driver state that may be recognized include physical condition, alertness, concentration, fatigue, gaze direction, level of intoxication, driving operation, posture, etc.

[0319] In some embodiments, the DMS 130 may perform authentication processing of a user other than the driver (e.g., a passenger) and / or recognition processing of the state of the user. In some embodiments, the DMS 130 may perform recognition processing of the interior situation of the vehicle 10 based on sensor data from the interior sensors 126. Non-limiting examples of characteristics of the interior situation of the vehicle 10 that may be recognized include temperature, humidity, brightness, odor, etc.

[0320] The HMI 131 receives various data, instructions, etc. as input, and presents the various data to the user.

[0321] The input of data to the HMI 131 will now be briefly described. The HMI 131 includes an input device through which a person inputs data, instructions, and the like. The HMI 131 generates an input signal based on the data, instructions, and the like input via the input device and supplies the signal to one or more (or in some cases, all) units of the vehicle control system 111. In some embodiments, the HMI 131 may include a touch panel, buttons, switches, and / or levers as input devices. Without being limited thereto, the HMI 131 may also include input devices that allow information to be input by means other than manual operation, such as voice or gestures. In some embodiments, the HMI 131 may include, as input devices, a remote control device using infrared and / or radio waves, or an externally connected device that can operate the vehicle control system 111. Non-limiting examples of externally connected devices include mobile devices (e.g., smartphones) and wearable devices (e.g., smartwatches).

[0322] The presentation of data by the HMI 31 will be briefly described. The HMI 31 generates visual information, auditory information, and / or tactile information for the user and / or persons outside the vehicle 10. The HMI 31 may also perform output control, controlling the output, output content, output timing, and / or output method of each piece of generated information. Non-limiting examples of visual information that can be generated and output by the HMI 31 include information displayed by images or lights, such as an operation screen, a status display of the vehicle 10, a warning display, and a monitor image showing the situation around the vehicle 10. Non-limiting examples of auditory information that can be generated and output by the HMI 31 include voice guidance, warning sounds, warning messages, etc. Non-limiting examples of tactile information that can be generated and output by the HMI 31 include information imparted to the user's sense of touch by force, vibration, movement, etc.

[0323] In some embodiments, the HMI 131 may include, as an output device capable of outputting visual information, a display device that presents visual information by displaying an image itself or a projector device that presents visual information by projecting an image. In some embodiments, the display device may be, in addition to or instead of a typical display device, a device that displays visual information within the user's field of view, such as a head-up display, a see-through display, or a wearable device with an augmented reality (AR) function. In some embodiments, the HMI 131 may include, as an output device capable of outputting visual information, a display device included in a navigation device, an instrument panel, a camera monitoring system (CMS), an electronic mirror, a lamp, or the like provided in the vehicle 10.

[0324] In some embodiments, the HMI 131 may include an audio speaker, headphones, or earphones as output devices capable of outputting auditory information.

[0325] In some embodiments, the HMI 131 may include a haptic element using haptic technology as an output device capable of outputting tactile information. The haptic element may be provided on a part of the vehicle 10 that the user comes into contact with, such as a steering wheel or a seat.

[0326] The vehicle control unit 132 controls one or more (or in some cases, all) units of the vehicle 10. The vehicle control unit 132 includes a steering control unit 181, a brake control unit 182, a drive control unit 183, a body system control unit 184, a light control unit 185, and a horn control unit 186.

[0327] The steering control unit 181 detects and / or controls the state of the steering system of the vehicle 10. The steering system includes, for example, a steering mechanism including a steering wheel, an electric power steering, etc. The steering control unit 181 includes, for example, a steering ECU that controls the steering system, an actuator that drives the steering system, etc.

[0328] The brake control unit 182 detects and / or controls the state of the brake system of the vehicle 10. The brake system includes, for example, a brake mechanism including a brake pedal, an antilock brake system (ABS), a regenerative brake mechanism, etc. The brake control unit 182 includes, for example, a brake ECU that controls the brake system, an actuator that drives the brake system, etc.

[0329] The drive control unit 183 detects and / or controls the state of the drive system of the vehicle 10. The drive system includes, for example, an accelerator pedal, a drive force generating device for generating drive force such as an internal combustion engine or a drive motor, and a drive force transmission mechanism for transmitting the drive force to the wheels. The drive control unit 183 includes, for example, a drive ECU for controlling the drive system, and an actuator for driving the drive system.

[0330] The body system control unit 184 detects and / or controls the states of the body system systems of the vehicle 10. The body system systems include, for example, a keyless entry system, a smart key system, a power window device, a power seat, an air conditioning system, an airbag, a seat belt, a shift lever, etc. The body system control unit 184 includes, for example, a body system ECU that controls the body system systems, an actuator that drives the body system systems, etc.

[0331] The light control unit 185 detects and / or controls the states of various lights of the vehicle 10. Non-limiting examples of lights that can be controlled by the light control unit 185 include headlights, backlights, fog lights, turn signals, brake lights, projector lights, and bumper indicators. The light control unit 185 includes a light ECU that controls the lights, an actuator that drives the lights, and the like.

[0332] The horn control unit 186 detects and / or controls the state of the car horn of the vehicle 10. The horn control unit 186 includes, for example, a horn ECU that controls the car horn, an actuator that drives the car horn, and the like.

[0333] Fig. 32 is a diagram showing an example of a sensing area by the camera 151, the radar 152, the LiDAR 153, the ultrasonic sensor 154, etc. of the external recognition sensor 125 in Fig. 31. Fig. 32 schematically shows the vehicle 10 as viewed from above.

[0334] Sensing area 101F and sensing area 101B are examples of sensing areas of ultrasonic sensors 154. Sensing area 101F (e.g., sensing area of ​​multiple ultrasonic sensors 154) covers the periphery of the front end of vehicle 10. Sensing area 101B (e.g., sensing area of ​​multiple ultrasonic sensors 154) covers the periphery of the rear end of vehicle 10.

[0335] The sensing results in sensing area 101F and / or sensing area 101B may be used, for example, for parking assistance for vehicle 10.

[0336] Sensing area 102F, sensing area 102B, sensing area 102L, and sensing area 102R show examples of sensing areas of a short-range or medium-range radar 152. Sensing area 102F covers a position farther in front of the vehicle 10 than sensing area 101F. Sensing area 102B covers a position farther behind the vehicle 10 than sensing area 101B. Sensing area 102L covers the surrounding area behind the left side of the vehicle 10. Sensing area 102R covers the surrounding area behind the right side of the vehicle 10.

[0337] The sensing results in sensing area 102F may be used, for example, to detect vehicles, pedestrians, and the like present in front of the vehicle 10. The sensing results in sensing area 102B may be used, for example, for a collision prevention function behind the vehicle 10. The sensing results in sensing area 102L and / or sensing area 102R may be used, for example, to detect one or more objects in blind spots on the left and / or right sides of the vehicle 10.

[0338] Sensing area 103F, sensing area 103B, sensing area 103L, and sensing area 103R show examples of sensing areas sensed by camera 151. Sensing area 103F covers a position farther in front of vehicle 10 than sensing area 102F. Sensing area 103B covers a position farther in the rear of vehicle 10 than sensing area 102B. Sensing area 103L covers the periphery on the left side of vehicle 10. Sensing area 103R covers the periphery on the right side of vehicle 10.

[0339] The sensing results in sensing area 103F may be used, for example, for recognizing traffic lights and traffic signs, a lane departure prevention assistance system, or an automatic headlight control system. The sensing results in sensing area 103B may be used, for example, for parking assistance and / or a surround view system. The sensing results in sensing area 103L and / or sensing area 103R may be used, for example, for a surround view system.

[0340] Sensing area 1104 shows an example of the sensing area of ​​LiDAR 153. Sensing area 1104 covers a position farther ahead of vehicle 10 than sensing area 103F. On the other hand, sensing area 1104 has a narrower range in the left-right direction of vehicle 10 than sensing area 103F.

[0341] The sensing results in the sensing area 1104 may be used to detect objects such as surrounding vehicles, for example.

[0342] A sensing area 1105 shows an example of the sensing area of ​​the long-range radar 152. The sensing area 1105 covers a position further ahead of the vehicle 10 than the sensing area 1104. On the other hand, the sensing area 1105 has a narrower range in the left-right direction of the vehicle 10 than the sensing area 1104.

[0343] The sensing results in the sensing area 1105 may be used for, for example, adaptive cruise control (ACC), emergency braking, collision avoidance, and the like.

[0344] In some embodiments, the sensing area of ​​each sensor of the external recognition sensor 125 (for example, the camera 151, the radar 152, the LiDAR 153, and the ultrasonic sensor 154) may have various configurations other than the configuration shown in Fig. 32. Specifically, in some embodiments, the ultrasonic sensor 154 may also sense the sides of the vehicle 10, and the LiDAR 153 may sense the rear of the vehicle 10. Furthermore, the installation position of each sensor is not limited to the above-mentioned examples. Furthermore, the number of each sensor may be one or more.

[0345] The present disclosure has been described above by way of embodiments, their modifications, application examples, and applied examples. However, the present disclosure is not limited to the above-described embodiments, etc., and various modifications are possible. Note that the effects described in this specification are merely examples. The effects of the present disclosure are not limited to the effects described in this specification. The present disclosure may have effects other than those described in this specification.

[0346] Furthermore, for example, the present disclosure can be configured as follows.

[0347] (1) A light emitting element array including a plurality of light emitting elements arranged in a two-dimensional array, each having a first and second terminal; M first wirings (M is an integer of 2 or more) extending in a first direction, and N second wirings (N is an integer of 2 or more) extending in a second direction intersecting the first direction and electrically connected to the M first wirings, respectively, a plurality of first terminal wirings electrically connected to the first terminals of the light emitting elements; a plurality of second terminal wirings electrically connected to the second terminals of the light emitting elements, each electrically connected to P (P is an integer of 2 or more) of the light emitting elements; a plurality of selection circuits electrically connected to one of the plurality of first terminal wirings and the plurality of second terminal wirings, and selecting the light emitting elements to be light emitting; a plurality of drive circuits electrically connected to the other of the plurality of first terminal wirings and the plurality of second terminal wirings, and driving the plurality of light emitting elements; and a plurality of light emitting pulse control mechanisms electrically connected to gates of the plurality of drive circuits, and controlling output of light emitting pulses of the plurality of light emitting elements, or a charge pump circuit electrically connected to a capacitor that accumulates electric charge to be supplied to the light emitting elements, and boosting an applied voltage, A light emitting device, wherein N is an integer that is the same as or different from M, and P is an integer that is the same as or different from at least one of M and N.

[0348] (2) The light emitting device according to (1), wherein the light emitting pulse control mechanism is a delay circuit that receives an input of a trigger signal TRIG_O that drives the drive circuit and generates a delay signal Delay that is a delayed signal of the trigger signal TRIG_O.

[0349] (3) The light emitting device according to (2), wherein the delay circuit is an inverter chain circuit, a delay locked loop circuit, or an RC circuit.

[0350] (4) The light emitting device according to (1), wherein the light emitting pulse control mechanism is a light emitting timing adjustment circuit that generates a timing adjustment signal TA by adjusting the output timing of a trigger signal TRIG_O that drives the drive circuit.

[0351] (5) The light emitting device according to (4), wherein the light emission timing adjustment circuit is an inverter chain circuit.

[0352] (6) The light emitting pulse control mechanism controls the LDD output current I, which is the output current of the light emitting element, based on the LDD capability switching signal. DLF The peak value I peak The light emitting device according to (1), wherein the LDD capability switching circuit corrects the above.

[0353] (7) The light-emitting device according to (6), wherein the LDD capability switching circuit includes one or more selective drive circuits connected in parallel to the drive circuit on the cathode side of the light-emitting element, and the one or more selective drive circuits are driven by the LDD capability switching signal.

[0354] (8) The light emitting device according to (6), wherein the LDD capability switching circuit includes a pre-driver that varies the output voltage based on the LDD capability switching signal.

[0355] (9) The light-emitting device according to (6), wherein the LDD capability switching circuit includes a current mirror circuit that amplifies a current output from a control current source IDAC, the current value of which is controlled by the LDD capability switching signal, and flows the amplified current to the cathode side of the light-emitting element.

[0356] (10) A light emitting device comprising: a plurality of light emitting elements arranged in a two-dimensional array, each having a first and second terminal; M first wirings (M is an integer of 2 or more) extending in a first direction; and N second wirings (N is an integer of 2 or more) extending in a second direction intersecting the first direction and electrically connected to the M first wirings, respectively; a plurality of first terminal wirings electrically connected to the first terminals of the light emitting elements; a plurality of second terminal wirings electrically connected to the second terminals of the light emitting elements, each electrically connected to P (P is an integer of 2 or more) of the light emitting elements; a plurality of selection circuits electrically connected to one of the plurality of first terminal wirings and the plurality of second terminal wirings, and selecting the light emitting elements to be light emitting; a plurality of drive circuits electrically connected to one of the plurality of first terminal wirings and the plurality of second terminal wirings, and driving the plurality of light emitting elements; and a feedback circuit including an operational amplifier, the output side of the operational amplifier being connected to the gate of the drive circuit, the non-inverting input terminal side of the operational amplifier being connected to the source of the drive circuit, and controlling a current flowing through the light emitting elements, A light emitting device, wherein N is an integer that is the same as or different from M, and P is an integer that is the same as or different from at least one of M and N.

[0357] (11) The light emitting device according to (10), wherein the feedback circuit further includes a first resistor connected to the inverting input terminal side and a second resistor connected to the non-inverting input terminal side, and a control current source IDAC controls a value of a current flowing through the second resistor according to a value of a current flowing through the first resistor.

[0358] (12) A light-emitting device including: a plurality of light-emitting elements arranged in a two-dimensional array, each having a first and second terminal; M first wirings (M is an integer of 2 or more) extending in a first direction; and N second wirings (N is an integer of 2 or more) extending in a second direction intersecting the first direction and electrically connected to the M first wirings, respectively, the plurality of first terminal wirings being electrically connected to the first terminals of the light-emitting elements; a plurality of second terminal wirings electrically connected to the second terminals of the light-emitting elements, each electrically connected to P (P is an integer of 2 or more) of the light-emitting elements; a plurality of selection circuits electrically connected to one of the plurality of first terminal wirings and the plurality of second terminal wirings, and selecting the light-emitting elements to be light-emitting; and a plurality of drive circuits electrically connected to the other of the plurality of first terminal wirings and the plurality of second terminal wirings, and driving the plurality of light-emitting elements, wherein the wiring lengths of the respective gate wirings connected to the plurality of drive circuits are equal, the N is an integer that is the same as or different from the M, and the P is an integer that is the same as or different from at least one of the M and the N.

[0359] (13) A light emitting device that is a part of a distance measuring device, wherein the LDD capability switching circuit provided in the light emitting device controls the LDD output current I based on a light reception level value of reflected light of light irradiated onto a measurement object. DLF The peak value I peak The light emitting device according to (6), wherein the light emitting device corrects the above.

[0360] (14) The light emitting device according to (13), wherein the LDD capacity switching circuit lowers the LDD capacity setting by one level when the value of the light receiving level exceeds a set reference amount, and raises the LDD capacity setting by one level when the value of the light receiving level does not exceed the set reference amount.

[0361] (15) A light emitting device that is part of a distance measuring device, the light emitting device described in (4), wherein the light emission timing adjustment circuit provided in the light emitting device corrects the light emission timing of the light emitting element based on the bin position of a histogram generated from the reflected light of light irradiated onto the object to be measured.

[0362] (16) The light emitting device according to (15), wherein the light emission timing adjustment circuit delays the light emission timing setting by one step when the Bin position is earlier than a set reference, and advances the light emission timing setting by one step when the Bin position is not earlier than a set reference.

[0363] (17) A light emitting device that is a part of a distance measuring device, wherein the delay circuit provided in the light emitting device adjusts an LDD output current I based on a bin width of a histogram generated from reflected light of light irradiated onto a measurement object. DLF The light emitting device according to (2), wherein the pulse width W is corrected.

[0364] (18) The light emitting device according to (17), wherein the delay circuit increases the light emission pulse width setting by one step when the Bin width is shorter than a set reference, and decreases the light emission pulse width setting by one step when the Bin width is not shorter than the set reference.

[0365] (19) A light emitting device that is part of a distance measuring device, the light emitting device described in (4), wherein the light emission timing adjustment circuit provided in the light emitting device corrects the light emission timing of the light emitting element based on the number of bins in a histogram generated from the reflected light of light irradiated onto the object to be measured.

[0366] (20) The light emitting device according to (19), wherein the light emission timing adjustment circuit delays the light emission timing setting by one step when the Bin number satisfies a setting criterion, and advances the light emission timing setting by one step when the Bin number does not satisfy the setting criterion.

[0367] 1: light emitting device, 1a: light emitting device, 2: light emitting section, 3: driving section, 10: vehicle, 11: LD chip, 12: LDD substrate, 13: mounting substrate, 14: heat dissipation substrate, 15: correction lens holding section, 16: correction lens, 17: wiring, 23: light emitting element, 23a: light emitting element, 23b: light emitting element, 23c: light emitting element, 23d: light emitting element, 23e: light emitting element, 23f: light emitting element, 24: transistor, 24a: transistor, 24b: transistor, 31: first anode wiring, 31a: first horizontal wiring, 31b: first vertical wiring, 32: second anode wiring, 32a: second horizontal wiring, 32b: second vertical wiring, 33: third anode wiring, 33a: third horizontal wiring, 33b: third vertical wiring, 34: first capacitor, 35: second capacitor, 36: third capacitor, 37: first selection circuit, 37a: transistor, 37b: transistor, 38: second selection circuit, 38a: transistor, 38b: transistor, 39: third selection circuit, 39a: transistor, 39b: transistor, 41: cathode wiring, 42: gate wiring, 50: delay circuit, 53: inverter circuit, 55: inverter chain circuit, 57: inverter circuit, 58: RC circuit, 59: delay locked loop circuit, 60: logical product, 64: timing adjustment circuit, 65: LDD capability switching circuit, 67: selective drive circuit, 68: logical product, 70: light emitting pulse control mechanism, 70a: light emitting pulse control mechanism, 70b: light emitting pulse control mechanism, 75: transistor, 76: transistor, 77: transistor, 78: resistor, 79: resistor, 80: operational amplifier, 90: charge pump circuit, 101: Light emitting unit, driving unit 102, 103: Power supply circuit, 104: Light emitting side optical system, 105: Light receiving side optical system, 106: Light receiving unit, 107: Signal processing unit, 108: Control unit, 109: Temperature detection unit, 111: Vehicle control system, 121: Vehicle control ECU, 122: Communication unit, 123: Map information storage unit, 124: Position information acquisition unit, 125: External recognition sensor, 126: In-vehicle sensor, 127: Vehicle sensor, 128: Memory unit, 129: Driving automation control unit, 130: Driver monitoring system (DMS), 131: Human-machine interface (HMI), 132: Vehicle control unit, 141: Communication network, 151: Camera,152: Radar, 153: LiDAR, 154: Ultrasonic sensor, 161: Analysis unit, 162: Action planning unit, 163: Operation control unit, 164: Gate wiring, 165: Gate wiring, 166: Gate wiring, 167: Capacitor, 171: Self-position estimation unit, 172: Sensor fusion unit, 173: Recognition unit, 181: Steering control unit, 182: Brake control unit, 183: Drive control unit, 184: Body system control unit, 185: Light control unit, 186: Horn control unit

Claims

1. A light-emitting element array comprising: a plurality of light-emitting elements arranged in a two-dimensional array, each having a first and second terminal; M first wirings (M is an integer of 2 or more) extending in a first direction; and N second wirings (N is an integer of 2 or more) extending in a second direction intersecting the first direction and electrically connected to each of the M first wirings, the plurality of first terminal wirings being electrically connected to the first terminals of the light-emitting elements; a plurality of second terminal wirings electrically connected to the second terminals of the light-emitting elements, each of the plurality of second terminal wirings being electrically connected to P (P is an integer of 2 or more) of the light-emitting elements; a plurality of selection circuits electrically connected to one of the plurality of first terminal wirings and the plurality of second terminal wirings, and selecting the light-emitting elements to be light-emitting; a plurality of drive circuits electrically connected to the other of the plurality of first terminal wirings and the plurality of second terminal wirings, and driving the plurality of light-emitting elements; and a plurality of light-emitting pulse control mechanisms electrically connected to gates of the plurality of drive circuits, and controlling output of a light-emitting pulse of the plurality of light-emitting elements, or a charge pump circuit electrically connected to a capacitor that accumulates electric charge to be supplied to the light-emitting element, and boosting an applied voltage, The light emitting device, wherein N is an integer that is the same as or different from M, and P is an integer that is the same as or different from at least one of M and N.

2. The light emitting device according to claim 1, wherein the light emitting pulse control mechanism is a delay circuit that receives an input of a trigger signal TRIG_O that drives the drive circuit, and generates a delay signal Delay that is a delayed signal of the trigger signal TRIG_O.

3. The light emitting device according to claim 2, wherein the delay circuit is an inverter chain circuit, a delay lock loop circuit or an RC circuit.

4. The light emitting device according to claim 1, wherein the light emission pulse control mechanism is a light emission timing adjustment circuit that generates a timing adjustment signal TA by adjusting the output timing of a trigger signal TRIG_O that drives the drive circuit.

5. The light emitting device according to claim 4, wherein the light emission timing adjustment circuit is an inverter chain circuit.

6. The light emitting pulse control mechanism controls the LDD output current I, which is the output current of the light emitting element, based on the LDD capability switching signal. DLF Peak value I peak The light emitting device according to claim 1 , wherein the LDD capability switching circuit corrects:

7. The light-emitting device according to claim 6, wherein the LDD capability switching circuit includes one or more selective drive circuits connected in parallel to the drive circuit on the cathode side of the light-emitting element, and the one or more selective drive circuits are driven by the LDD capability switching signal.

8. The light emitting device according to claim 6, wherein the LDD capability switching circuit includes a pre-driver that varies the output voltage based on the LDD capability switching signal.

9. The light-emitting device according to claim 6, wherein the LDD capacity switching circuit includes a current mirror circuit that amplifies a current output from a control current source IDAC, the current value of which is controlled by the LDD capacity switching signal, and supplies the amplified current to the cathode side of the light-emitting element.

10. A light-emitting element including a plurality of light-emitting elements arranged in a two-dimensional array, each having a first and second terminal; M first wirings (M is an integer of 2 or more) extending in a first direction, and N second wirings (N is an integer of 2 or more) extending in a second direction intersecting the first direction and electrically connected to the M first wirings, respectively, a plurality of first terminal wirings electrically connected to the first terminals of the light-emitting elements; a plurality of second terminal wirings electrically connected to the second terminals of the light-emitting elements, each electrically connected to P (P is an integer of 2 or more) of the light-emitting elements; a plurality of selection circuits electrically connected to one of the plurality of first terminal wirings and the plurality of second terminal wirings, and selecting the light-emitting elements to be light-emitting; a plurality of drive circuits electrically connected to one of the plurality of first terminal wirings and the plurality of second terminal wirings, and driving the plurality of light-emitting elements; and a feedback circuit including an operational amplifier, the output side of the operational amplifier being connected to a gate of the drive circuit, the non-inverting input terminal side of the operational amplifier being connected to a source of the drive circuit, and controlling a current flowing through the light-emitting elements, The light emitting device, wherein N is an integer that is the same as or different from M, and P is an integer that is the same as or different from at least one of M and N.

11. The light emitting device according to claim 10, wherein the feedback circuit further includes a first resistor connected to the inverting input terminal side and a second resistor connected to the non-inverting input terminal side, and a value of a current flowing through the second resistor is controlled by a control current source IDAC in accordance with a value of a current flowing through the first resistor.

12. A light-emitting device comprising: a plurality of light-emitting elements arranged in a two-dimensional array, each having a first and second terminal; M first wirings (M is an integer of 2 or more) extending in a first direction; and N second wirings (N is an integer of 2 or more) extending in a second direction intersecting the first direction and electrically connected to each of the M first wirings, the plurality of first terminal wirings being electrically connected to the first terminals of the light-emitting elements; a plurality of second terminal wirings electrically connected to the second terminals of the light-emitting elements, each electrically connected to P (P is an integer of 2 or more) of the light-emitting elements; a plurality of selection circuits electrically connected to one of the plurality of first terminal wirings and the plurality of second terminal wirings, and selecting the light-emitting elements to be light-emitting; and a plurality of drive circuits electrically connected to the other of the plurality of first terminal wirings and the plurality of second terminal wirings, and driving the plurality of light-emitting elements, wherein the wiring lengths of the respective gate wirings connected to the plurality of drive circuits are equal, the N is an integer that is the same as or different from the M, and the P is an integer that is the same as or different from at least one of the M or the N.

13. A light emitting device that is a part of a distance measuring device, wherein the LDD capability switching circuit provided in the light emitting device switches the LDD output current I based on the light receiving level value of the reflected light of the light irradiated to the object to be measured. DLF The peak value I peak The light emitting device according to claim 6 , wherein:

14. The light emitting device according to claim 13, wherein the LDD capacity switching circuit lowers the LDD capacity setting by one step when the value of the light receiving level exceeds a set reference amount, and raises the LDD capacity setting by one step when the value of the light receiving level does not exceed a set reference amount.

15. A light emitting device as described in claim 4, which is part of a distance measuring device, and the light emission timing adjustment circuit provided in the light emitting device corrects the light emission timing of the light emitting element based on the bin positions of a histogram generated from the reflected light of light irradiated onto the object to be measured.

16. The light emitting device according to claim 15, wherein the light emission timing adjustment circuit delays the light emission timing setting by one step when the Bin position is earlier than a set reference, and advances the light emission timing setting by one step when the Bin position is not earlier than a set reference.

17. A light emitting device that is a part of a distance measuring device, wherein the delay circuit provided in the light emitting device adjusts an LDD output current I based on a bin width of a histogram generated from reflected light of light irradiated onto a measurement object. DLF The light emitting device according to claim 2 , wherein the pulse width W of the first light emitting diode is corrected.

18. The light emitting device according to claim 17, wherein the delay circuit extends the light emission pulse width setting by one step when the Bin width is shorter than a set reference, and shortens the light emission pulse width setting by one step when the Bin width is not shorter than the set reference.

19. The light emitting device according to claim 4, which is a part of a distance measuring device, and the light emission timing adjustment circuit provided in the light emitting device corrects the light emission timing of the light emitting element based on the number of bins in a histogram generated from the reflected light of light irradiated onto the object to be measured.

20. The light emitting device according to claim 19, wherein the light emission timing adjustment circuit delays the light emission timing setting by one step when the Bin number satisfies a set criterion, and advances the light emission timing setting by one step when the Bin number does not satisfy the set criterion.

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