Silicon nitride sintered body, silicon nitride substrate, silicon nitride circuit board, and semiconductor device

Abstract

To provide a silicon nitride substrate having improved long-term reliability. According to an embodiment, when a DC electric field of 5 kV / mm is applied to a silicon nitride sintered body at 25°C, the ratio Q25(600) / Q25(5) of the accumulated charge amount 600 seconds from the start of application to the accumulated charge amount 5 seconds from the start of application is 1.0-3.0. The silicon nitride sintered body has thermal conductivity of 65 W / m·K or more.

Description

Silicon nitride sintered body, silicon nitride substrate, silicon nitride circuit board, and semiconductor device

[0001] The embodiments described below generally relate to a silicon nitride sintered body, a silicon nitride substrate, a silicon nitride circuit board, and a semiconductor device.

[0002] Silicon nitride substrates made of sintered silicon nitride have high thermal conductivity and high strength. For example, Japanese Patent No. 6293772 (Patent Document 1) discloses a silicon nitride substrate having a thermal conductivity of 50 W / m·K or more and a three-point bending strength of 600 MPa or more. In Patent Document 1, the distribution of the grain boundary phase in the thickness direction of the substrate is controlled. This improves the thermal conductivity, strength, and insulation. Japanese Patent No. 7170629 (Patent Document 2) also discloses a silicon nitride substrate having a thermal conductivity of 50 W / m·K or more and a three-point bending strength of 600 MPa or more. In Patent Document 2, the grain boundary phase contains multiple glass compound phases having different compositions. This improves the thermal conductivity, strength, and insulation.

[0003] In Patent Documents 1 and 2, dielectric strength is used to evaluate insulation. In a dielectric strength test, electrodes are bonded to both sides of a silicon nitride substrate, and the voltage at which dielectric breakdown occurs is measured. The dielectric strength test is a type of breakdown test, in which a voltage is applied until dielectric breakdown occurs.

[0004] Patent No. 6293772 Patent No. 7170629

[0005] The silicon nitride substrates disclosed in Patent Documents 1 and 2 have a dielectric strength of 15 kV / mm or more. However, even silicon nitride substrates with a dielectric strength of 15 kV / mm or more have sometimes been found to lack long-term reliability.

[0006] In dielectric strength tests, characteristics are often evaluated using an AC electric field. However, for power modules equipped with semiconductor elements, a DC electric field may be applied instead of an AC electric field. Alternatively, a DC electric field may be converted to an AC electric field, and the AC and DC electric fields may be applied alternately to the power module. The dielectric strength of silicon nitride substrates is approximately 15 kV / mm. This dielectric strength is significantly greater than the dielectric strength required for the driving voltage of power modules equipped with semiconductor elements. However, even when silicon nitride substrates with sufficient dielectric strength are used, there have been cases where long-term reliability was insufficient. This shows that dielectric strength is not necessarily an appropriate indicator of long-term reliability under practical conditions.

[0007] The embodiments address these problems and provide a silicon nitride substrate with improved long-term reliability under practical conditions for semiconductor devices.

[0008] According to an embodiment, when a direct current electric field of 5 kV / mm is applied to a silicon nitride sintered body at 25° C., the ratio Q25(600) / Q25(5) of the amount of accumulated charge 600 seconds after the start of application to the amount of accumulated charge 5 seconds after the start of application is 1.0 or more and 3.0 or less. The thermal conductivity of the silicon nitride sintered body is 65 W / m·K or more.

[0009] 1 is a perspective view showing an example of a silicon nitride substrate according to an embodiment. 2 is a diagram showing an example of a measurement result of the amount of accumulated charge of a silicon nitride substrate according to Example 1. 3 is a diagram showing an example of a measurement result of the amount of accumulated charge of a silicon nitride substrate according to Comparative Example 1. 4 is a side view showing an example of a silicon nitride circuit substrate according to an embodiment. 5 is a diagram showing an example of a semiconductor device according to an embodiment.

[0010] According to an embodiment, when a direct current electric field of 5 kV / mm is applied to a silicon nitride sintered body at 25° C., the ratio Q25(600) / Q25(5) of the amount of accumulated charge 600 seconds after the start of application to the amount of accumulated charge 5 seconds after the start of application is 1.0 or more and 3.0 or less. The thermal conductivity of the silicon nitride sintered body is 65 W / m·K or more.

[0011] FIG. 1 is a perspective view showing an example of a silicon nitride substrate according to an embodiment. In FIG. 1, reference numeral 1 denotes a silicon nitride substrate, and reference numeral 2 denotes a surface portion. FIG. 1 shows a silicon nitride sintered body in the shape of a substrate. The silicon nitride sintered body in the shape of a substrate is, in other words, a silicon nitride substrate. In the example shown in FIG. 1, the shape of the surface portion 2 when viewed from above is rectangular. However, the shape of the surface portion 2 is not limited to this example, and may be a square, a polygon other than a square, a circle, an L-shape, a U-shape, or the like.

[0012] The silicon nitride sintered body according to the embodiment is characterized in that the ratio of accumulated charge amounts Q25(600) / Q25(5) is 1.0 or more and 3.0 or less. "Q25(5)" is the amount of accumulated charge 5 seconds after the start of application of a DC electric field of 5 kV / mm to the silicon nitride sintered body at 25°C. "Q25(600)" is the amount of accumulated charge 600 seconds after the start of application of a DC electric field of 5 kV / mm to the silicon nitride sintered body at 25°C.

[0013] "Stored charge amount" refers to the amount of charge accumulated in a silicon nitride sintered body when a constant voltage is applied. The voltage is set so that the DC electric field is 5 kV / mm, and varies depending on the thickness of the substrate. A Q25(600) / Q25(5) ratio of 1.0 to 3.0 indicates that the amount of accumulated charge after 600 seconds is within the range of 1.0 to 3.0 times the amount of accumulated charge after 5 seconds. This indicates that the amount of accumulated charge over time is small. The closer Q25(600) / Q25(5) is to 1.0, the smaller the amount of accumulated charge over time.

[0014] A large stored charge ratio indicates that charge accumulates in a short period of time and that the accumulated charge is difficult to release in a short period of time. If charge remains in a silicon nitride sintered body, it can cause dielectric breakdown. In recent years, the operating frequency of semiconductor elements has been increasing. When a semiconductor element is repeatedly turned on and off at a predetermined frequency, the accumulated charge does not fully release and new charges continue to accumulate. As a result, the accumulated charge can cause dielectric breakdown. Therefore, a small stored charge ratio indicates that the accumulated charge is released in a short period of time, indicating high long-term reliability. Here, "long-term reliability" means that the possibility of dielectric breakdown occurring in a silicon nitride sintered body is sufficiently low, even when the semiconductor device is used for a long period of time, such as one year or more.

[0015] The DC electric field of 5 kV / mm is set assuming the drive voltage of a typical semiconductor device. The lower limit of Q25(600) / Q25(5) is 1.0. Because the amount of accumulated charge is the amount of charge that accumulates over time, Q25(600) / Q25(5) will not be less than 1.0.

[0016] For example, the drive voltage of a power card for an electric vehicle (including a hybrid vehicle) is designed to be approximately 1 kV. The power card is a power module that controls the power of the electric vehicle's motor, and is a card-type module equipped with multiple semiconductor elements.

[0017] When the silicon nitride substrate is 0.32 mm thick, the applied voltage to create a DC electric field of 5 kV / mm is 1.6 kV (= 5 kV / mm × 0.32 mm).When the silicon nitride substrate is 0.25 mm thick, the applied voltage to create a DC electric field of 5 kV / mm is 1.25 kV (= 5 kV / mm × 0.25 mm).

[0018] The measurement times are set to 5 seconds and 600 seconds. Immediately after the application of the DC electric field begins, charge accumulates in the silicon nitride sintered body. As a result, the amount of accumulated charge increases rapidly. When the DC electric field is set to 5 kV / mm, the amount of accumulated charge saturates in approximately 1 to 2 seconds. Therefore, after 5 seconds from the start of application of the electric field, the increase in the amount of accumulated charge becomes sufficiently gradual compared to immediately after the start of application. The measurement time of 600 seconds is set to be sufficiently longer than 5 seconds. The rate of increase in the amount of accumulated charge between 5 and 600 seconds is substantially the same as the rate of increase in the amount of accumulated charge after 600 seconds. In other words, the amount of accumulated charge saturates immediately after the start of application of the electric field, and then increases substantially linearly. Setting the measurement time to 600 seconds allows sufficient data to be obtained for estimating long-term reliability.

[0019] A DC electric field of 5 kV / mm is a suitable condition for practical judgment. Q25(600) / Q25(5) at 25°C under a DC electric field of 5 kV / mm measures the rate of increase in the amount of charge accumulated in a silicon nitride substrate at the driving voltage of a typical semiconductor device. Q25(5) is the amount of accumulated charge in the initial stage. Q25(5) is preferably 500 nC (nanocoulomb) or less. 500 nC is 0.5 μC (microcoulomb). The lower limit of Q25(5) is not particularly limited, but is preferably 300 nC or more.

[0020] The value of the amount of accumulated charge is affected by the size of the measurement electrode, which will be described later. In other words, the amount of accumulated charge is proportional to the contact area between the silicon nitride substrate and the measurement electrode. The specific amount of charge described above is the value when a measurement electrode with a diameter of 40 mm is used. When the measurement electrode is 30 mm in diameter, Q25(5) is preferably 300 nC or less.

[0021] The amount of accumulated charge is measured using the following method. The measurement device used is an A&D Q(t) meter (model number AD-9832A) or a device with equivalent performance. A 40 mm diameter measurement electrode is used for the measurement. A 30 mm diameter measurement electrode may also be used to prevent creepage leakage from the silicon nitride substrate. Creepage leakage can be sufficiently suppressed if the creepage distance of the silicon nitride substrate is 1 mm or more. If a 40 mm diameter measurement electrode is used, but the creepage distance is less than 1 mm, a 30 mm diameter measurement electrode may also be used. The amount of accumulated charge is also affected by the size of the measurement electrode. For this reason, if a 40 mm diameter measurement electrode is available, it should be used to measure the amount of accumulated charge.

[0022] First, measurement electrodes are brought into contact with the front and back surfaces of the silicon nitride substrate. A voltage corresponding to the thickness of the silicon nitride substrate is applied so that the applied electric field is 5 kV / mm. When the measurement temperature is room temperature, the temperature in the measurement chamber is set to 25°C, and the silicon nitride substrate is held in the chamber for 5 minutes or more. After the temperature of the silicon nitride substrate has become substantially equal to room temperature, the amount of accumulated charge is measured. When the measurement temperature is 100°C, the mounting table (e.g., a hot plate) of the measurement device is set to 100°C, and the silicon nitride substrate is held on the mounting table for 5 minutes or more. After the temperature of the silicon nitride substrate has become substantially 100°C, the amount of accumulated charge is measured. When the measurement temperature is 200°C, the mounting table (e.g., a hot plate) of the measurement device is set to 200°C, and the silicon nitride substrate is held on the mounting table for 5 minutes or more. After the temperature of the silicon nitride substrate has become substantially 200°C, the amount of accumulated charge is measured. In the measurement, an electric field of 5 kV / mm is applied. In order to prevent changes in the properties of the silicon nitride substrate, the upper limit of the holding time is preferably 10 minutes or less.

[0023] After the application of the electric field begins, the amount of accumulated charge is measured every 0.5 seconds to obtain a graph showing the change in the amount of accumulated charge over time. From the obtained graph, the amount of accumulated charge Q(5) 5 seconds after the start of voltage application and the amount of accumulated charge Q(600) 600 seconds after the start of voltage application are read. The amount of accumulated charge Q(600) is divided by the amount of accumulated charge Q(5) to obtain the ratio of the amount of accumulated charge Q(600) / Q(5).

[0024] FIG. 2 shows an example of the measurement results of the amount of accumulated charge of silicon nitride according to Example 1. FIG. 3 shows an example of the measurement results of the amount of accumulated charge of silicon nitride according to Comparative Example 1. FIGS. 2 and 3 show the results of measuring the amount of accumulated charge at 25° C. In FIGS. 2 and 3, the horizontal axis represents time (sec) and the vertical axis represents the amount of accumulated charge (Q25). From the measurement results shown in FIGS. 2 and 3, the amount of accumulated charge Q25 (5) after 5 seconds and the amount of accumulated charge Q25 (600) after 600 seconds are read.

[0025] The silicon nitride sintered body preferably has a fluorine content of 0 wtppm or more and 1000 wtppm or less, an iron content of 0 wtppm or more and 500 wtppm or less, and a sodium content of 0 wtppm or more and 500 wtppm or less.

[0026] Fluorine, iron, and sodium are likely to be mixed into silicon nitride sintered bodies as impurities. These elements are mixed into silicon nitride powder or sintering aid powder, or are mixed in during the manufacturing process. In silicon nitride sintered bodies, fluorine may exist as a fluorine compound. Iron may exist as an iron compound (including iron alloys). Sodium may exist as a sodium compound (including sodium compounds). Fluorine, iron, and sodium easily become charge carriers in sintered bodies under a DC electric field. If these elements are mixed into silicon nitride sintered bodies in large amounts, the Q25(600) / Q25(5) ratio may exceed 3.0.

[0027] Therefore, the fluorine content is preferably in the range of 0 wtppm to 1000 wtppm, more preferably in the range of 0 wtppm to 500 wtppm, the iron content is preferably in the range of 0 wtppm to 500 wtppm, more preferably in the range of 0 wtppm to 300 wtppm, and the sodium content is preferably in the range of 0 wtppm to 200 wtppm.

[0028] Since fluorine, iron, and sodium are impurities, their contents are preferably 0 wtppm (below the detection limit). On the other hand, setting the contents to 0 wtppm may result in increased manufacturing costs. Therefore, the fluorine content may be 10 wtppm or more. The iron content may be 10 wtppm or more. The sodium content may be 10 wtppm or more. In other words, according to the embodiment of the present invention, even if these impurities are contained, the properties of the silicon nitride sintered body can be improved.

[0029] Pyrohydrolysis separation is used to measure the fluorine content in silicon nitride sintered bodies. Fluorine in the silicon nitride sintered bodies is recovered in a solution by pyrohydrolysis separation. The recovered fluorine concentration is analyzed by ion chromatography. For ion chromatography, a Thermo Fisher Scientific ICS-2100 or a device with equivalent performance is used.

[0030] The iron content and sodium content are measured using inductively coupled plasma (ICP) optical emission spectrometry. The silicon nitride sintered body is dissolved by pressurized acid decomposition. The amounts of iron and sodium contained in the solution are measured using ICP optical emission spectrometry. For ICP optical emission spectrometry, a Hitachi High-Tech Science SPS-3520UVDD or an instrument with equivalent performance is used. Ion chromatography and ICP optical emission spectrometry detect elemental fluorine, elemental iron, and elemental sodium, and measure the respective contents of fluorine, iron, and sodium. Values ​​below the detection limit are considered to be 0 wtppm.

[0031] In the surface portion 2 of the silicon nitride sintered body 1, the maximum height Sz is preferably 60 μm or less. The maximum height Sz is the distance in the thickness direction between the highest point on the surface (highest convex portion) and the lowest point on the surface (lowest concave portion). The maximum height Sz is defined in ISO 25178. By controlling the maximum height Sz, electric field concentration in the surface portion 2 can be suppressed. Localized unevenness may cause electric field concentration.

[0032] A silicon nitride circuit substrate is obtained by bonding a metal plate to the surface portion 2 of the silicon nitride substrate 1. As will be described later, the metal plate may be bonded to the surface portion 2 via a bonding layer. If local electric field concentration occurs in the surface portion 2, charge may enter the silicon nitride substrate 1 from the metal plate or bonding layer. If the maximum height Sz exceeds 60 μm, this may cause electric field concentration. By controlling the maximum height Sz to 60 μm or less, local electric field concentration can be suppressed, and charge intrusion from the metal plate or bonding layer can be suppressed.

[0033] The smaller the maximum height Sz, the more preferable. Although the lower limit of the maximum height Sz is not particularly limited, it is preferably 20 μm or more. In order to make the maximum height Sz less than 20 μm, the load of the polishing process increases, which may cause an increase in costs. Therefore, the maximum height Sz is preferably in the range of 20 μm or more and 60 μm or less, and more preferably in the range of 25 μm or more and 55 μm or less.

[0034] The maximum peak height Sp in the surface portion 2 is preferably 10 μm or more and 30 μm or less. The maximum valley depth Sv in the surface portion 2 is preferably 10 μm or more and 30 μm or less. It is also preferable to satisfy the following relationship: 0.5≦maximum peak height Sp / maximum valley depth Sv≦2. The higher the convex portion from the surface, the larger the maximum peak height Sp. The deeper the concave portion from the surface, the larger the maximum valley depth Sv. The maximum height Sz is expressed as the sum of the maximum peak height Sp and the maximum valley depth Sv. A large difference between the maximum peak height Sp and the maximum valley depth Sv may cause local electric field concentration.

[0035] The maximum height Sz, maximum peak height Sp, and maximum valley depth Sv are measured using a method in accordance with ISO 25178. A Keyence VR-5000 series one-shot 3D shape measuring instrument, or an instrument with equivalent performance, is used as the measuring device. The measurement range is set to 9 mm length x 12 mm width. Multiple measurement ranges are set depending on the size of the silicon nitride sintered body. The multiple measurement ranges are set so that they do not overlap with each other. Preferably, 10 measurement ranges that do not overlap with each other are set. In each measurement range, the maximum height Sz, maximum peak height Sp, and maximum valley depth Sv are measured, and the average values ​​of the maximum height Sz, maximum peak height Sp, and maximum valley depth Sv for the multiple measurement ranges are calculated. The average value of the maximum height Sz in the 10 measurement ranges is defined as the maximum height Sz of the surface of the silicon nitride sintered body. The average value of the maximum peak height Sp in the 10 measurement ranges is defined as the maximum peak height Sp of the surface of the silicon nitride sintered body. The average value of the maximum valley depth Sv in 10 measurement ranges is taken as the maximum valley depth Sv on the surface of the silicon nitride sintered body. If the surface area is small and it is not possible to set 10 non-overlapping measurement ranges, set as many measurement ranges as possible. In this case, the maximum height Sz, maximum peak height Sp, and maximum valley depth Sv are measured in each of the set measurement ranges. The average values ​​of the maximum height Sz, maximum peak height Sp, and maximum valley depth Sv in multiple measurement ranges are used as the maximum height Sz, maximum peak height Sp, and maximum valley depth Sv on the surface of the silicon nitride sintered body. If only one measurement range can be set on the surface, the maximum height Sz, maximum peak height Sp, and maximum valley depth Sv are measured in that one measurement range, and these measurement results are used as the maximum height Sz, maximum peak height Sp, and maximum valley depth Sv on the surface of the silicon nitride sintered body. When the surface shape of the silicon nitride sintered body is measured, it is preferable that one or more selected from the maximum height Sz, maximum peak height Sp, and maximum valley depth Sv satisfy the above-mentioned conditions.

[0036] By controlling the impurity content and surface roughness of the silicon nitride sintered body, the accumulated charge ratio Q25(600) / Q25(5) at room temperature (25°C) can be controlled. Furthermore, the temperature dependence of the accumulated charge ratio can be reduced. When a DC electric field of 5 kV / mm is applied at 100°C, the accumulated charge 5 seconds after the start of application of the electric field is defined as Q100(5). When a DC electric field of 5 kV / mm is applied at 100°C, the accumulated charge 600 seconds after the start of application of the electric field is defined as Q100(600). The accumulated charge ratio Q100(600) / Q100(5) is preferably in the range of 1.0 to 5.0. A ratio of Q100(600) / Q100(5) in the range of 1.0 to 5.0 indicates that the rate of increase in the accumulated charge over time is small, even when a DC electric field is applied in a high-temperature environment. Furthermore, the fact that the accumulated charge ratio Q25(600) / Q25(5) is 3.0 or less and the accumulated charge ratio Q100(600) / Q100(5) is 5.0 or less indicates that there is little change in the characteristics of the accumulated charge ratio even when the temperature rises.

[0037] When a DC electric field of 5 kV / mm is applied at 200°C, the amount of accumulated charge 5 seconds after the start of application of the electric field is defined as Q200(5). When a DC electric field of 5 kV / mm is applied at 200°C, the amount of accumulated charge 600 seconds after the start of application of the electric field is defined as Q200(600). The ratio of accumulated charge amounts Q200(600) / Q200(5) is preferably in the range of 1.0 to 10.0.

[0038] The temperatures of 100°C and 200°C are assumed to be the temperatures that generate heat during operation of semiconductor elements. In recent years, the operating and guaranteed temperatures have risen as semiconductor elements have become more powerful. As the temperature rises, the carrier mobility increases, and therefore the amount of stored charge increases. By controlling the ratio of the amount of stored charge at 100°C and 200°C, it is possible to suppress the deterioration of the insulating properties of the silicon nitride sintered body even when the semiconductor element operates at high temperatures.

[0039] The ratio of the accumulated charge amount Q100(600) / Q100(5) is preferably in the range of 1.0 or more and 5.0 or less, and more preferably in the range of 1.0 or more and 3.0 or less. The accumulated charge amount Q100(5) is preferably 500 nC (nanocoulomb) or less. The ratio of the accumulated charge amount Q200(600) / Q200(5) is preferably in the range of 1.0 or more and 10.0 or less, and more preferably in the range of 1.0 or more and 6.0 or less. The accumulated charge amount Q200(5) is preferably 500 nC (nanocoulomb) or less.

[0040] The silicon nitride sintered body preferably has a grain boundary phase. As described below, the main component of the grain boundary phase is a sintering aid. The grain boundary phase preferably contains one or more elements selected from the group consisting of rare earth elements, magnesium, titanium, zirconium, hafnium, molybdenum, and tungsten. The content of the grain boundary phase in the silicon nitride sintered body is preferably 1% by mass or more and 20% by mass or less. The proportion of the grain boundary phase may be calculated by subtracting the mass of silicon nitride from the mass of the silicon nitride sintered body.

[0041] The grain boundary phase preferably contains a crystalline compound. The crystalline compound preferably contains one or more elements selected from the group consisting of rare earth elements, magnesium, titanium, zirconium, hafnium, molybdenum, and tungsten. The presence of a crystalline compound in the grain boundary phase makes it easier to control the stored charge ratio Q100(600) / Q100(5) and the stored charge ratio Q200(600) / Q200(5) within preferred ranges. The presence of a crystalline compound in the grain boundary phase can be confirmed by XRD analysis. Whether a silicon nitride sintered body contains a crystalline compound can be determined by the presence or absence of an XRD peak corresponding to the crystalline compound.

[0042] The thermal conductivity of the silicon nitride sintered body is, for example, 65 W / m·K or more. If the thermal conductivity is less than 65 W / m·K, the heat dissipation ability of the silicon nitride sintered body decreases. If the heat dissipation ability is low, the temperature of the silicon nitride substrate is likely to rise, and the substrate may be exposed to high temperatures. Since an increase in temperature leads to an increase in the amount of stored charge, it is desirable for the heat dissipation ability of the silicon nitride sintered body to be high. Thermal conductivity can be improved by controlling the components and proportions of the grain boundary phase. The thermal conductivity is preferably 65 W / m·K or more, and more preferably 100 W / m·K or more. Thermal conductivity is measured using the flash method in accordance with JIS-R-1611 (2010). JIS-R-1611 corresponds to ISO 18755.

[0043] The three-point bending strength of the silicon nitride sintered body is preferably 600 MPa or more. The higher the strength, the thinner the substrate can be. The three-point bending strength is measured in accordance with JIS-R-1601 (2008). JIS-R-1601 corresponds to ISO 14704.

[0044] The fracture toughness value of the silicon nitride sintered body is 5.5 MPa m １／２ It is preferable that the viscosity is 6.5 MPa m or more. １／２ It is more preferable that the fracture toughness is equal to or greater than this. Measurements are carried out in accordance with the IF method of JIS-R-1607 (2015) and the Niihara formula is used to determine the fracture toughness. JIS-R-1607 corresponds to ISO15732.

[0045] The silicon nitride sintered body according to the embodiment can be used for a silicon nitride substrate. The thickness of the silicon nitride substrate is preferably in the range of 0.1 mm to 3 mm, and more preferably in the range of 0.2 mm to 1 mm. By improving the strength or toughness of the silicon nitride substrate in addition to the thermal conductivity, the substrate can be made thinner. This makes it possible to make the thickness of the silicon nitride substrate 0.2 mm to 0.4 mm.

[0046] In the embodiment, since the storage capacity ratio is controlled as described above, the insulating properties of the silicon nitride substrate are good. According to the embodiment, the dielectric strength of the silicon nitride substrate can be made 15 kV / mm or more. The dielectric strength is measured by the two-terminal method in accordance with JIS-C-2141 (1992). JIS-C-2141 corresponds to IEC672-2.

[0047] According to an embodiment, the arc discharge voltage of the silicon nitride substrate can be increased to 5 kV or more. The arc discharge voltage is measured by the following method. First, electrodes are placed on the front and back surfaces of the silicon nitride substrate 1. The silicon nitride substrate 1 is sandwiched between the pair of electrodes. In this state, an AC voltage of 50 Hz or 60 Hz is applied between the electrodes. The voltage increase rate is set to 200 V / s. The voltage when an arc discharge is detected between the electrodes is measured as the arc discharge voltage (kV). Once the arc discharge voltage is measured, the voltage is not increased any further and the application of the voltage is stopped.

[0048] For example, a spherical electrode specified in JIS-C-2110-1 (2013) is used. The diameter of the electrode tip is 10 mm. JIS-C-2110-1 corresponds to IEC 60243-1. The measurement environment is controlled to a temperature of 10 to 25°C and a humidity of 30 to 60%. The arc discharge voltage is measured in the atmosphere. Alternatively, the arc discharge voltage may be measured in an insulating oil that is stable against an electric field, such as silicone oil.

[0049] The arc discharge voltage is measured at three arbitrary locations on one silicon nitride substrate 1, and the average value is recorded as the arc discharge voltage A (kV). The three arbitrary locations are selected so that they do not overlap with each other. The maximum voltage is set to 20 kV or less. The silicon nitride substrate 1 is housed in a container to prevent the measurement from being affected by air currents. It is preferable to use an AC voltage withstand tester -7473 manufactured by Keisoku Gijutsu Kenkyusho as the measuring device. Alternatively, a device with an arc discharge detection function equivalent to or greater than that may be used. The unit of arc discharge voltage may be "kV / mm", which is the voltage divided by the thickness of the silicon nitride substrate.

[0050] The silicon nitride substrate 1 can be used for a silicon nitride circuit substrate. FIG. 4 is a side view showing an example of a silicon nitride circuit substrate according to an embodiment. In FIG. 4 , reference numeral 1 denotes a silicon nitride substrate, reference numeral 3 denotes a front metal plate, reference numeral 4 denotes a rear metal plate, reference numeral 5 denotes a bonding layer, and reference numeral 10 denotes a silicon nitride circuit substrate. In the example shown in FIG. 4 , metal plates are bonded via a bonding layer 5. Here, the metal plate bonded to the front surface of the silicon nitride substrate 1 is referred to as the front metal plate 3, and the metal plate bonded to the rear surface of the silicon nitride substrate is referred to as the rear metal plate 4. While FIG. 4 shows an example in which two front metal plates 3 are bonded, the number of front metal plates 3 may be one or three or more. Here, the front metal plate 3 and the rear metal plate 4 are collectively referred to as metal plates.

[0051] The metal plate is, for example, one or more selected from the group consisting of copper plate, copper alloy plate, aluminum plate, and aluminum alloy plate. The metal plate is preferably copper plate, and more preferably oxygen-free copper plate. Oxygen-free copper has a copper purity of 99.96 wt% or more as specified in JIS-H-3100 (2018). JIS-H-3100 corresponds to ISO 197 and other standards. The thermal conductivity of copper is approximately 400 W / m·K, while the thermal conductivity of aluminum is approximately 240 W / m·K. The thermal conductivity of copper is higher than that of aluminum. Therefore, using copper plate improves the heat dissipation properties of the metal plate. The aluminum plate is preferably made of pure aluminum. Pure aluminum is specified in JIS-H-4000 (2022). JIS-H-4000 corresponds to ISO 6361.

[0052] The thickness of the metal plate is preferably 0.3 mm or more. By increasing the thickness of the metal plate, heat dissipation can be improved. The current-carrying capacity can also be increased. For this reason, the thickness of the metal plate is preferably 0.3 mm or more, and more preferably 0.6 mm or more. There is no particular upper limit to the thickness of the metal plate, but it is preferably 5 mm or less. If the thickness exceeds 5 mm, it may become difficult to control the inclined shape of the side surface of the metal plate. In particular, from the viewpoint of heat dissipation, it is preferable to use a copper plate with a thickness of 0.3 mm or more. It is preferable that the thickness of both the front copper plate and the back copper plate be 0.3 mm or more.

[0053] The silicon nitride substrate 1 and the metal plate 3 are preferably bonded via a bonding layer. The bonding layer is preferably formed using an active metal bonding method. The active metal bonding method is a bonding method using one or more active metals selected from the group consisting of Ti (titanium), Zr (zirconium), and Hf (hafnium). The active metal bonding method uses an active metal brazing material containing an active metal. The main component of the active metal brazing material is copper (Cu) or silver (Ag). The main component refers to the component that is contained in the largest amount among the metal components of the brazing material.

[0054] The active metal brazing material contains 0% by mass or more and 70% by mass or less of Ag (silver), 15% by mass or more and 85% by mass or less of Cu (copper), and Ti (titanium) or TiH ２ It is preferable that the titanium hydride is contained in an amount of 1 mass % or more and 15 mass % or less. ２ When both Ag and Cu are used, the total content of Ag is preferably within the range of 20% by mass to 60% by mass, and Cu is preferably within the range of 15% by mass to 40% by mass.

[0055] The active metal brazing material may contain one or both of Sn (tin) and In (indium) in an amount of 1 mass % to 50 mass %. ２ The content of is preferably in the range of 1 mass % to 15 mass %. The active metal brazing material may contain C (carbon) in an amount of 0.1 mass % to 2 mass % as needed.

[0056] The composition ratio of the active metal brazing material is calculated assuming that the total of the mixed raw materials is 100 mass %. For example, if the active metal brazing material is composed of three elements, Ag, Cu, and Ti, the sum of the masses of Ag, Cu, and Ti is 100 mass %. ２ When the active metal brazing material is composed of four types of Ag, Cu, TiH, ２ In the case where the active metal brazing material is composed of five elements, Ag, Cu, Ti, Sn, and C, the sum of the masses of Ag, Cu, Ti, Sn, and C is taken as 100 mass %.

[0057] Ag or Cu is a component that becomes the base material of the brazing filler metal. Sn or In has the effect of lowering the melting point of the brazing filler metal. C (carbon) has the effect of controlling the fluidity of the brazing filler metal or the effect of controlling the structure of the joining layer by reacting with other components. Components of the brazing filler metal are, for example, Ag-Cu-Ti, Ag-Cu-Sn-Ti, Ag-Cu-Ti-C, Ag-Cu-Sn-Ti-C, Ag-Ti, Cu-Ti, Ag-Sn-Ti, Cu-Sn-Ti, Ag-Ti-C, Cu-Ti-C, Ag-Sn-Ti-C, and Cu-Sn-Ti-C. In may be used instead of Sn. Both Sn and In may be used.

[0058] The active metal brazing material may contain 0.1 mass % to 10 mass % of one or more elements selected from the group consisting of tungsten (W), molybdenum (Mo), and rhenium (Re). The addition of tungsten, molybdenum, or rhenium can control the fluidity of the active metal brazing material. Magnesium (Mg) may also be added to the active metal brazing material.

[0059] The above-mentioned active metal brazing material is effective for joining copper plates. When the metal plate is a copper plate, it is preferable that the silicon nitride substrate and the copper plate are joined via a bonding layer that does not contain Ag. "Ag-free" means that Ag is not added. The bonding layer may contain 0.01 mass% or less of Ag (including zero as below the detection limit) as an unavoidable impurity. By using a bonding layer that does not contain Ag, the occurrence of Ag ion migration can be suppressed. Ag ion migration is a phenomenon in which Ag in the bonding layer ionizes and migrates when a voltage is applied in a high-humidity environment. When Ag ions migrate, they precipitate in another location. This can cause poor insulation. Among the components of active metal brazing materials, Ag is most susceptible to ion migration. By not using Ag in the bonding layer, Ag ion migration can be suppressed.

[0060] When the metal plate is an aluminum plate, the active metal brazing filler metal is preferably an Al-Si-based or Al-Mg-based brazing filler metal. When the active metal brazing filler metal contains either Si or Mg, the content thereof is preferably within the range of 0.1% by mass to 20% by mass. When the active metal brazing filler metal contains both Si and Mg, the total content thereof is preferably within the range of 0.1% by mass to 20% by mass.

[0061] The metal plate may be etched as needed. For example, a circuit shape may be formed on the metal plate by etching. A protruding portion may be formed on the bonding layer by etching. The protruding portion is a portion of the bonding layer that protrudes from the edge of the metal plate.

[0062] Instead of a metal plate, a thin film or a metallized film may be used. A thin film is a conductive film formed by sputtering or plating. A metallized film is a conductive layer formed by applying and firing a metal powder paste.

[0063] The silicon nitride circuit substrate can be used in a semiconductor device on which a semiconductor element is mounted. Fig. 5 is a side view showing an example of a semiconductor device according to an embodiment. In Fig. 5, reference numeral 6 denotes a semiconductor element, reference numeral 10 denotes a silicon nitride circuit substrate, and reference numeral 20 denotes a semiconductor device.

[0064] In the example shown in FIG. 5 , one semiconductor element 6 is mounted on each front metal plate 3. In the semiconductor device according to the embodiment, the number of mounted semiconductor elements may be one or more. If necessary, the semiconductor element 6 may be mounted on the front metal plate 3 via a solder layer or the like. If necessary, a lead frame, wire bonding, molded resin, or the like may be used. In the example shown in FIG. 5 , the back metal plate 4 is used as a heat sink. A semiconductor element may also be mounted on the back metal plate 4.

[0065] In the embodiment, the storage charge ratio at the drive voltage of the semiconductor element is controlled. Therefore, the silicon nitride substrate according to the embodiment has excellent long-term reliability. As described above, the drive voltage of the power card is designed to be around 1 kV. Generally, the drive voltage of the power card is designed within the range of 0.6 kV to 1.4 kV (rounded to 1 kV). The DC electric field of 5 kV / mm is a condition that assumes the drive voltage of the semiconductor element. Therefore, the storage charge ratio is suitable as an indicator of long-term reliability under practical conditions.

[0066] Next, a method for manufacturing a silicon nitride sintered body according to the embodiment will be described. The method for manufacturing the silicon nitride sintered body according to the embodiment is not particularly limited as long as it has the above-mentioned properties. Here, an example of a method for obtaining a silicon nitride sintered body with a good yield will be described. An example of a method for manufacturing a silicon nitride substrate will be described below.

[0067] First, silicon nitride powder and sintering aid powder are prepared as raw materials. The silicon nitride powder is produced, for example, by the imide decomposition method or the direct nitridation method. The average particle size of the silicon nitride powder is preferably in the range of 0.1 μm to 4 μm.

[0068] The sintering aid may be one or more selected from the group consisting of rare earth elements, titanium (Ti), hafnium (Hf), zirconium (Zr), magnesium (Mg), calcium (Ca), tungsten (W), and molybdenum (Mo). One or more compounds selected from this group may be used as the sintering aid. The compounds may be oxides, nitrides, oxynitrides, etc.

[0069] The rare earth element is yttrium (Y) or a lanthanoid element. Examples of the lanthanoid element include ytterbium (Yb), erbium (Er), europium (Eu), lutetium (Lu), lanthanum (La), cerium (Ce), and dysprosium (Dy). The average particle size of the sintering aid powder is preferably in the range of 0.1 μm to 4 μm.

[0070] The silicon nitride powder and the sintering aid powder may contain impurities such as fluorine, iron, sodium, etc. It is preferable to control the amount of one or more impurities selected from the group consisting of fluorine, iron, and sodium.

[0071] Silicon nitride powder is produced by either the imide decomposition method or the direct nitridation method. In the imide decomposition method, silicon halide is used as the raw material. In the direct nitridation method, a fluorine compound is used as a catalyst to nitride metallic silicon. When producing silicon nitride powder, washing with hydrofluoric acid is sometimes performed. For this reason, fluorine is likely to remain in the silicon nitride powder.

[0072] Iron is likely to be mixed in during the manufacturing process of silicon nitride powder or sintering aid powder. Iron is also likely to be mixed in during the manufacturing process of silicon nitride substrates. This is because the components of the manufacturing equipment are often made of iron alloys. For example, if the inner walls of the manufacturing equipment are made of iron alloy, the silicon nitride powder may rub against the iron alloy, causing iron to be mixed in with the raw material powder.

[0073] NaOH is sometimes used as a neutralizing agent after washing with hydrofluoric acid, which can leave a neutralized salt of Na that may become mixed into the silicon nitride powder.

[0074] In order to control the respective contents of fluorine, iron, and sodium in the silicon nitride substrate, it is effective to control the respective contents of fluorine, iron, and sodium in the raw material powder. The sum of the fluorine content in the silicon nitride powder and the fluorine content in the sintering aid powder is preferably 0 wtppm or more and 1000 wtppm or less. The sum of the iron content in the silicon nitride powder and the iron content in the sintering aid powder is preferably 0 wtppm or more and 500 wtppm or less. The sum of the sodium content in the silicon nitride powder and the sodium content in the sintering aid powder is preferably 0 wtppm or more and 500 wtppm or less.

[0075] In order to control the respective contents of fluorine, iron, and sodium in the raw material powder, it is effective to use powders with low contents of these elements in advance. It is also effective to subject the raw material powder to the following treatment. To reduce the fluorine and sodium, it is preferable to perform a washing step with pure water in the process of producing the raw material powder. It is also effective to perform the washing step multiple times. To reduce the iron content, it is preferable to subject the raw material powder to magnet removal or an electromagnetic de-ironizing machine.

[0076] After mixing the silicon nitride powder and the sintering aid powder, a mixing step is performed using a pulverizer. This further mixes the raw material powders. The pulverizer is, for example, a ball mill or a bead mill. In the mixing step, a binder, a solvent, etc. are added to the mixed powder to prepare a raw material powder slurry. The binder is, for example, an organic binder. The solvent is, for example, water or an organic solvent.

[0077] Next, the drying process is performed to dry the molded body. In the drying process, the constant rate drying period and the falling rate drying period are calculated from the weight loss behavior of the solvent. It is preferable to set the temperature and time during the constant rate drying period and the falling rate drying period. The constant rate drying period is the period during which the solvent evaporates from the ceramic molded body at an almost constant rate. During the constant rate drying period, the solvent near the surface of the ceramic molded body evaporates. During the falling rate drying period, the solvent inside the ceramic molded body evaporates. The constant rate drying period and the falling rate drying period can be distinguished depending on the main location where the solvent evaporates. During the transition period from the constant rate drying period to the falling rate drying period, the shrinkage stress on the molded body is at its maximum. Therefore, controlling the constant rate drying period and the falling rate drying period leads to the suppression of voids. Controlling voids leads to the control of surface unevenness.

[0078] The weight loss rate of the solvent during the constant rate drying period is preferably 0.2% by mass / min or more. The upper limit of the weight loss rate of the solvent during the constant rate drying period is not particularly limited, but is preferably 10% by mass / min or less. If the weight loss rate exceeds 10% by mass / min, voids may become large. Therefore, the weight loss rate of the solvent during the constant rate drying period is preferably within the range of 0.2% by mass / min or more and 10% by mass / min or less.

[0079] The weight loss rate is calculated using the following method. First, the mass of the compact is measured before the drying process. Then, while the drying process is being carried out, the mass of the compact is measured every 2 to 5 minutes. Furthermore, while checking the areas where the solvent is mainly evaporating, it is determined whether each timing is a constant rate drying period or a falling rate drying period. The weight loss rate for each period is calculated from the mass before the drying process and the mass during the drying process. Alternatively, the drying process may be carried out with the compact placed on a mass meter. In this case, the amount of change in mass during the drying process is measured and the weight loss rate is calculated.

[0080] The weight loss rate of the solvent during the falling-rate drying period is preferably smaller than the weight loss rate of the solvent during the constant-rate drying period. The ratio (R2 / R1) of the weight loss rate of the solvent during the constant-rate drying period R2 to the weight loss rate of the solvent during the falling-rate drying period R1 is preferably greater than 1 and less than 20. During the constant-rate drying period, solvent evaporation routes are formed near the surface of the compact. By keeping the ratio (R2 / R1) within the range of greater than 1 and less than 20, the solvent inside the ceramic compact can evaporate through these evaporation routes during the falling-rate drying period. If the ratio (R2 / R1) exceeds 20, the weight loss rate during the falling-rate drying period is excessively slow, increasing the possibility that the solvent inside the ceramic compact cannot be sufficiently removed. Residual solvent inside the ceramic compact can cause large voids. Furthermore, a slow weight loss rate during the falling-rate drying period reduces manufacturing efficiency. The rate of weight loss of the solvent during the falling-rate drying period is preferably 0.01 mass % / min or more and less than 0.2 mass % / min.

[0081] The drying time is determined depending on the amount of solvent contained in the compact. For example, the ratio of the mass of the solvent to the mass of the mixed powder is about 0.1 to 0.6. In this case, the drying process is performed so that the weight after the drying process is 0.6 times or less of the weight before the drying process.

[0082] The green body that has been subjected to the drying process is then subjected to a degreasing process. The degreasing process is preferably carried out at a temperature in the range of 400°C to 800°C. The degreasing process removes organic substances such as binders. In addition, the solvent remaining after the drying process can also be removed.

[0083] The degreased body is subjected to a sintering process. The sintering process is carried out by heating the compact in a non-oxidizing atmosphere at a temperature of 1650°C to 1950°C for 4 hours to 24 hours. The non-oxidizing atmosphere is preferably a nitrogen gas atmosphere or a reducing atmosphere containing nitrogen gas. The pressure inside the sintering furnace is preferably a pressurized atmosphere.

[0084] If the sintering temperature is lower than 1650°C, it is difficult to obtain a dense sintered body. On the other hand, if the sintering temperature is higher than 1950°C, the Si ３ N ４ Therefore, it is preferable to control the sintering temperature within the above range.

[0085] Preferably, a heat treatment step is carried out during the temperature rise to the sintering temperature. In the heat treatment step, the degreased body is held at 1400°C or higher but lower than 1650°C for 1 hour or higher but lower than 8 hours. 1400°C or higher but lower than 1650°C is the temperature range in which the sintering aid reacts and changes to a liquid phase. The liquid phase diffuses to fill the gaps between the silicon nitride crystal particles. The heat treatment step promotes and controls the diffusion of the liquid phase consisting of the sintering aid, leading to a reduction in voids in the sintered body.

[0086] If necessary, the obtained silicon nitride substrate is subjected to a surface treatment. The surface treatment is performed so that the maximum height Sz is 60 μm or less. The surface treatment preferably includes a ductile mode. Examples of surface treatments include lapping, buffing, and honing. The ductile mode is a mode in which the amount of material ground decreases little by little. In the ductile mode, shedding of polycrystalline ceramics and the like is less likely to occur. The ductile mode is distinguished from the brittle mode in which a large amount of the material to be processed is removed. According to the ductile mode, the surface after treatment is clean, but the treatment time may be longer.

[0087] For example, in lapping, a silicon nitride substrate is sandwiched between lapping machines using a liquid abrasive material, which polishes the surface of the silicon nitride substrate. In honing, abrasive grains are projected obliquely onto the surface of the silicon nitride substrate, polishing the surface.

[0088] (Examples) (Examples 1 to 6, Comparative Example 1) Silicon nitride powder and sintering aid powder were prepared. The average particle size of each powder was 2 μm or less. A mixed powder of silicon nitride powder and sintering aid powder was subjected to a crushing process using a ball mill. The proportions of each mixed component are shown in Table 1. Each proportion is calculated assuming that the total of silicon nitride powder and sintering aid powder is 100 mass%. In addition, the contents of fluorine (F), iron (Fe), and sodium (Na) in the mixed powder were measured. The results are shown in Table 1.

[0089]

[0090] A binder and a solvent were added to the mixed raw material powder. These were mixed in a ball mill to prepare a raw material powder slurry. The raw material powder slurry was then formed into a sheet by the doctor blade method. The obtained long sheet compact was cut into the required size. Here, the sheet obtained by cutting the long sheet compact is referred to as a "sheet compact."

[0091] Next, the sheet molded body was subjected to a drying process. During the drying process, the solvent weight loss rate (wt% / min) during the constant rate drying period was measured. The ratio of the solvent weight loss rate R2 during the constant rate drying period to the solvent weight loss rate R1 during the falling rate drying period (R2 / R1) was also calculated. The results are shown in Table 2.

[0092]

[0093] The sheet compact that had been subjected to the drying process was then subjected to a degreasing process. The resulting degreasing body was then subjected to a sintering process. During the temperature increase process, the degreasing body was held in a non-oxidizing atmosphere at 1400°C or higher but lower than 1650°C for 1 hour to 8 hours. Thereafter, the degreasing body was held at 1650°C or higher but lower than 1950°C for 4 hours to 24 hours. Through this process, a silicon nitride substrate (sintered silicon nitride body) was obtained.

[0094] Next, the silicon nitride substrate was subjected to a surface treatment, which was either lapping, buffing, or honing.

[0095] Silicon nitride substrates according to the examples and comparative examples were fabricated by the above steps. The size of the obtained silicon nitride substrates was 100 mm long x 80 mm short. All silicon nitride substrates had a thermal conductivity of 65 W / m·K or more, a three-point bending strength of 600 MPa or more, and a fracture toughness of 5.5 MPa·m １／２ That was all.

[0096] The silicon nitride substrates according to the examples and comparative examples were measured for the fluorine, iron, and sodium contents. The surface roughness and dielectric strength of each silicon nitride substrate were also measured. The surface roughness was measured in terms of maximum height Sz, maximum peak height Sp, and maximum valley depth Sv. The measurement methods were as described above. The results are shown in Table 3.

[0097]

[0098] Next, the amount of accumulated charge on each silicon nitride substrate was measured. The amount of accumulated charge was measured using an A&D Q(t) meter (model AD-9832A), and a 40 mm diameter measurement electrode was used. The size of the measurement electrode was selected to prevent creepage leakage on the silicon nitride substrate. Electrodes were placed on the front and back of the silicon nitride substrate. A voltage corresponding to the thickness of the silicon nitride substrate was applied so that the applied voltage was 5 kV / mm. The amount of accumulated charge was measured at room temperature (25°C), 100°C, and 200°C. The ratio of accumulated charge was calculated from the obtained results. The results are shown in Tables 4 to 6. The unit of accumulated charge is nC (nanocoulomb).

[0099]

[0100]

[0101]

[0102] Tables 4 to 6 show that the examples had improved storage charge ratios compared to the comparative examples. The silicon nitride substrates according to the examples exhibited excellent performance at all temperatures of 25°C, 100°C, and 200°C. This demonstrates that the silicon nitride substrates according to the examples can be used as silicon nitride circuit substrates with excellent long-term reliability even when mounted with semiconductor elements that generate high heat. In contrast, in comparative example 1, the storage charge ratios Q100(600) / Q100(5) and Q200(600) / Q200(5) were within the preferred ranges, but the storage charge ratio Q25(600) / Q25(5) exceeded 3.0.

[0103] Furthermore, the arc discharge voltage of each silicon nitride substrate was measured. The arc discharge voltage of each silicon nitride substrate was 5 kV or more. In contrast, the arc discharge voltage of Comparative Example 1 was less than 5 kV.

[0104] Embodiments of the present invention include the following features. (Feature 1) A silicon nitride sintered body, in which, when a DC electric field of 5 kV / mm is applied at 25°C, the ratio Q25(600) / Q25(5) of the amount of accumulated charge 600 seconds after the start of application to the amount of accumulated charge 5 seconds after the start of application is 1.0 or more and 3.0 or less, and the thermal conductivity is 65 W / m·K or more. (Feature 2) The silicon nitride sintered body according to Feature 1, in which the fluorine content is 0 wtppm or more and 1000 wtppm or less. (Feature 3) The silicon nitride sintered body according to Feature 1 or 2, in which the iron content is 0 wtppm or more and 500 wtppm or less. (Feature 4) The silicon nitride sintered body according to any one of Features 1 to 3, in which the sodium content is 0 wtppm or more and 500 wtppm or less. (Feature 5) A silicon nitride sintered body according to any one of Features 1 to 4, having a surface with a maximum height Sz of 60 μm or less. (Feature 6) A silicon nitride sintered body according to any one of Features 1 to 5, in which, when a DC electric field of 5 kV / mm is applied at 100°C, the ratio Q100(600) / Q100(5) of the amount of accumulated charge 600 seconds after the start of application to the amount of accumulated charge 5 seconds after the start of application is 1.0 or more and 5.0 or less. (Feature 7) A silicon nitride sintered body according to any one of Features 1 to 6, in which, when a DC electric field of 5 kV / mm is applied at 200°C, the ratio Q200(600) / Q200(5) of the amount of accumulated charge 600 seconds after the start of application to the amount of accumulated charge 5 seconds after the start of application is 1.0 or more and 10.0 or less. (Feature 8) A silicon nitride substrate having a thickness of 0.2 mm or more and 1 mm or less, made of the silicon nitride sintered body according to any one of Features 1 to 7. (Feature 9) A silicon nitride circuit substrate comprising: the silicon nitride substrate according to Feature 8; and a metal plate bonded to the silicon nitride substrate. (Feature 10) A semiconductor device comprising: the silicon nitride circuit substrate according to Feature 9; and a semiconductor element mounted on the metal plate.

[0105] Although several embodiments of the present invention have been described above, these embodiments are presented by way of example only and are not intended to limit the scope of the invention. These novel embodiments can be embodied in various other forms, and various omissions, substitutions, modifications, etc. can be made without departing from the spirit of the invention. These embodiments and their modifications are included within the scope and spirit of the invention, as well as within the scope of the invention and its equivalents as set forth in the claims. Furthermore, the above-described embodiments can be implemented in combination with each other.

[0106] DESCRIPTION OF SYMBOLS 1... Silicon nitride substrate (sintered silicon nitride body) 2... Surface portion 3... Front metal plate 4... Back metal plate 5... Bonding layer 6... Semiconductor element 10... Silicon nitride circuit substrate 20... Semiconductor device

Claims

1. A silicon nitride sintered body, in which, when a direct current electric field of 5 kV / mm is applied at 25°C, the ratio Q25(600) / Q25(5), of the amount of accumulated charge 600 seconds after the start of application to the amount of accumulated charge 5 seconds after the start of application, is 1.0 or more and 3.0 or less, and the thermal conductivity is 65 W / m・K or more.

2. The silicon nitride sintered body according to claim 1, having a fluorine content of 0 wtppm or more and 1000 wtppm or less.

3. The silicon nitride sintered body according to claim 1, wherein the iron content is from 0 wtppm to 500 wtppm.

4. The silicon nitride sintered body according to claim 1, having a sodium content of 0 wtppm or more and 500 wtppm or less.

5. The silicon nitride sintered body according to claim 1, having a fluorine content of 0 wtppm or more and 1000 wtppm or less, an iron content of 0 wtppm or more and 500 wtppm or less, and a sodium content of 0 wtppm or more and 500 wtppm or less.

6. The silicon nitride sintered body according to claim 1, having a surface with a maximum height Sz of 60 μm or less.

7. The silicon nitride sintered body according to claim 5, having a surface with a maximum height Sz of 60 μm or less.

8. A silicon nitride sintered body according to claim 1, in which, when a DC electric field of 5 kV / mm is applied at 100°C, the ratio Q100(600) / Q100(5), of the amount of accumulated charge 600 seconds after the start of application to the amount of accumulated charge 5 seconds after the start of application, is 1.0 or more and 5.0 or less.

9. A silicon nitride sintered body according to claim 1, in which, when a DC electric field of 5 kV / mm is applied at 200°C, the ratio Q200(600) / Q200(5), of the amount of accumulated charge 600 seconds after the start of application to the amount of accumulated charge 5 seconds after the start of application, is 1.0 or more and 10.0 or less.

10. A silicon nitride sintered body according to claim 7, in which, when a DC electric field of 5 kV / mm is applied at 100°C, the ratio Q100(600) / Q100(5), of the amount of accumulated charge 600 seconds after the start of application to the amount of accumulated charge 5 seconds after the start of application, is 1.0 or more and 5.0 or less.

11. A silicon nitride sintered body according to claim 10, in which, when a DC electric field of 5 kV / mm is applied at 200°C, the ratio Q200(600) / Q200(5), of the amount of accumulated charge 600 seconds after the start of application to the amount of accumulated charge 5 seconds after the start of application, is 1.0 or more and 10.0 or less.

12. A silicon nitride substrate comprising the silicon nitride sintered body according to any one of claims 1 to 11 and having a thickness of 0.2 mm or more and 1 mm or less.

13. A silicon nitride circuit board comprising: the silicon nitride substrate according to claim 12; and a metal plate bonded to the silicon nitride substrate.

14. A semiconductor device comprising: the silicon nitride circuit board according to claim 13; and a semiconductor element mounted on the metal plate.

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