Power supply unit and load redeployment method

Abstract

A power supply unit, comprising a conversion circuit (1), an auxiliary power supply circuit (2), and an output control circuit (3), wherein the conversion circuit (1) converts a direct-current power supply into a first output power supply, and the auxiliary power supply circuit (2) converts the direct-current power supply into a first auxiliary power supply; and the output control circuit (3) is used for selectively turning on a first output end and a second output end, such that when the output control circuit (3) turns off the first output end and the second output end, the first output power supply supplies power to a critical load by means of the first output end, and when the output control circuit (3) turns on the first output end and the second output end, the first output power supply supplies power to the critical load and a non-critical load by means of the first output end and the second output end, respectively.

Description

Power supply and load allocation method Technical Field

[0001] The present disclosure relates to a power supply and a load allocation method, and more particularly to a power supply and a load allocation method that improve efficiency through a load allocation function. Background Art

[0002] In the world of electronics, most power is provided by power supplies (PSUs). Consequently, PSUs have become indispensable components for electronic products. Within this framework, in addition to maximizing the efficiency of the PSU's main power circuit, the power losses of the auxiliary power supply must also be considered to meet the latest energy efficiency requirements. This is because focusing solely on improving the efficiency of the main power circuit without considering how to reduce the power losses of the auxiliary power supply will inevitably lead to a decrease in power density and a loss in efficiency.

[0003] Specifically, as shown in FIG1 , in the prior art, a power supply 100 typically includes a power factor correction (PFC) circuit PFC, a main conversion circuit 1, and an auxiliary power supply circuit 2. The main conversion circuit 1 and the auxiliary power supply circuit 2 are coupled to the power factor correction circuit PFC. The power factor correction circuit PFC is primarily used to convert the AC input power Pin into a DC power Pdc and perform power factor correction on the input power Pin. The main conversion circuit 1 is primarily used to convert the DC power Pdc into a main output power Pm, which is then provided to power a critical load (Load_C) coupled to the back-end (such as, but not limited to, a central processing unit, a main control system, or other load requiring high power). The auxiliary power supply circuit 2 is primarily used to convert the DC power Pdc into an auxiliary power Pa, which is then provided to power a non-critical load (Load_NC) coupled to the back-end (such as, but not limited to, a fan, a microcontroller within the power supply, or other load requiring less power).

[0004] Therefore, how to design a power supply and a load adjustment method to provide load adjustment capability through efficient output operation of the power supply is a major research topic that the inventors of the present disclosure intend to conduct.

[0005] Summary of the Invention

[0006] In order to solve the above problems, the present disclosure provides a power supply to overcome the problems of the prior art. Therefore, the power supply of the present disclosure includes a conversion circuit, an auxiliary power supply circuit and an output control circuit. The conversion circuit converts the DC power supply into a first output power supply, and is used to couple the critical load through the first output terminal to provide the first output power supply to power the critical load through the first output terminal. The auxiliary power supply circuit converts the DC power supply into a first auxiliary power supply. The output control circuit couples the first output terminal and the second output terminal, and the second output terminal is used to couple the non-critical load. Among them, the output control circuit is used to selectively connect the first output terminal and the second output terminal, so that when the output control circuit disconnects the first output terminal and the second output terminal, the first output power supply supplies power to the critical load through the first output terminal, and when the output control circuit connects the first output terminal and the second output terminal, the first output power supply supplies power to the critical load and the non-critical load through the first output terminal and the second output terminal respectively.

[0007] In order to solve the above problems, the present disclosure provides a power supply to overcome the problems of the prior art. Therefore, the power supply disclosed in the present disclosure includes a conversion circuit, an auxiliary power supply circuit and an output control circuit. The conversion circuit converts the DC power supply into a first output power supply, and is used to couple the critical load through the first output terminal to provide the first output power supply to power the critical load through the first output terminal. The auxiliary power supply circuit converts the DC power supply into a first auxiliary power supply, and the output control circuit couples the first output terminal and the auxiliary power supply circuit. When the first output terminal has a backup requirement, the output control circuit connects the first output terminal and the auxiliary power supply circuit to provide the first auxiliary power provided by the auxiliary power supply circuit to the first output terminal through the output control circuit.

[0008] In order to solve the above problems, the present disclosure provides a load adjustment method for a power supply to overcome the problems of the prior art. Therefore, the power supply of the present disclosure is used to supply power to a critical load through a first output terminal, and to supply power to a non-critical load through a second output terminal. The steps of the load adjustment method first include controlling the conversion circuit to convert the DC power supply into a first output power supply, and controlling the auxiliary power supply circuit to convert the DC power supply into a first auxiliary power supply. Then, (a1) it is determined that the conversion circuit is operating normally and the first output power supply still has margin. (a2) the first output terminal and the second output terminal are connected so that the second auxiliary power supply is provided to the second output terminal by the conversion circuit. And, (b1) it is determined that the conversion circuit is operating normally and the first output power supply has no margin. (b2) the second output terminal and the auxiliary power supply circuit are connected so that the first auxiliary power supply is provided to the second output terminal by the auxiliary power supply circuit.

[0009] The primary purpose and technical effect of this disclosure is to improve the efficiency of a single power supply by further transferring the non-critical loads carried by the auxiliary power circuit to a high-efficiency conversion circuit through the control of the output control circuit. This provides load adjustment capabilities through the power supply's efficient output operation, thereby achieving the technical effect of improving power supply efficiency.

[0010] In order to further understand the technologies, means and technical effects adopted by the present disclosure to achieve the intended objectives, please refer to the following detailed description and drawings of the present disclosure. It is believed that the objectives, features and characteristics of the present disclosure can be understood in depth and in detail. However, the drawings are provided for reference and illustration only and are not intended to limit the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] FIG1 is a circuit block diagram of a power supply according to the prior art;

[0012] FIG2A is a circuit block diagram of a first embodiment of a power supply according to the present disclosure;

[0013] FIG2B is a circuit block diagram of a second embodiment of the power supply disclosed herein;

[0014] FIG3A is a circuit block diagram of a first embodiment of an output control circuit disclosed herein;

[0015] FIG3B is a circuit block diagram of a first embodiment of a switching circuit disclosed herein;

[0016] FIG3C is a circuit block diagram of a second embodiment of the switch circuit disclosed herein;

[0017] FIG4A is a circuit block diagram of a second embodiment of an output control circuit disclosed herein;

[0018] FIG4B is a circuit block diagram of a third embodiment of an output control circuit disclosed herein;

[0019] FIG4C is a circuit block diagram of a fourth embodiment of an output control circuit disclosed herein;

[0020] FIG4D is a circuit block diagram of a fifth embodiment of an output control circuit disclosed herein;

[0021] FIG5 is a circuit block diagram of a sixth embodiment of an output control circuit disclosed herein;

[0022] FIG6A is a load allocation curve diagram of the first embodiment of the hybrid power supply mode disclosed herein;

[0023] FIG6B is a load allocation curve diagram of the second embodiment of the hybrid power supply mode of the present disclosure;

[0024] FIG7 is a flow chart of a load adjustment method of a power supply according to the present disclosure;

[0025] FIG8 is a circuit block diagram of a power supply device of the related art;

[0026] FIG9A is a circuit block diagram of a first embodiment of a power supply device disclosed herein;

[0027] FIG9B is a circuit block diagram of a second embodiment of a power supply device according to the present disclosure;

[0028] FIG9C is a circuit block diagram of a third embodiment of a power supply device according to the present disclosure;

[0029] FIG10A is a schematic diagram showing a curve of the maximum efficiency of the conversion circuit of FIG2A being 98%;

[0030] FIG10B is a schematic diagram showing a curve of the auxiliary power supply circuit of FIG2A with a maximum efficiency of 92%;

[0031] FIG11 is a flow chart of an operating method of a power supply device according to the present disclosure; and

[0032] FIG12 is a circuit structure diagram showing a switch circuit of the present disclosure configured on a circuit board of a power supply.

[0033] Explanation of reference numerals: PSU_S: power supply device MCU: system controller 5: cabinet 5-1 to 5-6: accommodation space 100, 100-1 to 100-6: power supply PFC: power factor correction circuit 1: main conversion circuit, conversion circuit 2: auxiliary power supply circuit 3: output control circuit 32: switching circuit IC: control chip SMD PCB: Circuit Board 322: Switch 324: Control Circuit NOT: Reverse Gate NAND: Anti-AND Gate D: Unidirectional Conductive Element 34: DC Converter Circuit 36: Bypass Switch 38, 40: Protection Switch SW: Three-Terminal Switch 4: Control Module A: First Output Terminal B: Second Output Terminal C: Third Output Terminal Load_C: Critical Load Load_NC: Non-Critical Load MB: Main Circuit Board MB_B: Back Side SA: Specific Area Pin: Pin Pin: Input Power Pdc: DC Power Pm: Main Output Power Pa: Auxiliary Power Po1: First Output Power Po2: Second Output Power Pa1: First Auxiliary Power Pa2: Second Auxiliary Power Vo: Output Voltage Va: Auxiliary Voltage CL: Control Command UVLO1, UVLO2: Undervoltage Lockout Value In: Demand Current Im, Ia: Output Current Im: First Output Current Ia: Second Output Current IA, IB: Current (S100)-(S320), (S400)-(S440): Steps DETAILED DESCRIPTION

[0034] The technical content and detailed description of the present disclosure are described as follows with reference to the accompanying drawings:

[0035] [Technical Solution 1: Load Allocation Mechanism]

[0036] Please refer to Figure 2A for a circuit block diagram of the first embodiment of the power supply of the present disclosure, and refer to Figure 1 in conjunction. The power supply 100 includes a power factor correction circuit PFC, a main conversion circuit 1 (hereinafter referred to as the conversion circuit 1), an auxiliary power supply circuit 2, an output control circuit 3, and a control module 4, and the power factor correction circuit PFC is coupled to the input ends of the conversion circuit 1 and the auxiliary power supply circuit 2. Further, the power supply 100 includes a first output end A, a second output end B, and a third output end C, and the output end of the conversion circuit 1 is the first output end A. The first output end A is coupled to one end of the output control circuit 3, and the first output end A can be mainly used to couple the critical load Load_C. The other end of the output control circuit 3 is the second output end B, and the second output end B can be mainly used to couple the non-critical load Load_NC. The output end of the auxiliary power supply circuit 2 is the third output end C, and the third output end C is coupled to the output control circuit 3. It is worth noting that in one embodiment, the conversion circuit 1 may be, for example but not limited to, a resonant converter (such as, but not limited to, LLC, CLLC, or other resonant converters), and the auxiliary power circuit 2 may be, for example but not limited to, a flyback converter. Any converter that is applicable and commonly used in the power supply 100 is intended to be within the scope of this embodiment.

[0037] The control module 4 receives control commands CL provided by devices such as the system controller, the critical load Load_C and / or the non-critical load Load_NC, and controls the power factor correction circuit PFC, the conversion circuit 1, the auxiliary power circuit 2, and the output control circuit 3 accordingly to control the power supply 100 to supply power to the critical load Load_C and the non-critical load Load_NC. Specifically, the power factor correction circuit PFC is mainly used to convert the AC input power Pin into a DC power Pdc and perform power factor correction on the input power Pin. The conversion circuit 1 can convert the DC power Pdc into a main output power (hereinafter referred to as the first output power Po1), and can provide the first output power Po1 through the first output terminal A to supply power to the critical load Load_C. The auxiliary power circuit 2 can convert the DC power Pdc into an auxiliary power (hereinafter referred to as the first auxiliary power Pa1) to provide the first auxiliary power Pa1 to the third output terminal C.

[0038] It is worth mentioning that, in one embodiment, in addition to controlling the power supply 100 according to the control command CL, a portion of the control module 4 may also control the power supply 100 by receiving signals provided by the power factor correction circuit PFC, the conversion circuit 1, the auxiliary power supply circuit 2, and the output control circuit 3 (such as, but not limited to, feedback signals related to voltage and current). On the other hand, the control module 4 may include one or more controllers. For example, but not limited to, the power factor correction circuit PFC, the conversion circuit 1, the auxiliary power supply circuit 2, and the output control circuit 3 are each controlled by a controller, and these controllers are combined with, for example, but not limited to, detection and compensation circuits to form the control module 4. Alternatively, the control module 4 includes a single controller, and the power factor correction circuit PFC, the conversion circuit 1, the auxiliary power supply circuit 2, and the output control circuit 3 are controlled by this single controller. In addition, in one embodiment, various detection, judgment, and control of the power supply 100 can be implemented by the control module 4. However, in order to avoid blurring the main features of the present disclosure, unless the implementer of detection, judgment, and control is specifically specified in the text, the implementer of various detections, judgments, and controls in the following text may be the control module 4.

[0039] Furthermore, the conversion circuit 1 can output power of, for example, but not limited to, 250W, and the auxiliary power circuit 2 can output power of, for example, but not limited to, 36W. However, under normal circumstances, due to the auxiliary power circuit 2's requirement for high stability and a wide operating range (for example, but not limited to, 3.3V, 5V, and 12V), its optimal efficiency operating point is typically not under normal operating conditions, resulting in the inability to effectively improve the efficiency of the auxiliary power circuit 2. Therefore, the maximum efficiency achievable by the auxiliary power circuit 2 (for example, but not limited to, an efficiency below 92%) is often lower than that of the conversion circuit 1 (for example, but not limited to, an efficiency of 98%), and the efficiency difference between the two is typically greater than 5%. It is worth noting that, in one embodiment, unless otherwise specified herein, the term "power" may be equivalent to "power," and its relationship to voltage and current can be inferred based on basic electrical principles.

[0040] Among them, the main feature of the present disclosure is that the conversion circuit 1 and the auxiliary power supply circuit 2 of the present disclosure can be adjusted to provide power to the critical load Load_C and the non-critical load Load_NC through the actuation of the output control circuit 3. Specifically, the output control circuit 3 can be used to selectively connect the first output terminal A and the second output terminal B. In this way, when the output control circuit 3 disconnects the first output terminal A and the second output terminal B, the first output power Po1 provided by the conversion circuit 1 can supply power to the critical load Load_C through the first output terminal A. Moreover, when the output control circuit 3 connects the first output terminal A and the second output terminal B, the first output power Po1 provided by the conversion circuit 1 can supply power to the critical load Load_C and the non-critical load Load_NC through the first output terminal A and the second output terminal B respectively. In this way, the loads of the conversion circuit 1 and the auxiliary power supply circuit 2 can be adjusted to maximize the efficiency of the power supply 100.

[0041] 1. Power supply high efficiency output mode

[0042] In practice, because the auxiliary power supply circuit 2 requires a wider range of more stringent operating conditions, achieving the 92% efficiency in the example requires a fairly complex circuit. Please refer to Table 1 below for the efficiency / power parameter table of the conversion circuit 1 and the auxiliary power supply circuit 2, respectively, when supplying power to the non-critical load Load_NC. In Table 1, it is assumed that the auxiliary power supply circuit 2 can output 36W of power with an operating efficiency of 92%, and it is assumed that the operating efficiency of the conversion circuit 1 is 98%. Calculated under the above conditions, the power loss corresponding to the load of the auxiliary power supply circuit 2 at half load will reach 19.565W. Conversely, if this load is replaced by the more efficient conversion circuit 1, its power loss is only 18.367W. Therefore, the difference in power loss between the two is 1.197W, and this 1.197W power loss difference will result in an overall efficiency improvement of 0.479%. Therefore, in order to improve the efficiency of the single power supply 100, the present disclosure further transfers the load borne by the auxiliary power circuit 2 to the high-efficiency conversion circuit 1 through the control of the output control circuit 3, thereby achieving the technical effects of reducing the loop loss of the power supply 100, improving power density and improving efficiency.

[0043] Table 1: Efficiency / power parameters of the conversion circuit and auxiliary power circuit respectively when supplying power to non-critical loads.

[0044] Specifically, the power supply 100 of the present disclosure can, when the conversion circuit 1 is operating normally and the first output power Po1 still has margin, connect the first output terminal A and the second output terminal B, so that the conversion circuit 1 provides the second auxiliary power Pa2 to the second output terminal B via the path from the first output terminal A to the second output terminal B of the output control circuit 3. In this way, the non-critical load Load_NC can be powered by the second auxiliary power Pa2, and the load borne by the auxiliary power circuit 2 can be transferred to the high-efficiency conversion circuit 1 under the control of the output control circuit 3. In this way, the efficient output operation of the power supply 100 provides load balancing capabilities, thereby achieving the technical effect of improving the efficiency of the power supply 100. Furthermore, since the auxiliary power circuit 2 is not the primary load bearer at this time, the control module 4 can adjust the auxiliary power circuit 2 to standby, hibernation, or temporarily shut down the auxiliary power circuit 2 to save power consumption, and then restore it to normal operation when the auxiliary power circuit 2 is needed. On the contrary, when the conversion circuit 1 operates normally but the first output power Po1 has no margin (for example but not limited to full load), the output control circuit 3 connects the second output terminal B and the output terminal of the auxiliary power circuit 2 (i.e., the third output terminal C), so that the auxiliary power circuit 2 provides the first auxiliary power Pa1 to the second output terminal B through the output control circuit 3, so that the non-critical load Load_NC can be powered by the first auxiliary power Pa1.

[0045] It's worth noting that, in one embodiment, the "margin" is not simply the power difference between the current first output power source Po1 (i.e., the current output power) and the full-load power. Specifically, since the critical load Load_C is typically the primary controller of the entire system, its power demand is often critical and must be met as promptly as possible. Therefore, when the critical load Load_C momentarily increases its draw capacity to full load, the power supply 100 must be able to temporarily meet its demand. However, if the upper limit of the "margin" is set at full load, the power supply source for the non-critical load Load_NC may not be quickly switched to the auxiliary power circuit 2. Therefore, the control module 4 preferably sets the margin to the full-load power minus a specific value, and this specific value is a value that can temporarily accommodate the critical load Load_C's transient increase in draw capacity to full load (assuming the full-load output power of the conversion circuit 1 is 250W, the specific value can be set, for example, but not limited to, 10W).

[0046] 2. Extend the maintenance time mode

[0047] On the other hand, in addition to the aforementioned control methods, the power supply 100 of the present disclosure may also include other control methods to provide additional functions. Specifically, when the first output power source Po1 is outside a predetermined range, the output control circuit 3 connects the first output terminal A and the second output terminal B, allowing the auxiliary power circuit 2 to provide the second output power source Po2 to the first output terminal A via the second output terminal B of the output control circuit 3. This temporarily supplements the output capacitor (not shown) of the conversion circuit 1 with additional power, thereby extending the hold-up time of the conversion circuit 1. This prolongs the hold-up time of the conversion circuit 1, allowing the critical load Load_C at the back end sufficient time to react, thus avoiding the loss of important data. When the control module 4 determines that the hold-up time has expired, indicating that the critical load Load_C has completed its pre-shutdown preparations, the output control circuit 3 disconnects the first output terminal A and the second output terminal B, thereby no longer providing the second output power source Po2 to the first output terminal A. The reasons why the first output power Po1 is not within the predetermined range include, but are not limited to, the conversion circuit 1 entering overvoltage, overcurrent, or low voltage protection, or the conversion circuit 1 malfunctions, enters sleep, standby, or shuts down, all of which can cause the first output power Po1 to be outside the predetermined range.

[0048] On the other hand, when power supply 100 is powered off, auxiliary power circuit 2 also loses power, causing it to enter a power-off state. At this point, if auxiliary power circuit 2 still has sufficient energy, output control circuit 3 can connect first output terminal A and second output terminal B, similarly increasing the hold-up time of the conversion circuit. Otherwise, conversion circuit 1 and auxiliary power circuit 2 each attempt to extend their own hold-up time using their remaining power. In this case, output control circuit 3 can disconnect first output terminal A and second output terminal B, enabling power supply 100 to perform this operation.

[0049] In summary, the power supply 100 of the present disclosure can selectively control the output control circuit 3 to connect the first output terminal A and the second output terminal B by utilizing the energy margin provided by the auxiliary power circuit 2, thereby meeting the ITIC (Information Technology Industry Council) AC input voltage envelope specification under the control of the maintenance time.

[0050] 3. Peak power mode

[0051] In addition, the power supply 100 can also operate in peak power mode. Specifically, in order to improve the efficiency of the standby power supply of the single power supply 100, the peak power specification is also improved. Therefore, when the first output power supply Po1 of the power supply 100 of the present disclosure cannot meet the power demand of the critical load Load_C (for example, the conversion circuit 1 is fully loaded with 250W, but the critical load Load_C requires it to provide a power output of 260W), the output control circuit 3 connects the first output terminal A and the second output terminal B, so that the auxiliary power supply circuit 2 provides the second output power Po2 to the first output terminal A through the second output terminal B of the output control circuit 3 (that is, the auxiliary power supply circuit 2 provides the remaining 10W). In this way, the first output power supply Po1 and the second output power supply Po2 can be used together to supply power to the critical load Load_C and provide overload power (Peak Power).

[0052] On the other hand, when the first output power source Po1 is unable to meet the power demand of the critical load Load_C and the margin of the second output power source Po2 is insufficient to meet the demand, the control module 4 can, through systematic allocation, notify the critical load Load_C (such as, but not limited to, a processing device such as a central processing unit) whether it can first reduce the power consumption of the non-critical load Load_NC by shutting down or reducing the frequency, thereby temporarily freeing up additional power to provide to the critical load Load_C. For example, when the conversion circuit 1 is fully loaded at 250W, but is required by the critical load Load_C to provide a power output of 265W, and the auxiliary power circuit 2 can only provide a power output of 12W, the control module 4 can, through systematic allocation, notify the critical load Load_C (such as, but not limited to, a processing device such as a central processing unit) whether it can first reduce the power consumption of the non-critical load Load_NC by shutting down or reducing the frequency (i.e., 3W). When the power consumption of the non-critical load Load_NC is reduced by 3W, the auxiliary power supply circuit 2 can provide an additional second output power Po2 (i.e. 12W+3W) to the first output terminal A through the second output terminal B of the output control circuit 3 to meet the needs of the critical load Load_C.

[0053] Similarly, when the first output power Po1 is supplying power to a non-critical load Load_NC, but the margin of the first output power Po1 is insufficient, the conversion circuit 1 and the auxiliary power circuit 2 can also jointly supply power to the non-critical load Load_NC. Specifically, when the first output power Po1 is supplying power to the non-critical load Load_NC, but the margin of the first output power Po1 is insufficient (for example, the non-critical load Load_NC requires 36W, but the margin of the first output power Po1 is only 20W), the output control circuit 3 connects the first output terminal A and the second output terminal B, so that the auxiliary power circuit 2 provides the first auxiliary power Pa1 to the second output terminal B through the third output terminal C of the output control circuit 3 (i.e., the auxiliary power circuit 2 provides the remaining 16W). In this way, the first output power Po1 and the second output power Po2 can jointly supply power to the non-critical load Load_NC.

[0054] Please refer to FIG2B for a circuit block diagram of a second embodiment of the power supply of the present disclosure, and refer to FIG2A in conjunction with the power supply 100 of FIG2B . The difference between the power supply 100 of FIG2B and the power supply 100 of FIG2A is that the power supply 100 of FIG2B is not coupled to the non-critical load Load_NC. Therefore, the output control circuit 3 is coupled to the first output terminal A and is coupled to the auxiliary power circuit 2 through the third output terminal C. Under this circuit structure, the power supply 100 can still provide the above-mentioned extended hold-up time mode and peak power mode. Specifically, whether the extended hold-up time mode or the peak power mode, the main reason is that the first output terminal A has a backup requirement (i.e., an additional power supply is required). Therefore, when the first output terminal A has a backup requirement, the output control circuit 3 connects the first output terminal A and the auxiliary power circuit 2. In this way, the first auxiliary power Pa1 provided by the auxiliary power circuit 2 can be provided to the first output terminal A through the output control circuit 3 to meet the backup requirement of the first output terminal A. It is worth noting that, in one embodiment, the extended hold-time mode or peak power mode implemented in FIG2B is similar to those described in points 2 and 3 above and will not be further described here. Furthermore, in one embodiment, although not specifically described, the circuit structure of FIG2B is applicable to any of the first output terminals A described above or below in this disclosure where a redundancy requirement is required, and this will not be further described here.

[0055] Please refer to FIG3A for a block diagram of a first embodiment of the output control circuit of the present disclosure, which is also shown in conjunction with FIG2A-2B. In FIG3A, the output control circuit 3 includes a switch circuit 32, which is coupled to the first output terminal A, the second output terminal B, and the third output terminal C, respectively. The switch circuit 32 includes a switch 322 and a unidirectional conductive element D, and the control end of the switch 322 is coupled to the control module 4. The switch 322 can be, for example, but not limited to, a semiconductor element such as a transistor. The control module 4 can selectively turn the switch 322 on and off to connect or disconnect the first output terminal A and the second output terminal B according to the control requirements of the power supply 100. One end of the switch 322 is coupled to the first output terminal A, and the other end of the switch is coupled to the second output terminal B and one end of the unidirectional conductive element D. The other end of the unidirectional conducting element D is coupled to the auxiliary power supply circuit via the third output terminal C. The unidirectional conducting element D may be, for example but not limited to, a diode, a thyristor, or the like, which is forward-biased from one direction to the other (i.e., the direction from the third output terminal C to the second output terminal B is forward-biased) and reverse-biased in the opposite direction. Alternatively, the unidirectional conducting element D may be a switch, which is controlled to conduct when necessary to connect the second output terminal B and the third output terminal C.

[0056] Furthermore, when the control module 4 controls the switch 322 to be turned on, the first output power Po1 can be provided as the second auxiliary power Pa2 to the second output terminal B, or the first auxiliary power Pa1 can be provided as the second output power Po2 to the first output terminal A (depending on the operation described above in FIG. 2A ). Conversely, when the control module 4 controls the switch 322 to be turned off, the first output power Po1 and the first auxiliary power Pa1 are provided to the critical load Load_C, and the first auxiliary power Pa1 is provided to the non-critical load Load_NC, thereby powering the critical load Load_C and the non-critical load Load_NC, respectively. When the control module 4 controls the switch 322 to be turned on, the first auxiliary power Pa1 can be provided to the second output terminal B via the unidirectional conducting element D, but the second auxiliary power Pa2 cannot be reversely fed back into the auxiliary power circuit 2 via the unidirectional conducting element D. This prevents the auxiliary power circuit 2 from accidentally receiving an inappropriate voltage, and the anti-reverse feeding protection function prevents the second auxiliary power Pa2 from reversely feeding back into the auxiliary power circuit 2, which could cause the auxiliary power circuit 2 to fail.

[0057] It is worth noting that, in one embodiment, the switch 322 can be a controlled switch or a self-actuated switch. Specifically, on the other hand, when the switch 322 is a controlled switch, the switch 322 can determine whether to automatically turn on and connect the first output terminal A and the second output terminal B by, for example, but not limited to, actively detecting the status, voltage, or current of the conversion circuit 1, or it can be controlled to turn on by external control (for example, but not limited to, a system controller, a controller of the conversion circuit 1, etc.). When the switch 322 is a self-actuated switch, the switch 322 can automatically turn on and connect the first output terminal A and the second output terminal B by changes in the voltage or current at each terminal. Therefore, any circuit element, circuit, controller, etc. that can achieve the on / off technical effect should be included in the scope of this embodiment.

[0058] On the other hand, the output control circuit 3 also includes a protection switch 40 (i.e., the general auxiliary power supply circuit 2 will include an isolation switch directly coupled to its output end, but the present disclosure is not so coupled). The protection switch 40 is coupled to the second output end B, and is mainly used to determine whether the power supply (i.e., the first auxiliary power supply Pa1 and / or the second auxiliary power supply Pa2) can be provided to the non-critical load Load_NC by controlling its conduction / off. When the power supply (i.e., the first auxiliary power supply Pa1 and / or the second auxiliary power supply Pa2) is not within the predetermined range, the protection switch 40 is turned off and its path is disconnected to prevent the non-compliant first auxiliary power supply Pa1 and / or the second auxiliary power supply Pa2 from being provided to the non-critical load Load_NC and causing damage to the non-critical load Load_NC. Conversely, the output protection switch 40 is turned on and its path is short-circuited to provide the compliant first auxiliary power supply Pa1 and / or the second auxiliary power supply Pa2 to the non-critical load Load_NC and supply power to the non-critical load Load_NC.

[0059] Please refer to Figure 3B for a circuit block diagram of the first embodiment of the switching circuit of the present disclosure, which is also referred to in conjunction with Figures 2A to 3A. In Figure 3B, the switching circuit 32 utilizes the undervoltage lockout value UVLO1 of the converter circuit 1 as its operating logic. The switching circuit 32 includes a switch 322 and a control circuit 324. Switch 322 may be a PMOS transistor. The control circuit 324 couples the control terminal of the switch 322 to the output terminal of the converter circuit 1. When the output voltage Vo at the output terminal of the converter circuit 1 is higher than the undervoltage lockout value UVLO1, the converter circuit 1 is operating normally. Therefore, the control circuit 324 determines that the output voltage Vo of the converter circuit 1 is higher than the undervoltage lockout value UVLO1 and inverts its signal via the reverse gate NOT, causing the control circuit 324 to control the switch 322 to conduct. Conversely, when the control circuit 324 determines that the output voltage Vo is lower than the undervoltage lockout value UVLO1, the signal is inverted via the reverse gate NOT, causing the control circuit 324 to control the switch 322 to turn off.

[0060] Please refer to FIG3C for a circuit block diagram of a second embodiment of the switching circuit of the present disclosure, which is also discussed in conjunction with FIG2A-3B. In FIG3C, the switching circuit 32 not only utilizes the undervoltage lockout value UVLO1 of the converter circuit 1 as its operating logic, but also utilizes the undervoltage lockout value UVLO2 of the auxiliary power supply circuit 2 to assist in its operation, thereby providing more stable and precise control of the switch 322. When the output voltage Vo at the output terminal of the converter circuit 1 is higher than the undervoltage lockout value UVLO1, it indicates that the converter circuit 1 is operating normally. When the auxiliary voltage Va at the output terminal of the auxiliary power supply circuit 2 is higher than the undervoltage lockout value UVLO2, it indicates that the auxiliary power supply circuit 2 is operating normally. Therefore, both circuits provide a logic 1 signal, which is inverted by a NAND gate, causing the control circuit 324 to control the switch 322 to conduct. Conversely, when the control circuit 324 determines that the output voltage Vo or the auxiliary voltage Va is lower than the undervoltage lockout value UVLO1 or UVLO2, the signal is inverted by the NAND gate, causing the control circuit 324 to control the switch 322 to turn off. It is worth noting that, in one embodiment, the circuit blocks, structure, and coupling relationships of the switch circuit 32 shown in Figures 3B-3C are merely preferred embodiments among many. In practice, the circuit blocks, structure, and coupling relationships of the switch circuit 32 may be varied depending on the detailed operation of the switch circuit 32. Therefore, any switch circuit 32 that can control the on / off state of the switch 322 in accordance with the aforementioned operating logic to enable the power supply 100 to provide the aforementioned technical effects is within the scope of this embodiment.

[0061] Please refer to FIG4A for a circuit block diagram of a second embodiment of the output control circuit of the present disclosure, which is also shown in conjunction with FIG2A-3B. FIG4A differs from FIG3A in that the output control circuit 3 of FIG4A further includes a DC converter circuit 34. One end of the DC converter circuit 34 is coupled to the output end of the conversion circuit 1 and the first output end A, and the other end of the DC converter circuit 34 is coupled to the switch circuit 32. The DC converter circuit 34 is primarily used to convert the first output power source Po1 into a second auxiliary power source Pa2, which is then used by the conversion circuit 1 to power the non-critical load Load_NC. Furthermore, because the output voltage Vo of the first output power source Po1 may be higher or lower than the auxiliary voltage Va of the first auxiliary power source Pa1 (in a typical power supply 100, the output voltage Vo is generally higher than the auxiliary voltage Va), if the first output power source Po1 is directly used as the second auxiliary power source Pa2, the output voltage Vo of the first output power source Po1 may not meet the voltage requirements of the non-critical load Load_NC. Therefore, when the conversion circuit 1 supplies power to the non-critical load Load_NC and the output voltage Vo does not match the auxiliary voltage Va, the DC conversion circuit 34 can convert the output voltage Vo into the auxiliary voltage Va to provide a second auxiliary power Pa2 whose voltage level meets the requirements of the non-critical load Load_NC.

[0062] On the other hand, the DC conversion circuit 34 can be a bidirectional DC converter, enabling the power supply 100 to assist the power supply circuit 2 in supplying power to the critical load Load_C. Specifically, when the DC conversion circuit 34 is a bidirectional DC converter, it can be used to convert the first auxiliary power source Pa1 into the second output power source Po2, so that the auxiliary power supply circuit 2 can supply power to the critical load Load_C. Taking the specific operating mode of the power supply 100 in FIG2A as an example, when the first output power source Po1 is not within a predetermined range or the first output power source Po1 cannot meet the power requirements of the critical load Load_C, the switch circuit 32 connects the DC conversion circuit 34 to the second output terminal B, and the DC conversion circuit 34 converts the first auxiliary power source Pa1 into the second output power source Po2, thereby providing the second output power source Po2 to the first output terminal A. When the auxiliary power supply circuit 2 supplies power to the critical load Load_C and the output voltage Vo does not match the auxiliary voltage Va, the DC conversion circuit 34 can convert the auxiliary voltage Va into the output voltage Vo, thereby providing the second output power source Po2 at a voltage level that meets the requirements of the critical load Load_C. In order to step up / down the output voltage Vo and the auxiliary voltage Va, the DC conversion circuit 34 can be a boost converter, a buck converter, or a buck-boost converter, depending on the requirements of the power supply.

[0063] Please refer to FIG4B for a block diagram of a third embodiment of the output control circuit of the present disclosure, which is also referred to in conjunction with FIG2A to FIG4A. FIG4B differs from FIG4A in that the output control circuit 3 of FIG4B further includes a bypass switch 36, which is connected in parallel with the DC converter circuit 34 to provide power-saving operation when the output voltage Vo matches the auxiliary voltage Va. Specifically, when the output voltage Vo provided by the converter circuit 1 does not match the auxiliary voltage Va provided by the auxiliary power circuit 2, and the converter circuit 1 intends to provide the first output power Po1 to the second output terminal B, the bypass switch 36 is turned off, causing the DC converter circuit 34 to convert the first output power Po1 to the second auxiliary power Pa2. Furthermore, if the DC converter circuit 34 is a bidirectional DC converter, when the output voltage Vo does not match the auxiliary voltage Va, and the auxiliary power circuit 2 intends to provide the first auxiliary power Pa1 to the first output terminal A, the bypass switch 36 is turned off, causing the DC converter circuit 34 to convert the first auxiliary power Pa1 to the second output power Po2.

[0064] Conversely, when the output voltage Vo is equal to the auxiliary voltage Va, the bypass switch 36 is turned on, and the first output power Po1 is provided to the second output terminal B as the second auxiliary power Pa2 via the bypass switch 36. Furthermore, when the auxiliary power circuit 2 intends to provide the first auxiliary power Pa1 to the first output terminal A, the first auxiliary power Pa1 can also be provided to the first output terminal A as the second output power Po2 via the bypass switch 36. This reduces power loss in the DC converter circuit 34, thereby improving the efficiency of the power supply 100. Furthermore, when the DC converter circuit 34 is not operating, the power supply 100 can selectively control the DC converter circuit 34 to enter standby or hibernation mode, or even disable the DC converter circuit 34 to completely stop operation.

[0065] Please refer to Figure 4C for a circuit block diagram of the fourth embodiment of the output control circuit of the present disclosure, and refer to Figures 2A to 4B in conjunction. The difference between Figure 4C and Figure 4A is that the coupling relationship between the DC conversion circuit 34 and the switch circuit 32 in Figure 4C is slightly different from that in Figure 4A. Specifically, in Figure 4C, the switch circuit 32 and the DC conversion circuit 34 are connected in parallel. That is, one end of the switch circuit 32 is coupled to one end of the DC conversion circuit 34 and the first output terminal A, and the other end of the switch circuit 32 is coupled to the other end of the DC conversion circuit 34 and the second output terminal B. In addition, the switch circuit 32 acts as the bypass switch 36 in Figure 4B. That is, in addition to providing the operation of Figure 4A, the switch circuit 32 in Figure 4C is selectively turned on in response to the difference between the output voltage Vo and the auxiliary voltage Va to replace the function of the bypass switch 36, thereby saving circuit costs.

[0066] Please refer to Figure 4D for a block diagram of a fifth embodiment of the output control circuit of the present disclosure, which is also referred to in conjunction with Figures 2A to 4C. Figure 4D differs from Figure 4A in that the switch circuit is integrated into the DC converter circuit 34 and serves as a protection switch 38 for the DC converter circuit 34. Protection switch 38 functions similarly to protection switch 40 in Figure 3A, primarily serving as an isolation switch for the output of the DC converter circuit 34. It also primarily controls whether power flows through the second output power source Po2 or the second auxiliary power source Pa2 by controlling its on / off state.

[0067] Please refer to FIG5 for a block diagram of a sixth embodiment of the output control circuit of the present disclosure, with reference also to FIG2A through FIG4D. FIG5 differs from FIG3A in that the output control circuit 3 includes a three-terminal switch SW, which comprises a first terminal, a second terminal, and a third terminal. The first terminal is coupled to the first output terminal A, the second terminal is coupled to the second output terminal B, and the third terminal is coupled to the auxiliary power circuit 2 via the third output terminal C. The three-terminal switch SW operates similarly to the one described in FIG2A , selectively connecting the first output terminal A to the second output terminal B or connecting the third output terminal C to the second output terminal B to provide power to the critical load Load_C and the non-critical load Load_NC, respectively. It is worth noting that, in one embodiment, the three-terminal switch SW can be replaced by two complementary on / off transistors, but this is not limiting. Any switch with the same technical effect is intended to be included within the scope of this embodiment.

[0068] Please refer to Figure 6A for a load allocation curve diagram of the first embodiment of the hybrid power supply mode of the present disclosure, and Figure 6B for a load allocation curve diagram of the second embodiment of the hybrid power supply mode of the present disclosure, and refer to Figures 2A to 5 in conjunction. Specifically, in addition to executing the above-mentioned operating method, the power supply 100 of the present disclosure can also provide load allocation operations in the hybrid power supply mode. Under the hybrid power supply mode, the power supply 100 can achieve efficient current conversion by setting voltage parameters. Specifically, in Figure 6, the horizontal axis is the demand current In required to be supplied by the non-critical load Load_NC, and the vertical axis is the output current (Im, Ia) of the conversion circuit 1 and the auxiliary power supply circuit 2 respectively. In the hybrid power supply mode, the control module 4 can provide a control signal to communicate with the conversion circuit 1 and the auxiliary power supply circuit 2 based on the demand current In of the non-critical load Load_NC, so as to inform the conversion circuit 1 and the auxiliary power supply circuit 2 to adjust the output current (Im, Ia) required to be provided by each. Therefore, after receiving control signals from control module 4, the controllers of conversion circuit 1 and auxiliary power circuit 2 adjust their output currents (Im, Ia) accordingly to achieve hybrid power supply for non-critical load Load_NC. Thus, in hybrid power supply mode, non-critical load Load_NC can be powered by both conversion circuit 1 and auxiliary power circuit 2.

[0069] Therefore, referring to FIG. 6A, when the required demand current In of the non-critical load Load_NC is below half load of the auxiliary power supply circuit 2 (assuming half load is 1.5 A), the demand current In can be provided by the main conversion circuit 1 to meet the requirement of high efficiency. Conversely, when the required demand current In of the non-critical load Load_NC is above half load (taking 2.5 A as an example), the conversion circuit 1 provides a first output current Im of 2 A, and the auxiliary power supply circuit 2 provides a second output current Ia of 0.5 A, and so on, which will not be elaborated here. In addition, referring to FIG. 6B, the power supply 100 can adjust the curve slope of the output currents (Im, Ia) according to actual requirements, so as to adjust the efficiency of the power supply 100 according to the adjustment of the curve slope, and further optimize the overall efficiency of the power supply 100.

[0070] Referring back to FIGS. 2A to 6B, they show various implementation modes and operation modes of the output control circuit 3, and each implementation mode can be selectively combined and applied so that the characteristics and technical effects of each implementation mode can be combined with each other. For example but not limited to, the operation mode of extending the holding time can be combined with the operation mode of peak power, so that the power supply 100 can simultaneously have the characteristics and technical effects of improving the holding time and providing peak power. For example, Table 2 below schematically shows the application of the architecture of FIG. 4B and summarizes the operation modes of each implementation mode of the output control circuit 3. Wherein, Vo is the output voltage Vo of the conversion circuit 1 (preset), and Va is the auxiliary voltage Va of the auxiliary power supply circuit 2 (preset). When Vo = Va, the bypass switch 36 can be turned on, so that the first output power Po1 or the first auxiliary power Pa1 can be provided to the other party through the path of the switch circuit 32 and the bypass switch 36. For example but not limited to, when the power supply 100 desires to operate in the high-efficiency output mode and Vo < Va, the DC conversion circuit 34 operates in the boost mode, and the output voltage Vo is provided to the DC conversion circuit 34 through the first output terminal A for conversion, and is provided to the second output terminal B through the switch circuit 32. And so on, which will not be elaborated here.

[0071] Table 2: Operation modes of the output control circuit under each operation mode in the circuit architecture of FIG. 4B.

[0072] Please refer to FIG7 for a flow chart of the load allocation method of the power supply disclosed herein, and refer to FIG2A to FIG6B in conjunction. The load allocation method disclosed herein is primarily applicable to the power supply 100 shown in FIG2A , wherein the power supply 100 is configured to supply power to a critical load, Load_C, via a first output terminal A. The power supply 100 is also configured to supply power to a non-critical load, Load_NC, via a second output terminal B. The load allocation method includes controlling a conversion circuit to convert a DC power source into a first output power source, and controlling an auxiliary power supply circuit to convert the DC power source into a first auxiliary power source ( S100 ). Then, determining whether the conversion circuit is operating normally and whether the first output power source has sufficient power ( S200 ). In a preferred embodiment, the control module 4 detects the conversion circuit 1 to determine whether the conversion circuit 1 is operating normally and whether the first output power source Po1 has sufficient power. If the conversion circuit 1 is operating normally and the first output power source Po1 has sufficient power, the first output terminal and the second output terminal are connected, so that the conversion circuit provides a second auxiliary power source to the second output terminal ( S220 ). When the first output terminal A and the second output terminal B are connected, the conversion circuit 1 can provide the second auxiliary power Pa2 to the second output terminal B via the path from the first output terminal A to the second output terminal B of the output control circuit 3. In this way, the non-critical load Load_NC can be powered by the second auxiliary power Pa2, and the load borne by the auxiliary power circuit 2 can be transferred to the high-efficiency conversion circuit 1 under the control of the output control circuit 3.

[0073] On the other hand, it is determined that the conversion circuit is operating normally and the first output power supply has no margin (S300). When the conversion circuit 1 is operating normally and the first output power supply Po1 has no margin, the second output terminal and the auxiliary power circuit are connected, so that the auxiliary power circuit provides the first auxiliary power supply to the second output terminal (S320). When the second output terminal B is connected to the output terminal of the auxiliary power circuit 2 (i.e., the third output terminal C), the auxiliary power circuit 2 provides the first auxiliary power supply Pa1 to the second output terminal B through the output control circuit 3, so that the non-critical load Load_NC can be powered by the first auxiliary power supply Pa1. Through the operation of the power supply 100 in the high-efficiency output mode described above, the load borne by the auxiliary power circuit 2 is transferred to the high-efficiency conversion circuit 1 under the control of the output control circuit 3, thereby achieving the technical effect of reducing the loop loss of the power supply 100, improving the power density and improving the efficiency. It is worth mentioning that in one embodiment, the detailed process flow of the operating method of the power supply 100 not described in Figure 7 of the present disclosure can be referred to in conjunction with Figures 2A to 6B and will not be repeated here.

[0074] [Technical Solution 2: Electromagnetic Interference Suppression]

[0075] As shown in FIG8 , the power supply device PSU_S usually includes a plurality of power supplies 100 connected in parallel, which may cause electromagnetic interference (EMI) or harmonic distortion problems of the plurality of power supplies 100 and their standby power supplies. Specifically, since the power supply device PSU_S includes a plurality of power supplies 100 connected in parallel, it may cause the superposition of overall noise harmonics, causing troubles for the entire system of the power supply device PSU_S and its applications. The reason is that, assuming that the operating frequency of a single power supply 100 is 100kHz, since the plurality of power supplies 100 of the power supply device PSU_S all operate at the same frequency, the total noise will be superimposed at the same frequency point (i.e., superimposed at 100kHz). In practice, based on the operation mode of the power supply device PSU_S on each power supply 100, the reasons for the superposition of the total noise also include the range, size, and controller parameters of the frequency jitter, resulting in a systematic loss of the power supply device PSU_S.

[0076] Therefore, the present disclosure further transmits information about the relative position (i.e., physical position or virtual address) of each power supply 100 in the power supply device PSU_S to the system controller MCU of the power supply device PSU_S or the control module 4 of each power supply 100. For example, in FIG8 , it is assumed that the frame of the power supply device PSU_S is a physical cabinet 5 and includes a plurality of accommodating spaces 5 - 1 to 5 - 6 (e.g., but not limited to, slots) for inserting each power supply 100. Furthermore, the system controller MCU of the power supply device PSU_S can determine whether the accommodating spaces 5-1 to 5-6 contain power supplies 100 by means of detection (for example, but not limited to, determining whether a signal is a specific value, or whether a signal is actively provided to the system controller MCU, etc.), and sort the power supplies 100 in sequence (i.e., arrange them in a specific order) according to the actual positions of each power supply 100 in a specific direction (for example, but not limited to, from top to bottom) from the accommodating spaces 5-1 to 5-6. For example, if there is an empty position in the accommodating spaces 5-1 to 5-6, the position can be skipped and the sorting can continue, but the present invention is not limited thereto. Alternatively, the system controller MCU can also, for example, but not limited to, at one of the power supplies 100 When a power supply 100 is inserted into one of the storage spaces 5-1 to 5-6, a virtual address is set for the inserted power supply 100, and the power supplies 100 are sorted (i.e., arranged into a specific order) according to the order in which they were inserted. In other words, the system controller MCU can set multiple virtual addresses based on the order in which the power supplies 100 were inserted, and the system controller MCU arranges the power supplies 100 into a specific order according to the order of the virtual addresses. The system controller MCU can communicate with the control modules 4 of each power supply 100 by coupling to them, and can control each power supply 100 by providing control commands CL to the control modules 4. In this way, the control modules 4 can perform corresponding control according to the instructions of the system controller MCU.

[0077] After the specific sequence is completed, the system controller MCU can communicate with the control modules 4 of each power supply 100 by means of communication to stagger the operating frequencies of each power supply 100. In this way, the noise accumulation at the system level can be reduced. Specifically, as shown in Figures 9A to 9C, the power supply device PSU_S can fine-tune the operating frequencies of each power supply 100 to be inconsistent. Therefore, in Figure 9A, the system controller MCU arranges the power supplies 100-1 to 100-6 in a specific order according to the actual positions from top to bottom of the accommodating spaces 5-1 to 5-6, and sets different operating frequencies of the power supplies 100-1 to 100-6 according to the specific order (for example, but not limited to, operating frequencies of different sequence levels such as 100kHz, 101kHz, 102kHz, and so on). In this way, the operating frequencies of the power supplies 100-1 to 100-6 can be staggered, preventing multiple power supplies 100 from all operating at the same frequency, which would result in the sum of their noise being superimposed at the same frequency. This can further reduce system-level noise accumulation and suppress electromagnetic interference. It is worth noting that in one embodiment, the above example uses an increasing sequence number as an example. However, the sequence number can also be implemented in a decreasing manner (for example, but not limited to, operating frequencies with different sequence numbers such as 100kHz, 99kHz, 98kHz, and so on).

[0078] In FIG9B , the system controller MCU arranges the power supplies 100 - 1 to 100 - 6 in a specific order according to the virtual addresses set for each power supply 100 , and sets the power supplies 100 - 1 to 100 - 6 to a frequency jittering operation according to the specific order, and sets the frequency jittering ranges of their operating frequencies to different values ​​(for example, but not limited to, 100 ± 2 kHz, 100 ± 4 kHz, 100 ± 6 kHz, etc., in increasing order. Other embodiments not shown in the figure can be deduced from the same and are not further described here). In this way, a technical effect similar to that of the power supply device PSU_S in FIG9A can be achieved. In FIG9C , the system controller MCU arranges the power supplies 100 - 1 to 100 - 6 in a specific order according to the actual positions of the accommodation spaces 5 - 1 to 5 - 6 from top to bottom, and integrates the frequency adjustment methods of FIG9A and FIG9B . Specifically, the system controller MCU not only sets the different operating frequencies of the power supplies 100-1 to 100-6 in a specific sequence (i.e., different sequence levels), but also sets the frequency jitter range of the power supplies 100-1 to 100-6 based on this sequence (for example, but not limited to, 101±2kHz, 102±4kHz, 104±6kHz, etc., in increasing order. Other implementations not shown in the figure can be deduced from this and are not further described here). In this way, the frequency variation range can be expanded, making it difficult for the total noise to be superimposed at the same frequency point, thereby further reducing the system-level noise accumulation and providing better technical effects of suppressing electromagnetic interference.

[0079] In addition, referring to Figures 2A to 9C , each power supply 100-1 to 100-6 in the power supply device PSU_S of the present disclosure may include the circuit architecture shown in Figure 2A . That is, each power supply 100-1 to 100-6 includes a conversion circuit 1, an auxiliary power circuit 2, an output control circuit 3, and a control module 4. Furthermore, the first output terminal A of each power supply 100-1 to 100-6 is connected in parallel to couple to a critical load Load_C, and the second output terminal B of each power supply 100-1 to 100-6 is connected in parallel to couple to a non-critical load Load_NC. Therefore, the high-efficiency output mode, extended hold-up time mode, and peak power mode described in Figures 2A to 6B can have specific control strategies based on the architecture of the power supply device PSU_S of Figures 8 to 9C that includes multiple power supplies 100.

[0080] 10A and 10B illustrate curves showing the maximum efficiencies of the conversion circuit and auxiliary power circuit shown in FIG2A as 98% and 92%, respectively. In FIG10A and 10B , the conversion circuit 1 and auxiliary power circuit 2 of the power supply 100 exhibit different efficiencies during operation depending on the load level of the critical load Load_C (i.e., from no load to full load, 0% to 100%). These efficiencies are typically optimized at a specific load level (e.g., but not limited to, approximately 50%). Therefore, the system controller MCU can adjust the first output current Im provided by the conversion circuit 1 of each power supply 100 based on the power demand of the critical load Load_C and the first optimal efficiency of the conversion circuit 1 of each power supply 100-1 to 100-6, thereby maximizing the operating efficiency of the power supplies 100-1 to 100-6.

[0081] The optimal efficiency is essentially dynamic (as shown in Figures 10A and 10B) because the load draw of the critical load Load_C and the non-critical load Load_NC is not constant and is not determined by the power supply device PSU_S. Therefore, assuming the first output current Im of the conversion circuit 1 is 6A, 9A, and 12A, and the corresponding efficiency of the conversion circuit 1 is 97.5%, 98%, and 97.5%, respectively (as shown in Figure 10A), and as the connection trend increases / decreases, the system controller MCU will try to operate each conversion circuit 1 of the power supply device PSU_S to provide a first output current Im of 9A, so that the optimal efficiency can reach 98%. Taking the six power supply groups 100-1 to 100-6 in Figure 9A as an example, assume that the power demand of the critical load Load_C is 59A. Therefore, after calculation and allocation by the system controller MCU, the system controller MCU can distribute the 10A current IA to be provided by the first output terminals A of power supplies 100-1 to 100-5, and the 9A current IA to be provided by the first output terminal A of power supply 100-6. This allows the efficiency of power supplies 100-1 to 100-5 to reach 97.9%, and the efficiency of power supply 100-6 to reach 98%, thus maintaining high efficiency for power supplies 100-1 to 100-6.

[0082] However, if the loads of the critical load Load_C and the non-critical load Load_NC are too high, even if the conversion circuit 1 provides a first output current Im of 9A, it still cannot meet the needs of the critical load Load_C and the non-critical load Load_NC. In this case, the system controller MCU can operate the conversion circuit 1 at a higher efficiency as much as possible. Therefore, in addition to adjusting the first output current Im provided by the conversion circuit 1 of each power supply 100-1 to 100-6, the system controller MCU can also attempt to maintain the efficiency of each conversion circuit 1 at the best possible efficiency by adjusting the amount of power supplied by the conversion circuit 1 to the critical load Load_C and the non-critical load Load_NC.

[0083] Specifically, the system controller MCU can selectively control the output control circuit of at least one of the power supplies 100-1 to 100-6 to disconnect the first output terminal A and the second output terminal B based on the power requirements of the critical load Load_C and the non-critical load Load_NC and the first optimal efficiency of the conversion circuit 1 of each power supply 100-1 to 100-6, so as to maintain the efficiency of each conversion circuit 1 at the optimal efficiency as much as possible. Taking the six groups of power supplies 100-1 to 100-6 in FIG9A as an example, assuming that the power requirements of the critical load Load_C and the non-critical load Load_NC are 46.5A and 7.5A, respectively, and the total power requirement is 54A. Therefore, after calculation and allocation by the system controller MCU, the first output terminal A and the second output terminal B of the output control circuit 3 of the power supplies 100-1 to 100-5 are both connected, and the 7.5A current IA is allocated to be provided by the first output terminal A, and the 1.5A current IB is allocated to be provided by the second output terminal B. Furthermore, the first output terminal A and the second output terminal B of the output control circuit 3 of the power supply 100-6 are disconnected, and the 9A current IA is distributed to the first output terminal A. The second output terminal B of the power supply 100-6 does not provide the current IB. In this way, the conversion circuit 1 of each power supply 100-1 to 100-6 provides a first output current Im of 9A, achieving an optimal efficiency of 98% for the conversion circuit 1 (see also FIG10A ).

[0084] On the other hand, in response to certain specific total power requirements, the system controller MCU can selectively control the output control circuits 3 of the power supplies 100-1 to 100-6 to connect the first output terminals A and the second output terminals B, allocate a specific current IB to be provided by the second output terminals B, and control the first output terminal A of at least one power supply 100-1 to 100-6 to not provide current IA to maintain optimal efficiency. Taking the six groups of power supplies 100-1 to 100-6 in FIG9A as an example, assuming that the power requirements of the critical load Load_C and the non-critical load Load_NC are 45A and 9A, respectively, and the total power requirement is 54A, the system controller MCU calculates and allocates the 9A current IA to be provided by the first output terminals A of the power supplies 100-1 to 100-5, and allocates the 9A current IB to be provided by the second output terminal B of the power supply 100-6. Thus, the second output terminals B of the power supplies 100 - 1 to 100 - 5 do not provide the current IB, and the first output terminal A of the power supply 100 - 6 does not provide the current IA.

[0085] In addition to the above examples, the system controller MCU can adjust at least one of the power supplies 100-1 to 100-6 to standby, hibernation, or shutdown based on the power requirements of the critical load Load_C and the non-critical load Load_NC and the first optimal efficiency of the conversion circuit 1 of each power supply 100-1 to 100-6. Taking the six groups of power supplies 100-1 to 100-6 in Figure 9A as an example, assuming that the power requirements of the critical load Load_C and the non-critical load Load_NC are 37.5A and 7.5A respectively, and the total power requirement is 45A. Therefore, after calculation and allocation by the system controller MCU, the first output terminal A and the second output terminal B of the output control circuit 3 of the power supply 100-1 to 100-5 are both connected, and the 7.5A current IA is allocated to be provided by the first output terminal A, and the 1.5A current IB is allocated to be provided by the second output terminal B. Furthermore, since the power supplies 100-1 to 100-5 have already fully met the total power demand of 45A, the system controller MCU can adjust the power supply 100-6 to standby, hibernation, or shutdown to save power consumption of the power supply 100-6 and maintain efficient operation of the power supplies 100-1 to 100-5.

[0086] 10B , due to the poor efficiency of the auxiliary power circuit 2, the system controller MCU is forced to control the operation of the auxiliary power circuit 2 only when the first output power Po1 has insufficient power. Specifically, when the conversion circuit 1 of each power supply 100-1-100-6 is operating normally and the first output power Po1 has insufficient power (typically when the critical load Load_C is fully loaded), the system controller MCU can selectively connect the second output terminal B of each power supply 100-1-100-6 to the auxiliary power circuit 2 based on the power demand of the non-critical load Load_NC and the second optimal efficiency of the auxiliary power circuit 2 of each power supply 100-1-100-6 (see FIG. 10B ), and adjust the second output current Ia provided by the auxiliary power circuit 2 of each power supply 100-1-100-6.

[0087] Taking the six power supplies 100-1 through 100-6 in Figure 9A as an example, assume that the power demand of the critical load Load_C is 99A, and the power demand of the non-critical load Load_NC is 5A. After calculation, the system controller MCU determines that the first output current Im of each power supply 100-1 through 100-6 has reached full load, leaving no margin for the first output power Po1. Therefore, the 5A current demanded by the non-critical load Load_NC must be entirely borne by the auxiliary power circuit 2 of each power supply 100-1 through 100-6. Therefore, after calculation and allocation by the system controller MCU, the second output terminal B of the output control circuit 3 of each power supply 100-1 through 100-4 and the auxiliary power circuit 2 are connected, and the auxiliary power circuit 2 of each power supply 100-1 through 100-4 is allocated to provide 1.25A of current, so that the 1.25A of current IB is distributed to the second output terminal B of each power supply 100-1 through 100-4. In this way, the efficiency of the auxiliary power circuit 2 of power supplies 100-1 to 100-4 can reach an optimal efficiency of 92%. Since power supplies 100-1 to 100-4 have fully met the power demand of the non-critical load Load_NC (i.e., 5A), the system controller MCU can disconnect the second output terminals B of power supplies 100-5 to 100-6 from the auxiliary power circuit 2 and adjust power supplies 100-5 to 100-6 to standby, hibernation, or shutdown, thereby saving power consumption of power supplies 100-5 to 100-6 and maintaining the efficient operation of power supplies 100-1 to 100-4.

[0088] Therefore, in the high-efficiency output mode (i.e., each power supply 100-1 to 100-6 operates normally and can normally provide the first output power Po1), the system controller MCU can control the conversion circuit 1 of the power supply 100-1 to 100-6 to supply power to the critical load Load_C, and control the output control circuit 3 of the power supply 100-1 to 100-6 to selectively connect or disconnect the first output terminal A and the second output terminal B according to the optimal efficiency, so that the conversion circuit 1 of the power supply 100-1 to 100-6 selectively supplies power to the non-critical load Load_NC. It is worth mentioning that in one embodiment, for the power supply in the high-efficiency output mode, the system controller MCU has many ways to allocate power based on the power requirements of the critical load Load_C and the non-critical load Load_NC. Therefore, those skilled in the art can infer it through the above description and illustrative examples, and will not be elaborated here.

[0089] Similarly, the extended hold-up mode and peak power mode of the present disclosure operate in a similar manner to the high-efficiency output mode described above. Specifically, in the extended hold-up mode (i.e., when the first output power Po1 of each power supply 100-1 to 100-6 is not within a predetermined range), the system controller MCU can control the output control circuit 3 of at least one of the power supplies 100-1 to 100-6 to connect its own auxiliary power circuit 2 to the second output terminal B based on the second optimal efficiency of the auxiliary power circuit of each power supply 100-1 to 100-6 (as shown in FIG. 10B ), so that the auxiliary power circuit 2 of at least one of the power supplies 100-1 to 100-6 provides the second output current Ia to the second output terminal B. 9A , the six power supplies 100 - 1 to 100 - 6 are shown. Assuming that the power supply device PSU_S has just been started up and the conversion circuit 1 has not yet completed startup and is unable to supply power, resulting in the first output power Po1 of each power supply 100 - 1 to 100 - 6 not being within a predetermined range, the power demand of the non-critical load Load_NC is 5 A as an illustrative example.

[0090] Under these conditions, the system controller MCU, after calculation and allocation, connects the second output terminals B of the output control circuits 3 and the auxiliary power circuits 2 of power supplies 100-1 through 100-4, and allocates 1.25A of current IB to each of the auxiliary power circuits 2 of power supplies 100-1 through 100-4. This allows the auxiliary power circuits 2 of power supplies 100-1 through 100-4 to achieve an optimal efficiency of 92%. Furthermore, the system controller MCU disconnects the second output terminals B and the auxiliary power circuits 2 of power supplies 100-5 through 100-6, and switches power supplies 100-5 through 100-6 to standby, hibernation, or shutdown modes, thereby conserving power consumption and maintaining efficient operation of power supplies 100-1 through 100-4.

[0091] On the other hand, when the first output power Po1 of at least one of the power supplies 100-1 to 100-6 is out of a predetermined range after normal operation, this indicates that the conversion circuit 1 has entered overvoltage, overcurrent, or low voltage protection, or that the conversion circuit 1 has failed, and has entered a sleep, standby, or shutdown state. Therefore, the system controller MCU can connect the first output terminal A and the second output terminal B of the output control circuit 3 of at least one of the power supplies (assuming it is power supply 100-5), so that the auxiliary power circuit 2 of the power supply 100-5 provides the second output current Ia to the first output terminal A through its own output control circuit 3, thereby extending the maintenance time of the power supply 100-5. Furthermore, since the output terminals of power supplies 100-1 through 100-6 are coupled in parallel and share a common path forming a bus bar, if it is desired to extend the sustaining time of power supply 100-5, the output control circuit 3 of power supply 100-5 may disconnect the first output terminal A and the second output terminal B. Instead, the conversion circuits 1 of power supplies 100-1 through 100-4 and 100-6, in addition to power supply 100-5, provide the first current Im to the first output terminal A of power supply 100-5. Through the above-described method, the output capacitor (not shown) of the conversion circuit 1 of power supply 100-5 can be temporarily supplemented with additional power, thereby extending the sustaining time of the conversion circuit 1 of power supply 100-5.

[0092] Specifically, in the peak power mode (i.e., when the first output power Po1 of the power supplies 100-1 to 100-6 cannot meet the power demand of the critical load Load_C), the system controller MCU can control the auxiliary power circuit 2 of the power supplies 100-1 to 100-6 to supply power to the non-critical load Load_NC, and control the output control circuit 3 of the power supplies 100-1 to 100-6 to selectively connect the first output terminal A and the second output terminal B according to the second optimal efficiency of the auxiliary power circuit 2 of each power supply 100-1 to 100-6 (as shown in Figure 10B), so that the auxiliary power circuit 2 of the power supplies 100-1 to 100-6 selectively provides the second output current Ia to the first output terminal A.

[0093] Taking the six power supply groups 100-1 to 100-6 in FIG9A as an example, assume that the critical load Load_C requires 104A of power with a peak power requirement (99A at full load), and the non-critical load Load_NC requires 6A of power. After calculation, the system controller MCU finds that the first output current Im of each power supply 100-1 to 100-6 has reached full load output and is less than the 5A power requirement. Furthermore, the non-critical load Load_NC requires 6A. Therefore, the system controller MCU controls the auxiliary power circuit 2 of each power supply 100-1 to 100-6 to provide a second output current Ia of 1A to power the non-critical load Load_NC. Furthermore, the power requirement of the critical load Load_C that is less than 5A is also supplemented by the auxiliary power circuit 2 of each power supply 100-1 to 100-6 providing an additional second output current Ia.

[0094] Therefore, the system controller MCU can control the output control circuits 3 of the power supplies 100-1 to 100-5 to connect the first output terminal A and the second output terminal B, so that the auxiliary power circuits 2 of the power supplies 100-1 to 100-5 provide a 1A second output current Ia to the first output terminal A. Furthermore, the system controller MCU can control the output control circuit 3 of the power supply 100-6 to disconnect the first output terminal A and the second output terminal B, so that the 1A second output current Ia does not need to be provided to the first output terminal A. Therefore, the first output terminal A of the power supplies 100-1 to 100-5 is allocated to provide a current IA of 17.5A (of which 16.5A is the first output current Im and 1A is the second output current Ia), and the second output terminal B is allocated to provide a current IB of 1A (of which 1A is the second output current Ia). Furthermore, the first output terminal A of the power supply 100 - 6 is allocated to provide a current IA of 16.5 A (where 16.5 A is the first output current Im), and the second output terminal B is allocated to provide a current IB of 1 A (where 1 A is the second output current Ia).

[0095] In summary, the present disclosure can collaboratively control the control circuit 3 through the system controller MCU, and in conjunction with the output bus of the power supplies 100-1 to 100-6, multiple power supplies 100-1 to 100-6 can collaborate to jointly meet the system maintenance time and / or peak power requirements.

[0096] Furthermore, the power supply 100 of the present disclosure can also utilize the energy margin provided by one or more auxiliary power circuits 2 to selectively control one or more output control circuits 3 through the system controller MCU for collaborative control, thereby also being able to meet ITIC (Information Technology Industry Council) AC input voltage envelope specifications under control of the maintenance time.

[0097] Please refer to FIG11 for a flow chart of the operating method of the power supply device of the present disclosure, and refer to FIG9A to FIG9C in conjunction. The power supply device PSU_S of the present disclosure is mainly to avoid the superposition of overall noise harmonics caused by multiple parallel power supplies 100-1 to 100-6 operating at the same operating frequency, thereby reducing the system-level noise accumulation and suppressing electromagnetic interference. Specifically, the operating method of the power supply device of the present disclosure includes the power supply converting the input power according to the operating frequency to supply power to the critical load and the non-critical load (S400). The control module 4 of the power supply 100-1 to 100-6 can control the power factor correction circuit PFC to convert the AC input power Pin into the DC power Pdc according to the operating frequency (for example, but not limited to 100kHz), and control the conversion circuit 1 and the auxiliary power circuit 2 to convert the DC power Pdc into the first output power Po1 and the first auxiliary power Pa1 respectively.

[0098] Then, a specific order is set by communicating with each power supply (S420). The information of the relative position of each power supply 100 (which can be a physical position or a virtual address) is transmitted to the system controller MCU of the power supply device PSU_S or the control module 4 of each power supply 100. Finally, the power supplies are notified to adjust the operating frequency according to the specific order, so as to adjust the operating frequency of each power supply to be inconsistent according to the specific order (S440). After the specific order is completed, the system controller MCU can communicate with the control module 4 of each power supply 100 by means of communication to stagger the operating frequency of each power supply 100. In this way, the system-level noise accumulation can be reduced. Specifically, as shown in Figures 9A to 9C, the power supply device PSU_S can fine-tune the operating frequency of each power supply 100 to be inconsistent. It is worth mentioning that in one embodiment, the detailed operation process not described in Figure 11 can be referred to in conjunction with Figures 9A to 10B and their corresponding descriptions, and will not be repeated here.

[0099] [Technical Solution 3: Miniaturized Circuit Board Installation]

[0100] When the switch circuit 32 of Technical Solution 1 is an active switch, it is typically implemented by a control chip. Due to the differences in packaging and pin functions between different control chips, the main circuit board must be rewired to enable the output control circuit 3 to function with load adjustment. Furthermore, when the switch circuit 32 of Technical Solution 1 is a passive switch, while the issues associated with active switches are eliminated, the convenience of manufacturing the power supply 100 still needs to be considered. This means that in some models, the power supply 100 may not have the functionality of Technical Solution 1. In other models, active or passive switches may be selected based on actual needs. Therefore, depending on the model, it is not possible to simply replace the control chip or circuit components to ensure the normal operation of the output control circuit 3. The entire circuit of the power supply 100 often needs to be redesigned to meet various requirements. Furthermore, due to the limited size of the specific space within which the output control circuit 3 is located within the power supply 100, it is difficult to route the circuits of various control chips and control circuits within this specific space. Therefore, existing solutions to address the above issues are as follows:

[0101] 1. Configuring peripheral components such as a control chip from a specific manufacturer on the main circuit board of the power supply 100. However, this results in the material source being limited to using the control chip from a specific manufacturer. Once this specific control chip is unavailable, it will cause a material shortage problem.

[0102] 2. The control chip is placed on a small surface-mount device circuit board (SMD PCB) and plugged into the front surface of the power supply 100's main circuit board (i.e., the surface closest to the center of the space within the power supply housing). However, due to the high power density of the power supply 100, the space is limited, and this space is mostly required to accommodate large electronic components such as electrolytic capacitors, power inductors, and transformers, making it difficult to provide space for plugging.

[0103] Please refer to Figure 12 for a circuit diagram of the switching circuit of the present disclosure configured on a circuit board of a power supply, and refer to Figures 2A-11 in conjunction. The disclosed control chip IC serving as the switching circuit 32, or hardware required for different power supply applications based on the conversion circuit 1 or auxiliary power circuit 2, can be soldered to a small surface mount device circuit board (SMD PCB) on which the output control circuit 3 is configured, creating a modular structure. Specifically, the SMD PCB of the present disclosure is a modular structure that can be designed with different circuit configurations based on different types of control chip ICs, while maintaining the same SMD PCB dimensions. In other words, the SMD PCB has a specific configuration depending on the brand of the control chip IC. Therefore, the disclosed control chip IC can be configured on a SMD PCB of the same size using different circuit configurations for different brands. Using printed circuit board mounting (PCB mounting) technology, the SMD PCB is soldered to a specific area SA on the back side MB_B of the main circuit board MB of the power supply 100.

[0104] The main circuit board MB of the power supply 100 is used to configure the conversion circuit 1 and the auxiliary power circuit 2, and the main circuit board MB is placed on one of the inner surfaces of the housing. Therefore, the back side MB_B of the main circuit board MB is usually adjacent to the housing (not shown) of the power supply 100, and the present disclosure includes a specific area SA on the back side MB_B of the main circuit board MB. The specific area SA includes a plurality of fixed contacts Pin, and the fixed contacts Pin include at least the first output terminal A, the second output terminal B, and the third output terminal C as shown in Figure 2A. The circuit board (SMD PCB) is used to configure the output control circuit 3 and includes a plurality of pads (not shown) and a control chip IC. The control chip IC serves as the switching circuit 32 and is configured on the circuit board (SMD PCB). Solder pads are formed on a surface of the printed circuit board (SMD PCB) that aligns with the specific area SA. The solder pads are soldered to corresponding fixed contact pins on the specific area SA. This allows the solder pads at at least three fixed positions of the output control circuit 3 to be electrically connected to the first output terminal A, the second output terminal B, and the third output terminal C, thereby providing the functions of the output control circuit 3 described in Figures 2A to 7.

[0105] Furthermore, because the SMD PCB is soldered to the back surface MB_B of the main circuit board MB, forming a flat surface on the main circuit board MB, and the control chip IC is typically not a large circuit component, the SMD PCB does not contain any large circuit components (such as, but not limited to, inductors and transformers). Therefore, even if the space between the back surface MB_B of the main circuit board MB and the inner surface of the housing is narrow, the SMD PCB can still be placed in this narrow space. Furthermore, even if the control chip ICs are designed by different manufacturers and have different pins and functions, they are all placed on the same SMD PCB. Therefore, the SMD PCB circuit design ensures that, even if the control chip ICs are designed for different manufacturers with different circuit configurations, the pads on the SMD PCB have the same function (i.e., the same connection / output / input functions) and are located at positions corresponding to the fixed contact pins. This allows the SMD PCB to be attached and electrically connected to the main circuit board MB using printed circuit board mounting technology.

[0106] Therefore, regardless of the manufacturer's control chip IC, the SMD PCB can provide the ability to connect / disconnect the first and second output terminals by soldering pads to corresponding fixed contacts on the main circuit board MB. This allows the SMD PCB to be adaptably configured on the main board, improving compatibility and thereby achieving the technical effect of increasing mainboard interoperability and reducing testing and wiring time.

[0107] However, the above description is only a detailed description and drawings of the preferred specific embodiments of the present disclosure, and the features of the present disclosure are not limited thereto and are not intended to limit the present disclosure. The entire scope of the present disclosure shall be based on the scope of the patent application. All concepts that fall within the scope of the patent application of the present disclosure and embodiments with similar variations thereof shall be included in the scope of the present disclosure. Any changes or modifications that can be easily conceived by any person skilled in the art within the field of the present disclosure shall be covered by the patent scope of the present disclosure.

Claims

1. A power supply, comprising: A conversion circuit converts a DC power source into a first output power source, and is used to couple a critical load through a first output terminal, so as to provide the first output power source to power the critical load through the first output terminal; an auxiliary power supply circuit, converting the DC power supply into a first auxiliary power supply; an output control circuit coupled to the first output terminal and a second output terminal, wherein the second output terminal is used to couple to a non-critical load; Wherein, the output control circuit is used to selectively connect the first output end and the second output end, so that when the output control circuit disconnects the first output end and the second output end, the first output power supplies power to the critical load through the first output end, and when the output control circuit connects the first output end and the second output end, the first output power supplies power to the critical load and the non-critical load through the first output end and a second output end respectively.

2. The power supply as claimed in claim 1, wherein when the conversion circuit operates normally and the first output power still has margin, the output control circuit connects the first output end and the second output end, so that the conversion circuit provides a second auxiliary power to the second output end through the output control circuit; when the conversion circuit operates normally and the first output power does not have margin, the output control circuit connects the second output end and the auxiliary power circuit, so that the auxiliary power circuit provides the first auxiliary power to the second output end through the output control circuit.

3. The power supply as claimed in claim 1, wherein when the first output power is not within a predetermined range, the output control circuit connects the first output terminal and the second output terminal, so that the auxiliary power circuit provides a second output power to the first output terminal through the output control circuit to extend a maintenance time of the conversion circuit.

4. The power supply as claimed in claim 1, wherein when the first output power cannot meet a power demand of the critical load, the output control circuit connects the first output end and the second output end, so that the auxiliary power circuit provides a second output power to the first output end through the output control circuit.

5. The power supply as claimed in claim 1, wherein the output control circuit comprises: A DC conversion circuit is coupled to the first output terminal and converts the first output power into a second auxiliary power; a switch circuit coupled to the DC conversion circuit, the auxiliary power circuit and the second output terminal; When the conversion circuit operates normally and the first output power supply still has margin, the switch circuit connects the DC conversion circuit and the second output end, and the DC conversion circuit converts the first output power supply into the second auxiliary power supply; when the conversion circuit operates normally and the first output power supply does not have margin, the switch circuit connects the second output end and the auxiliary power supply circuit, so that the auxiliary power supply circuit provides the first auxiliary power supply to the second output end through the output control circuit.

6. The power supply as claimed in claim 5, wherein the output control circuit further comprises: a bypass switch connected in parallel with the DC conversion circuit; When an output voltage provided by the conversion circuit is different from an auxiliary voltage provided by the auxiliary power circuit When the output voltage is equal to the auxiliary voltage, the bypass switch is turned on, and the first output power is provided to the second output terminal through the bypass switch as the second auxiliary power.

7. A power supply as described in claim 6, wherein the DC conversion circuit is a bidirectional DC converter, and when the auxiliary voltage is higher or lower than the output voltage, the bypass switch is turned off, and the DC conversion circuit converts the first auxiliary power supply into a second output power supply; when the auxiliary voltage is equal to the output voltage, the bypass switch is turned on, and the first auxiliary power supply is provided to the first output terminal through the bypass switch as the second output power supply.

8. The power supply as claimed in claim 5, wherein the DC conversion circuit is a bidirectional DC converter, and when the first output power is not within a predetermined range or the first output power cannot meet a power demand of the critical load, the switch circuit connects the DC conversion circuit and the second output end, and the DC conversion circuit converts the first auxiliary power into a second output power to provide the second output power to the first output end.

9. The power supply as claimed in claim 5, wherein the switch circuit comprises: a switch, one end of which is coupled to the first output end, and the other end of which is coupled to the second output end; and a unidirectional conducting element, one end of which is coupled to the auxiliary power circuit, and the other end of which is coupled to the second output end; The direction of the unidirectional conducting element from the auxiliary power circuit to the second output end is forward biased. 10 . The power supply as claimed in claim 9 , wherein the switch is integrated into the DC conversion circuit and serves as an output protection switch of the DC conversion circuit.

11. The power supply as claimed in claim 10, wherein the switch circuit further comprises: a control circuit, coupling a control terminal of the switch and an output terminal of the conversion circuit; When the control circuit determines that an output voltage of the conversion circuit is higher than an undervoltage lockout value, the control circuit controls the switch to be turned on, and when the control circuit determines that the output voltage is lower than the undervoltage lockout value, the control circuit controls the switch to be turned off.

12. The power supply as claimed in claim 5, further comprising: A main circuit board is used to configure the conversion circuit and the auxiliary power circuit, and the main circuit board is placed on one of the inner surfaces of a housing, wherein a side of the main circuit board adjacent to the inner surface is a back surface, and the back surface includes: a specific area, including a plurality of fixed contacts, the plurality of fixed contacts including the first output terminal, the second output terminal and a third output terminal coupled to the auxiliary power circuit; and A circuit board, used to configure the output control circuit, and comprising: A plurality of solder pads are formed on a side of the circuit board that is in contact with the specific area, and the plurality of solder pads are used to be soldered to the plurality of fixed contacts accordingly; and A control chip, serving as the switch circuit, and disposed on the circuit board; The circuit board forms a specific configuration according to a different brand of the control chip, and the plurality of pads have the same function and form a position corresponding to the plurality of fixed contacts.

13. A power supply, comprising: A conversion circuit converts a DC power source into a first output power source and is used to couple a first output terminal to a A critical load, wherein the first output power is provided through the first output terminal to supply power to a critical load; an auxiliary power circuit, converting the DC power into a first auxiliary power; and an output control circuit coupled to the first output terminal and the auxiliary power circuit; When the first output end has a backup requirement, the output control circuit connects the first output end and the auxiliary power circuit, so that the first auxiliary power provided by the auxiliary power circuit is provided to the first output end through the output control circuit.

14. The power supply as claimed in claim 13, wherein the backup requirement is a maintenance time, and when the first output power is not within a predetermined range, the output control circuit connects the first output end and the auxiliary power circuit, so that the auxiliary power circuit provides a second output power to the first output end through the output control circuit to extend the maintenance time of the conversion circuit.

15. The power supply as claimed in claim 13, wherein the backup demand is a power demand, and when the first output power cannot meet the power demand of the critical load, the output control circuit connects the first output end and the auxiliary power circuit, so that the auxiliary power circuit provides a second output power to the first output end through the output control circuit.

16. A load allocation method for a power supply, the power supply being used to supply power to a critical load through a first output terminal and to supply power to a non-critical load through a second output terminal, the load allocation method comprising the following steps: Controlling a conversion circuit to convert a DC power supply into a first output power supply, and controlling an auxiliary power supply circuit to convert the DC power supply into a first auxiliary power supply; and (a1) determining that the conversion circuit operates normally and that the first output power supply has a margin; (a2) connecting the first output terminal and the second output terminal so that the conversion circuit provides a second auxiliary power supply to the second output terminal; and (b1) determining that the conversion circuit operates normally and the first output power has no margin; and (b2) connecting the second output terminal and the auxiliary power circuit so that the auxiliary power circuit provides the first auxiliary power to the second output terminal.

17. The load allocation method according to claim 16, further comprising the following steps: (c1) determining that the first output power is not within a predetermined range; (c2) connecting the first output terminal and the second output terminal so that the auxiliary power circuit provides a second output power to the first output terminal; (c3) determining that a maintenance time has been reached; and (c4) Disconnecting the first output terminal and the second output terminal.

18. The load allocation method according to claim 16, further comprising the following steps: (d1) determining that the first output power source cannot meet a power demand of the critical load; and (d2) connecting the first output terminal and the second output terminal so that the auxiliary power circuit provides a second output power to the first output terminal.

19. The load allocation method according to claim 16, further comprising the following steps: (e1) obtaining a judgment result; (e2) controlling a DC conversion circuit to convert the first output power into the second auxiliary power according to the determination result; or (e2) controlling the DC conversion circuit to convert the first auxiliary power supply into a second output power supply according to the determination result.

20. The load allocation method according to claim 16, further comprising the following steps: (f1) determining that an output voltage provided by the conversion circuit does not match an auxiliary voltage provided by the auxiliary power circuit; and (f12) controlling a DC conversion circuit to convert the first output power into the second auxiliary power, or controlling a DC conversion circuit to convert the first auxiliary power into a second output power; or (f2) determining that the output voltage is equal to the auxiliary voltage; and (f22) providing the first output power as the second auxiliary power to the second output terminal, or providing the first auxiliary power as the second output power to the first output terminal.

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