Power conversion device

The power conversion device simplifies control by setting a second dead time period and using synchronized control signals to achieve zero voltage soft switching, addressing complexity and efficiency issues in existing devices.

WO2025070153A1PCT designated stage expired Publication Date: 2025-04-03PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO LTD
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Patent Information

Application Number
PCT/JP2024/033037
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-09-29
Filing Date
2024-09-17
Publication Date
2025-04-03

AI Technical Summary

Technical Problem

Existing power conversion devices require complex control mechanisms to achieve zero voltage soft switching, leading to increased size and complexity of the control device due to the need to generate multiple control signals for multiple switches.

Method used

A power conversion device with a configuration that includes a power conversion circuit with series-connected first and second switching elements, resonance capacitors, and a resonant inductor, where a control device sets a second dead time period by adding a predetermined time to a first dead time period to prevent overlap of switching element on-periods, and a signal generating circuit generates control signals to synchronize switching operations, allowing for zero voltage soft switching without direct control of multiple switches.

Benefits of technology

The solution enables reliable zero voltage soft switching with reduced complexity in the control device by simplifying the control mechanism, suppressing simultaneous resonant currents, and minimizing heat generation and switch losses.

✦ Generated by Eureka AI based on patent content.

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Abstract

According to the present invention, a control device performs soft switching more reliably without directly controlling a plurality of switches for zero-voltage soft switching. A control device (51) sets a second dead time period between the high-level period of a first control signal to a first switching element (1) and the high-level period of the first control signal to a second switching element (2), said second dead time period being obtained by adding a predetermined time to a preset first dead time period. A signal generation circuit (52) generates a second control signal having a high-level period corresponding to the second dead time period. Upon determining that two-phase resonance currents corresponding to two switching circuits (10) among a plurality of switching circuits (10) simultaneously flow through a resonance inductor (L1), the control device (51) performs a control to shift the on-period of each of the first switching element (1) and the second switching element (2) in one switching circuit (10) among the two switching circuits (10).
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Description

Power Conversion Device

[0001] The present disclosure relates to a power conversion device, and more particularly to a power conversion device capable of converting DC power into AC power.

[0002] Patent Document 1 discloses a power conversion system.

[0003] The power conversion system (power conversion device) disclosed in Patent Document 1 includes a main switching means (power conversion circuit), two capacitors, one coil (resonant inductor), multiple auxiliary switching elements, and a controller. The main switching means is composed of a pair of main switching elements connected in series between both terminals of a DC power supply, and a main switching circuit is provided for each phase of the multi-phase AC, with the interconnection point of the pair of main switching elements serving as the output point for each phase. The two capacitors divide the voltage of the DC power supply. One end of the coil is connected to the voltage division point between the two capacitors. The multiple auxiliary switching elements connect the other end of the coil to the output points for each phase. The controller generates a control signal (first control signal) for PWM control of each main switching element and outputs it to the gate of each main switching element. The controller also generates a control signal (second control signal) for controlling the on / off of each auxiliary switching element and outputs it to the gate of each auxiliary switching element. When the controller determines that multiple phase currents flow through the coil, it controls the multiple auxiliary switch elements so that the current flowing through at least one phase is smaller than a preset value.

[0004] JP 2010-233306 A

[0005] In the power conversion system (power conversion device) disclosed in Patent Document 1, the controller needs to generate and output a plurality of first control signals and a plurality of second control signals, which results in an increase in the size of the controller.

[0006] Furthermore, in the power conversion device described in Patent Document 1, when the control means determines that multiple phase currents are flowing through the coil, it controls multiple auxiliary switch elements so that the current flowing through at least one phase is smaller than a preset magnitude, and therefore soft switching of the main switch corresponding to the at least one phase is not performed.

[0007] An object of the present disclosure is to provide a power conversion device that can perform soft switching more reliably without directly controlling a plurality of switches for zero voltage soft switching in a control device.

[0008] A power conversion device according to one aspect of the present disclosure includes a first DC terminal and a second DC terminal, a power conversion circuit, multiple AC terminals, multiple switches, multiple resonant capacitors, a resonant inductor, a regenerative capacitor, a control device, and a signal generating circuit. The power conversion circuit includes multiple first switching elements and multiple second switching elements. In the power conversion circuit, multiple switching circuits, each of which has the multiple first switching elements and the multiple second switching elements connected in series in a one-to-one relationship, are connected in parallel to each other. In the power conversion circuit, the multiple first switching elements are connected to the first DC terminals. In the power conversion circuit, the multiple second switching elements are connected to the second DC terminals. The multiple AC terminals correspond one-to-one to the multiple switching circuits. Each of the multiple AC terminals is connected to a connection point between the first switching element and the second switching element in a corresponding one of the multiple switching circuits, through which a load current flows. The multiple switches correspond one-to-one to the multiple switching circuits. Each of the plurality of switches has a first end connected to the connection point between the first switching element and the second switching element in a corresponding switching circuit among the plurality of switching circuits, and a second end connected to a common connection point. The plurality of resonant capacitors correspond one-to-one to the plurality of switches. Each of the plurality of resonant capacitors is connected between the first end and the second DC terminal of a corresponding switch among the plurality of switches. The resonant inductor has a third end and a fourth end. The third end of the resonant inductor is connected to the common connection point. The regenerative capacitor has a fifth end and a sixth end. The fifth end of the regenerative capacitor is connected to the second DC terminal, and the sixth end is connected to the fourth end of the resonant inductor. The control device provides each of the plurality of first switching elements and the plurality of second switching elements with a first control signal whose potential changes between a high level and a low level. The signal generating circuit provides each of the plurality of switches with a second control signal whose potential changes between a high level and a low level.The control device sets, for each of the plurality of switching circuits, a second dead time period by adding a predetermined time to a predetermined first dead time period so that on periods of the first switching element and the second switching element do not overlap between a high-level period of the first control signal to the first switching element and a high-level period of the first control signal to the second switching element. The predetermined time period is determined based on the current value of the load current, the inductance of the resonant inductor, and the voltage value of the regenerative capacitor. The signal generating circuit generates, for each of the plurality of switches, the second control signal having a high-level period corresponding to the second dead time period for a corresponding switching circuit among the plurality of switching circuits. When the control device determines that two-phase resonant currents corresponding to two switching circuits among the plurality of switching circuits simultaneously flow through the resonant inductor, the control device controls to shift the on periods of the first switching element and the second switching element in one of the two switching circuits.

[0009] The power conversion device of the present disclosure has an advantage that it is possible to more reliably perform soft switching without directly controlling a plurality of switches for zero voltage soft switching in a control device.

[0010] FIG. 1 is a circuit diagram of a system including a power conversion device according to a first embodiment. FIG. 2 is a circuit block diagram of a signal generating circuit in the power conversion device according to the first embodiment. FIG. 3 is a diagram illustrating time variations in duty and load current corresponding to voltage commands for each of three phases in an AC load connected to multiple AC terminals of the power conversion device according to the first embodiment. FIG. 4 is a timing chart for explaining the operation of the power conversion device according to the first embodiment. FIG. 5 is a timing chart for explaining the operation of the power conversion device according to the first embodiment. FIG. 6 is a timing chart for explaining the operation of the power conversion device according to the first embodiment. FIG. 7 is a diagram illustrating the operation of the power conversion device according to the first embodiment when the load current of the U phase is positive. FIG. 8 is a diagram illustrating the operation of the power conversion device according to the first embodiment during a first period. FIG. 9 is a diagram illustrating the operation of the power conversion device according to the first embodiment during a second period. FIG. 10 is a diagram illustrating the operation of the power conversion device according to the first embodiment during a third period. FIG. 11 is a diagram illustrating the operation of the power conversion device according to the first embodiment when the polarity of the load current of the U phase is negative. FIG. 12 is a timing chart for explaining an overlap time when two-phase resonant currents overlap in the power conversion device according to the first embodiment. FIG. 13 is a timing chart for explaining the operation of the power conversion device according to the first embodiment. FIG. 14 is a timing chart for explaining the operation of the power conversion device according to the first embodiment. FIG. 15 is a circuit diagram of a system including the power conversion device according to the second embodiment. FIG. 16 is a diagram for explaining the operation of the power conversion device according to the second embodiment when the U-phase load current is positive. FIG. 17 is a diagram for explaining the operation of the power conversion device according to the second embodiment during a third period. FIG. 18 is a diagram for explaining the operation of the power conversion device according to the second embodiment when the polarity of the U-phase load current is negative. FIG. 19 is a timing chart for explaining the operation of the power conversion device according to the second embodiment. FIG. 20 is a timing chart for explaining the operation of the power conversion device according to the third embodiment. FIG. 21 is a circuit diagram of a system including the power conversion device according to the fourth embodiment. FIG. 22 is a diagram for explaining the operation of the power conversion device according to the fourth embodiment when the polarity of the U-phase load current is positive.FIG. 23 is a diagram illustrating the operation of the power conversion device according to the fourth embodiment when the polarity of the U-phase load current is negative. FIG. 24 is a timing chart illustrating the operation of the power conversion device according to the fourth embodiment. FIG. 25 is a circuit diagram of a system including the power conversion device according to the fifth embodiment. FIG. 26 is a diagram illustrating the operation of the power conversion device according to the fifth embodiment when the polarity of the U-phase load current is positive. FIG. 27 is a diagram illustrating the operation of the power conversion device according to the fifth embodiment when the polarity of the U-phase load current is negative. FIG. 28 is a timing chart illustrating the operation of the power conversion device according to the fifth embodiment. FIG. 29 is a timing chart illustrating the operation of the power conversion device according to the sixth embodiment. FIG. 30 is a timing chart illustrating the operation of the power conversion device according to the seventh embodiment. FIG. 31 is a timing chart illustrating the operation of the power conversion device according to the eighth embodiment. FIG. 32 is a timing chart illustrating the operation of the power conversion device according to the ninth embodiment. FIG. 33 is a timing chart illustrating the operation of the power conversion device according to the tenth embodiment. FIG. 34 is a timing chart illustrating the operation of the power conversion device according to the eleventh embodiment. Fig. 35 is a timing chart for explaining the operation of the power conversion apparatus according to the twelfth embodiment. Fig. 36 is a timing chart for explaining the operation of the power conversion apparatus according to the thirteenth embodiment. Fig. 37 is a circuit diagram of a system including the power conversion apparatus according to the fourteenth embodiment. Fig. 38 is a circuit diagram of a system including the power conversion apparatus according to the fifteenth embodiment. Fig. 39 is a circuit diagram of a system including the power conversion apparatus according to the sixteenth embodiment. Fig. 40 is a circuit diagram of a system including the power conversion apparatus according to the seventeenth embodiment. Fig. 41 is a circuit diagram of a system including the power conversion apparatus according to the eighteenth embodiment. Fig. 42 is a circuit diagram of a system including the power conversion apparatus according to the nineteenth embodiment. Fig. 43 is a circuit diagram of a system including the power conversion apparatus according to the twentieth embodiment.

[0011] First Embodiment A power conversion device 100 according to a first embodiment will be described below with reference to FIGS. 1 to 14. FIG.

[0012] (1) Overall Configuration of the Power Conversion Device FIG. 1 is a circuit diagram of a system including a power conversion device 100 according to the first embodiment. As shown in FIG. 1 , the power conversion device 100 includes, for example, a first DC terminal 31, a second DC terminal 32, and multiple (e.g., three) AC terminals 41. A DC power source E1 is connected between the first DC terminal 31 and the second DC terminal 32, and an AC load RA1 is connected to the multiple AC terminals 41. The AC load RA1 is, for example, a three-phase servo motor. The power conversion device 100 converts DC output from the DC power source E1 into AC power and outputs it to the AC load RA1. The DC power source E1 includes, for example, a solar cell or a fuel cell. The DC power source E1 may also include a DC-DC converter. In the power conversion device 100, when the multiple AC terminals 41 are three AC terminals 41, the AC power is, for example, three-phase AC power having a U phase, a V phase, and a W phase.

[0013] The power conversion device 100 includes a power conversion circuit 11, a plurality of (e.g., three) switches 8, a plurality of (e.g., three) resonant capacitors 9, a resonant inductor L1, a regenerative capacitor 15, a control device 51, and a signal generation circuit 52. Each of the plurality of switches 8 is, for example, a bidirectional switch. The power conversion device 100 also includes a first clamp diode 13 and a second clamp diode 14.

[0014] The power conversion circuit 11 has a plurality of (e.g., three) first switching elements 1 and a plurality of (e.g., three) second switching elements 2. In the power conversion circuit 11, a plurality of (e.g., three) switching circuits 10, each having a plurality of first switching elements 1 and a plurality of second switching elements 2 connected in series in a one-to-one relationship, are connected in parallel to each other. In the power conversion circuit 11, the plurality of first switching elements 1 are connected to first DC terminals 31, and the plurality of second switching elements 2 are connected to second DC terminals 32.

[0015] The plurality of AC terminals 41 correspond one-to-one to the plurality of switching circuits 10. Each of the plurality of AC terminals 41 is connected to a connection point 3 of the first switching element 1 and the second switching element 2 in the corresponding switching circuit 10.

[0016] The multiple switches 8 correspond one-to-one to the multiple switching circuits 10. Each of the multiple switches 8 has a first end 81 and a second end 82. The first end 81 of each of the multiple switches 8 is connected to a connection point 3 between a first switching element 1 and a second switching element 2 in a corresponding one of the multiple switching circuits 10.

[0017] The plurality of resonance capacitors 9 correspond one-to-one to the plurality of switches 8. Each of the plurality of resonance capacitors 9 is connected between the first end 81 of the corresponding switch 8 among the plurality of switches 8 and the second DC terminal 32.

[0018] The resonance inductor L1 has a third end and a fourth end. The third end of the resonance inductor L1 is connected to the second end 82 of a corresponding one of the multiple switches 8 (three switches 8 in the first embodiment).

[0019] The regenerative capacitor 15 has a fifth end 153 and a sixth end 154. In the regenerative capacitor 15, the fifth end 153 is connected to the second DC terminal 32, and the sixth end 154 is connected to the fourth end of the resonant inductor L1.

[0020] The control device 51 provides a first control signal to each of the plurality of first switching elements 1 and the plurality of second switching elements 2 .

[0021] The signal generating circuit 52 provides a second control signal to each of the plurality of switches 8 .

[0022] (2) Details of the Power Conversion Device Hereinafter, for convenience of explanation, the switching circuits 10 corresponding to the U phase, V phase, and W phase of the multiple switching circuits 10 may be referred to as switching circuit 10U, switching circuit 10V, and switching circuit 10W, respectively. Hereinafter, the first switching element 1 and the second switching element 2 of switching circuit 10U may be referred to as first switching element 1U and second switching element 2U. Hereinafter, the first switching element 1 and the second switching element 2 of switching circuit 10V may be referred to as first switching element 1V and second switching element 2V. Hereinafter, the first switching element 1 and the second switching element 2 of switching circuit 10W may be referred to as first switching element 1W and second switching element 2W. In the following, the connection point 3 between the first switching element 1U and the second switching element 2U will be referred to as connection point 3U, the connection point 3 between the first switching element 1V and the second switching element 2V will be referred to as connection point 3V, and the connection point 3 between the first switching element 1W and the second switching element 2W will be referred to as connection point 3W. In the following, the AC terminal 41 connected to connection point 3U will be referred to as AC terminal 41U, the AC terminal 41 connected to connection point 3V will be referred to as AC terminal 41V, and the AC terminal 41 connected to connection point 3W will be referred to as AC terminal 41W. In the following, the resonant capacitor 9 connected in parallel to the second switching element 2U will be referred to as resonant capacitor 9U, the resonant capacitor 9 connected in parallel to the second switching element 2V will be referred to as resonant capacitor 9V, and the resonant capacitor 9 connected in parallel to the second switching element 2W will be referred to as resonant capacitor 9W. In the following, the switch 8 connected to connection point 3U may be referred to as switch 8U, the switch 8 connected to connection point 3V may be referred to as switch 8V, and the switch 8 connected to connection point 3W may be referred to as switch 8W.

[0023] In the power conversion device 100, for example, a high-potential output terminal (positive electrode) of the DC power supply E1 is connected to the first DC terminal 31, and a low-potential output terminal (negative electrode) of the DC power supply E1 is connected to the second DC terminal 32. In addition, in the power conversion device 100, for example, a U-phase terminal, a V-phase terminal, and a W-phase terminal of the AC load RA1 are connected to three AC terminals 41U, 41V, and 41W, respectively.

[0024] In the power conversion circuit 11, each of a plurality of (three in the example of FIG. 1 ) first switching elements 1 and a plurality of (three in the example of FIG. 1 ) second switching elements 2 has a control terminal, a first main terminal, and a second main terminal. The control terminals of the plurality of first switching elements 1 and the plurality of second switching elements 2 are connected to a control device 51. In each of the plurality of switching circuits 10 of the power conversion device 100, a first main terminal of the first switching element 1 is connected to a first DC terminal 31, a second main terminal of the first switching element 1 is connected to a first main terminal of the second switching element 2, and a second main terminal of the second switching element 2 is connected to a second DC terminal 32. In each of the plurality of switching circuits 10, the first switching element 1 is a high-side switching element (P-side switching element), and the second switching element 2 is a low-side switching element (N-side switching element). Each of the plurality of first switching elements 1 and the plurality of second switching elements 2 is, for example, an IGBT (Insulated Gate Bipolar Transistor). Therefore, the control terminal, the first main terminal and the second main terminal of each of the plurality of first switching elements 1 and the plurality of second switching elements 2 are the gate terminal, the collector terminal and the emitter terminal, respectively.

[0025] The power conversion circuit 11 further includes a plurality of (three) first diodes 4 connected in anti-parallel to the plurality of (three) first switching elements 1 in a one-to-one relationship, and a plurality of (three) second diodes 5 connected in anti-parallel to the plurality of (three) second switching elements 2 in a one-to-one relationship. In each of the plurality of first diodes 4, the anode of the first diode 4 is connected to the second main terminal (emitter terminal) of the first switching element 1 corresponding to the first diode 4, and the cathode of the first diode 4 is connected to the first main terminal (collector terminal) of the first switching element 1 corresponding to the first diode 4. In each of the plurality of second diodes 5, the anode of the second diode 5 is connected to the second main terminal (emitter terminal) of the second switching element 2 corresponding to the second diode 5, and the cathode of the second diode 5 is connected to the first main terminal (collector terminal) of the second switching element 2 corresponding to the second diode 5.

[0026] A connection point 3U between the first switching element 1U and the second switching element 2U is connected to, for example, the U-phase terminal of the AC load RA1 via an AC terminal 41U. A connection point 3V between the first switching element 1V and the second switching element 2V is connected to, for example, the V-phase of the AC load RA1 via an AC terminal 41V. A connection point 3W between the first switching element 1W and the second switching element 2W is connected to, for example, the W-phase of the AC load RA1 via an AC terminal 41W.

[0027] The plurality of resonant capacitors 9 correspond one-to-one to the plurality of switches 8. Each of the plurality of resonant capacitors 9 is connected between the first end 81 and the second DC terminal 32 of the corresponding switch 8. The power conversion device 100 has a plurality of resonant circuits. Each of the plurality of resonant circuits includes a resonant capacitor 9 and a resonant inductor L1.

[0028] Each of the multiple switches 8 has a third switching element 6 and a fourth switching element 7. Each of the multiple (three in the example of FIG. 1 ) third switching elements 6 and the multiple (three in the example of FIG. 1 ) fourth switching elements 7 has a control terminal, a first main terminal, and a second main terminal. The control terminals of the multiple third switching elements 6 and the multiple fourth switching elements 7 are connected to the signal generating circuit 52. Each of the multiple third switching elements 6 and the multiple fourth switching elements 7 is, for example, an IGBT. Therefore, the control terminal, the first main terminal, and the second main terminal of each of the multiple third switching elements 6 and the multiple fourth switching elements 7 are a gate terminal, a collector terminal, and an emitter terminal, respectively. In each of the multiple switches 8, the third switching element 6 and the fourth switching element 7 are connected in anti-series. In each of the multiple switches 8, the first main terminal (collector terminal) of the third switching element 6 and the first main terminal (collector terminal) of the fourth switching element 7 are connected. In each of the switches 8, the second main terminal (emitter terminal) of the third switching element 6 is connected to the connection point 3 of a corresponding one of the switching circuits 10, and the second main terminal (emitter terminal) of the fourth switching element 7 is connected to the resonance inductor L1. Each of the switches 8 further includes a diode 61 connected in anti-parallel to the third switching element 6 and a diode 71 connected in anti-parallel to the fourth switching element 7.

[0029] In the power conversion device 100, the switch 8U is connected to a connection point 3U between the first switching element 1U and the second switching element 2U. The switch 8V is connected to a connection point 3V between the first switching element 1V and the second switching element 2V. The switch 8W is connected to a connection point 3W between the first switching element 1W and the second switching element 2W. Hereinafter, for convenience of explanation, the third switching element 6 and the fourth switching element 7 of the switch 8U will be referred to as the third switching element 6U and the fourth switching element 7U, the third switching element 6 and the fourth switching element 7 of the switch 8V will be referred to as the third switching element 6V and the fourth switching element 7V, and the third switching element 6 and the fourth switching element 7 of the switch 8W will be referred to as the third switching element 6W and the fourth switching element 7W, respectively.

[0030] The multiple switches 8 are controlled by the signal generating circuit 52. In other words, the third switching element 6U, the fourth switching element 7U, the third switching element 6V, the fourth switching element 7V, the third switching element 6W, and the fourth switching element 7W are controlled by the signal generating circuit 52.

[0031] The resonant inductor L1 has a third end and a fourth end. The third end of the resonant inductor L1 is connected to the second ends 82 of the multiple switches 8. In the first embodiment, the third end of the resonant inductor L1 is connected to a common connection point 25 to which the second ends 82 of the multiple switches 8 are connected. The fourth end of the resonant inductor L1 is connected to a sixth end 154 of the regenerative capacitor 15.

[0032] The regenerative capacitor 15 is connected between the fourth end of the resonance inductor L1 and the second DC terminal 32. The regenerative capacitor 15 is, for example, a film capacitor.

[0033] The control device 51 controls a plurality of first switching elements 1 and a plurality of second switching elements 2. The control device 51 includes a computer system. The computer system is primarily composed of a processor and a memory as hardware. The processor executes a program recorded in the memory of the computer system to realize the functions of the control device 51 in the present disclosure. The processor of the computer system is composed of one or more electronic circuits including a semiconductor integrated circuit (IC) or a large-scale integrated circuit (LSI). The integrated circuits, such as ICs and LSIs, are referred to by different names depending on the degree of integration, and include integrated circuits called system LSIs, very large-scale integrations (VLSIs), or ultra-large-scale integrations (ULSIs). Furthermore, field-programmable gate arrays (FPGAs), which are programmed after the LSI is manufactured, or logic devices that can reconfigure the connections within the LSI or reconfigure the circuit partitions within the LSI, can also be used as processors. The electronic circuits may be integrated into a single chip or distributed across multiple chips. The multiple chips may be integrated into one device or distributed across multiple devices. The computer system referred to here includes a microcontroller having one or more processors and one or more memories. Therefore, the microcontroller is also composed of one or more electronic circuits including semiconductor integrated circuits or large-scale integrated circuits.

[0034] The control device 51 outputs first control signals SU1, SV1, and SW1 that control the on / off states of the multiple first switching elements 1U, 1V, and 1W, respectively. Each of the first control signals SU1, SV1, and SW1 is, for example, a PWM (Pulse Width Modulation) signal whose potential level changes between a first potential level (hereinafter also referred to as a low level) and a second potential level (hereinafter also referred to as a high level) that is higher than the first potential level. The first switching elements 1U, 1V, and 1W are turned on when the first control signals SU1, SV1, and SW1 are at a high level, and turned off when the first control signals SU1, SV1, and SW1 are at a low level. The control device 51 also outputs first control signals SU2, SV2, and SW2 that control the on / off states of the multiple second switching elements 2U, 2V, and 2W, respectively. Each of the first control signals SU2, SV2, and SW2 is, for example, a PWM signal whose potential level changes between a first potential level (hereinafter also referred to as a low level) and a second potential level (hereinafter also referred to as a high level) that is higher than the first potential level. The second switching elements 2U, 2V, and 2W are turned on when the first control signals SU2, SV2, and SW2 are at a high level, and turned off when the first control signals SU2, SV2, and SW2 are at a low level.

[0035] The control device 51 uses a sawtooth-wave carrier signal to generate first control signals SU1, SV1, SW1 corresponding to the multiple first switching elements 1U, 1V, and 1W, respectively, and first control signals SU2, SV2, and SW2 corresponding to the multiple second switching elements 2U, 2V, and 2W, respectively. More specifically, the control device 51 generates the first control signals SU1 and SU2 to be applied to the first switching element 1U and the second switching element 2U, respectively, based on at least the carrier signal and a U-phase voltage command. The control device 51 also generates the first control signals SV1 and SV2 to be applied to the first switching element 1V and the second switching element 2V, respectively, based on at least the carrier signal and a V-phase voltage command. The control device 51 also generates the first control signals SW1 and SW2 to be applied to the first switching element 1W and the second switching element 2W, respectively, based on at least the carrier signal and a W-phase voltage command. The U-phase voltage command, V-phase voltage command, and W-phase voltage command are, for example, sinusoidal signals whose phases differ by 120°, and whose values ​​(voltage command values) change over time. Note that the waveform of the carrier signal is not limited to a sawtooth waveform and may be, for example, a triangular wave. The U-phase voltage command, V-phase voltage command, and W-phase voltage command each have the same length per cycle. The U-phase voltage command, V-phase voltage command, and W-phase voltage command each have a longer length per cycle than the carrier signal.

[0036] The duty of the first control signals SU1 and SU2 provided by the control device 51 to the first switching element 1U and the second switching element 2U, respectively, varies based on the U-phase voltage command. In FIG. 3, the duty of the first control signal SU1 is shown as the U-phase duty. The control device 51 (see FIG. 1) compares the U-phase voltage command with a carrier signal to generate the first control signal SU1 provided to the first switching element 1U. The control device 51 also inverts the first control signal SU1 provided to the first switching element 1U to generate the first control signal SU2 provided to the second switching element 2U. The control device 51 also sets a first dead time period Td1 (see FIG. 4) between the high-level period of the first control signal SU1 and the high-level period of the first control signal SU2 so that the on periods of the first switching element 1U and the second switching element 2U do not overlap.

[0037] The duty of the first control signals SV1 and SV2 provided by the control device 51 to the first switching element 1V and the second switching element 2V, respectively, varies based on the V-phase voltage command. In FIG. 3, the duty of the first control signal SV1 is shown as the V-phase duty. The control device 51 (see FIG. 1) compares the V-phase voltage command with a carrier signal to generate the first control signal SV1 provided to the first switching element 1V. The control device 51 also inverts the first control signal SV1 provided to the first switching element 1V to generate the first control signal SV2 provided to the second switching element 2V. The control device 51 also sets a first dead time period Td1 (see FIG. 5) between the high-level period of the first control signal SV1 and the high-level period of the first control signal SV2 so that the on periods of the first switching element 1V and the second switching element 2V do not overlap.

[0038] The duties of the first control signals SW1 and SW2 provided by the control device 51 to the first switching element 1W and the second switching element 2W, respectively, vary based on a W-phase voltage command. FIG. 3 is a diagram showing time variations in the duties corresponding to the voltage commands for each of the three phases and time variations in the load current in an AC load connected to multiple AC terminals of the power conversion device 100 according to the first embodiment. In FIG. 3, the duty of the first control signal SW1 is shown as a W-phase duty. The control device 51 (see FIG. 1) compares the W-phase voltage command with the carrier signal to generate the first control signal SW1 to be provided to the first switching element 1W. The control device 51 also inverts the first control signal SW1 provided to the first switching element 1W to generate the first control signal SW2 to be provided to the second switching element 2W. In addition, the control device 51 sets a first dead time period Td1 (see Figure 6) between the high level period of the first control signal SW1 and the high level period of the first control signal SW2 so that the on periods of the first switching element 1W and the second switching element 2W do not overlap.

[0039] The U-phase voltage command, V-phase voltage command, and W-phase voltage command are, for example, sinusoidal signals whose phases are different from each other by 120°, and whose values ​​change over time. Therefore, the duty of the first control signal SU1 (U-phase duty), the duty of the first control signal SV1 (V-phase duty), and the duty of the first control signal SW1 (W-phase duty) change like sinusoidal waves whose phases are different from each other by 120°, as shown in FIG. 3 . Similarly, the duty of the first control signal SU2, the duty of the first control signal SV2, and the duty of the first control signal SW2 change like sinusoidal waves whose phases are different from each other by 120°.

[0040] The control device 51 generates the first control signals SU1, SU2, SV1, SV2, SW1, and SW2 based on the carrier signal, the voltage commands, and information about the state of the AC load RA1. For example, if the AC load RA1 is a three-phase motor, the information about the state of the AC load RA1 includes, for example, detection values ​​from a plurality of current sensors that detect output currents (hereinafter also referred to as load currents) iU, iV, and iW flowing through the U-phase, V-phase, and W-phase of the AC load RA1, respectively.

[0041] The plurality of switches 8, the resonant inductor L1, the plurality of resonant capacitors 9, and the regenerative capacitor 15 are provided to perform zero-voltage soft switching of the plurality of first switching elements 1 and the plurality of second switching elements 2.

[0042] When the third switching element 6U is in the ON state and the fourth switching element 7U is in the OFF state, the switch 8U allows a charging current to pass through the path of the regenerative capacitor 15-resonant inductor L1-switch 8U-resonant capacitor 9U. The charging current is a current that charges the resonant capacitor 9U. When the third switching element 6U is in the OFF state and the fourth switching element 7U is in the ON state, the switch 8U allows a discharging current to pass through the path of the resonant capacitor 9U-switch 8U-resonant inductor L1-regenerative capacitor 15. The discharging current is a current that discharges the charge in the resonant capacitor 9U.

[0043] When the third switching element 6V is in the ON state and the fourth switching element 7V is in the OFF state, the switch 8V allows a charging current to pass through the path of the regenerative capacitor 15-resonant inductor L1-switch 8V-resonant capacitor 9V. The charging current is a current that charges the resonant capacitor 9V. When the third switching element 6V is in the OFF state and the fourth switching element 7V is in the ON state, the switch 8V allows a discharging current to pass through the path of the resonant capacitor 9V-switch 8V-resonant inductor L1-regenerative capacitor 15. The discharging current is a current that discharges the charge of the resonant capacitor 9V.

[0044] When the third switching element 6W is in the ON state and the fourth switching element 7W is in the OFF state, the switch 8W allows a charging current to pass through the path of the regenerative capacitor 15 - resonant inductor L1 - switch 8W - resonant capacitor 9W. The charging current is a current that charges the resonant capacitor 9W. When the third switching element 6W is in the OFF state and the fourth switching element 7W is in the ON state, the switch 8W allows a discharging current to pass through the path of the resonant capacitor 9W - switch 8W - resonant inductor L1 - regenerative capacitor 15. The discharging current is a current that discharges the charge in the resonant capacitor 9W.

[0045] In this embodiment, the control device 51 sets the dead time period between the high-level period of the first control signal to the first switching element 1 and the high-level period of the first control signal to the second switching element 2 for each of the multiple switching circuits 10 to a second dead time period Td2 determined by the first dead time period Td1 and a predetermined time (additional time Tad). The second dead time period Td2 includes the first dead time period Td1. The second dead time period Td2 has a length obtained by adding the predetermined time to the length of the first dead time period Td1 (the total length of the first dead time period Td1 and the predetermined time). In other words, the control device 51 sets the second dead time period Td2, which is obtained by extending the first dead time period Td1 by a predetermined time, as the dead time period.

[0046] The first dead-time period Td1 is a period set for each of the multiple switching circuits 10 between the high-level period of the first control signal to the first switching element 1 and the high-level period of the first control signal to the second switching element 2. This period is a period during which both the first control signal to the first switching element 1 and the first control signal to the second switching element 2 are low so that the on-periods of the first switching element 1 and the second switching element 2 do not overlap (i.e., there is no period in which both the first switching element 1 and the second switching element 2 are on). In this embodiment, for example, the length of the resonant half cycle corresponding to each of the multiple switches 8 is designed according to the length of the first dead-time period Td1 of each of the multiple switching circuits 10. The resonant half cycle is half the resonant cycle, which is the reciprocal of the resonant frequency of the resonant circuit including the switch 8, the resonant inductor L1, and one resonant capacitor 9. Therefore, when the inductance of the resonant inductor L1 is L and the capacitance of the resonant capacitor 9 is C, the resonant half cycle is expressed as π × (L C) 1/2 The length of the resonance half cycle is set to be the same as the length of the first dead time period Td1, for example.

[0047] The length of the resonant half cycle of the resonant circuit including the resonant inductor L1 and the resonant capacitor 9U is set to, for example, the length of the first dead time period Td1 (see FIG. 4) set between the high-level period of the first control signal SU1 and the high-level period of the first control signal SU2. The length of the resonant half cycle of the resonant circuit including the resonant inductor L1 and the resonant capacitor 9V is set to, for example, the length of the first dead time period Td1 (see FIG. 5) set between the high-level period of the first control signal SV1 and the high-level period of the first control signal SV2. The length of the resonant half cycle of the resonant circuit including the resonant inductor L1 and the resonant capacitor 9W is set to the length of the first dead time period Td1 (see FIG. 6) set between the high-level period of the first control signal SW1 and the high-level period of the first control signal SW2.

[0048] If the resonant period is Tres, Tres / 2, which is the resonant half period, is the length of the first dead time period Td1. The end of the resonant half period preferably coincides with the end of the first dead time period Td1 for the switching circuit 10 corresponding to the switch 8. FIG. 4 is a timing chart for explaining the operation of the power conversion device 100 according to the first embodiment. FIG. 4 illustrates the first control signals SU1 and SU2, the second control signals SU6 and SU7, the first dead time period Td1, the additional time Tad, and the second dead time period Td2. In the example of FIG. 4, the start and end of the first dead time period Td1 are time t12 and time t13, respectively. FIG. 5 is a timing chart for explaining the operation of the power conversion device 100 according to the first embodiment. FIG. 5 illustrates the first control signals SV1 and SV2, the second control signals SV6 and SV7, the first dead time period Td1, the additional time Tad, and the second dead time period Td2. In the example of Fig. 5, the start and end points of the first dead time period Td1 are time t22 and time t23, respectively. Fig. 6 is a timing chart for explaining the operation of the power conversion device according to the first embodiment. Fig. 6 illustrates the first control signals SW1 and SW2, the second control signals SW6 and SW7, the first dead time period Td1, the additional time Tad, and the second dead time period Td2. In the example of Fig. 6, the start and end points of the first dead time period Td1 are time t32 and time t33, respectively.

[0049] The length of the resonant half cycle described above is an ideal design example, and may be 90% to 110% of the length of the first dead time period Td1. The resonant half cycle and the first dead time period Td1 may have different lengths.

[0050] The second dead time period Td2 is a period obtained by extending the first dead time period Td1 by a predetermined time corresponding to the current value of the load current and the voltage value of the regenerative capacitor 15. The predetermined time is, for example, an additional time Tad determined by the current value of the load current, the voltage value of the regenerative capacitor 15, and the inductance L of the resonant inductor L1. The current value of the load current is, for example, the load current detection result obtained by a current sensor, a signal-processed value thereof, or an estimated value of the load current iU. The load current detection result or signal-processed value thereof is a detected value at a carrier cycle in which the additional time Tad is added to the first dead time period Td1, or at a timing closest to that carrier cycle. The estimated value of the load current is, for example, a value estimated from the load current at a carrier cycle in which the additional time Tad is added to the first dead time period Td1. The inductance L of the resonant inductor L1 is a value pre-stored in the control device 51. The voltage value of the regenerative capacitor 15 is a detected value of the voltage V15 of the regenerative capacitor 15 (the potential V15 at the sixth terminal 154 of the regenerative capacitor 15). In the example of FIG. 4, the additional time Tad is a value obtained by calculating Tad = iU × (L / V15). In the example of FIG. 5, the additional time Tad is a value obtained by calculating Tad = iV × (L / V15). In the example of FIG. 6, the additional time Tad is a value obtained by calculating Tad = iW × (L / V15).

[0051] The length of the predetermined time is an ideal design example, and may be 90% or more and 110% or less of the additional time Tad.

[0052] In the power conversion device 100 , a signal generating circuit 52 separate from the control device 51 controls the multiple switches 8 .

[0053] The signal generating circuit 52 generates second control signals SU6, SU7, SV6, SV7, SW6, and SW7 that control the on / off of the third switching element 6U, the fourth switching element 7U, the third switching element 6V, the fourth switching element 7V, the third switching element 6W, and the fourth switching element 7W, respectively, and outputs these signals to the gate terminals of the third switching element 6U, the fourth switching element 7U, the third switching element 6V, the fourth switching element 7V, the third switching element 6W, and the fourth switching element 7W, respectively.

[0054] The signal generating circuit 52 generates, for each of the plurality of switches 8, a second control signal having a high-level period corresponding to the second dead time period Td2 for the corresponding switching circuit 10 among the plurality of switching circuits 10.

[0055] The signal generation circuit 52 synchronizes the start of the high-level period of the second control signal generated for each of the multiple switches 8 with the start of the second dead time period Td2. In the present disclosure, "synchronizing the start of the high-level period of the second control signal with the start of the second dead time period Td2" means that the start of the high-level period of the second control signal occurs between the start and end of the second dead time period Td2, and the length of time between the start of the high-level period of the second control signal and the end of the second dead time period Td2 is equal to or longer than the length of the first dead time period Td1. In the first embodiment, the signal generation circuit 52 synchronizes the start of the high-level period of the second control signal for each of the multiple switches 8 with the start of the second dead time period Td2. In the first embodiment, the length of the high-level period of the second control signal for each of the multiple switches 8 is longer than the length of the second dead time period Td2.

[0056] The signal generation circuit 52 generates a second control signal for each of the multiple switches 8 using a first control signal to the first switching element 1 and a first control signal to the second switching element 2 of a corresponding switching circuit 10 among the multiple switching circuits 10. FIG. 2 is a circuit block diagram of the signal generation circuit 52 in the power conversion device 100 according to the first embodiment. In this embodiment, as shown in FIG. 2, the signal generation circuit 52 has multiple logic circuits 521 to 526 and multiple gate drive circuits 531 to 536. In the signal generation circuit 52, the multiple logic circuits 521 to 526 correspond one-to-one to the multiple gate drive circuits 531 to 536.

[0057] The logic circuit 521 is configured to generate a second control signal SU6 using the first control signal SU1 and the first control signal SU2. The logic circuit 521 is, for example, a two-input, one-output logic circuit, to which the first control signal SU1 and the first control signal SU2 output from the control device 51 are input, and which outputs a second control signal SU6. The second control signal SU6 is provided to the third switching element 6U via the gate drive circuit 531.

[0058] The logic circuit 522 is configured to generate a second control signal SU7 using the first control signal SU1 and the first control signal SU2. The logic circuit 522 is, for example, a two-input, one-output logic circuit, to which the first control signal SU1 and the first control signal SU2 output from the control device 51 are input, and which outputs a second control signal SU7. The second control signal SU7 is provided to the fourth switching element 7U via the gate drive circuit 532.

[0059] The logic circuit 523 is configured to generate a second control signal SV6 using the first control signal SV1 and the first control signal SV2. The logic circuit 523 is, for example, a two-input, one-output logic circuit, to which the first control signal SV1 and the first control signal SV2 output from the control device 51 are input, and which outputs a second control signal SV6. The second control signal SV6 is provided to the third switching element 6V via the gate drive circuit 533.

[0060] The logic circuit 524 is configured to generate a second control signal SV7 using the first control signal SV1 and the first control signal SV2. The logic circuit 524 is, for example, a two-input, one-output logic circuit, to which the first control signal SV1 and the first control signal SV2 output from the control device 51 are input, and which outputs a second control signal SV7. The second control signal SV7 is provided to the fourth switching element 7V via the gate drive circuit 534.

[0061] The logic circuit 525 is configured to generate a second control signal SW6 using the first control signal SW1 and the first control signal SW2. The logic circuit 525 is, for example, a two-input, one-output logic circuit, to which the first control signal SW1 and the first control signal SW2 output from the control device 51 are input, and which outputs a second control signal SW6. The second control signal SW6 is provided to the third switching element 6W via the gate drive circuit 535.

[0062] The logic circuit 526 is configured to generate a second control signal SW7 using the first control signal SW1 and the first control signal SW2. The logic circuit 526 is, for example, a two-input, one-output logic circuit, to which the first control signal SW1 and the first control signal SW2 output from the control device 51 are input, and which outputs a second control signal SW7. The second control signal SW7 is provided to the fourth switching element 7W via the gate drive circuit 536.

[0063] The first clamp diode 13 has an anode connected to the third end of the resonance inductor L1 and a cathode connected to the first DC terminal 31. The second clamp diode 14 has a cathode connected to the third end of the resonance inductor L1 and an anode connected to the second DC terminal 32.

[0064] (3) Operation of the Power Conversion Device In the following description, the polarity of current iL1 flowing through resonant inductor L1 will be defined as positive when flowing in the direction of the arrow in Fig. 1, and as negative when flowing in the direction opposite to the direction of the arrow in Fig. 1. Also, in the following description, the polarity of load currents iU, iV, and iW flowing through the U, V, and W phases of AC load RA1 will be defined as positive when flowing in the direction of the arrow in Fig. 1, and as negative when flowing in the direction opposite to the direction of the arrow in Fig. 1. Also, in the following description, the polarity of currents i9U, i9V, and i9W flowing through resonant capacitors 9U, 9V, and 9W will be defined as positive when flowing in the direction of the arrow in Fig. 1, and as negative when flowing in the direction opposite to the direction of the arrow in Fig. 1. Therefore, in the case of a discharge operation in which the resonant capacitors 9U, 9V, and 9W are discharged, the polarity of the currents i9U, i9V, and i9W is positive, and in the case of a charge operation in which the resonant capacitors 9U, 9V, and 9W are charged, the polarity of the currents i9U, i9V, and i9W is negative.

[0065] In the following description, the switching element (the first switching element 1 or the second switching element 2) that is the target of zero voltage soft switching will also be referred to as the target switching element.

[0066] 1 to 11, the basic operation of the zero voltage soft switching of each of the plurality of first switching elements 1 and the plurality of second switching elements 2 is described below. The basic operation is an operation performed when a resonant current passing through two or more of the plurality of switches 8 does not flow simultaneously through the resonant inductor L1. After describing the basic operation, the operation performed when the control device 51 determines that a resonant current passing through two of the plurality of switches 8 will flow simultaneously will be described.

[0067] (3.1) Basic Operation In the power conversion device 100, the target switching element is the first switching element 1 (hereinafter also referred to as the target first switching element 1), and when the polarity of the load current flowing through the AC terminal 41 connected to the target first switching element 1 is positive, the signal generation circuit 52 turns on the third switching element 6 corresponding to the target first switching element 1. As a result, the power conversion device 100 causes the resonant inductor L1 and the resonant capacitor 9 connected to the target first switching element 1 to resonate, charging the resonant capacitor 9 from the regenerative capacitor 15 and setting the voltage across the target first switching element 1 to zero. As a result, the power conversion device 100 can achieve zero-voltage soft switching of the target first switching element 1.

[0068] Furthermore, in the power conversion device 100, when the target switching element is the second switching element 2 (hereinafter also referred to as the target second switching element 2) and the polarity of the load current flowing through the AC terminal 41 connected to the target second switching element 2 is negative, the signal generating circuit 52 turns on the fourth switching element 7 corresponding to the target second switching element 2. As a result, the power conversion device 100 causes the resonant capacitor 9 and the resonant inductor L1 connected to the target second switching element 2 to resonate, discharging the resonant capacitor 9 and setting the voltage across the target second switching element 2 to zero. As a result, the power conversion device 100 can achieve zero-voltage soft switching of the target second switching element 2.

[0069] When the control device 51 sets the second dead time period Td2 for each of the multiple switching circuits 10, if the polarity of the load current is positive, it adds a predetermined time (additional time Tad) to the first dead time period Td1 by shortening the high-level period of the first control signal to the second switching element 2.

[0070] For example, when the control device 51 sets the second dead time period Td2 for the switching circuit 10U, if the polarity of the load current iU is positive, as shown in Figure 7, the control device 51 adds a predetermined time (additional time Tad) to the first dead time period Td1 by shortening the predetermined time (additional time Tad) of the high-level period of the first control signal SU2 to the second switching element 2U.

[0071] 7 is a diagram illustrating the operation of the power conversion device 100 according to the first embodiment when the U-phase load current is positive. In the case where the target switching element is the first switching element 1U of the switching circuit 10U, Fig. 7 illustrates the first control signals SU1 and SU2, the second control signal SU6, the current iL1 flowing through the resonant inductor L1, and the voltage V1u across the first switching element 1U. Also, in Fig. 7, the voltage value of the DC power supply E1 is illustrated as Vd.

[0072] When the target switching element is the first switching element 1U, in the switching circuit 10U, the voltage V2u across the second switching element 2U becomes Vd at time t13 when the second dead time period Td2 immediately before the high-level period of the first control signal SU1 ends, and the voltage V1u across the first switching element 1U becomes zero at time t13 when the second dead time period Td2 immediately before the high-level period of the first control signal SU1 ends. Therefore, when the first control signal SU1 changes from low level to high level at time t13, the first switching element 1U is subjected to zero-voltage soft switching. 7 , the current iL1 flowing through the resonance inductor L1 starts at time t11, when the high-level period of the second control signal SU6 begins, reaches the same value as the load current iU at time t12, when a predetermined time (additional time Tad) has elapsed since time t11, reaches the same value as the load current iU at time t13, when the second dead-time period Td2 ends, and becomes zero at time t14, when a second predetermined time Tad2, which has the same length as the predetermined time (first predetermined time), has elapsed since time t13. In the signal generating circuit 52, the second control signal SU6 changes from low to high at time t11, when the first control signal SU2 changes from high to low, and then changes from high to low at time t14, when the total time of the second dead-time period and the second predetermined time has elapsed. The current iL1 that flows between time t12 and time t13 is a resonant current (a charging current for the resonant capacitor 9U) that flows from the regenerative capacitor 15 through the resonant inductor L1 to the resonant capacitor 9U.

[0073] Hereinafter, a period T01 in which the absolute value of the current iL1 increases from zero to the absolute value of the load current (load current iU in the example of FIG. 7 ) will be referred to as a first period T01, a period T02 in which the absolute value of the current iL1 is greater than the load current (load current iU in the example of FIG. 7 ) will be referred to as a second period T02, and a period T03 in which the absolute value of the current iL1 decreases from the absolute value of the load current (load current iU in the example of FIG. 7 ) to zero will be referred to as a third period T03. In the power conversion device 100, when the current iL1 increases from zero to iL1=iU in the first period T01, the first period T01 transitions to a second period T02, and when a resonant current flows in the second period T02 and the first control signal to the target switching element changes from low level to high level, the second period T02 transitions to a third period T03.

[0074] In FIG. 7 , the first period T01 is the period from time t11 to time t12. The length of the first period T01 is the same as the first predetermined time (additional time Tad). FIG. 8 is a diagram illustrating the operation of the power conversion device 100 according to the first embodiment during the first period T01. In FIG. 8 , the current path of the current iL1 flowing through the resonant inductor L1 during the first period T01 in FIG. 7 is indicated by a bold solid line, and the current path of the load current iU flowing during the first period T01 is indicated by a bold dashed line. During the first period T01, the first switching element 1U, the second switching element 2U, and the fourth switching element 7U are all in an OFF state, and the third switching element 6U is in an ON state. During the first period T01, the current iL1 flows through the regenerative capacitor 15, the resonant inductor L1, the diode 71, the third switching element 6U, and the AC terminal 41U. During the first period T01, the load current iU flows through a path passing through the second diode 5 connected in antiparallel to the second switching element 2U, the AC terminal 41U, and the AC load RA1.

[0075] In FIG. 7 , the second period T02 is the period from time t12 to time t13. The length of the second period T02 is the same as the length of the resonant half cycle. FIG. 9 is an explanatory diagram of the operation of the power conversion device 100 according to the first embodiment during the second period T02. In FIG. 9 , the current path of the current iL1 flowing through the resonant inductor L1 during the second period T02 in FIG. 7 is indicated by a bold solid line. During the second period T02, the first switching element 1U, the second switching element 2U, and the fourth switching element 7U are all in the OFF state, and the third switching element 6U is in the ON state. During the second period T02, the current iL1 flows through the regenerative capacitor 15, the resonant inductor L1, the diode 71, and the third switching element 6U, and is divided into a current flowing to the AC terminal 41U and a current flowing to the resonant capacitor 9U (resonant current). During the second period T02, the resonant capacitor 9U is charged by the current flowing through the resonant capacitor 9.

[0076] In FIG. 7, the third period T03 is the period from time t13 to time t14. The length of the third period T03 is the same as the second predetermined time Tad2. FIG. 10 is an explanatory diagram of the operation of the power conversion device 100 according to the first embodiment during the third period T03. In FIG. 10, the current path of the current iL1 flowing through the resonant inductor L1 during the third period T03 in FIG. 7 is indicated by a bold solid line, and the current path of the load current iU flowing during the third period T03 is indicated by a bold dashed line. During the third period T03, the first switching element 1U and the third switching element 6U are each in an ON state, and the second switching element 2U and the fourth switching element 7U are each in an OFF state. During the third period T03, the current iL1 flows through the regenerative capacitor 15, the resonant inductor L1, the diode 71, the third switching element 6U, the connection point 3U, and the AC terminal 41U. This reduces the current iL1 to zero. Furthermore, during the third period T03, the load current iU flows through a path passing through the first DC terminal 31, the first switching element 1U, the AC terminal 41U and the AC load RA1.

[0077] When the control device 51 sets the second dead time period Td2 for each of the multiple switching circuits 10, if the polarity of the load current is negative, it adds a predetermined time (additional time Tad) to the first dead time period Td1 by shortening the high-level period of the first control signal to the first switching element 1.

[0078] For example, when setting the second dead time period Td2 for the switching circuit 10U, if the polarity of the load current iU is negative, as shown in Figure 11, the control device 51 adds a predetermined time (additional time Tad) to the first dead time period Td1 by shortening the high-level period of the first control signal SU1 to the first switching element 1U by a predetermined time (additional time Tad).

[0079] Fig. 11 is a diagram illustrating the operation of the power conversion device 100 according to the first embodiment when the polarity of the U-phase load current is negative. Fig. 11 illustrates the first control signals SU1 and SU2, the second control signal SU7, the current iL1 flowing through the resonant inductor L1, and the voltage V2u across the second switching element 2U when the target switching element is the second switching element 2U of the switching circuit 10U. Also, Fig. 11 illustrates the voltage value of the DC power supply E1 as Vd.

[0080] When the target switching element is the second switching element 2U, in the switching circuit 10U, the voltage V1u across the first switching element 1U becomes Vd at time t43 when the second dead time period Td2 immediately before the high-level period of the first control signal SU2 ends, and the voltage V2u across the second switching element 2U becomes zero at time t43 when the second dead time period Td2 ends. Therefore, when the first control signal SU2 changes from low level to high level at time t43, the second switching element 2U is subjected to zero-voltage soft switching. 11 , the current iL1 flowing through the resonant inductor L1 begins at time t41, when the high-level period of the second control signal SU7 begins, reaches the same value as the load current iU at time t42, when the additional time Tad has elapsed, reaches the same value as the load current iU at time t43, when the second dead-time period Td2 ends, and reaches zero at time t44, when a second predetermined time Tad2, which is the same length as the first predetermined time, has elapsed from time t43. In the signal generating circuit 52, the second control signal SU7 changes from low to high when the first control signal SU1 changes from high to low. The current iL1 flowing between time t42 and time t43 is the resonant current (the discharge current of the resonant capacitor 9U) flowing from the resonant capacitor 9U to the resonant inductor L1.

[0081] 11, the first period T01 is the period from time t41 to time t42. During the first period T01, the first switching element 1U, the second switching element 2U, and the third switching element 6U are all in an OFF state, and the fourth switching element 7U is in an ON state. During the first period T01, the current iL1 flows through a path that passes through the AC terminal 41U, the diode 61, the fourth switching element 7U, the resonant inductor L1, and the regenerative capacitor 15. Also, during the first period T01, the load current iU flows through a path that passes through the AC load RA1, the AC terminal 41U, and the first diode 4 connected in anti-parallel to the first switching element 1U.

[0082] In FIG. 11 , the second period T02 is the period from time t42 to time t43. During the second period T02, the first switching element 1U, the second switching element 2U, and the third switching element 6U are all in an OFF state, and the fourth switching element 7U is in an ON state. During the second period T02, the current iL1 flowing through the resonant inductor L1 is a combined current of a current flowing from the AC terminal 41U through the diode 61, the fourth switching element 7U, the resonant inductor L1, and the regenerative capacitor 15, and a current (resonant current) flowing from the resonant capacitor 9U through the diode 61, the fourth switching element 7U, the resonant inductor L1, and the regenerative capacitor 15. During the second period T02, the resonant capacitor 9 is discharged.

[0083] In FIG. 11 , the third period T03 is the period from time t43 to time t44. During the third period T03, the second switching element 2U and the fourth switching element 7U are each in an ON state, and the first switching element 1U and the third switching element 6U are each in an OFF state. During the third period T03, the current iL1 flows through the AC terminal 41U, the connection point 3U, the diode 61, the fourth switching element 7U, the resonant inductor L1, and the regenerative capacitor 15. This reduces the absolute value of the current iL1 to zero. Furthermore, during the third period T03, the load current iU flows through the AC load RA1, the AC terminal 41U, the second switching element 2U, and the second DC terminal 32.

[0084] Although an example of setting the second dead time period Td2 for the switching circuit 10U has been described above, the same applies to the switching circuit 10V and the switching circuit 10W.

[0085] (3.2) Operation of Shift Control When the control device 51 determines that two-phase resonant currents corresponding to two of the multiple switching circuits 10 flow simultaneously through the resonant inductor L1, the control device 51 performs control to shift the on-periods of the first switching element 1 and the second switching element 2 in one of the two switching circuits 10. "When it is determined that two-phase resonant currents flow simultaneously" means that it has been estimated in advance that two-phase resonant currents will flow simultaneously through the resonant inductor L1.

[0086] (3.2.1) Determination of whether two-phase resonant currents flow simultaneously In the power conversion device 100, the phases of the voltage commands for three phases (U phase, V phase, and W phase) differ from each other by 120°, but the command values ​​of the voltage commands for two phases approach each other by an electrical angle of 60°, and the duties of the control signals for the two phases approach each other (see areas A1 and A2 in FIG. 3 ). In area A1 in FIG. 3 , the duties of the U-phase control signal and the V-phase control signal are near 0.75. In area A2 in FIG. 3 , the duties of the U-phase control signal and the V-phase control signal are near 0.25. The polarity of the resonant current is the same as the polarity of current iL1, and in area A1, the polarity of the resonant current is positive, and in area A2, the polarity of the resonant current is negative. In the case of region A1, for example, during one cycle of the carrier signal, the time difference between the start of the high-level period of the second control signal SU6 supplied to the third switching element 6U (time t11 in FIG. 4 ) and the start of the high-level period of the second control signal SV6 supplied to the third switching element 6V (time t21 in FIG. 5 ) becomes short, and there is a possibility that the U-phase resonant current and the V-phase resonant current will flow simultaneously through the resonant inductor L1. In the power conversion device 100, in the case of region A2, the direction of the resonant current is opposite to that in region A1, but there is a possibility that the U-phase resonant current and the V-phase resonant current will flow simultaneously through the resonant inductor L1.

[0087] Assuming that the capacitance of each of the multiple resonant capacitors 9U, 9V, and 9W is C, if a U-phase current and a V-phase current flow simultaneously through the resonant inductor L1, then in terms of an equivalent circuit, a capacitor having a combined capacitance (=2×C) of the resonant capacitors 9U and 9V is connected in series to the resonant inductor L1. Therefore, in the power conversion device 100, if two-phase currents flow simultaneously through the resonant inductor L1, the resonant frequency of the resonant circuit including the resonant inductor L1 will change compared to when a single-phase current flows through the resonant inductor L1, and zero-voltage soft switching may not be achieved.

[0088] 12 is a timing chart illustrating the overlap time when two-phase resonant currents overlap in the power conversion device 100 according to the first embodiment. Hereinafter, as shown in FIG. 12 , the length of the period corresponding to the first period T01 during the high-level period of the second control signal SU6 is denoted as Tau, the length of the period corresponding to the second period T02 is denoted as Tres / 2, and the length of the period corresponding to the third period T03 is denoted as Tau. Tau is a value calculated by the control device 51 using, for example, the detection result of the load current iU by the current sensor or a signal-processed value thereof, or an estimated value of the load current iU, the inductance L of the resonant inductor L1 that is stored in advance, and the detection result of the voltage V15 of the regenerative capacitor 15 (the potential V15 at the fourth end of the regenerative capacitor 15), by calculating Tau = iU × (L / V15).

[0089] 12, the length of the period corresponding to the first period T01 during the high-level period of the second control signal SV6 is denoted as Tav, the length of the period corresponding to the second period T02 is denoted as Tres / 2, and the length of the period corresponding to the third period T03 is denoted as Tav. Tav is a value determined in the control device 51 by, for example, calculating Tav = iV × (L / V15) using the detection result of the load current iV by the current sensor or its signal processed value, or the estimated value of the load current iV, the inductance L of the resonance inductor L1 that is stored in advance, and the detection result of the voltage V15 of the regenerative capacitor 15 (the potential V15 at the fourth end of the regenerative capacitor 15).

[0090] In the following description, the length of the period corresponding to the first period T01 during the high-level period of the second control signal SW6 is denoted as Taw, the length of the period corresponding to the second period T02 is denoted as Tres / 2, and the length of the period corresponding to the third period T03 is denoted as Taw. Taw is a value determined in the control device 51 by, for example, calculating Taw=iW×(L / V15) using the detection result of the load current iW by the current sensor or its signal processed value, or the estimated value of the load current iW, the inductance L of the resonance inductor L1 that is stored in advance, and the detection result of the voltage V15 of the regenerative capacitor 15 (the potential V15 at the fourth end of the regenerative capacitor 15).

[0091] The on-period of the first switching element 1U corresponds one-to-one to the high-level period of the first control signal SU1. The on-period of the first switching element 1V corresponds one-to-one to the high-level period of the first control signal SV1. The on-period of the first switching element 1W corresponds one-to-one to the high-level period of the first control signal SW1. Furthermore, the on-period of the second switching element 2U corresponds one-to-one to the high-level period of the first control signal SU2. The on-period of the second switching element 2V corresponds one-to-one to the high-level period of the first control signal SV2. The on-period of the second switching element 2W corresponds one-to-one to the high-level period of the first control signal SW2.

[0092] For example, the control device 51 generates the first control signals SU1, SU2, SV1, SV2, SW1, and SW2 for each cycle of the carrier signal, and then determines whether or not there is overlap in the resonant currents before controlling the first switching element 1U, the second switching element 2U, the first switching element 1V, the second switching element 2V, the first switching element 1W, and the second switching element 2W.

[0093] (3.2.1.1) In the case of charging operation of the resonance capacitor FIG. 12 is an explanatory diagram of how to calculate the overlap time when the U-phase resonance current and the V-phase resonance current overlap.

[0094] In the power conversion device 100, if the time difference ΔTuv is equal to or greater than Tau + Tav + (Tres / 2), the U-phase resonant current and the V-phase resonant current do not overlap, and if the time difference ΔTuv is less than Tau + Tav + Tres / 2, the U-phase resonant current and the V-phase resonant current overlap. The time difference ΔTuv is the time difference between the start of a high-level period of the first control signal SU1 provided to the first switching element 1U of the switching circuit 10U and the start of a high-level period of the first control signal SV1 provided to the first switching element 1V of the switching circuit 10V. The control device 51 determines the overlap time Tov_uv, during which the U-phase resonant current and the V-phase resonant current overlap, by calculating Tov_uv = Tau + Tav + (Tres / 2) - ΔTuv. The control device 51 estimates that the U-phase resonant current and the V-phase resonant current overlap if Tov_uv > 0. The method for calculating the time difference ΔTuv is not limited to the above example, and may use, for example, the time difference between the end point of the high-level period of the first control signal SU2 given to the second switching element 2U of the switching circuit 10U and the end point of the high-level period of the first control signal SV2 given to the second switching element 2V of the switching circuit 10V.

[0095] Furthermore, in the power conversion device 100, if the time difference ΔTuw is equal to or greater than Tau + Taw + (Tres / 2), the U-phase resonant current and the W-phase resonant current do not overlap, and if the time difference ΔTuw is less than Tau + Taw + (Tres / 2), the U-phase resonant current and the W-phase resonant current overlap. The time difference ΔTuw is the time difference between the start of the high-level period of the first control signal SU1 and the start of the high-level period of the first control signal SW1. The control device 51 determines the overlap time Tov_uw by calculating Tov_uw = Tau + Taw + (Tres / 2) - ΔTuw, where Tov_uw is the overlap time during which the U-phase resonant current and the W-phase resonant current overlap. If Tov_uw > 0, the control device 51 estimates that the U-phase resonant current and the W-phase resonant current overlap. The method for calculating the time difference ΔTuw is not limited to the above example, and for example, the time difference between the end point of the high-level period of the first control signal SU2 and the end point of the high-level period of the first control signal SW2 may be used.

[0096] Furthermore, in the power conversion device 100, if the time difference ΔTvw is equal to or greater than Tav + Taw + (Tres / 2), the V-phase resonant current and the W-phase resonant current do not overlap, and if the time difference ΔTvw is less than Tav + Taw + (Tres / 2), the V-phase resonant current and the W-phase resonant current overlap. The time difference ΔTvw is the time difference between the start of a high-level period of the first control signal SV1 provided to the first switching element 1V of the switching circuit 10V and the start of a high-level period of the first control signal SW1 provided to the first switching element 1W of the switching circuit 10W. The control device 51 determines the overlap time Tov_vw, during which the V-phase resonant current and the W-phase resonant current overlap, by calculating Tov_vw = Tav + Taw + (Tres / 2) - ΔTvw. The control device 51 estimates that the V-phase resonant current and the W-phase resonant current overlap if Tov_vw > 0. The method for calculating the time difference ΔTvw is not limited to the above example, and may use, for example, the time difference between the end point of the high-level period of the first control signal SV2 and the end point of the high-level period of the first control signal SW2.

[0097] Fig. 13 is a timing chart for explaining the operation of the power conversion device 100 according to the first embodiment. The upper part of Fig. 13 shows an example of a timing chart before the control device 51 performs shift control, and the lower part of Fig. 13 shows an example of a timing chart when the control device 51 performs shift control. More specifically, the upper part of Fig. 13 shows first control signals SU1, SU2, SV1, SV2, second control signals SU6, SU7, SV6, SV7, and current iL1 before performing shift control in a case where the control device 51 determines that two-phase resonant currents, U-phase and V-phase, flow simultaneously (the upper part of Fig. 13 shows the current passing through the switch 8U and resonant inductor L1 and the current passing through the switch 8V and resonant inductor L1, separately). 13 shows the first control signals SU1, SU2, SV1, SV2, the second control signals SU6, SU7, SV6, SV7, and the current iL1 when the control device 51 shifts the high-level period of the first control signal SU1 or the first control signal SV1, whichever has the shorter high-level period, in a predetermined direction (in this embodiment, the direction of delaying it on the time axis) by the shift time Ts. Note that FIG. 13 shows a timing chart for one period of the carrier signal.

[0098] In this embodiment, when the control device 51 determines that two-phase resonant currents, the U-phase and the V-phase, flow simultaneously, it sets the shift time Ts to the overlap time Tov_uv. The control device 51 shifting the shorter high-level period of the first control signal SU1 or the first control signal SV1 in a predetermined direction by the shift time Ts means that the control device 51 shifts the on-period of the first switching element 1U of the switching circuit 10U in the predetermined direction by the shift time Ts. As can be seen from the waveform of the current iL1 in the lower part of Figure 13, the power conversion device 100 can suppress overlap between the U-phase resonant current and the V-phase resonant current.

[0099] (3.2.1.2) In the case of discharging operation of the resonant capacitor In the case of discharging operation of the resonant capacitor 9, the control device 51 determines whether two-phase resonant currents flow simultaneously using the same time difference and overlap time as in the case of charging operation of the resonant capacitor 9.

[0100] For example, if the time difference ΔTuv between the start of the high level period of the first control signal SU2 and the start of the high level period of the first control signal SV2 is less than Tau + Tav + (Tres / 2), the control device 51 estimates that the U-phase resonant current and the V-phase resonant current overlap.

[0101] In addition, the control device 51 estimates that the U-phase resonant current and the W-phase resonant current overlap, for example, if the time difference ΔTuw between the start of the high-level period of the first control signal SU2 and the start of the high-level period of the first control signal SW2 is less than Tau + Taw + (Tres / 2).

[0102] In addition, the control device 51 estimates that the V-phase resonant current and the W-phase resonant current overlap, for example, if the time difference ΔTvw between the start of the high-level period of the first control signal SV2 and the start of the high-level period of the first control signal SW2 is less than Tav + Taw + (Tres / 2).

[0103] Fig. 14 is a timing chart for explaining the operation of the power conversion device 100 according to the first embodiment. The upper part of Fig. 14 shows an example of a timing chart before the control device 51 performs shift control, and the lower part of Fig. 14 shows an example of a timing chart when the control device 51 performs shift control. More specifically, the upper part of Fig. 14 shows first control signals SU1, SU2, SV1, SV2, second control signals SU6, SU7, SV6, SV7, and current iL1 before performing shift control in a case where the control device 51 determines that two-phase resonant currents, U-phase and V-phase, flow simultaneously (the upper part of Fig. 14 shows the current passing through the switch 8U and resonant inductor L1 and the current passing through the switch 8V and resonant inductor L1, separately). 14 shows the first control signals SU1, SU2, SV1, SV2, the second control signals SU6, SU7, SV6, SV7, and the current iL1 when the control device 51 shifts the high-level period of the first control signal SU1 or the first control signal SV1, whichever has the shorter high-level period, in a predetermined direction (in this embodiment, in the direction of advancing it on the time axis) by the shift time Ts. Note that FIG. 14 shows a timing chart for one period of the carrier signal.

[0104] In this embodiment, when the control device 51 determines that two-phase resonant currents, the U-phase and the V-phase, flow simultaneously, the control device 51 sets the shift time Ts to the overlap time Tov_uv. The control device 51 shifting the shorter high-level period of the first control signal SU1 or the first control signal SV1 in a predetermined direction by the shift time Ts means that the control device 51 shifts the on-period of the first switching element 1U of the switching circuit 10U in the predetermined direction by the shift time Ts. As can be seen from the waveform of the current iL1 in the lower part of Figure 14, the power conversion device 100 can suppress overlap between the U-phase resonant current and the V-phase resonant current.

[0105] The above describes an example of shift control when the control device 51 determines that two-phase resonant currents, U-phase and V-phase, flow simultaneously (overlap). However, in both cases where two-phase resonant currents, U-phase and W-phase, flow simultaneously and where two-phase resonant currents, V-phase and W-phase, flow simultaneously, shift control is performed using the same concept (algorithm) as the shift control when it is determined that two-phase resonant currents, U-phase and V-phase, flow simultaneously.

[0106] (4) Advantages The power conversion device 100 according to the first embodiment includes a first DC terminal 31 and a second DC terminal 32, a power conversion circuit 11, a plurality of AC terminals 41, a plurality of switches 8, a plurality of resonant capacitors 9, a resonant inductor L1, a regenerative capacitor 15, a control device 51, and a signal generation circuit 52. The power conversion circuit 11 includes a plurality of first switching elements 1 and a plurality of second switching elements 2. In the power conversion circuit 11, a plurality of switching circuits 10 are connected in parallel, each including a plurality of first switching elements 1 and a plurality of second switching elements 2 connected in series in a one-to-one relationship. The control device 51 sets a second dead time period Td2 for each of the plurality of switching circuits 10 by adding a predetermined time (additional time Tad) to a predetermined first dead time period Td1 between a high-level period of the first control signal to the first switching element 1 and a high-level period of the first control signal to the second switching element 2 so that the on periods of the first switching element 1 and the second switching element 2 do not overlap. The predetermined time (additional time Tad) is determined according to the current value of the load current, the inductance of the resonant inductor L1, and the voltage value of the regenerative capacitor 15. The signal generating circuit 52 generates, for each of the multiple switches 8, a second control signal having a high-level period corresponding to the second dead time period Td2 for the corresponding switching circuit 10 among the multiple switching circuits 10. When the control device 51 determines that two-phase resonant currents corresponding to two of the multiple switching circuits 10 simultaneously flow through the resonant inductor L1, the control device 51 performs control to shift the on-periods of the first switching element 1 and the second switching element 2 in one of the two switching circuits 10.

[0107] According to the above configuration, the control device 51 can more reliably achieve zero-voltage soft switching without directly controlling the multiple switches 8 for zero-voltage soft switching. More specifically, the control device 51 does not need to generate a second control signal for directly controlling the multiple switches 8 for zero-voltage soft switching. Therefore, the control device 51 can achieve zero-voltage soft switching of each of the multiple first switching elements 1 and the multiple second switching elements 2 without directly controlling the multiple switches 8. Furthermore, according to the above configuration, even when a common resonant inductor L1 is connected to the multiple switching circuits 10, it is possible to prevent two-phase resonant currents from flowing simultaneously through the resonant inductor L1, thereby enabling more reliable zero-voltage soft switching. Furthermore, according to the above configuration, by preventing two-phase resonant currents from flowing simultaneously through the resonant inductor L1, it is possible to suppress heat generation and loss due to an increase in the maximum value of the resonant current. Furthermore, according to the above configuration, there is no need for the control device 51 to generate and output multiple second control signals SU6, SU7, SV6, SV7, SW6, and SW7, so it is possible to simplify the control device 51, and for example, it is possible to suppress an increase in the number of control ports of the microcomputer included in the control device 51 and suppress an increase in the size of the control device 51.

[0108] (Embodiment 2) A power conversion device 100A according to embodiment 2 will be described with reference to Figures 15 to 19. Regarding the power conversion device 100A according to embodiment 2, components that are the same as those of the power conversion device 100 according to embodiment 1 (see Figures 1 and 2) are denoted by the same reference numerals, and descriptions thereof will be omitted.

[0109] (1) Configuration Fig. 15 is a circuit diagram of a system including a power conversion device 100A according to embodiment 2. As shown in Fig. 15, the power conversion device 100A differs from the power conversion device 100 in that it includes a signal generation circuit 52A instead of the signal generation circuit 52 of the power conversion device 100.

[0110] In the power conversion device 100A, a signal generating circuit 52A controls a plurality of switches 8.

[0111] The signal generating circuit 52A generates second control signals SU6, SU7, SV6, SV7, SW6, and SW7 that control the on / off of the third switching element 6U, the fourth switching element 7U, the third switching element 6V, the fourth switching element 7V, the third switching element 6W, and the fourth switching element 7W, respectively, and outputs these signals to the gate terminals of the third switching element 6U, the fourth switching element 7U, the third switching element 6V, the fourth switching element 7V, the third switching element 6W, and the fourth switching element 7W, respectively.

[0112] The signal generation circuit 52A generates, for each of the multiple switches 8, a second control signal having a high-level period corresponding to the second dead-time period Td2 for the corresponding switching circuit 10 among the multiple switching circuits 10. In the second embodiment, the signal generation circuit 52A synchronizes the start of the high-level period of the second control signal to each of the multiple switches 8 with the start of the second dead-time period Td2, and synchronizes the end of the high-level period of the second control signal to each of the multiple switches 8 with the end of the second dead-time period Td2. Therefore, in the second embodiment, the length of the high-level period of the second control signal to each of the multiple switches 8 is the same as the length of the second dead-time period Td2. The signal generation circuit 52A includes multiple logic circuits 521 to 526 and multiple gate drive circuits 531 to 536, similar to the signal generation circuit 52 of the first embodiment (see FIG. 2 ). Since the signal generating circuit 52A synchronizes the end point of the high level period of the second control signal to each of the multiple switches 8 with the end point of the second dead time period Td2, the configuration of the multiple logic circuits 521 to 526 is different from the configuration of the multiple logic circuits 521 to 526 in the signal generating circuit 52.

[0113] (2) Operation (2.1) Basic Operation Fig. 16 is a diagram illustrating the operation of the power conversion device 100A according to the second embodiment when the load current of the U phase is positive. Fig. 16 illustrates the first control signals SU1 and SU2, the second control signal SU6, the current iL1 flowing through the resonant inductor L1, and the voltage V1u across the first switching element 1U when the target switching element is the first switching element 1U of the switching circuit 10U. In Fig. 16, the voltage value of the DC power supply E1 is illustrated as Vd.

[0114] When the target switching element is the first switching element 1U, in the switching circuit 10U, the voltage V2u across the second switching element 2U becomes Vd at time t13 when the second dead time period Td2 immediately before the high-level period of the first control signal SU1 ends, and the voltage V1u across the first switching element 1U becomes zero at time t13 when the second dead time period Td2 immediately before the high-level period of the first control signal SU1 ends. Therefore, when the first control signal SU1 changes from low level to high level at time t13, the first switching element 1U is subjected to zero-voltage soft switching. 16 , the current iL1 flowing through the resonant inductor L1 begins at time t11, when the high-level period of the second control signal SU6 begins. At time t12, when a predetermined time (additional time Tad) has elapsed, the current iL1 becomes the same as the load current iU. At time t13, when the second dead-time period Td2 ends, the current iL1 becomes the same as the load current iU. Finally, at time t14, when a second predetermined time Tad2, which is the same length as the first predetermined time, has elapsed from time t13, the current iL1 becomes zero. In the signal generating circuit 52A, the second control signal SU6 changes from low to high at time t11, when the first control signal SU2 changes from high to low. The current iL1 flowing between time t12 and time t13 is a resonant current (charging current for the resonant capacitor 9U) flowing from the regenerative capacitor 15 to the resonant capacitor 9U via the resonant inductor L1.

[0115] During the first period T01, the first switching element 1U, the second switching element 2U, and the fourth switching element 7U are all in an OFF state, and the third switching element 6U is in an ON state. During the first period T01, the current iL1 flows through the path passing through the regenerative capacitor 15, the resonant inductor L1, the diode 71, the third switching element 6U, and the AC terminal 41U, as in Fig. 8. Also, during the first period T01, the load current iU flows through the path passing through the second diode 5 connected in anti-parallel to the second switching element 2U, the AC terminal 41U, and the AC load RA1, as in Fig. 8.

[0116] During the second period T02, the first switching element 1U, the second switching element 2U, and the fourth switching element 7U are each in an OFF state, and the third switching element 6U is in an ON state. During the second period T02, the current iL1 flows through the path passing through the regenerative capacitor 15, the resonant inductor L1, the diode 71, and the third switching element 6U, as in Fig. 9, and is divided into a current flowing to the AC terminal 41U and a current flowing to the resonant capacitor 9U (resonant current). During the second period T02, the resonant capacitor 9U is charged by the current flowing through the resonant capacitor 9U.

[0117] During the third period T03, the first switching element 1U is in an ON state, and the second switching element 2U, the third switching element 6U, and the fourth switching element 7U are each in an OFF state. FIG. 17 is an explanatory diagram of the operation during the third period T03 of the power conversion device 100A according to the second embodiment. In FIG. 17, the current path of the current iL1 flowing through the resonant inductor L1 during the third period T03 in FIG. 16 is shown by a thick solid line, and the current path of the load current iU flowing during the third period T03 is shown by a thick dashed line. During the third period T03, the first switching element 1U is in an ON state, and the second switching element 2U, the third switching element 6U, and the fourth switching element 7U are each in an OFF state. During the third period T03, the current iL1 flows through the regenerative capacitor 15, the resonant inductor L1, and the first clamp diode 13. This reduces the current iL1 to zero. Furthermore, during the third period T03, the load current iU flows through a path passing through the first DC terminal 31, the first switching element 1U, the AC terminal 41U and the AC load RA1.

[0118] When the control device 51 sets the second dead time period Td2 for each of the multiple switching circuits 10, if the polarity of the load current is negative, it adds a predetermined time to the first dead time period Td1 by shortening the high-level period of the first control signal to the first switching element 1.

[0119] For example, when setting the second dead time period Td2 for the switching circuit 10U, if the polarity of the load current iU is negative, as shown in Figure 18, the control device 51 adds a predetermined time (additional time Tad) to the first dead time period Td1 by shortening the high-level period of the first control signal SU1 to the first switching element 1U by a predetermined time (additional time Tad).

[0120] Fig. 18 is a diagram illustrating the operation of the power conversion device 100 according to the second embodiment when the polarity of the U-phase load current is negative. Fig. 18 illustrates the first control signals SU1 and SU2, the second control signal SU7, the current iL1 flowing through the resonant inductor L1, and the voltage V2u across the second switching element 2U when the target switching element is the second switching element 2U of the switching circuit 10U. Also, Fig. 18 illustrates the voltage value of the DC power supply E1 as Vd.

[0121] When the target switching element is the second switching element 2U, in the switching circuit 10U, the voltage V1u across the first switching element 1U becomes Vd at time t43 when the second dead time period Td2 immediately before the high-level period of the first control signal SU2 ends, and the voltage V2u across the second switching element 2U becomes zero at time t43 when the second dead time period Td2 ends. Therefore, when the first control signal SU2 changes from low level to high level at time t43, the second switching element 2U is subjected to zero-voltage soft switching. 18 , the current iL1 flowing through the resonant inductor L1 begins at time t41, when the high-level period of the second control signal SU7 begins, reaches the same value as the load current iU at time t42, when the additional time Tad has elapsed, reaches the same value as the load current iU at time t43, when the second dead-time period Td2 ends, and reaches zero at time t44, when a second predetermined time Tad2, which is the same length as the first predetermined time, has elapsed from time t43. In the signal generating circuit 52A, the second control signal SU7 changes from low to high when the first control signal SU1 changes from high to low. The current iL1 flowing between time t42 and time t43 is the resonant current (the discharge current of the resonant capacitor 9U) flowing from the resonant capacitor 9U to the resonant inductor L1.

[0122] 18, the first period T01 is the period from time t41 to time t42. During the first period T01, the first switching element 1U, the second switching element 2U, and the third switching element 6U are all in an OFF state, and the fourth switching element 7U is in an ON state. During the first period T01, the current iL1 flows through a path that passes through the AC terminal 41U, the diode 61, the fourth switching element 7U, the resonant inductor L1, and the regenerative capacitor 15. Also, during the first period T01, the load current iU flows through a path that passes through the AC load RA1, the AC terminal 41U, and the first diode 4 connected in anti-parallel to the first switching element 1U.

[0123] In FIG. 18 , the second period T02 is the period from time t42 to time t43. During the second period T02, the first switching element 1U, the second switching element 2U, and the third switching element 6U are all in an OFF state, and the fourth switching element 7U is in an ON state. During the second period T02, the current iL1 flowing through the resonant inductor L1 is a combined current of a current flowing from the AC terminal 41U through the diode 61, the fourth switching element 7U, the resonant inductor L1, and the regenerative capacitor 15, and a current (resonant current) flowing from the resonant capacitor 9U through the diode 61, the fourth switching element 7U, the resonant inductor L1, and the regenerative capacitor 15. During the second period T02, the resonant capacitor 9 is discharged.

[0124] In FIG. 18 , the third period T03 is the period from time t43 to time t44. During the third period T03, the second switching element 2U is in the ON state, and the first switching element 1U, the third switching element 6U, and the fourth switching element 7U are each in the OFF state. During the third period T03, the current iL1 flows through the second clamp diode 14, the resonant inductor L1, and the regenerative capacitor 15. This reduces the absolute value of the current iL1 to zero. Furthermore, during the third period T03, the load current iU flows through the AC load RA1, the AC terminal 41U, the second switching element 2U, and the second DC terminal 32.

[0125] Although an example of setting the second dead time period Td2 for the switching circuit 10U has been described above, the same applies to the switching circuit 10V and the switching circuit 10W.

[0126] (2.2) Shift Control Fig. 19 is a timing chart for explaining the operation of the power conversion device 100A according to the second embodiment. The upper part of Fig. 19 shows an example of a timing chart before the control device 51 performs shift control in the case of a charging operation of the resonant capacitor, and the lower part of Fig. 19 shows an example of a timing chart when the control device 51 performs shift control. More specifically, the upper part of Fig. 19 shows the first control signals SU1, SU2, SV1, SV2, the second control signals SU6, SU7, SV6, SV7, and the current iL1 (the current passing through the switch 8U and the resonant inductor L1 and the current passing through the switch 8V and the resonant inductor L1 are depicted separately in the upper part of Fig. 19) before the shift control is performed in the case where the control device 51 determines that two-phase resonant currents, that is, U-phase and V-phase, flow simultaneously. 19 shows the first control signals SU1, SU2, SV1, SV2, the second control signals SU6, SU7, SV6, SV7, and the current iL1 when the control device 51 shifts the high-level period of the first control signal SU1 or the first control signal SV1, whichever has the shorter high-level period, in a predetermined direction (in this embodiment, the direction of delaying it on the time axis) by the shift time Ts. Note that FIG. 19 shows a timing chart for one period of the carrier signal.

[0127] In this embodiment, when the control device 51 determines that two-phase resonant currents, the U-phase and the V-phase, flow simultaneously, the control device 51 sets the shift time Ts to the overlap time Tov_uv. The control device 51 shifting the shorter high-level period of the first control signal SU1 or the first control signal SV1 in a predetermined direction by the shift time Ts means that the control device 51 shifts the on-period of the first switching element 1U of the switching circuit 10U in a predetermined direction by the shift time Ts. As can be seen from the waveform of the current iL1 in the lower part of Figure 19, the power conversion device 100A is able to suppress overlap between the U-phase resonant current and the V-phase resonant current.

[0128] The above describes an example of shift control when the control device 51 determines that two-phase resonant currents, U-phase and V-phase, flow simultaneously (overlap). However, in both cases where two-phase resonant currents, U-phase and W-phase, flow simultaneously and where two-phase resonant currents, V-phase and W-phase, flow simultaneously, shift control is performed using the same concept (algorithm) as the shift control when it is determined that two-phase resonant currents, U-phase and V-phase, flow simultaneously.

[0129] (3) Advantages As with the power conversion device 100 according to the first embodiment, the power conversion device 100A according to the second embodiment can more reliably achieve zero voltage soft switching without directly controlling the multiple switches 8 for zero voltage soft switching in the control device 51.

[0130] (Embodiment 3) The circuit configuration of the power conversion device 100 according to embodiment 3 is the same as that of the power conversion device 100 according to embodiment 1 (see FIG. 1), and therefore a circuit diagram is omitted. Hereinafter, the operation of the power conversion device 100 according to embodiment 3 will be described with reference to FIG.

[0131] (1) Operation (1.1) Basic Operation The basic operation is the same as in the first embodiment, so a description thereof will be omitted.

[0132] (1.2) Shift Control In the power conversion device 100 according to the third embodiment, similarly to the power conversion device 100 according to the first embodiment, when the control device 51 determines that two-phase resonant currents corresponding to two of the multiple switching circuits 10 simultaneously flow through the resonant inductor L1, the control device 51 performs control to shift the on periods of the first switching element 1 and the second switching element 2 in one of the two switching circuits 10.

[0133] Fig. 20 is a timing chart for explaining the operation of the power conversion device 100 according to the third embodiment. The upper part of Fig. 20 shows an example of a timing chart before the control device 51 performs shift control, and the lower part of Fig. 20 shows an example of a timing chart when the control device 51 performs shift control. More specifically, the upper part of Fig. 20 shows first control signals SU1, SU2, SV1, SV2, second control signals SU6, SU7, SV6, SV7, and current iL1 before performing shift control in a case where the control device 51 determines that two-phase resonant currents, U-phase and V-phase, flow simultaneously (the upper part of Fig. 20 shows the current passing through the switch 8U and resonant inductor L1 and the current passing through the switch 8V and resonant inductor L1, separately). The lower part of Figure 20 illustrates the first control signals SU1, SU2, SV1, SV2, the second control signals SU6, SU7, SV6, SV7, and the current iL1 when the control device 51 shifts the shorter high-level period of either the first control signal SU1 or the first control signal SV1 in a predetermined direction (in this embodiment, in the direction of advancing the time axis) by the shift time Ts. Shifting the shorter high-level period of either the first control signal SU1 or the first control signal SV1 in a predetermined direction by the shift time Ts by the control device 51 means that the control device 51 shifts the on-period of the first switching element 1U of the switching circuit 10U in a predetermined direction by the shift time Ts. Note that Figure 20 illustrates a timing chart for one cycle of the carrier signal.

[0134] In this embodiment, when the control device 51 determines that two-phase resonant currents, U-phase and V-phase, flow simultaneously, it sets the shift time Ts to the overlap time Tov_uv+Tα. In this embodiment, the control device 51 sets Tα so that the overlap time of the two-phase resonant currents after the shift is zero. The value of Tα varies depending on how the two-phase resonant currents overlap when the control device 51 determines that two-phase resonant currents flow simultaneously.

[0135] As can be seen from the waveform of the current iL1 in the lower part of FIG. 20, the power conversion device 100 can suppress overlapping of the U-phase resonant current and the V-phase resonant current.

[0136] The above describes an example of shift control when the control device 51 determines that two-phase resonant currents, U-phase and V-phase, flow simultaneously (overlap). However, in both cases where two-phase resonant currents, U-phase and W-phase, flow simultaneously and where two-phase resonant currents, V-phase and W-phase, flow simultaneously, shift control is performed using the same concept (algorithm) as the shift control when it is determined that two-phase resonant currents, U-phase and V-phase, flow simultaneously.

[0137] (2) Advantages As with the power conversion device 100 according to the first embodiment, the power conversion device 100 according to the third embodiment can more reliably achieve zero voltage soft switching without directly controlling the multiple switches 8 for zero voltage soft switching in the control device 51.

[0138] (Variation of Embodiment 3) In the power conversion device 100B according to the variation of Embodiment 3, the control device 51 may be configured to combine, for example, a shift control (first control mode) for shifting the on-period of each of the first switching element 1 and the second switching element 2 in one of the two switching circuits 10 in a direction to delay it on the time axis, similar to the control device 51 of the power conversion device 100 according to Embodiment 1, and a shift control (second control mode) for shifting the on-period of each of the first switching element 1 and the second switching element 2 in one of the two switching circuits 10 in a direction to advance it on the time axis, similar to the control device 51 of the power conversion device 100 according to Embodiment 3, and to execute the first control mode and the second control mode alternately or at any ratio.

[0139] In the power conversion device 100 according to the modification of the third embodiment, the tendency of the amount of fluctuation and polarity of two-phase line voltages (e.g., UV line voltages) in the multiple phases changes when the first control mode is executed and when the second control mode is executed. Therefore, if the control device 51 executes only one of the first control mode and the second control mode, there is a possibility that the tendency of the line voltage fluctuations will become biased. In contrast, the power conversion device 100 according to the modification can reduce the bias of the line voltage fluctuations compared to when a single control mode is executed.

[0140] The shift control of the control device 51 of the power conversion device 100 according to the third embodiment may be combined with the shift control of any other embodiment than the first embodiment, and in this case too, it is possible to reduce the bias in the operation and fluctuations in the line voltage.

[0141] (Fourth embodiment) A power conversion device 100B according to a fourth embodiment will be described with reference to Fig. 21 to Fig. 24. Regarding the power conversion device 100B according to the fourth embodiment, components that are the same as those of the power conversion device 100 according to the first embodiment (see Fig. 1) are denoted by the same reference numerals, and descriptions thereof will be omitted.

[0142] (1) Configuration Fig. 21 is a circuit diagram of a system including a power conversion device 100B according to embodiment 4. As shown in Fig. 21 , the power conversion device 100B differs from the power conversion device 100 in that it includes a control device 51B instead of the control device 51 of the power conversion device 100.

[0143] In the power conversion device 100B, the control device 51B, like the control device 51, generates first control signals SU1, SU2, SV1, SV2, SV2, SW1, and SW2 to control multiple first switching elements 1 and multiple second switching elements 2.

[0144] When setting the second dead time period Td2 for each of the multiple switching circuits 10, if the polarity of the load current is positive, the control device 51B advances the end point of the high-level period of the first control signal to the second switching element 2 and delays the start point of the high-level period of the first control signal to the first switching element 1, thereby lengthening the first dead time period Td1 by a predetermined time (additional time Tad). If the time by which the end point of the high-level period of the first control signal to the second switching element 2 is advanced is Ta21 (see FIG. 22 ) and the time by which the start point of the high-level period of the first control signal to the first switching element 1 is delayed is Ta11 (see FIG. 22 ), then the predetermined time (additional time Tad) is Ta11 + Ta21, where Ta11 = Ta21 = 0.5·Tad.

[0145] When setting the second dead time period Td2 for each of the multiple switching circuits 10, if the polarity of the load current is negative, the control device 51B advances the end point of the high-level period of the first control signal to the first switching element 1 and delays the start point of the high-level period of the first control signal to the second switching element 2, thereby lengthening the first dead time period Td1 by a predetermined time (additional time Tad). If the time by which the end point of the high-level period of the first control signal to the first switching element 1 is advanced is Ta12 (see FIG. 23 ) and the time by which the start point of the high-level period of the first control signal to the second switching element 2 is delayed is Ta22 (see FIG. 23 ), then the predetermined time (additional time Tad) is Ta12 + Ta22, where Ta12 = Ta22 = 0.5·Tad.

[0146] As in embodiment 1, the signal generating circuit 52 generates a second control signal for each of the multiple switches 8 using a first control signal to the first switching element 1 and a first control signal to the second switching element 2 of a corresponding switching circuit 10 among the multiple switching circuits 10.

[0147] (2) Operation (2.1) Basic Operation Fig. 22 is a diagram illustrating the operation of the power conversion device 100B according to the fourth embodiment when the polarity of the U-phase load current is positive. Fig. 22 illustrates the first control signals SU1 and SU2, the second control signal SU6, the current iL1 flowing through the resonant inductor L1, and the voltage V1u across the first switching element 1U when the target switching element is the first switching element 1U of the switching circuit 10U. In Fig. 22, the voltage value of the DC power supply E1 is shown as Vd.

[0148] When the target switching element is the first switching element 1U, in the switching circuit 10U, the voltage V2u across the second switching element 2U becomes Vd at time t13 when the second dead time period Td2 immediately before the high-level period of the first control signal SU1 ends, and the voltage V1u across the first switching element 1U becomes zero at time t13 when the second dead time period Td2 immediately before the high-level period of the first control signal SU1 ends. Therefore, when the first control signal SU1 changes from low level to high level at time t13, the first switching element 1U is subjected to zero-voltage soft switching. 22 , the current iL1 flowing through the resonant inductor L1 starts at time t11, when the high-level period of the second control signal SU6 begins, reaches the same value as the load current iU at time t12, when a time period equal to the additional time Tad has elapsed, reaches the same value as the load current iU at time t13, when the second dead time period Td2 ends, and reaches zero at time t14, when the third period T03 has elapsed since time t13. In the signal generating circuit 52, the second control signal SU6 changes from low to high at time t11, when the first control signal SU2 changes from high to low. The current iL1 flowing between time t12 and time t13 is a resonant current (a charging current for the resonant capacitor 9U) that flows from the regenerative capacitor 15 to the resonant capacitor 9U via the resonant inductor L1.

[0149] During the first period T01, the first switching element 1U, the second switching element 2U, and the fourth switching element 7U are all in an OFF state, and the third switching element 6U is in an ON state. During the first period T01, the current iL1 flows through the path passing through the regenerative capacitor 15, the resonant inductor L1, the diode 71, the third switching element 6U, and the AC terminal 41U, as in Fig. 8. Also, during the first period T01, the load current iU flows through the path passing through the second diode 5 connected in anti-parallel to the second switching element 2U, the AC terminal 41U, and the AC load RA1, as in Fig. 8.

[0150] During the second period T02, the first switching element 1U, the second switching element 2U, and the fourth switching element 7U are each in an OFF state, and the third switching element 6U is in an ON state. During the second period T02, the current iL1 flows through the path passing through the regenerative capacitor 15, the resonant inductor L1, the diode 71, and the third switching element 6U, as in Fig. 9, and is divided into a current flowing to the AC terminal 41U and a current flowing to the resonant capacitor 9U (resonant current). During the second period T02, the resonant capacitor 9U is charged by the current flowing through the resonant capacitor 9U.

[0151] During the third period T03, the first switching element 1U and the third switching element 6U are each in an ON state, and the second switching element 2U and the fourth switching element 7U are each in an OFF state. During the third period T03, the current iL1 flows through the path passing through the regenerative capacitor 15, the resonant inductor L1, the diode 71, the third switching element 6U, and the AC terminal 41U, as in FIG. 10. This reduces the current iL1 to zero. Also, during the third period T03, the load current iU flows through the path passing through the first DC terminal 31, the first switching element 1U, the AC terminal 41U, and the AC load RA1, as in FIG. 10.

[0152] Fig. 23 is a diagram illustrating the operation of the power conversion device 100B according to the fourth embodiment when the polarity of the U-phase load current is negative. Fig. 23 illustrates the first control signals SU1 and SU2, the second control signal SU7, the current iL1 flowing through the resonant inductor L1, and the voltage V2u across the second switching element 2U when the target switching element is the second switching element 2U of the switching circuit 10U. Also, Fig. 23 illustrates the voltage value of the DC power supply E1 as Vd.

[0153] When the target switching element is the second switching element 2U, in the switching circuit 10U, the voltage V1u across the first switching element 1U becomes Vd at time t43 when the second dead time period Td2 immediately before the high-level period of the first control signal SU2 ends, and the voltage V2u across the second switching element 2U becomes zero at time t43 when the second dead time period Td2 ends. Therefore, when the first control signal SU2 changes from low level to high level at time t43, the second switching element 2U is subjected to zero-voltage soft switching.

[0154] 23 , the current iL1 flowing through the resonant inductor L1 starts at time t41, when the high-level period of the second control signal SU7 begins, reaches the same value as the load current iU at time t42, when a predetermined time (additional time Tad) has elapsed, reaches the same value as the load current iU at time t43, when the second dead time period Td2 ends, and reaches zero at time t44, when a predetermined time (additional time Tad) has elapsed from time t43. In the signal generating circuit 52, the second control signal SU7 changes from low to high when the first control signal SU1 changes from high to low. The current iL1 flowing between time t42 and time t43 is the resonant current (the discharge current of the resonant capacitor 9U) flowing from the resonant capacitor 9U to the resonant inductor L1.

[0155] 23, the first period T01 is the period from time t41 to time t42. During the first period T01, the first switching element 1U, the second switching element 2U, and the third switching element 6U are all in an OFF state, and the fourth switching element 7U is in an ON state. During the first period T01, the current iL1 flows through a path that passes through the AC terminal 41U, the diode 61, the fourth switching element 7U, the resonant inductor L1, and the regenerative capacitor 15. Also, during the first period T01, the load current iU flows through a path that passes through the AC load RA1, the AC terminal 41U, and the first diode 4 connected in anti-parallel to the first switching element 1U.

[0156] In FIG. 23 , the second period T02 is the period from time t42 to time t43. During the second period T02, the first switching element 1U, the second switching element 2U, and the third switching element 6U are all in an OFF state, and the fourth switching element 7U is in an ON state. During the second period T02, the current iL1 flowing through the resonant inductor L1 is a combined current of a current flowing from the AC terminal 41U through the diode 61, the fourth switching element 7U, the resonant inductor L1, and the regenerative capacitor 15, and a current (resonant current) flowing from the resonant capacitor 9U through the diode 61, the fourth switching element 7U, the resonant inductor L1, and the regenerative capacitor 15. During the second period T02, the resonant capacitor 9 is discharged.

[0157] In FIG. 23 , the third period T03 is the period from time t43 to time t44. During the third period T03, the second switching element 2U and the fourth switching element 7U are each in an ON state, and the first switching element 1U and the third switching element 6U are each in an OFF state. During the third period T03, the current iL1 flows through the AC terminal 41U, the connection point 3U, the diode 61, the fourth switching element 7U, the resonant inductor L1, and the regenerative capacitor 15. This reduces the absolute value of the current iL1 to zero. Furthermore, during the third period T03, the load current iU flows through the AC load RA1, the AC terminal 41U, the second switching element 2U, and the second DC terminal 32.

[0158] Although an example of setting the second dead time period Td2 for the switching circuit 10U has been described above, the same applies to the switching circuit 10V and the switching circuit 10W.

[0159] (2.2) Shift Control Similar to the control device 51 of embodiment 1, when the control device 51B of this embodiment determines that two-phase resonant currents corresponding to two of the multiple switching circuits 10 simultaneously flow through the resonant inductor L1, the control device 51B performs control to shift the on-periods of the first switching element 1 and the second switching element 2 in one of the two switching circuits 10.

[0160] Fig. 24 is a timing chart for explaining the operation of the power conversion device 100B according to the fourth embodiment. The upper part of Fig. 24 shows an example of a timing chart before the control device 51B performs shift control, and the lower part of Fig. 24 shows an example of a timing chart when the control device 51B performs shift control. More specifically, the upper part of Fig. 24 shows first control signals SU1, SU2, SV1, SV2, second control signals SU6, SU7, SV6, SV7, and current iL1 before performing shift control in a case where the control device 51B determines that two-phase resonant currents, U-phase and V-phase, flow simultaneously (the upper part of Fig. 24 shows the current passing through the switch 8U and resonant inductor L1 and the current passing through the switch 8V and resonant inductor L1, separately). The lower part of Figure 24 illustrates the first control signals SU1, SU2, SV1, SV2, the second control signals SU6, SU7, SV6, SV7, and the current iL1 when the control device 51B shifts the shorter high-level period of either the first control signal SU1 or the first control signal SV1 in a predetermined direction (in this embodiment, in a direction to delay on the time axis) by the shift time Ts. Shifting the shorter high-level period of either the first control signal SU1 or the first control signal SV1 in a predetermined direction by the shift time Ts by the control device 51B means that the control device 51B shifts the on-period of the first switching element 1U of the switching circuit 10U in a predetermined direction by the shift time Ts. Note that Figure 24 illustrates a timing chart for one cycle of the carrier signal.

[0161] In this embodiment, when the control device 51B determines that two-phase resonant currents, that is, U-phase and V-phase, flow simultaneously, the control device 51B sets the shift time Ts to the overlap time Tov_uv+0.5·Tad.

[0162] As can be seen from the waveform of the current iL1 in the lower part of FIG. 24, the power conversion device 100B can suppress overlapping of the U-phase resonant current and the V-phase resonant current.

[0163] The above describes an example of shift control when the control device 51B determines that two-phase resonant currents, U-phase and V-phase, flow simultaneously (overlap). However, in both cases where two-phase resonant currents, U-phase and W-phase, flow simultaneously and where two-phase resonant currents, V-phase and W-phase, flow simultaneously, shift control is performed using the same concept (algorithm) as the shift control when it is determined that two-phase resonant currents, U-phase and V-phase, flow simultaneously.

[0164] (3) Advantages As with the power conversion device 100 according to the first embodiment, the power conversion device 100B according to the fourth embodiment can more reliably achieve zero voltage soft switching without directly controlling the multiple switches 8 for zero voltage soft switching in the control device 51B.

[0165] Furthermore, in the power conversion device 100B, when the control device 51B sets the second dead time period Td2 for each of the multiple switching circuits 10, if the polarity of the load current is positive, the control device 51B advances the end point of the high-level period of the first control signal to the second switching element 2 and delays the start point of the high-level period of the first control signal to the first switching element 1, thereby adding a predetermined time (additional time Tad) to the first dead time period Td1, and if the polarity of the load current is negative, the control device 51B advances the end point of the high-level period of the first control signal to the first switching element 1 and delays the start point of the high-level period of the first control signal to the second switching element 2, thereby adding a predetermined time (additional time Tad) to the first dead time period Td1.

[0166] According to the above configuration, it is possible to realize zero-voltage soft switching while reducing dead-time loss and dead-time error.

[0167] Fifth Embodiment A power conversion device 100C according to a fifth embodiment will be described with reference to Fig. 25 to Fig. 28. Regarding the power conversion device 100C according to the fifth embodiment, components that are the same as those of the power conversion device 100 according to the first embodiment (see Fig. 1) are denoted by the same reference numerals, and descriptions thereof will be omitted.

[0168] (1) Configuration Fig. 25 is a circuit diagram of a system including a power conversion device according to embodiment 5. As shown in Fig. 25, the power conversion device 100C differs from the power conversion device 100 in that it includes a control device 51C instead of the control device 51 of the power conversion device 100.

[0169] In the power conversion device 100C, the control device 51C, like the control device 51, generates first control signals SU1, SU2, SV1, SV2, SV2, SW1, and SW2 to control multiple first switching elements 1 and multiple second switching elements 2.

[0170] When the control device 51C sets the second dead time period Td2 for each of the multiple switching circuits 10, if the polarity of the load current is positive, it adds a predetermined time (additional time Tad) to the first dead time period Td1 by shortening the high-level period of the first control signal to the first switching element 1.

[0171] When the control device 51C sets the second dead time period Td2 for each of the multiple switching circuits 10, if the polarity of the load current is negative, it adds a predetermined time (additional time Tad) to the first dead time period Td1 by shortening the high-level period of the first control signal to the second switching element 2.

[0172] As in embodiment 1, the signal generating circuit 52 generates a second control signal for each of the multiple switches 8 using a first control signal to the first switching element 1 and a first control signal to the second switching element 2 of a corresponding switching circuit 10 among the multiple switching circuits 10.

[0173] (2) Operation (2.1) Basic Operation Fig. 26 is a diagram illustrating the operation of the power conversion device 100C according to the fifth embodiment when the polarity of the U-phase load current is positive. Fig. 26 illustrates the first control signals SU1 and SU2, the second control signal SU6, the current iL1 flowing through the resonant inductor L1, and the voltage V1u across the first switching element 1U when the target switching element is the first switching element 1U of the switching circuit 10U. In Fig. 26, the voltage value of the DC power supply E1 is illustrated as Vd.

[0174] When the target switching element is the first switching element 1U, in the switching circuit 10U, the voltage V2u across the second switching element 2U becomes Vd at time t13 when the second dead time period Td2 immediately before the high-level period of the first control signal SU1 ends, and the voltage V1u across the first switching element 1U becomes zero at time t13 when the second dead time period Td2 immediately before the high-level period of the first control signal SU1 ends. Therefore, when the first control signal SU1 changes from low level to high level at time t13, the first switching element 1U is subjected to zero-voltage soft switching. 26 , the current iL1 flowing through the resonant inductor L1 starts at time t11, when the high-level period of the second control signal SU6 begins, reaches the same value as the load current iU at time t12, when the first period T01 has elapsed since time t11, reaches the same value as the load current iU at time t13, when the second dead time period Td2 ends, and becomes zero at time t14, when the third period has elapsed since time t13. In the signal generating circuit 52, the second control signal SU6 changes from low to high at time t11, when the first control signal SU2 changes from high to low. The current iL1 flowing between time t12 and time t13 is a resonant current (a charging current for the resonant capacitor 9U) that flows from the regenerative capacitor 15 through the resonant inductor L1 to the resonant capacitor 9U.

[0175] During the first period T01, the first switching element 1U, the second switching element 2U, and the fourth switching element 7U are all in an OFF state, and the third switching element 6U is in an ON state. During the first period T01, the current iL1 flows through the path passing through the regenerative capacitor 15, the resonant inductor L1, the diode 71, the third switching element 6U, and the AC terminal 41U, as in Fig. 8. Also, during the first period T01, the load current iU flows through the path passing through the second diode 5 connected in anti-parallel to the second switching element 2U, the AC terminal 41U, and the AC load RA1, as in Fig. 8.

[0176] During the second period T02, the first switching element 1U, the second switching element 2U, and the fourth switching element 7U are each in an OFF state, and the third switching element 6U is in an ON state. During the second period T02, the current iL1 flows through the path passing through the regenerative capacitor 15, the resonant inductor L1, the diode 71, and the third switching element 6U, as in Fig. 9, and is divided into a current flowing to the AC terminal 41U and a current flowing to the resonant capacitor 9U (resonant current). During the second period T02, the resonant capacitor 9U is charged by the current flowing through the resonant capacitor 9U.

[0177] During the third period T03, the first switching element 1U and the third switching element 6U are each in an ON state, and the second switching element 2U and the fourth switching element 7U are each in an OFF state. During the third period T03, the current iL1 flows through the path passing through the regenerative capacitor 15, the resonant inductor L1, the diode 71, the third switching element 6U, and the AC terminal 41U, as in FIG. 10. This reduces the current iL1 to zero. Also, during the third period T03, the load current iU flows through the path passing through the first DC terminal 31, the first switching element 1U, the AC terminal 41U, and the AC load RA1, as in FIG. 10.

[0178] Fig. 27 is a diagram illustrating the operation of the power conversion device 100C according to the fifth embodiment when the polarity of the U-phase load current is negative. Fig. 27 illustrates the first control signals SU1 and SU2, the second control signal SU7, the current iL1 flowing through the resonant inductor L1, and the voltage V2u across the second switching element 2U when the target switching element is the second switching element 2U of the switching circuit 10U. Also, Fig. 27 illustrates the voltage value of the DC power supply E1 as Vd.

[0179] When the target switching element is the second switching element 2U, in the switching circuit 10U, the voltage V1u across the first switching element 1U becomes Vd at time t43 when the second dead time period Td2 immediately before the high-level period of the first control signal SU2 ends, and the voltage V2u across the second switching element 2U becomes zero at time t43 when the second dead time period Td2 ends. Therefore, when the first control signal SU2 changes from low level to high level at time t43, the second switching element 2U is subjected to zero-voltage soft switching. 27 , the current iL1 flowing through the resonant inductor L1 begins at time t41, when the high-level period of the second control signal SU7 begins. At time t42, when a predetermined time (additional time Tad) has elapsed, the current iL1 becomes the same as the load current iU. At time t43, when the second dead time period Td2 ends, the current iL1 becomes the same as the load current iU. At time t44, when a second predetermined time Tad2, which is the same length as the predetermined time (additional time Tad), has elapsed from time t43, the current iL1 becomes zero. In the signal generating circuit 52, the second control signal SU7 changes from low to high when the first control signal SU1 changes from high to low. The current iL1 flowing between time t42 and time t43 is the resonant current (the discharge current of the resonant capacitor 9U) flowing from the resonant capacitor 9U to the resonant inductor L1.

[0180] 27, the first period T01 is the period from time t41 to time t42. During the first period T01, the first switching element 1U, the second switching element 2U, and the third switching element 6U are all in an OFF state, and the fourth switching element 7U is in an ON state. During the first period T01, the current iL1 flows through a path that passes through the AC terminal 41U, the diode 61, the fourth switching element 7U, the resonant inductor L1, and the regenerative capacitor 15. Also, during the first period T01, the load current iU flows through a path that passes through the AC load RA1, the AC terminal 41U, and the first diode 4 connected in anti-parallel to the first switching element 1U.

[0181] In FIG. 27 , the second period T02 is the period from time t42 to time t43. During the second period T02, the first switching element 1U, the second switching element 2U, and the third switching element 6U are all in an OFF state, and the fourth switching element 7U is in an ON state. During the second period T02, the current iL1 flowing through the resonant inductor L1 is a combined current of a current flowing from the AC terminal 41U through the diode 61, the fourth switching element 7U, the resonant inductor L1, and the regenerative capacitor 15, and a current (resonant current) flowing from the resonant capacitor 9U through the diode 61, the fourth switching element 7U, the resonant inductor L1, and the regenerative capacitor 15. During the second period T02, the resonant capacitor 9 is discharged.

[0182] In FIG. 27, the third period T03 is the period from time t43 to time t44. During the third period T03, the second switching element 2U and the fourth switching element 7U are each in an ON state, and the first switching element 1U and the third switching element 6U are each in an OFF state. During the third period T03, the current iL1 flows through the AC terminal 41U, the diode 61, the fourth switching element 7U, the resonant inductor L1, and the regenerative capacitor 15. This reduces the absolute value of the current iL1 to zero. Furthermore, during the third period T03, the load current iU flows through the AC load RA1, the AC terminal 41U, the second switching element 2U, and the second DC terminal 32.

[0183] The above describes an example in which the first dead time period Td1 is extended to the second dead time period Td2 for the switching circuit 10U, but the same applies to the switching circuits 10V and 10W.

[0184] (2.2) Shift Control Similar to the control device 51 of embodiment 1, when the control device 51C of this embodiment determines that two-phase resonant currents corresponding to two of the multiple switching circuits 10 simultaneously flow through the resonant inductor L1, the control device 51C performs control to shift the on-periods of the first switching element 1 and the second switching element 2 in one of the two switching circuits 10.

[0185] Fig. 28 is a timing chart for explaining the operation of the power conversion device 100C according to the fifth embodiment. The upper part of Fig. 28 shows an example of a timing chart before the control device 51C performs shift control, and the lower part of Fig. 28 shows an example of a timing chart when the control device 51C performs shift control. More specifically, the upper part of Fig. 28 shows first control signals SU1, SU2, SV1, SV2, second control signals SU6, SU7, SV6, SV7, and current iL1 (in the upper part of Fig. 28, the current passing through the switch 8U and the resonant inductor L1 and the current passing through the switch 8V and the resonant inductor L1 are depicted separately) before the shift control is performed in a case where the control device 51C determines that two-phase resonant currents, that is, U-phase and V-phase, flow simultaneously. The lower part of Figure 28 illustrates the first control signals SU1, SU2, SV1, SV2, the second control signals SU6, SU7, SV6, SV7, and the current iL1 when the control device 51C shifts the shorter high-level period of either the first control signal SU1 or the first control signal SV1 in a predetermined direction (in this embodiment, in a direction to delay on the time axis) by the shift time Ts. Shifting the shorter high-level period of either the first control signal SU1 or the first control signal SV1 in a predetermined direction by the shift time Ts by the control device 51C means that the control device 51C shifts the on-period of the first switching element 1U of the switching circuit 10U in a predetermined direction by the shift time Ts. Note that Figure 28 illustrates a timing chart for one cycle of the carrier signal.

[0186] In this embodiment, when the control device 51C determines that two-phase resonant currents, that is, U-phase and V-phase, flow simultaneously, the control device 51C sets the shift time Ts to the overlap time Tov_uv.

[0187] As can be seen from the waveform of the current iL1 in the lower part of FIG. 28, the power conversion device 100C can suppress overlapping of the U-phase resonant current and the V-phase resonant current.

[0188] The above describes an example of shift control when the control device 51C determines that two-phase resonant currents, U-phase and V-phase, flow simultaneously (overlap). However, in both cases where two-phase resonant currents, U-phase and W-phase, flow simultaneously and where two-phase resonant currents, V-phase and W-phase, flow simultaneously, shift control is performed using the same concept (algorithm) as the shift control when it is determined that two-phase resonant currents, U-phase and V-phase, flow simultaneously.

[0189] (3) Advantages As with the power conversion device 100 according to the first embodiment, the power conversion device 100C according to the fifth embodiment can more reliably achieve zero voltage soft switching without directly controlling the multiple switches 8 for zero voltage soft switching in the control device 51C.

[0190] Sixth Embodiment The circuit configuration of the power conversion device 100 according to the sixth embodiment is the same as that of the power conversion device 100 according to the first embodiment (see FIG. 1 ), and therefore a circuit diagram is not shown. The operation of the power conversion device 100 according to the sixth embodiment will be described below with reference to FIGS. 1 and 29 .

[0191] (1) Operation (1.1) Basic Operation The basic operation is the same as in the first embodiment, so a description thereof will be omitted.

[0192] (1.2) Shift Control In the power conversion device 100 according to the sixth embodiment, similarly to the power conversion device 100 according to the first embodiment, when the control device 51 determines that two-phase resonant currents corresponding to two of the multiple switching circuits 10 simultaneously flow through the resonant inductor L1, the control device 51 performs control to shift the on periods of the first switching element 1 and the second switching element 2 in one of the two switching circuits 10.

[0193] In the power conversion device 100 according to the sixth embodiment, the control device 51 sets the shift time Ts, which shifts the on-periods of the first switching element 1 and the second switching element 2 in a predetermined direction (in this embodiment, a direction to delay them on the time axis), to an arbitrary time that is longer than the overlap time of the two-phase resonant currents and equal to or less than the maximum value that can be set within one cycle of the carrier signal. The "maximum value that can be set within one cycle of the carrier signal" means the shift time when the time between the end of one cycle of the carrier signal and the end of the high-level period of the shifted first control signal is a specified time or zero.

[0194] Fig. 29 is a timing chart for explaining the operation of the power conversion device 100 according to the sixth embodiment. The upper part of Fig. 29 shows an example of a timing chart before the control device 51 performs shift control, and the lower part of Fig. 29 shows an example of a timing chart when the control device 51 performs shift control. More specifically, the upper part of Fig. 29 shows first control signals SU1, SU2, SV1, SV2, second control signals SU6, SU7, SV6, SV7, and current iL1 before performing shift control in a case where the control device 51 determines that two-phase resonant currents, U-phase and V-phase, flow simultaneously (the upper part of Fig. 29 depicts the current passing through the switch 8U and resonant inductor L1 and the current passing through the switch 8V and resonant inductor L1 separately). 29 shows the first control signals SU1, SU2, SV1, SV2, the second control signals SU6, SU7, SV6, SV7, and the current iL1 when the control device 51 shifts the shorter high-level period of either the first control signal SU1 or the first control signal SV1 in a predetermined direction (in this embodiment, in a direction to delay on the time axis) by the shift time Ts. Shifting the shorter high-level period of either the first control signal SU1 or the first control signal SV1 in a predetermined direction by the shift time Ts by the control device 51 means that the control device 51 shifts the on-period of the first switching element 1U of the switching circuit 10U in a predetermined direction by the shift time Ts. Note that FIG. 29 shows a timing chart for one cycle of the carrier signal.

[0195] The example of Figure 29 is an example in which, when the control device 51 determines that two-phase resonant currents, U phase and V phase, are flowing simultaneously, the shift time Ts is set to the maximum value that can be set within one period of the carrier signal, which is longer than the overlap time Tov_uv.

[0196] As can be seen from the waveform of the current iL1 in the lower part of FIG. 29, the power conversion device 100 can suppress overlapping of the U-phase resonant current and the V-phase resonant current.

[0197] The above describes an example of shift control when the control device 51 determines that two-phase resonant currents, U-phase and V-phase, flow simultaneously (overlap). However, in both cases where two-phase resonant currents, U-phase and W-phase, flow simultaneously and where two-phase resonant currents, V-phase and W-phase, flow simultaneously, shift control is performed using the same concept (algorithm) as the shift control when it is determined that two-phase resonant currents, U-phase and V-phase, flow simultaneously.

[0198] (2) Advantages As with the power conversion device 100 according to the first embodiment, the power conversion device 100 according to the sixth embodiment can more reliably achieve zero voltage soft switching without directly controlling the multiple switches 8 for zero voltage soft switching in the control device 51.

[0199] Furthermore, in the power conversion device 100 of embodiment 6, the control device 51 sets the shift time Ts to any time that is longer than the overlap time of the two-phase resonant currents and is equal to or less than the maximum value that can be set within one period of the carrier signal. Therefore, compared to the power conversion device 100 of embodiment 1, it is possible to distribute the period during which the resonant current flows through the resonant inductor L1, thereby reducing the thermal burden on the resonant inductor L1.

[0200] Seventh Embodiment The circuit configuration of the power conversion device 100 according to the seventh embodiment is the same as that of the power conversion device 100 according to the first embodiment (see FIG. 1 ), and therefore a circuit diagram thereof is omitted. The operation of the power conversion device 100 according to the seventh embodiment will be described below with reference to FIGS. 1 and 30 .

[0201] (1) Operation (1.1) Basic Operation The basic operation is the same as in the first embodiment, so a description thereof will be omitted.

[0202] (1.2) Shift Control In the power conversion device 100 according to the seventh embodiment, similarly to the power conversion device 100 according to the first embodiment, when the control device 51 determines that two-phase resonant currents corresponding to two of the multiple switching circuits 10 simultaneously flow through the resonant inductor L1, the control device 51 performs control to shift the on periods of the first switching element 1 and the second switching element 2 in one of the two switching circuits 10.

[0203] In this embodiment, when the control device 51 determines that two-phase resonant currents flow simultaneously, it sets the shift time Ts to the overlap time of the two-phase resonant currents + Tα. In this embodiment, the control device 51 sets Tα so that the overlap time of the two-phase resonant currents after the shift is zero. The value of Tα varies depending on how the two-phase resonant currents overlap when the control device 51 determines that two-phase resonant currents flow simultaneously.

[0204] Fig. 30 is a timing chart for explaining the operation of the power conversion device 100 according to the seventh embodiment. The upper part of Fig. 30 shows an example of a timing chart before the control device 51 performs shift control, and the lower part of Fig. 30 shows an example of a timing chart when the control device 51 performs shift control. More specifically, the upper part of Fig. 30 shows first control signals SU1, SU2, SV1, SV2, second control signals SU6, SU7, SV6, SV7, and current iL1 before performing shift control in a case where the control device 51 determines that two-phase resonant currents, U-phase and V-phase, flow simultaneously (in the upper part of Fig. 30, the current passing through the switch 8U and resonant inductor L1 and the current passing through the switch 8V and resonant inductor L1, are depicted separately). The lower part of Figure 30 illustrates the first control signals SU1, SU2, SV1, SV2, the second control signals SU6, SU7, SV6, SV7, and the current iL1 when the control device 51 shifts the longer high-level period of either the first control signal SU1 or the first control signal SV1 in a predetermined direction (in this embodiment, in a direction to delay on the time axis) by a shift time Ts (= Tov_uv + α). Shifting the longer high-level period of either the first control signal SU1 or the first control signal SV1 in a predetermined direction by the shift time Ts by the control device 51 means that the control device 51 shifts the on-period of the first switching element 1U of the switching circuit 10U in a predetermined direction by the shift time Ts. Note that Figure 30 illustrates a timing chart for one cycle of the carrier signal.

[0205] As can be seen from the waveform of current iL1 in the lower part of FIG. 30, the power conversion device 100 can suppress overlapping of the U-phase resonant current and the V-phase resonant current.

[0206] The above describes an example of shift control when the control device 51 determines that two-phase resonant currents, U-phase and V-phase, flow simultaneously (overlap). However, in both cases where two-phase resonant currents, U-phase and W-phase, flow simultaneously and where two-phase resonant currents, V-phase and W-phase, flow simultaneously, shift control is performed using the same concept (algorithm) as the shift control when it is determined that two-phase resonant currents, U-phase and V-phase, flow simultaneously.

[0207] (2) Advantages As with the power conversion device 100 according to the first embodiment, the power conversion device 100 according to the seventh embodiment can more reliably achieve zero voltage soft switching without directly controlling the multiple switches 8 for zero voltage soft switching in the control device 51.

[0208] (Embodiment 8) The circuit configuration of a power conversion device 100B according to embodiment 8 is the same as that of the power conversion device 100B according to embodiment 4 (see FIG. 21 ), and therefore a circuit diagram is omitted. Hereinafter, the operation of the power conversion device 100B according to embodiment 8 will be described with reference to FIGS. 21 and 31 .

[0209] (1) Operation (1.1) Basic Operation The basic operation is the same as in the fourth embodiment, so a description thereof will be omitted.

[0210] (1.2) Shift Control Fig. 31 is a timing chart for explaining the operation of the power conversion device 100B according to the eighth embodiment. The upper part of Fig. 31 shows an example of a timing chart before the control device 51B performs shift control, and the lower part of Fig. 31 shows an example of a timing chart when the control device 51B performs shift control. More specifically, the upper part of Fig. 31 shows the first control signals SU1, SU2, SV1, SV2, the second control signals SU6, SU7, SV6, SV7, and the current iL1 before performing shift control in a case where the control device 51B determines that two-phase resonant currents, U-phase and V-phase, flow simultaneously (the upper part of Fig. 31 depicts the current passing through the switch 8U and the resonant inductor L1 and the current passing through the switch 8V and the resonant inductor L1 separately). The lower part of Figure 31 illustrates the first control signals SU1, SU2, SV1, SV2, the second control signals SU6, SU7, SV6, SV7, and the current iL1 when the control device 51B shifts the shorter high-level period of either the first control signal SU1 or the first control signal SV1 in a predetermined direction (in this embodiment, in the direction of advancing the time axis) by the shift time Ts. Shifting the shorter high-level period of either the first control signal SU1 or the first control signal SV1 in a predetermined direction by the shift time Ts by the control device 51B means that the control device 51B shifts the on-period of the first switching element 1U of the switching circuit 10U in a predetermined direction by the shift time Ts. Note that Figure 31 illustrates a timing chart for one cycle of the carrier signal.

[0211] In this embodiment, when the control device 51B determines that two-phase resonant currents, U-phase and V-phase, flow simultaneously, it sets the shift time Ts to the overlap time Tov_uv+Tα. In this embodiment, the control device 51B sets Tα so that the overlap time of the two-phase resonant currents after the shift is zero. The value of Tα varies depending on how the two-phase resonant currents overlap when the control device 51B determines that two-phase resonant currents flow simultaneously.

[0212] As can be seen from the waveform of the current iL1 in the lower part of FIG. 31, the power conversion device 100B can suppress overlapping of the U-phase resonant current and the V-phase resonant current.

[0213] The above describes an example of shift control when the control device 51B determines that two-phase resonant currents, U-phase and V-phase, flow simultaneously (overlap). However, in both cases where two-phase resonant currents, U-phase and W-phase, flow simultaneously and where two-phase resonant currents, V-phase and W-phase, flow simultaneously, shift control is performed using the same concept (algorithm) as the shift control when it is determined that two-phase resonant currents, U-phase and V-phase, flow simultaneously.

[0214] (2) Advantages As with the power conversion device 100B according to the fourth embodiment, the power conversion device 100B according to the eighth embodiment can more reliably achieve zero voltage soft switching without directly controlling the multiple switches 8 for zero voltage soft switching in the control device 51B.

[0215] (Variation of Embodiment 8) In the power conversion device 100B according to the variation of the embodiment 8, the control device 51B may be configured to combine, for example, a shift control (first control mode) for shifting the on-period of each of the first switching element 1 and the second switching element 2 in one of the two switching circuits 10 in a direction to delay it on the time axis, similar to the control device 51B of the power conversion device 100B according to the embodiment 4, and a shift control (second control mode) for shifting the on-period of each of the first switching element 1 and the second switching element 2 in one of the two switching circuits 10 in a direction to advance it on the time axis, similar to the control device 51B of the power conversion device 100B according to the embodiment 8, and to execute the first control mode and the second control mode alternately or at any ratio.

[0216] In the power conversion device 100B according to the modification of the eighth embodiment, the tendency of the fluctuation amount and polarity of two-phase line voltages (e.g., UV line voltages) in the multiple phases changes when the first control mode is executed and when the second control mode is executed. Therefore, if the control device 51B executes only one of the first control mode and the second control mode, there is a possibility that the tendency of the line voltage fluctuations will become biased. In contrast, the power conversion device 100B according to the modification can reduce the bias of the line voltage fluctuations compared to when a single control mode is executed.

[0217] The shift control of the control device 51B of the power conversion device 100B according to the eighth embodiment may be combined with the shift control in the other embodiments, and in this case too, it is possible to reduce the bias in the operation and fluctuations in the line voltage.

[0218] Ninth Embodiment The circuit configuration of a power conversion device 100B according to a ninth embodiment is the same as that of the power conversion device 100B according to the fourth embodiment (see FIG. 21 ), and therefore a circuit diagram thereof is omitted. The operation of the power conversion device 100B according to the ninth embodiment will be described below with reference to FIGS. 21 and 32 .

[0219] (1) Operation (1.1) Basic Operation The basic operation is the same as in the fourth embodiment, so a description thereof will be omitted.

[0220] (1.2) Shift Control In the power conversion device 100B according to the ninth embodiment, the control device 51B sets the shift time Ts, which shifts the on-periods of the first switching element 1 and the second switching element 2 in a predetermined direction (in this embodiment, a direction to delay on the time axis), to any time that is longer than the overlap time of the two-phase resonant currents and equal to or less than the maximum value that can be set within one cycle of the carrier signal. The "maximum value that can be set within one cycle of the carrier signal" means the shift time when the time between the end of one cycle of the carrier signal and the end of the high-level period of the shifted first control signal is a specified time or zero.

[0221] Fig. 32 is a timing chart for explaining the operation of the power conversion device 100B according to the ninth embodiment. The upper part of Fig. 32 shows an example of a timing chart before the control device 51B performs shift control, and the lower part of Fig. 32 shows an example of a timing chart when the control device 51B performs shift control. More specifically, the upper part of Fig. 32 shows first control signals SU1, SU2, SV1, SV2, second control signals SU6, SU7, SV6, SV7, and current iL1 before performing shift control in a case where the control device 51B determines that two-phase resonant currents, U-phase and V-phase, flow simultaneously (the upper part of Fig. 32 shows the current passing through the switch 8U and resonant inductor L1 and the current passing through the switch 8V and resonant inductor L1, separately). The lower part of Figure 32 illustrates the first control signals SU1, SU2, SV1, SV2, the second control signals SU6, SU7, SV6, SV7, and the current iL1 when the control device 51B shifts the shorter high-level period of either the first control signal SU1 or the first control signal SV1 in a predetermined direction (in this embodiment, in a direction to delay on the time axis) by the shift time Ts. Shifting the shorter high-level period of either the first control signal SU1 or the first control signal SV1 in a predetermined direction by the shift time Ts by the control device 51B means that the control device 51B shifts the on-period of the first switching element 1U of the switching circuit 10U in a predetermined direction by the shift time Ts. Note that Figure 32 illustrates a timing chart for one cycle of the carrier signal.

[0222] The example of Figure 32 is an example in which, when the control device 51B determines that two-phase resonant currents, U phase and V phase, are flowing simultaneously, the shift time Ts is set to the maximum value that can be set within one period of the carrier signal, which is longer than the overlap time Tov_uv.

[0223] As can be seen from the waveform of the current iL1 in the lower part of FIG. 32, the power conversion device 100B can suppress overlapping of the U-phase resonant current and the V-phase resonant current.

[0224] The above describes an example of shift control when the control device 51B determines that two-phase resonant currents, U-phase and V-phase, flow simultaneously (overlap). However, in both cases where two-phase resonant currents, U-phase and W-phase, flow simultaneously and where two-phase resonant currents, V-phase and W-phase, flow simultaneously, shift control is performed using the same concept (algorithm) as the shift control when it is determined that two-phase resonant currents, U-phase and V-phase, flow simultaneously.

[0225] (2) Advantages As with the power conversion device 100B according to the fourth embodiment, the power conversion device 100B according to the ninth embodiment can more reliably achieve zero voltage soft switching without directly controlling the multiple switches 8 for zero voltage soft switching in the control device 51B.

[0226] Furthermore, in the power conversion device 100B of embodiment 9, the control device 51B sets the shift time Ts to any time that is longer than the overlap time of the two-phase resonant currents and is equal to or less than the maximum value that can be set within one period of the carrier signal. Therefore, compared to the power conversion device 100B of embodiment 4, it is possible to distribute the period during which the resonant current flows through the resonant inductor L1, thereby reducing the thermal burden on the resonant inductor L1.

[0227] Tenth Embodiment The circuit configuration of a power conversion device 100B according to a tenth embodiment is the same as that of the power conversion device 100B according to the fourth embodiment (see FIG. 21 ), and therefore a circuit diagram thereof is omitted. The operation of the power conversion device 100B according to the tenth embodiment will be described below with reference to FIGS. 21 and 33 .

[0228] (1) Operation (1.1) Basic Operation The basic operation is the same as in the fourth embodiment, so a description thereof will be omitted.

[0229] (1.2) Shift Control Fig. 33 is a timing chart for explaining the operation of the power conversion device 100B according to embodiment 10. The upper part of Fig. 33 shows an example of a timing chart before the control device 51B performs shift control, and the lower part of Fig. 33 shows an example of a timing chart when the control device 51B performs shift control. More specifically, the upper part of Fig. 33 shows the first control signals SU1, SU2, SV1, SV2, the second control signals SU6, SU7, SV6, SV7, and the current iL1 before performing shift control in a case where the control device 51B determines that two-phase resonant currents, U-phase and V-phase, flow simultaneously (the upper part of Fig. 33 shows the current passing through the switch 8U and the resonant inductor L1 and the current passing through the switch 8V and the resonant inductor L1, separately). The lower part of Figure 33 illustrates the first control signals SU1, SU2, SV1, SV2, the second control signals SU6, SU7, SV6, SV7, and the current iL1 when the control device 51B shifts the high-level period of the first control signal SU1 or the first control signal SV1, whichever has the longer high-level period, in a predetermined direction (in this embodiment, in a direction to delay it on the time axis) by the shift time Ts. Shifting the high-level period of the first control signal SU1 or the first control signal SV1, whichever has the longer high-level period, in the predetermined direction by the shift time Ts by the control device 51B means that the control device 51B shifts the on-period of the first switching element 1U of the switching circuit 10U in the predetermined direction by the shift time Ts. Note that Figure 33 illustrates a timing chart for one cycle of the carrier signal.

[0230] In this embodiment, when the control device 51B determines that two-phase resonant currents, U-phase and V-phase, flow simultaneously, it sets the shift time Ts to the overlap time Tov_uv+Tα. In this embodiment, the control device 51B sets Tα so that the overlap time of the two-phase resonant currents after the shift is zero. The value of Tα varies depending on how the two-phase resonant currents overlap when the control device 51B determines that two-phase resonant currents flow simultaneously.

[0231] As can be seen from the waveform of current iL1 in the lower part of FIG. 33, the power conversion device 100B can suppress overlapping of the U-phase resonant current and the V-phase resonant current.

[0232] The above describes an example of shift control when the control device 51B determines that two-phase resonant currents, U-phase and V-phase, flow simultaneously (overlap). However, in both cases where two-phase resonant currents, U-phase and W-phase, flow simultaneously and where two-phase resonant currents, V-phase and W-phase, flow simultaneously, shift control is performed using the same concept (algorithm) as the shift control when it is determined that two-phase resonant currents, U-phase and V-phase, flow simultaneously.

[0233] (2) Advantages As with the power conversion device 100B according to the fourth embodiment, the power conversion device 100B according to the tenth embodiment can more reliably achieve zero voltage soft switching without directly controlling the multiple switches 8 for zero voltage soft switching in the control device 51B.

[0234] (Embodiment 11) The circuit configuration of a power conversion device 100C according to embodiment 11 is the same as that of the power conversion device 100C according to embodiment 5 (see FIG. 25), and therefore a circuit diagram is omitted. Hereinafter, the operation of the power conversion device 100C according to embodiment 11 will be described with reference to FIGS. 25 and 34.

[0235] (1) Operation (1.1) Basic Operation The basic operation is the same as in the fifth embodiment, and therefore a description thereof will be omitted.

[0236] (1.2) Shift Control Fig. 34 is a timing chart for explaining the operation of the power conversion device 100C according to embodiment 11. The upper part of Fig. 34 shows an example of a timing chart before the control device 51C performs shift control, and the lower part of Fig. 34 shows an example of a timing chart when the control device 51C performs shift control. More specifically, the upper part of Fig. 34 shows the first control signals SU1, SU2, SV1, SV2, the second control signals SU6, SU7, SV6, SV7, and the current iL1 before performing shift control in a case where the control device 51C determines that two-phase resonant currents, U-phase and V-phase, flow simultaneously (the upper part of Fig. 34 depicts the current passing through the switch 8U and the resonant inductor L1 and the current passing through the switch 8V and the resonant inductor L1, separately). The lower part of Figure 34 illustrates the first control signals SU1, SU2, SV1, SV2, the second control signals SU6, SU7, SV6, SV7, and the current iL1 when the control device 51C shifts the shorter high-level period of either the first control signal SU1 or the first control signal SV1 in a predetermined direction (in this embodiment, moving it forward on the time axis) by the shift time Ts. Shifting the shorter high-level period of either the first control signal SU1 or the first control signal SV1 in a predetermined direction by the shift time Ts by the control device 51C means that the control device 51C shifts the on-period of the first switching element 1U of the switching circuit 10U in a predetermined direction by the shift time Ts. Note that Figure 34 illustrates a timing chart for one cycle of the carrier signal.

[0237] In this embodiment, when the control device 51C determines that two-phase resonant currents, U-phase and V-phase, flow simultaneously, it sets the shift time Ts to the overlap time Tov_uv+Tα. In this embodiment, the control device 51C sets Tα so that the overlap time of the two-phase resonant currents after the shift is zero. The value of Tα varies depending on how the two-phase resonant currents overlap when the control device 51C determines that two-phase resonant currents flow simultaneously.

[0238] As can be seen from the waveform of the current iL1 in the lower part of FIG. 34, the power conversion device 100C can suppress overlapping of the U-phase resonant current and the V-phase resonant current.

[0239] The above describes an example of shift control when the control device 51C determines that two-phase resonant currents, U-phase and V-phase, flow simultaneously (overlap). However, in both cases where two-phase resonant currents, U-phase and W-phase, flow simultaneously and where two-phase resonant currents, V-phase and W-phase, flow simultaneously, shift control is performed using the same concept (algorithm) as the shift control when it is determined that two-phase resonant currents, U-phase and V-phase, flow simultaneously.

[0240] (2) Advantages As with the power conversion device 100C according to the fifth embodiment, the power conversion device 100C according to the eleventh embodiment can more reliably achieve zero voltage soft switching without directly controlling the multiple switches 8 for zero voltage soft switching in the control device 51C.

[0241] (Variation of Embodiment 11) In a power conversion device 100C according to a variation of the embodiment 11, the control device 51C may be configured to combine, for example, a shift control (first control mode) for shifting the on-period of each of the first switching element 1 and the second switching element 2 in a direction to delay it on the time axis, similar to the control device 51C of the power conversion device 100C according to embodiment 5, and a shift control (second control mode) for shifting the on-period of each of the first switching element 1 and the second switching element 2 in a direction to advance it on the time axis, similar to the control device 51C of the power conversion device 100C according to embodiment 11, and to execute the first control mode and the second control mode alternately or at any ratio.

[0242] In the power conversion device 100C according to the modification of the eleventh embodiment, the tendency of the fluctuation amount and polarity of the two-phase line voltage (UV line voltage) in the multiple phases changes when the first control mode is executed and when the second control mode is executed. Therefore, if the control device 51C executes only one of the first control mode and the second control mode, there is a possibility that the tendency of the line voltage fluctuation will become biased. In contrast, the power conversion device 100C according to the modification can reduce the bias of the line voltage fluctuation compared to when a single control mode is executed.

[0243] (Twelfth embodiment) The circuit configuration of a power conversion device 100C according to a twelfth embodiment is the same as that of the power conversion device 100C according to the fifth embodiment (see FIG. 25), and therefore a circuit diagram thereof will not be shown. The operation of the power conversion device 100C according to the eleventh embodiment will be described below with reference to FIGS. 25 and 35.

[0244] (1) Operation (1.1) Basic Operation The basic operation is the same as in the fifth embodiment, and therefore a description thereof will be omitted.

[0245] (1.2) Shift Control In the power conversion device 100C according to the twelfth embodiment, the control device 51C sets the shift time Ts, which shifts the on-periods of the first switching element 1 and the second switching element 2 in a predetermined direction (in this embodiment, a direction to delay on the time axis), to any time that is longer than the overlap time of the two-phase resonant currents and equal to or less than the maximum value that can be set within one cycle of the carrier signal. The "maximum value that can be set within one cycle of the carrier signal" means the shift time when the time between the end of one cycle of the carrier signal and the end of the high-level period of the shifted first control signal is a specified time or zero.

[0246] Fig. 35 is a timing chart for explaining the operation of the power conversion device 100C according to embodiment 12. The upper part of Fig. 35 shows an example of a timing chart before the control device 51C performs shift control, and the lower part of Fig. 35 shows an example of a timing chart when the control device 51C performs shift control. More specifically, the upper part of Fig. 35 shows first control signals SU1, SU2, SV1, SV2, second control signals SU6, SU7, SV6, SV7, and current iL1 before performing shift control in a case where the control device 51C determines that two-phase resonant currents, U-phase and V-phase, flow simultaneously (the upper part of Fig. 35 depicts the current passing through the switch 8U and resonant inductor L1 and the current passing through the switch 8V and resonant inductor L1 separately). The lower part of Figure 35 illustrates the first control signals SU1, SU2, SV1, SV2, the second control signals SU6, SU7, SV6, SV7, and the current iL1 when the control device 51C shifts the shorter high-level period of either the first control signal SU1 or the first control signal SV1 in a predetermined direction (in this embodiment, in a direction to delay on the time axis) by the shift time Ts. Shifting the shorter high-level period of either the first control signal SU1 or the first control signal SV1 in a predetermined direction by the shift time Ts by the control device 51C means that the control device 51C shifts the on-period of the first switching element 1U of the switching circuit 10U in a predetermined direction by the shift time Ts. Note that Figure 35 illustrates a timing chart for one cycle of the carrier signal.

[0247] The example of Figure 35 is an example in which, when the control device 51C determines that two-phase resonant currents, U phase and V phase, are flowing simultaneously, the shift time Ts is set to the maximum value that can be set within one period of the carrier signal, which is longer than the overlap time Tov_uv.

[0248] As can be seen from the waveform of the current iL1 in the lower part of FIG. 35, the power conversion device 100C can suppress overlapping of the U-phase resonant current and the V-phase resonant current.

[0249] The above describes an example of shift control when the control device 51C determines that two-phase resonant currents, U-phase and V-phase, flow simultaneously (overlap). However, in both cases where two-phase resonant currents, U-phase and W-phase, flow simultaneously and where two-phase resonant currents, V-phase and W-phase, flow simultaneously, shift control is performed using the same concept (algorithm) as the shift control when it is determined that two-phase resonant currents, U-phase and V-phase, flow simultaneously.

[0250] (2) Advantages As with the power conversion device 100C according to the fifth embodiment, the power conversion device 100C according to the twelfth embodiment can more reliably achieve zero voltage soft switching without directly controlling the multiple switches 8 for zero voltage soft switching in the control device 51C.

[0251] Furthermore, in the power conversion device 100C of embodiment 12, the control device 51C sets the shift time Ts to any time that is longer than the overlap time of the two-phase resonant currents and is equal to or less than the maximum value that can be set within one period of the carrier signal. Therefore, compared to the power conversion device 100C of embodiment 5, it is possible to distribute the period during which the resonant current flows through the resonant inductor L1, thereby reducing the thermal burden on the resonant inductor L1.

[0252] (Embodiment 13) The circuit configuration of a power conversion device 100C according to embodiment 13 is the same as that of the power conversion device 100C according to embodiment 5 (see FIG. 25), and therefore a circuit diagram thereof will be omitted. The operation of the power conversion device 100C according to embodiment 11 will be described below with reference to FIGS. 25 and 36.

[0253] (1) Operation (1.1) Basic Operation The basic operation is the same as in the fifth embodiment, and therefore a description thereof will be omitted.

[0254] (1.2) Shift Control Fig. 36 is a timing chart for explaining the operation of the power conversion device 100C according to embodiment 13. The upper part of Fig. 36 shows an example of a timing chart before the control device 51C performs shift control, and the lower part of Fig. 36 shows an example of a timing chart when the control device 51C performs shift control. More specifically, the upper part of Fig. 36 shows the first control signals SU1, SU2, SV1, SV2, the second control signals SU6, SU7, SV6, SV7, and the current iL1 before performing shift control in a case where the control device 51C determines that two-phase resonant currents, U-phase and V-phase, flow simultaneously (the upper part of Fig. 36 depicts the current passing through the switch 8U and the resonant inductor L1 and the current passing through the switch 8V and the resonant inductor L1 separately). The lower part of Figure 36 illustrates the first control signals SU1, SU2, SV1, SV2, the second control signals SU6, SU7, SV6, SV7, and the current iL1 when the control device 51C shifts the high-level period of the first control signal SU1 or the first control signal SV1, whichever has the longer high-level period, by the shift time Ts in a predetermined direction (in this embodiment, in the direction of delaying the high-level period on the time axis). Shifting the high-level period of the first control signal SU1 or the first control signal SV1, whichever has the longer high-level period, by the shift time Ts in the predetermined direction by the control device 51C means that the control device 51C shifts the on-period of the first switching element 1U of the switching circuit 10U in the predetermined direction by the shift time Ts. Note that Figure 36 illustrates a timing chart for one cycle of the carrier signal.

[0255] In this embodiment, when the control device 51C determines that two-phase resonant currents, U-phase and V-phase, flow simultaneously, it sets the shift time Ts to the overlap time Tov_uv+Tα. In this embodiment, the control device 51C sets Tα so that the overlap time of the two-phase resonant currents after the shift is zero. The value of Tα varies depending on how the two-phase resonant currents overlap when the control device 51C determines that two-phase resonant currents flow simultaneously.

[0256] As can be seen from the waveform of the current iL1 in the lower part of FIG. 36, the power conversion device 100C can suppress overlapping of the U-phase resonant current and the V-phase resonant current.

[0257] The above describes an example of shift control when the control device 51C determines that two-phase resonant currents, U-phase and V-phase, flow simultaneously (overlap). However, in both cases where two-phase resonant currents, U-phase and W-phase, flow simultaneously and where two-phase resonant currents, V-phase and W-phase, flow simultaneously, shift control is performed using the same concept (algorithm) as the shift control when it is determined that two-phase resonant currents, U-phase and V-phase, flow simultaneously.

[0258] (2) Advantages As with the power conversion device 100C according to the fifth embodiment, the power conversion device 100C according to the thirteenth embodiment can more reliably achieve zero voltage soft switching without directly controlling the multiple switches 8 for zero voltage soft switching in the control device 51C.

[0259] (Fourteenth embodiment) A power conversion device 100 according to a fourteenth embodiment will be described with reference to Fig. 37. That is, Fig. 37 is a circuit diagram of a system including the power conversion device 100 according to the fourteenth embodiment. With regard to the power conversion device 100 according to the fourteenth embodiment, components that are the same as those of the power conversion device 100 according to the first embodiment (see Fig. 1) are denoted by the same reference numerals, and description thereof will be omitted.

[0260] In the power conversion device 100 according to the fourteenth embodiment, in each of the plurality of switches 8, the third switching element 6 and the fourth switching element 7 are connected in anti-series. In the power conversion device 100 according to the fourteenth embodiment, in each of the plurality of switches 8, the second main terminal (emitter terminal) of the third switching element 6 and the second main terminal (emitter terminal) of the fourth switching element 7 are connected, the first main terminal (collector terminal) of the third switching element 6 is connected to the connection point 3 of a corresponding one of the plurality of switching circuits 10, and the first terminal (collector terminal) of the fourth switching element 7 is connected to the resonance inductor L1. Each of the plurality of switches 8 further includes a diode 61 connected in anti-parallel to the third switching element 6 and a diode 71 connected in anti-parallel to the fourth switching element 7.

[0261] The power conversion device 100 according to the fourteenth embodiment has the same advantages as the power conversion device 100 according to the first embodiment.

[0262] In the power conversion device 100 according to the fourteenth embodiment, each of the third switching element 6 and the fourth switching element 7 may be replaced with a MOSFET or a bipolar transistor. In this case, the diode 61 and the diode 71 in FIG. 37 may be substituted with a parasitic diode of the replaced element, or an element built into the chip of the replaced element. Furthermore, in the power conversion device 100 according to the fourteenth embodiment, the diode 61 and the diode 71 are not limited to being externally attached to the third switching element 6 and the fourth switching element 7, respectively, and may be built into the chip.

[0263] (Embodiment 15) A power conversion device 100 according to embodiment 15 will be described with reference to Fig. 38. That is, Fig. 38 is a circuit diagram of a system including the power conversion device 100 according to embodiment 15. With regard to the power conversion device 100 according to embodiment 15, components that are the same as those of the power conversion device 100 according to embodiment 1 (see Fig. 1) are denoted by the same reference numerals, and descriptions thereof will be omitted.

[0264] In the power conversion device 100 according to the fifteenth embodiment, in each of the multiple switches 8, the third switching element 6 and the fourth switching element 7 are each a MOSFET, and the third switching element 6 and the fourth switching element 7 are connected in anti-series. In the power conversion device 100 according to the fifteenth embodiment, in each of the multiple switches 8, a first main terminal (drain terminal) of the third switching element 6 is connected to a first main terminal (drain terminal) of the fourth switching element 7. Each of the multiple switches 8 further includes a diode 61 connected in anti-parallel to the third switching element 6 and a diode 71 connected in anti-parallel to the fourth switching element 7. In each of the multiple switches 8, a second main terminal (source terminal) of the fourth switching element 7 is connected to a resonance inductor L1. In each of the multiple switches 8, a second main terminal (source terminal) of the third switching element 6 is connected to a connection point 3 of a switching circuit 10 corresponding to the switch 8 having the third switching element 6.

[0265] The power conversion device 100 according to the fifteenth embodiment has the same advantages as the power conversion device 100 according to the first embodiment.

[0266] (Embodiment 16) A power conversion device 100 according to embodiment 16 will be described with reference to Fig. 39. That is, Fig. 39 is a circuit diagram of a system including the power conversion device 100 according to embodiment 16. With regard to the power conversion device 100 according to embodiment 16, components that are the same as those of the power conversion device 100 according to embodiment 1 (see Fig. 1) are denoted by the same reference numerals, and descriptions thereof will be omitted.

[0267] In the power conversion device 100 according to the sixteenth embodiment, in each of the plurality of switches 8, the third switching element 6 and the fourth switching element 7 are each a MOSFET, a diode 63 is connected in series to the third switching element 6, and a diode 73 is connected in series to the fourth switching element 7. In the power conversion device 100 according to the sixteenth embodiment, in each of the plurality of switches 8, a series circuit of the third switching element 6 and the diode 63 and a series circuit of the fourth switching element 7 and the diode 73 are connected in anti-parallel.

[0268] The power conversion device 100 according to the sixteenth embodiment has the same advantages as the power conversion device 100 according to the first embodiment.

[0269] (Seventeenth embodiment) A power conversion device 100D according to a seventeenth embodiment will be described with reference to Fig. 40. That is, Fig. 40 is a circuit diagram of a system including the power conversion device 100D according to the seventeenth embodiment. With regard to the power conversion device 100D according to the seventeenth embodiment, components that are the same as those of the power conversion device 100 according to the first embodiment (see Fig. 1) are denoted by the same reference numerals, and description thereof will be omitted.

[0270] In a power conversion device 100D according to the seventeenth embodiment, each of the multiple switches 8 includes one MOSFET 80, a diode 83 connected in anti-parallel to the MOSFET 80, a series circuit of two diodes 84 and 85 connected in anti-parallel to the MOSFET 80, and a series circuit of two diodes 86 and 87 connected in anti-parallel to the MOSFET 80. In each of the multiple switches 8, a connection point between the diode 84 and the diode 85 in the switch 8 (a first end 81 of the switch 8) is connected to a connection point 3 of a corresponding switching circuit 10 among the multiple switching circuits 10, and a connection point between the diode 86 and the diode 87 (a second end 82 of the switch 8) is connected to the common connection point 25. In each of the switches 8, when the MOSFET 80 is in an on state, the switch 8 is in an on state, and when the MOSFET 80 is in an off state, the switch 8 is in an off state.

[0271] The power conversion device 100D according to the seventeenth embodiment includes a signal generation circuit 52D instead of the signal generation circuit 52 (see FIGS. 1 and 2) of the power conversion device 100 according to the first embodiment.

[0272] The MOSFETs 80 of the multiple switches 8 are controlled by a signal generation circuit 52D. The signal generation circuit 52D outputs a second control signal SU8 that controls the on / off state of the MOSFET 80 of the switch 8U, a second control signal SV8 that controls the on / off state of the MOSFET 80 of the switch 8V, and a second control signal SW8 that controls the on / off state of the MOSFET 80 of the switch 8W. The signal generation circuit 52D generates the second control signal SU8 using the first control signals SU1 and SU2. The signal generation circuit 52D also generates the second control signal SV8 using the first control signals SV1 and SV2. The signal generation circuit 52D generates the second control signal SW8 using the first control signals SW1 and SW2.

[0273] In the switch 8, when the MOSFET 80 is in the on state, a resonant current flows due to a resonant circuit including the resonant inductor L1 and the resonant capacitor 9. In the power conversion device 100D according to the seventeenth embodiment, when one of the multiple switches 8 is in the on state, a charging current including the resonant current flows through the path of the regenerative capacitor 15, the resonant inductor L1, the diode 86, the MOSFET 80, the diode 85, and the resonant capacitor 9. In addition, in the power conversion device 100D according to the seventeenth embodiment, when one of the multiple switches 8 is in the on state, a discharging current including the resonant current flows through the path of the resonant capacitor 9, the diode 84, the MOSFET 80, the diode 87, the resonant inductor L1, and the regenerative capacitor 15.

[0274] The power conversion device 100D according to the seventeenth embodiment has the same advantages as the power conversion device 100 according to the first embodiment.

[0275] In the power conversion device 100D according to the seventeenth embodiment, each of the plurality of MOSFETs 80 may be replaced with an IGBT. Furthermore, in the power conversion device 100D according to the seventeenth embodiment, each of the plurality of switches 8 may include, instead of the MOSFET 80, a bipolar transistor or a GaN-based GIT (Gate Injection Transistor), for example.

[0276] (Embodiment 18) A power conversion device 100 according to embodiment 18 will be described with reference to Fig. 41. That is, Fig. 41 is a circuit diagram of a system including the power conversion device 100 according to embodiment 18. With regard to the power conversion device 100 according to embodiment 18, components that are the same as those of the power conversion device 100 according to embodiment 1 (see Fig. 1) are denoted by the same reference numerals, and descriptions thereof will be omitted.

[0277] In the power conversion device 100 according to the eighteenth embodiment, each of the multiple switches 8 is a dual-gate GaN-based GIT having a first source terminal, a first gate terminal, a second gate terminal, and a second source terminal. In the power conversion device 100 according to the eighteenth embodiment, a second control signal SU6 is applied between the first gate terminal and the first source terminal of the dual-gate GaN-based GIT constituting the switch 8U, and a second control signal SU7 is applied between the second gate terminal and the second source terminal of the dual-gate GaN-based GIT constituting the switch 8V. A second control signal SV6 is applied between the first gate terminal and the first source terminal of the dual-gate GaN-based GIT constituting the switch 8V, and a second control signal SV7 is applied between the second gate terminal and the second source terminal of the dual-gate GaN-based GIT constituting the switch 8W. A second control signal SW6 is applied between the first gate terminal and the first source terminal of the dual-gate GaN-based GIT, and a second control signal SW7 is applied between the second gate terminal and the second source terminal of the dual-gate GaN-based GIT constituting the switch 8W.

[0278] The power conversion device 100 according to the eighteenth embodiment has the same advantages as the power conversion device 100 according to the first embodiment.

[0279] (Embodiment 19) A power conversion device 100E according to embodiment 19 will be described with reference to Fig. 42. That is, Fig. 42 is a circuit diagram of a system including the power conversion device 100E according to embodiment 19. With respect to the power conversion device 100E according to embodiment 19, components that are the same as those of the power conversion device 100 according to embodiment 1 (see Fig. 1) are denoted by the same reference numerals, and description thereof will be omitted.

[0280] (1) Configuration The power conversion device 100E differs from the power conversion device 100 in that it further includes a regenerative capacitor 16 (hereinafter also referred to as the second regenerative capacitor 16) connected between the sixth end 154 of the regenerative capacitor 15 (hereinafter also referred to as the first regenerative capacitor 15) and the first DC terminal 31.

[0281] The second regenerative capacitor 16 is connected in series to the first regenerative capacitor 15. Therefore, in the power conversion device 100F, a series circuit of the second regenerative capacitor 16 and the first regenerative capacitor 15 is connected between the first DC terminal 31 and the second DC terminal 32. In the power conversion device 100E, a plurality of resonant inductors L1 are connected to a path between the first regenerative capacitor 15 and the second regenerative capacitor 16. The capacitance of the second regenerative capacitor 16 is the same as the capacitance of the first regenerative capacitor 15. The phrase "the capacitance of the second regenerative capacitor 16 is the same as the capacitance of the first regenerative capacitor 15" does not necessarily mean that the capacitance of the second regenerative capacitor 16 exactly matches the capacitance of the first regenerative capacitor 15, but may mean that the capacitance of the second regenerative capacitor 16 is within a range of 95% to 105% of the capacitance of the first regenerative capacitor 15.

[0282] In the power conversion device 100E according to the nineteenth embodiment, the voltage V15 of the first regeneration capacitor 15 (the potential at the sixth terminal 154 of the first regeneration capacitor 15) is equal to the value obtained by dividing the voltage Vd of the DC power supply E1 between the second regeneration capacitor 16 and the first regeneration capacitor 15. Therefore, the voltage V15 of the first regeneration capacitor 15 is approximately Vd / 2. In the power conversion device 100E according to the eleventh embodiment, the control device 51 may store the value of the voltage V15 of the first regeneration capacitor 15 in advance.

[0283] (2) Advantages The operation of the control device 51 and the signal generating circuit 52 of the power conversion device 100E according to the 19th embodiment is similar to the operation of the control device 51 and the signal generating circuit 52 of the power conversion device 100 according to the 19th embodiment. Therefore, similar to the power conversion device 100 according to the 19th embodiment, the power conversion device 100E according to the 19th embodiment can more reliably achieve zero voltage soft switching without directly controlling the multiple switches 8 for zero voltage soft switching in the control device 51.

[0284] (Twentyth Embodiment) A power conversion device 100F according to a twentieth embodiment will be described with reference to Fig. 43. That is, Fig. 43 is a circuit diagram of a system including the power conversion device 100F according to the twentieth embodiment. With regard to the power conversion device 100F according to the twentieth embodiment, components that are the same as those of the power conversion device 100 according to the first embodiment (see Fig. 1) are denoted by the same reference numerals, and description thereof will be omitted.

[0285] (1) Configuration The power conversion device 100F differs from the power conversion device 100 in that the sixth end 154 of the regenerative capacitor 15 is connected to the first DC terminal 31.

[0286] (2) Operation The operation of the control device 51 and the signal generating circuit 52 of the power conversion device 100F according to the twentieth embodiment is similar to the operation of the control device 51 and the signal generating circuit 52 of the power conversion device 100 according to the first embodiment.

[0287] (3) Advantages As with the power conversion device 100 according to the first embodiment, the power conversion device 100F according to the twentieth embodiment can more reliably achieve zero voltage soft switching without directly controlling the multiple switches 8 for zero voltage soft switching in the control device 51.

[0288] (Other Modifications) The above-described embodiments 1 to 20 are merely examples of various embodiments of the present disclosure. The above-described embodiments 1 to 20 can be modified in various ways depending on the design, etc., as long as the object of the present disclosure can be achieved.

[0289] For example, the signal generating circuits 52, 52A, 52C, and 52D may be configured to generate a second control signal for each of the multiple switches 8 using one of the first control signal to the first switching element 1 and the first control signal to the second switching element 2 of a corresponding switching circuit 10 among the multiple switching circuits 10.

[0290] In the power conversion device 100 according to the first embodiment, the diode 61 and the diode 71 are not limited to being externally attached to the third switching element 6 and the fourth switching element 7, respectively, but may also be elements built into one chip.

[0291] In addition, in the power conversion devices 100A to 100C according to embodiments 2 to 13, the configuration of the switch 8 is the same as the configuration of the switch 8 in the power conversion device 100 according to embodiment 1, but may be the same as the configuration of the switch 8 in any of embodiments 14 to 18.

[0292] Furthermore, the power conversion devices 100, 100B to 100F may not be provided with the first clamp diode 13 and the second clamp diode 14.

[0293] Furthermore, in the power conversion devices 100, 100A to 100F, if the capacitance of each of the multiple resonant capacitors 9 is relatively small, instead of attaching the multiple resonant capacitors 9 externally, the parasitic capacitance between both ends of the multiple second switching elements 2 may also serve as the multiple resonant capacitors 9.

[0294] The length of the resonance half cycle is set to be the same as the length of the first dead time period Td1, but may be different from the length of the first dead time period Td1. In either case, however, it is desirable that the end point of the resonance half cycle coincides with the end point of the first dead time period Td1.

[0295] Furthermore, the power conversion devices 100, 100A to 100F are not limited to a configuration that outputs three-phase AC, but may be configured to output polyphase AC with three or more phases.

[0296] (Aspects) The following aspects are disclosed in this specification.

[0297] A power conversion device (100; 100A; 100B; 100C; 100D; 100E; 100F) according to a first aspect includes a first DC terminal (31), a second DC terminal (32), a power conversion circuit (11), a plurality of AC terminals (41), a plurality of switches (8), a plurality of resonant capacitors (9), a resonant inductor (L1), a regenerative capacitor (15), a control device (51; 51B; 51C), and a signal generation circuit (52; 52A; 52D). The power conversion circuit (11) has a plurality of first switching elements (1) and a plurality of second switching elements (2). In the power conversion circuit (11), a plurality of switching circuits (10), each including a plurality of first switching elements (1) and a plurality of second switching elements (2) connected in series in a one-to-one relationship, are connected in parallel to each other. In the power conversion circuit (11), a plurality of first switching elements (1) are connected to a first DC terminal (31). In the power conversion circuit (11), a plurality of second switching elements (2) are connected to a second DC terminal (32). The plurality of AC terminals (41) correspond one-to-one to the plurality of switching circuits (10). Each of the plurality of AC terminals (41) is connected to a connection point (3) between the first switching element (1) and the second switching element (2) in a corresponding one of the plurality of switching circuits (10), through which a load current flows. The plurality of switches (8) correspond one-to-one to the plurality of switching circuits (10). Each of the plurality of switches (8) has a first end (81) connected to the connection point (3) between the first switching element (1) and the second switching element (2) in a corresponding one of the plurality of switching circuits (10), and a second end (82) connected to a common connection point (25). The plurality of resonant capacitors (9) correspond one-to-one to the plurality of switches (8). Each of the plurality of resonant capacitors (9) is connected between a first end (81) of a corresponding switch (8) among the plurality of switches (8) and a second DC terminal (32). The resonant inductor (L1) has a third end and a fourth end. The third end of the resonant inductor (L1) is connected to the common connection point (25). The regenerative capacitor (15) has a fifth end (153) and a sixth end (154).The regenerative capacitor (15) has a fifth terminal (153) connected to the second DC terminal (32) and a sixth terminal (154) connected to the fourth terminal of the resonant inductor (L1). The control device (51; 51B; 51C) provides a first control signal, the potential of which changes between high and low, to each of the plurality of first switching elements (1) and the plurality of second switching elements (2). The signal generating circuit (52; 52A; 52D) provides a second control signal, the potential of which changes between high and low, to each of the plurality of switches (8). The control device (51; 51B; 51C) sets a second dead time period (Td2) for each of the multiple switching circuits (10) by adding a predetermined time (additional time Tad) to a first dead time period (Td1) that is set in advance so that the on periods of the first switching element (1) and the second switching element (2) do not overlap between a high-level period of a first control signal to the first switching element (1) and a high-level period of a first control signal to the second switching element (2). The predetermined time (additional time Tad) is determined based on the current value of the load current, the inductance of the resonance inductor (L1), and the voltage value of the regenerative capacitor (15). The signal generating circuit (52; 52A; 52D) generates, for each of the multiple switches (8), a second control signal having a high-level period corresponding to the second dead time period (Td2) for a corresponding switching circuit (10) among the multiple switching circuits (10). When the control device (51; 51B; 51C) determines that two-phase resonant currents corresponding to two of the multiple switching circuits (10) simultaneously flow through the resonant inductor (L1), the control device (51; 51B; 51C) performs control to shift the on periods of the first switching element (1) and the second switching element (2) in one of the two switching circuits (10).

[0298] According to this aspect, the zero voltage soft switching can be realized more reliably without directly controlling the plurality of switches (8) for the zero voltage soft switching in the control device (51; 51B; 51C).

[0299] In the power conversion device (100; 100A; 100E; 100F) according to the second aspect, in the first aspect, when the control device (51) sets the second dead time period (Td2) for each of the plurality of switching circuits (10), if the polarity of the load current is positive, it adds a predetermined time (additional time Tad) to the first dead time period (Td1) by shortening the high-level period of the first control signal to the second switching element (2), and if the polarity of the load current is negative, it adds the predetermined time (additional time Tad) to the first dead time period (Td1) by shortening the high-level period of the first control signal to the first switching element (1).

[0300] According to this aspect, it is possible to achieve zero-voltage soft switching while further reducing the dead-time loss and the dead-time error.

[0301] In the power conversion device (100B) according to the third aspect, in the first aspect, when the control device (51B) sets the second dead time period (Td2) for each of the plurality of switching circuits (10), if the polarity of the load current is positive, the control device (51B) advances the end point of the high-level period of the first control signal to the second switching element (2) and delays the start point of the high-level period of the first control signal to the first switching element (1), thereby adding a predetermined time (Ta11+Ta21) to the first dead time period (Td1), and if the polarity of the load current is negative, the control device (51B) advances the end point of the high-level period of the first control signal to the first switching element (1) and delays the start point of the high-level period of the first control signal to the second switching element (2), thereby adding a predetermined time (Ta12+Ta22) to the first dead time period (Td1).

[0302] According to this aspect, it is possible to achieve zero voltage soft switching while reducing dead time loss and dead time error.

[0303] In the power conversion device (100C) according to the fourth aspect, in the first aspect, when the control device (51B) sets the second dead time period (Td2) for each of the plurality of switching circuits (10), if the polarity of the load current is positive, it adds a predetermined time (additional time Tad) to the first dead time period (Td1) by shortening the high-level period of the first control signal to the first switching element (1), and if the polarity of the load current is negative, it adds a predetermined time (additional time Tad) to the first dead time period (Td1) by shortening the high-level period of the first control signal to the second switching element (2).

[0304] According to this embodiment, it is possible to realize zero-voltage soft switching.

[0305] In a power conversion device (100; 100A; 100B; 100C; 100D; 100E; 100F) according to a fifth aspect, in any one of the first to fourth aspects, the signal generation circuit (52; 52A; 52D) generates a second control signal for each of the plurality of switches (8) using at least one of a first control signal to a first switching element (1) and a first control signal to a second switching element (2) of a corresponding switching circuit (10) among a plurality of switching circuits (10).

[0306] According to this aspect, it is possible to simplify the signal generating circuit (52; 52A; 52D).

[0307] In the power conversion device according to the sixth aspect, in the fifth aspect, the signal generating circuit (52; 52A; 52D) includes a plurality of logic circuits (521 to 526) and does not include a microcontroller.

[0308] According to this aspect, it is possible to simplify the signal generating circuit (52; 52A; 52D).

[0309] In a power conversion device (100; 100A; 100B; 100C; 100D; 100E; 100F) according to a seventh aspect, in any one of the first to sixth aspects, when the control device (51; 51B; 51C) determines that two-phase resonant currents flow simultaneously through the resonant inductor (L1), it performs control to shift the on periods of the first switching element (1) and the second switching element (2) in one switching circuit (10) by the same predetermined period.

[0310] According to this aspect, when it is determined that two-phase resonant currents flow simultaneously through the resonant inductor (L1), it is possible to perform zero-voltage soft switching in each of the two switching circuits (10).

[0311] In a power conversion device (100; 100A; 100B; 100C; 100D; 100E; 100F) according to an eighth aspect, in any one of the first to seventh aspects, when the control device (51; 51B; 51C) determines that two-phase resonant currents flow simultaneously through the resonant inductor (L1), it performs control to shift the on periods of each of the first switching element (1) and the second switching element (2) in one switching circuit (10) in a predetermined direction.

[0312] According to this aspect, when it is determined that two-phase resonant currents flow simultaneously through the resonant inductor (L1), it is possible to perform zero-voltage soft switching in each of the two switching circuits (10).

[0313] In a power conversion device (100; 100A; 100B; 100C; 100D; 100E; 100F) according to a ninth aspect, in any one of the first to eighth aspects, when the control device (51; 51B; 51C) determines that two-phase resonant currents flow simultaneously through the resonant inductor (L1), it selects one of the two switching circuits (10) having a smaller duty of a first control signal corresponding to a first switching element (1) as the one switching circuit (10), and performs control to shift the on periods of the first switching element (1) and the second switching element (2) in the one switching circuit (10).

[0314] According to this embodiment, the degree of freedom in shifting the ON period is increased.

[0315] A power conversion device (100; 100A; 100B; 100C; 100D; 100E; 100F) according to a tenth aspect is any one of the first to ninth aspects, further comprising a first clamp diode (13) and a second clamp diode (14). The first clamp diode (13) has an anode connected to the third end of the resonant inductor (L1) and a cathode connected to the first DC terminal (31). The second clamp diode (14) has a cathode connected to the third end of the resonant inductor (L1) and an anode connected to the second DC terminal (32).

[0316] According to this aspect, even if the signal generating circuit (52; 52A; 52D) is configured to synchronize the end point of the high level period of the second control signal with the end point of the second dead time period (Td2), it is possible to regenerate the current (iL1) flowing through the resonant inductor (L1) after the end point of the second dead time period (Td2).

[0317] The power conversion device of the present disclosure can perform soft switching more reliably without directly controlling multiple switches for zero voltage soft switching in a control device, making the power conversion device of the present disclosure industrially useful.

[0318] 1 First switching element 2 Second switching element 3 Connection point 4 First diode 5 Second diode 6 Third switching element 7 Fourth switching element 8 Switch 81 First terminal 82 Second terminal 9 Resonant capacitor 10 Switching circuit 13 First clamp diode 14 Second clamp diode 11 Power conversion circuit 15 Regenerative capacitor 153 Fifth terminal 154 Sixth terminal 31 First DC terminal 32 Second DC terminal 41 AC terminal 51, 51B, 51C Control device 52, 52A, 52D Signal generating circuit 100, 100A, 100B, 100C, 100D, 100E, 100F Power conversion device iU, iV, iW Output current (load current) L1 Resonant inductor RA1 AC load SU1, SU2, SV1, SV2, SW1, SW2 First control signal SU6, SU7, SU8, SV6, SV7, SV8, SW6, SW7, SW8 Second control signal T01 First period T02 Second period T03 Third period Ta11 Time Ta12 Time Ta21 Time Ta22 Time Tad Additional time Td1 First dead time period Td2 Second dead time period V15 Voltage

Claims

a power conversion circuit having a first DC terminal and a second DC terminal, the power conversion circuit having a plurality of first switching elements and a plurality of second switching elements, the plurality of first switching elements being connected in series in a one-to-one relationship, the plurality of first switching elements being connected to the first DC terminal, and the plurality of second switching elements being connected to the second DC terminal; a plurality of AC terminals corresponding one-to-one to the plurality of switching circuits, each connected to a connection point of the first switching elements and the second switching elements in the corresponding switching circuit, through which a load current flows; a plurality of switches corresponding one-to-one to the plurality of switching circuits, each having a first end connected to the connection point of the first switching elements and the second switching elements in the corresponding switching circuit and a second end connected to a common connection point; a plurality of resonant capacitors corresponding one-to-one to the plurality of switches, each connected between the first end and the second DC terminal of the corresponding switch; and a resonant inductor having a third end and a fourth end, the third end being connected to the common connection point. a regenerative capacitor having a fifth end and a sixth end, the fifth end being connected to the second DC terminal and the sixth end being connected to the fourth end of the resonant inductor; a control device that provides a first control signal, the potential of which changes between a high level and a low level, to each of the plurality of first switching elements and the plurality of second switching elements; and a signal generating circuit that provides a second control signal, the potential of which changes between a high level and a low level, to each of the plurality of switches, wherein the control device sets, for each of the plurality of switching circuits, a second dead time period that is obtained by adding a predetermined time to a first dead time period that is preset so that on periods of the first switching element and the second switching element do not overlap between a high level period of the first control signal to the first switching element and a high level period of the first control signal to the second switching element, and the predetermined time period is determined according to a current value of the load current, an inductance of the resonant inductor, and a voltage value of the regenerative capacitor,the signal generating circuit generates, for each of the plurality of switches, the second control signal having a high level period corresponding to the second dead time period for a corresponding one of the plurality of switching circuits; and when the control device determines that two-phase resonant currents corresponding to two of the plurality of switching circuits simultaneously flow through the resonant inductor, the control device performs control to shift the on periods of the first switching element and the second switching element in one of the two switching circuits.

2. The power conversion device according to claim 1, wherein, when setting the second dead-time period for each of the plurality of switching circuits, the control device adds the predetermined time to the first dead-time period by shortening a high-level period of the first control signal to the second switching element when the polarity of the load current is positive, and adds the predetermined time to the first dead-time period by shortening a high-level period of the first control signal to the first switching element when the polarity of the load current is negative.

3. The power conversion device according to claim 1, wherein when setting the second dead-time period for each of the plurality of switching circuits, the control device adds the predetermined time to the first dead-time period by advancing an end point of a high-level period of a first control signal to the second switching element and delaying a start point of a high-level period of the first control signal to the first switching element when the polarity of the load current is positive, and adds the predetermined time to the first dead-time period by advancing an end point of a high-level period of a first control signal to the first switching element and delaying a start point of a high-level period of the first control signal to the second switching element when the polarity of the load current is negative.

4. The power conversion device according to claim 1, wherein, when setting the second dead time period for each of the plurality of switching circuits, the control device adds the predetermined time to the first dead time period by shortening a high level period of the first control signal to the first switching element when the polarity of the load current is positive, and adds the predetermined time to the first dead time period by shortening a high level period of the first control signal to the second switching element when the polarity of the load current is negative.

5. A power conversion device as claimed in any one of claims 1 to 4, wherein the signal generating circuit generates the second control signal for each of the plurality of switches using at least one of the first control signal to the first switching element of a corresponding one of the plurality of switching circuits and the first control signal to the second switching element.

6. The power conversion device according to claim 5, wherein the signal generating circuit includes a plurality of logic circuits and does not include a microcontroller.

7. A power conversion device as claimed in any one of claims 1 to 6, wherein, when the control device determines that the two-phase resonant currents flow simultaneously through the resonant inductor, it performs control to shift the on-periods of the first switching element and the second switching element in the one switching circuit by the same predetermined period.

8. A power conversion device as claimed in any one of claims 1 to 7, wherein the control device, when determining that the two-phase resonant currents flow simultaneously through the resonant inductor, performs control to shift the on-periods of the first switching element and the second switching element in the one switching circuit in a predetermined direction.

9. A power conversion device as claimed in any one of claims 1 to 8, wherein, when the control device determines that the two-phase resonant currents flow simultaneously through the resonant inductor, it selects one of the two switching circuits having a smaller duty of a first control signal corresponding to the first switching element as the one switching circuit, and performs control to shift the on-periods of the first switching element and the second switching element in the one switching circuit.

10. A power conversion device as claimed in any one of claims 1 to 9, further comprising: a first clamp diode having an anode connected to the third end of the resonant inductor and a cathode connected to the first DC terminal; and a second clamp diode having a cathode connected to the third end of the resonant inductor and an anode connected to the second DC terminal.

Citation Information

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