Drive device, liquid discharge head, and recording device

Abstract

A drive device according to the present invention comprises: a signal generation unit that acquires a first clock signal, a second clock signal, a data signal, and a latch signal; and a first drive unit and a second drive unit that are electrically connected to the signal generation unit. The data signal includes a first data signal and a second data signal within one cycle of the latch signal. The signal generation unit is configured to extract the first data signal of the data signal by means of the first clock signal and generate a first drive signal on the basis of the extracted first data signal and to extract the second data signal of the data signal by means of the second clock signal and generate a second drive signal on the basis of the extracted second data signal.

Description

Driving device, liquid ejection head, and recording device

[0001] The present disclosure relates to a drive device, a liquid ejection head, and a recording apparatus.

[0002] A driving device is known that includes a signal generating unit that receives a plurality of data signals, a clock signal, and a latch signal (see, for example, Patent Document 1). The signal generating unit generates drive signals for driving the driving unit based on the data signals.

[0003] WO 2006 / 064947

[0004] A drive device according to one aspect of the present disclosure includes a signal generating unit that acquires a first clock signal, a second clock signal, a data signal, and a latch signal, and a first drive unit and a second drive unit electrically connected to the signal generating unit, wherein the data signal includes a first data signal and a second data signal within one cycle of the latch signal, the signal generating unit is configured to extract the first data signal from the data signals using the first clock signal and generate a first drive signal based on the extracted first data signal, and is configured to extract the second data signal from the data signals using the second clock signal and generate a second drive signal based on the extracted second data signal, the first drive unit is configured to drive based on the first drive signal generated by the signal generating unit, and the second drive unit is configured to drive based on the second drive signal generated by the signal generating unit.

[0005] FIG. 1 is a side view schematically showing a printer according to the first embodiment. FIG. 2 is a plan view schematically showing the printer according to the first embodiment. FIG. 3 is a plan view schematically showing a liquid ejection head according to the first embodiment. FIG. 4 is a view of the liquid ejection head shown in FIG. 3 as seen from A. FIG. 5 is a view of the liquid ejection head shown in FIG. 3, with only the support substrate, ejection chip, flexible substrate, and drive IC extracted. FIG. 6 is a plan view schematically showing an ejection chip according to the first embodiment. FIG. 7 is a view of the ejection chip shown in FIG. 6 as seen from B. FIG. 8 is a plan view schematically showing an actuator member according to the first embodiment. FIG. 9 is a cross-sectional view taken along line II shown in FIG. 8. FIG. 10 is a block diagram showing the process from acquisition of a signal from a transmitter in a drive device according to the first embodiment to generation of a drive signal. FIG. 11 is a block diagram showing the process from acquisition of a data signal by a first drive IC according to the first embodiment to transmission of a first drive signal. FIG. 12 is a timing diagram schematically showing signals received by and generated by an input IC according to the first embodiment. Fig. 13 is a plan view schematically showing a liquid ejection head according to the first embodiment. Fig. 14 is a block diagram showing the process from acquisition of a signal from a transmitter in a drive device according to a second embodiment to generation of a drive signal. Fig. 15 is a timing chart schematically showing signals received by and generated by an input IC according to the second embodiment. Fig. 16 is a plan view schematically showing a liquid ejection head according to the second embodiment.

[0006] Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

[0007] Please note that the drawings used in the following explanation are schematic, and the dimensional ratios in the drawings do not necessarily correspond to the actual ones. Even among multiple drawings showing the same configuration, the dimensional ratios may not correspond to each other because the shapes and the like are exaggerated.

[0008] First Embodiment The configuration of a printer 10 according to this embodiment will be described with reference to FIGS. 1 and 2. FIG.

[0009] FIG. 1 is a side view that schematically shows a printer 10 according to this embodiment. FIG. 2 is a plan view that schematically shows the printer 10. The printer 10 is, for example, a color inkjet printer. For ease of understanding, FIG. 1 illustrates a three-dimensional Cartesian coordinate system that includes an X-axis with the positive direction toward the right of the page and a Y-axis with the positive direction toward the back of the page. This Cartesian coordinate system is also shown in other drawings that will be used in the following description.

[0010] In the following description, for convenience, the positive Z-axis direction may be referred to as "upper." The X-axis direction is the transport direction of the printing paper P. In addition, "planar view" refers to a view from the Z-axis direction.

[0011] As shown in FIG. 1, the printer 10 includes a paper feed roller 101, guide rollers 102 (102A, 102B, 102C), a transport roller 103, a recovery roller 104, a liquid ejection head 1, a fixing plate 105, a dryer 106, a sensor unit 107, and a control unit 108.

[0012] The control unit 108 controls the operations of the paper feed roller 101, guide roller 102, transport roller 103, recovery roller 104, dryer 106, and sensor unit 107. The control unit 108 also has a transmission unit 109. The transmission unit 109 controls the driving of the liquid ejection heads 1 by transmitting signals to the liquid ejection heads 1. The signals are transmitted from the transmission unit 109 to each liquid ejection head 1 via a connection unit 110 such as a cable or a flexible substrate.

[0013] The paper feed roller 101, guide roller 102, transport roller 103, and recovery roller 104 constitute a moving unit that moves the print paper P and the liquid ejection head 1 relative to one another. The print paper P is an example of a recording medium. The moving unit is controlled by a control unit 108. The print paper P passes from the paper feed roller 101 between two guide rollers 102A and is transported onto a plurality of transport rollers 103. The print paper P then passes between two guide rollers 102B and two guide rollers 102C and is transported to the recovery roller 104. The fixed plate 105 is flat and is located close to and above the print paper P transported by the transport rollers 103.

[0014] Each liquid ejection head 1 has an elongated shape extending in the Y-axis direction. Four liquid ejection heads 1 are mounted on a fixed plate 105. The four liquid ejection heads 1 are aligned on the fixed plate 105 along the X-axis direction of the printing paper P. The fixed plate 105 has through-holes through which each liquid ejection head 1 can be inserted, and the liquid ejection heads 1 are fixed to the fixed plate 105 by being inserted into the through-holes. Each liquid ejection head 1 is supplied with the same color liquid and ejects the liquid toward the printing paper P. The four liquid ejection heads 1 can print four colors of liquid. The colors of liquid ejected from each liquid ejection head 1 are, for example, magenta, yellow, cyan, and black. The printer 10 can print color images by impacting such liquid onto the printing paper P. The type of liquid color can be changed as appropriate.

[0015] The liquid ejection head 1 according to this embodiment is fixed to the printer 10, which is a so-called line printer. Note that the printer 10 is not limited to a line printer, but may be a so-called serial printer in which the liquid ejection head 1 is moved in a direction intersecting the Y-axis direction of the printing paper P to eject liquid droplets and the printing paper P is transported alternately.

[0016] The liquid ejection head 1 is controlled by the control unit 108 based on data such as images or characters, and ejects liquid toward the printing paper P. The distance between the liquid ejection head 1 and the printing paper P is, for example, about 0.5 to 20 mm.

[0017] Furthermore, in addition to printing colored liquids, a liquid such as a coating agent may be printed uniformly or in a pattern using the liquid ejection head 1 to perform surface treatment on the printing paper P. Note that instead of using the liquid ejection head 1, a coating agent may be applied using an applicator (not shown).

[0018] The dryer 106 dries the printing paper P. After passing through the two guide rollers 102B, the printing paper P is dried by the dryer 106. By drying in the dryer 106, the printing paper P that is wound up on top of one another on the collection roller 104 is less likely to stick to one another, and the undried liquid is less likely to rub against one another.

[0019] The sensor unit 107 includes a position sensor, a speed sensor, a temperature sensor, etc. The control unit 108 can control each part of the printer 10 based on information from each sensor.

[0020] The printer 10 may be provided with a cleaning unit that cleans the liquid ejection head 1. The cleaning unit cleans the liquid ejection head 1 by, for example, wiping or capping.

[0021] The recording medium may be a roll of cloth in addition to printing paper P. The printer 10 may also transport the recording medium on a conveyor belt. In this way, sheets of paper, cut pieces of cloth, wood, or tiles can be used as the recording medium. Furthermore, a liquid containing conductive particles may be ejected from the liquid ejection head 1 to print wiring patterns for electronic devices. Furthermore, a chemical agent may be produced by ejecting a predetermined amount of liquid chemical agent or a liquid containing a chemical agent from the liquid ejection head 1 toward a reaction vessel or the like, causing a reaction.

[0022] The configuration of the liquid ejection head 1 according to this embodiment will be described with reference to Figures 3 and 4. Figure 3 is a plan view schematically showing the liquid ejection head 1 according to this embodiment. Figure 4 is a view of the liquid ejection head 1 shown in Figure 3 as seen from A.

[0023] The liquid ejection head 1 includes a support substrate 2, a plurality of ejection chips 3, a reservoir substrate 4, a plurality of flexible substrates 5, a plurality of driving ICs (Integrated Circuits) 6, a wiring substrate 7, an input IC 8, and a serial-to-parallel conversion unit 12. The support substrate 2 is made of a flat, thin member that is elongated in the Y-axis direction.

[0024] The multiple ejection chips 3 have an elongated shape that is long and narrow in the Y-axis direction. The multiple ejection chips 3 are capable of ejecting liquid and directly contribute to printing. Eight ejection chips 3 are mounted on the support substrate 2. The support substrate 2 has through-holes that allow each ejection chip 3 to be inserted, and each ejection chip 3 is fixed to the support substrate 2 by being inserted into the through-hole.

[0025] The reservoir substrate 4 has an elongated shape that is long and narrow in the Y-axis direction. The reservoir substrate 4 is positioned above the plurality of ejection tips 3. The reservoir substrate 4 supplies liquid to each of the ejection tips 3. The reservoir substrate 4 is made of resin.

[0026] Each ejection tip 3 has one flexible substrate 5. That is, the number of flexible substrates 5 according to this embodiment is eight. One end of the flexible substrate 5 is electrically connected to the ejection tip 3, and the other end of the flexible substrate 5 is drawn out above the reservoir substrate 4.

[0027] One driver IC 6 is mounted on each flexible substrate 5. That is, the number of driver ICs 6 according to this embodiment is eight. The driver ICs 6 are electrically connected to the flexible substrates 5.

[0028] The wiring board 7 has an elongated shape that is long and narrow in the Y-axis direction. The wiring board 7 is located on a plurality of flexible substrates 5. The wiring board 7 is electrically connected to the plurality of flexible substrates 5. The input IC 8 is located on the wiring board 7. The input IC 8 is electrically connected to the wiring board 7.

[0029] The serial-parallel conversion unit 12 is located on the wiring board 7. A plurality of signals are transmitted to the serial-parallel conversion unit 12 from a transmission unit 109 via a connection unit 110. The plurality of signals transmitted from the transmission unit 109 are transmitted as serial signals. Signals are transmitted from the transmission unit 109 according to this embodiment to the input IC 8 by the V-by-One (registered trademark) transmission method.

[0030] The serial-parallel converter 12 performs serial-parallel conversion to generate a plurality of parallel signals from the transmitted serial signal. The input IC 8 receives the plurality of parallel signals from the serial-parallel converter 12 and extracts the data signals to be transmitted to each driver IC 6.

[0031] The driving ICs 6 are electrically connected to the input ICs 8 via the wiring board 7 and the flexible board 5. Data signals are transmitted from the input ICs 8 to the driving ICs 6 via the wiring board 7 and the flexible board 5. Each driving IC 6 generates a driving signal based on the data signal.

[0032] The ejection chip 3 is electrically connected to a driving IC 6 via a flexible substrate 5. A driving signal is transmitted to the ejection chip 3 from the driving IC 6 via the flexible substrate 5. The ejection chip 3 ejects liquid based on the driving signal.

[0033] The arrangement of the ejection chip 3 and the driver IC 6 according to this embodiment will be described with reference to Fig. 5. Fig. 5 is a diagram in which only the support substrate 2, the ejection chip 3, the flexible substrate 5, and the driver IC 6 are extracted from the liquid ejection head 1 shown in Fig. 3.

[0034] The ejection chips 3 are made up of eight ejection chips 3, namely, a first ejection chip 301 to an eighth ejection chip 308. The plurality of driving ICs 6 are made up of eight driving ICs 6, namely, a first driving IC 61 to an eighth driving IC 68.

[0035] Within the support substrate 2, the four ejection chips 301, 303, 305, and 307 on the negative X-axis side are positioned along the Y-axis direction. The four ejection chips 302, 304, 306, and 308 on the positive X-axis side are positioned along the Y-axis direction so as to be aligned between the four ejection chips 301, 303, 305, and 307 on the negative X-axis side.

[0036] The ejection chips 3 are arranged so as to overlap in the X-axis direction within the liquid ejection head 1. The number of ejection chips 3 included in one liquid ejection head 1 can be changed as appropriate depending on the object to be printed or the printing conditions.

[0037] The four driver ICs 61, 63, 65, and 67 on the negative X-axis side are mounted on the flexible substrate 5 along the Y-axis direction. The four driver ICs 62, 64, 66, and 68 on the positive X-axis side are mounted on the flexible substrate 5 along the Y-axis direction so as to be aligned between the four driver ICs 61, 63, 65, and 67 on the negative X-axis side.

[0038] The configuration of the ejection chip 3 according to this embodiment will be described with reference to Figures 6 and 7. Figure 6 is a plan view schematically showing the ejection chip 3 according to this embodiment. Figure 7 is a view of the ejection chip 3 shown in Figure 6 as viewed from the B side. Note that the two wavy lines drawn vertically on the paper in Figure 6 represent omission lines. The ejection chip 3 comprises a nozzle member 20, an actuator member 30, a support member 40, and a liquid supply member 50. The nozzle member 20 comprises a plurality of nozzles 21. The nozzle member 20 is made of silicon.

[0039] The multiple nozzles 21 are through-holes that penetrate the nozzle member 20 in the Z-axis direction. The multiple nozzles 21 are positioned along the Y-axis direction to form a nozzle group 21G. The nozzle group 21G according to this embodiment has a first nozzle group 21GA on the positive side of the X-axis and a second nozzle group 21GB on the negative side of the X-axis. The ejection chip 3 according to this embodiment has two nozzle groups 21G, but may have only one, or three or more. The two nozzle groups 21G according to this embodiment are configured parallel to each other. Furthermore, the distance between the nozzles 21 in the nozzle group 21G in the Y-axis direction is 84.6 μm. In other words, the resolution of the nozzles 21 in each nozzle group 21G is 300 dpi. The nozzles 21 of the first nozzle group 21GA are each positioned between the multiple nozzles 21 in the second nozzle group 21GB in the Y-axis direction. That is, the nozzles 21 of the first nozzle group 21GA and the nozzles 21 of the second nozzle group 21GB are shifted from each other in the Y-axis direction, and the combined resolution of the nozzles 21 of the two nozzle groups 21G is 600 dpi. The distance between the nozzles 21 of each nozzle group 21G may be set as appropriate.

[0040] The actuator member 30 is composed of a silicon substrate 33, a vibration plate 34, and a plurality of piezoelectric elements 35. A plurality of pressure chambers 31 and a plurality of first apertures 32 are formed in the silicon substrate 33. The silicon substrate 33 is located on the nozzle member 20. The vibration plate 34 is located on the silicon substrate 33. The plurality of piezoelectric elements 35 are located on the vibration plate 34. The actuator member 30 according to this embodiment has substantially the same shape as the nozzle member 20 when viewed from the Z-axis direction.

[0041] The multiple pressure chambers 31 are through-holes that penetrate the silicon substrate 33 in the Z-axis direction, and are provided so as to be connected to the multiple nozzles 21, respectively. The multiple pressure chambers 31 are located along the Y-axis direction, similar to the multiple nozzles 21. Furthermore, in a plan view, the multiple pressure chambers 31 are located so that their longitudinal direction is along the X-axis direction and their lateral direction is along the Y-axis direction. The pressure chambers 31 according to this embodiment have a substantially rectangular planar shape, but this is not limited thereto. For example, the pressure chambers 31 may have a diamond or circular planar shape. Liquid is stored in the pressure chambers 31. When pressure is applied to the liquid in the pressure chambers 31, the liquid is ejected to the outside from the nozzles 21 as droplets.

[0042] The multiple first apertures 32 are through-holes that penetrate the silicon substrate 33 in the Z-axis direction, and are each provided so as to connect to one longitudinal end of the multiple pressure chambers 31. The first aperture 32 connected to the pressure chamber 31 located on the positive side of the X-axis is provided so as to connect to the end of the pressure chamber 31 on the negative side of the X-axis. The first aperture 32 connected to the pressure chamber 31 located on the negative side of the X-axis is provided so as to connect to the end of the pressure chamber 31 on the positive side of the X-axis. Liquid is stored in the first aperture 32, similar to the pressure chamber 31. In plan view, the first aperture 32 has a smaller width in the Y-axis direction, i.e., a smaller flow path width, than the pressure chamber 31, and therefore functions as a so-called throttle. The vibration plate 34 is located above the multiple pressure chambers 31 and the multiple first apertures 32.

[0043] The plurality of piezoelectric elements 35 are positioned on the vibration plate 34 corresponding to the plurality of pressure chambers 31. The plurality of piezoelectric elements 35 are provided in a one-to-one relationship with the plurality of pressure chambers 31. When a voltage is applied to the piezoelectric elements 35, the piezoelectric elements 35 are displaced. In response to the displacement of the piezoelectric elements 35, the vibration plate 34 positioned above the pressure chambers 31 is also displaced. As a result, pressure is applied to the liquid in the pressure chambers 31. This causes the liquid to be ejected from the pressure chambers 31 through the nozzles 21.

[0044] The support member 40 is located on the actuator member 30. The support member 40 has a predetermined thickness that is thicker in the Z-axis direction than the actuator member 30, and has the function of supporting the actuator member 30. The support member 40 includes a plurality of second apertures 41. The support member 40 is made of silicon.

[0045] The multiple second apertures 41 are through holes that pass through the support member 40 in the Z-axis direction, and are provided so as to be connected to the multiple first apertures 32, respectively. The multiple second apertures 41 are connected to the multiple pressure chambers 31 via the multiple first apertures 32, respectively. The second apertures 41 function as so-called throttles, similar to the first apertures 32. Furthermore, the multiple second apertures 41 are located at the center of the support member 40 in the X-axis direction when viewed in a plan view.

[0046] The liquid supply member 50 is positioned on the support member 40. In a plan view, the liquid supply member 50 has substantially the same shape as the support member 40. The liquid supply member 50 includes a common flow path 51. The liquid supply member 50 is made of resin.

[0047] In a plan view, the common flow path 51 is located at the center of the liquid supply member 50 in the X-axis direction and is provided along the Y-axis direction. Therefore, the common flow path 51 is located above the plurality of second apertures 41 and is connected to the plurality of second apertures 41. Therefore, the common flow path 51 can supply liquid to the plurality of second apertures 41.

[0048] Liquid is filled in the pressure chamber 31, the first aperture 32, the second aperture 41, and the common flow path 51. When pressure is applied to the pressure chamber 31 by the piezoelectric element 35, liquid is supplied from the pressure chamber 31 to the nozzle 21, and droplets are ejected from the nozzle 21. In addition, liquid is replenished into the pressure chamber 31 from the common flow path 51 via the first aperture 32 and the second aperture 41.

[0049] In the liquid ejection head 1 according to this embodiment, two apertures, a first aperture 32 and a second aperture 41, are provided between each pressure chamber 31 and the common flow path 51. This reduces so-called crosstalk, which occurs when a pressure wave generated in one pressure chamber 31 propagates to another pressure chamber 31 via the common flow path 51. Note that Figures 6 and 7 show one example of the configuration of the ejection chip 3, and the ejection chip 3 may further include components other than those shown in Figures 6 and 7.

[0050] The common flow path 51 may also have a common flow path 51 that supplies liquid to the pressure chamber 31 and a common flow path 51 that recovers liquid from the pressure chamber 31. This provides the liquid ejection head 1 with a circulation function that recovers a portion of the liquid that was not ejected from the nozzles 21.

[0051] The configuration of the wiring and piezoelectric element 35 according to this embodiment will be described with reference to Fig. 8. Fig. 8 is a plan view schematically showing an actuator member 30 according to this embodiment. The actuator member 30 includes individual electrode wiring 36, a common electrode wiring 37, an individual electrode terminal 38, a common electrode terminal 39, and an insulator 3N.

[0052] The piezoelectric element 35 is composed of a common electrode 351, a piezoelectric body 352, and an individual electrode 353. In the piezoelectric element 35 according to this embodiment, the common electrode 351 is located on the vibration plate 34 corresponding to the pressure chamber 31, the piezoelectric body 352 is located on the common electrode 351, and the individual electrode 353 is located on the piezoelectric body 352, but this is not limiting. For example, the order of the common electrode 351 and the individual electrode 353 from the vibration plate 34 may be reversed. Specifically, the individual electrode 353, the piezoelectric body 352, and the common electrode 351 may be provided on the vibration plate 34 in this order.

[0053] The common electrode 351 according to this embodiment is provided across each pressure chamber 31 in the actuator member 30 in plan view, but is not limited to this. For example, the common electrode 351 may be provided individually corresponding to each pressure chamber 31. The thickness of the common electrode 351 may be 0.05 μm or more and 1 μm or less. The common electrode 351 may be made of a metal material such as Pt, for example.

[0054] The piezoelectric bodies 352 according to this embodiment are individually provided corresponding to each pressure chamber 31, but this is not limiting. For example, the piezoelectric bodies 352 may be provided across a plurality of pressure chambers 31 in plan view. The piezoelectric bodies 352 are sandwiched between the individual electrodes 353 and the common electrode 351. The thickness of the piezoelectric bodies 352 may be 1 μm or more and 10 μm or less. The constituent material of the piezoelectric bodies 352 is, for example, Pb(Zr,Ti)O ３ system, NaNbO ３ system, BaTiO ３ system, (BiNa)NbO ３ system, BiNaNB ５ O １５ Examples of suitable materials include ceramic materials having ferroelectricity such as ferroelectric ceramics.

[0055] The individual electrodes 353 are individually provided corresponding to the respective pressure chambers 31. The individual electrodes 353 have substantially the same shape as the piezoelectric bodies 352. The thickness of the individual electrodes 353 may be 0.05 μm or more and 1 μm or less. The individual electrodes 353 may be made of a metal material such as Pt, for example.

[0056] The insulator 3N is provided so as to cover the diaphragm 34 and the common electrode 351. The insulator 3N is also provided so as to surround the individual electrode 353 when viewed from the Z-axis direction. The thickness of the insulator 3N may be set to, for example, 0.1 μm or more and 1 μm or less. The constituent material of the insulator 3N is, for example, SiO ２ Examples include:

[0057] The individual electrode wiring 36 is located on an insulator 3N. The individual electrode wiring 36 is connected to the individual electrode 353 and is electrically connected to the individual electrode 353. By providing the insulator 3N between the individual electrode wiring 36 and the common electrode 351, the possibility of electrical conduction between the individual electrode wiring 36 and the common electrode 351 can be reduced. The thickness of the individual electrode wiring 36 may be, for example, 0.1 μm or more and 1 μm or less. The individual electrode wiring 36 can be made of, for example, Au.

[0058] The common electrode wiring 37 is located on the insulator 3N. The common electrode wiring 37 is electrically connected to the end of the common electrode 351 in the positive X-axis direction. The common electrode wiring 37 is drawn out from both ends in the Y-axis direction to the negative X-axis direction. The thickness of the common electrode wiring 37 may be, for example, 0.1 μm or more and 1 μm or less. The common electrode wiring 37 may be made of, for example, Au.

[0059] The individual electrode terminals 38 are located on the end of the diaphragm 34 in the negative direction of the X-axis. The number of individual electrode terminals 38 is the same as the number of piezoelectric elements 35. The individual electrode terminals 38 are electrically connected to the flexible substrate 5. As a result, a drive signal is transmitted from the drive IC 6 to the individual electrodes 353 via the flexible substrate 5 and the individual electrode wiring 36.

[0060] The common electrode terminal 39 is located on the end of the diaphragm 34 in the negative direction of the X-axis. The common electrode terminal 39 is electrically connected to the flexible substrate 5. As a result, a ground potential is applied to the common electrode 351 from the driving IC 6 via the flexible substrate 5 and the common electrode wiring 37.

[0061] The configuration of the piezoelectric element 35 according to this embodiment will be described in further detail with reference to Fig. 9. Fig. 9 is a cross-sectional view taken along line II shown in Fig. 8. To make the description easier to understand, Fig. 9 also illustrates the nozzle member 20.

[0062] The portion of the piezoelectric body 352 sandwiched between the individual electrode 353 and the common electrode 351 is polarized in the thickness direction, in the Z-axis direction. Therefore, for example, when a voltage is applied in the polarization direction of the piezoelectric body 352 by the individual electrode 353 and the common electrode 351, the piezoelectric body 352 contracts in a direction along the vibration plate 34. This contraction is regulated by the vibration plate 34. As a result, the piezoelectric body 352 is displaced so as to convex toward the pressure chamber 31. As the piezoelectric body 352 displaces, the vibration plate 34 located above the pressure chamber 31 is also displaced. As a result, pressure is applied to the liquid in the pressure chamber 31. When pressure is applied to the pressure chamber 31, liquid is ejected from the nozzle 21. A drive signal is transmitted from the individual electrode wiring 36 to the individual electrode 353, and a voltage is applied to the piezoelectric body 352.

[0063] Furthermore, the insulator 3N is positioned to cover the end portions of the piezoelectric element 35 in the X-axis direction so that the individual electrode wiring 36 does not conduct electricity to the common electrode 351 and the piezoelectric body 352 of the piezoelectric element 35. The insulator 3N is positioned to cover the end portions of the piezoelectric element 35 so that the piezoelectric element 35 does not peel off from the vibration plate 34. On the other hand, the insulator 3N is not positioned in the center of the piezoelectric element 35 so as not to hinder the displacement of the piezoelectric element 35.

[0064] The driving device 100 according to this embodiment will be described with reference to Fig. 10. Fig. 10 is a block diagram showing the process from acquisition of a signal from the transmitting unit 109 to generation of the driving signal Dr in the driving device 100 according to this embodiment. Note that in Fig. 10, " / N" (N: an integer of 2 or more) shown on the signal lines indicates the number of signal lines. These signal lines are also shown in other drawings used in the following description.

[0065] Each ejection chip 3 has 1,000 or more piezoelectric elements 35, which constitute a piezoelectric element group 350. In the following description, the piezoelectric element groups 350 of the first ejection chip 301 to the eighth ejection chip 308 will be referred to as the first piezoelectric element group 3501 to the eighth piezoelectric element group 3508, respectively.

[0066] Here, the driving device 100 includes a signal generating unit 9 and piezoelectric element groups 3501 to 3508. The signal generating unit 9 also includes a serial-parallel conversion unit 12, an input IC 8, and driving ICs 61 to 68.

[0067] The serial-parallel conversion unit 12 in the signal generation unit 9 acquires the signals transmitted from the transmission unit 109. The signals transmitted from the transmission unit 109 to the serial-parallel conversion unit 12 are the first clock signal clk1, the second clock signal clk2, the data signal DA, the data signal DB, the data signal DC, the data signal DD, the latch signal lt, and the timing adjustment signal ad.

[0068] The first clock signal clk1, the second clock signal clk2, the latch signal lt, and the timing adjustment signal ad each consist of 1 bit. The data signals DA, DB, DC, and DD each consist of 3 bits. Note that the signals acquired by the serial-parallel conversion unit 12 may include other signals.

[0069] These signals are transmitted as serial signals from the transmitting unit 109. The serial-parallel converting unit 12 generates, from the acquired serial signals, a first clock signal clk1, a second clock signal clk2, a data signal DA, a data signal DB, a data signal DC, a data signal DD, a latch signal lt, and a timing adjustment signal ad as parallel signals.

[0070] The signal lines after serial-to-parallel conversion by the serial-to-parallel conversion unit 12 are 16 in total: two signal lines for transmitting two clock signals clk1 and clk2, 12 signal lines for transmitting data signals DA, DB, DC, and DD, one signal line for transmitting a latch signal lt, and one signal line for transmitting a timing adjustment signal ad.

[0071] After serial-to-parallel conversion, the input IC 8 according to this embodiment extracts the first data signal D1 and the second data signal D2 from the data signal DA. The input IC 8 also extracts the third data signal D3 and the fourth data signal D4 from the data signal DB. The input IC 8 also extracts the fifth data signal D5 and the sixth data signal D6 from the data signal DC. The input IC 8 also extracts the seventh data signal D7 and the eighth data signal D8 from the data signal DD. Each of the first data signal D1 to the eighth data signal D8 is composed of 3 bits. The input IC 8 is an example of an extraction unit, and the extraction unit is not limited to an IC. The extraction unit may be composed of a circuit using, for example, LTPS.

[0072] The first data signal D1 to the eighth data signal D8 are transmitted from the input IC 8 to each of the driver ICs 61 to 68 in the signal generating unit 9. Specifically, the first data signal D1 is transmitted to the first driver IC 61, and the second data signal D2 is transmitted to the second driver IC 62. Similarly, the third data signal D3, the fourth data signal D4, the fifth data signal D5, the sixth data signal D6, the seventh data signal D7, and the eighth data signal D8 are transmitted to the third driver IC 63, the fourth driver IC 64, the fifth driver IC 65, the sixth driver IC 66, the seventh driver IC 67, and the eighth driver IC 68, respectively. Each of the driver ICs 61 to 68 generates the first drive signal Dr1 to the eighth drive signal Dr8 corresponding to the input first data signal D1 to the eighth data signal D8 by referencing data that associates the information of the first data signal D1 to the eighth data signal D8 with the waveforms of the drive signals. The first to eighth data signals D8 are each composed of 3 bits, so each of the driving ICs 61 to 68 can generate eight types of driving signals Dr. Each of the piezoelectric element groups 3501 to 3508 is configured to be driven based on each of the driving signals Dr1 to Dr8.

[0073] The first to eighth driving ICs 61 to 68 are examples of the first to eighth signal generating units, and the first to eighth signal generating units are not limited to ICs. The first to eighth signal generating units may be configured, for example, by circuits using LTPS. The piezoelectric element group 350 is an example of a driving unit, and the driving unit is not limited to the piezoelectric element group 350. The piezoelectric element group 350 is configured from 1,000 or more piezoelectric elements 35, but may also be configured from a single piezoelectric element 35. In other words, the driving unit may be configured from one piezoelectric element 35, or from two or more piezoelectric elements.

[0074] The piezoelectric element 35 is an example of a driving element, and the driving element is not limited to the piezoelectric element 35. For example, the driving element may be a heating element. By using a heating element as a driving element in a liquid ejection head, it is possible to heat the liquid by the heating element. In such a liquid ejection head, it is possible to eject the liquid by generating bubbles in the liquid. Furthermore, for example, the driving element may be a light-emitting element such as an LED. A light-emitting element may be used as a driving element for a dryer for the liquid ejected onto the recording medium. Furthermore, the driving element may be a light-emitting or receiving element used in a sensor, or an electromechanical conversion element such as a motor.

[0075] The configuration of the driver ICs 61 to 68 according to this embodiment will be further described with reference to Fig. 11. Fig. 11 is a block diagram showing the process from acquisition of the first data signal D1 by the first driver IC 61 to transmission of the first drive signal Dr1 according to this embodiment. While Fig. 11 shows the configuration of the first driver IC 61, the other driver ICs 62 to 68 have similar configurations.

[0076] The first driving IC 61 includes a shift register 601, a latch circuit 602, a waveform generating circuit 603, and a level shifter 604 for each of the plurality of piezoelectric elements 35 included in the first piezoelectric element group 3501. Here, since the number of piezoelectric elements 35 included in the first piezoelectric element group 3501 is 1000 or more, the first driving IC 61 also includes 1000 or more shift registers 601, latch circuits 602, waveform generating circuits 603, and level shifters 604.

[0077] A 3-bit first data signal D1 transmitted from the input IC8 is input to the shift register 601 in synchronization with the clock signal clk1, and is latched by the latch circuit 602 in synchronization with the latch signal lt.

[0078] The waveform generation circuit 603 is a circuit that generates a waveform signal based on the 3-bit first data signal D1 for each of the plurality of piezoelectric elements 35, which is output from each latch circuit 602. The waveform generation circuit 603 selects one of the eight types of waveform signals stored in the first drive IC 61 based on the 3-bit first data signal D1. Each waveform generation circuit 603 generates a waveform signal in synchronization with the timing adjustment signal ad.

[0079] The level shifter 604 can generate the first drive signal Dr1 by converting the waveform signal into an appropriate voltage value, so that the first drive signal Dr1 has a drive voltage corresponding to the plurality of piezoelectric elements 35.

[0080] Since the number of piezoelectric elements 35 in the first piezoelectric element group 3501 according to this embodiment is 1,000 or more, the number of first drive signals Dr1 transmitted from the first driving IC 61 to the first piezoelectric element group 3501 is 1,000 or more. In other words, the first driving IC 61 is configured to generate a first drive signal Dr1 for each of the plurality of piezoelectric elements 35 in the first piezoelectric element group 3501. Furthermore, the plurality of piezoelectric elements 35 in the first piezoelectric element group 3501 are configured to be driven based on the first drive signals Dr1 generated by the first driving IC 61.

[0081] Although not shown, the second driving unit (also referred to as the "second driving IC" as appropriate) 62 also starts generating the second driving signal Dr2 based on the timing adjustment signal ad, similar to the first driving unit (also referred to as the "first driving IC" as appropriate) 61. The first piezoelectric element group 3501 and the second piezoelectric element group 3502 can be driven approximately simultaneously based on the first driving signal Dr1 and the second driving signal Dr2, respectively. FIG. 11 shows an example of the configuration of the first driving IC 61, and the first driving IC 61 may further include circuits other than those shown in FIG. 11.

[0082] A method for extracting the first data signal D1, the second data signal D2, the third data signal D3, and the fourth data signal D4 from the data signals DA and DB in the input IC 8 of the signal generating unit 9 according to this embodiment will be further described with reference to Fig. 12. Fig. 12 is a timing diagram schematically showing signals acquired and generated by the input IC 8 according to this embodiment.

[0083] The data signal DA according to this embodiment includes a first data signal D1 and a second data signal D2 within one cycle of the latch signal lt. The input IC8 is configured to extract the first data signal D1 from the data signal DA in response to a first clock signal clk1. Furthermore, the input IC8 is configured to extract the second data signal D2 from the data signal DA in response to a second clock signal clk2.

[0084] As described above, the first driver IC 61 is configured to generate the first driver signal Dr1 based on the extracted first data signal D1, and the second driver IC 62 is configured to generate the second driver signal Dr2 based on the extracted second data signal D2.

[0085] Therefore, in the driving device 100 according to this embodiment, the first data signal D1 for generating the first driving signal Dr1 and the second data signal D2 for generating the second driving signal Dr2 are transmitted from the transmitting unit 109 to the signal generating unit 9 using the same data signal DA rather than as separate signals.

[0086] Therefore, in the driving device 100 according to this embodiment, the number of signal lines in the signal generating unit 9 can be reduced. Specifically, as shown in FIG. 10 , in the driving device 100 according to this embodiment, the number of signal lines from the serial-parallel conversion unit 12 to the input IC 8 can be reduced. Furthermore, when signals are transmitted from the transmitting unit 109 to the signal generating unit 9 as parallel signals, the driving device 100 does not require the serial-parallel conversion unit 12. When signals are transmitted from the transmitting unit 109 to the signal generating unit 9 as parallel signals, the driving device 100 according to this embodiment can reduce the number of signal lines from the transmitting unit 109 to the input IC 8. Therefore, the possibility that the configuration of the signal generating unit 9 will become complicated can be reduced.

[0087] The input IC8 further acquires a data signal DB different from the data signal DA. According to this embodiment, the data signal DB includes a third data signal D3 and a fourth data signal D4 within one cycle of the latch signal lt. The input IC8 is configured to extract the third data signal D3 from the data signal DB in response to a first clock signal clk1. The input IC8 is configured to extract the fourth data signal D4 from the data signal DB in response to a second clock signal clk2.

[0088] As described above, the third driver IC 63 is configured to generate the third drive signal Dr3 based on the extracted third data signal D3, and the fourth driver IC 64 is configured to generate the fourth drive signal Dr4 based on the extracted fourth data signal D4.

[0089] For this reason, in the driving device 100 according to this embodiment, the data signal for generating the third drive signal Dr3 and the data signal for generating the fourth drive signal Dr4 are transmitted from the transmitting unit 109 to the signal generating unit 9 as the same signal, rather than as separate signals. Furthermore, the first clock signal clk1 is commonly used to generate the first drive signal Dr1 and the third drive signal Dr3. Furthermore, the second clock signal clk2 is commonly used to generate the second drive signal Dr2 and the fourth drive signal Dr4. The signal generating unit 9 does not need to use separate clock signals to generate the first drive signal Dr1 and the third drive signal Dr3. Furthermore, the signal generating unit 9 does not need to use separate clock signals to generate the second drive signal Dr2 and the fourth drive signal Dr4. Therefore, in the driving device 100 according to this embodiment, the signal generating unit 9 can further reduce the number of signal lines.

[0090] The input IC 8 of this embodiment acquires a 3-bit data signal DA. The input IC 8 of this embodiment acquires 3 bits of the data signal DA, but may also acquire 1 bit, 2 bits, or 4 or more bits. The 3-bit data signal DA includes a first data signal D1 and a second data signal D2 within one cycle of the latch signal lt. The input IC 8 is configured to extract the first data signal D1 from the 3-bit data signal DA in response to a first clock signal clk1. Furthermore, the input IC 8 is configured to extract the second data signal D2 from the 3-bit data signal DA in response to a second clock signal clk2.

[0091] As described above, the first driver IC 61 is configured to generate the first driver signal Dr1 based on the extracted 3-bit first data signal D1, and the second driver IC 62 is configured to generate the second driver signal Dr2 based on the extracted 3-bit second data signal D2.

[0092] Therefore, in the signal generating unit 9 according to this embodiment, it is not necessary to use a separate clock signal to generate a 3-bit first data signal D1 for the acquired 3-bit data signal DA. Also, in the signal generating unit 9 according to this embodiment, it is not necessary to use a separate clock signal to generate a 3-bit second data signal D2 for the acquired 3-bit data signal DA. Therefore, in the driving device 100 according to this embodiment, the signal generating unit 9 can further reduce the number of signal lines.

[0093] The configuration of the driving device 100 according to this embodiment will be further described with reference to Fig. 13. Fig. 13 is a plan view that schematically shows the liquid ejection head 1 according to this embodiment.

[0094] In a plan view, the first driver IC 61 is located further in the negative direction of the X axis than the input IC 8. The second driver IC 62 is located further in the positive direction of the X axis than the input IC 8. This reduces the possibility that the wiring through which the first data signal D1 is transmitted from the input IC 8 and the wiring through which the second data signal D2 is transmitted from the input IC 8 will be closely spaced in the X axis direction.

[0095] In plan view, the third driver IC 63 is located further in the negative direction of the X axis than the input IC 8. The fourth driver IC 64 is located further in the positive direction of the X axis than the input IC 8. This reduces the possibility that the wiring through which the third data signal D3 is transmitted from the input IC 8 and the wiring through which the fourth data signal D4 is transmitted from the input IC 8 will be closely spaced in the X axis direction.

[0096] Furthermore, in a plan view, the second driver IC 62 is located between the first driver IC 61 and the third driver IC 63 in the Y-axis direction. In addition, in a plan view, the third driver IC 63 is located between the second driver IC 62 and the fourth driver IC 64 in the Y-axis direction. This reduces the possibility that the wiring will become dense in the Y-axis direction as well.

[0097] Furthermore, in the liquid ejection head 1, the first driver IC 61 and the second driver IC 62 may be located in the negative direction of the X axis relative to the input IC 8, and the third driver IC 63 and the fourth driver IC 64 may be located in the positive direction of the X axis relative to the input IC 8. This reduces the possibility of the wiring becoming dense in the X axis direction. In this case, the third driver IC 63 may be located between the first driver IC 61 and the second driver IC 62 in the Y axis direction, and the second driver IC 62 may be located between the third driver IC 63 and the fourth driver IC 64 in the Y axis direction. This reduces the possibility of the wiring becoming dense in the Y axis direction as well.

[0098] Furthermore, the first piezoelectric element group 3501 is located closer to the first drive IC 61 than to the second drive IC 62, and the second piezoelectric element group 3502 is located closer to the second drive IC 62 than to the first drive IC 61. This makes it possible to shorten the distance of the wiring through which the first drive signal Dr1 is transmitted from the first drive IC 61 to the first piezoelectric element group 3501. Similarly, it is possible to shorten the distance of the wiring through which the second drive signal Dr2 is transmitted from the second drive IC 62 to the second piezoelectric element group 3502.

[0099] In the printer 10, the liquid ejection head 1 and the transmitting unit 109 are connected by a connecting unit 110. In the printer 10 according to this embodiment, signals are transmitted as serial signals from the transmitting unit 109 to the signal generating unit 9. In the driving device 100 according to this embodiment, the first data signal D1 for generating the first drive signal Dr1 and the second data signal D2 for generating the second drive signal Dr2 are transmitted from the transmitting unit 109 to the signal generating unit 9 by the same data signal DA rather than by separate signals. This reduces the possibility that the transmission speed from the transmitting unit 109 to the signal generating unit 9 will be slow.

[0100] Furthermore, when signals are transmitted from the transmitting unit 109 to the signal generating unit 9 as parallel signals, the driving device 100 according to this embodiment can reduce the number of signal lines from the transmitting unit 109 to the input IC 8 .

[0101] Furthermore, whether the signal is transmitted from the transmitting unit 109 to the signal generating unit 9 as a serial signal or as a parallel signal, the possibility of the signal generating unit 9 becoming complicated can be reduced, as described above. In the printer 10, the liquid ejection head 1 may be replaced due to ink refilling, deterioration, or the like. In the printer 10 equipped with the driving device 100 according to this embodiment, the possibility of the signal generating unit 9 becoming complicated can be reduced, facilitating connection between the connecting unit 110 and the signal generating unit 9 and facilitating replacement of the liquid ejection head 1. Furthermore, as described above, the printer 10 may be a so-called serial printer that prints by alternately transporting the print medium and moving the liquid ejection head 1 in a direction intersecting the transport direction. The configuration according to this embodiment reduces the number of signal lines from the transmitting unit 109 to the input IC 8, or facilitates connection between the connecting unit 110 and the signal generating unit 9, thereby facilitating the operation of moving the liquid ejection head 1.

[0102] The serial-parallel conversion unit 12 and the input IC 8 are located on the positive side of the Y-axis relative to the driver ICs 61 to 68 to facilitate connection to the connection unit 110. The serial-parallel conversion unit 12 and the input IC 8 may also be located on the negative side of the Y-axis relative to the driver ICs 61 to 68. Furthermore, because the serial-parallel conversion unit 12 and the input IC 8 are located at different positions in the Z-axis direction from the driver ICs 61 to 68, the degree of freedom in wiring increases, enabling, for example, the miniaturization of the driver device 100. Furthermore, in the driver device 100 according to this embodiment, the driver ICs 61 to 68 are located above the piezoelectric element groups 3501 to 3508, and the input IC 8 is located above the driver ICs 61 to 68, thereby enabling further miniaturization.

[0103] Second Embodiment A liquid ejection head 1a according to a second embodiment will be described. In the description of the liquid ejection head 1a according to this embodiment, basically, only the differences from the liquid ejection head 1 according to the first embodiment will be described. Matters not specifically mentioned may be considered to be the same as those in the first embodiment or may be inferred from those in the first embodiment.

[0104] The driving device 100a according to this embodiment will be described with reference to Fig. 14. Fig. 14 is a block diagram showing the process from acquisition of a signal from the transmitting unit 109 to generation of the driving signal Dr in the driving device 100a according to this embodiment.

[0105] The serial-parallel conversion unit 12a in the signal generation unit 9a acquires the signals transmitted from the transmission unit 109. The signals transmitted from the transmission unit 109 to the serial-parallel conversion unit 12a are the first clock signal clk1, the second clock signal clk2, the third clock signal clk3, the fourth clock signal clk4, the data signal DAa, the data signal DBa, the latch signal lt, and the timing adjustment signal ad.

[0106] The first clock signal clk1, the second clock signal clk2, the third clock signal clk3, the fourth clock signal clk4, the latch signal lt, and the timing adjustment signal ad each consist of 1 bit. The data signals DAa and DBa each consist of 3 bits. Note that the signals acquired by the serial-parallel conversion unit 12a may include other signals.

[0107] These signals are transmitted as serial signals from the transmitting unit 109. The serial-parallel converting unit 12a generates a first clock signal clk1, a second clock signal clk2, a third clock signal clk3, a fourth clock signal clk4, a data signal DAa, a data signal DBa, a latch signal lt, and a timing adjustment signal ad as parallel signals from the acquired serial signals.

[0108] The signal lines after serial-parallel conversion by the serial-parallel conversion unit 12a are a total of 12 lines: four signal lines for transmitting four clock signals clk1, clk2, clk3, and clk4, six signal lines for transmitting data signals DAa and DBa, one signal line for transmitting a latch signal lt, and one signal line for transmitting a timing adjustment signal ad.

[0109] After serial-to-parallel conversion, the input IC 8a according to this embodiment extracts the first data signal D1, the second data signal D2, the third data signal D3, and the fourth data signal D4 from the data signal DAa, and also extracts the fifth data signal D5, the sixth data signal D6, the seventh data signal D7, and the eighth data signal D8 from the data signal DB.

[0110] Since the first data signal D1 to the eighth data signal D8 are each composed of 3 bits, each of the driving ICs 61a to 68a can generate eight types of drive signals Dr. Each of the piezoelectric element groups 3501 to 3508 is configured to be driven based on a respective drive signal Dr1 to Dr8. Note that each of the drive signals Dr1 to Dr8 is generated for each of the plurality of piezoelectric elements 35 in each of the piezoelectric element groups 3501 to 3508. In other words, the plurality of piezoelectric elements 35 in each of the piezoelectric element groups 3501 to 3508 are configured to be driven based on a respective drive signal Dr1 to Dr8.

[0111] A method for extracting the first data signal D1, the second data signal D2, the third data signal D3, and the fourth data signal D4 from the data signal DAa in the input IC 8a of the signal generating unit 9a according to this embodiment will be further described with reference to Fig. 15. Fig. 15 is a timing diagram schematically showing signals received by and signals generated by the input IC 8a according to this embodiment.

[0112] According to this embodiment, the data signal DAa includes a first data signal D1, a second data signal D2, a third data signal D3, and a fourth data signal D4 within one cycle of the latch signal lt. The input IC 8a is configured to extract the first data signal D1 from the data signal DAa in response to a first clock signal clk1. Furthermore, the input IC 8a is configured to extract the second data signal D2 from the data signal DAa in response to a second clock signal clk2. Furthermore, the input IC 8a is configured to extract the third data signal D3 from the data signal DAa in response to a third clock signal clk3. Furthermore, the input IC 8a is configured to extract the fourth data signal D4 from the data signal DAa in response to a fourth clock signal clk4.

[0113] The first clock signal clk1 is located at a position in one cycle of the latch signal lt that corresponds to the first data signal D1 of the data signal DAa. The second clock signal clk2 is located at a position in one cycle of the latch signal lt that corresponds to the second data signal D2 of the data signal DAa. The third clock signal clk3 is located at a position in one cycle of the latch signal lt that corresponds to the third data signal D3 of the data signal DAa. The fourth clock signal clk4 is located at a position in one cycle of the latch signal lt that corresponds to the fourth data signal D4 of the data signal DAa. This allows the input IC 8a to extract the first data signal D1, the second data signal D2, the third data signal D3, and the fourth data signal D4 using the first clock signal clk1, the second clock signal clk2, the third clock signal clk3, and the fourth clock signal clk4.

[0114] Also, similar to the driving device 100 according to the first embodiment, the first driving IC 61a is configured to generate a first driving signal Dr1 based on the extracted first data signal D1. The second driving IC 62a is configured to generate a second driving signal Dr2 based on the extracted second data signal D2. Furthermore, the third driving IC 63a is configured to generate a third driving signal Dr3 based on the extracted third data signal D3. The fourth driving IC 64a is configured to generate a fourth driving signal Dr4 based on the extracted fourth data signal D4.

[0115] For this reason, in the driving device 100a according to this embodiment, the data signal for generating the first drive signal Dr1, the data signal for generating the second drive signal Dr2, the data signal for generating the third drive signal Dr3, and the data signal for generating the fourth drive signal Dr4 are transmitted from the transmitting unit 109 to the signal generating unit 9a by the same data signal DAa rather than as separate signals.

[0116] Therefore, in the driving device 100 according to this embodiment, it is possible to reduce the number of signal lines in the signal generating unit 9. As a result, it is possible to reduce the possibility that the configuration of the signal generating unit 9 will become complicated.

[0117] The driving device 100a according to the second embodiment will be further described with reference to Fig. 16. Fig. 16 is a plan view that schematically shows a liquid ejection head 1a according to this embodiment.

[0118] In a plan view, the first driver IC 61a and the second driver IC 62a are located in the negative direction of the X axis relative to the input IC 8a. The third driver IC 63a and the fourth driver IC 64a are located in the positive direction of the X axis relative to the input IC 8a. This reduces the possibility that the wiring for transmitting the first data signal D1 and the second data signal D2 from the input IC 8a and the wiring for transmitting the third data signal D3 and the fourth data signal D4 from the input IC 8a will be densely packed in the X axis direction.

[0119] Furthermore, in a plan view, the second driver IC 62a is located between the third driver IC 63a and the fourth driver IC 64a in the Y-axis direction. Furthermore, the third driver IC 63a is located between the first driver IC 61a and the second driver IC 62a in the negative Y-axis direction. This reduces the possibility of the wiring becoming dense in the Y-axis direction as well.

[0120] Alternatively, the first driver IC 61a and the third driver IC 63a may be located in the negative direction of the X axis relative to the input IC 8a, and the second driver IC 62a and the fourth driver IC 64a may be located in the positive direction of the X axis relative to the input IC 8a. This reduces the possibility that the wiring through which the first data signal D1 and the third data signal D3 are transmitted from the input IC 8a and the wiring through which the third data signal D3 and the fourth data signal D4 are transmitted from the input IC 8a will be densely packed in the X axis direction of the driver device 100a.

[0121] 1, 1a Liquid ejection head 6, 6a Drive IC (first signal generating section to eighth signal generating section) 61, 61a First drive IC (first signal generating section) 62, 62a Second drive IC (second signal generating section) 8, 8a Input IC (extraction section) 9, 9a Signal generating section 10, 10a Printer (recording device) 12, 12a Serial-to-parallel conversion section 100, 100a Drive device 21 Nozzle 31 Pressure chamber 34 Vibration plate 35 Piezoelectric element (drive element) 350 Piezoelectric element group (drive section) 3501 First piezoelectric element group (first drive section) 3502 Second piezoelectric element group (second drive section) 3503 Third piezoelectric element group (third drive section) 3504 Fourth piezoelectric element group (fourth drive section) ad Timing adjustment signal clk1 First clock signal clk2 Second clock signal clk3 Third clock signal clk4 Fourth clock signal DA, DB, DC, DD Data signal lt Latch signal D1 First data signal D2 Second data signal D3 Third data signal D4 Fourth data signal Dr1 First drive signal Dr2 Second drive signal Dr3 Third drive signal Dr4 Fourth drive signal

Claims

1. A drive device comprising: a signal generating unit that acquires a first clock signal, a second clock signal, a data signal, and a latch signal; and a first drive unit and a second drive unit electrically connected to the signal generating unit, wherein the data signal includes a first data signal and a second data signal within one period of the latch signal, the signal generating unit is configured to extract the first data signal from the data signals using the first clock signal and generate a first drive signal based on the extracted first data signal, and is configured to extract the second data signal from the data signals using the second clock signal and generate a second drive signal based on the extracted second data signal, the first drive unit is configured to drive based on the first drive signal generated by the signal generating unit, and the second drive unit is configured to drive based on the second drive signal generated by the signal generating unit.

2. The drive device according to claim 1, further comprising a third drive unit and a fourth drive unit electrically connected to the signal generation unit, wherein the signal generation unit further acquires a data signal different from the data signal, the different data signal including a third data signal and a fourth data signal within one period of the latch signal, the signal generation unit being configured to: extract the third data signal from the different data signals in response to the first clock signal, and generate a third drive signal based on the extracted third data signal; and extract the fourth data signal from the different data signals in response to the second clock signal, and generate a fourth drive signal based on the extracted fourth data signal; the third drive unit being configured to drive based on the third drive signal generated by the signal generation unit; and the fourth drive unit being configured to drive based on the fourth drive signal generated by the signal generation unit.

3. The drive device according to claim 1, further comprising a third drive unit and a fourth drive unit electrically connected to the signal generation unit, wherein the signal generation unit further acquires a third clock signal and a fourth clock signal, wherein the data signal further includes a third data signal and a fourth data signal within one period of the latch signal, wherein the signal generation unit is configured to: extract the third data signal from the data signal using the third clock signal, and generate a third drive signal based on the extracted third data signal, wherein the signal generation unit is configured to extract the fourth data signal from the data signal using the fourth clock signal, and generate a fourth drive signal based on the extracted fourth data signal, wherein the third drive unit is configured to drive based on the third drive signal generated by the signal generation unit, and wherein the fourth drive unit is configured to drive based on the fourth drive signal generated by the signal generation unit.

4. The drive device of claim 1, wherein the data signal is composed of 2 bits or more, and each of the data signals of 2 bits or more includes a first data signal and a second data signal within one period of the latch signal, and the signal generating unit is configured to: extract the first data signal from each of the data signals of 2 bits or more in response to the first clock signal, and generate the first drive signal based on the extracted multiple first data signals; and extract the second data signal from each of the data signals of 2 bits or more in response to the second clock signal, and generate the second drive signal based on the extracted multiple second data signals.

5. The driving device described in claim 1, wherein the first driving unit and the second driving unit each have a plurality of driving elements, the signal generating unit is configured to generate the first driving signal for each of the plurality of driving elements in the first driving unit, and is configured to generate the second driving signal for each of the plurality of driving elements in the second driving unit, the plurality of driving elements in the first driving unit are configured to be driven based on the first driving signal respectively generated by the signal generating unit, and the plurality of driving elements in the second driving unit are configured to be driven based on the second driving signal respectively generated by the signal generating unit.

6. The drive device according to claim 1, wherein the signal generation unit has an extraction unit, a first signal generation unit, and a second signal generation unit, the extraction unit: acquires the first clock signal, the second clock signal, the data signal, the latch signal, and a timing adjustment signal; extracts the first data signal from the data signal by the first clock signal; extracts the second data signal from the data signal by the second clock signal; the first signal generation unit is configured to generate the first drive signal based on the first data signal extracted by the extraction unit; the second signal generation unit is configured to generate the second drive signal based on the second data signal extracted by the extraction unit; the first drive unit is configured to drive based on the first drive signal generated by the first signal generation unit; the second drive unit is configured to drive based on the second drive signal generated by the second signal generation unit; and the first signal generation unit and the second signal generation unit start generating the first drive signal and the second drive signal, respectively, based on the timing adjustment signal.

7. The driving device described in claim 6, wherein the first signal generating unit generates the first drive signal by selecting one waveform signal from a plurality of waveform signals stored in the first signal generating unit based on the first data signal extracted by the extracting unit, and the second signal generating unit generates the second drive signal by selecting one waveform signal from a plurality of waveform signals stored in the second signal generating unit based on the second data signal extracted by the extracting unit.

8. A drive device as described in claim 6, wherein, when viewed in a plane, the first signal generating unit is located in a first direction relative to the extracting unit, and the second signal generating unit is located in a second direction that is opposite to the first direction relative to the extracting unit.

9. The drive device according to claim 6, wherein the first drive unit is located closer to the first signal generation unit than the second signal generation unit, and the second drive unit is located closer to the second signal generation unit than the first signal generation unit.

10. A liquid ejection head comprising the drive device according to claim 1, wherein the first drive section and the second drive section each have a drive element, and the drive element of the first drive section and the drive element of the second drive section each are piezoelectric elements, and are positioned on a vibration plate corresponding to a pressure chamber connected to a nozzle.

11. A liquid ejection head as described in claim 10, comprising: a first ejection chip; and a second ejection chip, wherein the first ejection chip and the second ejection chip each have the pressure chamber, the nozzle, and the vibration plate, the piezoelectric element of the first drive unit is located on the vibration plate corresponding to the pressure chamber in the first ejection chip, and the piezoelectric element of the second drive unit is located on the vibration plate corresponding to the pressure chamber in the second ejection chip.

12. The signal generating unit has an extraction unit, a first signal generating unit, and a second signal generating unit, the extraction unit: acquires the first clock signal, the second clock signal, the data signal, the latch signal, and a timing adjustment signal; extracts the first data signal from the data signals by the first clock signal; extracts the second data signal from the data signals by the second clock signal; the first signal generating unit is configured to generate the first drive signal based on the first data signal extracted by the extraction unit; the second signal generating unit is configured to generate the second drive signal based on the second data signal extracted by the extraction unit; the piezoelectric element of the first drive unit is configured to be driven based on the first drive signal generated by the first signal generating unit; the piezoelectric element of the second drive unit is configured to be driven based on the second drive signal generated by the second signal generating unit; the first ejection tip is electrically connected to the first signal generating unit via a first flexible substrate; The liquid ejection head according to claim 11 , wherein the second ejection chip is electrically connected to the second signal generating section via a second flexible substrate.

13. A recording device comprising: the liquid ejection head according to claim 10; a transmitter; and a connection section that connects the transmitter and the liquid ejection head.

14. The recording apparatus according to claim 13, wherein an operation of transporting the print medium and an operation of moving the liquid ejection head according to claim 10 in a direction intersecting the transport direction are performed alternately.

15. The recording device of claim 13, wherein the signal generating unit includes a serial-parallel conversion unit, the first clock signal, the second clock signal, the data signal, and the latch signal are transmitted from the transmitting unit to the serial-parallel conversion unit as serial signals, and the serial-parallel conversion unit generates the first clock signal, the second clock signal, the data signal, and the latch signal as parallel signals from the acquired serial signal.

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