Display panel and display apparatus

Abstract

Provided in the present disclosure are a display panel and a display apparatus. The display panel comprises a display area (101) and a non-display area (102), wherein the non-display area (102) comprises a binding area (103), which binding area (103) comprises a plurality of first binding pins (104) arranged at intervals. The plurality of first binding pins (104) are each bound and connected to the display area (101), and the plurality of first binding pins (104) are arranged in a plurality of rows and columns. It can be understood that a height difference exists between two adjacent first binding pins (104) in the same row and same column since the plurality of first binding pins (104) are arranged in the plurality of rows and columns.

Description

Display panel and display device Technical Field

[0001] The present disclosure relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] With the continuous development of display technology, some display panels with advantages such as high resolution, low power consumption, small size, and light weight are attracting more and more attention. These display panels have great application prospects in high-resolution display industries such as wearable devices, industrial security, and medical.

[0003] Currently, the process for preparing the aforementioned display panel may include: forming multiple display areas on a base substrate, such that the base substrate includes a display area and a non-display area; and forming a plurality of first binding pins spaced apart in the same row in the non-display area corresponding to each display area. Furthermore, cutting the base substrate to obtain a plurality of display panels, wherein the non-display area includes the plurality of first binding pins spaced apart in the same row.

[0004] For a display panel with a higher resolution, a larger number of first binding pins are required. However, a larger number of first binding pins will result in a low utilization rate of the base substrate, resulting in a higher manufacturing cost.

[0005] Summary of the Invention

[0006] The display panel and display device provided by utilizing one or more embodiments of the present disclosure solve the problem in the prior art that the blank area of ​​the non-display region of the display panel is large, resulting in low utilization of the substrate and high manufacturing cost.

[0007] In a first aspect of the present disclosure, a display panel is provided, which includes a display area and a non-display area located on at least one side of the display area; the non-display area includes a binding area, and the binding area includes a plurality of first binding pins arranged at intervals; the plurality of first binding pins are respectively bound and connected to the display area, and the plurality of first binding pins are arranged in multiple rows and columns, and in the same row and the same column, there is a height difference between two adjacent first binding pins.

[0008] In a possible implementation, among the multiple first binding pins in the same row and column, the i-th first binding pin and the (i+2)-th first binding pin have the same height, where i is a positive integer.

[0009] In a possible implementation, in the same row and the same column, a height difference between two adjacent first binding pins is greater than 5 μm and less than 25 μm.

[0010] In a possible implementation manner, the heights of the i-th first binding pin in one of two adjacent rows of first binding pins and the (i+1)-th first binding pin in the other row are equal.

[0011] In a possible implementation, the minimum distance between the i-th first binding pin in one of two adjacent rows of first binding pins and the (i+1)-th first binding pin in the other row is greater than 16 μm and less than 50 μm.

[0012] In a possible embodiment, the display panel further includes: a protective cover plate covering at least the display area, a plurality of first binding pins are arranged in multiple rows and columns along a first direction and a second direction, the first direction is a pixel row direction, and the length of the binding area in the first direction is less than the length of the protective cover plate.

[0013] In a possible implementation, in the first direction, an edge of the binding area is located between an edge of the display area and an edge of the protective cover.

[0014] In a possible implementation manner, the heights of the i-th first binding pin in one row and the (i+1)-th first binding pin in the other row of two adjacent rows of first binding pins are not equal.

[0015] In a possible implementation manner, each first binding pin includes at least four corners, and the corners are in an arc shape.

[0016] In a possible implementation manner, in the same row and the same column, the closer the distance between two adjacent first binding pins is to the center of the binding area, the greater the distance between the two adjacent first binding pins is.

[0017] In a possible implementation, among the plurality of first binding pins in the same row and column, a distance between two adjacent first binding pins is greater than 5 μm.

[0018] In one possible embodiment, the display panel is rectangular in shape, the display area is rectangular, each row of first binding pins is parallel to the first edge of the display panel and the first edge of the display area, and each column of first binding pins is parallel to the second edge of the display panel and the second edge of the display area.

[0019] In one possible embodiment, the binding area includes a first function pin area and a second function pin area arranged at intervals, the first function pin area includes at least one row of multiple first binding pins arranged at intervals, the second function pin area includes at least one row of multiple first binding pins arranged at intervals, and the distance between the first function pin area and the second function pin area is greater than the distance between two adjacent first binding pins in the first function pin area, or greater than the distance between two adjacent first binding pins in the second function pin area.

[0020] A second aspect of the present disclosure further provides a display device, comprising the above-mentioned display panel.

[0021] In a possible implementation, the display device further includes a flexible circuit board and a conductive adhesive layer, wherein the conductive adhesive layer is coated on the plurality of first binding pins;

[0022] The flexible circuit board includes a plurality of second binding pins arranged in an array, and the plurality of second binding pins correspond one-to-one to the plurality of first binding pins. Each first binding pin is bonded and bound to the corresponding second binding pin through a conductive adhesive layer.

[0023] In a possible implementation, the display panel further includes a flexible circuit board, a driver chip, and a conductive adhesive layer, wherein the conductive adhesive layer is coated on the plurality of first binding pins;

[0024] The flexible circuit board includes multiple rows and columns of second binding pins, the driving chip includes multiple rows and columns of second binding pins, and each second binding pin corresponds to a first binding pin one by one, and each first binding pin is bonded and bound to the corresponding second binding pin through a conductive adhesive layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] In order to more clearly illustrate the embodiments of the present disclosure or the technical solutions in the prior art, a brief introduction will be given below to the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0026] FIG1 is a top view of a display panel according to some embodiments of the present disclosure;

[0027] FIG2 is a top view of a display panel according to some other embodiments of the present disclosure;

[0028] FIG3 is a cross-sectional view of a display area of ​​a display panel according to some embodiments of the present disclosure;

[0029] FIG4 is a cross-sectional view of the display panel taken along line A in FIG1 ;

[0030] FIG5 is a cross-sectional view of the display panel taken along line B in FIG1 ;

[0031] FIG6 is a schematic diagram of the shape of a first binding pin of a display panel provided by an embodiment of the present disclosure;

[0032] FIG7 is a schematic diagram of a binding connection between a flexible circuit board and a first binding pin provided by an embodiment of the present disclosure;

[0033] FIG8 is a schematic diagram showing a second binding pin of a flexible circuit board and a first binding pin of a display panel, and a second binding pin of a driver chip and a first binding pin of a display panel, provided by an embodiment of the present disclosure. DETAILED DESCRIPTION

[0034] Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. However, it should be understood that these descriptions are merely illustrative and are not intended to limit the scope of the present disclosure. In addition, in the following description, descriptions of well-known structures and technologies are omitted to avoid unnecessary confusion of the concepts of the present disclosure.

[0035] The accompanying drawings illustrate various schematic diagrams of structures according to embodiments of the present disclosure. These figures are not drawn to scale, and for the purpose of clarity, certain details are exaggerated and certain details may be omitted. The shapes of the various regions and layers shown in the figures, as well as their relative sizes and positional relationships, are merely exemplary and may deviate in practice due to manufacturing tolerances or technical limitations. Those skilled in the art may design regions / layers with different shapes, sizes, and relative positions as needed.

[0036] In the context of the present disclosure, when a layer / element is referred to as being "on" another layer / element, it can be directly on the other layer / element or an intervening layer / element may be present therebetween. In addition, if a layer / element is "on" another layer / element in one orientation, it may be "below" the other layer / element when the orientation is reversed.

[0037] Currently, the process of manufacturing a display panel can include: forming multiple display areas on a base substrate, where the base substrate includes a display area and a non-display area, and forming a plurality of first binding pins spaced apart in the same row in the non-display area corresponding to each display area. Furthermore, the base substrate is cut to obtain multiple display panels, where the non-display area includes a plurality of first binding pins spaced apart in the same row. For display panels with higher resolutions, a larger number of first binding pins is required. However, a large number of first binding pins results in low utilization of the base substrate, resulting in higher manufacturing costs.

[0038] Based on the above technical problems, the inventive concept of the present disclosure is to arrange the multiple first binding pins of the binding area in multiple rows and columns, so that the length of the binding area can be shortened, and the area of ​​the blank area of ​​the non-display area can be reduced, thereby improving the utilization rate of the base substrate constituting the display panel and saving manufacturing costs.

[0039] Below, the technical solution of the present disclosure and how the technical solution of the present disclosure solves the above-mentioned technical problems are described in detail with specific embodiments. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be repeated in some embodiments. The embodiments of the present disclosure will be described below with reference to the accompanying drawings.

[0040] Referring to FIG. 1 , the present disclosure provides a display panel having a resolution of, but not limited to, greater than 500. For example, the resolution of the display panel can be 600, 700, or 800. The display panel includes a display area 101 and a non-display area 102 located on at least one side of the display area 101. As shown in FIG. 1 , the non-display area 102 is disposed around the display area 101.

[0041] The non-display area 102 includes a binding area 103, which is located on one side of the display area 101. The binding area 103 includes a plurality of first binding pins 104 arranged at intervals. The plurality of first binding pins 104 are respectively bound and connected to the display area 101. For example, the plurality of first binding pins 104 are also used to electrically connect to a flexible circuit board 107 of an external device. The display area 101 is used to receive image display signals from the flexible circuit board 107 of the external device via the plurality of first binding pins 104 and display images based on the image display signals.

[0042] The plurality of first binding pins 104 are arranged in multiple rows and columns. For example, as shown in FIG1 , the plurality of first binding pins 104 are arranged in 4 rows and 9 columns, or as shown in FIG2 , the plurality of first binding pins 104 are arranged in 2 rows and 19 columns, etc., without limitation. The plurality of first binding pins 104 in the columns are parallel to each other, and the plurality of first binding pins 104 in the rows are parallel to each other. This allows for a more regular arrangement of the plurality of first binding pins 104 and minimizes space usage.

[0043] In some embodiments, the display panel may be shaped, but not limited to, rectangular; the display area 101 may be shaped, but not limited to, rectangular; each row of first binding pins 104 is parallel to the first edge of the display panel and the first edge of the display area 101; each column of first binding pins 104 is parallel to the second edge of the display panel and the second edge of the display area 101. Each row of first binding pins 104 may be parallel to the row direction of the pixel arrangement. This allows for a more regular arrangement of the plurality of first binding pins 104.

[0044] It can be understood that, in addition to the binding area 103, the non-display area 102 also includes blank areas on both sides of the display area 101. When the length of the binding area 103 in the row direction of the pixel arrangement is longer, the area of ​​the blank areas on both sides of the display area 101 is larger. Conversely, when the length of the binding area 103 in the row direction of the pixel arrangement is shorter, the area of ​​the blank areas on both sides of the display area 101 is smaller.

[0045] In some embodiments, please refer to FIG3 , the embodiment of the present disclosure also provides a specific structure of the display panel. As shown in FIG3 , the display panel includes a base substrate 301, a driving device layer 302, a light emitting device layer 303, a color filter layer 304, and a protective cover 105.

[0046] In some embodiments, the base substrate 301 may be, but is not limited to, a flexible base substrate. The flexible base substrate may include a silicon substrate, a polyethylene terephthalate (PET) substrate, a polyethylene naphthalate diformic acid glycol ester (PEN) substrate, or a colorless polyimide (CPI). It is understood that the base substrate 301 is used to support and protect the entire display panel and is located in the display area 101 and the non-display area 102.

[0047] The driver device layer 302 is disposed on one side of the substrate 301. In some embodiments, the driver device layer 302 includes multiple pixel driver circuits. The pixel driver circuits may be, but are not limited to, thin film transistors (TFTs). For example, the embodiments of the present disclosure do not impose too many restrictions on the type of TFTs. For example, the TFTs may include oxide TFTs and / or polysilicon TFTs.

[0048] The light emitting device layer 303 is provided on one side of the base substrate 301. The light emitting device layer 303 includes a plurality of light emitting devices. Each pixel driving circuit is electrically connected to a light emitting device. It should be noted that the electrically connected pixel driving circuit and light emitting device constitute a sub-pixel.

[0049] In some embodiments, each light-emitting device includes an anode, a light-emitting functional layer, and a cathode, with the anode being closer to the substrate 301 than the cathode. In some embodiments, the anode is a reflective electrode, and the cathode is a transparent electrode. The light-emitting functional layer may include an organic light-emitting material layer, and at least one of a hole injection layer, a hole transport layer, and an electron blocking layer disposed between the cathode and the organic light-emitting material layer; and at least one of an electron injection layer, an electron transport layer, and a hole blocking layer disposed between the anode and the organic light-emitting material layer. The specific configuration is determined based on actual needs and is not limited in the present disclosure.

[0050] The color filter layer 304 is disposed on a side of the light-emitting device layer 303 that is away from the base substrate 301. In some embodiments, the color filter layer 304 includes a shielding layer 306 and a color filter unit 307. Within the display area 101, the shielding layer 306 is provided with a plurality of pixel openings of a predetermined size that face the light-emitting devices, and the color filter unit 307 is located within the pixel openings.

[0051] The protective cover 105 is disposed on the side of the color filter layer 304 away from the base substrate 301. The protective cover 105 is used to extract light and seal the display panel to prevent external air and moisture from corroding the components within the display panel. In some embodiments, the protective cover 105 may be, but is not limited to, a glass cover.

[0052] It should be noted that the driving device layer 302 , the light emitting device layer 303 , the color filter layer 304 , and the protective cover 105 are located in the display area 101 .

[0053] As can be understood, as shown in FIG1 , the protective cover 105 covers at least the display area 101, and the plurality of first binding pins 104 are arranged in multiple rows and columns along a first direction and a second direction, where the first direction is the pixel row direction and the second direction is the pixel column direction. The length of the binding area 103 in the first direction is shorter than the length of the protective cover 105. In some embodiments, in the first direction, the edge of the binding area 103 is located between the edge of the display area 101 and the edge of the protective cover 105. As can be seen, the shorter the length of the binding area 103, the smaller the area of ​​the blank area of ​​the non-display area 102.

[0054] In summary, the embodiments of the present disclosure provide a display panel in which the non-display area 102 includes a binding area 103, and the binding area 103 includes a plurality of first binding pins 104 spaced apart from each other. The plurality of first binding pins 104 are respectively bound and connected to the display area 101, and the plurality of first binding pins 104 are arranged in multiple rows and columns. It can be understood that because the plurality of first binding pins 104 are arranged in multiple rows and columns, the length of the binding area 103 can be shortened, reducing the area of ​​the blank space in the non-display area 102, thereby improving the utilization rate of the base substrate 301 constituting the display panel and saving manufacturing costs.

[0055] In the disclosed embodiment, as shown in FIG4 , there is a height difference between two adjacent first binding pins 104 in the same row; and as shown in FIG5 , there is a height difference between two adjacent first binding pins 104 in the same column. It is understood that each first binding pin 104 needs to be covered with conductive adhesive to ensure a better electrical connection with the peripheral device's flexible circuit board 107. To prevent the conductive adhesive layer 109 between two adjacent first binding pins 104 from contacting and causing a short circuit between the two adjacent first binding pins 104, a height difference can be established between two adjacent first binding pins 104 in the same row and column. For example, the height difference between two adjacent first binding pins 104 in the same row and column is greater than 5 μm. For example, the height difference between two adjacent first binding pins 104 in the same row and column can be, but is not limited to, 6 μm, 7 μm, or 8 μm. In this way, when the conductive adhesive layer 109 covers each first binding pin 104, the conductive adhesive between two adjacent first binding pins 104 will not contact and cause a short circuit. In some embodiments, in the same row and the same column, the height difference between two adjacent first binding pins 104 may be smaller than 25 μm, so that the length of the binding region 103 is shorter.

[0056] In some embodiments, the distance between two adjacent first binding pins 104 in the same row and column is greater than 5 μm. For example, the distance between two adjacent first binding pins 104 in the same row and column can be, but is not limited to, 6 μm, 7 μm, or 8 μm.

[0057] Optionally, among the multiple first binding pins 104 in the same row and column, the i-th first binding pin 104 and the i+2-th first binding pin 104 have the same height, where i is a positive integer. For example, as still shown in FIG4 , when i=1, the first first binding pin 104 and the third first binding pin 104 have the same height; when i=2, the second first binding pin 104 and the fourth first binding pin 104 have the same height; when i=3, the third first binding pin 104 and the fifth first binding pin 104 have the same height; and when i=4, the fourth first binding pin 104 and the sixth first binding pin 104 have the same height. That is, the first binding pins 104 ranked odd have the same height, and the first binding pins 104 ranked even have the same height. In this way, when etching the first binding pins 104, the odd-numbered first binding pins 104 can be etched out in the first etching step, and the even-numbered first binding pins 104 can be etched out in the second etching step. In this way, multiple first binding pins 104 in the same row and column can be etched out in just two steps, which saves process steps and costs.

[0058] Similarly, the i-th first binding pin 104 in one of two adjacent rows of first binding pins 104 is equal in height to the i+1-th first binding pin 104 in the other row. For example, the first first binding pin 104 in the first row of first binding pins 104 is equal in height to the third first binding pin 104 in the second row; and for another example, the first first binding pin 104 in the second row of first binding pins 104 is equal in height to the third first binding pin 104 in the third row. Furthermore, etching the multiple first binding pins 104 within the binding region 103 requires only two steps, reducing both process steps and costs.

[0059] It can be understood that since the i-th first binding pin 104 in one of the two adjacent rows of first binding pins 104 and the i+1-th first binding pin 104 in the other row are misaligned, this will not cause a short circuit in the conductive adhesive layer 109 covering the i-th first binding pin 104 in one of the two adjacent rows of first binding pins 104 and the i+1-th first binding pin 104 in the other row.

[0060] In some embodiments, the minimum distance between the i-th first binding pin 104 in one of two adjacent rows of first binding pins 104 and the i+1-th first binding pin 104 in the other row is greater than 16 μm. The minimum distance between the i-th first binding pin 104 in one of two adjacent rows of first binding pins 104 and the i+1-th first binding pin 104 in the other row can be 18 μm, 19 μm, or 20 μm. This further reduces the probability of a short circuit in the conductive adhesive layer 109 covering the i-th first binding pin 104 in one of two adjacent rows of first binding pins 104 and the i+1-th first binding pin 104 in the other row. In some embodiments, the minimum distance between the i-th first binding pin 104 in one of two adjacent rows of first binding pins 104 and the i+1-th first binding pin 104 in the other row is less than 50 μm. This reduces the width of the binding area 103.

[0061] In other embodiments, when the minimum distance between the i-th first binding pin 104 in one of two adjacent rows of first binding pins 104 and the i+1-th first binding pin 104 in the other row is less than 16 μm, to prevent a short circuit between the conductive adhesive layer 109 covering the i-th first binding pin 104 in one of the two adjacent rows of first binding pins 104 and the i+1-th first binding pin 104 in the other row, the heights of the i-th first binding pin 104 in one of the two adjacent rows of first binding pins 104 and the i+1-th first binding pin 104 in the other row are unequal. In this way, when the conductive adhesive covers each first binding pin 104, the conductive adhesive between two adjacent first binding pins 104 does not contact each other and cause a short circuit.

[0062] Optionally, as shown in Figure 6, each first binding pin 104 includes at least four corners, and the corners are arc-shaped. This can avoid stress concentration at the corners of the first binding pins 104 during the display panel manufacturing process, resulting in film defects.

[0063] In some embodiments, in the same row and column, the distance between two adjacent first binding pins 104 is greater the closer they are to the center of the binding region 103. This can avoid the risk of stress concentration at the edge of the binding region 103 causing failure of the display region 101 or cracking of the base substrate 301.

[0064] In some embodiments, the binding area 103 includes a first function pin area and a second function pin area that are spaced apart. The first function pin area includes at least one row of a plurality of first binding pins 104 spaced apart (e.g., first binding pins 104 arranged in 2 rows and 9 columns), and the second function pin area includes at least one row of a plurality of first binding pins 104 spaced apart (e.g., first binding pins 104 arranged in 2 rows and 9 columns). The distance between the first function pin area and the second function pin area is greater than the distance between two adjacent first binding pins 104 in the first function pin area, or greater than the distance between two adjacent first binding pins 104 in the second function pin area. The first binding pins 104 in the first function pin area are used to receive electrical signals input from an external device (e.g., a flexible printed circuit board (FPC) or a rigid printed circuit board (PCB). For example, the first binding pins 104 in the second function pin area are used to receive electrical signals from a driver chip.

[0065] In some embodiments, the present disclosure further provides a display device comprising the display panel provided in the above-mentioned embodiments of the present disclosure. For example, the display device provided in the embodiments of the present disclosure may be, but is not limited to, an electronic device such as a VR device, an AR device, a mobile phone, or a tablet.

[0066] In some embodiments, as shown in FIG7 , the display device further includes a flexible circuit board 107 and a conductive adhesive layer 109 . The conductive adhesive layer 109 is applied to the plurality of first binding pins 104 . The flexible circuit board 107 includes a plurality of second binding pins 108 arranged in an array, and the plurality of second binding pins 108 correspond one-to-one with the plurality of first binding pins 104 . Each first binding pin 104 is bonded and bound to a corresponding second binding pin 108 via the conductive adhesive layer 109 . Similarly, because the plurality of first binding pins 104 on the flexible circuit board 107 are arranged in multiple rows and columns, the length of the plurality of first binding pins 104 on the flexible circuit board 107 can be shortened, reducing the area of ​​the blank area of ​​the flexible circuit board 107 . This, in turn, improves the utilization rate of the base substrate 301 constituting the flexible circuit board 107 and reduces manufacturing costs.

[0067] In other embodiments, as shown in FIG. 8 , the display panel further includes a flexible circuit board 107 , a driver chip 110 , and a conductive adhesive layer 109 . The conductive adhesive layer 109 is coated on the plurality of first binding pins 104 .

[0068] The flexible circuit board 107 includes multiple rows and columns of second binding pins 108, and the driver chip 110 includes multiple rows and columns of second binding pins 108 (2 rows and 9 columns in Figure 8), and each second binding pin 108 corresponds one-to-one to a first binding pin 104, and each first binding pin 104 is bonded and bound to the corresponding second binding pin 108 through a conductive adhesive layer 109.

[0069] Similarly, because the plurality of first binding pins 104 on the flexible circuit board 107 are arranged in multiple rows and columns (two rows and nine columns in FIG. 8 ), the length of the plurality of first binding pins 104 on the flexible circuit board 107 can be shortened, reducing the area of ​​the blank area of ​​the flexible circuit board 107. This, in turn, improves the utilization rate of the substrate 301 constituting the flexible circuit board 107, thereby saving manufacturing costs. In some embodiments, because the plurality of first binding pins 104 on the driver chip 110 are arranged in multiple rows and columns, the length of the plurality of first binding pins 104 on the driver chip 110 can be shortened, reducing the area of ​​the blank area of ​​the driver chip 110. This, in turn, improves the utilization rate of the substrate 301 constituting the driver chip 110, thereby saving manufacturing costs.

[0070] While the above description does not provide detailed technical details regarding the patterning of each layer, those skilled in the art will appreciate that various technical means can be employed to form layers, regions, and the like in desired shapes. Furthermore, those skilled in the art may devise methods that differ from those described above to achieve the same structure. Furthermore, while each embodiment has been described separately, this does not mean that the measures in each embodiment cannot be advantageously combined.

[0071] Although the preferred embodiments of the present disclosure have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concepts. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the present disclosure.

[0072] Obviously, those skilled in the art may make various changes and modifications to the present disclosure without departing from the spirit and scope of the present disclosure. Thus, if these modifications and variations of the present disclosure fall within the scope of the claims of the present disclosure and their equivalents, the present disclosure is intended to include these modifications and variations.

Claims

1. A display panel, comprising a display area and a non-display area located at least on one side of the display area; The non-display area includes a binding area, and the binding area includes a plurality of first binding pins arranged at intervals; The plurality of first binding pins are respectively bound and connected to the display area, and the plurality of first binding pins are arranged in multiple rows and columns, and in the same row and the same column, there is a height difference between two adjacent first binding pins.

2. The display panel according to claim 2, wherein: Among the plurality of first binding pins in the same row and the same column, the i-th first binding pin and the (i+2)-th first binding pin have the same height, where i is a positive integer.

3. The display panel according to claim 1, wherein: In the same row and the same column, a height difference between two adjacent first binding pins is greater than 5 μm and less than 25 μm.

4. The display panel according to claim 1, wherein: The i-th first binding pin in one of two adjacent rows of the first binding pins and the i+1-th first binding pin in the other row have the same height.

5. The display panel according to claim 4, wherein: The minimum distance between the i-th first binding pin in one of two adjacent rows of the first binding pins and the i+1-th first binding pin in the other row is greater than 16 μm and less than 50 μm.

6. The display panel according to claim 1, wherein: Also includes: A protective cover plate at least covers the display area, the plurality of first binding pins are arranged in multiple rows and columns along a first direction and a second direction, the first direction is a pixel row direction, and the length of the binding area in the first direction is less than the length of the protective cover plate.

7. The display panel according to claim 6, wherein: In the first direction, an edge of the binding area is located between an edge of the display area and an edge of the protection cover.

8. The display panel according to claim 1, wherein: The heights of the i-th first binding pin in one of two adjacent rows of the first binding pins and the i+1-th first binding pin in the other row are not equal.

9. The display panel according to claim 1, wherein: Each of the first binding pins includes at least four corners, and the corners are in an arc shape.

10. The display panel according to claim 1, wherein: In the same row and the same column, the closer the distance between two adjacent first binding pins is to the center of the binding area, the greater the distance between the two adjacent first binding pins is.

11. The display panel according to claim 1, wherein: Among the plurality of first binding pins in the same row and the same column, a distance between two adjacent first binding pins is greater than 5 μm.

12. The display panel according to any one of claims 1 to 11, wherein: The display panel is in a rectangular shape, the display area is in a rectangular shape, the first binding pins in each row are parallel to the first edge of the display panel and the first edge of the display area, and the first binding pins in each column are parallel to the second edge of the display panel and the second edge of the display area.

13. The display panel according to any one of claims 1 to 11, wherein: The binding area includes a first function pin area and a second function pin area that are arranged at intervals, the first function pin area includes at least one row of multiple first binding pins arranged at intervals, the second function pin area includes at least one row of multiple first binding pins arranged at intervals, and the distance between the first function pin area and the second function pin area is greater than the distance between two adjacent first binding pins in the first function pin area, or greater than the distance between two adjacent first binding pins in the second function pin area.

14. A display device, wherein: A display panel comprising any one of claims 1-13.

15. The display device according to claim 14, wherein: The display device further comprises a flexible circuit board and a conductive adhesive layer, wherein the conductive adhesive layer is coated on the plurality of first binding pins; The flexible circuit board includes a plurality of second binding pins arranged in an array, and the plurality of second binding pins correspond one-to-one to the plurality of first binding pins, and each of the first binding pins is bonded and bound to the corresponding second binding pin through the conductive adhesive layer.

16. The display device according to claim 14, wherein: The display panel further includes a flexible circuit board, a driving chip, and a conductive adhesive layer, wherein the conductive adhesive layer is coated on the plurality of first binding pins; The flexible circuit board includes multiple rows and columns of second binding pins, the driving chip includes multiple rows and columns of second binding pins, and each of the second binding pins corresponds one-to-one to one of the first binding pins, and each of the first binding pins is bonded and bound to the corresponding second binding pin through the conductive adhesive layer.

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