ZVS protection method, apparatus and device for inverter, and storage medium

Abstract

A ZVS (Zero Voltage Switching) protection method, apparatus and device for an inverter, and a storage medium. The inverter comprises a transformer and a secondary-side bridge arm circuit, which comprises a first bridge arm and a second bridge arm that are connected in series, wherein a secondary-side winding of the transformer is connected to the midpoint of the first bridge arm and the second bridge arm. The ZVS protection method for an inverter comprises: in response to a switching control signal, collecting the present secondary-side current of an inverter; if the secondary-side current does not meet a ZVS condition for a target working condition corresponding to the switching control signal, executing a wave-blocking operation on a secondary side of the inverter; and if the secondary-side current meets the ZVS condition for the target working condition corresponding to the switching control signal, controlling a secondary-side bridge arm circuit to perform bridge-arm switching. Whether a secondary side realizes ZVS is monitored in real time, and bridge-arm switching is performed only when it is ensured that a secondary-side current can realize ZVS; otherwise, a wave-blocking operation is executed on the secondary side of an inverter, thereby realizing the switching cycle-level protection of the secondary side while not increasing a control frequency.

Description

Inverter ZVS protection method, device, equipment and storage medium

[0001] This application claims priority to the Chinese patent application filed with the China Patent Office on November 21, 2023, with application number 202311578722.0 and invention name “Inverter ZVS protection method, device, equipment and storage medium”, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present application relates to the field of inverter technology, and in particular to an inverter ZVS protection method, device, equipment, and storage medium. Background Art

[0003] At present, a one-to-N micro-inverter topology is shown in Figure 1, which includes at least one primary winding, each primary winding is used to connect to the corresponding photovoltaic panel, each primary winding is connected to the corresponding primary H-bridge circuit, the secondary side adopts a bidirectional switching circuit, and the high-frequency transformer realizes boosting and isolation between the primary and secondary sides. By controlling the external phase shift angle of each primary and secondary side and the internal phase shift angle of the primary bridge arm, a single-stage grid-connected function can be achieved.

[0004] The bidirectional switching circuit on the secondary side of the micro-inverter usually uses high-voltage silicon MOSFET, whose parasitic body diode has poor reverse recovery characteristics, resulting in its current gradually decaying to zero each time the parasitic body diode is turned off. In addition, due to the charge stored in the space charge region and the semiconductor region, the parasitic body diode generates a reverse recovery current, which gradually decays to zero. As the switching frequency of the parasitic body diode increases, the reverse recovery current causes large voltage stress and loss. To address the problem of poor reverse recovery characteristics of the parasitic body diode, zero voltage switching (ZVS) technology, also known as soft switching technology, can be used. The conduction time of the switch tubes of the two bridge arms differs by a phase, that is, the phase shift angle. By adjusting the size of the phase shift angle to adjust the output voltage, zero voltage switching is achieved, staggering the time when large current and high voltage appear in the switch tube, reducing switching loss and interference.

[0005] In actual control, due to the limitations of controller performance, the phase-shift angle control frequency will be much lower than the switching frequency. Under certain transient conditions, the voltage on the secondary or primary side will change significantly within a control cycle. However, because the phase-shift angle control frequency is insufficient, the phase difference between the on-times of the switches cannot be adjusted in time. For example, as shown in Figure 1, when the lower arm switches to the upper arm, a large reverse recovery current is generated after the S7 tube is turned off. If the switching time of the S5 tube cannot be adjusted in time, the phase-shift angle will not be updated, and thus the voltage change will not be responded to. This will cause a large current and high voltage to appear simultaneously when the tube is turned off, and ZVS protection of the secondary side cannot be achieved. Summary of the Invention

[0006] The present application provides an inverter ZVS protection method, apparatus, device and storage medium for real-time monitoring of whether the secondary side achieves ZVS, switching the bridge arm only when the secondary side current can achieve ZVS, and performing a wave blocking operation otherwise, thereby achieving switching cycle-level protection of the secondary side without increasing the control frequency.

[0007] A first aspect of the present application provides an inverter ZVS protection method, which is applied to an inverter, wherein the inverter includes a transformer and a secondary bridge arm circuit, the secondary bridge arm circuit includes a first bridge arm and a second bridge arm connected in series, and the secondary winding of the transformer is connected to the midpoint of the first bridge arm and the second bridge arm. The inverter ZVS protection method includes: responding to a switch switching signal of the secondary side of the inverter, collecting the current secondary current of the inverter, the secondary current being the current flowing from the transformer to the midpoint of the first bridge arm and the second bridge arm; if the secondary current does not meet the ZVS condition of the target operating condition corresponding to the switch switching signal, performing a wave sealing operation on the secondary side of the inverter; if the secondary current meets the ZVS condition of the target operating condition corresponding to the switch switching signal, controlling the secondary bridge arm circuit to perform bridge arm switching.

[0008] A second aspect of the present application provides an inverter ZVS protection device, which is applied to an inverter. The inverter includes a transformer and a secondary bridge arm circuit, the secondary bridge arm circuit includes a first bridge arm and a second bridge arm connected in series, and the secondary winding of the transformer is connected to the midpoint of the first bridge arm and the second bridge arm. The inverter ZVS protection device includes: an acquisition module, configured to respond to the switch switching signal of the secondary side of the inverter and acquire the current secondary current of the inverter, wherein the secondary current is the current flowing from the transformer to the midpoint of the first bridge arm and the second bridge arm; a wave encapsulation module, configured to perform a wave encapsulation operation on the secondary side of the inverter if the secondary current does not meet the ZVS condition of the target operating condition corresponding to the switch switching signal; and a switching module, configured to control the secondary bridge arm circuit to perform bridge arm switching if the secondary current meets the ZVS condition of the target operating condition corresponding to the switch switching signal.

[0009] In a third aspect, the present application provides an inverter ZVS protection device, comprising: a memory and at least one processor, wherein the memory stores instructions; the at least one processor calls the instructions in the memory so that the inverter ZVS protection device executes the above-mentioned inverter ZVS protection method.

[0010] A fourth aspect of the present application provides a computer-readable storage medium, wherein the computer-readable storage medium stores instructions, which, when executed on a computer, enable the computer to execute the above-mentioned inverter ZVS protection method.

[0011] In the technical solution provided by the present application, the current secondary current of the inverter is collected in response to the switch switching signal; if the secondary current does not meet the ZVS condition of the target working condition corresponding to the switch switching signal, the secondary side bridge arm circuit is controlled to switch the bridge arm, and the secondary side bridge arm circuit includes a first bridge arm and a second bridge arm. In this embodiment, whether the secondary side achieves the ZVS of the target working condition is monitored in real time, and the bridge arm is switched only when the secondary current is guaranteed to achieve the ZVS of the target working condition, and the wave sealing operation is performed, thereby achieving the switching cycle level protection of the secondary side without increasing the control frequency. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] FIG1 is a schematic diagram of an inverter topology in an embodiment of the present application;

[0013] FIG2 is a schematic diagram of the current flow direction of the secondary bridge arm circuit in an embodiment of the present application;

[0014] FIG3 is a schematic diagram of an embodiment of a sampling circuit in an embodiment of the present application;

[0015] FIG4 is a schematic diagram of an embodiment of a ZVS protection method for an inverter according to an embodiment of the present application;

[0016] FIG5 is a schematic diagram of another embodiment of the inverter ZVS protection method according to an embodiment of the present application;

[0017] FIG6 is a schematic diagram of an embodiment of a driving waveform of an inverter in an embodiment of the present application;

[0018] FIG7 is a schematic diagram of another embodiment of the inverter ZVS protection method according to an embodiment of the present application;

[0019] FIG8 is a schematic diagram of another embodiment of the driving waveform of the inverter in the embodiment of the present application;

[0020] FIG9 is a schematic diagram of another embodiment of the inverter ZVS protection method according to an embodiment of the present application;

[0021] FIG10 is a schematic diagram of another embodiment of a driving waveform of an inverter in an embodiment of the present application;

[0022] FIG11 is a schematic diagram of an embodiment of an inverter ZVS protection device in an embodiment of the present application;

[0023] FIG12 is a schematic diagram of another embodiment of the inverter ZVS protection device in the embodiment of the present application;

[0024] FIG13 is a schematic diagram of an embodiment of an inverter ZVS protection device in an embodiment of the present application. DETAILED DESCRIPTION

[0025] The present application provides an inverter ZVS protection method, apparatus, device and storage medium for real-time monitoring of whether the secondary side achieves ZVS, switching the bridge arm only when the secondary side current can achieve ZVS, and performing a wave blocking operation otherwise, thereby achieving switching cycle-level protection of the secondary side without increasing the control frequency.

[0026] The terms "first," "second," "third," "fourth," and the like (if any) in the specification and claims of this application and in the accompanying drawings are used to distinguish similar objects and are not necessarily used to describe a particular order or precedence. It should be understood that the terms used in this manner are interchangeable where appropriate so that the embodiments described herein can be implemented in an order other than that illustrated or described herein. In addition, the terms "including" or "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product, or apparatus comprising a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0027] To facilitate understanding, the specific process of the embodiment of the present application is described below. The inverter ZVS protection method of the present application is applied to an inverter. The inverter includes a sampling circuit, a controller, a primary circuit, a transformer and a secondary bridge arm circuit. The secondary bridge arm circuit includes a first bridge arm and a second bridge arm connected in series. The output end of the primary circuit is connected to the primary winding of the transformer, and the secondary winding of the transformer is connected to the midpoint of the first bridge arm and the second bridge arm. The input end of the sampling circuit is connected to the secondary winding, and the output end of the sampling circuit is connected to the controller.

[0028] Optionally, the primary circuit of the inverter may include N inverter H-bridges, the input end of each inverter H-bridge is connected to a corresponding DC source, and the transformer includes N primary windings and one secondary winding; the output end of each inverter H-bridge is connected to the corresponding primary winding; the secondary winding of the transformer is connected to the secondary bridge arm circuit, and N is an integer greater than zero;

[0029] Figure 1 shows an example of a micro-inverter topology, where N is 4. The output of the micro-inverter is connected to a load or a grid. The N transformers have the same transformation ratio. Each inverter H-bridge includes four switches, S1, S2, S3, and S4. The input of each inverter H-bridge is connected to a corresponding DC source. The input of each inverter H-bridge is connected in parallel with a corresponding DC capacitor. In the figure, C1, C2, C3, and C4 are the DC capacitors connected to each inverter H-bridge. The DC source can be a photovoltaic module such as PV1 to PV4 in Figure 1.

[0030] Specifically, the secondary bridge arm circuit includes a bidirectional switch bridge arm and a capacitor bridge arm;

[0031] The bidirectional switch bridge arm includes a first bridge arm (also called an upper bridge arm) and a second bridge arm (also called a lower bridge arm) connected in series, and the two ends of the secondary winding of each transformer are respectively connected to the midpoint of the bidirectional switch bridge arm and the midpoint of the capacitor bridge arm.

[0032] Optionally, the first bridge arm includes a first switching transistor S5 and a second switching transistor S6, and the second bridge arm includes a third switching transistor S7 and a fourth switching transistor S8. From the upper bridge arm to the lower bridge arm, the first switching transistor S5 is connected in series with the second switching transistor S6, the third switching transistor S7, and the fourth switching transistor S8 in sequence; the capacitor bridge arm includes two capacitors Cg2 connected in series.

[0033] One end of the secondary winding is connected to the midpoint between the second switch tube S6 and the third switch tube S7, and the other end of the secondary winding is connected to the midpoint of the two capacitors.

[0034] It should be further explained that the above-mentioned inverter topology is only an example of this embodiment. The inverter ZVS protection method of the present application is applicable to other scenarios in which the first bridge arm and the second bridge arm are switched, including but not limited to other inverter topologies, such as an inverter topology with N equal to 6, and other circuit topologies that require bridge arm switching, such as the switching scenario of the upper and lower bridge arms in the DC-DC module circuit.

[0035] The ZVS implementation principle of the secondary bridge arm circuit of the present application is explained in conjunction with Figure 2. Taking the secondary voltage as positive, S6 and S8 as normally-on tubes, and S5 and S7 as high-frequency chopper tubes as an example. Assuming that the S5 tube is off and the S7 tube is on at this time, it is now required to switch to S5 tube on and S7 tube off. To achieve this switching, the secondary current needs to flow to the midpoint of the bridge arm, that is, the midpoint of S6 and S7, at the switching moment. In addition, the secondary current must be large enough to ensure that the upper and lower tube junction capacitances can be charged and discharged within the dead time, thereby achieving ZVS of the secondary bridge arm circuit.

[0036] The present application embodiment designs a possible sampling circuit design for the inverter as shown in FIG3 below, including: a sampling module and a comparator, wherein the sampling module is connected to the secondary winding and is used to collect the secondary current of the transformer secondary winding flowing to the midpoint of the first bridge arm and the second bridge arm;

[0037] The sampling module is connected to the comparator, which is used to compare the secondary current of the transformer with the set current and generate a comparison result;

[0038] The controller is connected to the comparator and is used to control the secondary bridge arm circuit to perform bridge arm switching or wave blocking according to a comparison result when receiving a switch switching signal.

[0039] Specifically, the sampling module can be a current sensor, and the comparator includes a digital signal processing (DSP) module. The current sensor sends the sampled current to the DSP module, which then uses the comparator subsystem (CMPSS) module within the DSP module for comparison to obtain a comparison result. The comparison module can also be placed outside the DSP module, and after the comparison is completed, a 0-1 signal is obtained and then sent to the DSP module. The 0-1 signal represents a level signal, a 1 signal indicates a high-level signal state, and a 0 signal indicates a low-level signal state. The controller can compare the results by querying the level signal of the comparator.

[0040] Specifically, the current sensor collects the secondary current of the secondary winding of the transformer flowing to the midpoint of the bridge arm, inputs the secondary current into the comparator for comparison and converts it into a corresponding level signal, the controller is connected to the comparator, queries the comparison result of the comparator, and switches the bridge arm or performs a wave blocking operation based on the comparison result.

[0041] Optionally, the sampling circuit can also be a sampling module directly connected to the controller, by sending the secondary current collected in real time to the controller, executing the comparison method through the controller, and performing the bridge arm switching signal or performing the wave blocking operation.

[0042] It can be understood that the sampling circuit of this embodiment is a circuit with sampling and comparison functions. There is no specific limitation on the electronic components included in the sampling circuit and the specific circuit topology connection relationship. The sampling circuit may also include components such as filters and signal amplifiers, or adopt other circuit topology connection relationships.

[0043] 4 , an embodiment of an inverter ZVS protection method is described. The inverter ZVS protection method of this embodiment is applied to the above inverter, including:

[0044] 401. In response to a switch switching signal of a secondary side of an inverter, collect a current secondary side current of the inverter, where the secondary side current is a current flowing from a transformer to a midpoint between a first bridge arm and a second bridge arm of a secondary side bridge arm circuit.

[0045] It is understandable that the execution subject of this application can be the inverter ZVS protection device, or a controller built into the inverter, or a controller external to the inverter, and the specific details are not limited here. The embodiments of this application are described by taking the controller as the execution subject as an example.

[0046] After receiving the switch switching signal from the secondary side of the inverter, the controller collects the current secondary side current of the inverter in real time through the current sensor.

[0047] The switch switching signal refers to a signal that controls the switching between the first bridge arm and the second bridge arm. In each control cycle of the inverter, the two switching tubes on one bridge arm are turned on, while the two switching tubes on the other bridge arm are turned off to achieve DC and AC conversion. This embodiment achieves ZVS protection at the switching cycle level by real-time acquisition of the secondary side current.

[0048] 402. If the secondary side current does not meet the ZVS condition of the target operating condition corresponding to the switch switching signal, perform a wave blocking operation on the secondary side of the inverter.

[0049] The comparator of this embodiment monitors the secondary current in real time, compares the secondary current with the set current of the target operating condition, and outputs the comparison result to the controller. The controller queries the comparison result of the comparator. If the comparator shows that the current secondary current does not meet the ZVS condition of the target operating condition corresponding to the switch switching signal, the controller performs a wave blocking operation on the secondary side of the inverter.

[0050] In this embodiment, the current target operating condition can be determined according to the switch switching signal, and the target operating condition is switching from the second bridge arm to the first bridge arm, or switching from the first bridge arm to the second bridge arm.

[0051] Among them, the set current Is is the minimum current absolute value required to complete the charging and discharging of the upper and lower tube junction capacitances at the end of the dead time. The specific value of the set current can be set according to the actual situation of the upper and lower tube junction capacitances, and the direction of the set current is related to the corresponding working conditions. The current that just completes the charging and discharging of the upper and lower tube junction capacitances of the first bridge arm at the end of the dead time is determined as the first set current, and the first set current can be set to be greater than zero. The current that just completes the charging and discharging of the upper and lower tube junction capacitances of the second bridge arm at the end of the dead time is determined as the second set current, and the second set current can be set to be less than zero.

[0052] When the target operating condition is switching from the second bridge arm to the first bridge arm, the secondary side current is greater than the first set current to meet the ZVS protection, and the secondary side current is less than the first set current to not meet the ZVS protection;

[0053] When the target operating condition is switching from the first bridge arm to the second bridge arm, the secondary current is less than the second set current to meet the ZVS protection, and the secondary current is greater than the second set current to not meet the ZVS protection.

[0054] To facilitate understanding, an example is provided. It is assumed that the first set current is 5A and the second set current is -5A.

[0055] The target operating condition corresponding to the switch switching signal is switching from the second bridge arm to the first bridge arm. At this time, the secondary current flowing to the first bridge arm is 6A. The secondary current is greater than the first set current, which can achieve soft switching protection;

[0056] The target operating condition corresponding to the switch switching signal is switching from the first bridge arm to the second bridge arm. At this time, the secondary current flowing to the second bridge arm is -6A, and the secondary current is less than the second set current, which can achieve soft switching protection.

[0057] The blocking operation of this embodiment refers to the operation of blocking each switch tube on the secondary side of the inverter according to a preset blocking control rule. For example, after the current of the current bridge arm continues to flow to zero, the blocking of each switch tube in the secondary circuit is completed in batches, etc. The specific blocking control rule can be set according to actual conditions, and this application does not impose any restrictions.

[0058] In this embodiment, when the control frequency is difficult to increase, secondary side switch protection at the switching cycle level under transient conditions is achieved. When ZVS cannot be achieved, the blocking operation is directly performed to prevent excessive stress on the switch and increased losses.

[0059] It should be further explained that when the secondary side current does not meet the ZVS condition of the target operating condition corresponding to the switch switching signal, the wave blocking operation can be performed on both the secondary side and the primary side.

[0060] 403. If the secondary side current satisfies the ZVS condition of the target operating condition corresponding to the switch switching signal, the secondary side bridge arm circuit is controlled to perform bridge arm switching according to the target operating condition.

[0061] If the controller finds that the result of the comparator is that the secondary side current meets the ZVS condition of the target operating condition corresponding to the switch switching signal, the first bridge arm is switched from the on state to the off state according to the target operating condition, and the second bridge arm is switched from the off state to the on state; or, the second bridge arm is switched from the on state to the off state, and the first bridge arm is switched from the off state to the on state according to the target operating condition.

[0062] In this embodiment, whether the secondary side achieves ZVS is monitored in real time. The bridge arm is switched only when the secondary side current can achieve ZVS. Otherwise, the wave blocking operation is performed, thereby achieving switching cycle-level protection of the secondary side without increasing the control frequency.

[0063] 5 , another embodiment of the inverter ZVS protection method of the present application includes:

[0064] 501. In response to a switch switching signal of a secondary side of an inverter, collect a current secondary side current of the inverter.

[0065] Step 501 can be performed with reference to step 401 and will not be described in detail here.

[0066] 502. Control the first bridge arm or the second bridge arm of the secondary bridge arm circuit to turn off according to the target operating condition corresponding to the switch switching signal.

[0067] If the target operating condition corresponding to the switching signal is switching from the first bridge arm to the second bridge arm, the first switch in the first bridge arm is turned off and the second switch is turned on. If the target operating condition corresponding to the switching signal is switching from the second bridge arm to the first bridge arm, the third switch in the second bridge arm is turned off and the fourth switch is turned on. At this time, the other bridge arm is also turned off, and the secondary side enters the dead time.

[0068] The dead time refers to a period of time during which both the first bridge arm and the second bridge arm are turned off during bridge arm switching in order to prevent the switches of the first bridge arm and the second bridge arm of the secondary side of the inverter from being turned on at the same time.

[0069] 503. Compare the current secondary current with the set current having the same direction according to the target operating condition to obtain a current comparison result.

[0070] The current secondary current is compared with the set current according to the target operating condition to obtain the current comparison result, so as to ensure that the current flowing to the midpoint of the bridge arm at the moment of bridge arm switching is large enough to ensure that the charging and discharging of the upper and lower junction capacitances of the corresponding operating condition can be completed within the dead time. That is, when the secondary current is greater than the first set current when switching from the second bridge arm to the first bridge arm or when the secondary current is less than the second set current when switching from the first bridge arm to the second bridge arm, it is determined that the current secondary current meets the ZVS condition of the target operating condition corresponding to the switch switching signal; and when the secondary current is less than the first set current when switching from the second bridge arm to the first bridge arm or when the secondary current is greater than the second set current when switching from the first bridge arm to the second bridge arm, it is determined that the current secondary current does not meet the ZVS condition of the target operating condition corresponding to the switch switching signal.

[0071] Among them, the comparison result includes a first level signal and a second level signal. The first level signal is the level signal corresponding to when the secondary current does not meet the ZVS condition of the target operating condition corresponding to the switch switching signal, and the second level signal is the level signal corresponding to when the secondary current meets the ZVS condition of the target operating condition corresponding to the switch switching signal.

[0072] The first level signal and the second level signal of this embodiment can be set according to actual conditions. For example, when the secondary current meets the ZVS condition of the target operating condition corresponding to the switch switching signal, the first level signal is set to a high level signal, and the comparator displays a 1 signal; when the secondary current does not meet the ZVS condition of the target operating condition corresponding to the switch switching signal, the second level signal is set to a low level signal, and the comparator displays a 0 signal.

[0073] Alternatively, when the secondary current meets the ZVS condition of the target operating condition corresponding to the switch switching signal, the first level signal is set to a low level signal, and the comparator displays a 0 signal; when the secondary current does not meet the ZVS condition of the target operating condition corresponding to the switch switching signal, the second level signal is set to a high level signal, and the comparator displays a 1 signal.

[0074] 504. If the current comparison result is a first level signal, perform a wave blocking operation on the secondary side of the inverter.

[0075] When the controller finds that the comparator has a first level signal, after the dead time, the switch tube of the other bridge arm is not turned on, and a wave blocking operation is performed on the secondary side to avoid reverse recovery current on the secondary side, which causes large voltage stress and loss.

[0076] For ease of understanding, taking the secondary side voltage as positive, the first bridge arm includes a first switch tube S5 and a second switch tube S6, and the second bridge arm includes a third switch tube S7 and a fourth switch tube S8. S5 is connected in series with S6, S7 and S8 in sequence, among which S6 and S8 are normally-on tubes, and S5 and S7 are high-frequency chopper tubes.

[0077] Assume that the switch switching signal switches S7 from the on state to the off state, and switches S5 from the off state to the on state, that is, the second bridge arm is switched from on to on the first bridge arm. At t1 when S7 is turned off, or after t1 when S7 is turned off and S5 is not turned on, the result of the comparator is queried. If the result of the comparator shows that the secondary current does not meet the soft switching condition, the driving waveform of the comparison result shown in Figure 6 (a) is a low-level signal, then after the dead time, S5 is controlled not to be turned on, and S5 continues to output a low-level signal, and the wave blocking operation is directly executed to block the secondary side.

[0078] 505. If the secondary side current satisfies the ZVS condition of the target operating condition corresponding to the switch switching signal, the secondary side bridge arm circuit is controlled to perform bridge arm switching according to the target operating condition.

[0079] If the controller finds that the current comparison result is a second level signal, it waits for the dead time to end; and controls the other bridge arm to open at the end of the dead time according to the target working condition.

[0080] Specifically, if the target operating condition is to switch from the first bridge arm to the second bridge arm, the third switch tube of the second bridge arm is controlled to be turned on at the end of the dead time, and the fourth switch tube is controlled to be in the on state; if the target operating condition is to switch from the second bridge arm to the first bridge arm, the first switch tube of the first bridge arm is controlled to be turned on at the end of the dead time, and the second switch tube is controlled to be in the on state.

[0081] Taking the example of the switch switching signal switching S7 from the on state to the off state and switching S5 from the off state to the on state, please refer to Figure 6(b) for the driving waveform when the secondary current meets the ZVS condition of the target operating condition corresponding to the switch switching signal. When S7 is turned off, or after S7 is turned off, and within the dead time when S5 is not turned on, the comparator result is queried. If the comparator result shows that the secondary current meets the soft switching condition, as shown in Figure 6(b), the driving waveform of the comparison result is a high-level signal, then after the dead time, S5 is driven to turn on, and the driving waveform of S5 changes from a low-level signal to a high-level signal.

[0082] It can be understood that the switch switching signal switches S5 from the on state to the off state, and switches S7 from the off state to the on state. The steps of switching S7 from the on state to the off state, and switching S5 from the off state to the on state can be referred to the switch switching signal, and will not be repeated here.

[0083] In this embodiment, without increasing the control frequency, protection of the secondary-side switch tube at the switching cycle level under transient conditions is achieved. By real-time monitoring of whether the secondary side achieves ZVS, a wave blocking operation is performed upon receiving a first-level signal sent by the comparator, and the bridge arm is switched upon receiving a second-level signal. This avoids excessive stress on the switch tube caused by switching when the secondary side cannot achieve ZVS, thereby reducing the loss of the secondary-side switch tube.

[0084] Referring to FIG. 7 , another embodiment of the inverter ZVS protection method of the present application includes:

[0085] 701. In response to a switch switching signal of a secondary side of an inverter, collect a current secondary side current of the inverter.

[0086] Step 701 can be performed with reference to step 401 and will not be described again here.

[0087] 702. Compare the current secondary current with the set current of the target operating condition to obtain a current comparison result.

[0088] Step 702 can be performed with reference to step 503 and will not be described again here.

[0089] 703. If the current comparison result is a first level signal, obtain a comparison result within a preset first time period.

[0090] The controller queries the comparison result of the comparator. If the controller receives a first level signal, that is, the comparator shows that the current does not meet the soft switching condition, the secondary side bridge arm circuit does not switch the first bridge arm and the second bridge arm, but enters the waiting time and obtains the comparison result within the preset first time period Ts.

[0091] The waiting time refers to the time period during which the comparator changes from a first level signal to a second level signal, that is, the time period from the current moment to when the sampling circuit collects the secondary current that meets the ZVS protection requirement.

[0092] If the waiting time is greater than the first time period Ts, it means that the soft switching condition cannot be met at this time. If the waiting time is less than or equal to the first time period Ts, it means that the soft switching condition can be met at this time. Among them, the first time period, that is, the set waiting period, can be set according to actual conditions.

[0093] This embodiment sets a waiting period to improve the robustness of the controller, allowing it to enter the waiting time when the current secondary current does not meet the ZVS condition of the target operating condition corresponding to the switch switching signal, rather than directly executing the wave-blocking operation, to avoid frequently entering the wave-blocking operation and reducing the working efficiency of the inverter.

[0094] Furthermore, this embodiment first queries the comparison result and then turns off the first bridge arm or the second bridge arm, avoiding the situation where the dead time and the waiting time overlap and the controller switching is unstable due to first turning off the first bridge arm or the second bridge arm and then querying the comparison result.

[0095] It can be understood that if the controller receives a second-level signal as the current comparison result, that is, the comparator shows that the current secondary current has met the soft switching condition, the switch tube of the first bridge arm or the second bridge arm will be turned off immediately, and the other bridge arm will be turned on after the dead time without entering a waiting time.

[0096] 704. When a second level signal is received within the first time period, the first bridge arm or the second bridge arm of the secondary bridge arm circuit is controlled to be turned off according to the target working condition, and the other bridge arm is controlled to be turned on when the dead time ends.

[0097] When the controller receives the second level signal within the first time period, that is, the waiting time is less than or equal to the preset first time period, if the target operating condition is to switch from the first bridge arm to the second bridge arm, the switch tube of the first bridge arm is controlled to be turned off, and the switch tube of the second bridge arm is controlled to be turned on at the end of the dead time; if the target operating condition is to switch from the second bridge arm to the first bridge arm, the switch tube of the second bridge arm is controlled to be turned off, and the switch tube of the first bridge arm is controlled to be turned on at the end of the dead time.

[0098] 705. When no second level signal is received within the first time period, perform a wave blocking operation on the secondary side of the inverter.

[0099] The controller does not receive the second level signal within the first time period, that is, the waiting time is greater than the preset first time period, and the comparator continues to output the first level signal within the first time period, which means that the soft switching condition cannot be met at this time, and the blocking operation is directly executed to block the secondary side.

[0100] 8 , assuming that the first level signal is a low level signal, that is, the secondary current does not meet the ZVS protection, and the second level signal is a high level signal, that is, the secondary current meets the ZVS protection, the switch switching signal switches S7 from the on state to the off state, and switches S5 from the off state to the on state, that is, switches from the second bridge arm on to the first bridge arm on.

[0101] When the switch switching signal is received, the current comparison result is a first level signal, that is, the current secondary current does not meet the ZVS condition of the target operating condition corresponding to the switch switching signal, and the bridge arm switching is not performed, that is, S7 continues to be turned on and outputs a high level signal, and S5 continues to be turned off and outputs a low level signal.

[0102] If the waiting time is greater than the first time period Ts, that is, the comparator outputs a low-level signal within Ts, as shown in Figure 8(a), it means that the secondary current does not meet the soft switching condition. At the end of Ts, S7 is turned off and the wave blocking operation is performed.

[0103] If the waiting time is less than or equal to the first time period Ts, that is, the comparator outputs a high level signal within Ts, as shown in FIG8(b), S7 is turned off when the high level signal is received, and S5 is turned on after the dead time.

[0104] It can be understood that the switch switching signal switches S5 from the on state to the off state, and switches S7 from the off state to the on state. The steps of switching S7 from the on state to the off state, and switching S5 from the off state to the on state can be referred to the switch switching signal, and will not be repeated here.

[0105] In this embodiment, whether the secondary side achieves ZVS is monitored in real time, and when the current secondary side current does not meet ZVS, the circuit waits and switches the bridge arm when the second level signal is received within the preset first time period. Otherwise, the inverter is subjected to a wave blocking operation, thereby avoiding frequent wave blocking operations, improving the working efficiency of the inverter, and realizing switching cycle-level protection of the secondary side without increasing the control frequency.

[0106] Referring to FIG. 9 , another embodiment of the inverter ZVS protection method of the present application includes:

[0107] 901. In response to a switch switching signal of a secondary side of an inverter, collect a current secondary side current of the inverter.

[0108] 902. Compare the current secondary current with the set current of the target working condition to obtain a current comparison result.

[0109] 903. If the current comparison result is a first level signal, obtain a comparison result within a preset first time period.

[0110] 904. When a second level signal is received within the first time period, the first bridge arm or the second bridge arm of the secondary bridge arm circuit is controlled to be turned off according to the target operating condition corresponding to the switch switching signal.

[0111] Steps 901-904 can be executed with reference to steps 701-704 and will not be repeated here.

[0112] 905. Collect the real-time voltage of another bridge arm.

[0113] If the target operating condition is to switch from the first bridge arm to the second bridge arm, the real-time voltage of the second bridge arm is measured when the switch tube of the first bridge arm is turned off; if the target operating condition is to switch from the second bridge arm to the first bridge arm, the real-time voltage of the first bridge arm is measured after the switch tube of the second bridge arm is turned off.

[0114] Specifically, if the target operating condition is to switch from the first bridge arm to the second bridge arm, the first switch tube of the first bridge arm is controlled to be turned off, and the second switch tube is controlled to be in the on state, and the real-time voltage of the third switch tube of the second bridge arm is measured; if the target operating condition corresponding to the switch switching signal is to switch from the second bridge arm to the first bridge arm, the third switch tube of the second bridge arm is controlled to be turned off, and the fourth switch tube is controlled to be in the on state, and the real-time voltage of the first switch tube of the first bridge arm is measured.

[0115] 906. If the absolute value of the real-time voltage drops below the preset voltage within the preset second time period, control the other bridge arm to be turned on.

[0116] The control tube sets an adaptive dead time according to the real-time voltage of the other bridge arm. The adaptive dead time refers to the time corresponding to the absolute value of the real-time voltage of the other bridge arm dropping below the set value Us. For example, the time required for the real-time voltage of the other bridge arm to drop to 0 is determined as the dead time. By setting the adaptive dead time, the accuracy and flexibility of the control of the opening timing of the other bridge arm are improved, and it is avoided that the voltage of the other bridge arm circuit is turned on before it drops to Us, causing loss of the switching tube, or the voltage of the other bridge arm has dropped to less than Us, but is still within the dead time, that is, the pre-set dead time is too long, resulting in the other bridge arm still remaining closed when ZVS is met, resulting in a reduction in the switching efficiency of the bridge arm, and also avoiding the fixed setting of the dead time and reducing the flexibility of the control of the opening timing of the switching tube.

[0117] If the time for the absolute value of the real-time voltage to drop below the set value Us is less than or equal to the second time period, that is, the adaptive dead time is less than or equal to Ts1, it is determined that the soft switching condition is met. If the time for the absolute value of the real-time voltage to drop below the set value Us is greater than the second time period, that is, the adaptive dead time is greater than Ts1, it is determined that the soft switching condition is not met. This embodiment controls the adaptive dead time within a reasonable range through the second time period, avoiding the situation in which the secondary bridge arm circuit cannot achieve ZVS under special circumstances, resulting in the real-time voltage of the other bridge arm unable to drop below Us, resulting in an excessively long waiting time. The second time period can be set according to actual conditions.

[0118] Specifically, if the absolute value of the real-time voltage of the first bridge arm is less than or equal to the preset voltage within the preset second time period, that is, the adaptive dead time is less than or equal to Ts1; or, the absolute value of the real-time voltage of the second bridge arm is less than or equal to the preset voltage, that is, the adaptive dead time is less than or equal to Ts1, then the secondary bridge arm circuit can achieve ZVS protection, and the switch tube of the first bridge arm or the switch tube of the second bridge arm is controlled to be turned on to complete the switching of the secondary bridge arm circuit.

[0119] 907. If the absolute value of the real-time voltage is higher than the preset voltage within the preset second time period, perform a wave blocking operation on the secondary side of the inverter.

[0120] If the absolute value of the real-time voltage of the first bridge arm is higher than the preset voltage within the preset second time period, that is, the adaptive dead time is greater than Ts1; or, the absolute value of the real-time voltage of the second bridge arm is higher than the preset voltage, that is, the adaptive dead time is greater than Ts1, then the secondary side bridge arm circuit cannot achieve ZVS, and the wave blocking operation is directly performed to block the secondary side.

[0121] Referring to Figure 10, the switch switching signal switches S7 from the on state to the off state, and switches S5 from the off state to the on state, that is, switches from the second bridge arm to the first bridge arm, and the waiting time is less than or equal to the first time period Ts, that is, when the high-level signal output by the comparator is received within Ts, S7 is turned off and the real-time voltage of S5 is measured.

[0122] If the dead time is greater than the second time period Ts1, as shown in Figure 10(a), that is, the time when the real-time voltage absolute value of S5 drops below the set value Us is greater than the second time period Ts1, then at the end of the dead time, S5 is controlled not to be turned on, and the wave blocking operation is performed on the secondary side of the inverter.

[0123] If the dead time is less than or equal to the second time period Ts1, as shown in Figure 10(b), that is, the time when the real-time voltage absolute value of S5 drops below the set value Us is less than or equal to the second time period Ts1, then at the end of the dead time, S5 is controlled to be turned on.

[0124] In this embodiment, whether the secondary side achieves ZVS is monitored in real time. If the current secondary side current does not meet the requirements, the circuit waits. If the secondary side current meets the ZVS protection requirements within the first time period, the bridge arm is switched, the first bridge arm or the second bridge arm is turned off, and an adaptive dead time is set. If the real-time voltage of the other bridge arm drops to the set voltage within the second time period, the other bridge arm circuit is turned on. Otherwise, a wave blocking operation is performed, thereby achieving switching cycle-level protection of the secondary side without increasing the control frequency.

[0125] The inverter ZVS protection method of the present application is described above. Please refer to FIG11 for a description of the inverter ZVS protection device in this embodiment. In this embodiment, an embodiment of the inverter ZVS protection device includes:

[0126] The acquisition module 1101 is configured to acquire the current secondary current of the inverter in response to the switch switching signal of the secondary side of the inverter, where the secondary current is the current flowing from the transformer to the midpoint between the first bridge arm and the second bridge arm of the secondary bridge arm circuit;

[0127] The wave-sealing module 1102 is configured to perform a wave-sealing operation on the secondary side of the inverter if the secondary side current does not meet the ZVS condition corresponding to the target operating condition of the switch switching signal;

[0128] The switching module 1103 is configured to control the secondary bridge arm circuit to perform bridge arm switching if the secondary side current meets the ZVS condition of the target working condition corresponding to the switch switching signal.

[0129] In this embodiment, whether the secondary side achieves ZVS is monitored in real time. The bridge arm is switched only when the secondary side current can achieve ZVS. Otherwise, the wave blocking operation is performed, thereby achieving switching cycle-level protection of the secondary side without increasing the control frequency.

[0130] Referring to FIG. 11 , another embodiment of the inverter ZVS protection device of the present application includes:

[0131] The acquisition module 1101 is configured to acquire the current secondary current of the inverter in response to the switch switching signal of the secondary side of the inverter, where the secondary current is the current flowing from the transformer to the midpoint between the first bridge arm and the second bridge arm of the secondary bridge arm circuit;

[0132] The wave-sealing module 1102 is configured to perform a wave-sealing operation on the secondary side of the inverter if the secondary side current does not meet the ZVS condition corresponding to the target operating condition of the switch switching signal;

[0133] The switching module 1103 is configured to control the secondary bridge arm circuit to perform bridge arm switching if the secondary side current meets the ZVS condition of the target working condition corresponding to the switch switching signal.

[0134] In a feasible implementation manner, the wave encapsulation module 1102 includes:

[0135] The first shut-off unit 11021 is configured to control the first bridge arm or the second bridge arm of the secondary bridge arm circuit to shut down according to the target operating condition corresponding to the switch switching signal;

[0136] A first comparing unit 11022 is configured to compare the current secondary current with the set current of the target operating condition to obtain a current comparison result, where the comparison result includes a first level signal and a second level signal, where the first level signal is a level signal corresponding to when the secondary current does not satisfy the ZVS condition of the target operating condition corresponding to the switch switching signal, and the second level signal is a level signal corresponding to when the secondary current satisfies the ZVS condition of the target operating condition corresponding to the switch switching signal;

[0137] The first wave blocking unit 11023 is configured to perform a wave blocking operation on the secondary side of the inverter if the current comparison result is a first level signal.

[0138] Optionally, the first comparing unit 11022 is specifically configured to: if the target operating condition is switching from the second bridge arm to the first bridge arm, compare the secondary current with the first set current, and output a first level signal when the secondary current is less than the first set current, and output a second level signal when the secondary current is greater than the first set current, and the first set current is greater than zero;

[0139] If the target operating condition is to switch from the first bridge arm to the second bridge arm, the secondary current is compared with the second set current, and a first level signal is output when the secondary current is greater than the second set current, and a second level signal is output when the secondary current is less than the second set current, and the second set current is less than zero.

[0140] Optionally, the switching module 1103 is specifically configured to: if the current comparison result is a second level signal, wait for the dead time to end, and control another bridge arm to be turned on when the dead time ends according to the target working condition.

[0141] Optionally, the first shut-off unit 11021 is specifically used for: if the target operating condition corresponding to the switch switching signal is switching from the first bridge arm to the second bridge arm, then controlling the first switch tube of the first bridge arm to be shut off, and controlling the second switch tube to be in the on state; if the target operating condition corresponding to the switch switching signal is switching from the second bridge arm to the first bridge arm, then controlling the third switch tube of the second bridge arm to be shut off, and controlling the fourth switch tube to be in the on state.

[0142] Optionally, the first wave blocking unit 11023 is specifically used to: if a second level signal is received, wait for the dead time to end; if the target operating condition is to switch from the first bridge arm to the second bridge arm, control the third switch tube of the second bridge arm to turn on at the end of the dead time, and control the fourth switch tube to be in the on state; if the target operating condition is to switch from the second bridge arm to the first bridge arm, control the first switch tube of the first bridge arm to turn on at the end of the dead time, and control the second switch tube to be in the on state.

[0143] In this embodiment, whether the secondary side achieves ZVS is monitored in real time. When the secondary side current is guaranteed to achieve ZVS, the bridge arm is switched. Otherwise, the wave blocking operation is performed, thereby achieving switching cycle-level protection of the secondary side without increasing the control frequency.

[0144] Referring to FIG. 12 , in a feasible implementation manner, the wave encapsulation module 1102 further includes:

[0145] The second comparison unit 11024 is configured to compare the current secondary current with the set current of the target operating condition to obtain a current comparison result, where the comparison result includes a first level signal and a second level signal, where the first level signal is a level signal corresponding to when the secondary current does not meet the ZVS condition of the target operating condition corresponding to the switch switching signal, and the second level signal is a level signal corresponding to when the secondary current meets the ZVS condition of the target operating condition corresponding to the switch switching signal;

[0146] The waiting unit 11025 is configured to obtain a comparison result within a preset first time period if the current comparison result is a first level signal;

[0147] The first switching unit 11026 includes:

[0148] The shutoff subunit 110261 is configured to control the first bridge arm or the second bridge arm of the secondary bridge arm circuit to shut down according to the target operating condition when receiving the second level signal within the first time period;

[0149] The switching subunit 110262 is configured to control the other bridge arm to be turned on when the dead time ends;

[0150] The second wave blocking unit 11027 is configured to perform a wave blocking operation on the secondary side of the inverter when no second level signal is received within the first time period.

[0151] Optionally, the first switching unit 11026 further includes:

[0152] The acquisition subunit 110263 is configured to acquire the real-time voltage of another bridge arm;

[0153] The control subunit 110264 is configured to control another bridge arm to be turned on if the absolute value of the real-time voltage drops below a preset voltage within a preset second time period;

[0154] The wave-sealing subunit 110265 is configured to perform a wave-sealing operation on the secondary side of the inverter if the absolute value of the real-time voltage is higher than the preset voltage within a preset second time period.

[0155] In this embodiment, whether the secondary side achieves ZVS is monitored in real time. If it is not satisfied, the circuit waits and switches the bridge arm only when the secondary side current meets the ZVS protection requirement within a first time period. The first bridge arm or the second bridge arm is turned off, and an adaptive dead time is set. When the real-time voltage of the other bridge arm drops to the set voltage, the other bridge arm circuit is turned on, thereby achieving switching cycle-level protection of the secondary side without increasing the control frequency.

[0156] 11 and 12 above describe in detail the inverter ZVS protection device in the embodiment of the present application from the perspective of modular functional entities. The following describes in detail the inverter ZVS protection device in the embodiment of the present application from the perspective of hardware processing.

[0157] FIG13 is a schematic diagram of the structure of an inverter ZVS protection device provided in an embodiment of the present application. The inverter ZVS protection device 1300 may vary significantly due to different configurations or performances, and may include one or more processors (central processing units, CPUs) 1310 (e.g., one or more processors) and a memory 1320, and one or more storage media 1330 (e.g., one or more mass storage devices) storing application programs 1333 or data 1332. The memory 1320 and the storage medium 1330 may be either ephemeral or persistent storage. The program stored in the storage medium 1330 may include one or more modules (not shown), each of which may include a series of computer-readable instructions for operating the inverter ZVS protection device 1300. Furthermore, the processor 1310 can be configured to communicate with the storage medium 1330 and execute a series of computer-readable instruction operations in the storage medium 1330 on the inverter ZVS protection device 1300. When the computer-readable instructions are executed by the processor, the processor executes the steps of the inverter ZVS protection method in the above-mentioned embodiments.

[0158] The inverter ZVS protection device 1300 may further include one or more power supplies 1340, one or more wired or wireless network interfaces 1350, one or more input / output interfaces 1360, and / or one or more operating systems 1331, such as Windows Server, Mac OS X, Unix, Linux, FreeBSD, etc. Those skilled in the art will appreciate that the inverter ZVS protection device structure shown in FIG13 does not limit the inverter ZVS protection device, and may include more or fewer components than shown, or combine certain components, or arrange the components differently.

[0159] The present application also provides a computer-readable storage medium, which may be a non-volatile computer-readable storage medium or a volatile computer-readable storage medium. The computer-readable storage medium stores instructions. When the instructions are executed on a computer, the computer executes the steps of the inverter ZVS protection method. The steps specifically include:

[0160] In response to the switch switching signal on the secondary side of the inverter, the current secondary side current of the inverter is collected. The secondary side current is the current flowing from the transformer to the midpoint of the first and second bridge arms of the secondary side bridge arm circuit; if the secondary side current does not meet the ZVS condition for the target operating condition corresponding to the switch switching signal, a wave blocking operation is performed on the secondary side of the inverter; if the secondary side current meets the ZVS condition for the target operating condition corresponding to the switch switching signal, the secondary side bridge arm circuit is controlled to switch the bridge arm according to the target operating condition. This embodiment monitors whether the secondary side has achieved ZVS in real time, switches the bridge arm only when the secondary side current can achieve ZVS, and otherwise controls the original secondary side to enter the wave blocking logic, thereby achieving switching cycle-level protection of the secondary side without increasing the control frequency.

[0161] If the secondary current does not meet the ZVS condition of the target working condition corresponding to the switch switching signal, a wave-sealing operation is performed on the secondary side of the inverter, including: controlling the first bridge arm or the second bridge arm to be turned off according to the target working condition corresponding to the switch switching signal; comparing the current secondary current with the set current of the target working condition to obtain the current comparison result, the comparison result including a first level signal and a second level signal, the first level signal being the level signal corresponding to when the secondary current does not meet the ZVS condition of the target working condition, and the second level signal being the level signal corresponding to when the secondary current meets the ZVS condition of the target working condition; if the current comparison result is the first level signal, a wave-sealing operation is performed on the secondary side of the inverter. This embodiment performs a wave-sealing operation when the first level signal sent by the comparator is received without increasing the control frequency, and switches the bridge arm when the second level signal is received, thereby avoiding excessive stress on the switch tube caused by switching the secondary side when ZVS cannot be achieved, and reducing the loss of the secondary side switch tube.

[0162] The above-mentioned comparison of the current secondary current with the set current of the target operating condition to obtain the current comparison result includes: if the target operating condition is switching from the second bridge arm to the first bridge arm, then comparing the secondary current with the first set current, and outputting a first level signal when the secondary current is less than the first set current, and outputting a second level signal when the secondary current is greater than the first set current, and the first set current is greater than zero; if the target operating condition is switching from the first bridge arm to the second bridge arm, then comparing the secondary current with the second set current, and outputting a first level signal when the secondary current is greater than the second set current, and outputting a second level signal when the secondary current is less than the second set current, and the second set current is less than zero. This embodiment compares according to different operating conditions, avoids excessive stress on the switch tube caused by switching the secondary side when ZVS cannot be achieved, and reduces the loss of the secondary side switch tube.

[0163] If the secondary side current satisfies the ZVS condition of the target operating condition corresponding to the switch switching signal, the secondary side bridge arm circuit is controlled to switch the bridge arm according to the target operating condition, including: if the current comparison result is a second level signal, waiting for the dead time to end; according to the target operating condition, at the end of the dead time, the other bridge arm is controlled to open, and the dead time provides a buffer for the charging and discharging of the upper and lower tube junction capacitances, thereby avoiding the loss caused by the hard switching state.

[0164] The above-mentioned first bridge arm includes a first switching tube and a second switching tube, and the second bridge arm includes a third switching tube and a fourth switching tube. Controlling the first bridge arm or the second bridge arm of the secondary bridge arm circuit to shut down includes: if the target operating condition corresponding to the switch switching signal is switching from the first bridge arm to the second bridge arm, then controlling the first switching tube of the first bridge arm to shut down and controlling the second switching tube to be in the on state; if the target operating condition corresponding to the switch switching signal is switching from the second bridge arm to the first bridge arm, then controlling the third switching tube of the second bridge arm to shut down and controlling the fourth switching tube to be in the on state.

[0165] The first bridge arm includes a first switching transistor and a second switching transistor, and the second bridge arm includes a third switching transistor and a fourth switching transistor. Controlling the other bridge arm to turn on at the end of the dead time based on the target operating condition includes: if a first level signal is received, waiting for the end of the dead time; if the target operating condition is switching from the first bridge arm to the second bridge arm, controlling the third switching transistor of the second bridge arm to turn on and controlling the fourth switching transistor to be in the on state at the end of the dead time; if the target operating condition is switching from the second bridge arm to the first bridge arm, controlling the first switching transistor of the first bridge arm to turn on and controlling the second switching transistor to be in the on state at the end of the dead time. This embodiment ensures soft switching conditions by accurately controlling the on and off of the switching transistors corresponding to the target operating condition.

[0166] If the secondary current does not meet the ZVS condition of the target operating condition corresponding to the switch switching signal, a wave-blocking operation is performed on the secondary side of the inverter, including: comparing the current secondary current with the set current of the target operating condition to obtain a current comparison result, the comparison result includes a first level signal and a second level signal, the first level signal is the level signal corresponding to the secondary current when the secondary current does not meet the ZVS condition of the target operating condition, and the second level signal is the level signal corresponding to the secondary current when the secondary current meets the ZVS condition of the target operating condition, and the set current is the minimum current required to charge and discharge the upper and lower tube junction capacitances within the dead time; if the current comparison result is the first level signal, the comparison result within a preset first time period is obtained; when the second level signal is received within the first time period, the first bridge arm or the second bridge arm of the secondary bridge arm circuit is controlled to be turned off according to the target operating condition, and when the dead time ends, the other bridge arm is controlled to be turned on; when the second level signal is not received within the first time period, the wave-blocking operation is performed on the secondary side of the inverter. This embodiment monitors in real time whether the secondary side achieves ZVS, waits when the current secondary side current does not meet ZVS, and switches the bridge arm when a second level signal is received within a preset first time period. Otherwise, the inverter is subjected to a wave blocking operation, thereby avoiding frequent wave blocking operations, improving the working efficiency of the inverter, and realizing switching cycle-level protection of the secondary side without increasing the control frequency.

[0167] After controlling the first bridge arm or the second bridge arm of the secondary bridge arm circuit to shut down, the above-mentioned method further includes: collecting the real-time voltage of the other bridge arm; if the absolute value of the real-time voltage drops below the preset voltage within the preset second time period, controlling the other bridge arm to open; if the absolute value of the real-time voltage is higher than the preset voltage within the preset second time period, performing a wave-blocking operation on the secondary side of the inverter. This embodiment monitors whether the secondary side achieves ZVS in real time, waits if it does not meet the requirements, switches the bridge arm again if the secondary side current meets the ZVS protection requirements within the first time period, shuts down the first bridge arm or the second bridge arm, and sets an adaptive dead time. If the real-time voltage of the other bridge arm drops below the set voltage within the second time period, the other bridge arm circuit is opened, otherwise a wave-blocking operation is performed, thereby achieving switching cycle-level protection of the secondary side without increasing the control frequency.

[0168] Those skilled in the art will clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0169] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, server, or network device, etc.) to execute all or part of the steps of the various embodiments of the present application. The aforementioned storage medium includes various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

[0170] The above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. An inverter ZVS protection method, characterized in that: The inverter ZVS protection method is applied to an inverter, the inverter includes a transformer and a secondary bridge arm circuit, the secondary bridge arm circuit includes a first bridge arm and a second bridge arm connected in series, the secondary winding of the transformer is connected to the midpoint of the first bridge arm and the second bridge arm, and the inverter ZVS protection method includes: In response to the switch switching signal of the secondary side of the inverter, collecting the current secondary side current of the inverter, where the secondary side current is the current flowing from the transformer to the midpoint of the first bridge arm and the second bridge arm; If the secondary side current does not satisfy the ZVS condition of the target operating condition corresponding to the switch switching signal, performing a wave blocking operation on the secondary side of the inverter; If the secondary current satisfies the ZVS condition of the target operating condition corresponding to the switch switching signal, the secondary bridge arm circuit is controlled to perform bridge arm switching according to the target operating condition.

2. The inverter ZVS protection method according to claim 1, characterized in that: If the secondary side current does not satisfy the ZVS condition of the target working condition corresponding to the switch switching signal, performing a wave blocking operation on the secondary side of the inverter includes: Controlling the first bridge arm or the second bridge arm to be turned off according to the target operating condition corresponding to the switch switching signal; Compare the current secondary current with the set current of the target working condition to obtain a current comparison result, wherein the comparison result includes a first level signal and a second level signal, wherein the first level signal is a level signal corresponding to when the secondary current does not meet the ZVS condition of the target working condition, and the second level signal is a level signal corresponding to when the secondary current meets the ZVS condition of the target working condition, and the set current is the minimum current required to charge and discharge the upper and lower tube junction capacitances within the dead time; If the current comparison result is a first level signal, a wave blocking operation is performed on the secondary side of the inverter.

3. The inverter ZVS protection method according to claim 2, characterized in that: The comparing the current secondary current with the set current of the target operating condition to obtain a current comparison result includes: If the target operating condition is to switch from the second bridge arm to the first bridge arm, the secondary current is compared with a first set current, and a first level signal is output when the secondary current is less than the first set current, and a second level signal is output when the secondary current is greater than the first set current, and the first set current is greater than zero; If the target operating condition is to switch from the first bridge arm to the second bridge arm, the secondary current is compared with the second set current, and a first level signal is output when the secondary current is greater than the second set current, and a second level signal is output when the secondary current is less than the second set current, and the second set current is less than zero.

4. The inverter ZVS protection method according to claim 2, characterized in that: The first bridge arm includes a first switch tube and a second switch tube, the second bridge arm includes a third switch tube and a fourth switch tube, and the first bridge arm or the second bridge arm of the secondary bridge arm circuit is controlled to be turned off according to the target working condition corresponding to the switch switching signal, including: If the target operating condition corresponding to the switch switching signal is switching from the first bridge arm to the second bridge arm, the first switch tube of the first bridge arm is controlled to be turned off, and the second switch tube is controlled to be in a conducting state; If the target operating condition corresponding to the switch switching signal is switching from the second bridge arm to the first bridge arm, the third switch tube of the second bridge arm is controlled to be turned off, and the fourth switch tube is controlled to be in a conducting state.

5. The inverter ZVS protection method according to claim 2, characterized in that: If the secondary current satisfies the ZVS condition of the target operating condition corresponding to the switch switching signal, controlling the secondary bridge arm circuit to perform bridge arm switching according to the target operating condition includes: If the current comparison result is a second level signal, wait for the dead time to end; Another bridge arm is controlled to be opened at the end of the dead time according to the target operating condition.

6. The inverter ZVS protection method according to claim 5, characterized in that: The first bridge arm includes a first switch tube and a second switch tube, the second bridge arm includes a third switch tube and a fourth switch tube, and the controlling another bridge arm to be turned on at the end of the dead time according to the target operating condition includes: If the target operating condition is to switch from the second bridge arm to the first bridge arm, then at the end of the dead time, the first switch tube of the first bridge arm is controlled to be turned on, and the second switch tube is controlled to be in a conducting state; If the target operating condition is to switch from the first bridge arm to the second bridge arm, the third switch tube of the second bridge arm is controlled to be turned on at the end of the dead time, and the fourth switch tube is controlled to be in the on state.

7. The inverter ZVS protection method according to claim 1, characterized in that: If the secondary side current does not satisfy the ZVS condition of the target working condition corresponding to the switch switching signal, performing a wave blocking operation on the secondary side of the inverter includes: Compare the current secondary current with the set current of the target working condition to obtain a current comparison result, wherein the comparison result includes a first level signal and a second level signal, wherein the first level signal is a level signal corresponding to when the secondary current does not meet the ZVS condition of the target working condition, and the second level signal is a level signal corresponding to when the secondary current meets the ZVS condition of the target working condition, and the set current is the minimum current required to charge and discharge the upper and lower tube junction capacitances within the dead time; If the current comparison result is a first level signal, obtaining a comparison result within a preset first time period; When a second level signal is received within the first time period, the first bridge arm or the second bridge arm of the secondary bridge arm circuit is controlled to be turned off according to the target working condition, and the other bridge arm is controlled to be turned on when the dead time ends; When no second level signal is received within the first time period, a wave-sealing operation is performed on the secondary side of the inverter.

8. The inverter ZVS protection method according to claim 7, characterized in that: After controlling the first bridge arm or the second bridge arm of the secondary bridge arm circuit to be turned off according to the target operating condition, the method further includes: Collect the real-time voltage of another bridge arm; If the absolute value of the real-time voltage drops below a preset voltage within a preset second time period, controlling the other bridge arm to be turned on; If the absolute value of the real-time voltage is higher than the preset voltage within the preset second time period, a wave-closing operation is performed on the secondary side of the inverter.

9. An inverter ZVS protection device, characterized in that: The inverter ZVS protection device is applied to an inverter, the inverter includes a transformer and a secondary bridge arm circuit, the secondary bridge arm circuit includes a first bridge arm and a second bridge arm connected in series, the secondary winding of the transformer is connected to the midpoint of the first bridge arm and the second bridge arm, and the inverter ZVS protection device includes: A collection module is configured to collect a current secondary current of the inverter in response to a switch switching signal of the secondary side of the inverter, wherein the secondary current is a current flowing from the transformer to a midpoint between the first bridge arm and the second bridge arm; The wave blocking module is configured to perform a wave blocking operation on the secondary side of the inverter if the secondary side current does not meet the ZVS condition of the target working condition corresponding to the switch switching signal The switching module is configured to control the secondary side bridge arm circuit to perform bridge arm switching if the secondary side current meets the ZVS condition of the target working condition corresponding to the switch switching signal.

10. An inverter ZVS protection device, characterized in that: The inverter ZVS protection device comprises: a memory and at least one processor, wherein instructions are stored in the memory; The at least one processor calls the instructions in the memory to enable the inverter ZVS protection device to execute the inverter ZVS protection method according to any one of claims 1 to 8.

11. A computer-readable storage medium having instructions stored thereon, characterized in that: When the instruction is read and executed, the inverter ZVS protection method according to any one of claims 1 to 8 is executed.

Images