Power conversion device and power conversion device control method

Abstract

Provided is a power conversion device that comprises a polarization suppression capacitor and that can achieve both high efficiency and reduction in size / weight. This power conversion device converts a first DC voltage, which is supplied from a DC power source, into a second DC voltage via a bridge circuit, a transformer, and a rectifier circuit. The power conversion device is characterized by comprising: a first capacitor provided between the bridge circuit and the transformer; a second capacitor provided in parallel or in series with the first capacitor; a first semiconductor switch provided in parallel or in series with the first capacitor; and a voltage control means for adjusting, in a switching manner, a phase shift amount of an element constituting the bridge circuit.

Description

Power conversion device and control method for power conversion device

[0001] The present invention relates to the configuration of a power conversion device and its control, and in particular to a technique that is effective when applied to an isolated DC / DC converter that integrates a plurality of power conversion circuits using a transformer.

[0002] As one variation of on-board power conversion equipment, development is underway on an isolated DC / DC converter that uses a transformer to integrate a DC / DC converter for a low-voltage battery (LVBAT) and a DC / AC converter for a 100V AC outlet (V2L). By integrating multiple power conversion circuits via a transformer, it is possible to achieve both high efficiency and compact, lightweight power conversion equipment.

[0003] In isolated DC / DC converters that integrate multiple power conversion circuits, the input voltage range becomes wider, and it is necessary to design the number of turns on the primary side of the transformer (generally increasing the number of turns) so that the output voltage specifications are met even when the input voltage drops.However, when the input voltage is at the rated value, the primary side current and secondary side voltage increase, making it difficult to improve efficiency.

[0004] In a circuit having two or more legs, a converter that operates with the legs out of phase is called a "phase shift converter."

[0005] As background art in this technical field, for example, there is a technology such as that disclosed in Patent Document 1. Patent Document 1 discloses "a DC-DC converter of a primary side phase shift type having a full-bridge inverter that converts a DC voltage into a high-frequency voltage and a rectifier circuit that rectifies the output of the full-bridge inverter" (paragraph

[0001] of Patent Document 1).

[0006] Patent No. 6033649

[0007] In the above-described phase shift converter, the output voltage range can be expanded by using a capacitor for suppressing biased magnetism, so that the output voltage range can be expanded by switching the capacitor, and the number of turns on the primary side can be increased.

[0008] However, conventional phase shift converters generally use two semiconductor devices as bidirectional switches to switch between capacitors, which poses a problem of high loss.

[0009] In the above-mentioned Patent Document 1, when the load is light and the amount of electromagnetic energy stored in the inductance included in the circuit is small, the capacitance changeover switch Q5 is turned off to connect the first and second capacitors in series between the output terminals of the inverter, thereby reducing the combined capacitance of both capacitors and making it possible to completely charge and discharge both capacitors with the small amount of electromagnetic energy stored in the circuit, thereby realizing soft switching of each switch element of the inverter.

[0010] On the other hand, under heavy load conditions when the amount of electromagnetic energy stored in the inductance included in the circuit increases, the capacitance changeover switch Q5 is turned on to connect the first capacitor or the second capacitor alone in parallel to the switch element of either arm of the reference phase leg or the switch element of either arm of the control phase leg, thereby increasing the capacitance of the capacitor to achieve soft switching of each switch element of the inverter (paragraph

[0051] of Patent Document 1). In Patent Document 1, the switching circuit is composed of two capacitors (capacitors C5 and C6) and one capacitance changeover switch Q5, but when using semiconductor devices, both need to be used as switches.

[0011] Furthermore, Patent Document 1 does not take into consideration the expansion of the output voltage range by using a capacitor for suppressing bias magnetism as described above.

[0012] SUMMARY OF THE INVENTION It is therefore an object of the present invention to provide a power converter equipped with a capacitor for suppressing biased magnetism, which is capable of achieving both high efficiency and small size and light weight, and a control method thereof.

[0013] In order to solve the above problems, the present invention provides a power conversion device that converts a first DC voltage supplied from a DC power supply into a second DC voltage via a bridge circuit, a transformer, and a rectifier circuit, and is characterized by comprising: a first capacitor provided between the bridge circuit and the transformer; a second capacitor provided in parallel or in series with the first capacitor; a first semiconductor switch provided in parallel or in series with the first capacitor; and voltage control means that uses switching to adjust the amount of phase shift of elements that constitute the bridge circuit.

[0014] The present invention also provides a control method for the above-mentioned power conversion device, characterized in that when the first DC voltage is lower than a predetermined value, the first semiconductor switch is turned off and the second DC voltage is controlled by switching the bridge circuit, and when the first DC voltage is equal to or higher than the predetermined value, the first semiconductor switch is turned on and the second DC voltage range is expanded by switching the bridge circuit.

[0015] According to the present invention, it is possible to realize a power converter including a capacitor for suppressing biased magnetism, which is capable of achieving both high efficiency and small size and light weight, and a control method thereof.

[0016] Problems, configurations, and effects other than those described above will become apparent from the following description of the embodiments.

[0017] FIG. 1 is a circuit diagram showing a schematic configuration of a power conversion device according to a first embodiment of the present invention. FIG. 2 is a diagram showing a modified example of the capacitor switching circuit 103 of FIG. 1. FIG. 3 is a flowchart showing a control method for the power conversion device of FIG. 1. FIG. 4 is a diagram showing waveforms during capacitor switching control. FIG. 5 is a diagram showing waveforms when the semiconductor switch S101 of a parallel-type power conversion device according to a second embodiment of the present invention is in an OFF state. FIG. 6 is a diagram showing an operation when the capacitor switching circuit is switched from OFF to ON. FIG. 7 is a diagram showing an operation when the capacitor switching circuit is switched from OFF to ON. FIG. 8 is a diagram showing an operation when the capacitor switching circuit is switched from OFF to ON. FIG. 9 is a diagram showing waveforms when the switch S101 of a series-type power conversion device according to a third embodiment of the present invention is in an OFF state. FIG. 10 is a diagram showing an operation when the capacitor switching circuit is switched from OFF to ON. FIG. 11 is a diagram showing an operation when the capacitor switching circuit is switched from OFF to ON. FIG. 12 is a diagram showing waveforms when the switch S101 of a parallel-type power conversion device according to a fourth embodiment of the present invention is in an OFF state. FIG. 13 is a diagram showing waveforms obtained by temporarily increasing the peak value of VC1 by lowering the switching frequency. FIG. 14 is a flowchart showing a control method for a power conversion device according to a fifth embodiment of the present invention. FIG. 15 is a diagram showing waveforms during capacitor switching control. 10 is a diagram showing waveforms during capacitor switching control of a power conversion device according to a tenth embodiment of the present invention; FIG. 11 is a circuit diagram showing a schematic configuration of a conventional phase shift converter; FIG. 12 is a diagram showing the influence of a bias magnetization suppression capacitor on an output voltage; FIG. 13 is a diagram showing the influence of a bias magnetization suppression capacitor on an output voltage; FIG. 14 is a diagram showing the influence of a bias magnetization suppression capacitor on an output voltage; FIG. 15 is a diagram showing the influence of a bias magnetization suppression capacitor on an output voltage; FIG. 16 is a diagram showing the influence of a bias magnetization suppression capacitor on an output voltage; FIG. 17 is a diagram showing the influence of a bias magnetization suppression capacitor on an output voltage; FIG. 18 is a diagram showing the influence of a bias magnetization suppression capacitor on an output voltage;

[0018] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. In the drawings, the same components are designated by the same reference numerals, and detailed description of overlapping parts will be omitted.

[0019] A power conversion device and a control method thereof according to a first embodiment of the present invention will be described with reference to Figures 1 to 4, 18 and 19. Figures 18 and 19 are diagrams showing a schematic configuration of a conventional phase shift converter (Figure 18) and the influence of a bias magnetization suppression capacitor on the output voltage (Figure 19), which are shown to make the present invention easier to understand.

[0020] Fig. 1 is a circuit diagram showing a schematic configuration of a power conversion device according to the present embodiment. Fig. 2 is a diagram showing a modified example of the capacitor switching circuit 103 shown in Fig. 1.

[0021] As shown in Figure 1, the power conversion device of this embodiment is a power conversion device that applies a capacitor-switched parallel system. The power conversion device of this embodiment is an isolated DC / DC converter, and is not limited to a phase-shift converter, but may also be an LLC converter or the like. Reference numeral 101 denotes the primary side circuit of the phase-shift converter, which is composed of a capacitor C1, semiconductor switches S1 to S4, a capacitor switching circuit 103, and an inductor L1.

[0022] The capacitor switching circuit 103 is composed of capacitors C101 and C102 and a semiconductor switch S101. The capacitor C102 is connected in parallel with the capacitor C101, and the semiconductor switch S101 is connected in parallel with the capacitor C101 and in series with the capacitor C102.

[0023] In FIG. 1, an example of the semiconductor switch S101 is a MOSFET with a diode D101 connected in antiparallel.

[0024] Reference numeral 102 denotes a secondary circuit, which is composed of an inductor L2, a capacitor C3, and diodes D1 and D2. The secondary circuit is not limited to a center tap configuration, and may be a full bridge configuration, etc. Reference numeral Tr1 denotes a transformer.

[0025] The capacitor switching method may be a series method as shown in Fig. 2. In the example of Fig. 2, in the capacitor switching circuit 103, a capacitor C2 is connected in series with a capacitor C1, and a semiconductor switch S1 is connected in series with the capacitor C1 and in parallel with the capacitor C2. The semiconductor switch S1 is a semiconductor device such as a MOSFET to which a diode D1 is connected in antiparallel.

[0026] In the conventional phase shift converter shown in Fig. 18, a capacitor C3 may be added to suppress transformer bias magnetization. As shown in Fig. 19, the output voltage range can be expanded by changing this capacitance. Therefore, we propose the capacitor switching circuit and control method of this embodiment shown in Figs. 1 to 4.

[0027] FIG. 3 is a flowchart showing a control method for the power conversion device of FIG.

[0028] As shown in FIG. 3, a semiconductor switch S101 in a capacitor switching circuit 103 is switched in response to an input voltage.

[0029] When the operation of the power conversion device is started, first, in step S1, the primary side circuit 101 and the secondary side circuit 102 are driven.

[0030] Next, in step S2, the input voltage V1 and the output voltage V2 are detected.

[0031] Next, in step S3, the input voltage V1 is compared with a predetermined threshold (reference value) Vth1. If the input voltage V1 is equal to or greater than the threshold Vth1 (Yes), the process proceeds to step S4. If the input voltage V1 is smaller than the threshold Vth1 (No), the process proceeds to step S5.

[0032] In step S4, the semiconductor switch S101 is turned on, and the process proceeds to step S7. Meanwhile, in step S5, the input voltage V1 is compared with a predetermined threshold value (reference value) Vth2.

[0033] In step S5, if the input voltage V1 is equal to or less than the threshold value Vth2 (Yes), the process proceeds to step S6. If the input voltage V1 is greater than the threshold value Vth2 (No), the process proceeds to step S7.

[0034] In step S6, the semiconductor switch S101 is turned off, and the process proceeds to step S7.

[0035] Next, in step S7, the difference ΔV2 between the measured value of the output voltage V2 and its target value Vref2 is calculated, and it is determined whether ΔV2 is equal to or smaller than 0.

[0036] If ΔV2 is equal to or less than 0 (Yes), the process proceeds to step S8. If ΔV2 is greater than 0 (No), the process proceeds to step S9.

[0037] In step S8, the amount of phase shift θ1 of the primary side circuit 101 is decreased, and then the process proceeds to step S10, where the driving of the primary side circuit 101 and the secondary side circuit 102 is stopped. On the other hand, in step S9, the amount of phase shift θ1 of the primary side circuit 101 is increased, and then the process proceeds to step S10, where the driving of the primary side circuit 101 and the secondary side circuit 102 is stopped.

[0038] FIG. 4 shows waveforms during capacitor switching control.

[0039] When the input voltage V1 is equal to or greater than the threshold Vth1, the semiconductor switch S101 is turned ON, connecting capacitors C101 and C102 in parallel (increasing capacitance), thereby decreasing the output voltage V2. When the input voltage V1 is smaller than the threshold Vth1, the semiconductor switch S101 is turned OFF, connecting only capacitor C101 (decreasing capacitance), thereby increasing the output voltage V2. After the capacitor switching circuit 103 is driven, the output voltage V2 is controlled using the phase shift amount θ1 of the phase shift converter. (Description of how the phase shift converter is driven will be omitted.) The series connection shown in FIG. 2 can also be controlled in a similar manner to the above.

[0040] As described above, the power conversion device of this embodiment is a power conversion device that converts a first DC voltage V1 supplied from a DC power supply into a second DC voltage V2 via a bridge circuit (primary side circuit 101), a transformer Tr1, and a rectifier circuit (secondary side circuit 102), and is equipped with a first capacitor C101 provided between the bridge circuit and the transformer Tr1, a second capacitor C102 provided in parallel or in series with the first capacitor C101, a first semiconductor switch S101 provided in parallel or in series with the first capacitor C101, and switching-based voltage control means that adjusts the amount of phase shift of the elements (semiconductor switches S1 to S4) that constitute the bridge circuit.

[0041] The second capacitor C102 is connected in parallel with the first capacitor C101, and the first semiconductor switch S101 is connected in parallel with the first capacitor C101 and in series with the second capacitor C102.

[0042] Alternatively, the second capacitor C102 may be connected in series with the first capacitor C101, and the first semiconductor switch S101 may be connected in series with the first capacitor C101 and in parallel with the second capacitor C102.

[0043] Furthermore, in the power conversion device of this embodiment, when the first DC voltage V1 is lower than a predetermined value Vth1, the first semiconductor switch S101 is turned off and the second DC voltage V2 is controlled by switching of the bridge circuit, and when the first DC voltage V1 is equal to or higher than the predetermined value Vth1, the first semiconductor switch S101 is turned on and the range of the second DC voltage V2 is expanded by switching of the bridge circuit.

[0044] According to this embodiment, LC resonance occurs due to the leakage inductance and excitation inductance of the capacitor and transformer, so the gain can be varied by changing the capacitance. When the input voltage V1 drops, the output voltage V2 can be increased by increasing the gain, so the output voltage range can be expanded by controlling the gain.

[0045] In this embodiment, an isolated DC / DC converter equipped with a separate output voltage control means (not shown) is targeted, and when the input voltage V1 falls below a certain threshold value Vth1, the output voltage V2 is increased, thereby expanding the control range (output voltage range) of the output voltage control means.

[0046] It has been confirmed that the output voltage of the above-mentioned isolated DC / DC converter (phase shift converter, LLC converter) fluctuates depending on the capacitance of the primary-side capacitor. Therefore, by providing a selector switch (semiconductor switch S101) and two capacitors C101 and C102, the capacitance can be reduced when the input voltage V1 drops, thereby expanding the output voltage range with a simple circuit configuration.

[0047] 5 to 6C, a power conversion device and a control method thereof according to a second embodiment of the present invention will be described. The circuit configuration of the power conversion device of this embodiment is the same as that of the first embodiment (FIG. 1).

[0048] FIG. 5 is a diagram showing waveforms when the semiconductor switch S101 of the parallel type power conversion device of this embodiment is in the OFF state.

[0049] When semiconductor switch S101 is in the OFF state, only capacitor C101 is connected, so an AC voltage is applied to capacitor C101 and a corresponding charging / discharging current flows. On the other hand, because semiconductor switch S101 is in the OFF state, capacitor C102 cannot be discharged because a charging current flows through the body diode D1. Therefore, the voltage VC2 of capacitor C102 is clamped at the peak value of the voltage VC1 of capacitor C101, and then a steady state is reached in which no charging current flows.

[0050] 6A to 6C show the operation when the capacitor switching circuit 103 is switched from OFF to ON.

[0051] As shown in FIG. 6A, when VC1=VC2, the voltage of the semiconductor switch S1 is 0, so even if it is turned on, no current flows between C1 and C2.

[0052] On the other hand, as shown in Figures 6B and 6C, when there is a potential difference between VC1 and VC2, if semiconductor switch S1 is turned on with a voltage applied to it, a short-circuit current will flow between C1 and C2. Because short-circuit current can increase losses and cause circuit failure, it is necessary to switch semiconductor switch S101 on when VC1 = VC2. Therefore, by turning on semiconductor switch S101 at the timing indicated by the black circle in Figure 5, switching can be performed without an overcurrent flowing.

[0053] As described above, the power conversion device of this embodiment switches on the first semiconductor switch S101 when the voltage of the first capacitor C101 is at a maximum.

[0054] In a configuration in which the second capacitor C102 is provided in parallel, when the semiconductor switch S101 is in the OFF state, the voltage of the second capacitor C102 is equal to the maximum value of the voltage of the first capacitor C101. Therefore, when the voltage VC1 of the first capacitor C101 and the voltage VC2 of the second capacitor C102 are equal, that is, when the voltage VC1 of the first capacitor C101 is at its maximum, the semiconductor switch S101 is switched ON.

[0055] If the semiconductor switch S101 is switched from OFF to ON while a voltage is applied to it, an overcurrent will occur, leading to circuit failure. Therefore, it is necessary to switch the semiconductor switch S101 at the above timing when no voltage is applied to it. Furthermore, the above timing can be achieved even in a sensorless configuration by synchronizing it with the control of the primary side circuit without sensing the capacitor voltage.

[0056] 7 to 8B, a power conversion device and a control method thereof according to a third embodiment of the present invention will be described. The circuit configuration of the power conversion device of this embodiment is the same as that of the first embodiment (FIGS. 1 and 2).

[0057] FIG. 7 is a diagram showing waveforms when the switch S101 of the series type power conversion device of this embodiment is in the OFF state.

[0058] When the semiconductor switch S101 is in the OFF state, the capacitors C101 and C102 are connected in series, so a voltage is applied to both capacitors. However, because the body diode D101 is connected in parallel with the capacitor C102, a negative voltage (a voltage from the anode to the cathode of the body diode D101) is not applied to the voltage VC2 of the capacitor C102. Therefore, an AC voltage is applied such that VC1≦0 and VC2≧0.

[0059] 8A and 8B show the operation when the capacitor switching circuit 103 is switched from OFF to ON.

[0060] As shown in Figure 8A, when VC2 = 0, the voltage of semiconductor switch S1 is 0, so even if it is turned ON, no current flows between C2 and S1. On the other hand, as shown in Figure 8B, when a voltage is applied to VC2, if semiconductor switch S1 is turned ON with a voltage applied to it, a short-circuit current flows between C2 and S1. Because short-circuit current can increase losses and cause circuit failure, it is necessary to switch ON when VC1 = VC2. Therefore, by turning on semiconductor switch S101 at the timing shown by the black circle in Figure 7, it can be switched without an overcurrent flowing.

[0061] A power conversion device and a control method thereof according to a fourth embodiment of the present invention will be described with reference to Figures 9 and 10. The circuit configuration of the power conversion device of this embodiment is the same as that of the first embodiment (Figure 1).

[0062] FIG. 9 is a diagram showing waveforms when the switch S101 of the parallel type power conversion device of this embodiment is in the OFF state.

[0063] If the load or input / output voltages fluctuate when the parallel system shown in Figure 5 is driven in the OFF state, the peak value of the voltage VC1 of capacitor C101 will fluctuate. If the peak value of VC1 increases, capacitor C102 will charge again, returning to the state shown in Figure 5. However, if the peak value of VC1 decreases, capacitor C102 cannot discharge, resulting in the waveform shown in Figure 9. In this state, there is no point where VC1 = VC2, so an overcurrent will occur regardless of when the power is switched ON.

[0064] Therefore, we propose a control method to solve the above problem. The peak of VC1 is temporarily increased by increasing the ON time of the semiconductor switches S1 to S4 in the primary side circuit 101 in Figure 1. Specifically, this can be done by lowering the switching frequency or increasing the switching duty ratio.

[0065] 10 shows a waveform in which the peak value of VC1 is temporarily increased by lowering the switching frequency. By increasing the peak value, it is possible to switch ON at the timing when VC1 = VC2.

[0066] As described above, in the power conversion device of this embodiment, when the peak of the voltage VC1 of the first capacitor C101 becomes smaller than the voltage VC2 of the second capacitor C102, the on time of the bridge circuit is increased to increase the voltage VC1 of the first capacitor C101, and when the voltage VC1 of the first capacitor C101 matches the voltage VC2 of the second capacitor C102, the first semiconductor switch S101 is switched on.

[0067] Fluctuations in the input / output voltage and the load cause fluctuations in the peak value of the voltage VC1 of the first capacitor C101. If the peak value of the voltage VC1 of the first capacitor C101 increases, the voltage VC2 of the second capacitor C102 also increases, so there is no problem. However, if the peak value of the voltage VC1 of the first capacitor C101 decreases, the voltage VC2 of the second capacitor C102 cannot be discharged, and the voltage VC1 of the first capacitor C101 and the voltage VC2 of the second capacitor C102 no longer intersect. In this state, a potential difference occurs between the capacitors regardless of the timing of switching, resulting in an overcurrent.

[0068] As a solution, we propose a control method for increasing the peak value of the voltage VC1 across the first capacitor C101. This control method utilizes the fact that the waveform of the voltage VC1 across the first capacitor C101 fluctuates in response to the switching of the primary-side bridge circuit, and increases the switching ON time so that the peak value of the voltage VC1 across the first capacitor C101 increases. Methods for increasing the ON time include lowering the frequency and increasing the duty ratio.

[0069] Fluctuations in input / output voltages and load may cause the peak value of the voltage VC1 across the first capacitor C101 to decrease. In this case (the region f = 100 kHz in FIG. 10 ), there is no intersection point between the voltage VC1 across the first capacitor C101 and the voltage VC2 across the second capacitor C102, resulting in an overcurrent regardless of the switching timing. Therefore, when the peak value of the voltage VC1 across the first capacitor C101 decreases, the peak value of the voltage VC1 across the first capacitor C101 is increased (the region f = 80 kHz (ON) in FIG. 10 ) by adjusting the ON time of the primary-side bridge circuit (reducing the frequency and increasing the duty cycle), and the power supply is switched from OFF to ON at the same timing as the voltage VC2 across the second capacitor C102, thereby preventing an overcurrent from occurring (the region f = 100 kHz (OFF) in FIG. 10 ).

[0070] A power conversion device and a control method thereof according to a fifth embodiment of the present invention will be described with reference to Figures 11 and 12. The circuit configuration of the power conversion device of this embodiment is the same as that of the first embodiment (Figure 1).

[0071] FIG. 11 is a flowchart showing a control method for the power conversion device of this embodiment.

[0072] Steps S1 to S3 are the same as steps S1 to S3 in the flowchart of the first embodiment (FIG. 3), and therefore a description thereof will be omitted.

[0073] In step S3, if the input voltage V1 is equal to or greater than the threshold value Vth1 (Yes), the process proceeds to step S4. If the input voltage V1 is smaller than the threshold value Vth1 (No), the process proceeds to step S7.

[0074] In step S4, it is determined whether the semiconductor switch S101 is in the OFF state. If it is in the OFF state (Yes), the process proceeds to step S5, where the semiconductor switch S101 is switched from OFF to ON. If it is in the ON state (No), the process proceeds to step S11.

[0075] Next, in step S6, the phase shift amount θ1 of the primary side circuit 101 is decreased, and then the process proceeds to step S11.

[0076] On the other hand, in step S7, the input voltage V1 is compared with a predetermined threshold (reference value) Vth2. If the input voltage V1 is equal to or less than the threshold Vth2 (Yes), the process proceeds to step S8. If the input voltage V1 is greater than the threshold Vth2 (No), the process proceeds to step S11.

[0077] In step S8, it is determined whether the semiconductor switch S101 is in the ON state. If it is in the ON state (Yes), the process proceeds to step S9, where the semiconductor switch S101 is switched from ON to OFF. If it is in the OFF state (No), the process proceeds to step S11.

[0078] Next, in step S10, the phase shift amount θ1 of the primary side circuit 101 is increased, and then the process proceeds to step S11.

[0079] Steps S11 to S14 are the same as steps S7 to S10 in the flowchart of the first embodiment (FIG. 3), and therefore a description thereof will be omitted.

[0080] In this embodiment, as shown in FIG. 11, compared to the flowchart of the first embodiment (FIG. 3), a control for adjusting the phase shift amount θ1 when the semiconductor switch S101 is switched is added.

[0081] When the semiconductor switch S101 is switched from OFF to ON, the output voltage (gain) decreases, so the phase shift amount θ1 decreases and the output voltage V2 increases. When the semiconductor switch S101 is switched from ON to OFF, the output voltage (gain) increases, so the phase shift amount θ1 increases and the output voltage V2 decreases.

[0082] FIG. 12 shows waveforms during the control drive of FIG.

[0083] Without feedforward control, the gain changes when the capacitor is switched, resulting in large voltage fluctuations. On the other hand, if feedforward control is added, the gain fluctuations when the capacitor is switched are corrected by converter voltage control, thereby suppressing voltage fluctuations.

[0084] As described above, in the power conversion device of this embodiment, when the first semiconductor switch S101 is switched on / off, voltage fluctuations are suppressed by feedforward control to the output voltage control system of the bridge circuit.

[0085] The gain fluctuation caused by the capacitor switching is expected to cause a sudden change in the output voltage V2. This is controlled to follow the target value by controlling the output voltage of the bridge circuit on the primary side, but with conventional feedback control, tracking begins after the output voltage suddenly changes, making it difficult to suppress the output voltage fluctuation.

[0086] Therefore, a correction is made to the output voltage control system of the primary-side bridge circuit in response to the gain fluctuation. In the case of a phase-shift converter, the correction can be made by reducing the phase shift amount, which is a control parameter, as the gain increases due to capacitor switching. By incorporating this correction as feedforward control into the switching control flow, it is expected that load fluctuations caused by capacitor switching will be more effectively suppressed than with conventional feedback control.

[0087] A power conversion device and a control method thereof according to a sixth embodiment of the present invention will be described with reference to Fig. 13. The circuit configuration of the power conversion device of this embodiment is the same as that of the first embodiment (Fig. 1).

[0088] FIG. 13 is a diagram showing the characteristics when the capacitance is continuously switched in accordance with the duty ratio of the semiconductor switch S101 of the capacitor switching circuit of the power conversion device of this embodiment.

[0089] When the semiconductor switch S101 of the capacitor switching circuit 103 is switched, the capacitance can be continuously switched according to the duty ratio of the switching, as shown in FIG.

[0090] Therefore, in the power conversion device of this embodiment, the first semiconductor switch S101 is switched on and off to adjust the duty ratio and thereby continuously switch the gain.

[0091] The above control allows the capacitance to be continuously adjusted between two values ​​by simple switching control.

[0092] By adjusting the duty ratio, the capacitance C1 when duty = 0% (solid OFF) and the capacitance C2 when duty = 100% (solid ON) can be adjusted to adjust the period when it behaves as C1 and the period when it behaves as C2, making it possible to adjust the capacitance to any value (between two values).

[0093] By switching the selector switch and adjusting the duty ratio, the capacitance can be switched continuously, allowing for precise control of the output voltage (gain).

[0094] On the other hand, switching losses occur in the changeover switch, which increases losses and places restrictions on device selection, so it is necessary to use them appropriately depending on the application.

[0095] Seventh Embodiment A power conversion device and a control method thereof according to a seventh embodiment of the present invention will be described with reference to FIG.

[0096] FIG. 14 is a diagram showing a capacitor switching circuit of the power conversion device of this embodiment, and is a circuit configuration (modification) in which the capacitor switching circuit 103 of FIG. 1 is combined with the capacitor switching circuit of FIG.

[0097] As shown in FIG. 14, the capacitor switching circuit of this embodiment includes a third capacitor C3 different from the first capacitor C1 and the second capacitor C2, and a second semiconductor switch S2 different from the first semiconductor switch S1, and the third capacitor C3 is connected in series with each of the first capacitor C1 and the second capacitor C2, and is connected in parallel with the second semiconductor switch S2.

[0098] As in this embodiment, by combining a series-connected capacitor switching circuit and a parallel-connected capacitor switching circuit, the capacitor (gain) can be switched between three or more values.

[0099] Eighth embodiment A power conversion device and a control method thereof according to an eighth embodiment of the present invention will be described with reference to FIG.

[0100] FIG. 15 is a diagram showing a capacitor switching circuit of the power conversion device of this embodiment, which is a circuit configuration (modification) in which a plurality of capacitor switching circuits 103 of FIG. 1 are combined.

[0101] As shown in FIG. 15, the capacitor switching circuit of this embodiment includes a third capacitor C3 different from the first capacitor C1 and the second capacitor C2, and a second semiconductor switch S2 different from the first semiconductor switch S1. The third capacitor C3 is connected in parallel with each of the first capacitor C1 and the second capacitor C2, and is also connected in series with the second semiconductor switch S2.

[0102] As in this embodiment, by combining capacitor switching circuits in multiple stages, it is possible to switch the capacitor (gain) between three or more values.

[0103] A power conversion device and a control method thereof according to a ninth embodiment of the present invention will be described with reference to FIG.

[0104] FIG. 16 is a diagram showing a capacitor switching circuit of the power conversion device of this embodiment, which is a circuit configuration (modification) in which a plurality of capacitor switching circuits of FIG. 2 are combined in series.

[0105] As in this embodiment, by combining a plurality of capacitor switching circuits in series, it is possible to switch the capacitor (gain) between three or more values.

[0106] A power conversion device and a control method thereof according to a tenth embodiment of the present invention will be described with reference to FIG.

[0107] FIG. 17 is a diagram showing waveforms during capacitor switching control of the power conversion device of this embodiment.

[0108] As shown in FIG. 17, the power conversion device of this embodiment performs control with reference to the output voltage V2.

[0109] When the second DC voltage (output voltage V2) is lower than a predetermined value, the second DC voltage (output voltage V2) is controlled to be increased.

[0110] By referring to the output voltage V2, the same effect as in the first embodiment can be obtained with respect to output voltage fluctuations and load fluctuations.

[0111] The present invention is not limited to the above-described embodiments, but includes various modifications. For example, the above-described embodiments have been described in detail to clearly explain the present invention, and the present invention is not necessarily limited to those including all of the described configurations. Furthermore, it is possible to replace part of the configuration of one embodiment with the configuration of another embodiment, or to add the configuration of another embodiment to the configuration of one embodiment. Furthermore, it is possible to add, delete, or replace part of the configuration of each embodiment with other configurations.

[0112] 101...primary side circuit (of phase shift converter), 102...secondary side circuit, 103...capacitor switching circuit, C1, C2, C3, C101, C102...capacitors, D1, D2, D101...diodes, L1, L2...inductors, S1 to S4, S101...semiconductor switches, Tr1...transformer, V1...input voltage, V2...output voltage.

Claims

1. A power conversion device that converts a first DC voltage supplied from a DC power source into a second DC voltage via a bridge circuit, a transformer, and a rectifier circuit, comprising: a first capacitor provided between the bridge circuit and the transformer; a second capacitor provided in parallel or series with the first capacitor; a first semiconductor switch provided in parallel or series with the first capacitor; and a switching-based voltage control means that adjusts the amount of phase shift of elements that constitute the bridge circuit.

2. A power conversion device according to claim 1, wherein the second capacitor is connected in parallel with the first capacitor, and the first semiconductor switch is connected in parallel with the first capacitor and in series with the second capacitor.

3. A power conversion device according to claim 1, wherein the second capacitor is connected in series with the first capacitor, and the first semiconductor switch is connected in series with the first capacitor and in parallel with the second capacitor.

4. A power conversion device as claimed in claim 2 or 3, wherein, when the first DC voltage is lower than a predetermined value, the first semiconductor switch is turned off and the second DC voltage is controlled by switching of the bridge circuit, and when the first DC voltage is equal to or higher than the predetermined value, the first semiconductor switch is turned on and the second DC voltage range is expanded by switching of the bridge circuit.

5. A power conversion device according to claim 2, wherein the first semiconductor switch is switched on when the voltage of the first capacitor is at a maximum.

6. A power conversion device according to claim 3, wherein the first semiconductor switch is switched on when the voltage of the second capacitor is 0V.

7. A power conversion device as claimed in claim 5 or 6, wherein, when the peak voltage of the first capacitor becomes smaller than the voltage of the second capacitor, the on-time of the bridge circuit is increased to increase the voltage of the first capacitor, and when the voltage of the first capacitor matches the voltage of the second capacitor, the first semiconductor switch is switched on.

8. A power conversion device according to claim 4, wherein voltage fluctuations are suppressed by feedforward control to an output voltage control system of the bridge circuit when the first semiconductor switch is switched on and off.

9. A power conversion device according to claim 4, wherein the first semiconductor switch is switched on and off to adjust the duty ratio to continuously change the gain.

10. A power conversion device as claimed in claim 1, comprising: a third capacitor different from the first capacitor and the second capacitor; and a second semiconductor switch different from the first semiconductor switch, wherein the third capacitor is connected in series with each of the first capacitor and the second capacitor, and is connected in parallel with the second semiconductor switch.

11. A power conversion device as claimed in claim 1, comprising: a third capacitor different from the first capacitor and the second capacitor; and a second semiconductor switch different from the first semiconductor switch, wherein the third capacitor is connected in parallel with each of the first capacitor and the second capacitor, and is connected in series with the second semiconductor switch.

12. A power conversion device according to claim 4, wherein, when said second DC voltage is lower than a predetermined value, said power conversion device increases said second DC voltage.

13. A control method for a power conversion device as claimed in claim 1, comprising the steps of: when the first DC voltage is lower than a predetermined value, turning off the first semiconductor switch and controlling the second DC voltage by switching the bridge circuit; and when the first DC voltage is equal to or higher than the predetermined value, turning on the first semiconductor switch and expanding the second DC voltage range by switching the bridge circuit.

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